NORTHERN ALBERTA INSTITUTE OF TECHNOLOGY EDMONTON ALBERTA ELECTRONICS DEPARTMENT THE ABC’s OF DC TO AC INVERTERS The author provides an exhaustive examination of the entire field of de to ac inverters. Among the topics dis- cussed are; the proper inverter for a specific application: operating prin. ciples of different types of inverters; the problem of proper device sele tion in the design of inverters, an in verter design example; and many more ET/A/160INTRODUCTION ‘Transistor de to ac inverters are useful in a wide variety of applications. ‘They power the complicated electronic systems of orbiting satellites and cool astro~ hnaut’s suits. They are widely used to operate gyros and other airborne instruments, They provide ac power to operate the electric shaver in your car. Inverters may ‘become increasingly important and widely used with the further development of economic low-voltage de power sources such as solar cells, miclear cells, fuel cells, ete. It should be noted that rectification of the inverter ‘output results in de to de conversion. Transistor in- verters as described herein are, therefore, the “heart” fof transistor de to de converters. However, when used fas a converter, to provide rectified output the frequency and waveshape of the transistor circuit are unimportant, xcept aa they relate to the efficiency and smoothing of the rectified output. (0) Common bore cieuit Rey A (€) Auto tonsformar common (©) Conon emit ctcuit (2 Common collector circuit (> Ni) cellector circuit FAGURE 1 ~ BASIC ONE-TRANSFORMER INVERTER CIRCUITS (ONE-TRANSFORMER INVERTER OPERATION Operational theory common to most transistor in- verters may be illustrated by considering the basic over-driven, push-pull, transformer-coupled transistor oscillator circuit of Figure 1a, and the transformer B-H curve of Figure 2, Assume that transistor Qj is, nonconducting, Qg conducting, and the transformer satu rated at point Jon the B-H curve. When Q starts to conduct, ‘the voltage developed across the primary windings Nj induces voltage in the feedback windings N3 such aa to rapidly drive Q{ into saturation and turn Flux Density BiGoun) K Tognatic Fx 4 (eerted) FIGURE 2 — TRANSFORMER 8: CURVE 2 off. When this transition 1s completed, constant voltae Vp * Yoo = Vegieaty # w7ried to N,. since ae FE fx 6 ust tceease i te tantormer cote at a constant rate, causing fox density B=#/A to in- ‘reas from joint J toward point K on the B-H curve ‘as long as the core remains nonsaturated, magnetiza~ Hon current ‘a( = HEN) is small, but as. saturation (point K) is "Bpproached high magnetization current a se is required to keep SPconstat. When reflected loud Sy ahs Shy, Spa cork Co mn Ree apt EE ei the As flux in the transofrmer core collapses {rom point K to point B,, voltage is induced in the winding which Diases transistor Qz into conduction and initiates the next half cycle, The operation is similar to the first half cycle except that supply voltage (less VoE(gat)) 8 applied to the other hilf of the primary, causing 2 re- versal of polarity in the induced output-voltage. 2 ‘conducts until the core is driven into negative saturation at point M on the B-H curve. As flux collapses from ‘M to the full cycle i completed. ‘Typical voltage and current waveforms for one trans former inverter operation are shown in Figure 3. It can be seen from the collector-to-emitter voltage ‘waveforms that each device is subjected in the aff con- ition to a voltage approximately twice the supply voltage plus any induced voltage that may occur in the circult due to leakage inductance, ete. Also significant Is the ct that the sane maximum eoletoreurret ip 18 required for switching action whether this current 1B primary reflected load current, asin Figure 8, oF ‘totally magnetization current, as’ in Se. This wil, obviously limit efficiency at low output loads. Operating frequency of the inverter 1s determined by the voltage Vp and by the saturation characteristics of the ‘transforiher core according to the relationship vex 108 0 Bao ‘A is cfoss-sectional area of the core in em?, and Ny is the number of turns on one half of the primary. TWO-TRANSFORMER INVERTERS (iq 18 axturated flux density in gauss, At high load currents high-frequency and high output~ power the transformer requirements for the dual roleYee ce 4 Vorinory L 4 Veet; q- aed Pe fe Nec - Veetong L (0) Collector-enitter voltae (©) Collector-enitiar vologs > of ronitor Q). ‘rotor >. tine Mel 2Vp a - (© Caolleciorto-collector (8) Fl lod collector ctrent (6) No load elector cure volt0ge, Vprimary of ronstor a worsisor i Note V,..° 32 FAGURE 3 — rvPICAL OUTAGE AND FoR Ohi TRANSFORMER INVERTER 1 (2) Two trontformer inverter with simple output rorafonme Ty of frequency control and efficient transformation of output voltage become an increasingly difficult problem {in one-transformer inverter design. For this reason, the two transformer inverter designs of Figure 4 are advantageous in many applications. Operation of two- transformer inverters is similar to the one transformer cease except that in each elrcult (Figure 4) only the small feedback transformer T2 need be saturated. ‘Since the magnetization current of Tz 18 small, high current levels due to transformer saturation currents are reduced significantly compared to one-transformer design, a8 is device stress due to these transformer saturation current levels. (Compare Figure 5 with Figures 3d and Ze). Furthermore, use of a conventional ‘output transformer with normal core material permits lower transformer costs as well as higher efficiency. Another major advantage of two-transformer inverter design (a circuit such as Figure 4b) is that the inverter out” ZN Vprimary [CURRENT WAVEFORMS. RL 1 (0) Two tonsormar inverter hoving soy regulated Veg, frequency is determined by Vp. This voltage can fairly easily be regulated to provide constant frequency oF can be changed with variable Rpp to provide vari- able frequency. a (61 Full food collector curent (8) No lood collector cutrant gure CUAEETOR CURRENT WAVEFORMS FOR TWOADDITIONAL TRANSISTOR INVERTER CIRCUITS Single-transistor power-oselllator circuits are useful {in low-power inverter applications in which thelr some- what lover efficiency is of secondary importance when ‘compared to the lower initial cost of the aingle tran- sistor and a simple transformer. A typical basic one- transistor inverter circuit 1s shown in Figure 6, In the circuit of Figure 6 positive feedback, transformer saturation, and switching mechanism are similar to the two-transistor inverter, except that resetting action is caused by capacitor C rather than by a second transistor in push-pull configuration. Care must be taken to protect the device against oxcessive voltage “packswing”” upon turn-off, For proper operation of this circuit, Ry and C must not overload the oscillator during the’ saturating half cycle, so that transistor Conduction will be maintained until the transformer core saturates pie MuLtIvigRaTOR TIMING. oscittaror In driven inverters, such aa shown in Figure 7, output-power-transistor awitching 1a accomplished by mullivibrator drive rather than by feedback from the output transformer. Multivibrator drive transistor Inverters are useful for precision systems requiring carefully controlled frequency, waveform, ete., and for load independent systems. Load independent ystems are especially attractive in the case of reactive loads, And when transient or starting conditions impose loads Which would cause self-oscillating inverters to shut down or operate abnormally. Power requirements of the multivibrator are largely offset by nonsaturation of ‘the output transformer and ellmination of the feedback drive. The multivibrator driven inverter is not in- herently leas efficient than a self-oscillating inverter. However, use of the driven power stage 19 a linear amplifier rather than as 2 saturated switch will result fn high dissipation in the transistors and low wvstem efficiency. Besides multivibrator drive, several other inverter cireuits have been developed which do not use a satu- rating square loop transformer for switching action. ‘These include the resistive-coupled transistor inverter, and inverters with such base circuit timing mechanisms ‘a8 saturating base circuit inductors and the R-C timing land L-C tuned eircult timing famillar to basic oscillator theory. cK, < ps FIGURE 9 ~ SATURABLE BASE INDUCTOR TRANSISTOR INVERTER, The resistive-coupled inverter of Figure 8 obtains the square wave drive from the transistor output by cross-coupled resistor feedback, This resistor coupled feedback oscillator is somawhat inefficient due to losses in Rp, and is difficult to control with regard to fre- quency, An inverter design having saturable base incuctor is shown in Figure 9, Thia circuit may be considered to bbe a simplication of the two-transformer inverter, ex- cept that the saturating transformer has been replaced bby 2 saturable inductor connected between the bases of the two transistors. Switching occurs in the fol- lowing manner: With transistor Q, is driven on by “1 Ye a, base current ip = a 1d Qp 1s biased off by Vg through Rp. Voltage across the inductor is initially Van” Y, ‘ap” Vo +Vpyg: but as the inductor saturates, V5, collapaes, essentially shorting out the feedback circuit, When this occurs, Qj loses its drive and turns off. ‘The magnetization current of the transformer reverses the voltages, drives the system over in the opposite ‘sense, and brings Qp toward conduction. As soon a8 the inductor comes out of saturation the positive feed back is effective and the second half cycle is begun, Saturable base inductor design is simple, belnglargely determined by the following relationships: Letting v-Y, ARE and Out Yee) wt Wis Ceara Ferree where N, A and jg apply to the BRIDGE INVERTERS AND SERIES CONNECTED INVERTERS Inverters such as the bridge circuits of Figure 10, or the series connected inverter of Figure 11, are useful(0) Driven brie (4) Self-osilating two wonsfomee fol briige verte (6) Holl bridge invertor with otrable teve inductor FIGURE 10 — TYPICAL BRIOGE WwERTER CIRCUITS when high-input supply-voltage exceeds transistor volt age capabilities, The bridge arrangements apply input Supply-voltage across each off device, compared to approximately twice supply voltage in simple push-pull circuits, This reduetion of voltage to which each device 48 subjected is true of all circuits of Figure 10, but in the half-bridge circuit of Figure 10c transistor current mist double to maintain the original output-power. Input Voltage Seo Ac amioue tween eur BREVENTS SIMULTANEOUS Gono row Or worn nventen cinco wae In considering bridge inverters, the designer should be aware of a problem tolerable in simple inverters but of major significance in bridge connections. This has to do with the current-voltage excursions of the devices a8 the circuit switches, If the previously non= feonducting, side of the eircult turns on before the other side is essentially off, high voltage and high current may be imposed on the devices, and device safe-areas may be exceeded. Additionally, high transients may be generated, The problem may be somewhat alleviated by reducing deviee “on” drive, by device protection against transients, or by compensating base-drive net works which retard turn-on of the non-conducting de- Viee, One possibility is to use a driven bridge having the input waveforms of Figure 11. In the circuit of Figure 12, n simple inverters con- nected in series divide the supply voltage equally so that each device is required to withstand v, ~ 2(¥C0) ‘The magnetic circuit requires that the voltage divide equally among the series stages. Each of the basic approaches summarized above has a unique combination of advantages and disadvantages ‘which should be considered in light of the design re- quirements, cc ‘URE 12 emus CONNECTED INVERTERS FOR HHINVERTER SPECIFICATIONS Some inverter characteristics which may be of im= portance to various applications are listed in Table 1 It is the function of the inverter specifications to indl- cate which are important to the use intended, and to state via tolerances how critical each of these 1s ex- pected to be. Obviously, the more characteristics ‘simultaneously required and the tighter the tolerances, the more difficult and costly the design will be. In the absence of specifications requiring emphasis on other characteristics, inverters are usally designed for highest eiciency. Achievement of very precise fre- queney and output performance, ete, 1s usually at the expense of efficiency as well as circuit simplicity. Input voltage: range and nominal ‘Output power Output vottage Output frequency accuracy | Regutation of output voltage and frequency vs, Toad and input voltage Load power factor Output waveform Harmonie distortion of output, if sinusoidal, vs, load, power factor, input voltage. Overall efficiency vs. loading Operating environments (temp., ete.) Size and Weight Protection required (as against shorted output, ‘reversed polarity input, ete.) INVERTER DESIGN FUNDAMENTALS. Discussion and sample design of @ basic one- transformer inverter should serve to ilustrate basic design fundamentals. Assume the following specitiea- fiona are to be moti ouput power Pp = 100 watts, [ee| 4 resistive load, =12.5 volts, Vayy = 118 volts rms, 60 eps, into ‘The popular common-emitter circuit of Figure 1a was chosen for the example. The common-base circuit of Figure 1b is advantageous with low voltage input supplies, but the feedback windings must carry the high current of the emitter, Common-collector circuits permit direct collector to heat-sink mounting, INVERTER TRANSISTOR SELECTION Since much of inverter design is influenced by the performance characteristics of the transistor selected, itis desirable to make transistor choice at the outset. ‘Transistor parameters important to inverter applica~ tone are summarized in Table II, Selector guides such as Figure 18, and manufacturers" semiconductor data manuals are helpful in making the transistor selection.! ‘The transistor type selected must be capable of Pin _ Po Geen where Voc Woo} n is overall inverter efficiency. The transistor must nave collector-emitter breakdown in excess of the “off” voltage, which 1s approximately twice supply voltage Voc. Additionally, a margin of safety should be applied to Slow for voltage transients from leakage inductance, transients of input voltage, ete. Device surge rating three times supply voltage is a reasonable rule of thumb, The transistor must have sufficient safe oper- ating area that operating load lines are well within ‘maximum collector current I TABLE I= INVERTER TRANSISTOR SELECTOR CRITERION ?, a nat ‘nas fe 9g) | BVog5) Yue? Ye * felt Transents "8 ¥ce ‘Adequate safe operating area (as a preliminary chotee assume I, 2.5 Vog, 254860) tom Verieat) * Ie Adequate gain at Ig = Ig; (if possible, rapia ' falleotf of gain with Increasing Ig above Io) ep Fast avitehing response (high {) BVppo > Vp oF Mlode clamped E-B voltage Low collector leakage at Veg: = Vina | thermat adequacy: Useful parameter values at operating junction temperature T5, one sn Pare” ene * has) were T= anblest tmp, cane to st stk | ta "RS "thermal resistance sng “HEH snk to ambient thermal resistance Cost Size and weight Availability Adequate environmental eapabilit perature, moisture, etc.) (shock, tem- see Motorola Semiconductor Data Manual, Section 6, "Power Transistors” 1965.MN FREQUENCY I VERETER TRARSITORS (10 KE = 50K "TRANSHTON VOLTAGE RATING Oar /AGURE 13 — TYPICAL TRANSISTOR seiecToR GuiDe 8 device capabilities.2 As a preliminary selection cri ton aspen ey Fox 28 Yoo Inverter transistor power losses limit overall in- verter efficiency. Factors influencing these losses ‘Should be a transistor selection criterion. Transistor losses normally consist primarily of collector dis pation i, - Vop shown schematically in Figure 14 "On" dissipation VcE (sat) + Iofon) and “oft” dissi- pation Vp - Iog are uaually low, 2nd switching losses Predominate, especially at high frequency. Switching Toad lines for inverter transistors and switehing power losses are summarized in Figure 15. Inverter transistor efficiency is maximized by high hp, 1o¥ Vegi: £88 Switehing response, and low leakage in the off condition. Additional transistor selection considerations include thermal adequacy, BV BO high enough to sustain feed back reverse bias or a clamped emitter-base reverse voltage, transistor size, weight, and cost. The choice between silicon or germanium transistors is easentially covered by the criterion above. In general, silicon transistor inverters are more temperature stable than germanium inverters and can be operated at higher temperatures, bat silicon transistors are usually more expensive than germanium devices and have higher Vegiaaty’ Many silicon transistors have low BV ‘The general groups of transistor characteristics desirable in inverter applications are not entirely com= patible in practical transistors. High gain and low Veg(sat)» fast switching response, high voltage, and extensive device safe area are compromised in device design, Each is achieved at some expense to the others, and emphasis of one or two parameter groups seriously detracts from the remaining groups. While (6) tow Frequency, (0) High foqueney LHOURE, 14 — TYPICAL INVERTER WAVEFORMS FOR LW PURE Fan anstoronS OF 06 T0.AE MVERTERS. *se¢ Greenburg, Ralph “Determing Maximum Reliable Load Lines for Power Transistors. " Application Note ANIST-R, Dept. ‘TIC, Motorola Semiconductor Products Tne., Phoenix, ‘Arizona. Motorola Semiconductor Data Manual, page 6-8, Motorola, Ine. Phoenix, Arizona, 1965.{ABLE i — 1mpoRTANT 2N1558 PARAMETERS PAP T0.2 (GERMAN POWER TRANSISTORS ‘Maximum Continuous Collector Current: 15 Collector Junction Temperature: 68 to «11020 Thermal Resistance, #4, 0.8°C/W ma. BY ops lip = ~200 ma) 45 voits min, lepo Wen * 4) 3.0 mA max. Tepo Wep 7-12) 0.5 ma max. bpp Wg = “IA, Vog = -2V) 0-100 0.7 ¥ max, Vg Og = 10 AT = -1a) Vopieay Fg" IA Tg ==1A) 0.5. V max Bp Ug ~-10A, Vog = -2¥) 12-40 mhos ‘Switching times in circuit below: osut * see typical tt ty 10 msec typical . 19) eet |avLS 5 usec typical wr 28 wsee typical ‘COLLECTOR CURRENT ‘COLLECTOR EMITTER VOLTAGE TYPICAL SWITCHING LOAD LINES FOR TRANSISTORS, | SRITCHING LOSSES FOR THE ABOVE LOAD LINES ARE | GIVEN EY THE FOLLOWING RELATIONSHIPS, 1, = switching tine (ie tie or fll) f= frequency 1 = 2/9 Vila yf where peak power oscars @ ty 2 ty VON 9.95 29.V iF whe ps pve occ @ 1 Pao D bt IOURE 15 — SUMMARY OF TRANSISTOR SWITCHING POWTER LOSS, ook power occur typ ror complete data including design curves and safe operating area, see Motorola Semiconductor Data Mam Section 6 pp 52-85, this view is grossly oversimplified, it 1s useful to in dicate that each transistor type available on the market represents one of many possible compromises between esirable parameters. “The inverter designer must choose that compromise best suited to his particular application. From the number of available power transistors which could have been chosen, 2N155B was selected for the example under consideration. From the important inverter design parameters of 2N1558 summarized in| ‘Table Il, it may be seen that this transistor type well satisfied the selection criterion discussed above, and 1s well specified at the anticipated operating current Ig7 wad Given output power Py = 100 watts, let us assume an overall eticteny + ay 80%. Then input power ® P Pi," Gee 125 watts, Primary current! = ¢" -10.0. 7 evar 2NI558 pg (lg ~ -10 A, Veg = -2 V) is 50 to 100 50 a ‘minimum gain 2N1SS8 will require Ip = -200 mA for Ig = -10 A. However, additional base current is de- sirable to drive the transistor well into saturation, sven ag gain changes with temperature and transistor aging. Increased base current reduces Vogigat) 04 transistor turn-on time, but increases base cirouit dissipation and transistor turn-off time. The correct overdrive for optimum elticiency is therefore a rather complicated function which will have to be uniquely termined for each transistor type and operating cur~ rent level, Forced gain of the cireuit should usually be Jess than half of minimum device gain, Setting », fb. PrE(min) i, eaves ty 400 ma, It 1s noteworthy that maximum collector current upon transformer saturation 8 Ip hp. Magnetization eur~ rent spikes will, therefore, be ininimum if the tran- Sistor galn, hipp falls off rapidly with Increasing col- lector current Hibove the operating current 1. This characteristic is shown in Figure 16. 2niss8 * hpg characteristic 6 0A Teoel hee characteristic guRe 16 — compnatson or 242558 Ss. TH IDEAL Giant Biche FOR RVEATER TRANSISTORINVERTER TRANSFORMER DESIGN ‘Transformer design or selection is the next con sideration. In a one-transformer inverter such as this, example, the transformer determines frequency as well as output and feedback voltages. To accomplish this with acceptable transformer effictency is the essence of the design problem, From the transformer equation of page 3, inverter vx 108 srequeney f= cps where effective cross ’s AN Sectional area A of the core includes allowance for stacking factor of laminated or tape-wound cores. Given Vp and £, Ny is determined by this equation as 4 Core selection is somewhat arbitrary, but must allow enough turns for good coupling and enough window area for the required windings. Additionally, core selection should provide minimal hysteresis and eddy-current losses.9. For good efficiency, these core losses should bbe coniparable in magnitude to resistive losses of the windings, Also influencing core choice are cast, size and weight of the overall transformer. ‘Tape wound toroids of 50-50 nickel-iron® are cellent cores for inverter applications. This material hhas high jg, square hysteresis loop, low core loss, and is little effected by temperature over the useful tem- perature Fange of transistors. ‘Torolds, properly wound, five very close coupling which is desirable in inverter transformers. C-cores and E, U, and T cores of good ‘square loop material are also popular. Once & tentative core selection has been made, Ypxiot VM Ye Nye tigar Mat ES a8 yee where ky and ky are multipliers to compensate for transformer voltage drops and losses. ky ~ kp ~ 1.05 to 1.10 is a reasonable first assumption. In determining Vg for required output power, it stould be noted that for a square wave Vo ="Vooay * Maye = Vome)> pp) must be greater than tranaistor Vipin the on condition, but must be less than BVppo, uiless transistor reverse Vpg i clamped. With Ven * Vpp the circuit per- formance 18 highly dependent upon transistor and tem- perature, High Vp and a series base resistor Vpp - a sg tn fe qventiy improves transistor turn ott = sepecily at a speed-up capacitor is used across Rp’ - but losses in Fi are direct” proportional to Vege For many power Ilertes Ven om the andor of $i gives ndcqate ase drive debinty and contol witout exceeding rea fontle sipation loses The’ remaunder of transformer design consists of deurmining nlequie wire sles for the wintngs, hci it of te wunaigy te aval core wap area® and determination of winding IR drop and 2R- Iosses, cove. loser, cvorallelliency and vallage Minos. eaulermer desig procelure ncluieg Satod structions. for these lst mae stp Is ell summarized in a number of electronic data handbooks.9 Wine site is ugly eateuates ow the Bais of 100 to 1000 circular mils per amp,10 Duly syele should be pple to peak winding curent to obtain the average eurvent for purposes af wire size Chealation For the example ander Constaeration Ny, 00 wat Nand My carry currents of fg = 10 A= 409-2208 an ty 400 mA respectively, with duty eyclea of 508, ite? a soe on the basis of 1000 iver mils per amp” wire Of Ng Np andy sould be 8000, 610, and 300 ‘clrcuiar milli or the examples ele itn of tal wind arene met be recpaed that there. are avo eth Ny and Ny wndingss Forts Skimplaswarearen hy =/bNsay 1 Nya r BigAganere Behe! ‘and Ag afe the Teebpectite? crossSedetional has 3 the wird in each wing, intting elation, Bile or tiller winings are fecommented for close coupling Transformer efficiency and wltage regulation may (sat oa) 810 ore (ran )+(sgeee) (ies ob G4) 6G" % RL R, are resistances of primary and secondary windings. reduces sensitivity to V, ‘be determined from 9 = where R, and Several design attempts may be needed to achieve a core and winding combination which will provide the required frequency and voltage relationships with ac ‘ceptable efficiency. Finally, all assumptions made uring the desiga must be checked, and adjusted if necessary. 11 Styoteresis loss (ideal) a P20 max)? Wend px 1918 ‘= resistivity of the material Bady current Joss (ideal): P, = 3 Po fH, «1077 Mem? where W, ‘whore ¢ = qh sfisas exgs/em® cycte for square loop material thickness of individual ux carrier laminations 50-50 nickel-iron is sold commercially as Orthonol, Deltamax and Hypernik V. ‘speed-up circuits are discussed on page 12. The ratio of wire area to available window area is the winding factor. Winding factor of 0.4 indicates good fit for a toroidal core. Higher “ideal” Winding factors apply to cores having rectangular windows. For example, See 1.7.7, Reference Data for Radio Engineer, Chap. 11 or Radiotron Designers’ Handbook, Chap. 5. 1ror current density as a function of output power, see 1... Reference Data for Radio Engineers, page 274 ‘eommereial transformers for one-transformer inverters are available for a variety of standard Vogy f, P, V,, combinations. See Saladin, Power Inverter Circuits Using Off-the-shelf Components. Motorola Semiconductor Products Inc., Dept. TIC. Jd ‘Application Note" ANI34,-10- With the addition of Rp to the feedback circus basic design is completed. However, two additional considerations which should receive design attention are starting circuits and speed-up circuits. In the interest of simplicity these topics were not previously TABLE Wy — TRaNsroRMeR oESICN FoR ORE FadnsrORER RENTERS 15 a transformer commercially available which will o the job? Core material should have square hysteresis loop, high, low losses. Windings should have 100 to 1000 circular mils per amp. Wire area | ee SE = Od for torolds, 0.7 to 0.8 for | Window area “rectangular windows | Core losses = IPR winding losses Watts out «100 Erticteney » = Mattsou Voltage regulation v abe Gn] f.- G)e) v, TR | J Use bifilar oF trifilar windings for close coupling. Cheek thermal aspects of transformer operation, iscussed since they are not essential to basic theory fof operation, but they are necessary in practical in- verters. INVERTER STARTING CIRCUITS Im general, the basic circuits of Figure 1 and their derivatives including basic two-transformer inverters will not oseillate readily unless some means is pro- idea to begin oscillation, This 18 especially true at {ull load and low temperature, the most severe starting requirement for resistive loads. The discussion of basic inverter operation assumed that one of the tran- sistors was conducting —a condition resulting in oseil- lation. To assure this condition 1s the function of the starting circuit (6) Sipe resistive salf-stating eircit wit (6) Diode sltstortng circuit (0) Borie conmon-amitar inverter 0) Cros-coupledf cuit with fdvidual storing ack capacitors fof spe0d-up mechoniem for common ‘eee (6) Comnon-collactor invorter with FIGURE 18 ~ SPEEDUP CIRCUITS FOR TRANSISTOR INVERTERS,A simple, commonly used starting circuit is shown schematically in Figure 17a. In this circuit Ry and Ro form a simple voltage divider to bias the transistors 10 conduction before oscillation starts, A good rule of thumb for the base starting bias developed by this circuit is to use 0.9 volts for germaniumtransistors and R, Voy ROR, ‘Since Ry occurs in the feedback circuit in series with the bast of each circuit half, R, must not exceed Ven ~ Yep b Ry and Rp are uniquely determined for any given start= ing bias.” The value of Rg may be adjusted if starting characteristics are sot Satisfactory. ‘This. straight forward starting technique 1s advantageous 1n that only resistor components need be added to the circuit, but has the disadvantage of additional power dissipation, which may become excessive in high power cireuite, 0.8 volts for silicon. This voltage V, B UR, is set equal to Rp, then ‘An improved but somewhat ‘more costly starting circuit is shown in Figure'17.1L This circuit requires less dissipation than its resistance counterpart and is, less temperature dependent. Operation is similar to the resistive case, but when power is first applied the bases of the transistors are driven negative by full supply voltage and oseillation starts rapidly. Inverter loads such as capacitive filters, starting motors or incandescent lamps may temporarily present extremely high loads during the starting period, Starting requirements of such loads are often somewhat simpli~ ‘Hed by using a driven inverter, and this approach may be preferable to the circult complications needed to assure self-oscillation. INVERTER SPEED-UP CIRCUITS Inverter speed-up circuits improve transistor switeh= ing and inverter efficiency. Improved switching is especially important at higher frequencies (See figure 14), A common speed-up method is to add a capacitor to the circuit. The circuits of Figure 16 usually produce improved switehing waveforms.12 ADDITIONAL DESIGN CONSIDERATIONS, Finally, it must be determined whether esreuit modi- tieations are desirable and necessary t0 protect against inverter damage due to output overload or short circuit, Snput transients, input polarity reversal, ete, Shorted output causes cessation of inverter oseillation, but Intermediate overload may cause transistor fatture. Undesirable collector-emitter voltage spikes eased by Input voltage transients or high transformer leakage inductance may be protected against by zener diodes connected collector-to-emitter. Despiking may also be accomplished by a series resistor and capacitor across the full primary winding or between collector and base fof each transistor, but these arrangements slow tran- sistor switching. WC the transistors will not sustain reverse voltages resulting from input polarity reversal, protection may be provided by a diode in series with the input terminals. Since diode drop loss detracts from efficiency whea the inverter operates properly, the lower dissipation circuit of Figure" 19 may be preterable, -u- TABLE V— SUMMARY OF BASIC ONE-TRANSFORMER DESIGN Given oF assumed: fcc Vout” Design formula: P, ~ 20 Pin 1” Yoo Transistor selection (rable m) 1 2 1, - + overdrive =P PE (min) APE (min) ‘Transformer design or selection (Table 1V) v, x10 fi san, % Yep Yep ® BV ppo (use 3+ volts for Veg) Ven - Ye; n, . SEB DYER ‘a RY, fi 1 “oe Starting circu: For figure 17a Vy = q—€! 1B (Recommended V, 0.8 V for silicon) 0.3V for germanium, ‘Operational Tests: starting Waveforms (speed-up circuits) Speed-up Circuit | | Transistor operating temperature and load lines i ‘Transient operation. FIGURE 19 — REVERSE POLARITY PROTECTION WITH BASE CONTROL She aes ga "Roddam, Chapter 8 discusses some fifteen significantly different starting circuits, as well as common-collector cireuit starting characteristics. See Bibliography. "For additional speed-up circuits including speed-up transformer windings, see Lloyd.-12- When the inverter is constructed, its performance characteristics should be checked against the design. ‘Thermal operation and transistor Io v8. Vc load dines should be checked, including load lines with maxi ‘mum anticipated input transients Desig procedures for the basic one-transformer transistor inverter are summarized in Table V. Design of two-transformer transistor inverters re~ quires procedure very similar to that of the one transformer cireuit, except that frequency is deter- mined by primary voltage of the saturating drive trans- former. The output transformer should oscillate at a frequency at least 10% lower than the inverter- ‘requeney-determining drive transformer. ‘SINUSOIDAL OUTPUT INVERTERS ‘The basie inverters discussed heretofore have output frequency and voltage directly proportional to supply voltage. Output is square wave. "For sinusoidal output, for for very tightly controlled frequency or output voltage regulation, the inverter must be modified from this basie cireuit, Sinusoidal output is required for gyro instruments and in some other applications. Obtaining undistorted Sinusoidal output at high efficiency is difficult at best, dnd is further complicated at high power levels and low frequencies. Tuning and/or filtering the output of a basic inverter are straightforward approaches to reall- zation of sinusoidal output, Practical circuits similar to those of Figures 20 and 21 have been used to achieve very low distortion sinusoidal outputs with efficiencies uw to 80% at moderate power and fairly high fre- quencies.15 Notice that inductor Lz is added in serie with the supply to folate the supply and to absorb voltage swing of the primary due to the tuning or fil- tering. At extremely high supply currents, Lp becomes Dally and expensive, and protective zener diodes be- tween the collector-and-emitter of each transistor may be preferable to Ly, [RGURE 20 ~ TYPICAL TUNED OUTPUT OSCILLATOR CHRCUTT. & co FIGURE 21 ~ FILTERED OUTPUT BASIC INVERTER. *50 Baxandall: “Transis 1¢ Wave LC Oscillators” Proceedings 1. EE, For tuned circuits such as Figure 20 with high loaded @ of the tuned clreult and Ly sufficiently high to provide ‘essentially constant “on” current, the relatively high efficiency waveforms of Figure 22 are attainable, This has been referred to as Class D operation.!4 seit oscillating tuned Class C oscillators are another tuned ‘output possibility. For low power and/or high frequency, filtering is 1 good approach to attaining sinusoidal “inverter out put, but here again reactive component values become unwieldy, at high power and low frequency, and filter losses become significant, Conventional filter design applies, except that the converter may not operate properly if the filter input presents large inductive OF capacitive loads. This 1s due to capacitive loading, 4 ‘ce ec ‘Bguee 22 — TeaNsisroR WAVEFORMS OF “CLASS p OPERATION EEIMNED BY Badan DAL TO OscALATOR OF HeUHE AL TS @ ai 2m TT Ve ©) “iesion bod be T 1. —], J, a (o) _ ot iy a mt TOCOUT WAVEFORMS OF REDUCED HARMONIC CONTENT. @ 1008 pp 148-758 (1959) M4, ‘see Baxandall: Ibid, pp 751-752. Baxandall also discusses a “Voltage Switching Oscillator” which provided ex- cellent 1.4W sinusoidal output at 45 ke with 85% efficiency. *Spaxandall: Ibid, pp 7543 or to inductive voltages reflected back into the primary. For good filtering, the series output inductor of Figure 21 oF of a constant k or mederived filter will probably be sufficiently high, that unleas series tuning at the fan~ damental frequency is employed its reactive voltage drop will be appreciable. Transformer secondary voltage and current must be designed adequate to offset voltage drops and loading affects of the output filter. [At frequency and power such that only limited effi- clency 18 achieved with tuned oF filtered output oF where reactive component size, weight or costs are prohibitive, the 78.5% theoretical maximum stage effi- elency of a Class B driven sinusoidal output becomes reasonably attractive. This is especially true if load independence, and the frequency stability, and control of the driven inverter are advantageous. ‘The master- oscillator driven power-amplifier approach is common in precision frequency sinusoidal inverters, ‘Among the more sophisticated approaches to high efficiency sinusoidal inverter power are stepped waves, hotched” waveforms, and high-frequency pulse- ‘modulation, all followed by filtering of greatly reduced requirements, The stepped waves of Figure 23a and 23p have no harmonies below the {ith and eleventh, Fespectively. These stepped waveforms are perhaps ‘most efficiently realized by parallel inverters which are phase related,!7 or which are master control triggered.!® The notched wavetorm of Figure 28¢ can bbe used to nullify all third and fifth harmonics at some finerease in higher, more easily filtered harmonies.19 A driven output in Switching mode is an efficient means fof achieving such a notched system, . Modulation tech= riques such as the pulse-width modulation cireuit of Figure 28d_and Figure 24 have been used to achieve good efficiency at high power and low frequeney with ow size and weight.20 These more sophisticated sys- tems may readily be seen to achieve their advantages only atthe cost of circuit complication and are probably justifiable only if sinusoidal output is absolutely neces- ‘ary and a simpler approach is inadequate PRECISION FREQUENCY INVERTERS Tape recorders, phonographs, clocks, etc, are among the few applications which require reasonably close inverter frequency control. Frequency accuracy of about 5% may be achleved by adding regulation to the feed- back clreult. Regulating feedback transformer primary voltage in the two transformer inverter is fairly simple. For better frequency accuracy a separate frequency source ig usually used to synchronize or drive the basic inverter.21 Another possible approach is to control frequency by external voltage or controlled feedback voltage using multiple core transformers.22 This technique also may be used to obtain variable fre- ‘quency, and offers several advantages a2 a voltage to frequency converter. INVERTER VOLTAGE REGULATION Inverter output voltage regulation is improved by regulation of the input supply voltage and low output impedance design, but for very good output regulation lover a wide range of loading output regulation eireuitry may be necessary. Series pass regulation of input voltage is a popular approach. Pulse width modulation and magnetic amplifier control of the output are also promising regulation techniques for inverters, MULTIPHASE INVERTERS Systems of combined single inverters offer advantage in some applications. Inverter systems are frequently used to obtain 2-phase and S-phase output. A typical S-phase inverter is the oscillator and amplifier of Figure 25. The 3-phase oscillation are ‘supplied by an oscillator R-C coupled so that 120° phase Gifference exists at the collectors of the 2N651 tran- Sistors. An emitter-follover amplifier drives the ‘output power transistors, The power transistors are operated in saturated awitehing mode. 400 He cxorrer “ sunt vive pls pune oe wor ice sine wave RERERENCE aot, FGURE 24 ~ BLOCK ORIE OF BRIDGE CHOPPER INVERTER. 1, Rodamm 208-220 is are greatly reduced when sinusoidal output replaces square wave output, *saiters, “A High Power D.C.-A.C. Inverter with Sinusoidal Output” diags. Electronic Engineering 38: 586-91 Sept., 1961. Describes system for generation of Figure 24> waveforms using SCR inverters. 'puenbull, "Selected Harmonic Reduetion on Stati DC-AC Inverters” diags IEEE Transactions on Communications and Electronics 83: 374-8 July 1964, 20, ‘Morgan, "Bridge Chopper Inverter for 400 eps Sine Wave Power” IEEE Transactions on Aerospace Volume 2 Number 2 April 1964 993-997 describes a bridge chopper inverter which uses pulse width modulation to achieve 85% efficiency at 100 watts sinusoidal output. ®ipranam "Satie Inverter Design Considerations” diags. Electronics 35:59-60 Ocyober 26, 1962. 2ororling, et al "Multiple Cores Used to Simulate a Variable Volt-Second Saturable Transformer for Application ‘im Seli-Oseillating Inverters” IEEE Transactions on Communications and Electronics 83:288-94 May 1964,‘An alternative S-phase inverter approach uses Hartley oseiliator driven {ip-flops to supply control signal for the three phases in proper rotation, while still another practical circuit consists of a master push-pull stage and two phast id driven stages.29 A three-legged autotransformer may be incorporated in the output to provide exact 120° phase spacing if the three voltages fare equal. Extreme unbalance of phase load may necessitate feedback control. It is to be noted that Some inverters may be used for one-phase and 3-phase Toads simultaneously providing the capacity of the phase also carrying the single phase load is not exceeded, 23 Roddam 205-216 -14- CONCLUSIONS Transistor inverters provide many advantages in conversion of d.c. power to ac. The basic two- transistor, one-transformer design has excellent ef- fleteney and performance, but at power in excess of 100 watts or if precise frequency is required, the two- transformer design is advantageous. Design’ require ments are dictated by inverter specifications, and ‘modifications to the basic circuit probably will be necessary to achieve sinusoidal output or precisely controlled frequeney or output voltage, For very com= plex requirements, inverter systems may be advan~ tageous, > PHASE 2 OSCILLATOR PHASE 1 ane. 10193] 3 PHASE 2 2Naei4 I [es 2naei 3 Ty = PRIMARY 24 V CT SECONDARY 115 .V LOAD CAN © 20082 to IK ® (PER PHASE) FIGURE 25 - 20 WATT 3.PHASE INVERTER, 12VOLT DC TO 1154OLT 40OHE AC