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Finite-state machine

State machine redirects here. For innite state ma-

chines, see State transition system. For fault-tolerance Push Coin
methodology, see State machine replication.
SFSM redirects here. For the Italian railway company, Un-
Locked locked
see Circumvesuviana.
Finite Automata redirects here. For the electro- Push Coin
industrial group, see Finite Automata (band).
Classes of automata
State diagram for a turnstile
A nite-state machine (FSM) or nite-state automa-
ton (FSA, plural: automata), nite automaton, or sim-
ply a state machine, is a mathematical model of compu-
tation. It is an abstract machine that can be in exactly one
of a nite number of states at any given time. The FSM
can change from one state to another in response to some
external inputs; the change from one state to another is
called a transition. A FSM is dened by a list of its states,
its initial state, and the conditions for each transition.
The behavior of state machines can be observed in many
devices in modern society that perform a predetermined
sequence of actions depending on a sequence of events
with which they are presented. Examples are vending
machines, which dispense products when the proper com-
bination of coins is deposited, elevators, whose sequence
of stops is determined by the oors requested by riders,
trac lights, which change sequence when cars are wait-
ing, and combination locks, which require the input of
combination numbers in the proper order.
The nite state machine has less computational power
than some other models of computation such as the
Turing machine.[1] The computational power distinction
means there are computational tasks that a Turing ma-
chine can do but a FSM cannot. This is because a FSMs
memory is limited by the number of states it has. FSMs
are studied in the more general eld of automata theory.

1 Example: coin-operated turn- A turnstile

customer passes through, the arms are locked again until
An example of a mechanism that can be modeled by a another coin is inserted.
state machine is a turnstile.[2][3] A turnstile, used to con- Considered as a state machine, the turnstile has two pos-
trol access to subways and amusement park rides, is a gate sible states: Locked and Unlocked.[2] There are two pos-
with three rotating arms at waist height, one across the en- sible inputs that aect its state: putting a coin in the slot
tryway. Initially the arms are locked, blocking the entry, (coin) and pushing the arm (push). In the locked state,
preventing patrons from passing through. Depositing a pushing on the arm has no eect; no matter how many
coin or token in a slot on the turnstile unlocks the arms, times the input push is given, it stays in the locked state.
allowing a single customer to push through. After the Putting a coin in that is, giving the machine a coin in-


put shifts the state from Locked to Unlocked. In the

unlocked state, putting additional coins in has no eect;
that is, giving additional coin inputs does not change the
state. However, a customer pushing through the arms,
giving a push input, shifts the state back to Locked.
The turnstile state machine can be represented by a state
transition table, showing for each possible state, the tran-
sitions between them (based upon the inputs given to the
Fig. 1 UML state chart example (a toaster oven)
machine) and the outputs resulting from each input:

The turnstile state machine can also be represented by a

directed graph called a state diagram (above). Each state
is represented by a node (circle). Edges (arrows) show
the transitions from one state to another. Each arrow is
labeled with the input that triggers that transition. An in-
put that doesn't cause a change of state (such as a coin
input in the Unlocked state) is represented by a circular
arrow returning to the original state. The arrow into the
Locked node from the black dot indicates it is the initial

2 Concepts and terminology

A state is a description of the status of a system that is
waiting to execute a transition. A transition is a set of ac-
tions to be executed when a condition is fullled or when
an event is received. For example, when using an audio
system to listen to the radio (the system is in the radio
state), receiving a next stimulus results in moving to
the next station. When the system is in the CD state,
the next stimulus results in moving to the next track. Fig. 2 SDL state machine example
Identical stimuli trigger dierent actions depending on
the current state.
state (e.g. C). The complete actions information is not
In some nite-state machine representations, it is also directly described in the table and can only be added us-
possible to associate actions with a state: ing footnotes. A FSM denition including the full actions
information is possible using state tables (see also virtual
an entry action: performed when entering the state, nite-state machine).

an exit action: performed when exiting the state.

3.2 UML state machines

The Unied Modeling Language has a notation for de-

3 Representations scribing state machines. UML state machines overcome
the limitations of traditional nite state machines while
For an introduction, see State diagram. retaining their main benets. UML state machines in-
troduce the new concepts of hierarchically nested states
and orthogonal regions, while extending the notion of
actions. UML state machines have the characteristics of
3.1 State/Event table both Mealy machines and Moore machines. They sup-
port actions that depend on both the state of the system
Several state transition table types are used. The most and the triggering event, as in Mealy machines, as well
common representation is shown below: the combination as entry and exit actions, which are associated with states
of current state (e.g. B) and input (e.g. Y) shows the next rather than transitions, as in Moore machines.

in many dierent areas, including electrical engineer-

state 1 ing, linguistics, computer science, philosophy, biology,
opened mathematics, and logic. Finite state machines are a class
of automata studied in automata theory and the theory of
E: open computation. In computer science, nite state machines
door are widely used in modeling of application behavior, de-
sign of hardware digital systems, software engineering,
compilers, network protocols, and the study of computa-
transition tion and languages.

open 5 Classication

transition condition Finite state machines can be subdivided into transducers,

acceptors, classiers and sequencers.[4]

5.1 Acceptors and recognizers

E: close
entry action door 1 2 3 4
Start n n_found i i_found c c_found

Fig. 3 Example of a simple nite state machine

not_n not_i not_c not_e e

3.3 SDL state machines 6


The Specication and Description Language is a standard

from ITU that includes graphical symbols to describe ac-
tions in the transition:
Fig. 4 Acceptor FSM: parsing the string nice

send an event Acceptors, also called recognizers and sequence detec-

receive an event tors, produce binary output, indicating whether or not the
received input is accepted. Each state of an FSM is ei-
start a timer ther accepting or not accepting. Once all input has
been received, if the current state is an accepting state,
cancel a timer the input is accepted; otherwise it is rejected. As a rule,
start another concurrent state machine input is a sequence of symbols (characters); actions are
not used. The example in gure 4 shows a nite state ma-
decision chine that accepts the string nice. In this FSM, the only
accepting state is state 7.
SDL embeds basic data types called Abstract Data
A (possibly innite) set of symbol sequences, aka. formal
Types, an action language, and an execution semantic
language, is called a regular language if there is some Fi-
in order to make the nite state machine executable.
nite State Machine that accepts exactly that set. For ex-
ample, the set of binary strings with an even number of
3.4 Other state diagrams zeroes is a regular language (cf. Fig. 5), while the set of
all strings whose length is a prime number is not.[5]:18,71
There are a large number of variants to represent an FSM A machine could also be described as dening a language,
such as the one in gure 3. that would contain every string accepted by the machine
but none of the rejected ones; that language is accepted
by the machine. By denition, the languages accepted by
4 Usage FSMs are the regular languages; a language is regular
if there is some FSM that accepts it.
In addition to their use in modeling reactive systems The problem of determining the language accepted by a
presented here, nite state machines are signicant given nite state acceptor is an instance of the algebraic

path problemitself a generalization of the shortest path

problem to graphs with edges weighted by the elements opened
of an (arbitrary) semiring.[6][7][8]

sensor opened

4 2
opening closing


sensor closed

Fig. 5: Representation of a nite-state machine; this example

shows one that determines whether a binary number has an even
number of 0s, where S1 is an accepting state.
Fig. 6 Transducer FSM: Moore model example
The start state can also be an accepting state, in which
case the automaton accepts the empty string.
The entry action (E:) in state Opening starts a mo-
An example of an accepting state appears in Fig.5: tor opening the door, the entry action in state Clos-
a deterministic nite automaton (DFA) that detects ing starts a motor in the other direction closing the
whether the binary input string contains an even number door. States Opened and Closed stop the mo-
of 0s. tor when fully opened or closed. They signal to the
S 1 (which is also the start state) indicates the state at outside world (e.g., to other state machines) the sit-
which an even number of 0s has been input. S1 is there- uation: door is open or door is closed.
fore an accepting state. This machine will nish in an
accept state, if the binary string contains an even number
sensor closed
of 0s (including any binary string containing no 0s). Ex- 1 2
amples of strings accepted by this DFA are (the empty opened closed
string), 1, 11, 11, 00, 010, 1010, 10110, etc I: I:

sensor opened

5.2 Classiers
Fig. 7 Transducer FSM: Mealy model example
A classier is a generalization of a nite state machine
that, similar to an acceptor, produces a single output on
Mealy machine The FSM uses only input actions, i.e.,
termination but has more than two terminal states.
output depends on input and state. The use of a
Mealy FSM leads often to a reduction of the num-
ber of states. The example in gure 7 shows a
5.3 Transducers
Mealy FSM implementing the same behaviour as in
the Moore example (the behaviour depends on the
Main article: Finite-state transducer
implemented FSM execution model and will work,
e.g., for virtual FSM but not for event-driven FSM).
Transducers generate output based on a given input There are two input actions (I:): start motor to close
and/or a state using actions. They are used for control the door if command_close arrives and start mo-
applications and in the eld of computational linguistics. tor in the other direction to open the door if com-
In control applications, two types are distinguished: mand_open arrives. The opening and closing
intermediate states are not shown.

Moore machine The FSM uses only entry actions, i.e.,

output depends only on the state. The advantage 5.4 Generators
of the Moore model is a simplication of the be-
haviour. Consider an elevator door. The state ma- Sequencers, or generators, are a subclass of the accep-
chine recognizes two commands: command_open tor and transducer types that have a single-letter input al-
and command_close, which trigger state changes. phabet. They produce only one sequence which can be

seen as an output sequence of acceptor or tranducer out- For both deterministic and non-deterministic FSMs, it
puts. is conventional to allow to be a partial function, i.e.
(q, x) does not have to be dened for every combina-
tion of q S and x . If an FSM M is in a state
5.5 Determinism q , the next symbol is x and (q, x) is not dened, then
M can announce an error (i.e. reject the input). This is
A further distinction is between deterministic (DFA) useful in denitions of general state machines, but less
and non-deterministic (NFA, GNFA) automata. In a useful when transforming the machine. Some algorithms
deterministic automaton, every state has exactly one tran- in their default form may require total functions.
sition for each possible input. In a non-deterministic au-
tomaton, an input can lead to one, more than one, or A nite state machine has the same computational power
no transition for a given state. The powerset construc- as a Turing machine that is restricted such its head may
tion algorithm can transform any nondeterministic au- only perform read operations, and always has to move
tomata into a (usually more complex) deterministic au- from left to right. That is, each formal language accepted
tomata with identical functionality. by a nite state machine is accepted by such a kind of
restricted Turing machine, and vice versa.[14]
A nite state machine with only one state is called a com-
binatorial FSM. It uses only input actions. This concept
A nite state transducer is a sextuple
is useful in cases where a number of nite state machines
(, , S, s0 , , ) , where:
are required to work together, and when it is convenient
to consider a purely combinatorial part as a form of FSM is the input alphabet (a nite non-empty set
to suit the design tools.[9] of symbols).
is the output alphabet (a nite, non-empty
set of symbols).
6 Alternative semantics
S is a nite, non-empty set of states.
There are other sets of semantics available to represent s0 is the initial state, an element of S . In a
state machines. For example, there are tools for mod- nondeterministic nite automaton, s0 is a set
eling and designing logic for embedded controllers. [10] of initial states.
They combine hierarchical state machines (which usually is the state-transition function: : S
have more than one current state), ow graphs, and truth S.
tables into one language, resulting in a dierent formal-
is the output function.
ism and set of semantics.[11] These charts, like Harels
original state machines,[12] support hierarchically nested
states, orthogonal regions, state actions, and transition If the output function is a function of a state and input
actions.[13] alphabet ( : S ) that denition corre-
sponds to the Mealy model, and can be modelled as a
Mealy machine. If the output function depends only on
a state ( : S ) that denition corresponds to
7 Mathematical model the Moore model, and can be modelled as a Moore ma-
chine. A nite-state machine with no output function at
In accordance with the general classication, the follow- all is known as a semiautomaton or transition system.
ing formal denitions are found:
If we disregard the rst output symbol of a Moore ma-
chine, (s0 ) , then it can be readily converted to an
A deterministic nite state machine or acceptor
output-equivalent Mealy machine by setting the output
deterministic nite state machine is a quintuple
function of every Mealy transition (i.e. labeling every
(, S, s0 , , F ) , where:
edge) with the output symbol given of the destination
is the input alphabet (a nite, non-empty set Moore state. The converse transformation is less straight-
of symbols). forward because a Mealy machine state may have dier-
ent output labels on its incoming transitions (edges). Ev-
S is a nite, non-empty set of states.
ery such state needs to be split in multiple Moore machine
s0 is an initial state, an element of S . states, one for every incident output symbol.[15]
is the state-transition function: : S
S (in a nondeterministic nite automaton it
would be : S P(S) , i.e., would 8 Optimization
return a set of states).
F is the set of nal states, a (possibly empty) Main article: DFA minimization
subset of S .

Optimizing an FSM means nding a machine with the 9.3 Finite state machines and compilers
minimum number of states that performs the same
function. The fastest known algorithm doing this is Finite automata are often used in the frontend of pro-
the Hopcroft minimization algorithm.[16][17] Other tech- gramming language compilers. Such a frontend may
niques include using an implication table, or the Moore comprise several nite state machines that implement a
reduction procedure. Additionally, acyclic FSAs can be lexical analyzer and a parser. Starting from a sequence of
minimized in linear time.[18] characters, the lexical analyzer builds a sequence of lan-
guage tokens (such as reserved words, literals, and identi-
ers) from which the parser builds a syntax tree. The lexi-
cal analyzer and the parser handle the regular and context-
9 Implementation free parts of the programming languages grammar.[21]

9.1 Hardware applications

10 See also
Abstract state machines (ASM)

Articial intelligence (AI)

Abstract State Machine Language (AsmL)

Behavior model

Communicating nite-state machine

Control system
Fig. 9 The circuit diagram for a 4-bit TTL counter, a type of Control table
state machine
Decision tables
In a digital circuit, an FSM may be built using a
DEVS: Discrete Event System Specication
programmable logic device, a programmable logic con-
troller, logic gates and ip ops or relays. More specif- Extended nite-state machine (EFSM)
ically, a hardware implementation requires a register to
store state variables, a block of combinational logic that Finite state machine with datapath
determines the state transition, and a second block of
combinational logic that determines the output of an Hidden Markov model
FSM. One of the classic hardware implementations is the Petri net
Richards controller.
Pushdown automaton
In a Medvedev circuit, the output is directly connected
to the state ip-ops minimizing the time delay ip-ops Quantum nite automata (QFA)
and output.[19][20]
Recognizable language
Through state encoding for low power state machines may
be optimized to minimize power consumption. Sequential logic

Specication and Description Language

9.2 Software applications State diagram

The following concepts are commonly used to build soft- State pattern
ware applications with nite state machines:

Automata-based programming Transition system

Tree automaton
Event-driven nite-state machine
Turing machine
Virtual nite-state machine
UML state machine

State design pattern YAKINDU Statechart Tools


11 References [16] Hopcroft, John E. (1971). An n log n algorithm for mini-

mizing states in a nite automaton (PDF) (Technical Re-
[1] Belzer, Jack; Holzman, Albert George; Kent, Allen port). CS-TR-71-190. Stanford Univ.
(1975). Encyclopedia of Computer Science and Technol- [17] Almeida, Marco; Moreira, Nelma; Reis, Rogerio (2007).
ogy. 25. USA: CRC Press. p. 73. ISBN 0-8247-2275-2. On the performance of automata minimization algorithms
(PDF) (Technical Report). DCC-2007-03. Porto Univ.
[2] Koshy, Thomas (2004). Discrete Mathematics With Appli-
cations. Academic Press. p. 762. ISBN 0-12-421180-1. [18] Revuz, D. (1992). Minimization of Acyclic automata in
Linear Time. Theoretical Computer Science. Elsevier.
[3] Wright, David R. (2005). Finite State Machines (PDF). 92: 181189. doi:10.1016/0304-3975(92)90142-3.
CSC215 Class Notes. David R. Wright website, N. Car-
olina State Univ. Retrieved July 14, 2012. [19] Kaeslin, Hubert (2008). Mealy, Moore, Medvedev-type
and combinatorial output bits. Digital Integrated Circuit
[4] Keller, Robert M. (2001). Classiers, Acceptors, Trans- Design: From VLSI Architectures to CMOS Fabrication.
ducers, and Sequencers (PDF). Computer Science: Ab- Cambridge University Press. p. 787. ISBN 978-0-521-
straction to Implementation (PDF). Harvey Mudd College. 88267-5.
p. 480.
[20] Slides, Synchronous Finite State Machines; Design and Be-
[5] John E. Hopcroft and Jerey D. Ullman (1979). Introduc- haviour, University of Applied Sciences Hamburg, p.18
tion to Automata Theory, Languages, and Computation.
[21] Aho, Alfred V.; Sethi, Ravi; Ullman, Jerey D. (1986).
Reading/MA: Addison-Wesley. ISBN 0-201-02988-X.
Compilers: Principles, Techniques, and Tools (1st ed.).
Addison-Wesley. ISBN 978-0-201-10088-4.
[6] Pouly, Marc; Kohlas, Jrg (2011). Generic Inference: A
Unifying Theory for Automated Reasoning. John Wiley &
Sons. Chapter 6. Valuation Algebras for Path Problems,
p. 223 in particular. ISBN 978-1-118-01086-0. 12 Further reading
[7] Storer, J. A. (2001). An Introduction to Data Structures
and Algorithms. Springer Science & Business Media. p. 12.1 General
337. ISBN 978-0-8176-4253-2.
Sakarovitch, Jacques (2009). Elements of automata
[8] http://www.iam.unibe.ch/~{}run/talks/ theory. Translated from the French by Reuben
2008-06-05-Bern-Jonczy.pdf, p. 34 Thomas. Cambridge University Press. ISBN 978-
0-521-84425-3. Zbl 1188.68177
[9] Brutscheck, M., Berger, S., Franke, M., Schwarzbacher,
A., Becker, S.: Structural Division Procedure for E- Wagner, F., Modeling Software with Finite State
cient IC Analysis. IET Irish Signals and Systems Con- Machines: A Practical Approach, Auerbach Pub-
ference, (ISSC 2008), pp.18-23. Galway, Ireland, 1819 lications, 2006, ISBN 0-8493-8086-3.
June 2008.
ITU-T, Recommendation Z.100 Specication and
[10] Tiwari, A. (2002). Formal Semantics and Analysis Meth- Description Language (SDL)
ods for Simulink Stateow Models.
Samek, M., Practical Statecharts in C/C++, CMP
[11] Hamon, G. (2005). A Denotational Semantics for State- Books, 2002, ISBN 1-57820-110-1.
ow. International Conference on Embedded Software.
Jersey City, NJ: ACM. pp. 164172. CiteSeerX Samek, M., Practical UML Statecharts in C/C++, . 2nd Edition, Newnes, 2008, ISBN 0-7506-8706-1.

[12] Harel, D. (1987). A Visual Formalism for Complex Sys- Gardner, T., Advanced State Management, 2007
tems. Science of Computer Programming , 231274.
Cassandras, C., Lafortune, S., Introduction to Dis-
[13] Alur, R., Kanade, A., Ramesh, S., & Shashidhar, K. C. crete Event Systems. Kluwer, 1999, ISBN 0-7923-
(2008). Symbolic analysis for improving simulation cov- 8609-4.
erage of Simulink/Stateow models. International Con-
ference on Embedded Software (pp. 8998). Atlanta, Timothy Kam, Synthesis of Finite State Machines:
GA: ACM. Functional Optimization. Kluwer Academic Pub-
lishers, Boston 1997, ISBN 0-7923-9842-4
[14] Black, Paul E (12 May 2008). Finite State Machine.
Dictionary of Algorithms and Data Structures. U.S. Tiziano Villa, Synthesis of Finite State Machines:
National Institute of Standards and Technology. Logic Optimization. Kluwer Academic Publishers,
Boston 1997, ISBN 0-7923-9892-0
[15] Anderson, James Andrew; Head, Thomas J. (2006).
Automata theory with modern applications. Cambridge Carroll, J., Long, D., Theory of Finite Automata with
University Press. pp. 105108. ISBN 978-0-521-84887- an Introduction to Formal Languages. Prentice Hall,
9. Englewood Clis, 1989.

Kohavi, Z., Switching and Finite Automata Theory. Lewis, Harry R.; Papadimitriou, Christos H. (1998).
McGraw-Hill, 1978. Elements of the Theory of Computation (2nd ed.).
Upper Saddle River, New Jersey: Prentice-Hall.
Gill, A., Introduction to the Theory of Finite-state ISBN 0-13-262478-8.
Machines. McGraw-Hill, 1962.
Linz, Peter (2006). Formal Languages and Au-
Ginsburg, S., An Introduction to Mathematical Ma- tomata (4th ed.). Sudbury, MA: Jones and Bartlett.
chine Theory. Addison-Wesley, 1962. ISBN 978-0-7637-3798-6.

Minsky, Marvin (1967). Computation: Finite and

12.2 Finite state machines (automata the- Innite Machines (1st ed.). New Jersey: Prentice-
ory) in theoretical computer science Hall.

Papadimitriou, Christos (1993). Computational

Arbib, Michael A. (1969). Theories of Abstract Au- Complexity (1st ed.). Addison Wesley. ISBN 0-201-
tomata (1st ed.). Englewood Clis, N.J.: Prentice- 53082-1.
Hall, Inc. ISBN 0-13-913368-2.
Pippenger, Nicholas (1997). Theories of Com-
Bobrow, Leonard S.; Arbib, Michael A. (1974). putability (1st ed.). Cambridge, England: Cam-
Discrete Mathematics: Applied Algebra for Computer bridge University Press. ISBN 0-521-55380-6.
and Information Science (1st ed.). Philadelphia: W.
B. Saunders Company, Inc. ISBN 0-7216-1768-9. Rodger, Susan; Finley, Thomas (2006). JFLAP: An
Interactive Formal Languages and Automata Pack-
Booth, Taylor L. (1967). Sequential Machines and age (1st ed.). Sudbury, MA: Jones and Bartlett.
Automata Theory (1st ed.). New York: John Wiley ISBN 0-7637-3834-4.
and Sons, Inc. Library of Congress Card Catalog
Number 67-25924. Sipser, Michael (2006). Introduction to the Theory
of Computation (2nd ed.). Boston Mass: Thomson
Boolos, George; Jerey, Richard (1999) [1989]. Course Technology. ISBN 0-534-95097-3.
Computability and Logic (3rd ed.). Cambridge,
England: Cambridge University Press. ISBN 0- Wood, Derick (1987). Theory of Computation (1st
521-20402-X. ed.). New York: Harper & Row, Publishers, Inc.
ISBN 0-06-047208-1.
Brookshear, J. Glenn (1989). Theory of Computa-
tion: Formal Languages, Automata, and Complexity.
Redwood City, California: Benjamin/Cummings 12.3 Abstract state machines in theoretical
Publish Company, Inc. ISBN 0-8053-0143-7. computer science
Davis, Martin; Sigal, Ron; Weyuker, Elaine J. Gurevich, Yuri (July 2000). Sequential Abstract
(1994). Computability, Complexity, and Languages State Machines Capture Sequential Algorithms
and Logic: Fundamentals of Theoretical Computer (PDF). ACM Transactions on Computational Logic.
Science (2nd ed.). San Diego: Academic Press, Har- 1 (1): 77111. doi:10.1145/343369.343384.
court, Brace & Company. ISBN 0-12-206382-1.

Hopcroft, John; Ullman, Jerey (1979). 12.4 Machine learning using nite-state
Introduction to Automata Theory, Languages, algorithms
and Computation (1st ed.). Reading Mass:
Addison-Wesley. ISBN 0-201-02988-X. Mitchell, Tom M. (1997). Machine Learning (1st
ed.). New York: WCB/McGraw-Hill Corporation.
Hopcroft, John E.; Motwani, Rajeev; Ullman, Jef-
ISBN 0-07-042807-7.
frey D. (2001). Introduction to Automata Theory,
Languages, and Computation (2nd ed.). Reading
Mass: Addison-Wesley. ISBN 0-201-44124-1. 12.5 Hardware engineering: state mini-
Hopkin, David; Moss, Barbara (1976). Automata. mization and synthesis of sequential
New York: Elsevier North-Holland. ISBN 0-444- circuits
Booth, Taylor L. (1967). Sequential Machines and
Kozen, Dexter C. (1997). Automata and Com- Automata Theory (1st ed.). New York: John Wiley
putability (1st ed.). New York: Springer-Verlag. and Sons, Inc. Library of Congress Card Catalog
ISBN 0-387-94907-0. Number 67-25924.

Booth, Taylor L. (1971). Digital Networks and Com- A brief overview of state machine types, comparing
puter Systems (1st ed.). New York: John Wiley and theoretical aspects of Mealy, Moore, Harel & UML
Sons, Inc. ISBN 0-471-08840-4. state machines.
McCluskey, E. J. (1965). Introduction to the Theory
of Switching Circuits (1st ed.). New York: McGraw-
Hill Book Company, Inc. Library of Congress Card
Catalog Number 65-17394.
Hill, Fredrick J.; Peterson, Gerald R. (1965). Intro-
duction to the Theory of Switching Circuits (1st ed.).
New York: McGraw-Hill Book Company. Library
of Congress Card Catalog Number 65-17394.

12.6 Finite Markov chain processes

We may think of a Markov chain
as a process that moves successively
through a set of states s1 , s2 , , sr.
if it is in state si it moves on to
the next stop to state sj with prob-
ability pij. These probabilities can
be exhibited in the form of a tran-
sition matrix (Kemeny (1959), p.

Finite Markov-chain processes are also known as

subshifts of nite type.

Booth, Taylor L. (1967). Sequential Machines and

Automata Theory (1st ed.). New York: John Wiley
and Sons, Inc. Library of Congress Card Catalog
Number 67-25924.
Kemeny, John G.; Mirkil, Hazleton; Snell, J. Lau-
rie; Thompson, Gerald L. (1959). Finite Mathe-
matical Structures (1st ed.). Englewood Clis, N.J.:
Prentice-Hall, Inc. Library of Congress Card Cat-
alog Number 59-12841. Chapter 6 Finite Markov

13 External links
Finite State Automata at DMOZ
Modeling a Simple AI behavior using a Finite State
Machine Example of usage in Video Games
Free On-Line Dictionary of Computing description
of Finite State Machines
NIST Dictionary of Algorithms and Data Structures
description of Finite State Machines
Interactive FSM: Control Circuit, demonstrates the
logic ow of the Finite State Machines.
FSM simulator, simulates DFAs, NFAs and -
NFAs, including generated by regular expression.

14 Text and image sources, contributors, and licenses

14.1 Text
Finite-state machine Source: https://en.wikipedia.org/wiki/Finite-state_machine?oldid=762547769 Contributors: Damian Yerrick, Ax-
elBoldt, Mav, Jeronimo, Jan Hidders, Khendon, Arvindn, Ray Van De Walker, LionKimbro, Heron, Hirzel, Michael Hardy, Pnm, Takuya-
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ZeroOne, S.K., Art LaPella, Skinkie~enwiki, Vdm, Jonsafari, BlueNovember, Mdd, HasharBot~enwiki, SvendTofte, Joris Gillis, Wt-
shymanski, Knowledge Seeker, Danhash, Gpvos, IMeowbot, Thowa, Oleg Alexandrov, Linas, LOL, Bkkbrad, Robert K S, Ruud Koot,
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14.2 Images
File:4_bit_counter.svg Source: https://upload.wikimedia.org/wikipedia/commons/7/76/4_bit_counter.svg License: Public domain Con-
tributors: Own work Original artist: Gargan
File:Commons-logo.svg Source: https://upload.wikimedia.org/wikipedia/en/4/4a/Commons-logo.svg License: PD Contributors: ? Origi-
nal artist: ?
File:DFAexample.svg Source: https://upload.wikimedia.org/wikipedia/commons/9/9d/DFAexample.svg License: Public domain Con-
tributors: Own work Original artist: Cepheus
File:Finite_state_machine_example_with_comments.svg Source: https://upload.wikimedia.org/wikipedia/commons/c/cf/Finite_
state_machine_example_with_comments.svg License: Public domain Contributors: Own work based on: en:File:Finite state machine
example with comments.gif Original artist: 1st Macguy314, reworked by Perhelion
File:Fsm_Moore_model_door_control.svg Source: https://upload.wikimedia.org/wikipedia/commons/7/71/Fsm_Moore_model_door_
control.svg License: Public domain Contributors: Vectorized version of File:Door moore de.png Original artist: Saman
File:Fsm_mealy_model_door_control.svg Source: https://upload.wikimedia.org/wikipedia/commons/7/72/Fsm_mealy_model_door_
control.svg License: Public domain Contributors: Vectorized version of File:Door mealy example de.png Original artist: Saman
File:Fsm_parsing_word_nice.svg Source: https://upload.wikimedia.org/wikipedia/commons/a/a8/Fsm_parsing_word_nice.svg License:
Public domain Contributors: en:Image:Fsm parsing word nice.jpg Original artist: en:User:Thowa, redrawn by User:Stannered
File:Lock-green.svg Source: https://upload.wikimedia.org/wikipedia/commons/6/65/Lock-green.svg License: CC0 Contributors: en:File:
Free-to-read_lock_75.svg Original artist: User:Trappist the monk
File:SdlStateMachine.png Source: https://upload.wikimedia.org/wikipedia/commons/3/38/SdlStateMachine.png License: CC-BY-SA-
3.0 Contributors: ? Original artist: ?
File:Torniqueterevolution.jpg Source: https://upload.wikimedia.org/wikipedia/commons/9/97/Torniqueterevolution.jpg License:
GFDL Contributors: Own work Original artist: Sebasgui
File:Turnstile_state_machine_colored.svg Source: https://upload.wikimedia.org/wikipedia/commons/9/9e/Turnstile_state_machine_
colored.svg License: CC0 Contributors: Own work Original artist: Chetvorno
File:UML_state_machine_Fig5.png Source: https://upload.wikimedia.org/wikipedia/commons/2/20/UML_state_machine_Fig5.png
License: CC BY-SA 3.0 Contributors: Own work (Original text: I (Mirosamek (talk)) created this work entirely by myself.) Original artist:
Mirosamek (talk)
14.3 Content license 11

14.3 Content license

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