LFP900

Test code for series LFP900 high-speed protection

equipment of extra-high voltage transmission line
DL/T 6251997

LFP900

DL/T 6251997
Test code for series LFP900 high-speed protection
equipment of extra-high voltage transmission line

1997-10-22 1998-01-01

LFP900
LFP900
LFP900

A E

1
LFP900

LFP900

GB 726187
GB 1428593
GB/T 1514594
 GB 5017192
DL 47892
DL/T 55994 220500kV
DL/T 5871996
DL/T 6241997

3
3.1
()

3.2
a)
b) IN ( IN=5A 1A) UN (
UN=57.7V)
c)
d)
3.3
a)
DL/T6241997
b)
()
c) 0.5
d)

3.4
a)

b)
c)
d)

3.5
a)
b) EPROM
c)
d)

e)

f)

g)
h)
 i)()
()

4
1
1

1
2
3
3.1
3.2
4
4.1
4.2
4.2.1
4.2.2
5
5.1
5.2
5.3
5.4
5.5
6
6.1
6.2
6.3
6.4
7
8
9
9.1
9.2
9.3
10
10.1
10.1.1 (901A)
(902A)
10.1.2
10.2
10.3
10.3.1
10.3.2
10.4
10.5
10.6
10.7

11
12

13
13.1
13.2
13.3
13.4

13.5
14
15
15.1
15.2
16
17
1. 1 1 6 1
2. 12 1
3.

5
5.1
a)
b)

c)

d)
e) 3mm
f)

g)
h)
i)
j)
5.2

a)MONI E4E5E9E10
E1E2 MEN
b)SIG JP1JP2 12
JP1JP2 23 ()
5.3

a) 4 (VFC)5 (CPU1)6 (CPU2)7 (MONI)8 (SIG)

b)
c)ON
d)
e)
f)

5.3.1
a) 1000V
10M

b)
1000V
1.0M
()
5.3.2
6 1
5.3.1

1000V 1min

2500V
5.4

5.4.1

5.4.1.1
80%
5.4.1.2 80%

5.4.2
5.4.2.1
80%100%115%
2
5.4.2.2
2
2
(V) (V)
+5 M7M8 4.85.2
+12 M4M8 1113
-12 M5M8 -11-13
+24 M6M8 2226
+24 M1M2 2226

5.5
5.5.1

CPU1CPU2SIG (OP )

5.5.2

SETTING+
-
5.5.3

( FF )
()

4800bps 8
5.5.4
5.5.3
CRC (8CRC CHECK)
CPU1CPU2MONI ()

5.5.5
5.5.5.1
(4CLOCK)
24h 10s

5.5.5.2

5min
5.6
5.6.1
(1
SETTING) CPU1CPU2 MONI
()

5.6.2
5.6.2.1 09

5.6.2.2

5.6.3


5.6.3.1 (1SETTING)

1A 5A

5.6.3.2 CPU1 CPU1 (1.CPU1
RELAY) CPU1 CPU1

5.6.3.3 CPU2 SETTING CPU2

(2.CPU2 RELAY) CPU2 CPU2

5.6.3.4 MONI SETTING MONI

(3.MONITOR) MONI
5.6.3.5 SETTING (4.-
FAULT-LOCATION)

5.6.4

5.7
5.7.1 CPU1
(3.RELAY STATUS)
CPU1 (1.CPU1 STATUS) (2SWITCH STATUS)

CPU1 3
3 CPU1
 CPU1
CC3 KK =1
CB2 TWJ
CA2 L0 =0
CA3 F++
CB3 CHNL
CA6 MCD
CA5 SX
1.

2.
3.
4.+24V(CA1)

5.7.2 CPU2
5.7.1 CPU2 (2.CPU2 STATUS)
(2SWITCH STATUS)
CPU2 4
5.8
5.8.1

U UN (CA10CC10)U VN (CA9CC10)U WN (CA8

CC10)U LN (CC8CC9)

0.5VA
5.8.2

I UN (DD1DD5) I VN (DD2DD6) I WN (DD3

DD7) 3 I 0 (DD8DD4)(IN)

1VA(IN=5A )
0.5VA(IN=1A )
5.8.3
(DD9 DD10)
()
35W 50W
4 CPU2
CPU2
CB2 TWJ =1
CA4 DIST
CC1 SC =0
CC2 ZC
 CC3 HHKK
CC4 HYJ
CC5 BSCH
CA6 MCD
1.

2.
5
3.+24V(CA1)

4.

5
CC1 CC2
0 0 1
0 1 0
1 0
1 1

5.9
5.9.1

(3RELAY STATUS)1CPU1 STATUS

SAMPLING DATA()( I U I V I W )

( U U U V U W )2CPU2 STATUS

( I U I V I W U U U V U W U L )3

MONITOR(( I U I V I W I 0 )

0.01IN( 0.05V)
()
5.9.2

DD5DD6DD7DD8( I U I V I W I 0 )

DD1DD2DD3DD4 I U I V I W IN

CA10CC8CC9CC10( A )

CA10CA9CA8CC10 U U U V U W UN

3I0 (3RELAY STATUS)
1CPU1 STATUS2CPU2 STATUS3MONITOR
(1SAMPLING DATA) CPU1 (

I U I V I W U U U V U W )CPU2 ( I U

I V I W U U U V U W U L )MONI ( I U I V I W

I 0 )
70603051V 10IN5ININ0.2IN0.1IN
5%

1.
OP
2.

3.
4. 10IN 5IN 10s 10IN

5.9.3
5.9.2
(3RELAY STATUS)1CPU1
STATUS2CPU2 STATUS3PHASE ANGLES

CPU1 ( U U I U U V I V U W I W U U U V U V

U W U W U U )CPU2 ( U U I U U V I V U W I W

U U U V U V U W U W U U U L U U )
04590 3
5.10
5.9.2 5.10.3.2
5.10.7
( CA1CC3)( CB2)
5.10.1

5.10.1.1 (901A)(902A)

U V W UVVWWU
100150ms

 . 1 k IZ set p2 I I N
U 12 (901A)

Zset
p2

U m 1 k IZ setk
9 (902A)
I max I N
1 k DZ setk m Z setk
Zsetk
DZsetk
k

U 2.4 IZ setpp2 I I N (901A)

Zsetpp2

7.7
U 2mIZ setk I max I N (902A)
DZ setk m Z setk

=sen (901A)
=78 (902A)
sen

U=0VI=6IN=sen
m=0.9(UUN)(I6IN)
m

5.10.1.2
U V W U=50V
100150ms

I=mI0setk
I0setk
m 0.951.05 1.2
0.95 (m=0.95) 1.05
1.2
5.10.2

V WU UVW
=180+sen
(L03k=0)


I min 6 I N 100 / 1 k DZ set (901A)

I min 6 I N 100 / 1 k DZ setk (902A)

DZset
DZsetk

5.10.3

5.10.3.1 U V W UVVWWU
I ( I=IN) 100150ms

U=mIZset1 (1+k)
U=2mIZset1
m 0.951.05 0.7
Zset1
0.95 (m=0.95) 1.05
0.7
5.10.3.2 U VW
V WU I (
I=IN)
U=mIZsetpn (1+k)
U=2mIZsetppn
m 0.951.05 0.7
n 2 3
Zsetp2
Zsetp3
Zsetpp2
Zsetpp3
0.95 (m=0.95) 1.05
0.7
5.10.4

U V W U=50V
()
I=mI0set2
I=mI0set3
m 0.951.05 1.2
I0set2
I0set3
0.95 (m=0.95) 1.05
1.2
5.10.5

 U V W UVVWWU
( 0UN )
100150ms
U=(1+k)IDZset+(1-1.05m)UN

U=2IDZset+(1-1.05m) 3 UN

m 0.91.1 1.2
DZset
m=1.1 m=0.9
m=1.2
5.10.6
()

() I=mITVset
I=mI0TVset
m 0.951.05 1.2
ITVset
I0TVset
1.05
0.95 1.2
5.10.7

( CA1CB2)
300msU=50V
I=mI0setck
I0setck
m 0.951.05 1.2
1.05 0.95
1.2
5.11
80%
5.11.1 CPU1

( CA1CC3)( CB2)
HELP90
HELP90 HELP90 VFC 9
6
6 CPU1

1 U A BC1BC2 BC5BC6 BB1
100150ms BB2 BB5BB6 AC1
UU=0VIU=2IN=sen DZ CD AC2AC5AC6()
D++ AA1AA2 AA5
 CD AA6 AB1AB2 BA1
BA2AB5AB8()
2 V B BC1BC3 BC5BC7 BB1
100 BB3 BB5BB7 AC1
150ms;UV=0V,IV=2IN,=sen CD AC3 AC5AC7 BC9
DZ D++ BC10AC9AC10()
CD AA1AA2BA1BA2BA1
BA3AB5AB9()
3 W C BC1BC4 BC5BC8 BB1
100 BB4 BB5BB8 AC1
150ms UW=0V,IW=2IN =sen CD AC4 AC5AC8 AC9
DZ D++ AC10()
CD AA1AA2BA1BA2()
4 UV A AA1AA3 AA5
B AA7 AB1AB3 AA1
UUV=0V,IUV=2IN,=sen DZ C AA4 AA5AA8 AB1
D++ AB4()
CD BA7BA8()
BA7BA9()
5 PT BA4BA6AB5AB7

6 BA4BA5AB5AB6
1.
2.
3.
4. 15

5.11.2 CPU2

( CA1CC3)( CB2)
5.11.1
HELP90 7
5.11.3 MONI
(
CA1CC3)( CB2)
CPU1 I0stset=0.1IN
I0set2=0.1IN I0set3=0.1INMONI I0stset=0.5IN
5.11.1
HELP90 U=0VI=0.15IN=sen
A B C BC1BC2BC1
BC3BC1BC4

7 CPU2

1 U A AA1AA2
100 150ms CD
UU=0VIU=2IN=sen
CD
2 V B AA1AA2
100 150ms CD
UV=0VIV=2IN=sen
CD
3 W C AA1AA2
100 150ms CD
UW=0V,IW=2IN,=sen
CD
4 UV A AA1AA3AA1AA4
300ms B
UUV=0VIUV=2IN =sen C

CD
5 PT BA4BA6
OP AB5AB7
1.
2.
3.
4.

5.12
80%
( CA1CC3)( CB2)
HELP90 UV
UUV=0IUV=2IN=sen
5.4.2.2 2
+5V
30mV12V 50mV24V 24V 500mV
5.13

5.13.1

(U V W )
5.13.1.1
UV I=IN
100msU=0.72IZset1=1.4IZset1(Zset1 )

30ms 6ms
5.13.1.2

W I=IN
100ms U=0.7IZset1(1+k)(Zset1 )
30ms

5.13.2

a)
b)
c) U VW ()
d) V WU ()
e) W (
)
f) U (
)
g) U VW

h) U VW UVW
5.13.2.1
8
5.13.2.2
8
5.13.2.3
8
8



Z D+ D+
+ + D++
0++Z1CH 0++Z1CH 0++Z1CH

Z1CH(CF1) Z1 CH Z1CH
CF2 (CF1)CF2 (CF1)CF2
D+ D+
+Z1CH +Z1CH D++Z1

Z1 CH Z1 CH
 (CF1)CF2 (CF1)CF2
D+ D+
+Z1CH +Z1CH D++Z1

Z1 CH Z1 CH
(CF1)CF2 (CF1)CF2
Z Z2ST=0 Z2 Z2ST=0
Z2 B2ZP=0 Z2
Z2ST=1 CH B2ZP=0
Z2 B2ZP=1 CH
B2ZP=0 B2ZP=1
CH
B2ZP=1 Z2ST=1

Z2 Z2
B2ZPP=0 B2ZPP=0 Z2
CH CH
B2ZPP=1 B2ZPP=1
Z Z3 Z3
Z3


Z3 Z3
Z3 Z2


I0 L02ST=0 L02ST=0 L02ST=0
L02ST=1
L02ST=1 L02ST=1
L02
L02
L02
L02ST=0 L02ST=0 L02ST=0

L02(CF1) L02(CF1)
L02 CH
(CF1)
I0
L03 L03 L03



 (CF1)CF2 (CF1)CF2 (CF1)CF2

L02ST=0
(CF1)CF2 (CF1)CF2

(CF1)CF2 L02 CH
(CF1)







1.CF1

2.CF2

5.13.2.4 1 2
a) 1

9
b) 2

9
9

1 2

Z D+ D+
+ D++ +0++Z1
0++Z1 0++Z1

Z1(CF1)CF2 Z1(CF1)CF2

D++Z1 D+
BCPP=0 D++Z1 +Z1
BCPP=1
Z
Z1BCPP=0 Z1(CF1)CF2
CH
(CF1)C
 F2


Z Z2ST=0
Z2B2ZP=0 Z2 Z1(CF1)CF2
B2ZP=1 Z2ST=1
Z2
Z2 Z2
B2ZPP=0 BCPP=0 Z2

B2ZPP=1
BCPP=1
Z Z3
Z3 Z3

Z3
Z3 Z3

I0 L02ST=0 L02ST=0
L02
L02ST=1 L02ST=1

L02
L02
L02ST=0 L02ST=0

L02(CF1) L02(CF1)
I
CF2 L03 L03


(CF1)CF2 (CF1)CF2


(CF1)CF2 (CF1)CF2







1.CF1 (
)
2.CF2

5.13.2.5
BCS=1,BCPP=1
9
5.13.3

a) U V W
b) VW

5.13.4

5.13.5
(3RELAY STATUS) CPU1 CPU2
(2SWITCH STATUS)
a)(CC5)

b)(CB2)

c)(CC4)()

d)(CC3)

e)(CA6)

5.14

a) UVW
b) W
c) UV

5.15
5.15.1

()
5.15.2

100150ms

U=1.2(1+k)IZsetp2I=IN (901A)
Zsetp2
9
U m 1 k IZ setk I max I N
1 k DZ setk m Z setk
(902A)


Zsetk
DZsetk
k

U=2.4IZsetpp2I=IN (901A)
Zsetpp2

7.7
U 2mIZ setk I max I N (902A)
DZ setk m Z setk

=sen (901A)
=78 (902A)
sen
m=0.5(UUN)(I6IN)
m
5.15.2.1
a)()
5
b) 3

5.15.2.2

a)
5
b)

5.16
(0.5IN)

5.16.1

TV
5.16.2
(3RELAY
STATUS) CPU1 CPU2 MONITOR ( 1
SAMPLING DATA )
5.16.3
CPU1 CPU2
( 3 PHASE ANGLES )

5.17