Ee 1989 02extra

The term computer hobbyist brings to mind the image of a
lonely father sitting in a spare bedroom, typing cryptic

machine-language code deep into the night. The wife is of
course also lonely, which in the course of time results in the
computer finding a place in the living room, in spite of its
rather hideous appearance.
The space which thus comes free in the bedroom is soon
filled, at first with children and after that with a second com-
puter. And with the second computer comes the need for a
network.
By Peter Smit
a simple PC
network
a cable is all you need...
an IPX network, a modem or a null-

modem link.
The type of link which is most appro-
priate for interconnecting individual
computers depends on the applica-
tion which we intend to use via the link.
Null-modem cable
A null-modem cable is a good choice
when relatively small data volumes
need to be transferred. This inexpen-
sive serial link is only suitable for trans-
ferring small amounts of data and for
playing some multiplayer games. The
maximum speed which the RS232 port
can achieve with such a cable is
115,200 baud. For serial data transmis-
sion with 1 start bit, 8 data bits and
1 stop bit, this results in an effective
transfer rate of 10,250 bytes per sec-
ond (36 MB/hour). For this data rate,
both computers must be fast (486 or
better) and should preferably be fitted
with a type 16550 UART (Universal
Asynchronous Receiver/Transmitter).
One can easily check whether such
a chip is present by means of the pro-
gram MSD (provided standard with
DOS). When MSD is run, it displays the
In addition to allowing communication game at the same time. They can play type of UART present for each COM
via e-mail, interconnecting two or together in a three-dimensional maze port: 8250, 16450 or 16550. An 8250
more computers has the advantage or fly through space together. Some can only manage 9600 baud. Starting
that files, printers, modems, disk drives, well-known games which have this with AT machines one finds only the
ZIP drives and CD-ROM drives can be option are Doom, Duke Nukem 3D, faster types (16450, 82450 and
shared. With the Internet boom it has Quake, Outlaws, X-Wing versus T-Fight- 16550), which can handle up to
become totally in to run 3D games in er and so on. Some of these run on a 115,200 baud. Many snoop pro-
multiplayer mode. With this option, central server via the Internet, but they grams report the slower 8250 when a
multiple persons can participate in the can also be run via a TCP/IP network, 16450 is fitted. Only the 16550 has a
2 - 2/98 Elektor Electronics EXTRA PC-TOPICS

buffer. Modern internal modems and the slower one must be the host D25 D25
Pentium motherboards have a 16550 machine, since the host machine
1 1
as standard. Multitasking operating determines the data transfer rate. If
14 14
systems, such as Windows 95, Windows there are communication problems
2 TxD TxD 2
NT and Linux, can experience timing with the link, its a good idea to check 15 15
problems if a UART buffer is not pre- whether data transfers in the reverse 3 RxD RxD 3
sent. This shows up as lower data rates, direction work well. If this is the case, 16 16
loss of data packets etc. then there is a timing problem 4 RTS RTS 4
17 17
Its advisable to disable the 16550s between the two computers. In order
5 CTS CTS 5
FIFO buffer for the port to which the to properly solve such a problem we
18 18
mouse is connected. Problems such as must use a connection with more than 6 DSR DSR 6
the mouse pointer freezing after a few three leads, since this is the only way 19 19
movements can sometimes be caused to have hardware handshaking (see 7 GND GND 7
by this buffer. In Windows 95 the buffer Figure 1). Programs which only recog- 20 DTR DTR 20
8 8
can be disabled via the Control nize hardware handshaking will thus
21 21
Panel/System/Device Manager/Ports/ not work with a three-wire null-modem
9 9
COM1 (mouse)/Properties/ Settings/Ad- cable. 22 22
vanced/Use FIFO Buffers. In case of A full null-modem connection con- 10 TxD Transmit Data 10
communication problems the FIFO sists of 7 leads. A 25-pin or 9-pin sub-D 23 RxD Receive Data 23
speed can also be somewhat reduced connector is used. A male connector 11 RTS Request to Send 11
via this route. With Windows 3.11 one is always used at the back of the com- 24 CTS Clear to Send 24
12 DSR Data Set Ready 12
must include a line in SYSTEM.INI under puter, so that we must use two female
25 GND Ground 25
the heading [386Enh]: COM1FIFO=0 connectors for the cable. Normally the 13 DTR Data Terminal Ready 13
disables the FIFO buffer for the mouse mouse is connected to the COM1 port
982001 - 11
connected to the COM1 port. Always via a 9-pin connector, so that the 25-
make a copy of SYSTEM.INI before mak- pin connector of the COM2 port is usu-
Figure 1. Wiring scheme for a full DTE/DTE
ing any changes! ally used for this sort of experiment.
null-modem cable.
Now that weve dealt with UART pit- There are several types of null-
falls, lets return our attention to the modem connections. The most expen-
null-modem cable. Such a cable pro- sive solution, which is also the most moulded-on connectors.
vides a link between the serial (RS232) flexible, consists of two universal The ease of use of a null-modem link is
ports of two computers. The RS232 port modem cables together with a null- largely determined by the software
was originally intended to be used for modem adapter. A universal modem used. The PC BIOS can (or at least
interconnecting a DTE (Date Terminal cable is a 25-lead cable which has a could) only manage 19,200 baud. All
Equipment) and a DCE (Data Commu- 25-pin male connector at one end MS-DOS null-modem software thus
nication Equipment). A D25 cable and both a 25-pin female connector accesses the UART registers directly,
between a computer and a modem is and a 9-pin female connector at the rather than via the BIOS. This is the only
an example of such a DTE/DCE link. other end. A null-modem adapter is a way in which it is possible to achieve a
A null-modem cable, by contrast, is small block fitted with two 25-pin 115,200 baud data rate.
used for a DTE/DTE link. It requires that female connectors. We connect the The best-known interconnection soft-
certain leads be interchanged adapter between the two cables, ware is LapLink, but Norton Comman-
between the two connectors. The most using the single 25-pin connectors of der also has a Link option. From MS-
important of these are TxD (Transmit the two cables. With this combination DOS 6.x onwards, Interlink provides a
Data) and RxD (Receive Data). These we can cope with all D9 and D25 standard means for interconnecting
two leads plus a ground lead repre- COM ports. With two 1.8-metre cables, two computers, and Windows 95 has
sent the simplest possible three-wire such a combination costs approxi- the Direct Cable Connection option.
null-modem cable. The only problem mately 15. For occasional use I prefer Norton
with a three-wire link is that there can For roughly 10 we can make do Commander (V4.0). Since this program
be no hardware handshaking with a single universal modem cable is anyhow often used to provide a user
between the two computers. and a null-modem adapter. However, interface, it is natural to also use it for
In a three-wire cable, the connector the adapter has threaded posts which the link. Version 4.0 has the additional
pin for the signal which asks whether mate with the fixing screws of the advantage that the contents of multi-
data can be sent (Request to Send) is cable connector. These are in the way ple directories can be selected con-
connected directly to the pin which is if the adapter is to be plugged direct- currently and copied. With a bit of
intended to receive the answer from ly into the computers COM-port con- patience it is possible to transfer an
the other computer (Clear to Send). nector. Its possible to dismantle the entire hard-disk partition in one opera-
This results in a sort of narcissistic con- connector and remove these posts on tion. Of course, at a data rate of
nection: the computer wonders one side of the adapter so that it can 35 MB/hour this does not go particular-
whether it can send data, while think- be plugged into the COM-port con- ly fast.
ing that it is talking to a second com- nector. However, this is not a particu- In Norton Commander one selects
puter. And like a true narcissist it natu- larly elegant solution, since the modi- Menu/Right or Left/Link, by means of
rally provides the answer to its own fied adapter cannot be secured to the which the first computer is configured
question. In other words, Can I send? connector. as the master and the second as the
Yes, I can always send and I decide One can also purchase a D25 serial slave. (Pay attention to the selection of
that for myself. female/female interconnection cable the correct COM ports.) The drives of
Whenever the two computers do not and modify it oneself according to Fig- the slave computer then appear at
have the same level of performance, ure 1, at least if it does not have the master as a normal window within
PC-TOPICS Elektor Electronics EXTRA 3 - 1/98

which one can select, copy and and 70 kbyte/s. In ECP mode the trans- were to interconnect the outputs (data
delete items and create subdirecto- fer rate can range up to 400 kbyte/s. lines) of two standard parallel ports,
ries. Norton Commander V4.0 also Officially, a Centronics port is bidirec- theres a good chance that one set of
can be used with a parallel intercon- tional (data can be transferred in both outputs would not survive the experi-
nection cable for a faster link. directions). In practice, a more eco- ment. Moreover, its not possible to
nomical implementation has been read in data via a standard parallel
An Interlink cable used, since for years printers just swal- port: what is read from the data regis-
lowed data and only protested when ter is not the data presented to the
If we wish to transfer data more quick- they were out of paper. Modern printers port from an external source, but the
ly, then we will want to use a modified are more mature and more inclined to data which were last written to the reg-
parallel cable. LapLink was the first to talk back, which has resulted in the ister by the computer itself.
introduce this possibility, and Norton development of bidirectional parallel With a true bidirectional port, the
later followed suit in Norton Comman- interfaces (PS/2, EPP and ECP). output lines are placed in a high-
der starting with Version 4.0. Microsoft The old-fashioned Centronics inter- impedance state when the bidirec-
adopted this idea starting with MS- face has 8 data lines which can only tional mode is enabled (control bit
DOS 6.x in the form of Interlink. In Win- be used to send data. There are three set). Data which are written to the data
dows 95 this option is called Direct registers for controlling the parallel register remain in a buffer without
Cable Connection. A disadvantage of port: an 8-bit data register (read/write), being transferred to the output data
the parallel link is the relatively short a 5-bit status register (read-only) and a lines. When the data register is read,
distance which can be bridged (a few control register (read/write). The status the current status of the ports data
metres). The greatest advantage of a lines are misused by the Interlink pins is read. From this it is apparent
parallel link is its speed. The maximum cable in order to allow data to also be that a bidirectional port does not sup-
speed depends on the type of printer received. If the incoming 5 status lines port duplex operation. The bidirection-
port and the sort of cable which is are cross-connected to 5 outgoing al control bit serves to make the port
used. data lines at the other end, a 5-bit act as either an output or an input. By
Various types of parallel link cables parallel link is created. The basic properly using one or more status lines
can be used. First, there are standard cable results from cross-connecting for handshaking, the two interconnect-
4-bit versions which work with LapLink, pins 2 through 6 with pins 11, 10, 12, 13 ed ports can be correctly switched
Norton Commander and Windows 95. and 15; pin 25 serves as the ground between send and receive modes, so
Then there is a modified 8-bit version lead (see Figure 2a). If better screen- that true 8-bit data communication is
for Norton Commander. An ECP cable, ing is desired, then additional ground possible. In order to use a parallel port
which is faster, can only be used with lines are used (pins 18 and 24). This in this manner, one must use an 8-bit
ECP/ECP ports. Finally, there is an intel- cable thus allows 5 bits to be trans- ECP cable; a standard 4-bit cable
ligent Universal Connection Module ferred in parallel. One of these is used cannot be used. An ECP cable inter-
(UCM) which checks for itself which for handshaking, leaving a 4-bit data connects all 8 data lines and cross-
types of parallel ports are present and stream. connects various status lines (see Fig-
configures itself either in standard 4-bit The control register contains a bit ure 3). If such a cable is used with a
mode or ECP mode. In standard 4-bit which allows a bidirectional parallel non-bidirectional port, damage to the
mode the transfer rate lies between 40 port to be enabled or disabled. If one outputs (data lines) can result.
Figure 2. Three types of parallel-interface cables between two computers: a simple 4-bit cable (a), a 4-bit cable for Windows 95 (b)
and an 8-bit cable for Norton Commander (c).
D25 D25 D25 D25

a b
1 1 1 1
STR STR
14 14 14 14
2 2 2 2
DATA 0 DATA 0 DATA 0 DATA 0
15 15 15 15
ERR ERR ERR ERR
3 3 3 3
16 16 16 16
RESET RESET
4 4 4 4
17 17 17 17
SELECT IN SELECT IN
5 5 5 5
18 18 18 18
6 6 6 6
19 19 19 19
7 7 7 7
20 20 20 20
8 8 8 8
21 21 21 21
9 9 9 9
DATA 7 DATA 7
22 22 22 22
10 10 10 10
ACK ACK ACK ACK
23 23 23 23
11 11 11 11
BSY BSY BSY BSY
24 24 24 24
12 12 12 12
PE PE PE PE
25 25 25 25
GND GND GND GND
13 13 13 13
SEL SEL SEL SEL
PE(paper error) ERR(error) BSY(busy) PE(paper error) ERR(error) BSY(busy)

ACK(acknowledge) SEL(select) 982001 - 12a ACK(acknowledge) SEL(select) 982001 - 12b

D25 D25
The modern Extended Capabilities der cable into a sin-
Port (ECP) is bidirectional and has an gle figure (see Fig- 1 1
STR STR
extended control register which ure 2). BSY
14 14
BSY
(among other things) allows the oper- The simple version D1
2 2
D1
15
ating mode (SPP, EPP or ECP) to be con- (Figure 2a) works with ERR
3
* * 153 ERR
D2 D2
figured. The ECP port uses an interrupt LapLink, Fastlynx, 16 16
(IRQ7 for LPT1, IRQ5 for LPT2) to capture Ebox, XTLink and MS-
INI
4
* * 4
INI
D3 D3
the data stream; it has a FIFO buffer DOS 6.x Interlink. The SELECT IN
17
* * 17
SELECT IN
5 5
and DMA support, it has a decom- version for Win- D4 D4
18 18
pression mode and it handles its own dows 95 (Figure 2b) 6 6
D5 D5
handshaking. It is thus better suited for has two extra leads 19 19
multitasking operating systems and which interconnect D6

7 7
D6
20 20
much faster for the Direct Cable Con- pins 16 and 17.
8 8
D7 D7
nection. The transfer rate ranges The only connection 21 21
between 200 and 400 kbyte/s. The scheme which sup- D8
9 9
D8
transfer rate of a normal 4-bit cable is ports 8-bit data trans- 22 22
10 10
also increased when it is connected fers with standard ACK ACK
23 23
between two ECP ports. In order to parallel ports is the 11 11
AFD AFD
achieve the highest data rates (200 to Norton Commander 24 24
400 kbyte/s) a special ECP or UCM Link option (V4.0 and PE

12
* * 12 PE
25 25
cable must be used. V5.0). Norton Com-
13 13
The way that a UCM cable works mander uses three SEL * * SEL
zie tekst voir texte
can be gleaned from the various infor- additional bits in the * see text * siehe Text
mation scattered about the Internet. control register to * * 982001 - 13
There is software in C++ which is able allow the remaining 3

Figure 3. A special cable is required for bidirectional parallel ports
to recognize whether a specific port is data bits to be read.
(ECP). Dont forget that this cable must never be used with stan-
standard or ECP. An electronic switch A true 8-bit link results
dard parallel ports!
which is normally in 4-bit mode can be from the added con-
switched to ECP mode via a software- nections (pins 1/7,
generated status signal. 7/1, 9/16, 16/9 8/14 and 14/8) without Microsoft is included (see Figure 3).
As soon as a parallel ports ECP using bidirectional ports (Figure 2c). In Remember that a standard port can
mode is enabled (via the BIOS), the ECP mode, the control register cannot be damaged if an ECP cable is used
port uses an interrupt (7). This frequent- be used to read data. The 8-bit Norton with it! In a working situation in which
ly results in an interrupt conflict if a Commander cable thus cannot be two specific computers are always
sound card is installed. If the ECP used with a parallel port operating in connected to each other via ECP
mode is to be used, then the sound the ECP mode. ports, this does not present a problem.
card must be configured to use a dif- An important difference between On the other hand, something can
ferent interrupt (5). the Windows 95 cable and the Norton always go wrong, such as for example
A search via the Internet yielded six Commander cable relates to pin 16. if someone just wants to quickly copy
different descriptions of standard 4-bit This can either be interconnected with a file to his 486 notebook.
Interlink cables. We have combined pin 16 or cross-connected with pin 9. In a situation in which various per-
two of these plus the Norton Comman- One must chose between an 8-bit sons work with a variety of computers
cable version (including notebooks), use a UCM
which only works cable. Such a cable is fast, safe and
c
with Norton Com- problem-free in use. With Windows 95,
D25 D25 mander or a 4-bit a UCM cable approaches the capa-
1 1
Norton Comman- bilities of a true network with regard to
STR STR
AFD
14 14
AFD
der version which functionality and speed. There is even
2 2
DATA 0
15 15
DATA 0 can also be used ODI software available for such
ERR ERR
DATA 1
3 3
DATA 1
with Windows 95. cables, which allows them to be used
INI
16 16
INI The Windows 95 in a Novell or Lantastic network. The
4 4
DATA 2
17 17
DATA 2
version is the most UCM cable is less expensive than a
SELECT IN SELECT IN
DATA 3
5 5
DATA 3 compatible. Unless separate network adapter attached to
18 18
GND
6 6
GND you plan to work the parallel port of a PCMCIA network
DATA 4 DATA 4
19 19 only with Norton adapter. This is also a good option for
7 7
DATA 5
20 20
DATA 5 Commander, I connecting a notebook to a comput-
DATA 6
8 8
DATA 6
would advise you er which is itself connected to a net-
21 21
to choose the Win- work. The notebook then receives a
9 9
DATA 7 DATA 7
22 22 dows 95 version. network connection via the UCM
ACK
10 10
ACK The ECP cable. For more information refer to
23 23
11 11
cable can only be the Parallel Technologies Internet site
BSY BSY
GND
24 24
GND used with bidirec- (http://www.lpt.com/). If the flexibility of
12 12
PE
25 25
PE tional ports. For the UCM cable is not necessary, then
GND GND
SEL
13 13
SEL
those of you who the money (50) can be better invest-
ERR(error) BSY(busy) wish to experiment ed in a network. A network is signifi-
SEL(select)
PE(paper error)
STR(strobe)
AFD(autofeed)
982001 - 12c with an ECP cable, cantly faster and can easily be
ACK(acknowledge) INI(initialisation) a diagram from extended. (982001)

The Motorola 68HC11 microcontroller is packed with
features and consequently requires very few parts to
make a minimum system configuration. In principle,
such a system does not need an RS232 interface
because that is usually only necessary to be able to
load programs into the controllers on-chip EEPROM
memory. For the actual use of the program, the inter-
face is not required. The RS232 interface described
here is therefore built on a separate little board, and
may be used at any time for programming and trou-
bleshooting 68HC11 controller applications.
Design by J. Dietrich
RS232 interface for

68HC11
with a program loader for small systems
inputs to be employed.
The interface described here is built
once only on a separate board, and
migrated to future 68HC11 applications
when and where necessary. It is only
connected to the target system (here,
the minimum system) for diagnosis and
programming jobs.
Circuit and circuit board

The circuit diagram of the interface is
given in Figure 2. Actually, it consists of
just one IC, the unavoidable MAX232
RS232 driver/level converter which is
capable of creating a fully RS232 com-
pliant interface with symmetrical inputs
and outputs, all on basis of a single 5-
volt supply. Although the output line lev-
els at pins 7 and 14 are at about 9 V
only, that is still within the RS232 specifi-
cation.
The interface is connected to a PC
using a cable with 9-pin sub-D sockets
at both ends. Wires 2 and 3 in the
An 68HC11 Processor Board was pub- need to burn EPROMs. The serial inter- cable should be crossed, all others
lished in the April 1994 issue of Elek- face available on the chip allows travel pin-to-pin. The link to the target
tor Electronics. The 68HC11 is supports, RAM or EEPROM cells to be system (the 68HC11 processor board) is
plied in a 52-pin PLCC case. It fea- read and written. made via a 5-way cable connected to
tures up to 40 freely programmable As illustrated in Figure 1, a minimum sys- boxheader K2. This cable also carries
input/output lines distributed across tem using the 68HC11 requires only the 5-V supply voltage for the interface.
five ports, an EEPROM memory with a eight additional components. Even this Connector K1 is only intended for situ-
size of up to 2 kBytes, and a small small amount of external parts is suffi- ations where a 5-V supply is connected
RAM memory. Because the EEPROM is cient to enable interrupt programs to to the interface board, and the con-
used as program memory, there is no be run and the eight A-D converter troller board is powered by the inter-

gram testing in RAM, enter the following:
1. Produce the assembler file using a
simple word processor (pure ASCII
file with the extension .ASC). Exam-
ple: TEST.ASC.
2. Launch the assembler
ASMHC11 TEST.ASC;b=256 (for
CPUs with 256 bytes of RAM)
ASMHC11 TEST.ASC;b=512 (for
CPUs with 512 bytes of RAM)
- Three files are generated with the
following extensions:
TEST.S19 for EEPROM program-
ming
TEST.LST ASCII documentation file
TEST.BOO for direct copying into
the RAM memory
3. Configure the PCs serial port in a
DOS window (example: COM2)
MODE COM2:1200,N,8,1
4. Copy the program into the 68HC11
RAM
Figure 1. Apart from the microcontroller, a minimum system COPY TEST.BOO/B COM2:
based on the 68HC11 requires only eight components. Once received the program is
immediately executed.
Programming the on-chip EEPROM also

requires a modification to EEPROGIX,
which comes with the Elekt494 file:
1. Modify EEPROGIX as follows:

...
LDS #SFF
LDX #$1000 offset for con-
trol regs
CLR $35,X !! insert this
line!!
CLR SCCR1,X initialize SCI
Figure 2. The RS232 interface is only built once, separate from for 8 data bits,
the microcontroller system, and may then be used with all 9600 bd
future experiments and applications of the 68HC11. In general, LDD #$30
it is only connected-up for program development or debugging ...
work. 2. Launch assembler by typing
ASMHC11 EEPROGIX.ASC;B=256
face, via K2 and the 5-wire cable. of charge from Motorola. The author Next, program the EEPROM:
A push-button on the interface board used a packed file called ELEKT494.ZIP 1. Produce the program using Editor,
allows the microcontroller to be reset. (66,304 bytes) which was downloaded then assemble it.
Without the interface board, the con- from the Motorola BBS in Munich, Ger- 2. Configure the PC serial port in DOS
troller uses its own, internal, reset logic many, telephone (+49) 89 92103111. window
which does not require a push-button. This file may be found in subdirectory MODE COM2:1200,N,8,1
The artwork for the single-sided /mc68hcxx/m68hc11. The zip file con- 3. Copy the once modified program
printed circuit board is given in Fig- tains, among others, an assembler with into RAM
ure 3. In view of the small number of documentation, as well as programs for COPY EEPROGIX.BOO/B COM2:
parts, a components list is not given. checking (MINIBUG) and programming 4. Close the DOS window, and launch
As usual, watch the polarity of the EEPROMs (EEPROGIX). The list with short HyperTerminal (Windows 95)
vertically mounted electrolytic descriptions of all files held on the mail- select Direct Cable Connection on
capacitors before soldering them on box is called ALLFILES.BBS, and may be COM2
to the board. Capacitor C5 decou- found in the directory /info. configure as 9600 bits/s, 8 bits, no
ples the supply voltage, and is safely How is the software transferred to the parity, 1 stop bit, hard ware hand-
rated at 10 V. microcontroller? For test purposes, the shaking protocol
software may be moved to the RAM Do File Settings ASCII Configu-
Software area starting at address 0. This is done ration, and set a character delay of
by means of the ORG (originate) state- 5, click on OK to leave the menu.
The software you will need to get going ment. 68HC11 versions are available 5. Type an upper-case I in the terminal
with the 68HC11 processor board and which, like the -E1, have an equal window
the present interface is available free amount of RAM and EEPROM. For pro- (selects internal programming of the

Finally
As already hinted at, the 68HC11
comes in three basic flavours:
MC68HC11A1 (256 bytes RAM,

512 bytes EEPROM)
MC68HC11E1 (512 bytes RAM,
512 bytes EEPROM)
MC68HC11E2 (256 bytes RAM,
2048 bytes EEPROM)
The MC68HC11 is also available from

second source Toshiba under the type
designation TMP68HC11E1T.
Figure 3. Track layout and component mounting plan of the small interface board. The modifications to the EEPROM pro-
grammer software (EEPROGIX) are only
EEPROM) gram is then automatically launched necessary if you use the -E versions,
6. Transmit (upload) the relevant S19 file when the supply voltage is switched on. because only these have a special
using Transmit Text File. Like EEPROGIX, the previously men- protection byte for the EEPROM. An
Example: TEST.S19. tioned program MiniBug is transferred important point to keep in mind for your
into the controller RAM using the COPY own applications and experiments is
To be able to start the EEPROM resident command and a bit rate of 1200/s. that this byte must be erased before
program without the interface con- Next, the serial connection to the any writing is done to the EEPROM in an
nected to the HC11 board, fit a jumper board may be established using -E version.
on contacts 4,5 of header K4. The pro- HyperTerminal and a bit rate of 9600/s. (972019)

Following the introduction of the USB (Universal Serial Bus) and
in its wake FireWire (IEEE 1394), almost all hardware and soft-
ware vendors in the computer world have ranged themselves
behind the serial-bus concept. USB has thus become the
standard for connecting peripheral devices to the PC. Thanks
to this development, there is finally a single interface stan-
dard which allows all computer devices to be connected to
each other. In the meantime, manufacturers of consumer
electronics have also embraced the new FireWire standard.
USB and FireWire

connecting all digital devices via a single cable
arbitrary time (switching off the power
is not even necessary!). The operating
system scans the USB every few sec-
onds and responds appropriately
whenever a new device is detected.
Memory is automatically allocated
and a suitable interrupt is assigned. A
maximum of 127 devices can be con-
nected to the bus, and smaller
devices can draw their operating
power directly via the bus interface.
In the meantime, Microsoft has
announced that Windows 98 will fully
support the USB protocol. There are
even rumours that a new OEM version
of Windows 95 will appear with USB
support.
There are two different categories of
connection available within USB: one
with a maximum data rate of 1.5 Mbit/s
and the other with a maximum data
rate of 12 Mbit/s. The slower variant
relates to relatively slow devices such
as mice, barcode readers, card read-
ers and keyboards. The faster variant is
intended for data communication with
video recorders and audio systems, as
well as for use with high-performance
peripheral devices such as hard-disk
drives.
Cabling
The USB uses a daisy-chain cabling
technique. This means that the devices
The problem is a familiar one: you pur- complete. Even the computer manu- are connected to the cable in
chase a new piece of equipment for facturers themselves find this all a bit sequence, one after the other. Thus in
the PC, search for matching cables, too much. theory the computer need have only
get all tangled up in the nest of cables The Universal Serial Bus shows that a one USB interface to allow up to 127
behind the PC, and then have to look better, and above all more user-friend- peripheral devices to be connected.
for a suitable driver. After that the cor- ly approach is possible. The USB offers Of course, the USB has its limitations.
rect interrupt and DMA channels must a completely integrated Plug & Play The maximum extent of the cable is
be assigned. Add to this the fact that solution for all devices. For the user this 5 metres. Longer distances can be
every device needs its own mains means that any given device can be achieved by using hubs, which are
power connection, and the chaos is connected to the computer at any buffer/splitter devices. A hub can be

Foil shield Power Foil shield Power computer and a wide variety of
conductors conductors
peripheral devices, or directly
Signal between individual devices, can be
pair considerably simplified. In terms of
Braid performance, FireWire lies between
USB (maximum 12 Mbit/s) and fibre-
optic links (1 Gbit/s). With this level of
performance FireWire could displace
Signal pair PVC jacket Drain PVC jacket existing networking standards such as
Ethernet (10 Base-T), but in practice
982002 - 11
FireWire is presently too expensive for
Figure 1. The construction of a standard USB cable and of a version with extra screening.
this. In addition, Ethernet has emerged
from the computer world, while
incorporated in a peripheral device, FireWire: a step further FireWire is clearly destined to play a
but it can also be included in a link as dominant role in the arena of modern
a stand-alone buffer and/or splitter. If a Applications for the USB are limited to consumer electronics products for dig-
device includes a hub, then it is easily data streams with a maximum rate of ital communications. The configura-
possible to incorporate two or more 12 Mbit/s. For many applications relat- tion shown in Figure 2 clearly illustrates
functions in a single enclosure. For ed to the PC this is more than ade- the mutually complementary nature of
example, one could imagine a key- quate. However, there are conceiv- USB and FireWire and demonstrates
board with a built-in card reader, able applications for which significant- how they can be used to extend each
touchpad and/or mouse. A USB link ly higher data rates are desirable. One other. Each has its own particular
can be extended a maximum of example would be the loss-free region of application. In the illustrated
seven times, which means that its a (uncompressed) distribution of digital configuration, USB is used for devices
total length can reach up to roughly television signals. For such applica- directly connected to the PC, while
40 metres. tions, a new communication standard FireWire forms the digital link between
The USB link uses a 4-lead cable (see has been developed: IEEE 1394, com- a D-VHS recorder, a set-top box and a
Figure 1). The two thinner wires are used monly known as FireWire. FireWire is digital television.
for data communication, while the two platform-independent, and its perfor- The performance level of FireWire
thicker wires provide power to the con- mance far outstrips that of other exist- presently lies at around 100 Mbit/s, with
nected device interfaces. A special, ing interfaces, including even the most speeds of 200 Mbit/s and 400 Mbit/s
screened version of the cable is avail- advanced SCSI versions. The most approaching feasibility. Just as with USB,
able for critical applications. The power important characteristics of the a simple connector is used which can
leads can supply a total current of up FireWire interface are low cost, ease of be attached with a minimum of effort.
to 500 mA at 5 V. This means that small use thanks to a compact connector,
devices, such as modems and card complete Plug & Play capability and The protocol
readers, no longer need to have their especially high performance. The cur-
own, separate power supplies. The con- rently-used I/O interfaces (Centronics, In a significant departure from existing
nection to the cable is made via a RS232, Ethernet, SCSI and so forth) can interfaces, FireWire allows for isochro-
compact 4-way plug, which measures thus be replaced by a better system, nous data transmission in addition to
only 12 mm 4.5 mm. and communications between the the existing asynchronous data trans-
mission (what this all means is
explained in the following text). In
addition, the interface specification
PC Digital
Digital Camera Camcorder allows FireWire to be used in both
cable and backplane environments
(a backplane provides the internal
USB Digital TV connections between the various
FireWire
components of a computer). The pro-
tocol is thus usable both inside and
outside of the computer enclosure.
Depending on the specific electronic
USB
components used, data rates of 25 to
FireWire
50 Mbit/s are possible on the back-
USB
plane, and as much as 400 Mbit/s is
FireWire
possible with cable. A maximum of
HDD
Set Top Box 16 hubs may be included in the cable
system, and the separation between
any two hubs can be a maximum of
USB
4.5 metres. The maximum total extent
of the cable is thus 72 metres.
Figure 3 illustrates a configuration in
Digital Video Recorder which two computers and a number of
Printer I/O devices communicate with each
982002 - 12 other via the IEEE-1394 bus. Note that
the serial bus is also used on the back-
Figure 2. A configuration in which both USB and FireWire play a role. plane.

CPU memory I /O CPU
parallel bus
serial bus (backplane environment)

bridge
serial bus (cable environment)
CPU memory I /O CPU
I /O I /O I/O
parallel bus
serial bus (backplane environment)

bridge
982002 - 13
Figure 3. Two computers communicate with each other and with peripheral devices via FireWire. Note that FireWire is used for both the
cable connection and the backplane.
Since FireWire is based on high data Physical Layer. These are depicted in tion code (node ID) within each
rates, it places unusually severe Figure 5. device. The 16 bits of the node ID are
demands on the cabling material. further divided into a 10-bit bus ID and
While USB works with a 4-lead cable, Transaction Layer a 6-bit offset ID. Since the highest pos-
FireWire uses a 6-lead cable. This is The Transaction Layer manages data sible address (all ones) is reserved for
illustrated in Figure 4. Two leads are transfers between two devices via the special applications, an actual system
reserved for distributing electrical Serial Bus. The system recognizes three configuration can have up to
power. The allowed dc voltage may lie types of transactions: read (data is 1023 buses, each of which can have
between 8 V and 40 V, with a maxi- transmitted from a device to the main up to 63 independent device connec-
mum total current of 1.5 A. The signal system), write (data is transmitted from tions (nodes).
lines are implemented as two individu- the main system to a device) and lock
ally-screened twisted pairs. (data is transmitted from a device to Link Layer
the main system, which in turn sends The Link Layer looks after delivering
The model the processed data back to the information packets according to a
device). The bus supports the IEEE half-duplex protocol. Each individual
The specification of the FireWire proto- 1212 standard, which uses 64-bit packet is sent via a process called a
col is based on three layers: the Trans- addressing. The topmost 16 bits of the subaction. Two types of subaction are
action Layer, the Link Layer and the address are treated as an identifica- possible:
- asynchronous subaction, in which an
arbitrary amount of data plus some
AL/PET Transaction Layer information is sent to
signal pair #1: red and green
a specific node (device address), fol-
lowing which a confirmation (acknowl-
power wire #1: white edgement) is returned from the desti-
nation device;
power wire #2: black
- isochronous subaction, in which a
variable amount of data is sent at reg-
signal pair #2: blue and orange ular intervals, with simplified address-
ing and without confirmation from the
Outher jacket Signal twisted-pair wires destination device.
Power wires
Each subaction can have up to three
distinct phases:
- arbitration sequence: a device
Outher shield braided which wants to transmit data sends a
copper wire
bus access request to the Physical
Layer. If the device already controls
Signal pair shield braided
copper wire 982002 - 14 the bus as the result of a just-complet-
ed subaction, it receives immediate
Figure 4. The construction of a cable which is suitable for FireWire. access to the bus.

- data packet transmission: the source Microprocessor or PCI bus
device transmits a data packet con- Bus
manager
taining coded speed, format and
transaction information, the addresses Isochronous
of the source and destination devices resource Transaction layer
manager (read, write, lock)
and the data. Isochronous packets
contain a short channel identification
code (ID) in place of the addresses of
the sender and receiver. Link layer
- acknowledgement: a uniquely-
Packet Packet Cycle
addressed destination device will return transmitter receiver control
a confirmation code which indicates
that the data was properly received Node
controller
and contains information regarding the
action taken on receipt of the data.
Physical layer
Isochronous subactions and asynchro-
Data Encode
nous broadcast subactions do not Arbitration resynchronization and
decode
require acknowledgement.
Serial bus Connectors Bus Signal
and media initialization levels
All asynchronous subactions are nor- management
mally separated from each other by
short intervals during which the bus is
in an idle state; these are called sub- 0 1 2
action gaps. An additional gap Connectors 982002 - 15
occurs in the interval between the

Figure 5. The FireWire protocol has three layers which communicate with each other.
completion of the data packet trans-
mission and the receipt of the
acknowledgement. The length of this it translates signals from the cable peripheral devices) is already appear-
gap depends on the physical system back into proper logical levels for the ing on the market, its still too early to
configuration. Figure 6a depicts the Link Layer. In addition, it determines the proclaim that the serial bus interfaces
organization and timing of asynchro- actual electrical and mechanical con- will be a great success. A few years will
nous subactions. Gaps also occur figuration of the connection. Finally, be necessary before this can be
between isochronous transmissions; the Physical Layer acts as a sort of ref- judged. Readers who wish to follow fur-
these are called isoc gaps and are eree which grants devices access the ther developments in this area can
depicted in Figure 6b. bus when they wish to send data. keep a good eye on them via the
Internet. Information about USB can be
Physical Layer The future is what counts found at http://www.usb.org, and
The Physical Layer has three functions. FireWire has its own site at
First, it translates the logical levels of USB and FireWire have a lot to offer. http://www.firewire.org.
the Link Layer into electrical signals for Although the first equipment to use (982002)
the cable, and in the reverse direction these interfaces (both computers and
subaction 1: request subaction 2: response

subaction subaction subaction
gap ack gap ack gap
arb packet gap ack arb packet gap ack
982002 - 16a
first channel second channel third channel
isoch isoch isoch isoch

gap arb packet gap arb packet gap arb packet gap
982002 - 16b
Figure 6. This timing diagram illustrates the difference between data transmissions using asynchronous subactions (a) and isochronous
subactions (b).

We have reason to believe that this is a unique and
novel circuit. It measures ambient light intensity by
means of the serial port on your PC, without any kind
of external power supply. A Visual BASIC demonstra-
tion program is available for the circuit. This program
is easily modified to meet personal requirements.
Design by B. Oehlerking
Light intensity
measurement with a PC
no external power supply required
COMPONENTS LIST
Resistors:
R1,R2,R3 = 10k
R4 = 12k
Capacitor:
C1 = 1F MKT
Semiconductors:
D1,D3 = 1N4148
D2 = low-current LED, red
D4 = low-current LED, green
T1 = BC557C
T2 = BC547C
IC1 = TLC7555
Miscellaneous:
Small encapsulated solar cell,
0.45 V, e.g. Conrad 198030
9-pin sub-D socket, IDC type
10-way boxheader
10-way IDC socket
2-3 m of 10-way flatcable
Figure 1. Circuit diagram of the light intensity meter. Note that the sensor is a small solar cell.
The operating principle of the circuit internal diagram is shown in Figure 2) Its supply voltage is stolen from the
shown in Figure 1 is the time it takes for operates as a comparator, comparing PCs RS232 port, GND providing the
a capacitor to be charged to a cer- the voltages between pins 2/6 with the ground level, while the positive supply
tain voltage (threshold level). The supply voltage between pins 4/8. If the level is created with the aid of the DTR
capacitor, C1, is supplied by a con- voltage between pins 2 and 6 reaches (data terminal ready) line. The RTS
stant-current source consisting of D2, about 2/3 of the supply voltage, the (request to send) line is used to charge
R2, R1, T1 and a solar cell acting as chip output changes from high to low the capacitor as the measurement sig-
the sensor. The result is a capacitor (active). nal travels to the PC via the CTS (clear
charging voltage which rises linearly. The crux of the circuit is that it does to send) line. The length of the time
The CMOS timer IC type 7555 (whose not require an external power supply. interval between discharging and

+U B RESET
8 4
DTR = ON
R 1 7555C
THRESHOLD 6
1 1 1 3 OUTPUT
CONTROL
5 RTS = ON
VOLTAGE
R
1 7 DISCHARGE
WAIT
TRIGGER 2
R
R = 100k
RTS = OFF
1
GND 982005 - 12
Figure 2. Internal structure of the TLC7555 CMOS timer used in the circuit.
NEW MEASUREMENT
COUNT =
COUNT + 1
Table 1.
DTR RTS D4 D2 CTS
off = 10 V, on = +10 V red green off = 0 V, on = +10 V CTS N
= LOW
off off off off off ?
on off off on off
off on on off off Y
on on off on on
USE COUNT
charging is inversely proportional to straightforward. The few parts that go

the measured light intensity. into the circuit are easily fitted on a COUNT = 0
Figure 3 shows the flowchart of a small piece of veroboard or strip-
suggested program which measures board. The solar cell mentioned in the
and evaluates the time interval. Admit- parts list (450 mV) has two screw con- 982003 - 13
tedly, a software loop is not an ideal nections at the back, which double as
solution since it makes the program mechanical fasteners and electrical
Figure 3. Structure of the demo and test
dependent on the speed of the com- contacts. The interface is connected
program written in Visual BASIC. The full
puter used. Unfortunately, Visual BASIC to the PC by way of 2 to 3 metres long
program is available on disk.
offers no alternative when it comes to 10-way flatcable (of which only four
time measurement at reasonable wires are used), which is connected to
accuracy. The program you find on the circuit using an IDC (clamp-on)
the disk with order number 986002-1 connector, and to the PCs RS232 port
(see Readers Services page) is only via a 9-way sub-D socket.
intended as an example to help you The program offering a test mode in
write your own software for the inter- which DTR and RTS may be controlled
face. separately, the hardware may be test-
Because most RS232 interface lines ed with relatively simple means. The
are at 10 V, diode D1 is needed as a test program also reads the status of
polarity reversal protection. Diode D3 the CTS line. The consequences of the
prevents a too negative potential at different levels of DTR and RTS for the
the base of T2. LEDs and the CTS line are listed in
Construction of the circuit should be Table 1. (982005-1)

JFET tester
FET matching and testing made simple
Many designers
shy away from
using JFET tran-
sistors although
numerous circuits
would benefit
from using these
devices. When-
ever very high
input impedance,
high operating
frequency and rel-
atively low noise
are paramount
design require-
ments, a JFET
may be a good
choice. This arti-
cle aims at
removing some of
the general hesitation Although the staggering amount of
data you can obtain from a FETs
channel version. Although the symbol
of a JFET is different from that of a
about using JFETs by datasheet may cause the odd apoplec- bipolar transistor, it may help you
tic fit with some of you, it can be think of the D (drain) electrode as the
describing a simple upheld that there are two absolutely collector, the S (source) electrode as the
tester that allows you vital selection criteria (or electrical emitter, and the G (gate) electrode as
parameters) which help to identify an the base. Unlike an n-p-n transistor,
to measure two cru- unknown JFET, or find so-called however, the operating range of the
matched devices from a batch of JFETs parameter called gate-source voltage
cial electrical parame- (more about this further on). (VGS) is negative. In other words, the
ters of these devices. The present tester is only suitable gate is made negative with respect to
for n-channel small-signal JFETs (junc- the source.
tion field-effect transistors). This does Now, lets first take a moment to
not detract from its usefulness how- explain the notation of the various
ever because chances are pretty small parameters symbols you will find in
that you will ever encounter a p-chan- the datasheets and this article. The
nel JFET in your lifetime! above example, VGS, should be read as
follows: Voltage (V) between Gate and
MEETING THE JFET Source (GS). Note that the index GS is
Although most of the background the- printed smaller and lower than the
ory relevant to JFETs may be found in capital letter V. Similarly, the symbol ID
any reasonable electronics textbook, it means current (I) in drain (D) chan-
may still be useful to present a brief nel, and VDS means voltage (V)
recap in this article. between drain (D) and source (S).
The circuit symbol of the n-channel Once you are comfortable with the
JFET is shown in the basic connection basics of this notation system, you will
diagram in Figure 1. The in-going have little difficulty in unravelling the
Design by M. Frankowski arrow at the G (gate) denotes the n- meaning of the various symbols used
Elektor Electronics 2/98

12
Visit our Web site at http://ourworld.compuserve.com/homepages/elektor_uk
ID DRAIN SATURATION
1 CURRENT 2
The second important JFET parameter
D is the value of the current through the
drain-source channel when VGS is at
G 0 V, and VDS, at 15 V (usually!). When
these two conditions are satisfied, the
VGS S
drain current will remain practically
VDS
constant at a certain maximum value.
In other words, the drain-source chan-
970075 - 11
nel is saturated; it will not pass more
current. The symbol used for the drain
saturation current is ID(ss). Like ID,
Figure 1. Basic JFET ID(ss) derates (worsens) with increasing
connection circuit. temperature, as illustrated in Figure 3.
PRACTICAL CIRCUIT
to describe the electrical parameters of Admittedly, that was rather a lot of Figure 2. The pinch-off
JFETs (and other transistors). theory to wade through. High time to voltage VGS(P) and the drain satu-
discuss how the two measurements ration current, ID, are easily deter-
P I N C H - O F F V O LTA G E mentioned above are performed in mined if you have a transfer charac-
The first vital JFET parameter is called practice. Lets look at the circuit dia- teristic graph like this available
the pinch-off voltage, symbol VGS(p) or gram in Figure 4. (example: BF256C JFET; source:
simply V(p). Unfortunately, due to fab- Philips Components).
rication techniques, this parameter is Pinch-off voltage measurement (S1
subject to relatively large tolerance. In not pressed)
other words, the actual VGS(p) spec This measurement is performed when
of the JFET you have available may S1 is not actuated. The pinch-off volt- 3
differ considerably from the value age is indicated on the DVM (digital
specified in the datasheets. The pinch- voltmeter) connected to the output of
off voltage is the gate-source voltage at the tester. Imagine a JFET is inserted in
which negligible drain current flows. the D.U.T. (device under test) sockets.
Hence the name: this voltage pinches A reference voltage of 100 mV is cre-
off the current flow in the drain-source ated with R1-D2-P1-R2, and connected
channel to virtually nought. The to the non-inverting input of opamp
remaining current is due to leakage, IC2. The inverting input is connected
and usually defined as 1 nA, 10 nA or to the positive supply rail by a 10-M
even 10 A by the manufacturer. The resistor (R3), as well as to the FET
pinch-off voltage is stated assuming under test, which is included in the
that VDS is held constant. Here, too, feedback path to the opamp output.
opinions differ: some manufacturers Since the gate of the JFET is at ground
state VGS(p) at VDS = 10 V, others at potential, the voltage at the source is
VDS = 15 V. It makes little difference, controlled to make the gate more neg-
however, at long as you know that ative than the source (VGS). Because
VDS is a constant value, or nearly so. the opamp will attempt to make the
The JFET tester described here mea- voltages at its inputs equal, it supplies
sures VGS at IDS = 10 nA, and does a gain at which the voltage across R3
not use a constant voltage for VDS. Yes, will equal 100 mV. Resistor R5 then
it can be done! Referring back to the drops 10 nA 100 k = 1 mV. In this
graph in Figure 2, you can see that the way, VDS of the JFET is controlled Figure 3. Drain current (ID) derating
ID curve for values of VGS approach- until IDS equals 100 mV/10 M = as a function of junction tempera-
ing the VGS(p) value (like VGS = 10 nA. The result is that VGS(p) ture (Tj).
4 V) runs virtually straight from VDS = appears on the DVM. The error
2 V onwards. In other words, ID sources in this measurement are ID3
remains virtually constant as long as (10 pA), the input bias current of the
VDS is between, say, 3 V and 15 V. So, TL071 opamp (<200 pA) and its input with 15 V rather than 12 V (as the rest
the error caused by the non-constant offset voltage (<10 mV). of the circuit), the range of VGS is
value of VDS in the test circuit is neg- Some JFETs have a pinch-off volt- extended to about +2 V.
ligible, because VDS is always in the age between 0 and 2 V. To enable
range where ID is virtually constant. these devices to be tested also, a volt- Drain saturation current measure-
Thats why JFETs make great constant- age regulator is used in the negative ment (S1 pressed)
current sources! supply rail. By supplying the opamp This is a much simpler measurement.
Elektor Electronics 2/98 13

D1 A
4 A 12V 1N4001 D2 D3
R3
* zie tekst
10M
B C P1 D
B 0V65
5k
IC2
* see text
C 0V1 1N4148
1N4148
1 * siehe Text
voir texte
D 0V1 / 0V7
3 7
5
6
E *
R2 TL071
2
E 4V6 / 11V3
22k
4
C4
D.U.T. D 1n R5
D.U.T. D
K2
100k
D
T2 C1
G
S
G S
100
16V
K3 S1
S G
D 0V / DVM
S M1
K4 R4
K1 G
C2 C3 C5 G 100k
R1 R6
S
5k6
10
100n 100n 10
63V
D * DVM
15V
5mA
79L12
IC1
970075 - 14
Figure 4. Circuit dia- Figure 5. Copper track

gram of the JFET layout and component
tester. mounting plan of the
PCB designed for the
JFET tester (board not
Pressing S1 causes the source to be inexpensive mains adaptor with available ready-
connected to the gate, so that VGS = an output voltage of about 5 made).
0 V. Although the reference voltage at 15 VDC. Because the tester will
the +input of IC2 remains 100 mV, D3 only draw a few tens of mA when
now drops its normal forward bias S1 is pressed to perform a drain C1
C5
HOEKEN3
voltage of about 0.7 V. Consequently saturation current measurement,

HOEKEN
the opamp pulls its output to (practi- D1

cally) the positive supply level. Resis- K1 C2
0
C3
tor R5 then carries (120.7) V/100 k + IC1
R2
R1
or a little more than 100 A. This cur-
D2
COMPONENTS LIST D3
rent also flows through R6, where it is P1
R3
added to the drain saturation current. Resistors: 970075-1
As this will be in the mA region, the R1 = 5k6 1-570079

IC2
error is, we feel, insignificant for all R2 = 22k T

R3 = 10M S1
practical intents and purposes. C4 DVM
R4,R5 = 100k
Because R6 has a value of 10 , the R6 = 10 (1% if necessary)
K3 OUT
gds
ID(ss) indication on the DVM is in P1 = 5 k 10-turn cermet pre-
K4
R6
R5
gsd
R4
(mA10). Mind you, you are measur- set, vertical

dgs
ing a voltage that indicates a current!
K2
HOEKEN1
True, a value of 1 would have been

HOEKEN2
Capacitors:
more logical because then the readout C1 = 100F 16V
is simply in mA. A higher output volt- C2,C3 = 100nF
C4 = 1nF
age is used, however, to enable the
C5 = 10F 63V
DVM to be switched to a higher range
with resultant higher accuracy (in gen- Semiconductors:
eral!). Owners of 4.5-digit DVMs may D1 = 1N4001
use a 1- resistor in position R6. What- D2,D3 = 1N4148
ever DVM you use, the accuracy of the T1 = device under test (JFET)
tester will benefit from the use of a 1% IC2 = TL071CP
(close-tolerance) resistor for R6. IC1 = 79L12
970075-1
Miscellaneous:
The voltages indicated in the circuit M1 = digital voltmeter (DVM).
are typical. The first voltage applies K2K3,K4 = 3 rows of 3 IC
when S1 is not pressed, the second, socket pins, turned sockets.
when S1 is pressed. Unless otherwise S1 = Digitast press-key, 1
indicated, measurements are with make contact (ITT-Schadow).
respect to the ground rail, i.e., the 0 V K1 = mains adaptor supply
socket, flat model.
input of the DVM.
The circuit may be powered by an
14 Elektor Electronics 2/98

even very low power adaptors may be HINTS AND KINKS
used. Any small adapter rated at 6
12 VDC should be suitable because it If you want to do some testing on
will typically supply at least 15 V when known JFETs, we recommend the
only a few milli-amps are drawn. BF245 and BF256 series to start with .
When S1 is not pressed, the current Another commonly used JFET (partic-
consumption is about 5 mA. ularly outside Europe) is the 2N5486.
The highest drain saturation current
that can be measured by the circuit is
CONSTRUCTION AND about 40 mA. If you see anything
ADJUSTMENT above this value on your DVM display,
A ready-made printed circuit board is, the measurement is probably not valid.
unfortunately, not available for this Take the internal resistance of your
project. The artwork to make your DMM into account when measuring
own board is, however, shown in Fig- the voltages indicated in the circuit; at
ure 5. Look carefully at the compo- some junctions, even 10 M may be a
nent overlay to make sure each and relatively heavy load.
every polarized part is fitted the right
way around. There are three D.U.T.
sockets on the board to accommodate MATCHING ,
different pin-outs of the JFETs you WHATS IT FOR?
want to test. Make sure you know the Some (audio) amplifier stages of the
pin-out from a datasheet, else neither differential type use JFETs which have
measurement will make any sense at to be matched for optimum perfor-
all, and you may destroy the device mance. The two elementary tests car-
under test. ried out with the aid of the present
Preset P1 is adjusted until it drops tester should enable you to pick two
exactly 100 mV (use a 10-M DMM for JFETs with almost equal electrical Figure 6. Suggested
this adjustment). properties from a batch of, say, ten. front panel layout for
Finally, a suggested front panel lay- (970075-1) the JFET tester.
out is shown in Figure 6.
Frequency display
and VFO stabilizer
eliminates frequency drift in
home-brew and surplus HF receivers
One of the most ving the LCD display mod-
ule. Two versions of the
frequent topics unit were built, one using
for discussion the 8031 microcontroller,
and this version using the
among the many PIC 16C54. I have tested the
circuit at various frequen-
Home Brewers cies between 8 MHz and 80
on the amateur MHz.
bands is the diffi-

culty of building CIRCUIT
DESCRIPTION
a VFO that is
The circuit diagram of the
stable enough to VFO stabilizer is shown in
be used on all of Figure 1. The circuit is basi-
cally a Frequency Locked
the HF bands. Loop (FLL). As many of
you will be aware, the
The relatively PIC16C54 microcontroller is
simple circuit a complete computer on a
chip with 51212 bits of
described here ROM, 32 bytes of RAM, a
will stabilize the clock circuit, 12 I/O pins, a
real time clock/counter, and
frequency of an several other useful fea-
tures. For a full description
HF VFO, and of the PIC16C54 and its
provide a digital instruction set, see the
Microchip data book or
frequency dis- The circuit uses a microcontroller to Microchip data sheet DS300151.
play. The display will count the frequency of an HF VFO
(variable frequency oscillator), add or
The RF signal picked up from the
VFO is amplified and digitized by T1,
allow for the different subtract the IF (intermediate fre- then buffered by IC1b. The BSX20 is a
quency) offset, and display the signal fast switching transistor for use up to
frequency offsets frequency on a standard Hitachi intel- 200 MHz. The amplified signal is gated
required for USB and ligent LCD display module. The VFO by IC1c and IC1d. A 100-ms gate pulse
frequency is stabilized by sending a is generated by a software delay loop
LSB, and the fact that correcting voltage to a varicap diode in in the PIC. The square wave pulses
the VFO. The circuit is based on a from IC1d are counted by IC2 which is
the VFO frequency Huff & Puff stabilizer that I have configured as an 8-bit counter.
may be above the been using for several years. The output of IC2b is connected to
The circuit design philosophy was the RTCC input of the PIC through a
signal frequency on to keep the hardware as simple as pos- 1.2k resistor (R6). The PIC has a real-
some bands, and sible, and to use inexpensive and read-
ily available components. This was
time clock/counter (RTCC) which can
count pulses applied to the RTCC
below it on others. made possible by using a microcon- input (pin 3). The RTCC register is only
troller chip which was programmed to eight bits wide giving a maximum
take care of most of the complex func- count of 255. If the PICs internal
By Eamon Skelton, EI9GQ tions like counting, arithmetic, and dri- prescaler is set to divide by 256 the

18
maximum count is 65,535, effectively

making a 16-bit counter. With a 1-ms 1 5V
5V C4
5V
gate time this would allow the counter

100n
to count up to 65.535 MHz but the res- 14 14
R9 C3
4k7
olution would be 1 kHz which is not IC1 IC2 100n
good enough for our purposes. 7 7
14 4 2x
1
The 74HC393 counter chip MCLR 1N4148 2 7
D4 6 R7 D1 8
increases the count to 24 bits, or D5 7
RB0
17 22k IC4
6
RB1 RA0 3 R12
16,777,215. With a 100-ms gate time D6 8
RB2 RA1
18 R8 D2
R10 IC3 4
1k2
OFFSET
this will allow a maximum count fre- 47k
D7 9
RB3
22k
10 PIC16C54 1 EN TL071
quency of 167.77721 MHz and a reso- RB4
- XT/P RA2 K3
11 2 RS
lution of 10 Hz, that is, if you can find +/ R11
12
RB5 RA3
47k RB6
logic chips that are fast enough. One 13
RB7 RTCC
3 C8 C9
problem with this arrangement is that OSC1
OSC2/
CLKOUT 100 1
it is not possible to read the least sig- R13 R14
16 15 5
R6
16V 16V
X1
nificant 8 bits directly from the 393 S1
1k2
1k2
1k2
counter. C5 C6 C7
4MHz
This problem is overcome by send- 40p
18p 33p
ing pulses to the counter input
LOCK / UNLOCK
through gate IC1d. By counting the
number of pulses it takes to make the
5V D7 D6 D5
counter overflow it is a simple matter GATE INC RESET K1
D7
to calculate the value in the 393 at the
100
100
100
R3 R4 R5
D6
time the gate was closed. As the PIC C1
R2
IC1d D5
CTR4
1k2
12 3
internal prescaler can not be read IC1c 11 0 D4
13 & 1
+ IC2a 4
directly, a similar method is used to
LCD MODULE
100n 9
8 CT 5
IC1b 10 & 2
calculate the value in the internal 4 CT=0
3
6
6
prescaler. Pulses are applied to the 5 &
R1
prescaler input by pin 13 of the PIC EN
100k
(RB7) until the prescaler overflows. IC1a

1 CTR4 11
3 0 RS
The most significant 8 bits can be read K2 C2
T1
2 & 13
+ IC2b 10
directly from the RTCC register. This 12
CT 9
1n CT=0 8
may seem like a strange way of read- BSX20 3
5V
ing the count but it is quite easy to IC5
D3 7805 5V
implement in software and makes the
circuit hardware very simple. BSX20
1N4001 C11 C10 C12
Now that we have the count result
stored in the PIC, the IF offset must be 10 40V 10 40V 100n IC1 = 74HC00
P1
IC2 = 74HC393
added or subtracted; the result is the D4 10k
CONTRAST
signal frequency in binary. This num- C E
1N4001
ber is converted first to BCD, then to B 980004 - 11
ASCII and finally sent to the LCD dis-

play module. A new count takes place Figure 1. Circuit dia-
about 9 times every second, the dis- end of each count/display cycle, the The width of gram of the Fre-
play is updated every second count, or counters are reset and the cycle is the correction quency Display and
just over 4 times a second. Updating repeated again. No attempt is made to pulse depends on VFO Stabilizer.
the display more often than this causes control the frequency of the VFO. The the degree of VFO
the last digit to flicker, updating less control voltage at the output of the drift. If the error is
often makes the display sluggish integrator is set at about 2.5 volts and less than 10 Hz then a very short pulse
when you tune quickly across the remains there until the of about 2 ms duration is generated.
band. Before the first digit of the fre- LOCK/UNLOCK button, S1, is Greater frequency errors result in
quency is displayed a test is done to pressed. longer correcting pulses: 20 Hz =
find out if it is a zero. If it is then a 4 ms, 30 Hz = 6 ms, 40 Hz = 8 ms and
blank space is displayed instead, giving so on. This results in much tighter con-
automatic leading zero suppression. HOW THE VFO IS trol of the VFO than can be achieved
Whether the IF offset is to be added or CONTROLLED with a conventional Huff and Puff
subtracted is determined by the state When you find a frequency that you circuit.
of the ADD/SUBTRACT (+/) input, want to stay on, press the When the circuit is in locked mode,
which is linked to an input pin on the LOCK/UNLOCK button. After the the LCD display readout changes:
PIC. Whether the offset is for USB button is pressed there is a 100 ms MHz disappears from the display and
(upper sideband) or LSB (lower side- delay, then the result of the most is replaced by the 10-Hz digit. To the
band) is determined by the state of the recent count is stored in three regis- right of this is the error level display
OFFSET input pin. Suggested circuits ters in the PIC. The result of all sub- which is shown as E0 to E9. E0 means
for controlling the ADD/SUBTRACT sequent counts are compared with that the error is less than 10 Hz, E1 is an
(+/) and OFFSET inputs are shown this value. If the current count is less error level of 20 Hz, E9 is an error level
in Figures 2 and 3 respectively. Mind than the stored value, the VFO has of 100 Hz. If the error level is greater
you, these are just examples, the exact apparently drifted lower in frequency; than 9, a 9 is still displayed. The last
configuration of the switches depends a positive pulse is sent to the integra- character on the display is the correc-
on the requirements of your HF tor (IC4) to correct the error. If the cur- tion direction indicator: > indicates a
receiver. rent count is greater than the stored positive pulse, < indicates a negative
So far the circuit is just acting as a value then a negative correction pulse pulse. A low error level indication of 0
frequency counter and display. At the is generated. or 1 and a continuous rapidly alternat-

OFFSET SELECT Figure 2. Suggested method of is fairly easy to build, you should real-
2 (OFFSET)
switching the ADD/SUBTRACT (+/) ize that considerable experience may be
control input on the board. required to establish the link with the VFO
in your receiver. Before building this
USB OSCILLATOR
ENABLE USB project, you should, therefore be pos-
12V
MHz. To lock to a new frequency itive about the following points
simply press the LOCK/UNLOCK
LSB OSCILLATOR LSB button again. 1. The receiver is a heterodyne (mixer)
ENABLE
design. The VFO frequency is
980004 - 13
THE PROGRAM between 8 and about 80 MHz.
Various interesting options are avail- 2. The VFO has varicap control allow-
ing up/down indication means that all able as regards the control software ing a tuning range of 3 kHz to be
is well, and the VFO frequency is which resides in the PIC microcon- produced by a control voltage swing
within the control loop bandwidth of troller. To enable you to make your of 5 V (2.5 V = centre tuning).
the system. choice, we first tell you whats avail- 3. The VFO signal can be tapped in
The varicap diode control of the able for this project, and then make an a safe way (preferably by inductive
VFO should be arranged so that the important statement. coupling) and has a level of at least
maximum frequency change is The items available for this project 100 mVpp.
approximately 3 kHz. This should be are (1) a ready-programmed PIC (for
sufficient range to keep a moderately 10.7 MHz IF), (2) a ready-made PCB Most experienced radio amateurs (and
stable VFO locked for hours or even and (3) a diskette containing the not only those who actually transmit!)
days! source code files for the PIC control will be able to come to terms with
When you need to change fre- program. For prices, order numbers these conditions, if necessary with the
quency, press the LOCK/UNLOCK and other relevant information, please help of a fellow ham.
button again. This puts the device in refer to the Readers Services pages Back to your options! Heres what
unlocked mode, the integrator output elsewhere in this issue. you can do.
is set at 2.5 volts and the display And now, a serious note. Although
changes back to 6 digits followed by this frequency display/VFO stabilizer 1. I have a receiver with an IF of
10.7 MHz.
Simply order the PCB, the ready-pro-
Huff and Puff grammed PIC and the source disk
supplied through our Readers Ser-
Although this circuit is generally referred to as the huff and puff stabilizer vices.
among English-speaking hams, it should really be called the PA0KSB VFO sta- 2. I have a receiver with an IF other
bilizer after its inventor, the Dutch radio amateur Klaas Spaargaren, PA0KSB. than 10.7 MHz.
The circuit can act as an outboard enhancement with any reasonable VFO, Order the PCB (980004-1) and the
keeping the output frequency stable within a couple of hertz without adding source code disk (986006-1) as separate
parasitics and other whistles to the VFO output. items. Purchase a PIC16C54, and get
A crystal oscillator, whose output frequency need not be a round value, is fol-
hold of a an assembler and a PIC pro-
lowed by a divider cascade which open a gate for, say, 1 second. Next, a
grammer. Edit the source code as
binary counter counts the VFO cycles within this gate period. On closing the
gate, the last counter digit is compared to 8.If it is smaller, the 23 output of explained in the README file, and
the counter is reset to 0. If it is greater, the output is made logic 1. The counter then program your own PIC.
output is applied to a D-bistable. If the gate signal drops to 0, the first one- 3. I have a receiver with an IF of
shot is triggered. Next, the second one-shot clocks the 1 or the 0 into the D- 455 kHz or 7.8 MHz.
bistable. Finally, counter is reset by the third one-shot. If the counter signal Do the same as under 2. The necessary
was a 0, the Q output of the bistable goes high, charging the capacitor and files are on the disk.
so causing the VFO frequency to go up. By contrast, a counter signal of 1 4. I can make my own PCBs and pro-
causes the frequency to go down. In this way, the VFO frequency puffs at a gram my own PICs.
rate of a few hertz around the stabilization point at which the counter detects Order the diskette only (986006-1).
an 8 as the last digit. Over the years, the basic design by PA0KSB was Make your own PCB using the art-
enhanced and followed by several variants using a raster of about 40 Hz, allow- work shown in this article. Burn your
ing virtually continuous tuning. own PIC for the IF you require. Tell
your friends about it.
from
VFO buffer A PIC programmer can be built from
4
6 14 one of the many published designs, or
5 &
74191
11 a commercially made unit can be pur-
1
/ 4 7400 7 chased from one of several companies
advertising in this magazine. The
from
XTAL osc. source code file on disk may be edited
and
dividers
2 using any ASCII word processor.
6
7474 1M Details on modifying the IF offset are
3
also available. Examples are available
for 10.7 MHz, 455 kHz and 7.8 MHz.
3
1000
6 3 6 3 6
74121 74121 74121 CONSTRUCTION
If you use the PCB layout shown in
10 11 9 14 10 11 9 14 10 11 9 14 Figure 4 and a ready-made board, con-
struction of the circuit is fairly easy.
980004 - 14
100n 100n 100n Check the orientation of all polarized
components (electrolytic capacitors,
diodes, ICs, transistor T1). Use sockets

Figure 3. Method of switching the OFFSET select

3 input on the board. Note that USB/LSB selection
is only required on SSB receivers.
to BPF/LPF
CONTROL INPUTS
160M
ues shown in the circuit diagram
80M
worked fine with several 4-MHz crys- Components list
40M tals from the authors junkbox. If the
crystal you are using requires different Resistors:
30M
12V R1 = 100 k
20M
capacitor values it may be necessary to R2,R6,R12,R13,R14 = 1k2
change the value of C6. R3,R4,R5 = 100
17M
In the authors HF transceiver, the R7,R8 = 22k
15M circuit was put in a small box made R9 = 4k7
12M from copper clad glass fibre board, this R10,R11 = 47k
box was mounted on top of the VFO. P1 = 10k preset H
10M
The RF input and control output con-
4x 1N4148 Capacitors:
nections were made with miniature
C1,C3,C4,C12 = 100nF
(RG174 or similar) coaxial cable. A C2 = 1nF
short length of ribbon cable is used to C5 = 40pF trimmer
1k2
connect the LCD module to the PCB. C6 = 18pF ceramic

ADD/SUB The OFFSET select input may be con- C7 = 33pF ceramic
(+/) nected to the USB/LSB switch on the C8 = 100F 16V radial
C9 = 1F 16V radial
1k2
R11
front panel of the rig. The ADD/SUB-
C10,C11 = 10F 40V radial
TRACT (+/) input may be connected
980004 - 12 to the band switch of the rig using four Semiconductors:
diodes (see Figure 2). If you only need D1,D2 = 1N4148
for the ICs if you want to experiment to subtract the IF offset, you can con- D3,D4 = 1N4001
with different logic IC families, LS, nect the add/subtract (+/) input to T1 = BSX20
ALS, HC etc. If you use 74HC or ground. IC1 = 74HC00 (see text)
74ALS series chips for IC1 and IC2 it (980004-1) IC2 = 74HC393 (see text)
will not be necessary to have a heat IC3 = PIC16C54-XT/P (order code
986502-1)
sink on the 5-V regulator. The circuit
IC4 = TL071CP
was tested with HC ICs, and worked IC5 = 7805
reliably up to about 50 MHz. Higher
input frequencies should be possible if Miscellaneous:
you use ALS ICs. X1 = 4 MHz quartz crystal
The type of opamp used for IC4 is S1 = push-button, 1 make contact
quite critical, the ADOP07CN gave K1 = 14-way SIL header
Figure 4. Copper track LCD module 116 characters
very good results. If you do not have layout and component PCB only, order code 980004-1
an ADOP07CN available, the overlay (board available Disk only, order code 986006-1
TLO71CN also works quite well. ready-made through the PIC only, order code 986502-1
Readers Services).
THE DISPLAY
Any general-purpose 1-line 16-charac- + 0 IC5 980004-1
1-400089 C5
ter display that uses the Hitachi C11 D4
G4
tnemgeS )C(
G1
R7
HD44780 chip should be suitable (the 4 C12 K1
D1
author used a type 16166 LCD display
D3
P1
C10 C6 D2
module). Some of these displays have
R8 C9
LED or electroluminescent backlight-
R2
X1
C1
ing built in. Do not spend large sums R12
IC3
of money on these displays, they are C7

IC1
IC2
W1
C3
often advertised for less than 5.00. T1
R6
IC4
R9
C4 T
R1
R5 R13 R10
TESTING C2
R4 R14 R11
G2
G3
When the unit is first powered up, R3

T +/- S1 C8
offset
adjust preset P1 for best contrast on
the LCD display. Connect your VFO to
the input (C2), set the ADD/SUB input
high to add the IF offset, or low to sub-
tract the IF offset. Set the OFFSET
switch for USB (high) or LSB (low).
The display should show the approx-
imate frequency of the VFO plus or
minus the IF offset.
The best way to calibrate the
counter accurately is to tune your
receiver to a frequency standard signal
or a station of known frequency accu-
(C) Segment
racy, then adjust C5 until the displayed 980004-1
frequency is correct. The capacitor val-

AVC for PCs
limits differences in sound level
An annoying phe-
nomenon (not
restricted to PCs) is
that each and every
programme that pro-
duces sound does so
at a different level.
This means almost
constant adjustment
of the volume control
to ensure audibility of
one programme and
protection of the ear
drums with another
one. The control cir-
cuit described in this
article is designed to
obviate this nuisance:
it constantly monitors
the signal even at the Brief specification
output of the sound- Power output 1.2 W
card and adjusts it Maximum input 1V
Compression 10:1
when required. Use Supply line 12 V, 6 VA
of the circuit is not Output load 8 (LSP); 10 k (line)
Input sensitivity280 mV (gain line in to out = 0 dB; distortion at output = 1%)
restricted to PCs; it 120 mV (gain line in to out = max; distortion at output = 1%)
may also be used as
Line in to LSP out (input voltage = 200 mV)
a dynamic limiter in THD+N 0.25% (20.5 W)
existing audio equip- Signal-to-noise 70 dB for 0.5 W output at maximum gain
Channel separation >45 dB
ment.
Line in to line out (input voltage = 200 mV; no loudspeaker connected)
THD+N 0.047%
Signal-to-noise 80 dB
Channel separation >73 dB
Design by T. Giesberts

24
In general, the signal levels in current volume control (AVC) circuit

audio equipment are equalized and is shown in Figure 1. The 1 LINE
standardized (although there are still stereo audio signal at the out-
some exceptions). Software manufac- put of a sound card used in a
turers do not seem to know or care multimedia PC is applied to preamp PA
about this. Anyone who has ever the line input. The active part LINE LSP
opened two different sound programs of the circuit consists of two TDA1013
will know of the quite different levels integrated amplifiers that
various effects often have. This is obvi- contain a variable preampli- + 12V
ously an annoying situation and one fier and a compact output +
which makes the constant adjusting of amplifier.
the volume control a necessity. The signal from the out- 10V
12V +
The present circuit offers a solution put amplifier is freed from
0
to this problem. It consists of a any direct voltage and then
dynamic compressor with a control applied to a discrete rectifier.
range of 10:1 which ensures that very After the rectified signal has
loud and very soft sound passages are been processed, it is used to
TDA1013
attenuated or amplified respectively. control the amplification fac-
LINE LSP
This results in a much narrower preamp PA
dynamic range of audio signals which
Figure 1. Block dia-
makes adjusting the volume control a gram of the auto-
much less frequent necessity. It proves matic volume control
that something that appears difficult in LINE
circuit for PCs.
software can be easily achieved by a 980023 - 11
small electronic circuit.
tor of the preamplifiers. The control
circuit is based on a number of dis- sound channel (lefthand or righthand)
DESIGN crete operational amplifiers. The with the highest peak signal level
The block diagram of the automatic design is an OR-type, so that the determines the amplification factor of
2 R2
220
C3
22
R9
220
C12
22
K2
12V 12V
LINE
R5 R12
220k 220k
C6 C7 C15 C16
C4 C13
1 63V 100n 1 63V 100n
4 3 680n 4 3 680n
R3 R10
10k
10k
6 6
K1 C5 C14
C1 R1 150n C10 R8 150n
8 IC1 5 8 IC2 5
560 560
TDA1013B TDA1013B
220n C9 220n C18
470 470
LINE 2 2
C8 25V C17 25V

7 1 9 7 1 9
K3
100n R6 100n R13
R7 R4 R14 R11
C2 C11
33
1k
4k7
33
1k
4k7
2n7 2n7 LSP
R15 R18
20k
20k
R16
C22 10k
Figure 2. The diagram
D3
6 of the automatic vol-
R21
R27
1n
1k
7
IC4b D1
2 ume control for PCs
5 1
100k 1N4148 IC3a shows that the circuit
3
2 BAT85 has been kept
30k
R26 R17
13 1
14
10k IC4a
3
C19 R23 straightforward.
IC4d 1k
12
390n
R19
C21 R24
10k
10k
12V 9 12V
100n P1 D4 R22
8 6
1k IC4c D2
12V R25 10 7
BF256B BF256B 50k C20 1N4148 IC3b
10M
5
T2 T3 BAT85 T1
30k
22 R20
10V
BF245A
D6 D5
C27 C26 8 C25 4 C24 C23
IC3 = CA3240
IC3 IC4 IC4 = TLC274
2200 220 4 100n 11 100n 100
25V 10V 25V 25V 5V6
1W3 0W4
980023 - 12

C18 C27 980023-1 T1 T2
Parts list
3 K3 0 + T3
H1
H3
D5
R7
Resistors: D6
C23
R1, R8 = 560 C9 C8
R18
R2, R9 = 220 R19 C26
C16
R14
R3, R10, R16, R19, R24, R26 = 10 k C7 R20
R13
R6
LSP
R4
R4, R11 = 4.7 k
R15
R16
R17
OUT1
C3 C6 C15
IC1
D1
IC3
D2
R5, R12 = 220 k C17
IC2
R6, R13 = 3.3
C22
R7, R14, R21, R22, R23 = 1 k
R12
R11
R10
C25
R2
R3
R5
R15, R18 = 20 k
C14
R27
C5
C12
R17, R20 = 30 k Line
R26
OUT2
K2 R9
C4
R22
R21
R25 = 10 M IC4
R27 = 100 k
R1 C2 C13
P1 = 50 k (47 k) preset P1 C20 C24 C19
C1 C11 D3
D4
R25
R24
R23
Capacitors: C10 R8
C21
K1
H2
H4
C1, C10 = 0.22 F tnemgeS )C(1-320089

Line
C2, C11 = 0.0027 F
C3, C12, C20 = 2.2 F metallized
polyester (MKT), pitch 5 or 7.5 mm 980023-1(C) Segment
C4, C13 = 0.68 F
C5, C14 = 0.15 F
C6, C15 = 1 F, 63 V, radial
C7, C8, C16, C17, C21, C24, C25 =
0.1 F
C9, C18 = 470 F, 25 V, radial
C19 = 0.39 F
C22 = 0.001 F
C23 = 100 F, 25 V, radial
C26 = 220 F, 25 V, radial
C27 = 2200 F, 25 V, radial
Semiconductors:
D1, D2 = BAT85
D3, D4 = 1N4148
D5 = zener diode 5.6 V, 400 mW
D6 = zener diode 10 V, 1.3 W
T1 = BF245A
T2, T3 = BF256B
Integrated circuits:
IC1, IC2 = TDA1013B Figure 3. The printed-
IC3 = CA3240E circuit board for the
IC4 = TLC274CN automatic volume
control.
Miscellaneous:
K1K3 = 3.5 mm stereo audio socket
for board mounting
between 6.5 V (+5 dB) and 2.0 V the line outputs (R2-C3 and R9-C12).
PCB Order no. 980023-1 (see Read-
ers Services towards the end of (80 dB). The output amplifier outputs are
this issue) The control voltage is applied to provided with large electrolytic capac-
pin 7 of the IC. The line output is at itors, C9 and C18.
pin 6, which is linked via a capacitor The supply lines are decoupled by
to pin 5, the input of the output C7 and C16.
amplifier.. Filters R6-C8 and R13-C17 ensure
the stereo preamplifier. The circuit has three stereo termi- that the amplifiers remain stable at
The values of various components nals: line in, line out, and power out. high frequencies.
in the control circuit are chosen to The power output is 2.5 W for a
ensure a fast attack time and a long loudspeaker impedance of 8 and a
release time. This ensures that short- supply line of 18 V, which is sufficient RECTIFICATION AND
duration signal peaks are effectively for most applications. REGULATION
suppressed, whereupon the circuit The analogue input signal at the The audio signal to be rectified is taken
recovers (relatively) slowly from the line input, K1, is applied to pin 8 of from the loudspeaker terminals and
damping action. IC1,raised in the preamplifier and out- applied to IC3a and IC3b. The follow-
Power for the circuit is derived put via pin 6. The transfer between ing description is based on IC3a.
from a standard 12 V mains adaptor. pins 8 and 6 depends on the control Negative signals are inverted by the
voltage at pin 7. op amp and amplified by a factor that
The line signal is attenuated and its depends on the ratio R15:R16. In the
CIRCUIT DESCRIPTION level made suitable for inputting to present circuit, this is 2, that is, atten-
In the circuit diagram in Figure 2, the the output amplifier by networks uation. With positive signals, the op
preamplifier-output amplifier combi- R3-R4 and R10-R11. Assuming a supply amp is overdriven and its output neg-
nation is contained in IC1 and IC2. This line of 12 V, the output amplifier is dri- ative. Diode D1 is then cut off and half
type of IC is a compact 4 W audio ven fully (Po(max) = about 1.2 W into the input voltage is available at its
amplifier with integral voltage-con- 8 ) by an input signal of 90 mV. cathode [R17/(R15+R16+R17)]. This
trolled volume control. The range of RC networks are provided at the means that the op amp behaves as a
the logarithmic volume control is inputs (R1-C1-C2 and R8-C10-C11) and full-wave rectifier/amplifier, whose
8090 dB with control voltages amplification is the same (0.5) for both

+6
30
4 +5 20
+4
10
+3
+2 5
+1
d
B -0 2
r %
-1
1
-2
0.5
-3
-4
0.2
-5
-6
0.1
20 50 100 200 500 1k 2k 5k 10k 20k
20 50 100 200 500 1k 2k 5k 10k 20k
Hz 980023 - 13a Hz 980023 - 13b
10
1 Figure 4. Some graphs to show a few of

the electrical properties of the AVC. (a)
0.5
is the frequency response curve mea-
%
0.2
sured between the line input and loud-
speaker input terminals. (b) is the dis-
0.1 tortion characteristic measured at the
0.05
loudspeaker output terminals (5 W into
8 ). (c) is the distortion characteristic
0.02 measured at the line output terminals
terminated into 10 k.
0.01
20 50 100 200 500 1k 2k 5k 10k 20k
Hz 980023 - 13c
halves of the input signal. sound card to another, the design pro- After it has been fitted, set the preset
Operational amplifiers IC4a and vides a wide control range. to minimum volume (anticlockwise).
IC4b are half-wave rectifiers whose Solder the output leads from the
outputs are interlinked by diodes D3 S U P P LY L I N E S standard mains adaptor from which
and D4. Because of these diodes, the As mentioned earlier, the circuit is power is derived to the relevant pins
output with the highest potential powered by a standard 12 V mains on the board. If the board is to be
determines the extent to which capac- adaptor, which is applied directly to housed in an enclosure, a plug-and-
itor C20 is charged via resistor R4. Net- the output amplifier. All other circuit socket arrangement should be used for
work R23-C19 has been added to elements are supplied with a regulated linking the output from the adaptor to
ensure that fast signal fluctuations are 10 V potential. This voltage is pro- the board.
passed on very rapidly. duced with the aid of current source Check that the output voltage of
Capacitor C20 is discharged slowly T2-T3 and zener diode D6. the adaptor does not rise above 18 V
via resistor R25, so that the control cir- The reference voltage of 5.6 V is with small loads.
cuit returns to its default setting when produced with the aid of current When all is connected, the circuit
no or a smaller input has been applied source T1 and zener diode D5. can be tested. Passive loudspeakers
for some time. The potential across C20 may be linked directly to the LSP
is buffered by IC4a, while IC4d ensures output terminals, but active ones
that the (fixed) default level is added CONSTRUCTION should be connected to the line out-
to the signal. The resulting control sig- The circuit is best built on the printed- put terminals.
nal is applied to the control input circuit board shown in Figure 3 (see Finally, connect a sound source, for
(pin 7) of IC1 and IC2. Readers Services towards the end of instance, the line output of a sound
With component values as speci- this issue). Start the construction with card or the output of a Walkman to
fied, the compression is 10:1; in other placing audio sockets K1K3, the three the input of the circuit and adjust P1
words, a 20 dB change at the input wire bridges, and all solder pins, and for the desired volume. From then on,
results in a 2 dB change at the output. follow these with first the passive com- any fluctuations in the signal input
The setting of P1 depends on the ponents, and then the active ones. level will be minimized automatically.
signal level at the input of the circuit. Mind the polarity of the electrolytic [980023]
Since this level varies largely from one capacitors, diodes, transistors, and ICs.

80C32 BASIC
control computer
Part 1: introduction and circuit descriptions
Faced with the omi-

nous task of having
to cajole an existing
microcontroller board
into managing a con-
trol function, many of
you will recognize the
problem of having to
develop a more or The 80C32 BASIC control computer tifunction board does not contain eso-
consists of two boards which are inter- teric components either.
less complex interconnected via three single-row pin-
face board. Another headers. The smaller of the two boards
(108 cm) is the actual control com- THE 80C32 MAIN
problem may be the puter. The other board is considerably COMPUTER BOARD
larger at 1016 cm (Eurocard size), The design of the 80C32 BASIC control
complexity and gen- and contains all input/output circuits computer follows well-trodden paths.
eral hassle of every- and 45 solder pins, or, if so desired, In addition to the microcontroller type
screw terminals. 80C32 (IC1) with its low-address latch
thing to do with The control computer runs the (IC20) the main board also contains
assembly language. MCS-51 BASIC interpreter, and has
been designed for maximum flexibility
three memory ICs: a 32-kByte static
RAM (IC3), an EPROM (IC4) with a
The computer and optimum price/performance ratio. capacity of up to 32 kBbytes for the 8-
It can also be used in stand-alone kByte BASIC interpreter and your own
described in this arti- mode. For this purpose a reset net- BASIC extensions, as well as up to
cle may be pro- work (R1-C12) is provided, which may 16 kBytes of EPROM (IC5) to hold
only be fitted if the computer is used your BASIC programs. The address
grammed in MCS-51 in stand-alone mode. decoding for IC5 is handled by a
BASIC, and has been Many options are open to those of
you wishing to realize their own appli-
74HC00 (IC6). No address decoding is
required for memories IC3 and IC4
designed specifically cations using the present control com- because each of them occupies a block
puter: for instance, the three pinhead- of 32 kBytes in the lower memory
for control purposes. ers for the inter-board connections are range. That enables them to be
arranged in a 0.01-inch raster which addressed in a simple manner using
allows a piece of Veroboard or general- address line A15 to control their
purpose stripboard to be used as a car- (active-low) chip select inputs.
rier. Jumper JP1 enables pin 27 of IC4 to
The control computer was devel- be connected to A14 (for a 27256
oped with low cost and simple con- EPROM), or to +5 V, so that 16-kByte as
struction in mind. Because of this, the well as 8-kByte EPROM may also be
address decoding is not handled by a used in this position. Position IC5 can
costly PAL but by common-or-garden only accommodate 16-kByte or 8-kByte
74HCT logic. The same goes for nearly EPROMs, because the upper address
all I/O functions. With the possible range is required for the I/O range, and
exception of the type PD7002 A/D only 16-kByte EPROMs may be used in
Design by H.-J. Bhling converter from NEC, the add-on mul- any case as the BASIC program memory.

30
The 80C32 is a ROM-less CMOS transformed into suitable pulses by Figure 1. This rather spe-
version of the 8052 for which the IC4e and IC4f, using C10 and R1. 1 cial memory structure is
MCS51-BASIC interpreter was origi- The listing of the Background Clock required by the MCS51-
nally written (by Intel). This interpreter with Watchdog Timer Reset program BASIC interpreter.
requires a rather special memory struc- (available on the project floppy disk)
ture, as illustrated in Figure 1. shows how an on-time interrupt may program memory data memory
The main board, of which the be used to generate watchdog-feed (PSEN = 0) (RD or WR = 0)
global structure is shown in Figure 2, pulses. Diode D4 prevents capacitor
0FFFFH
provides a battery backup supply for C11 from discharging across the out- not used
the RAM chip, IC3. Normally, the put of IC4e. A reset can also be
+5 V supply line (pin 1 of K2) is con- brought about by pressing S1. Fitting 0E000H
nected through to pin 1 (VRM) of K1. jumper JP1 disables the watchdog 0DFFFH I/O range
This connection, as well as that timer. LED D5 goes out when a reset not used
(motherboard)
between IC3 and A15, has to be bro- arrives. Diodes D36 through D43, in 0C000H
ken. To make the board go into low- combination with resistors R75 and 0BFFFH
power mode, the CS input (pin 20 of R76, protect the CPU inputs against
IC3) also has to be connected to pin 14 voltage surges. max. 16Kbyte EPROM
of K2. Because the multi-function does for BASIC programs
not make use of this option, the rele- Address decoding
vant connections remain intact. The address decoding of the I/O (IC5)
The last noteworthy component on (input/output) range relies on a 08000H
the main board is the MAX232 con- 74HCT139 (IC3). This simple circuit 07FFFH
verter for the RS232 interface (IC7). selects the 8-kByte large address range
This chip and the associated 9-way between 0C000H and 0FFFFH, and also
sub-D connector forms the gateway to supplies four I/O select signals ( IO1
max. 32 Kbyte 32 Kbyte
the PC (or terminal/console) on which through IO4 ).
you develop your programs for the This creates a cluster of 16 I/O EPROM RAM
control computer. addresses between 0C000H and
0C00FH (see table below). (IC4) (IC3)
The above address block is repeated
M U LT I F U N C T I O N from address 0C010H, because 512 mir- 02000H
EXTENSION BOARD ror images appear in the 8-kByte large 01FFFH
8 Kbyte MCS-51-
The circuit diagram of the multifunc- I/O range. BASIC-Interpreter
tion extension board is given in Fig- 00000H
ure 3. It accommodates the power sup- 16 digital inputs 980002 - 13
ply, the address decoding circuits for The 16 digital (TTL-compatible) inputs
the I/O range, the watchdog timer, the are created with the aid of two 8-bit
digital inputs and outputs, as well the input drivers type 74HCT541 (IC5 and puter. The example program called DO
analogue inputs and outputs. The IC6). Resistors R59-R74 act as protec- and DI Test on the project diskette
operation of each of these sub-circuits tion devices. The LEDs, D12-D27, not shows how the inputs are interro-
is described in the following sections. only indicate the status of the input gated.
signals (high/low) but also pull the
Power supply inputs high via their series resistors R7 8 digital outputs
The power supply is open to modifi- and R8. This is useful when nothing is The 8 digital outputs are beefed up by
cations to meet your specific require- connected to the inputs. Consequently, an ULN2803 (IC8), an integrated dar-
ments. All that is required really is a the inputs are active-low. If you want lington driver with open-collector out-
smoothed direct voltage of at least a particular line to be permanently puts capable of switching loads of up
+12 V at about 150 mA which has to low, simply tie it to 0 V (ground). to 50 V at 0.5 A. Each output of the
be applied to terminal block K25. Note Although this inverse logic has be ULN2803 has a built-in suppressor
that a capacity of 150 mA is only suf- taken into account when you start pro- diode which allows inductive loads
ficient for the control computer and all gramming the computer, it has a defi- like stepper motors and relay coils to
LEDs. If K24 is not connected, driver nite advantage in that no +5-V supply be controlled without problems. If you
IC8 (for the digital and analogue out- is needed outside the control com- really want to go up to 50 V with the
puts) is supplied at just 11 V instead of
24 V. A higher voltage (up to about
+30 V) should only be connected to Select signal Address Read Write
K24 if higher driver output voltages IO1 0C000H digital inputs 1-8 digital outputs 1-8
are required, for example, to control 0C001H digital inputs 1-8 digital outputs 1-8
24-V relays which are often used in 0C002H digital inputs 1-8 digital outputs 1-8
industrial equipment. Diodes D1 and 0C003H digital inputs 1-8 digital outputs 1-8
D3 afford protection against reverse IO2 0C004H digital inputs 8-16 analogue output 1
polarity. 0C005H digital inputs 8-16 analogue output 1
0C006H digital inputs 8-16 analogue output 1
Watchdog timer 0C007H digital inputs 8-16 analogue output 1
The watchdog timer consists of a IO3 0C008H not used analogue output 2
monostable (IC4d) with a period of
0C009H not used analogue output 2
about 10 s, using R4 and C11 as the
0C00AH not used analogue output 2
timing elements. If no reset signal is
0C00BH not used analogue output 2
available, then C11 will discharge IO4 0C00CH ADC status register ADC status register
across R4. This can only be prevented
0C00DH ADC high data not used
by permanent recharging by means of
0C00EH ADC low data not used
signals from CPU port P1.5, which are

control voltage, watch the voltage rat- ues of the resistors in the potential input of the 80C32 CPU. By omitting
ing of C12, and operate the D-A (digi- dividers determine the input resis- the associated diode (D42 or D43), the
tal-analogue) converter at +8 V! tance as well as the ADC range. The INT0 or INT1 interrupt input of the
LEDs D28-D35 indicate the logic following equations apply, for exam- CPU is then exclusively assigned to the
states of the outputs. The 8-bit output ple, to channel 0: ADCs EOC signal.
word is written into D-latch IC7 (a An A-to-D conversion is launched
74HCT574). Rin = R10 + R14 via the Control Register. The end of it
The clock signal is created by com- Vin = Vref (R10+R14)/R14 is reported in the Status Register. Next,
bining the WR and IO1 signals in the value may be read in the Data
wired-OR gate D6-D7 and NOR gate As you can see, using 200-k resistors Registers. In this set-up, the bits have
IC4a. creates an input resistance of 400 k the following meanings (see table
As with the digital inputs, inverse and a measurement range of 5 V. below).
logic applies to the digital outputs: a The EOC (end of conversion) The program called D/A and A/D Con-
logic 1 at the input results in a logic 0 interrupt output of the ADC chip is version Test should enable you to exam-
at the associated output. Consequently, not used here. If you want to use it ine the behaviour of the A-D converter
load currents are sunk, i.e. any loads anyway, connect it to an interrupt using plain old BASIC.
connected to the digital outputs have
to be permanently connected to the
positive rail of their supply, the digi-
tal outputs of the ULN2803 acting as Control Register (write)
switches to ground. D0, D1 ADC channel address
D2 input flag
4 Analogue inputs D3 = 0 8-bit conversion
The four analogue inputs on the mul- D3 = 1 12-bit conversion
tifunction extension board are con-
nected to an ADC (analogue-digital Status Register (read)
converter) type PD7002 (IC1), which D0, D1 ADC channel address
uses an internal multiplexer to select D2 output flag
one of the four input channels. For D3 8-bit or 12-bit converted
simplicitys sake, the 2.5-V reference D6 = 0 Busy (working on conversion)
voltage is derived from the supply D7 = 0 EOC (conversion finished)
voltage by potential divider R18-R19.
The input voltages Low-Data Register (read)
Figure 2. Minimum, also arrive at the D0-D3 =0
yet stand-alone, ADC by way of D4-D7 bit 9 - bit 12 (with 12-bit conversion)
configuration of potential dividers
the 80C32 control (R10-R17). The val- High-Data Register (read)
computer. D0-D7 bit 1 - bit 8 of conversion result
5V
2 C12
10 16V
C4
100n
5V
C6
100n
5V
5V
R1 IC2
40 28
74HC573
8k2
K2 K3
39 AD0 AD0 2 19 A0 A0 10
P0.0 1D A0
K1 38 AD1 AD1 3 18 A1 A1 9 A12 PSEN
P0.1 A1
RD 17 37 AD2 AD2 4 17 A2 A2 8 A7 A13
RD P0.2 A2
WR 16 36 AD3 AD3 5 16 A3 A3 7 11 AD0 A6 A8
WR P0.3 A3 D0
T1 15 35 AD4 AD4 6 15 A4 A4 6
IC3 12 AD1 A5 A9
T1 IC1 P0.4 A4 D1
T0 14 34 AD5 AD5 7 14 A5 A5 5 13 AD2 A4 A11
T0 P0.5 A5 D2
INT1 13 33 AD6 AD6 8 13 A6 A6 4 15 AD3 A3 A15
INT1 P0.6 A6 RAM D3
INT0 12 32 AD7 AD7 9 12 A7 A7 3 16 AD4 A2 A10
INT0 P0.7 A7 D4
TXD 11 A8 25 17 AD5 A1 A14
TXD A8 D5
RXD 10 30 11 A9 24 62256 18 AD6 A0 AD7
RXD ALE/P C1 A9 D6
RESET 9 1 A10 21 19 AD7 AD0 AD6
RESET EN A10 D7
P1.7 8 21 A8 A11 23 AD1 AD5
P1.7 P2.0 A11
P1.6 7 80C32 22 A9 A12 2 AD2 AD4
P1.6 P2.1 A12
P1.5 6 23 A10 5V A13 26 20 A15 A15 AD3
P1.5 P2.2 A13 CE
P1.4 5 24 A11 A14 1
P1.4 P2.3 20 C5 A14
P1.3 4 25 A12
P1.3 P2.4 IC2 OE WE
P1.2 3 26 A13 100n RM
P1.2 P2.5 10 22 14 27
P1.1 2 27 A14
P1.1 P2.6 RD WR
P1.0 1 28 A15
P1.0 P2.7
31 PSEN
29
EA/VP
5V
X1 X2
20 19 18
X1 5V 5V
IC6d IC6c C13 C14
12 9
C1 C2 11 8
13 & 10 & 100n 100n
1 28 1 28 27
22p 22p
VPP VPP PGM
X1 = 11.0592MHz A0 10 10 A0
A0 A0
RD A1 9 9 A1
A1 A1
WR A2 8 8 A2
A2 A2
A3 7 11 AD0 AD0 11 7 A3
A3 D0 D0 A3
C8 A4 6
IC4 12 AD1 AD1 12
IC5 6 A4
A4 D1 D1 A4
A5 5 13 AD2 AD2 13 5 A5
A5 D2 D2 A5
A6 4 15 AD3 AD3 15 4 A6
2 A6 EPROM D3 D3 EPROM A6
5V K4 A7 3 16 AD4 AD4 16 3 A7 A14
1 V+ 16 A7 D4 D4 A7
C9 C1+ A8 25 17 AD5 AD5 17 25 A8
1 A8 27256 D5 D5 27128 A8 1 2
IC7 A9 24 18 AD6 AD6 18 24 A9
3 6 A9 D6 D6 A9 IC6a
C1 A10 21 19 AD7 AD7 19 21 A10 &
11 14 2 A10 D7 D7 A10
T1IN T1OUT A14 A11 23 23 A11
10 7 7 A11 A11
T2IN T2OUT 3
A12 2 2 A12 A15
12 13 3 JP1 A12 A12
5V R1OUT R1IN A13 26 26 A13
9 8 8 A13 A13 5 4
R2OUT R2IN 27
4 C11 C3 4 A14 OE CS IC6b
C10 C2+ &
14 C15 9 CS OE 22 14 20
MAX232
IC6 5 15 100n 5 20 14 22
C2 A15 6
7 100n V- 5V
PSEN
6
C7
IC6 = 74HC00 980002 - 11
C7...C11 = 5x 10 / 25V

2 analogue outputs fiers (IC12b and IC12c) which give you applied by way of terminal block K24.
The two analogue outputs work in accurate control over the output signal In the first case, install the short wire
much the same way as the digital out- levels before they leave the control link under IC12. The long wire is used
puts. An 8-bit word is applied to an R- computer. If necessary, multiturn pre- if you intend to connect a 24-V exter-
2R network (R20-R35 and R38-R53) sets may be used where really accurate nal supply.
rather than an output buffer. Imped- output level settings are required. (980002-1)
ance converters IC12a and IC12d The output amplifier may be sup-
buffer the resulting output voltages. plied with either an internal voltage of
Next come adjustable output ampli- +8 V, or an external voltage of +24 V Figure 3. Circuit dia-
gram of the multifunc-
tion extension board.
D7
IC4a IO1
2 1
1 D6
WR
5V
1 R7 8x 820 1 R9 8x 1k5
2x 5V
33k
R56
1N4148
3 2 3 4 5 6 7 8 9
IO1 1
IC5 IC7 2 3 4 5 6 7 8 9
& 11 24V
RD 19 EN C1
1
D12 D13 D14 D15 D16 D17 D18 D19 EN D28 D29 D30 D31 D32 D33 D34 D35
10
R59 2 18 D0 D0 9 12 8 +VS 11
DI1 100k 1D I8 O8 DO1
K4 R60 3 17 D1 D1 8 13 7 12 K13
DI2 100k I7 O7 DO2
R61 4 16 D2 D2 7 14 6 13
DI3 100k I6 O6 DO3
K5 R62 5 15 D3 D3 6 15 5 14 K14
DI4 100k I5 O5 DO4
R63 6 14 D4 D4 5 16 4 IC8 15
DI5 100k I4 O4 DO5
K6 R64 7 13 D5 D5 4 17 3 ULN 16 K15
DI6 I3
R65
100k
8 12 D6 D6 3 18 2 2803 O3 17
DO6
DI7 100k I2 O2 DO7
K7 R66 9 11 D7 D7 2 19 1 18 K16
DI8 100k I1 O1 DO8
VEE
5V 74HCT541 74HCT574 9
1 R8 8x 820
D9
IC4b IO2
4 3
K8 2 3 4 5 6 7 8 9 IC6 IC10 1 D8
IO2 1 WR
& 11
RD 19 EN C1
1
2x
33k
D20 D21 D22 D23 D24 D25 D26 D27 EN R57
100k 1N4148
R35
R67 2 18 D0 D7 9 12 R28
DI9 100k 1D 200k 100k
R68 3 17 D1 D6 8 13 R27 R34
DI10 100k 200k R37
K9 R69 4 16 D2 D5 7 14 R26 3
DI11 100k 200k 100k 100k
R70 5 15 D3 D4 6 15 R25 R33 1
DI12 100k 200k IC12a
K10 R71 6 14 D4 D3 5 16 R24 2
DI13 100k 200k 100k
R72 7 13 D5 D2 4 17 R23 R32 5
DI14 100k 200k
K11 R73 8 12 D6 D1 3 18 R22 7
DI15 100k 200k 100k IC12b
R74 9 11 D7 D0 2 19 R21 R31 6
DI16 100k 200k
K12
74HCT541 74HCT574 100k
R30
P1 R36
100k
24V 5V 100k
C16 R29
EOC
+24V 100k
200k
R10 R20 MT
K17 14
AI1 220k 100n
R20 ... R35 = 1%
R11 13 28 D10
CH0 EOC IC4c WR
220k 12
AI2 CH1 22 D0 6 5
K18 R12 11 D0 1 D11
AI3 CH2 21 D1 IO3 AO1
220k 10 D1 IC11 K20
CH3 20 D2 AO2
R13 D2 11
2x
33k
4 19 D3 C1 R58
AI4 220k CI D3 1 1N4148
K19 C15 18 D4 EN
D4 100k
IC1 R53
17 D5
D5
15n 6 16 D6 D7 9 1D 12 R46
R14 R15 R16 R17 CI D6 200k 100k
C17 C18 C19 C20 15 D7 D6 8 13 R45 R52
D7
220k
220k
220k
220k
200k R55
D5 7 14 R44 12
PD7002 5 200k 100k 100k
15n 15n 15n 15n GD D4 6 15 R43 R51 14
7 200k IC12d
GD D3 5 16 R42 13
RD 25 200k 100k
RD 26 A0 D2 4 17 R41 R50 10
5V WR 24 A0 200k
5V WR 27 A1 D1 3 18 R40 8
A1 200k 100k IC12c
8 D0 2 19 R39 R49 9
R18 VREF 200k
3 23
16 14 VSS CS
10k
C7 C22 74HCT574 100k

R48
IO4
IC3 IC4 X1 X0
1% 5V P2 R54
100k
8 100n 7 100n 9 2 1 100k

X1 R6 8x 4k7 R47
R19
200k
R38 100k
10k
MT
IC3 = 74HCT139 C14 C13 R38 ... R53 = 1%
1%
IC4 = 74HCT14
22p 22p 2 3 4 5 6 7 8 9
K1 12V
D0
D1
D2
D3
D4
D5
D6
D7
2,4576MHz
RD 2.4576MHz 4 C22
WR
IC12
T1 D40 IC12 = LM324
5V 11 100n
T0 D41
INT1 D42
5V
INT0 D43 R1 R2 R3 K2 K3 DMUX
A13 1 4
0
220k
100k
1k5
TXD
4x IC3a 5
RXD 1
1N4148 A13 A14 2 6
RESET D5 0 0 2
JP1 A15 3 G 7
P1.7 1 3 3
R4
P1.6
220k
P1.5
IC4f IC4e IC4d A3 A15
P1.4 C10 D4
13 11 9 A2
P1.3 1 1 1
12 10 8 RESET A1 A14
P1.2 100n 1N DMUX
4148 A0 D7 15 12 IO1
P1.1 0
D0 D6 IC3b 11 IO2
P1.0 R5 1
D1 D5 A2 14 10 IO3
2
1k
0 0
D38 D36 D2 D4 A3 13 1 G 3 9 IO4
BZ1 C11 3
5V 5V D3
S1
D39 D37 33
10V
4x 1N4148 RESET
D3
+24V 24V
IT1
IT0
P1.0
P1.1
T0
T1
K24
+5V 5V D2 12V 8V
K22 K21 IC1 IC2
K23 +24V
5V D1 7808 7805 5V
20 20 20 20 20
3x 1N4001
C8 C24 C9 C23 C21 D44
C6 C1 C2 C5 C3 C4 C12
IC5 IC6 IC7 IC10 IC11
10 100n 10 100n 10 100n 10 100n 10 100n
+12V 100 100n 100n 47 100n 100 100
K25 40V 16V 5V6 16V 40V
980002 - 12

simple
electronic metronome
with 440 Hz generator
A metronome
is and remains an
indispensable tool for
musicians, beginners
and professionals
alike. In addition to
the time-honoured
triangular mechanical
instruments, there are
now electronic mod-
els on the market. A metronome is an apparatus for ing of an LED. Another useful feature
sounding an adjustable number of beats is the provision of a generator for tun-
This article describes per minute and therefore for fixing the ing string instruments.
tempo of a composition. The idea of the
a simple DIY clockwork model patented by Maelzel CIRCUIT DESCRIPTION
metronome that may seems to have been appropriated from Metronome
the Dutch inventor D N Winkel. The generator producing the beats con-
prove useful to begin- The one most commonly used is a sists of the two halves of a Type 556
ners in music. pyramidal wooden instrument at the
front of which a perpendicular steel
CMOS timer, IC1. Section IC1a is con-
figured as an astable multivibrator.,
strip about 3.5 in long by 0.5 in wide is whose frequency can be adjusted with
pivoted. The principle is that of a dou- P1 between 60 and 250 beats per
ble pendulum (an oscillating rod minute. If the lower figure is too fast,
weighted at both ends). The upper the value of C1 may be increased
weight is movable along the steel strip slightly. On the other hand, the upper
and according to its position on the limit of 250 beats may be raised
rod the number of oscillations per (although this is unlikely to be required
minute can be made to vary between for music applications) by reducing the
40 and 208. The rod beats (or ticks) as value of R1 to about 1 k.
it swings back and forth. Maelzels To ensure a regular, stable fre-
* In music and audio engineering, a graduated scale, fixed to the case, gives quency, C1 should preferably be a tan-
third is a melodic and harmonic speed of oscillation. A composer who talum capacitor, but if need be, a good-
interval, taking three steps in a scale wants, say, 78 crotchet (US: quarter- quality electrolytic may be used.
(major or minor) counting top and note) beats in a minute will write M.M. The output of IC1a triggers the
bottom notes. So, major third (C up (Maelzel metronome) q = 78. other section, IC1b, a monostable mul-
to E), minor third (C up to Eb), and The electronic metronome tivibrator, via C2. The monostable gen-
diminished third (C# up to Eb). described here has a useful feature in erates pulses of constant width in the
emphasizing the first beat in a bar. This rhythm of the clock frequency.
is done acoustically by increased vol- The output if IC1b is split into two:
Design by F. Hueber ume as well as electrically by the light- one part is applied to the clock input

36
of decade counter IC2, and the other reset after 38 pulses. In the time sig- Diodes D1 and D2 ensure that the
to low-frequency output amplifier nature, which is placed on a sheet of output signal is a nearly pure sine
T1-T2 via R5. music immediately after the clef sign, wave. The nearly is caused by the
Outputs Q0Q8 of the counter are the numerator in these fractions indi- inevitable cross-over distortion result-
successively enabled and actuated, cates the number of beats in a bar and ing from the output stage operating
that is, in this case, they are changed the divisor the value of each beat. without quiescent current. The output
from logic low to logic high (0 to 1). Thus, a time signature of 3/4 means frequency is that of the international
This is particularly important as that there are three beats in each bar concert pitch, that is, the tuning-note
9V
1 R1 R3 R4 R5 R6
1k
10k
10k
3k3
3k3
T3
R7
4 10 CTRDIV10/ 3
0 33k
R R DEC 2
P1 1 13 1 R8
10k DIS DIS IC2 4
2 BC560
1k
IC1a C2 IC1b
2 5 8 9 14 7
THR OUT TR OUT & 3
13 + 10
R2 10n 4
1k8
6 12 S1
TR THR 1
4017 5 D3
CNTR CNTR 5
6
3 C3 11 6
C1 7
15 9 D4
CT=0 8
IC1 = TLC556 100n 11
47 25V 9
12
9V CT5
5V1
R11 P2
T1
27k
D1 10k
BC337
R10
D2 220k S2a C4 R9
22
2x 1N4148 9V' 220

T2 16V
R17 S2b
IC3 LS1 9V
3k3
1 7 BC327 8 9V '
2
5
6
LF351 9V'
3 S3
R12 4 R15
15k
10k
BT1
C8 14 C9 16 C10
P3 R16 IC1 IC2
C5 C6 C7
470 100n 100n
10k
7 8
10k 9V 16V
10n 10n 10
R13 R14 16V
39k 39k
980006 - 11
regards Q0 (pin 3), since Figure 1. The and that the value of A (=440 Hz). but may be altered
this is held low for the metronome proper is each beat is a crotchet slightly, if desired, with P3. The actual
longest period of time based on IC1 and IC2, or quarter note. frequency-determining components
to keep transistor T3, while the Wien bridge Transistors T1 and are R13, R14, C5, and C6.
which functions as a oscillator, based on T2 together form a sim-
switch, on. IC3, provides the tun- ple push-pull output Power supply
Potential divider ing frequency. stage that operates Power is supplied by a 9-V dry battery.
R5-R6 is then actuated, with virtually no quies- Switch S3 is the on/off selector. Switch
which results in the cent current. The section S2b arranges power to be sup-
pulses arriving from IC1 sound level may be plied to oscillator IC3 when the unit is
being applied at only half amplitude. adapted to individual taste by chang- switched to tuning.
Output Q0 goes high only at the first ing the value of R9 between the out- With average use, the battery will
beat in a bar, when the potential put stage and the loudspeaker. Note, last quite a long time. The metronome
divider is not actuated, whereupon the however, that the sum of this resistor circuit draws a current of about 8 mA
relevant pulse arrives at T1-T2 at full and the ohmic value of the loud- and the frequency generator one of
strength. Consequently, this beat is speaker must not drop below 20 to around 15 mA.
rather louder than the others and also prevent overloading of the transistors.
sounds a little different. At the same
time, the high level at Q0 causes D3 to 440 Hz generator CONSTRUCTION
light briefly. This LED also serves as a The push-pull output stage can be The metronome/generator is best built
battery indicator: when the battery switched from the metronome proper on the printed-circuit board shown in
voltage drops below about 6 v, zener to the output of frequency generator Figure 2, which is, however, not avail-
diode D3 ensures that the diode IC3. This is a classical Wien bridge able ready made.
remains extinct. oscillator whose output level is set Rotary switch S1 and preset P1 may
The number of beats in a bar (US: with P2. The type of op amp used is be fitted directly on the board.
measure) is set with S1. Depending on not important: almost any type, even The space at the right-hand side of
the setting of this switch, the counter is a 741, will do. the board is intended to house the

2
P1
Q2 Q5
C8
-
Bt1
+
C1
S1
S3
R2
R1
R3
C2
C9
C3
IC1 IC2
C10
S2
R5 R4
R8
R17 R6
D4
D3
R10
R7
P2
980006-1
(C) Segment
1-600089
tnemgeS )C(
T3
T1
T2
R11
D2
C4
D1
IC3
HOLE35E
R9
980006-1
R12
C6
R14
P3
LS
C5
C7
R13 R16
Q3
R15 Q4
Figure 2. The printed-circuit board for the metronome is designed to accommo-

date the potentiometer and the rotary switch.
Parts list Capacitors: Integrated circuits:

C1 = 47 F, 25 V IC1 = TLC556
Resistors: C2, C5, C6 = 0.01 F IC2 = 4017
R1, R8 = 1 k C4 = 220 F, 16 V, radial IC3 = LF351
R2 = 1.8 k C7 = 10 F, 16 V, radial
R3, R4, R15, R16 = 10 k C8 = 470 F, 16 V, radial Miscellaneous:
R5, R6, R17 = 3.3 k S1 = 1-pole, 12-position rotary switch
R7 = 33 k Semiconductors: for board mounting
R9 = 22 D1, D2 = 1N4148 S2 = double-pole change-over
R10 = 220 k D3 = LED switch
R11 = 27 k D4 = zener diode, 5.1 V, 400 mW S3 = single-pole switch
R12 = 15 k T1 = BC337 BT1 = 9-V battery with connecting
R13, R14 = 39 k T2 = BC327 clips
P1 = 10 k, linear T3 = BC560 LS1 = loudspeaker, 8
P2, P3 = 10 k preset Enclosure, 1508055 mm
loudspeaker. If TUNING
desired, a suitable Tuning the frequency generator with
hole can be cut in P3 to 440 Hz is, of course, best done
the space for the with the aid of a suitable frequency
loudspeaker meter. If such an instrument is not
magnet. available, the A-note struck on a well-
The fin- tuned piano may be used to compare
ished board the generator output with (this needs
and battery a critical ear, of course!).
are best
housed in a F I N A L LY
suitable Bear in mind when selecting a value
enclosure, for R9 and setting P2 that the sound
such as the from the loudspeaker is much louder
one speci- in the enclosure than when it lies on
fied. the table! [980006]

38
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Another interesting feature of
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introduction to digital
signal processing
Part 2
Sampling and digital filters
After last months 3 x7 x8
x1 x6
x2 x9
brief excursion into u x3 x4
x5
sampling, this t
x 10
instalment takes a
0 1 2 3 4 5 6 7 8 9 11 12
look at the effects 10
undersampling
sampling has and factor 4
then takes the first x y
x 11 x 12
steps into digital fil-
y2
ter technology.
u y1
t
0 1 2 3
Shannons sampling theorem (1949)
states that, in a pulse-coded system,
two samples per cycle will completely
characterize a band-limited signal, that
is, the sampling rate must be twice the Figure 3. When a sig- y3
980015 - 2 - 11
highest-frequency component. In prac- nal is undersampled,
tice, the sampling rate is at least five only each xth sample
times the highest frequency. is taken.
It will be seen that the theorem is SMPL1.EXE, ALIASING
invalidated when the highest frequency whereby FREQUENCIES
is more than half the sampling rate. MUSIC1.WAV is converted to a file Aliasing frequencies are not random:
MUSIC2.WAV. The undersampling factor they can be accurately predicted. If, for
SOUND PROGRAMME is indicated by DWNSMPL1\inp =MUSIC1. instance, a sinusoidal signal of fre-
MUSICG1 <return> generates a WAV\ out =MUSIC2.WAV\factor=4 quency f0<fs/2 is sampled at a rate
sound programme of 60 single tones, <return>. This means that only tones equal to fs, definite sample values are
each separated from the next and pre- lower than 11,025/2=5512.5 Hz can be obtained. Each signal of frequency
ceding one by a semitone. The lowest reconstructed properly. Sampling of m(fsf0) or m(fs+f0), where m=1, 2, 3,
frequency is 40 Hz and the highest the higher-frequency tones results in a , generates the same sample values
14 kHz, that is, the programme spans phenomenon known as aliasing. This associated with f0 see Figure 4.
a range of more than five octaves. The gives rise to a tone erroneously taking After sampling has taken place,
tones are sampled by MUSIC1. WAV at a on the identity of an entirely different these frequencies cannot be distin-
rate of 44.1 kHz. The conditions of the frequency when recovered. guished from one another. To prevent
theorem are fulfilled, which is verified
by a good audible sound.
UNDERSAMPLING
Aliasing
The effect of aliasing may be compared to that seen on a cinematographic or video film
If the sound generated in the previous
when a spoked wheel of a vehicle turns at such a speed that successive samples (frames
paragraph is sampled at a rate of only of the film) catch the wheel at slightly earlier or later positions. Between one frame and the
11,025 kHz, that is 1/4 of the original next a spoke turns to almost the same position as formerly occupied by an adjacent spoke.
rate, we speak of undersampling (see The result is to make the wheel appear to rotate much more slowly or even bakcwards.
Figure 3). It is executed by DWN

40
this situation arising, an analogue-to-
digital converter (ADC) is usually pre- 4 aliasing frequencies
ceded by a low-pass filter that sup-
presses the aliasing frequencies.
L O W- PA S S F I LT E R
The low-pass filter used to suppress
aliasing frequencies must be a digital
type. Digital filtering is completely dif- fs - f 0 fs + f 0 2fs - 2f 0 2fs + 2f 0
ferent from analogue filtering. Ana-
logue filtering processes signals in the
frequency domain, whereas digital fil- f0 fs fs 2fs
tering does so in the time domain. So, 2
if a certain frequency domain response
is required, it is necessary to convert
this response into the equivalent time
980015 - 2 - 12
domain. So, let us see what happens
when we try to use an analogue filter aliasing
(see Figures 5 and 6). Figure 4. Aliasing
During a sampling interval causes equivalent fre-
T=tk+1tk, input voltage u changes PULSE GENERATORS quencies to be pro-
but little, but attains the value uk. The The CD-ROM contains a couple of duced from dissimilar
output voltage will not change much pulse generators. The first and simpler samples.
either, so that an almost constant cur- is indicated by PULSE1.EXE. This gener-
rent i=(ukvk)/R flows through resistor ates a very brief pulse that has only
R. At the onset of the sampling inter- one sampling value which is not zero: Figure 5. An RC net-
val, the potential across the capacitor the value of all others is zero. The posi- work used as an ana-
is vk. It is charged by i during the sam- tion and amplitude of the pulses can logue low-pass filter.
pling period to attain the potential be set by relevant parameters. This ele-
mentary signal is very important and 5 R
vk+1 =vk+i t/C=vk+(vkuk)/ RC t. will be used frequently in experiments
later in this series of articles.
If we solve this for uk+1, we obtain Another pulse generator is found
under STEP1.EXE. This generates a sim-
vk+1=rvk+uk(1r), where r=1( t/RC. ple step signal with predestined ampli- C
tude and position. For instance, calling u (t) v (t)
This is the calculation prescription for up DO XLP1.SPP generates the signals
the first digital filter. The program is on shown in Figure 8. That at the top rep-
the CD-ROM under the title LP1.EXE; resents the reaction of filter tmp.wav
the source code, LP1.PAS is given in Fig- to pulse1.wave, and that at the bottom,
ure 7. tmp.wav, the slowly rising response to 980015 - 2 - 13
The example shows that not all step1.wav.
programs for digital signal processing As before, this experiment may be
need to be long and tedious. It is, of repeated with various values of r. For nal of 11000 Hz is generated (top of
course, admitted that most of the rou- instance, what happens when r=0.9? Figure 9) and applied to the low-pass
tine work has been done by program However, this kind of response does filter. The amplitude of the output sig-
library SIGLIB.PAS. not give a very clear picture of the per- nal (at the bottom) drops with rising
The filter is tested by processing file formance of the low-pass filter. A bet- frequency.
MUS1.WAV (also listen to it!) on the ter one is obtained by the use of a Another possibility is to apply
CD-ROM. This is done by calling up sweep generator, which is also avail- white noise to the filter and view the
able on the CD-ROM. output signal. But for that purpose, it
1p1 \r=0.995 \scale=10 \inp= When DO XLP2.SPP <return> is is necessary to first analyse and exam-
mus1.wav \out=tmp.wav <return>. called up, a sweep sig- ine signal spectra.
Figure 6. Step
Listening to the resulting signal makes response of the digital
the distinction between tmp.wav and low-pass filter.
the original signal very clear.
Some experiments may be carried 6 uk u (t)
out with the filter. For instance, try
out several values for r, but note that
this should not be greater than unity v (t)
to prevent the filter becoming unsta- vk vk+1
ble.
Just listening to a filter s perfor-
mance is, of course, not the best test.
For a proper test, a couple of test sig-
nals are needed to analyse, say, the
frequency response in the time and
frequency domains. These signals
may be derived from a pulse gener-
ator. t
980015 - 2 - 14

001 program lp1 ;
Lines 15 form the head of the program and
7 002 uses dos,crt,graph ;
declare that program library SIGLIB.PAS will
003
004 {$I SIGLIB.PAS } be used.
005
Lines 67 stipulate the requisite variables
006 var k:int ;
when line 10 calls up the initialization of
007 y,scale,r:float ;
SIGLIB.PAS
008
009 begin
Lines 1114 determine the parameters; if
010 start(simple lowpass) ; required (owing to procedures in
011 scale:=1.0 ; set par real(\scale=,scale) ; SIGLIB.PAS) the actual parameters called for
012 r:=0.95 ; set par real(\r=,r) ; by the program.
013 inp fn:=pulse1.wav ; set par string(\inp=,inp fn) ;
014 out fn:=tmp.wav ; set par string(\out=,out fn) ; Lines 1617 actuate the data input and out-
015 put of the WAV files.
016 open inp(inp fn) ;
017 open out(out fn) ; Line 19 initializes the value of the filter.
018 The procedure in lines 2025 executes the
019 y:=0 ; actual filter operation.
020 for k:=1 to nsamples do
021 begin In line 22, the actual output value of the fil-
022 output(scale*y) ; ter is written in the output data file.
023 y:=r*y+(1-r)*input ;
024 if (k mod 2000)=0 then write(.) ; Line 23 contains the actual filter algorithm.
025 end ;
026 stop ; Line 26 closes all files and thus the pro-
026 end. gram.
Figure 7. Pascal
source code for the
digital filter.
S P E C T R U M A N A LY S E R scale to obtain a wider range of values.
An introduction to DSP would not be Experiment XSPEC1.SPP generates
of great value without a facility to that are associated with frequencies 0 two signals of frequency 193.7988 Hz
view, examine and analyse signal spec- Hz (d.c.) to fs/2 from n values In the (tmpl.wav) and 196.4905 Hz (tmp2
tra. Therefore, the CD-ROM contains present program, n=4096. The ampli- .wav) respectively from 4096 samples
program SPEC1.EXE (source code tude levels are shown on a logarithmic at a rate of 44.100 samples/s. If the
SPEC1.PAS) which enables the spectra of DFT is applied to these signals, the
wave files to be calculated and viewed. spectra shown in Figure 10 are
To calculate a spectrum, SPEC1.EXE Figure 8. Pulse and obtained.
uses a discrete Fourier transform step response of the It appears as if the first signal
(DFT), which derives n/2 amplitudes low-pass filter. (tmpl.wav top left) consists of only
980015 - 2 - 16

Figure 9. Passage of a signal

from a sweep generator one frequency. On the other hand, many frequencies in the signal? The
through a low-pass filter. the second signal (tmp2.wav top answer lies in Figure 11, which shows
right) has a 20 dB peak, but the that in the case of signal tmpl.wav a
spectrum at either side does not whole number of complete cycles fits
Figure 10. Spectra of sinusoidal drop off very much. exactly in the region enclosed by the
signals: at the top without the How does the DFT conclude 4096 sampling points. This is not so in
window function, and at the that there are some of a great case of the other signal. The value of
bottom with it.
10
980015 - 2 - 18

Visit our Web site at
http://ourworld.compuserve.com/homepages/elektor_uk
11
980015 - 2 - 19
Figure 11. Signals may

fit well or not so well
in the window of the the DFT. The spectra of the signals sub-
spectrum analyser. jected to the window function are
shown at the bottom of Figure 10. It
will be seen that the spectrum of
tmp2.wav is now clearly line-shaped,
this signal at the left is 0, while at the but that the line produced by
right 18.5 cycles fit in the 4096-point tmpl.wav has broadened slightly this
region. Because of this, all possible is the price to be paid for the window
oscillations are required (and thus function. The spectrum analyser on
shown up by the DFT) to display the the CD-ROM gives a choice of work-
signal. ing with or without the window func-
tion. The window function will be met
WINDOW FUNCTION again when filter synthesis will be dis-
Obviously, the situation in the previous cussed.
paragraph is not satisfactory, since the
DFT should generate a line-shaped Next months instalment will continue
spectrum of signal tmp2.wav also. This with the subject of filtering and also deal
is obtained when the input signal is with the spectrum analysis of some real sig-
multiplied (top of Figure 12) by a win- nals.
dow function (at the centre). This sig- [980015-2]
nal then undergoes a DFT and results
in that displayed at the bottom.
The window function ensures that
the signal becomes compatible with Figure 12. Windowing is
simply the multiplica-
tion of the signal with a
window function.
12
980015 - 2 - 20

AM/FM antenna
impedance matching IC
APPLICATION NOTE
The U4253BM and U4254BM ICs are FUNCTIONAL

DESCRIPTION
integrated AM/FM antenna matching The U4253BM/U5254BM impedance
circuits in bi-CMOS* technology. They matching circuit (see block diagram in
Figure 1) compensates for cable cable
are intended particularly for car applica- losses between the antenna and the car
radio which is usually placed far away
tions and may be used with wind- from the antenna.
screen, roof and bumper antennas. The FM amplifier provides excellent
manufacturers
from manufacturers
and does
noise performance. External compo-

The U4254BM chip has a lower noise
their representatives and
nents are used to adjust the gain and

consultants.
its consultants.
figure than the U4253BM and a differ-

ent AM amplifier stage with two out-
received from
or its
puts. Apart from the additional AM out- 1

information received
Electronics or
put (pin 11 which is not connected in

Elektor Electronics
or their
on information
the U4253BM), the pinouts of the two

electrical and electronics industries or
devices are identical.

by Elektor
based on
experience by
is based
practical experience
note is
this note
* Integrated circuits that contain both bipo-

lar and CMOS transistors. This combination
imply practical
content of this
allows the advantages of both processes to be

in the electrical
Figure 1. Block dia-

exploited.
gram of the AM/FM
The content
not imply
antenna impedance
A TEMIC Semiconductors matching IC.
The
Application
in

48
the input-output matching imped- resistor which is connected between AGC (pin 4)
ance. Therefore, it is possible to adjust FMGAIN and GND1. To influence the Direct current flows into the AGC pin
the amplifier to various impedances a.c. gain of the amplifier, a resistor is at high FM antenna input signals. This
(usually 50, 75 or 150 ). connected in series with a capacitor current has to be amplified via the cur-
To protect the amplifier against between FMGAIN and GND1. The rent gain of an external p-n-p transis-
input overload, an Automatic Gain capacitor has to be a short at frequen- tor that feeds a p-i-n diode. This diode
Control (AGC) is included on the chip. cies 100 MHz. dampens the antenna input signal and
The AGC observes the a.c. voltage at
a g
2 3
Figure 2. Pinout of
the AM/FM
antenna imped- c
ance matching IC.
the FM amplifier output, rectifies this

signal, and delivers direct current to
dampen the input antenna signal via
an external p-i-n diode.
The threshold for the AGC is
adjustable. Simple and temperature- i
compensated biasing is possible owing d
to the integrated voltage reference
VRef2.
The AM part consists of a buffer
amplifier. The voltage gain of this stage
is about unity. The input resistance is
470 k and the input capacitance less
than 10 pF. The output resistance is
125 . An excellent dynamic range is
achieved owing to the CMOS source
follower stage.
PIN DESCRIPTION e j
The pinout is shown in Figure 2. Note
that pins 6, 9, 11 (U4253BM only), and
16 are not connected.
FMIN (pin 1) (Figure 3a)

FMIN is the input of the FM amplifier.
It is the base of a bipolar transistor. A
resistor or a coil is connected between
FMIN and VREF2. f
GND1 (pin 2)
To avoid crosstalk between AM and
FM signals, the circuit has two sepa-
rate ground pins. GND1 is the ground
for the FM part. Figure 3. The inter-
nal circuit of the
FMGAIN (pin 3) (Figure 3b) AM/FM impedance
The direct current of the FM amplifier matching IC.
transistor is adjusted by an external

4 Figure 4. Typical applica-
tion circuit of the AM/FM
antenna impedance
matching IC.
Table 1. Electrical Characteristics VS = 8 V, Tamb = 25C, unless otherwise specified

Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit
Supply voltage Pin 14 Vs 7.2 8 8.8 V
Supply currents Pin 14 Is 4 mA
Reference voltage 1 output, (I12 = 0) Pin 12 VRef1 5.5 V
Reference voltage 2 output, (I5 = 0) Pin 5 VRef2 2.6 V
Temperature dependence of VREF2 Pin 5 Vref2/T 1 mV/K
AM amplifier
Input resistance Pin 8 RAMIN 470 k
Input capacitance Pin 8 CAMIN 10 pF
Output resistance Pin 10 ROUT 200*
Voltage gain Pin 10 / Pin 8 a 0,85
Pin 10, pin 8 to ground via 15pF;

Output noise voltage (rms value) B = 6 kHz, 150 kHz to 300 kHz, VN1 2 dBV
500 kHz to 6.5 MHz VN2 6 dBV
Pin 10,
pin 8 to ground via 15pF,
2nd harmonic 60** dBc
fAMIN = 500 kHz,
Output voltage = 110 dBV
FM amplifier
Supply current limit IAGC, IAGCADJ = 0 A, Pin 15 I15 33 35 mA
Input resistance f = 100 MHz Pin 1 RFMIN 50
Output resistance f = 100 MHz Pin 15 RFMOUT 50
Power gain f = 100 MHz Pin 15/ Pin 1 G 5 dB
Pin 15
Output noise voltage
f = 100 MHz, B = 120 kHz VN 0 dBV
3rd order output intercept f = 100 MHz Pin 15 132 dBV

AGC
f = 100 MHz Pin 15

AGC input voltage threshold pin 13 grounded; AGC threshold Vth1 96 dBV
DC current is 10 A at Pin 4
f = 100 MHz Pin 15

AGC input voltage threshold pin 13 not connected; AGC threshold Vth2 106 dBV
DC current is 10 A at Pin 4
AGC output current AGC active IAGC 1.2 mA
* 125 for U4254BM

** 65dBc for U4254BM

protects the amplifier input against

overload. The maximum current
Table 2 Features
which flows into the AGC pin is about High dynamic range for AM and FM
1 mA. In low-end applications, the
Integrated AGC for FM
AGC function is not necessary and the
external components can then be omit- High intercept point 3rd order for FM
ted. FM amplifier adjustable to various cable impedances
High intercept point 2nd order for AM
VREF2 (pin 5) (Figure 3j) Low noise output voltage
For the d.c. biasing of the FM amplifier, Low power consumption
a second voltage reference circuit is
integrated. Because of temperature
independence of the collector current,
the output voltage has a negative tem-
Table 3 Absolute maximum ratings
perature coefficient of about Reference point is ground (pin 2 and 7)
1 mV K1. To stabilize this voltage an Parameters Symbol Value Unit
external capacitor of a few nF to
ground is recommended. Supply voltage VS 8.8 V
Power dissipation, Ptot at Tamb=85 C Ptot 460 mW
GND 2 (pin 7)
This pin is the ground connection for Junction temperature Tj 150 C
the AM amplifier. Ambient temperature Tamb 40 to +85 C
AMIN (pin 8) (Figure 3f) Storage temperature Tstg 50 to +150 C

The AM input has an internal bias Electrostatic handling VESD 2000 V
voltage. The direct voltage at this pin
is VRef1/2. The input resistance is about
470 k and the input capacitance is
smaller than 10 pF.
Table 4
Cable impedance vs resistor values
AMOUT (U4253BM only)
(pin 10) (Figure 3h) FM cable impedance () R1 () R2 ()
This pin is the output of the AM
amplifier in the U4253BM. The direct 50 150 22
voltage at this pin is almost VRef1/2.
75 270 33
The output impedance is about 200 .
The output capacitance is smaller than 100 390 51
10 pF.
125 470 86
AMOUT and AMOUT1 (U4254BM) 150 620 160
(Pins 10 and 11) (Figure 3g)
The buffered AM amplifier consists of
a complementary pair of CMOS
source followers. The transistor gates shifted to higher values with increases pling capacitors block any direct volt-
are connected to AMIN. Pin 10 is the resistance. If the pin is open, the age.
NMOS transistor s source, whereas threshold is set to 106 dB V. The antenna impedance is matched
pin 11 is the PMOS transistors source. to the input impedance of the FM sec-
Owing to the two different direct volt- VS (pin 14) tion by resistors R1 and R2. The value
age levels at these pins, they have to This pin is linked to the positive sup- of these resistors for various antenna
be connected together via an external ply voltage (7.28.8 V). impedances is given in Table 4.
capacitor of about 0.1 F. This tech- The 1 H choke between VREF2
nique enables an excellent dynamic FMOUT (pin 15) (Figure 3e) and the input of the FM section pre-
range to be achieved. The FM amplifier output is the open vents the antenna signal being short-
collector of a bipolar r.f. transistor. It circuited by the 0.0022 F decoupling
VREF1 (pin 12) (Figure 3i) should be linked to VS via a coil. capacitor to ground.
VREF1 is the stabilized voltage for the The 2.2 H choke following the
AM amplifier and the AGC block. To 0.1 F coupling capacitor at the AM
achieve good noise performance at LW TYPICAL APPLICATION output presents a very low impedance
frequencies, it is recommended that A typical application circuit is shown to AM signals, but a very high imped-
this pin is connected to ground via an in Figure 4. In this, it is assumed that ance to VHF signals.
external capacitor of about 1 F. the antennas for reception of long- [980031]
wave and medium-wave (LW/MW)
WBADJ (U4254BM) signals and very-high-frequency
AGCADJ (U4253BM( (VHF) signals are of different lengths.
(pin 13) (Figure 3d) The antennas are linked to the circuit
The threshold of the AGC can be via a protection circuit.
adjusted by varying the direct current Whereas the AM antenna is linked TEMIC U.K. Ltd.
at this pin. If the pin is connected directly to the input of the AM section Easthampstead Road
directly to GND1, the threshold is set via a 0.1 F coupling capacitor, the FM Bracknell, Berkshire RG12 1LX
to 96 dB V at the FM amplifier out- antenna is connected to the FM sec- United Kingdom
put. If a resistor is connected between tion via a p-i-n diode attenuator. Tel: 44 1344 707 300
this pin and GND1, the threshold is Before and after the attenuator cou- Fax: 44 1344 427 371

stage-lighting
control with DMX512
protocol
Before the computer
age, it required quite a
number of assistants to
control the stage light-
ing in a theatre. Today,
however, even here the
computer has proved
its usefulness as a tool.
With the DMX512 (Digi-
tal MultipleX for 512
units) standard, a com-
puter can control the
entire lighting system,
including ancillary func-
tions such as the colour
filters and dimmers. In
this setup, a simple
interface cable enables
the computer to control
up to 512 separate
lighting units.
Some of us theatregoers may remem- In most smaller theatres, the set of

ber the large theatre lights that were instructions developed for the United
manually operated. Each light States Institute for Theatre Technology
required at least a pair of hands a (USITT), code-named DMX-512, has
labour-intensive and therefore costly been adopted. This is an efficient, yet
affair. When electronic control units, simple, digital protocol, accepted in
and later the computer, became avail- many parts of the world, which
able, many theatres adopted analogue enables all aspects of the stage lighting
lighting control systems that were to be controlled by a computer.
much simpler to operate, and there-
fore more cost-effective. IN TIMES GONE BY
However, over the past ten years or In the early years of (analogue) elec-
so, digital control systems controlled tronic control units, an analogue signal
By our Editorial Staff by computer have become the norm. was required for each control channel,

52
that is, each lighting function that had

to be controlled. Whats more, a sepa- 1 V CC V CC
rate cable or pair of wires in such a

IC1 IC2
cable was needed for each of these 8 8
functions. This cable had to distribute

DMXIN 6 DMX 6 DMXOUT
linear control voltages of 010 V 4 1
D DMX R
according to an internationally 7 7
accepted set of rules. Evidently,

although this is a practical setup when 1
R D
4
there are not all that many lights V CC 3

DE
3
DE
involved, it becomes cumbersome and 2
RE RE
2
costly when many lights are to be con-

5 5
trolled, because it results in many or 75176 75176
very thick cables. However, for the
technicians involved, the use of low transmitter receiver
voltages means that it is a safe system 980013 - 11
that can be checked with a simple mul-
timeter.
With the increase of technical facil- norm by the USITT in 1990. It is based Figure 1. Basic layout
ities whereby modern projectors fulfil on the much more widely used RS485 of a simple transmit-
more and more functions, the ana- Standard. A basic layout of a DMX-512 ter and receiver used
logue system becomes more and more link between transmitter and receiver, in the DMX-512 sys-
impracticable. Each piece of equip- both of which use the same driver, is tem. The driver is a
ment needs several channels, which shown in Figure 1. Interconnection is standard driver for
makes the cabling ever more compli- via a symmetrically controlled pair of the RS485 system and
cated. Today, some lighting units pro- wires. is readily available.
vide 2530 functions. The data are transmitted asynchro-
In larger theatres, these difficulties nously serially over the wires. The set-
with analogue systems led in the early tings are sent sequentially, that is, first
1980s to the introduction of digital con- the level for dimmer 1, then that for
trol systems, which in the mid-1980s dimmer 2, and so on, until the levels
resulted in the USITT adopting the for all connected dimmers (up to 512)
digital DMX-512 standard. In this sys-
tem, each pair of wires can control up
to 512 functions. In practice, of course,
the number is restricted to 32. How- 2 4
3 3
8
ever, each unit being controlled may

1
use several channels at a time, so that RESET
a fair amount of the total available START BYTE CHANNEL CHANNEL CHANNEL
2 5 1 6 7 2 512
capacity is used. 980013 - 12
Although the DMX-512 protocol is

not new, it may not be known to many
readers. Moreover, a successor is no. name min. typ. max. unit
already being developed: the DMX-B. 1 reset 88 88 s
Fortunately, the new set of standards 2 mark 8 - 1 s
is backwards compatible with the 3 frame 43.12 44.0 44.48 s
DMX-512, so that older equipment 4 start bit 3.92 4.0 4.08 s
remains usable. 5 LSB 3.92 4.0 4.08 s
6 MSB 3.92 4.0 4.08 s
EFFICIENT AND 7 stop bit 3.92 4.0 4.08 s
EFFECTIVE 8 mark (between frames) 0 0 1.00 s
The DMX-512 Standard was last mod- 9 mark (between trains) 0 0 1.00 s
ified and officially laid down as a
Figure 2. The timing

diagram shows the
How to make a terminator maximum width of a
data block with which
Terminators are of great impor- up to 512 lighting
tance to ensure good and reliable units can be con-
communication, but, owing to trolled. In this setup
their small size, are easily mislaid. the repetition rate is
It is, therefore, useful, to be able 44.1 Hz.
to make one at low cost.
Remove the hood from an XLR
plug and solder a 120 , 0.25 W
resistor between pins 2 and 3,
and replace the hood. Thats all!
The photograph shows a com-
pleted terminator.

3 4
DMX R2
5
120
3
6 D
DMX
IC1
LTC490
DMX R1 8
2
R
120
DMX
980013 - 13
Figure 3. When lines

longer than about 1
metre are needed, a
bus repeater as shown
will be essential.
Figure 4. To get a better idea

have been sent. the case of lamps of the facilities provided by continued.
The reset pulse is followed by a whose brightness the DMX-512 standard, down- The next
mark signal that indicates the onset of must change load a demo version of step is the trans-
communication. Normally, the mark rapidly, use may ShowDesk from web site mitting of a num-
signal must be at least 8 s long, but be made of a shut- http://www/fpfltd.com ber of n+1
there are systems which are able to ter; the DMX-code frames, each of
recognize a mark-to-break width of then arranges the opening and closing which contains the setting of one of
4 s; these are coded DMX-512/1990 of the shutter. the connected dimmers. The first
(4 s). Each DMX-512 instruction consists transmitted frame, that is, the start
The onset of a cluster of bytes is of a start bit, eight data bits, and two byte, marks the onset of the series of
marked by a reset signal that is fol- stop bits (one frame). In the quiescent commands and has a fixed value 00H.
lowed by a start byte. This is followed state, the level on the communication This indicates that the settings refer to
by the brightness data for the first dim- line is high (mark), whereas the active the dimmers. Because of this start
mer in the shape of an 8-bit value level is low (break or space). The break code, standards that use a different
0255, that is, 00HFFH. The relation- signal itself is not less than 88 s wide, start code for controlling other types of
ship of this value with respect to the a time that corresponds to two frames. unit may be added at a later date. For
present brightness setting is a matter The system recog- this reason, the
for the dimmer itself. For instance, the nizes the break as a Figure 5. A modern control connected dim-
manufacturer of the dimmer may give reset signal, where- room from where the light- mers must not
it a control curve according to which upon all current ing manager controls the react when the
its brightness increases or decreases. In operations are dis- stage lighting resembles a communication is
computer centre.

Figure 6. Modern theatre lights may have more than 25

functions. For each of these functions, the light uses a
DMX address.
begun with a start code other than 00H. ponents at frequencies up to 2.5 MHz. The leakage current at the output
This means that in the DMX system should not exceed 100 A during an
TIMING cables must be used that are quite dif- output signal.
As mentioned earlier, the DMX-512 ferent from the ones used in analogue The input impedance of the
standard supports up to 512 dimmers; systems. No longer can standard cable receiver must be not lower than 12 k,
a minimum is not stipulated. After the with simple connectors be used: spe- while the output load must not exceed
data has been transferred to the final cific types of cable with corresponding 60 .
dimmer in the chain, the data line connectors are imperative. Short-circuit currents of 150 mA to
returns to the quiescent state (mark). As mentioned earlier, the system is earth and 250 mA to the positive sup-
The next reset signal indicates that a based on the RS485 interface, which is ply line are permissible.
new transfer of data is imminent. It is an improvement of the earlier RS422
imperative that two sequential setting system. The improvements make pos- This article is based on information
instructions are separated by an inter- sible more connections to the bus and available in the relevant Internet infor-
val (pause) of not less than 1196 s. additional space for more masters. The mation from Soundlight (http://www.
The data rate in the DMX-512 stan- latter facility is not used in the soundlight.de/techtips/dmx512/dmx
dard is 250 kbit/s. Since one bit lasts for DMX512 system, but the former 512.htm).
4 s, a complete instruction, including enables applications within a network. [980013]
the stop and start bits, takes 44 s. The Although the RS485 standard limits
timing diagram in Figure 2 shows a the length of the cable, exceeding the
complete sequence of 512 bytes, the specified length within reason will not
data stream required for the theoreti- create difficulties: distances of up to
cal maximum of 512 dimmers. When 1 metre (3.3 ft) are perfectly usable,
all times are added, the maximum provided that the final unit in the
time duration is 22,668 s, which cor- chain is terminated correctly into an
responds to a repetition rate of impedance of 120 . Pinout of connectors used
44.1 Hz. From this, it is clear that the If larger distances need to be
use of the maximum number of dim- spanned, a bus repeater should be 5-way AXR (XLR) plug
mers restricts the speed of operation. used. The circuit of such a repeater is pin function
The DMX-connection allows 32 shown in Figure 3. Note that both the 1 earth (screen)
lighting units to be linked to the bus. input and output are terminated into 2 DMX-
There is no limitation as to the num- 120 . The DMX-512 standard does 3 DMX+
ber of addresses that each of these not specify the electrical isolation. 4 n.c. (may be linked to DMX)
units can handle. 5 n.c. (may be linked to DMX+)
SOME LIMITING
3-way AXR (XLR) plug
CABLES VA L U E S
pin function
AND ALL THAT It is important that the driver can han-
1 earth (screen)
The cables carry rectangular-wave sig- dle signal levels between 1.5 V and 5 V
2 DMX-
nals at a frequency of 250 kHz maxi- at a common-mode potential between
3 DMX+
mum. Each signal may contain com- 7 V and +12 V.

functional
trinket
reacts to sound pressure
Strictly speaking, a
trinket cannot be
functional, but the
title of this article is
apt. It is a kind of
miniature VU meter
whose LED bar fluc-
tuates in rhythm with
ambient sound.
Owing to its modest
dimensions, it can
easily be worn as an
adornment which, in
a disco or at a party,
will, no doubt, draw
the attention of many.
Nowadays, not many things surprise the planet Mars are accepted as a com-
us any more. In this age of high tech- monplace.
nology, we are used to all kinds of new Of course, this is true not only in
discoveries and developments, and the world of science and technology,
technical ingenuity. Mobile telephones, but also in other spheres of human
portable CD players, watches with interest. It is not easy to dream up
built-in alarm: what is there left to something really new or innovative
impress us with? Not only satellite TV, something that draws a spontaneous
Design by T. Giesberts but also a radio-controlled vehicle on reaction of Fancy that or How do

56
S1 3V
1 R2
C5
220
T1
R4 100 10V D10
C6
100k
R1
C2 100n D9
* JP1
10k
D12
BF245A 3
3V 100 10V D8
BAT85 L10
10
1 9 11
3 7 MODE L9 D7
BT1 5 D13 R6 12
6 5 IC2 L8
A C1 B IC1 10k SIG
L7
13
2 C D6
BAT85 6 14
4 RHI L6
3V 150n 8 7 15
R3 R5 REFOUT L5 D5
16
L4
1k8
100k
22k
R7 LM3915
P1 TLC271 17
L3 D4
8 18
100k REFADJ L2
4 1
RLO L1 D3
MIC1
B
2
D11 C3 C4 D2
220 470n D1
25V
BAT85 see text

A 1V 0V27 1V52
* siehe * voir texte
980025 - 11
B C
* Text * zie tekst
Figure 1. The circuit

they do it? consists of a micro- the ear plugs in, play are readily available today. The
The trinket phone, an because the sound remainder is some electronics to con-
described in this article amplifier/rectifier, and pressure is then clearly vert the picked up signals to a step-
is designed specially for a display of ten LEDs. no longer healthy. wise varying direct voltage for driving
lovers of music and the LEDs. A final requirement is that
dance. It is intended to DESIGN the electronics can operate for a long
enable constructors to build something The aim of the design is to make vari-
that sets them apart from others. It is ations in detected ambient sound,
not exactly hi-tech, but rather a com- music or speech, visible by means of
bination of technology and music. It is a moving LED or bar of LEDs, not Parts list
an adornment that, by means of a unlike the way a VU meter works. At
moving point of light, reacts to the the same time, it has been kept tiny Resistors:
sound pressure of music to which it is (7520 mm or 30.8 in)to enable it R1, R6 = 10 k
exposed. It may, nevertheless, also ful- being worn as a brooch . R2 = 220
fil a useful function: when the wearer Clearly, a microphone is needed, R3 = 1.8 k
of the trinket notes that and fortunately electret R4, R5 = 100 k
the LED indication is types are available in R7 = 22 k
Figure 2. Placing the P1 = 100 k preset, upright
constantly at maxi- ICs at the track side very small sizes. Also,
mum, it is time to put of the board meant tiny LEDs for the dis- Capacitors:
that the dimensions C1 = 0.15 F, pitch 5 mm
could be kept small. C2, C5 = 100 F, 10 V, radial
C3 = 220 F, 25 V, radial
C4 = 0.47 F, pitch 5 mm
C6 = 0.1 F, pitch 5 mm
980025-1
IC1
IC2
2 (C) Segment Semiconductors:
D1D10 = LED, 3 mm, high effi-
ciency
D11D13 = BAT85
T1 = BF254A
Integrated circuits:
IC1 = TLC271CP
980025-1 IC2 = LM3915N
(C) Segment
Miscellaneous:
JP1 = jumper
S1 = miniature on/off switch or
jumper (see text)
BT1 = 3 V lithium battery Type
CR2025 or CR2032 with holder for
C4 C1 C2 board mounting
T
P1
MIC1 = electret microphone, dia.
C3
R5
R2
R1
10 mm
D13 C5 BT1
C6
R4 R7 R6
0 PCB Order no. 980025-1 (see Read-
D12
D11
+ (C) Segment ers Services towards the end of
JP1 S1
T1 980025-1 this issue)

PC1X
R3
D10
D1

time from a small, low-voltage battery.
The final design is shown in Fig- 3
ure 1. The sound is picked up by a tiny
electret microphone MIC1. It has a
diameter of about 10 mm (0.4) and
contains an integrated impedance
equalizer that also functions as ampli-
fier. The supply line to this amplifier is
set by R1 to just under half the supply
voltage (test point A). The output of
the microphone is applied to sensitiv-
ity control P1 via capacitor C1.
The signal at the wiper of P1 is
applied to operational amplifier IC1.
This stage has a twofold function:
amplifier and, in conjunction with D12
and D13, single-phase rectifier. Its
amplification is determined by the
ratio R3:R4: with values as specified, it
amounts to 6. This results in a direct
voltage at its output (pin 6) that varies
in accordance with the strength of the
signal picked up by the microphone.
This voltage is averaged to some
extent by network R6-C4 to prevent
very rapid fluctuations, which would
lead to an unstable display.
The display is formed by a bar of
ten LEDs that are controlled by the
well-known Type LM3915 driver (IC2).
The driver comprises a voltage refer-
ence source, an accurate potential
divider and ten comparators, each of Figure 3. Both sides of
which can control an LED directly. The the completed proto-
potential difference between two suc- type board. Soldering
cessive LEDs corresponds to a sound the ICs in place
pressure difference of 3 dB. requires a steady
The direct voltage applied to pin 5 hand an a fine-tipped
of IC2 can be converted to a single, soldering iron.
wandering LED (dot mode) or to a
fluctuating bar display (bar mode) via
pin 9. In the dot mode, the contacts of
jumper JP1 must remain open; in the
bar mode, they should be closed.
CONSTRUCTION shown in Figure 3. A clip to enable the at the output of the op amp across
The design of the printed-circuit board board to be fastened to a lapel or sim- pins 4 and 5 of IC2 (without micro-
in Figure 2 is a compromise between ilar may be soldered or glued at the phone). If this is higher than 100 mV, it
small size and ease of construction. underside near the battery (if soldered, is advisable to replace IC1.
This has been accomplished by accom- take care not to cause a short-circuit). The sensitivity of the circuit with a
modating IC1 and IC2 on the track side There are, of course, other possibil- standard electret microphone and P1
of the board instead of as normal on ities of construction: for instance, the set to maximum is arranged to give a
the component side. Note that solder- LEDs may be clustered together away full display for a sound pressure input
ing these components requires a small from the board (which can then be level of 100 dB. Note that a sustained
soldering iron with a very fine tip. hidden in, say, a breast pocket). The input at this level is dangerous for
The circuit is powered by a 3 V two sections can then be linked by a your hearing. If the sensitivity is con-
lithium cell that is fitted on to the mini cable. Ingenious readers can, no sidered insufficient, it may be
board with the aid of a specially avail- doubt, think of different constructions. increased by giving R3 a value of
able holder. Note that the +ve termi- The LEDs specified have a small 1.5 k or even 1.2 k.
nal must point upward. outer edge. This edge must be filed or
The microphone is soldered cut away with a sharp knife to enable BATTERY
directly to the pins marked with an these diodes to be placed close The circuit draws a current of about
input arrow. together on the board. 6 mA with all LEDs out, about 12 mA
On/off switch S1 may be replaced Although problems are highly in the dot mode, and up to 22 mA
(as it is in the prototype) by a jumper, unlikely, the voltage level at three test with all LEDs on in the bar mode.
which is smaller than a switch. points is given in the circuit diagram Since a Type CR2025 battery has a
Note that D2D10 are all placed in to facilitate faultfinding. capacity of 120 mAh, and a CR2032
the same direction, but D1 the other Depending on the type of micro- one of 170 mAh, the trinket will con-
way around. phone used, it may be necessary to tinue to light even when the party
change the value of R1 to obtain a volt- lasts until the early hours certainly in
F I N A L LY age of 1 V at test point A. If this is the dot mode.
The completed prototype board is done, it is advisable to check the offset [980025]

58
2/98
COMMANDS
Command Function Example(s)
RUN Execute a program RUN
CONT CONTinue after a STOP or Control-C CONT
LIST LIST program to the console device LIST LIST 10-50
LIST# LIST program to serial printer LIST# LIST# 50
DATASHEET
NEW erase the program stored in RAM NEW

NULL set NULL count after carriage return-line feed NULL
RAM evoke RAM mode, current program in READ/WRITE memory RAM
ROM evoke ROM mode, current program in ROM/EPROM memory ROM ROM 3
XFER transfer a program from ROM/EPROM to RAM XFER
PROG save the current program in EPROM PROG
PROG1 save baud rate information in EPROM PROG1
PROG2 save baud rate information in EPROM and execute program after RESET PROG2
FPROG save the current program in EPROM using the INTELligent algorithm FPROG
FPROG1 save baud rate information in EPROM using the INTELligent algorithm FPROG1
save baud rate information in EPROM and execute program after RESET,
80C32 BASIC Control Computer
FPROG2 FPROG2
use INTELligent algorithm
MCS-52 BASIC Language
STATEMENTS
Statement Function Example(s)
BAUD set baud rate for line printer port BAUD 1200
CALL CALL assembly language program CALL 900H
Quick Reference
Instruction Set 1
CLEAR CLEAR variables, interrupts and Strings CLEAR

CLEARS CLEAR Stacks CLEARS
CLEARI CLEAR interrupts CLEARI
CLOCK1 enable REAL TIME CLOCK CLOCK1
CLOCK0 disable REAL TIME CLOCK CLOCK0
DATA data to be read by READ statement DATA 100
#
2/98
POP POP argument stack to variables POP A,B,C

PWM PULSE WIDTH MODULATION PWM 50,50,100
REM remark REM DONE
RETI return from Interrupt RETI
STOP break program execution STOP
STRING allocate memory for strings STRING 50,10
DATASHEET
UI1 evoke User console Input routine UI1

UI0 evoke BASIC console Input routine UI0
UO1 evoke User console Output routine UO1
UO0 evoke BASIC console Output routine UO0
OPERATORS DUAL OPERAND
Operator Function Example(s)
+ addition 1+1
/ division 10 / 2
** exponentiation 2**4
* multiplication 4*4
subtraction 84
.AND. logical AND 10.AND.5

.OR. logical OR 2.OR.1

.XOR. logical exclusive OR 3.XOR.2
OPERATORS SINGLE OPERAND
Quick Reference
Instruction Set 3
ABS() absolute value ABS(3)

NOT() ones complement NOT(0)
INT() integer INT(3.2)
SGN() sign SGN(5)
SQR() square root SQR(100)
RND random number RND

Instruction Set 2
Quick Reference
READ read data in DATA statement READ A
RESTORE restore READ pointer RESTORE
DIM allocate memory for arrayed variables DIM A(20)
DO set up loop for WHILE or UNTIL DO
UNTIL test DO loop condition(loop if false) UNTIL A=10
WHILE test DO loop condition WHILE A=B
END terminate program execution END
FOR-TO-{STEP} set up FOR-NEXT loop FOR A=1 TO 5
NEXT test FOR-NEXT loop condition NEXT A
GOSUB execute subroutine GOSUB 1000
RETURN return from subroutine RETURN
GOTO go to program line number GOTO 500
ON GOTO conditional GOTO ON A GOTO 5,20
ON GOSUB conditional GOSUB ON A GOSUB 2,6
IF-THEN-{ELSE} conditional test IF A=B THEN A=0
INPUT INPUT a string or variable INPUT A
DATASHEET
LET assign a variable or string a value (LET is optional) LET A=10
ONERR ONERR or GOTO line number ONERR 1000
generate an interrupt when TIME is equal to or greater than ONTIME,
ONTIME ONTIME 10, 1000
argument-line number is after comma
ONEX1 GOSUB to line number following ONEX1 when INT1 pin is pulled low ONEX1 1000
PRINT PRINT variables, strings or literals, P. is shorthand for PRINT PRINT A
PRINT# PRINT to software serial port PRINT# A
PHO. PRINT HEX mode with zero suppression PHO.A
PH1. PRINT HEX mode with no zero PH1.A
PHO.# PHO.# to line printer PHO.#A
2/98
PH1.# PH1.# to line printer PH1.#A
PUSH PUSH expression on argument stack PUSH 10,A
Instruction Set 4
Quick Reference
LOG() natural log LOG(10)
EXP() e (2.7182818) to the x EXP(10)
SIN() returns the sine of argument SIN(3.14)
COS() returns the cosine of argument COS(0)
TAN() returns the tangent of argument TAN(.707)
ATN() returns the arctangent of argument ATN(1)
OPERATORS SPECIAL FUNCTION
CBY() read program memory P.CBY(4000)
DBY() read/assign internal data memory DBY(99)=10
XBY() read/assign external data memory P.XBY(10)
GET read console P.GET
IE read/assign IE register IE=82H
IP read/assign IP register IP=0
PORT1 read/assign I/O port 1 (P1) PORT1=0FFH
PCON read/assign PCON register PCON=0
DATASHEET
PCAP2 read/assign RCAP2 (RCAP2H:RCAP2L) RCAP2=100

T2CON read/assign T2CON register P.T2CON
TCON read/assign TCON register TCON=10H
TMOD read/assign TMOD register P.TMOD
TIME read/assign the real time clock P.TIME
TIMER0 read/assign TIMER0 (TH0:TL0) TIMER0=0
TIMER1 read/assign TIMER0 (TH1:TL1) P.TIMER1
TIMER2 read/assign TIMER0 (TH2:TL2) TIMER2=0FFH
STORED CONSTANT
PI pi = 3.1415926 PI
2/98

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The term computer hobbyist brings to mind the image of a

lonely father sitting in a spare bedroom, typing cryptic

an IPX network, a modem or a null-

2 - 2/98 Elektor Electronics EXTRA PC-TOPICS

PC-TOPICS Elektor Electronics EXTRA 3 - 1/98

D25 D25 D25 D25

PE(paper error) ERR(error) BSY(busy) PE(paper error) ERR(error) BSY(busy)

4 - 2/98 Elektor Electronics EXTRA PC-TOPICS

multitasking operating systems and which interconnect D6

400 kbyte/s) a special ECP or UCM Link option (V4.0 and PE

There is software in C++ which is able allow the remaining 3

PC-TOPICS Elektor Electronics EXTRA 5 - 1/98

RS232 interface for

Circuit and circuit board

6 - 2/98 Elektor Electronics EXTRA PC-TOPICS

Programming the on-chip EEPROM also

1. Modify EEPROGIX as follows:

PC-TOPICS Elektor Electronics EXTRA 7 - 1/98

MC68HC11A1 (256 bytes RAM,

The MC68HC11 is also available from

8 - 2/98 Elektor Electronics EXTRA PC-TOPICS

USB and FireWire

10 - 2/98 Elektor Electronics EXTRA PC-TOPICS

PC-TOPICS Elektor Electronics EXTRA 11 - 1/98

serial bus (backplane environment)

serial bus (cable environment)

CPU memory I /O CPU

serial bus (backplane environment)

12 - 2/98 Elektor Electronics EXTRA PC-TOPICS

occurs in the interval between the

subaction 1: request subaction 2: response

first channel second channel third channel

isoch isoch isoch isoch

PC-TOPICS Elektor Electronics EXTRA 13 - 1/98

14 - 2/98 Elektor Electronics EXTRA PC-TOPICS

charging is inversely proportional to straightforward. The few parts that go

PC-TOPICS Elektor Electronics EXTRA 15 - 2/98

Elektor Electronics 2/98

Elektor Electronics 2/98 13

Figure 4. Circuit dia- Figure 5. Copper track

voltage of about 0.7 V. Consequently saturation current measurement,

the opamp pulls its output to (practi- D1

As this will be in the mA region, the R1 = 5k6 1-570079

error is, we feel, insignificant for all R2 = 22k T

(mA10). Mind you, you are measur- set, vertical

True, a value of 1 would have been

14 Elektor Electronics 2/98

bands is the diffi-

Elektor Electronics 2/98

maximum count is 65,535, effectively

gate time this would allow the counter

(RB7) until the prescaler overflows. IC1a

ASCII and finally sent to the LCD dis-

Elektor Electronics 2/98 19

20 Elektor Electronics 2/98

Figure 3. Method of switching the OFFSET select

connect the LCD module to the PCB. C6 = 18pF ceramic

of money on these displays, they are C7

When the unit is first powered up, R3

Elektor Electronics 2/98 21

Elektor Electronics 2/98

In general, the signal levels in current volume control (AVC) circuit

C8 25V C17 25V