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RFD3055, RFD3055SM, RFP3055

Data Sheet July 1999 File Number 3648.2

12A, 60V, 0.150 Ohm, N-Channel Power Features


MOSFETs 12A, 60V
These are N-Channel enhancement mode silicon gate
rDS(ON) = 0.150
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a Temperature Compensating PSPICE Model
specified level of energy in the breakdown avalanche mode Peak Current vs Pulse Width Curve
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching UIS Rating Curve
convertors, motor drivers, relay drivers, and drivers for high 175oC Operating Temperature
power bipolar switching transistors requiring high speed and
Related Literature
low gate drive power. These types can be operated directly
- TB334 Guidelines for Soldering Surface Mount
from integrated circuits.
Components to PC Boards
Formerly developmental type TA49082.
Symbol
Ordering Information D

PART NUMBER PACKAGE BRAND

RFD3055 TO-251AA FD3055


G
RFD3055SM TO-252AA FD3055

RFP3055 TO-220AB FP3055 S

NOTE: When ordering, use the entire part number. Add the suffix 9A,
to obtain the TO-252AA variant in tape and reel, i.e. RFD3055SM9A.

Packaging
JEDEC TO-251AA JEDEC TO-252AA

SOURCE DRAIN (FLANGE)


DRAIN
GATE
DRAIN (FLANGE) GATE
SOURCE

JEDEC TO-220AB
SOURCE
DRAIN
GATE

DRAIN (FLANGE)

4-435 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999
RFD3055, RFD3055SM, RFP3055

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified


RFD3055, RFD3055SM, RFP3055 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 60 V
Drain to Gate Voltage (RGS = 20K) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS 20 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 12 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Refer to Peak Current Curve A
Single Pulse Avalanche Rating (Figures 14, 15) . . . . . . . . . . . . . . . . . . . . . . . . . . IAS Refer to UIS Curve
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD 53 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.357 W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ , TSTG -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250A, VGS = 0V (Figure 11) 60 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250A (Figure 10) 2 - 4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 1 A
TC = 125oC, VDS = 0.8 x Rated BVDSS - - 25 A
Gate to Source Leakage Current IGSS VGS = 20V - - 100 nA
Drain to Source On Resistance rDS(ON) ID = 12A, VGS = 10V (Figure 9) (Note 2) - - 0.150
Turn-On Time tON VDD = 30V, ID = 12A - - 40 ns
RL = 2.5, VGS = +10V
Turn-On Delay Time td(ON) - 7 - ns
RG = 10
Rise Time tr (Figure 13) - 21 - ns
Turn-Off Delay Time td(OFF) - 16 - ns
Fall Time tf - 10 - ns
Turn-Off Time tOFF - - 40 ns
Total Gate Charge Qg(TOT) VGS = 0 to 20V VDD = 48V,ID = 12A, - 19 23 nC
RL = 4,
Gate Charge at 10V Qg(10) VGS = 0 to 10V - 10 12 nC
Ig(REF) = 0.24mA
Threshold Gate Charge Qg(TH) VGS = 0 to 2V (Figure 13) - 0.6 0.8 nC
Input Capacitance CISS VDS = 25V, VGS = 0V, - 300 - pF
f = 1MHz (Figure 12)
Output Capacitance COSS - 100 - pF
Reverse Transfer Capacitance CRSS - 30 - pF
Thermal Resistance Junction to Case RJC - - 2.8 oC/W

Thermal Resistance Junction to Ambient RJA TO-251 and TO-252 - - 100 oC/W

TO-220 - - 62.5 oC/W

Source to Drain Diode Specifications


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage VSD ISD = 12A - - 1.5 V
Reverse Recovery Time trr ISD = 12A, dISD /dt = 100A/s - - 100 ns
NOTES:
2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).

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RFD3055, RFD3055SM, RFP3055

Typical Performance Curves Unless Otherwise Specified

1.2 14
POWER DISSIPATION MULTIPLIER

1.0 12

ID , DRAIN CURRENT (A)


10
0.8
8
0.6
6
0.4
4

0.2
2

0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175
TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
ZJC, NORMALIZED TRANSIENT

1
THERMAL IMPEDANCE

0.5
PDM
0.2

0.1
0.1
0.05 t1
0.02 t2
0.01
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC x RJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 100 101

t1 , RECTANGULAR PULSE DURATION (s)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

50 200
TC = 25oC FOR TEMPERATURES ABOVE 25oC
IDM , PEAK CURRENT CAPABILITY (A)

DERATE PEAK CURRENT


CAPABILITY AS FOLLOWS:
ID , DRAIN CURRENT (A)

100
10 100s 175 T C
I = I 25 * ----------------------
150
1ms VGS = 20V
OPERATION IN THIS
AREA MAY BE 10ms
1 LIMITED BY rDS(ON)
DC VGS = 10V

TC = 25oC TRANSCONDUCTANCE
TJ = MAX RATED MAY LIMIT CURRENT
SINGLE PULSE IN THIS REGION
0.1 10
1 10 100 10-3 10-2 10-1 100 101 102 103 104
VDS , DRAIN TO SOURCE VOLTAGE (V) t, PULSE WIDTH (ms)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY

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RFD3055, RFD3055SM, RFP3055

Typical Performance Curves Unless Otherwise Specified (Continued)

50 24
PULSE DURATION = 80s
VGS = 10V DUTY CYCLE = 0.5% MAX
IAS , AVALANCHE CURRENT (A)

ID , DRAIN CURRENT (A)


18 VGS = 8V
STARTING TJ = 25oC
VGS = 7V
10
12
STARTING TJ = 150oC

VGS = 6V

If R = 0 6
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
VGS = 5V
IF R 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] VGS = 4.5V
1 0
0.001 0.01 0.1 1 0 1.5 3.0 4.5 6.0 7.5
tAV, TIME IN AVALANCHE (ms) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING FIGURE 7. SATURATION CHARACTERISTICS

24 2.5
VDS = 15V PULSE DURATION = 80s
-55oC 25oC
ID , ON STATE DRAIN CURRENT (A)

NORMALIZED DRAIN TO SOURCE


PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 12A
2.0
18 ON RESISTANCE

175oC 1.5
12

1.0

6
0.5

0 0
0 2 4 6 8 10 -80 -40 0 40 80 120 160 200
VGS , GATE TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC)

FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON


RESISTANCE vs JUNCTION TEMPERATURE

2.0
NORMALIZED GATE THRESHOLD VOLTAGE

2.0
VGS = VDS , ID = 250A ID = 250A
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE

1.5 1.5

1.0 1.0

0.5 0.5

0 0
-80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200
TJ , JUNCTION TEMPERATURE (oC) TJ , JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
TEMPERATURE VOLTAGE vs TEMPERATURE

4-438
RFD3055, RFD3055SM, RFP3055

Typical Performance Curves Unless Otherwise Specified (Continued)

VGS, GATE TO SOURCE VOLTAGE (V)


600 60 10

VDS , DRAIN TO SOURCE VOLTAGE (V)


VGS = 0V, f = 1MHz
CISS = CGS + CGD
VDD = BVDSS VDD = BVDSS
CRSS = CGD
COSS CDS + CGD 45 7.5
C, CAPACITANCE (pF)

400
CISS
30 5.0
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
200
COSS 0.25 BVDSS 0.25 BVDSS
15 2.5
RL = 5
IG(REF) = 0.24mA
CRSS
VGS = 10V
0 0
0 IG(REF) IG(REF)
0 5 10 15 20 25 20 t, TIME (s) 80
VDS , DRAIN TO SOURCE VOLTAGE (V) IG(ACT) IG(ACT)

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.


FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT

Test Circuits and Waveforms


VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS


+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01
tAV

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG 0
-
DUT 90%

VGS 50% 50%


PULSE WIDTH
VGS 10%
0

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

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RFD3055, RFD3055SM, RFP3055

Test Circuits and Waveforms (Continued)

VDS
RL VDD Qg(TOT)

VDS
VGS = 20V

VGS Qg(10)
+
VDD VGS = 10V
- VGS

DUT VGS = 2V
Ig(REF) 0
Qg(TH)

Ig(REF)
0

FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS

4-440
RFD3055, RFD3055SM, RFP3055

PSPICE Electrical Model


.SUBCKT RFP3055 2 1 3 ; rev 10/26/93
CA 12 8 0.540e-9
CB 15 14 0.540e-9 DPLCAP 5 DRAIN
CIN 6 8 0.300e-9 10
LDRAIN 2
DBODY 7 5 DBDMOD
RSCL1
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD RSCL2 + 51 DBREAK
5
ESCL
EBREAK 11 7 17 18 67.9 51
EDS 14 8 5 8 1 50
RDRAIN 11 + DBODY
EGS 13 8 6 8 1 ESG 6
8 17
ESG 6 10 6 8 1 + 16 EBREAK 18
VTO
EVTO 20 6 18 8 1 +
MOS2
EVTO 21
GATE RGATE
IT 8 17 1 + 18
8 6 MOS1
LGATE 9
LDRAIN 2 5 1e-9 1
LGATE 1 9 4.61e-9 RIN CIN
LSOURCE 3 7 4.61e-9 8 RSOURCE LSOURCE
3
MOS1 16 6 8 8 MOSMOD M=0.99 7 SOURCE
MOS2 16 21 8 8 MOSMOD M=0.01 S1A S2A
12 13 14 15 RBREAK
RBREAK 17 18 RBKMOD 1 17 18
8 13
RDRAIN 50 16 RDSMOD 1e-4
S1B S2B
RGATE 9 20 7.23 13 RVTO
RIN 6 8 1e9 CA CB 19
IT
RSCL1 5 51 RSLVCMOD 1e-6 + + 14
6 5 VBAT
RSCL2 5 50 1e3 EGS EDS +
8 8
RSOURCE 8 7 RDSMOD 108e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.5
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))}
.MODEL DBDMOD D (IS=4.33e-14 RS=2.78e-2 TRS1=1.10e-3 TRS2=5.19e-6 CJO=3.94e-10 TT=7.63e-8)
.MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6)
.MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10)
.MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6)
.MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5)
.MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6)
.MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFet Featuring Global Temperature
Options; authored by William J. Hepp and C. Frank Wheatley.

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RFD3055, RFD3055SM, RFP3055

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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4-442
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