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5 4 3 2 1

PRELIMINARY GUAM S1G4 SCHEMATIC DESIGN


DDR III, 1333MT/S UNBUFFERED DDR3 Optional CPU
Channel A NEAR SODIMM Temperature sensor
HDT 18,19 16
16

Channel B UNBUFFERED DDR3


FAR SODIMM
D
EXTERNAL CLOCK GENERATOR SCAN AMD S1G4 CPU D
16 18,19
ICS9LPRS478
20 SB-TSI
14,15,16,17 16

OUT
HyperTransport

IN
HT Debug LINK0
DISPLAY PORT Header
2,3,4 37,38 16x16
21

LVDS CON LVDS MUX RS880M FRAME BUFFER


35
Side port DRR3 512MBIT
MXM 3.0 HyperTransport LINK0 CPU I/F
eDP CON X8 PCIE MUX 24
37 33 DX10 IGP
LVDS/TVOUT/TMDS Ambient Light Sensor
I2C I/F BOOTSTRAPS
IEEE 1394 VGA CON CRT MUX DISPLAY PORT X2 ROM(NB)
C
44 36 24 52 C
Side Port Memory
1 X16 PCIE I/F
LASSO CON PCIE x8
36 1 X4 PCIE I/F WITH SB
6 X1 PCIE I/F
GPP PCIE INTERFACE
21,22,23,24,25

MINI PCIE PCIE ETHERNET USB3.0 PCIE


48 51 Controller 39 x2 PCIE
GPP4&5 50 X4

MINIPCIE AZALIA CODEC Headphone & SPDIF MIC In Jack 43


48 HD AUDIO I/F
SB800 Jack 43
USB12 42,43
USB2.0 (14)+1.1(2) Digital MIC Array Speaker Headr x2
Header x2 43
SIM card SATA III (6 PORTS) CIR 42
socket MINIPCIE Express Card MINIPCIE GPP INTERFACE 45
49 50 49 4 X1 PCIE GEN2 I/F

B
INT. CLK GEN. SATA III I/F Mobile 2.5" HDD Mobile ODD 41 eSATA B
41 41
GB MAC
HW MONITOR CPU FAN
SD Reader USB#3 USB#2 USB#1 USB#0 USB 2.0
44 46 46 46 46 PCI/PCI BDGE
HW MONITOR I/F HW MONITOR CPU Tempreture Sensor
INT. RTC 28
Bluetooth Finger Print EC 26,27,28,29 VOLTAGE MONITOR
Reader USB1.1
USB1.1-1 45 USB1.1-0 45 HD AUDIO
SPI I/F SPI ROM
LPC I/F 28
SPI I/F
GB ETHERNET PHY RGMII
(Optional) ACPI 1.1 I2C I/F BOOTSTRAPS
47 ROM (SB) 30

BATTERY CHAGER CPU CORE/NB POWER CPU MEMORY POWER


7 8 9
LPC

A
SYSTEM MAIN POWER 1V8 &1V1DUAL 1V5 &1V5DUAL A

13 POWER 10 POWER 11
SCANNED SMSC1100 DEBUG LPC ROM TPM1.2
MATRIX PS2 EC POSTCARD LPC header
KEYBOARD TOUCH PAD
VCCNB&VLDT DISCHARGE CIRCUIT RESET,FAN 53 53 52 57 54 54
MICRO-STAR INT'L CO.,LTD
Power 12 59 & ENABLES 55
MSI
MS-168x
Size Document Description Rev
Custom 1.0
BLOCK DIAGRAM
Date: Monday, June 21, 2010 Sheet 1 of 52
5 4 3 2 1
5 4 3 2 1

D
TABLE OF CONTENTS D

P01 : BLOCK DIAGRAM P32 : MXM PWR / MISC


P02 : TABLE OF CONTENTS P33 : MXM 3.0 EDGE
P03 : POWER DELIVERY CHART P34 : LVDS / CRT SWITCH
P04 : POWER SEQUENCE CHART P35 : LVDS CON / BACKLIGHT
P05 : CLOCK DISTRIBUTION P36 : CRT / LASSO CONN
P06 : MISC TABLES P37 : EDP / DPD
P07 : BATTERY CHARGER P38 : DPB / DPC
P08 : CPU CORE PWR P39 : USB3.0 (1)
P09 : CPU MEM PWR P40 : USB3.0 (2)
C P10 : 1V1DUAL / 1V1 /18V /3V3 /5V P41 : SATA CONN / DEBUG C

P11 : 1V5 / 1V5DUAL P42 : HD AUDIO CODEC


P12 : NBCORE / VLDT P43 : HD AUDIO CONN
P13 : SYSTEM POWER P44 : 1394 / SD READER
P14 : S1G4 HT I/F P45 : FP / BT / CIR
P15 : S1G4 DDRIII MEMORY I/F P46 : USB2.0 PORTS
P16 : S1G4 CTRL / DEBUG P47 : LAN PHY (B50610)
P17 : S1G4 PWR / GND P48 : MINI PCIE SLOT 0, 3
P18 : DDR3 SODIMMS A/B CHANNLE P49 : MINI PCIE SLOT 1, 2
P19 : DDR3 SODIMMS DECOUPLING P50 : X4 GPP / PCIE EXPRESS CARD
P20 : EXTERNAL CLOCK GEN P51 : LOM (57760)
P21 : RS880M HT I/F P52 : KBC - SMSC1100L
B P22 : RS880M PCIE I/F P53 : KBCBIOS / KBD /MOUSE B

P23 : RS880M SYSTEM P54 : CONFIG ROM / LPC ROM / TPM


P24 : RS880M SPMEM/STRAPS P55 : RESET / FAN / LED / PWRGD
P25 : RS880M POWER P56 : ACPI CONN
P26 : SB8X0 PCIE/PCI/CPU/LPC/CLK P57 : DEBUG - POST LEDS
P27 : SB8X0 GPIO/USB/AZ/RGMII P58 : DUAL RAIL ENABLE
P28 : SB8X0 SATA/IDE/HWM/SPI P59 : DISCHARGE CIRCUIT
P29 : SB8X0 POWER / DECOUPLING P60 : SB800 A11 PU RES
P30 : SB8X0 STRAPS P61 : CHANGE HISTROY
P31 : PCIE SWITCH P62 : POWER ON SEQUENCE CHART

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom 1.0
BLOCK DIAGRAM
Date: Monday, June 21, 2010 Sheet 2 of 52
5 4 3 2 1
5 4 3 2 1

AMD S1G4
CPU_VDDA_RUN CPU_VDDIO_SUS
DDRiII SODIMMX2--SYSTEM
VCCA 2.5V VDD MEM 4A
MEM_VTT
VTT_MEM 0.5A
CPU_VDD_RUN VDD CORE
BATTERY BATTERY +VIN CPU core CPU_VDD_RUN@38A 1.375-1.500V 36A CLOCK GEN
11.1V 62WHr CHARGER PWM 1.2V 0.2A
+1.5V BEAD
MAX1535 MAX17009 CPU_VDDNB_RUN VDDNB CORE
0.9V 4A +3.3V BEAD 3.3V
+1.1V
D
VLDT BEAD 1.1V 0.5A D
BEAD VLDT 1.2V TPDA
AC ADAPTOR CPU core CPU_VDDNB_RUN@4A
15-16V 90W PWM CPU_VDDIO_SUS HD CODEC
VDD MEM TPDA +1.5V
MAX8792 BEAD 1.5V CORE 0.3A AUDIO
VDDR +3.3V OP
AOZ1024 VDDR 1.5A BEAD 3V ANALOG 0.1A
CPU_VDDIO_SUS@9A +5V PWM
DDR3 PWM GBIT ETHERNET
LDO VTT MEM_VTT@1.5A RS880M
VLDT
MAX8632 BEAD VDDHTTX 1.2V 0.68A
+1.1V +3.3VDUAL
BEAD VDDHTRX+HT 1.1V 0.68A BEAD 3.3V 0.5A
VLDT (1.1V/1.2V)
+1V~1.2V SW
+1.1V SW +VCC_NB_RUN +1.1V SMSC1100--EC
BEAD VDDPCIE 1.1V 1.1A +3.3VDUAL
MAX8775 +1.8V 3.3V 0.5A
BEAD VDDA18 1.8V 0.64A
+VCC_NB
VDDC 1.0V-1.1V 7.6A LCD PANEL
+3.3V +3.3V
+1.2V SW +1.1VDUAL@10A VDDG33 3.3V 0.06A SW 3.3V 1.5A
MAX8716-1/2 +1.8V +5V
BEAD VDDG18 1.8V 0.005A BEAD 5V 0.5A
+1.5V
BEAD VDD18_MEM 1.8V 0.005A
+1.5V BACK LIGHT
C
BEAD VDD_MEM 1.8V 0.23A +5V C
+1.8V SW +1.8V@3.3A +3.3V +5V
MAX8716-2/2 BEAD AVDD 3.3V 0.125A VDD_LED_BL_RUN
+1.8V LED_BL
BEAD VDDLT18 0.22A +VIN
+3.3V +VDD_MAIN
BEAD VDDLT33 0A
+1.8V USB X2 FR
BEAD PLLs 1.8V 0.1A +5VDUAL
SW VDD_LED_BL_RUN +1.1V 5VDual
OZ9956 BEAD PLLs 1.1/1.2V 0.23A
AMD SB800 EXPRESS CARD
+3.3V +1.5V
VDDIO_33_PCIGP 3.3V 0.020A 1.5V (S0, S1) 0.7A
+3.3VALW +1.8V +3.3V
VDDIO_18_FC 1.8V 0.050A 3.3V (S0, S1) 1.3A
+5VALW +1.1V +3.3VDUAL
+5V SW BEAD VDDAN_11_PCIE 1.1V 1A 3.3V (S3, S5) 0.3A
+3V SW +3.3V
BEAD VDDPL_33_PCIE 3.3V 0.030A
+5V LDO +3.3VDUAL@8A MINI PCIE SLOT0,1,2
+1.1V +1.5V
+3V LDO BEAD VDDAN_11_SATA 1.1V 0.8A
+5VDUAL@8A +3.3V 1.5V (S0, S1) 0.5A
MAX1533 VDDPL_33_SATA 3.3V 0.020A
BEAD each
+3.3VDUAL +3.3VDUAL 3.3V (S3, S5) 2.75A
BEAD VDDAN_33_USB_S 3.3V 0.2A
+1.1VDUAL each
BEAD VDDAN_11_USB_S 1.2V 0.2A
+1.1V SATA HD0,1
B
SW +1.5V@5A +1.5V VDDCR_11 1.1V 0.5A B
MAX1714 +1.1V +3.3V 3.3V (S0, S1) TBD
BEAD VDDAN_11_CLK 1.1V 0.4A
VDDIO_GBE_S/2 VDDRF_GBE_S +5V
+3.3VDUAL 5V (S3, S5) TBD
CPU_VDDIO_SUS VDDIO_33_GBE_S 3.3V
SWITCH +1.1VDUAL SATA ODD
VDDCR_11_GBE_S 1.1V +5V
PHY_VDDIO_DUAL 5V (S0, S1) TBD
VDDIO_GBE_S 3.3V
+5VDUAL +5V +3.3VDUAL
SWITCH VDDIO_33_S 3.3V
+1.1VDUAL uPD720200
VDDCR_11_S 1.1V +3.3V
+1.1VDUAL +1.0V 3.3V (S0, S1) TBD
+3.3VDUAL +3.3V BEAD VDDCD_11_USB 1.1V
SWITCH AZ_VDDIO_DUAL 1.0V (S0, S1) TBD
VDDIO_AZ_S 3.3V OR 1.5V
+1.1VDUAL OZ8888
BEAD VDDCR_11_USB_S 1.1V +3.3V
+3.3V +1.8V 3.3V (S0, S1) 0.5A
BEAD VDDPL_33_SYS 3.3V SYS PLL
+3.3V CPU_VDDA_RUN +1.1V 1.8V (S0, S1) 0.5A
2.5V LDO BEAD VDDPL_11_SYS 1.1 V SYS PLL
+3.3VDUAL Desktop x1 PCIE
BEAD VDDPL_33_USB_S 3.3 V USB PLL +VIN
+3.3VDUAL +12V
+1.1V DUAL +1.1V BEAD VDDAN_33_S 3.3V HWM +3.3V
SWITCH +3.3VDUAL +3.3V
A BEAD VDDXL_33_S 3.3V +3.3VDUAL A
+3.3Vaux
+1.1V +1.0V MXM_EN
1.0V LDO
MXM HE 3.0
+1.5VDUAL MICRO-STAR INT'L CO.,LTD
+3.3VDUAL S3,S4,S5 +3.3V
1.5V LDO SW MXM_VDD_3.3V 1A
+5V MS-168x
SW MXM_VDD_5V 2.5A MSI
S0 +VIN Size Document Description Rev
+1.5V SWITCH Sensor Custom 1.0
Resistor
MXM_VDD_MAIN upto 10A POWER DELIVERT
Date: Monday, June 21, 2010 Sheet 3 of 52
5 4 3 2 1
5 4 3 2 1

Power on Sequence required:

SB800:
1, +3.3VDUAL ramp before +1.1VDUAL
2, +3.3V ramp before +1.8v CPU_LDT_RST#
3, +1.8V ramp before +1.1v (SB TO CPU)
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS CPU_PWROK
(SB TO CPU) >1 mS Req.

RS880: CPU_CLKP/N running


D 1, 0 <(+3.3V) - (+1.8v) < 2.1 D
2, +1.8V ramp before +1.1v
>1 mS Req.
3. +1.1V ramp before VCC_NB
running

>1 mS Req. VCC_NB(all NB power) valid before NB_PWRGD.


SB OUTPUT NB_PWRGD
NB_PWRGD_IN
SLP_S3# 1V1DUAL_PWRGD
SB INPUT SB_PWRGD 1)+1.5V SWITCH TO +1.5VDUAL 2)LASSO_PWRON 3)LPCPD# for TPM 4) TO SB&KBC SYS_RST# 1V5_PWRGD/DNI
+1.2V_PWRGD KBC_GPIO77/DNI

+1.2V_PWRGD

RC=~22ms VCC_NB should not ramp before 1.1v


VCC_NB

RC=~4.7ms
VLDT
GROUP B

VRM_PWRGD AND 1V8_PWRGD


+1.1V

VRM_PWRGD

RC=0
CPU_VDDR

RC=0
CPU_VDD_RUN

RC=0
CPU_VDDNB_RUN
C C

VDDA_PWRGD
GROUP A

+2.5V_LDO
(CPU_VDDA_2.5_RUN)

+1.5V

1V8_PWRGD

RC=0
+1.8V

+5V/+3.3V

RUN_EN_HIGH
RUN_EN_LOW
VDD_BOOST_LOW
to S3
SLP_S3#

VDRAM_PWRGD
CPU MEM CTL &
DDR3 SODIMM PWRS MEM_VTT VTT only will be shut down in S3 mode, and VTT for DDR3 SODIMM only.
MEM_VREF
CPU_VDDIO_SUS

SLP_S5#
B B
Power button from EC to SB
PWR_BTN#_EC
20mS
CPU_THM/SB/SB_SCL1/2 delay
SB_KB/SPI/LPC ROM PWRS RSMRST#

V3V5DUAL_PWRGD
1V1DUAL_PWRGD
SYSTEM_DUAL_PG_DELAY
+5VDUAL/+3.3VDUAL/+1.5VDUAL/+1.1VDUAL
DUAL RAILS When IMC, always on at all time( always PWR)

VDD_DUAL_EN

VDD_DUAL_EN_EC

Power button pressed


PWR_BTN#_HW
PWR_BTN#_SB
KBC is ready
AC not present scenario = LOW AC present= high
AC_OK
(ACIN detect)
KBC is powered by
A_VBAT & +3.3VALW +5VALW/+3.3VALW

LDO:5.4V
(from DCIN)
Battery inserted/AC IN
+VIN/+12V_HD

A_VBAT
A A

MICRO-STAR INT'L CO.,LTD


MS-168x
MSI
Size Document Description Rev
Custom 1.0
POWER SEQUENCE
Date: Monday, June 21, 2010 Sheet 4 of 52
5 4 3 2 1
5 4 3 2 1

EXTERNAL CLOCK MODE NB CLOCK INPUT TABLE


NB CLOCKS RS880M
HT_REFCLKP
SPM_CLK 100M DIFF
SIDE PORT MEMORY CHIP
AMD NORTHBRIDGE xxxMHZ HT_REFCLKN
100M DIFF
REFCLK_P

A-LINK
RS880M REFCLK_N
14M SE (1.1V)

GPP_REFCLK vref
GFX_REFCLK
100M DIFF(IN/OUT)*

NB_GFX_REFCLKP/N
GPP_REFCLK

GPP REF_CLK
NBLINK_RCLKP/N
D NC or 100M DIFF OUTPUT D

HT_REFCLKP/N

14.318MHZ
GPPSB_REFCLK 100M DIFF

NB_OSC
100MHZ

100MHZ

100MHZ

100MHZ
A_SODIMM

B_SODIMM
* RS880M can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.

CLK_REQ in CLK GEN

GFX_CLKP/N PCIE GFX SLOT (RS880M, 16 LANES) MXM SLOT 25M Hz


100MHZ EXT_MXM_CLKREQ#
MEM_MB_CLK1_P/N
MEM_MB_CLK2_P/N
MEM_MA_CLK1_P/N
MEM_MA_CLK2_P/N

PCIE_DT_CLKP/N
PCIE GPP SLOT (RS880M, 2 LANES) PCIe x4 SLOT
100MHZ EXT_PCIE_DT_CLKREQ#
SPCI MICTOR

25M_X1

25M_X2
PCI_CLK0
PCICLK0
PCIE_1394_CLKP/N 33MHZ
PCIE GPP I/F (RS880M, 1 LANE) 1394:OZ888GS0L3N PSOT CODE LED
100MHZ EXT_PCIE_1394_CLKREQ#
SMSC_CLK
PCIE_PE0_CLKP/N PCICLK1 KBC1100L
33MHZ
100MHZ MINIPCIE SLOT (RS880M, 1 LANE) PORT0:WLAN
EXT_PCIE_PE0_CLKREQ#

AMD CPU_CLKP/N EXTERNAL PCIE_PE1_CLKP/N


100MHZ
MINIPCIE SLOT (SB800, 1 LANE)
EXT_PCIE_PE1_CLKREQ#
PORT1:WWAN
AMD SB800
PCICLK2
PCICLK3
PCICLK4
PCI_CLK2
PCI_CLK3 STRAPS SETTING,
200MHZ PCI_CLK4 UNUSED CLOCKS
PCIE_EXPCARD_CLKP/N 33MHZ
SIG4 CPU CLOCK GENERATOR 100MHZ
PCIE NEW CARD SLOT (SB800, 1 LANE) EXPRESS CARD
EXT_PCIE_EXPCARD_CLKREQ#
EXT CLK MODE LPC_CLK0
LPCCLK0 LPC BIOS & HEADER
PCIE_PE2_CLKP/N 33MHZ
MINIPCIE SLOT (SB800, 1 LANE) LPC_CLK1
PORT2:WUSB LPCCLK1 LPC TPM
100MHZ EXT_PCIE_PE2_CLKREQ# 33MHZ
PCIE_LAN_CLKP/N RTCCLK
FOR SATA
14.31818MHz

PCIE GPP I/F (RS880M, 1 LANE) BCM57760A0KMLG AZ_BIT_CLK 32.768K Hz


100MHZ EXT_PCIE_LAN_CLKREQ# AZ_BITCLK HD AUDIO
SATA_X1 24MHZ

25M Hz
PCIE_USB30_CLKP/N SPI_CLK
PCIE GPP I/F (RS880M, 1 LANE) USB3.0:uPD720200F SPI_CLK SPI ROM & HEADER
100MHZ EXT_PCIE_USB30_CLKREQ# DNI xxHZ

25M Hz
SATA_X2 14M_25M_48M_OSC SB_25MHz_PHY
PCIE_PE3_CLKP/N GBE_RXCLK GBE PHY
C MINIPCIE SLOT (SB800, 1 LANE) PORT3:WLAN GBE_TX/RXCLK C
100MHZ EXT_PCIE_PE3_CLKREQ# GBE_TXCLK
SBSRC_CLKP/N
PCIE_RCLKP/N
100MHZ
KBC_OSC
CLK_48M_USB USBCLK IMC_IM_CLK MOUSE IM_CLK
SB_OSC
DNI 48MHZ TOUCH PAD KBC1100L

32.768K Hz

INTERNAL CLOCK MODE


MEM_MA_CLK1_P/N
MEM_MA_CLK2_P/N SPM_CLK
A_SODIMM AMD NORTHBRIDGE SIDE PORT MEMORY CHIP
AMD xxxMHZ
A-LINK

MEM_MB_CLK1_P/N
RS880M GPP_REFCLK
B_SODIMM
MEM_MB_CLK2_P/N
SIG4 CPU REFCLKP/N
SB_NBLINK_RCLKP/N

GPP_CLK6P/N NB_GFX_REFCLKP/N
NB_REFCLK_P/N

HT_REFCLKP/N
CPU_CLKP/N

100MHZ

100MHZ

100MHZ
100MHZ
200MHZ

B B

33MHZ
SPCI MICTOR
PCIE_RCLKP/N
CPU_HT_CLKP/N

NB_HT_CLKP/N
NB_DISP_CLKP/N

PCI_CLK0 GFX_CLKP/N
PSOT CODE LED PCICLK0 SLT_GFX_CLKP/N PCIE GFX SLOT (RS880M, 16 LANES) MXM SLOT
100MHZ
SMSC_CLK CLK_REQG# in SB
OSCILLATOR KBC1100L PCICLK1
14.318MHZ 33MHZ PCIE_DT_CLKP/N
GPP_CLK5P/N PCIE GPP SLOT (RS880M, 2 LANES) PCIe x4 SLOT
PCI_CLK2 100MHZ
PCICLK2 CLK_REQ5 in SB
STRAPS 33MHZ
PCIE_1394_CLKP/N
SETTING, PCI_CLK3 GPP_CLK8P/N PCIE GPP I/F (RS880M, 1 LANE) 1394:OZ888GS0L3N
PCICLK3 100MHZ
UNUSED 33MHZ CLK_REQ8 in SB
CLOCKS PCI_CLK4 PCIE_PE0_CLKP/N
PCICLK4 GPP_CLK1P/N MINIPCIE SLOT (RS880M, 1 LANE)
33MHZ 100MHZ PORT0:WLAN
LPC_CLK0 CLK_REQ1 in SB
LPC BIOS & HEADER 33MHZ
LPCCLK0
PCIE_PE1_CLKP/N
GPP_CLK4P/N MINIPCIE SLOT (SB800, 1 LANE) PORT1:WWAN
LPC_CLK1 100MHZ
LPC TPM LPCCLK1 CLK_REQ4 in SB
33MHZ
PCIE_EXPCARD_CLKP/N
RTCCLK GPP_CLK0P/N PCIE NEW CARD SLOT (SB800,1 LANE) EXPRESS CARD
100MHZ CLK_REQ0 in SB
32.768K Hz SPI ROM & HEADER
SPI_CLK
xxHZ
SPI_CLK AMD SB800 GPP_CLK2P/N
PCIE_PE2_CLKP/N
MINIPCIE SLOT (SB800, 1 LANE)
100MHZ PORT2:WUSB
AZ_BIT_CLK CLOCK GENERATOR CLK_REQ2 in SB
HD AUDIO AZ_BITCLK
PCIE_LAN_CLKP/N
24MHZ
GPP_CLK3P/N PCIE GPP I/F (RS880M, 1 LANE)
100MHZ BCM57760A0KMLG
CLK_REQ3 in SB
25M Hz

SB_25MHz_PHY
14M_25M_48M_OSC
GBE PHY 25MHZ PCIE_USB30_CLKP/N
GBE_RXCLK GBE_RXCLK GPP_CLK7P/N PCIE GPP I/F (RS880M, 1 LANE) USB3.0:uPD720200F
100MHZ
GBE_TXCLK GBE_TXCLK CLK_REQ7 in SB

PCIE_PE3_CLKP/N
MINIPCIE SLOT (SB800, 1 LANE)
GPP_CLK6P/N 100MHZ PORT3:WLAN
A IM_CLK IMC_IM_CLK CLK_REQ6 in SB A
KBC1100L MOUSE
PS2M_CLK
TOUCH PAD

FOR MASTER FOR RTC FOR SATA

25M Hz 32.768K Hz 25M Hz


DNI MICRO-STAR INT'L CO.,LTD
MS-168x
MSI
Size Document Description Rev
Custom 1.0
CLOCK BLOCK
Date: Monday, June 21, 2010 Sheet 5 of 52
5 4 3 2 1
5 4 3 2 1

Thermal Systems
(Emergency Shutdown, Throttling, Fan Control)

1.5V TSI translate 3.3V TSI KBC


SMSC

G7
THERMTRIP_L translate THERMTRIP#

SID SDA3 (S5-S0)


D D
SIC SCL3
T7
ALERT_L TALERT# (S0)
translate
Y9
translate FANOUT2
THERMDC
W18 AMD SMBus Block Diagram AMD
MEMHOT_L THERMDA
VRM Power
AA18 SDA0
SCL0
SB800 SB800
AMD VRM_HOT#
NON-POP
(S5-S0)
DUAL_SMB1 SDATA1
(master)
B6 SDA1
TEMPIN1 A6
S1G4 C6
TEMPIN0
TEMP_COMM TEMP_COMM C6
SCLK1 SCL1
(S5-S0)
ASF Only

F24 SDATA0 SDA0


PROCHOT# (S0)
SCLK0 SCL0
SDATA2 SDA2 (S5-S0) SDA3
PROCHOT_L translate OVERRIDE# BCM57760 DDR 2
M8 SCLK2 SCL2 (S5-S0) 1.8V SCL3
PWM FANOUT0 LAN SO-DIMM
P5 FANIN0 U1300
TACH J400
TEMPIN3 AMD

TEMPIN2
J4
translate
GEVENT4# mini DDR 2 S1G4

SDA2
SCL2
PCI Exp x1 SO-DIMM
NON-POP
J3700 J401

4-PIN CPU FAN mini MAX17009


SIC SVC (S3-S0) SVC
PCI Exp x1 CPU Core PWR PWM
J3703 SID SVD SVD
U2800
Place under DDR
NON-POP
ADM TEMP
1032 SENSOR mini CLK. Gen.
C C
(Q600) PCI Exp x1 ICS9LPRS470
J106
SO-DIMM J3711 U800
EVENT

mini translate
MXM
PCI Exp x1
J3600
SDA J3712
SCL ADM
THERMDC AMD POP
1032 THERMDA NOPOP
RS880 GPP Slot
CONFIG ROM
TL2560
U1001 light sensorSDA
MXM J3701 U3201 SCL
NOPOP
THERM# CPU Thermal
Sensor
Exp Card
NOPOP
ADM1032
POP SMSC
J2500 smart 100R (S5-S0) I2C1A_DAT (S5-S0)
Thermal disaster prevention is implemented by PROCHOT_L and THERMTRIP_L with hardware battery POP
I2C1A_CLK
J2700
non-system dependant functions. Fan speed control will only be implemented LCP Debug Header
U103
J1000 (master)
by SB TSI software based implementation
MAX1535 BAT_DAT 3.3V SB-TSI I2C1B_DAT (S5-S0)
battery charger
BAT_CLK I2C1B_CLK
ADM1032 U2700
Diode Reader KBC1100L
U204

B
Power State / Voltage Rail Activity Summary B

Processor
Global Sleep Description RTC ALW DUAL SUS RUN
System Power
State State
State
G0 S0 C0 Running ON ON ON ON ON

G0 S0 C0 Running P-state transitions ON ON ON ON ON


under OS control

G0 S0 C1 Halt ON ON ON ON ON

Stop grant,
G0 S0 C2 caches snoopable ON ON ON ON ON

G0 S0 C3 TBD ON ON ON ON ON
Group Name Description
G0 S0 c4 TBD ON ON ON ON ON
INT: Stuff when use internal clock generator
G1 S1 OFF Powered on suspend ON ON ON ON ON EXT: Stuff when use external clock generator
DNI: DO NOT INSTALL
G1 S3 OFF Sleeping Suspend to RAM ON ON ON ON OFF KBC: Stuff when use external KBC
IMC: Stuff when use internal EC
A
G2 S4 OFF Suspend to diskON ON ON ON OFF OFF
A11:Resistors marked with "A11" is only for SB800A11 ONLY. A

G2 S5 OFF Soft-off ON ON ON OFF OFF

G2/G3 S5 LOW OFF Battery IN ON ON ON OFF OFF MICRO-STAR INT'L CO.,LTD


G3 OFF Mechanical off ON OFF OFF OFF OFF MSI
MS-168x
Size Document Description Rev
Custom 1.0
SMBUS BLOCK
Date: Monday, June 21, 2010 Sheet 6 of 52
5 4 3 2 1
5 4 3 2 1

[Fuqun] Change +VLDT to +1.1VRUN in 1.0


+1.1VRUN +VLDT
D D

+VLDT U22A +VLDT [Fuqun] NC 180pf cap in 1.0


D1 VLDT_A0 HT LINK VLDT_B0 AE2
D2 AE3 +VLDT [DG] VLDT total CAP >30uF
VLDT_A1 VLDT_B1
D3 VLDT_A2 VLDT_B2 AE4
D4 VLDT_A3 VLDT_B3 AE5

14 HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 14


14 HT_NB_CPU_CAD_L0 E2
E1
L0_CADIN_L0 L0_CADOUT_L0 AC1
AC2
HT_CPU_NB_CAD_L0 14 * C379 C153 C159 C381 C158 C380 C156
14 HT_NB_CPU_CAD_H1 L0_CADIN_H1 L0_CADOUT_H1 HT_CPU_NB_CAD_H1 14
F1 AC3 4.7uF 4.7uF 22uF 0.22uF 0.22uF X_180pF X_180pF
14 HT_NB_CPU_CAD_L1 L0_CADIN_L1 L0_CADOUT_L1 HT_CPU_NB_CAD_L1 14
14 HT_NB_CPU_CAD_H2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CPU_NB_CAD_H2 14
14 HT_NB_CPU_CAD_L2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CPU_NB_CAD_L2 14
14 HT_NB_CPU_CAD_H3 G1
H1
L0_CADIN_H3 L0_CADOUT_H3 AA2
AA3
HT_CPU_NB_CAD_H3 14 Place close to socket
14 HT_NB_CPU_CAD_L3 L0_CADIN_L3 L0_CADOUT_L3 HT_CPU_NB_CAD_L3 14
14 HT_NB_CPU_CAD_H4 J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CPU_NB_CAD_H4 14
14 HT_NB_CPU_CAD_L4 K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CPU_NB_CAD_L4 14
14 HT_NB_CPU_CAD_H5 L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CPU_NB_CAD_H5 14 * If VLDT is connected only on one side,
C 14 HT_NB_CPU_CAD_L5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CPU_NB_CAD_L5 14 one 4.7uF cap should be added to C
14 HT_NB_CPU_CAD_H6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CPU_NB_CAD_H6 14
M1 U3 the island side
14 HT_NB_CPU_CAD_L6 L0_CADIN_L6 L0_CADOUT_L6 HT_CPU_NB_CAD_L6 14
14 HT_NB_CPU_CAD_H7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CPU_NB_CAD_H7 14
14 HT_NB_CPU_CAD_L7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CPU_NB_CAD_L7 14
14 HT_NB_CPU_CAD_H8 E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CPU_NB_CAD_H8 14 [ChckList] Can change 22u*1/4.7u*2 to 10u*3
14 HT_NB_CPU_CAD_L8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CPU_NB_CAD_L8 14
14 HT_NB_CPU_CAD_H9 F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CPU_NB_CAD_H9 14
14 HT_NB_CPU_CAD_L9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CPU_NB_CAD_L9 14
14 HT_NB_CPU_CAD_H10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CPU_NB_CAD_H10 14
14 HT_NB_CPU_CAD_L10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CPU_NB_CAD_L10 14
14 HT_NB_CPU_CAD_H11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CPU_NB_CAD_H11 14
14 HT_NB_CPU_CAD_L11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CPU_NB_CAD_L11 14
14 HT_NB_CPU_CAD_H12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CPU_NB_CAD_H12 14
14 HT_NB_CPU_CAD_L12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CPU_NB_CAD_L12 14
14 HT_NB_CPU_CAD_H13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CPU_NB_CAD_H13 14 C26 D26 E26 F26 G26 H26 J26 K26 L26 M26 N26 P26 R26 T26 U26 V26 W26 Y26 AA26 AB26 AC26 AD26

14 HT_NB_CPU_CAD_L13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CPU_NB_CAD_L13 14 A24


B25

B24
C25

C24
D25

D24
E25

E24
F25

F24
G25

G24
H25

H24
J25

J24
K25

K24
L25

L24
M25

M24
N25

N24
P25

P24
R25

R24
T25

T24
U25

U24
V25

V24
W25

W24
Y25

Y24
AA25

AA24
AB25

AB24
AC25

AC24
AD25

AD24
AE25

AE24 AF24

14 HT_NB_CPU_CAD_H14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CPU_NB_CAD_H14 14 A23

A22
B23

B22
C23

C22
D23

D22
E23

E22
F23

F22
G23

G22
H23

H22
J23

J22
K23

K22
L23

L22
M23

M22
N23

N22
P23

P22
R23

R22
T23

T22
U23

U22
V23

V22
W23

W22
Y23

Y22
AA23

AA22
AB23

AB22
AC23

AC22
AD23

AD22
AE23

AE22
AF23

AF22

14 HT_NB_CPU_CAD_L14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CPU_NB_CAD_L14 14 A21

A20
B21

B20
C21

C20
D21

D20
E21

E20
F21

F20
G21 H21

H20
J21

J20
K21

K20
L21

L20
M21

M20
N21

N20
P21

P20
R21

R20
T21

T20
U21

U20
V21

V20
W21 Y21

Y20
AA21

AA20
AB21

AB20
AC21

AC20
AD21

AD20
AE21

AE20
AF21

AF20

14 HT_NB_CPU_CAD_H15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CPU_NB_CAD_H15 14 A19

A18
B19

B18
C19

C18
D19

D18
E19

E18
F19

F18 G18
H19

H18
J19

J18
K19

K18
L19

L18
M19

M18
N19

N18
P19

P18
R19

R18
T19

T18
U19

U18
V19

V18 W18
Y19

Y18
AA19

AA18
AB19

AB18
AC19

AC18
AD19

AD18
AE19

AE18
AF19

AF18

14 HT_NB_CPU_CAD_L15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CPU_NB_CAD_L15 14 A17

A16
B17

B16
C17

C16
D17

D16
E17

E16
F17

F16
G17

G16
H17

H16
J17

J16
K17

K16
L17

L16
M17

M16
N17

N16
P17

P16
R17

R16
T17

T16
U17

U16
V17

V16
W17

W16
Y17

Y16
AA17

AA16
AB17

AB16
AC17

AC16
AD17

AD16
AE17

AE16
AF17

AF16

A15 B15 C15 D15 E15 F15 G15 H15 J15 K15 L15 T15 U15 V15 W15 Y15 AA15 AB15 AC15 AD15 AE15 AF15

A14 B14 C14 D14 E14 F14 G14 H14 J14 K14 L14 T14 U14 V14 W14 Y14 AA14 AB14 AC14 AD14 AE14 AF14

14 HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 14 A13

A12
B13

B12
C13

C12
D13

D12
E13

E12
F13

F12
G13

G12
H13

H12
J13

J12
K13

K12
L13

L12
T13

T12
U13

U12
V13

V12
W13

W12
Y13

Y12
AA13

AA12
AB13

AB12
AC13

AC12
AD13

AD12
AE13

AE12
AF13

AF12

14 HT_NB_CPU_CLK_L0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_NB_CLK_L0 14 A11

A10
B11

B10
C11

C10
D11

D10
E11

E10
F11

F10
G11

G10
H11

H10
J11

J10
K11

K10
L11

L10
M11

M10
N11

N10
P11

P10
R11

R10
T11

T10
U11

U10
V11

V10
W11

W10
Y11

Y10
AA11

AA10
AB11

AB10
AC11

AC10
AD11

AD10
AE11

AE10
AF11

AF10

B 14 HT_NB_CPU_CLK_H1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CPU_NB_CLK_H1 14 A9

A8
B9

B8
C9

C8
D9

D8
E9

E8
F9

F8
G9 H9

H8
J9

J8
K9

K8
L9

L8
M9

M8
N9

N8
P9

P8
R9

R8
T9

T8
U9

U8
V9

V8
W9

W8
Y9 AA9

AA8
AB9

AB8
AC9

AC8
AD9

AD8
AE9

AE8
AF9

AF8
B
14 HT_NB_CPU_CLK_L1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CPU_NB_CLK_L1 14 A7

A6
B7

B6
C7

C6
D7

D6
E7

E6
F7

F6 G6
H7

H6
J7

J6
K7

K6
L7

L6
M7

M6
N7

N6
P7

P6
R7

R6
T7

T6
U7

U6
V7

V6
W7

W6 Y6
AA7

AA6
AB7

AB6
AC7

AC6
AD7

AD6
AE7

AE6
AF7

AF6

A5 B5 C5 D5 E5 F5 G5 H5 J5 K5 L5 M5 N5 P5 R5 T5 U5 V5 W5 Y5 AA5 AB5 AC5 AD5 AE5 AF5

A4 B4 C4 D4 E4 F4 G4 H4 J4 K4 L4 M4 N4 P4 R4 T4 U4 V4 W4 Y4 AA4 AB4 AC4 AD4 AE4 AF4

14 HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 14 A3 B3 C3

C2
D3

D2
E3

E2
F3

F2
G3

G2
H3

H2
J3

J2
K3

K2
L3

L2
M3

M2
N3

N2
P3

P2
R3

R2
T3

T2
U3

U2
V3

V2
W3

W2
Y3

Y2
AA3

AA2
AB3

AB2
AC3

AC2
AD3

AD2
AE3

AE2

14 HT_NB_CPU_CTL_L0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_NB_CTL_L0 14 A1 C1 D1 E1 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 AC1 AD1

14 HT_NB_CPU_CTL_H1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CPU_NB_CTL_H1 14


14 HT_NB_CPU_CTL_L1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_NB_CTL_L1 14 BGA638_50_26SQ_S1G3_OEM

SOCKET_638_PIN

[CheckList] If the I/O device does not support the CTLIN1 pair, pull up 51ohm

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B 1.0
SIG4 HT I/F
Date: Monday, June 21, 2010 Sheet 7 of 52
5 4 3 2 1
A B C D E

Processor Memory Interface


U22C
MEM:DATA
4 11 MEM_MB_DATA[0..63] MEM_MA_DATA[0..63] 11 4
MEM_MB_DATA0 C11 G12 MEM_MA_DATA0
MEM_MB_DATA1 MB_DATA0 MA_DATA0 MEM_MA_DATA1
A11 MB_DATA1 MA_DATA1 F12
[Fuqun] VDDR--1.05V MEM_MB_DATA2 A14 H14 MEM_MA_DATA2
MEM_MB_DATA3 MB_DATA2 MA_DATA2 MEM_MA_DATA3
B14 MB_DATA3 MA_DATA3 G14
PLACE THEM CLOSE TO CPU_VDDR U22B CPU_VDDR MEM_MB_DATA4 G11 H11 MEM_MA_DATA4
MEM_MB_DATA5 MB_DATA4 MA_DATA4 MEM_MA_DATA5
CPU WITHIN 1" E11 MB_DATA5 MA_DATA5 H12
D10 W10 MEM_MB_DATA6 D12 C13 MEM_MA_DATA6
VDDR1 MEM:CMD/CTRL/CLKVDDR5 MEM_MB_DATA7 MB_DATA6 MA_DATA6 MEM_MA_DATA7
C10 VDDR2 VDDR6 AC10 A13 MB_DATA7 MA_DATA7 E13
B10 AB10 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
CPU_VDDIO_SUS VDDR3 VDDR7 MEM_MB_DATA9 MB_DATA8 MA_DATA8 MEM_MA_DATA9
AD10 VDDR4 VDDR8 AA10 [CheckList] VDDR_SENSE NC if not use A16 MB_DATA9 MA_DATA9 E15
A10 MEM_MB_DATA10 A19 E17 MEM_MA_DATA10
R235 39.2R M_ZP VDDR9 MEM_MB_DATA11 MB_DATA10 MA_DATA10 MEM_MA_DATA11
AF10 MEMZP A20 MB_DATA11 MA_DATA11 H17
R238 0R R237 39.2R M_ZN AE10 Y10 CPU_M_VREF_SUS MEM_MB_DATA12 C14 E14 MEM_MA_DATA12
MEMZN VDDR_SENSE TP44 MEM_MB_DATA13 MB_DATA12 MA_DATA12 MEM_MA_DATA13
D14 MB_DATA13 MA_DATA13 F14
C391 H16 W17 MEM_MB_DATA14 C18 C17 MEM_MA_DATA14
11 MEM_MA_RST# MA_RESET_L MEMVREF MB_DATA14 MA_DATA14
[Fuqun] Cost Down MEM_MB_DATA15 D18 G17 MEM_MA_DATA15
X_10uF MEM_MB_DATA16 MB_DATA15 MA_DATA15 MEM_MA_DATA16
11 MEM_MA0_ODT0 T19 MA0_ODT0 MB_RESET_L B18 MEM_MB_RST# 11 D20 MB_DATA16 MA_DATA16 G18
V22 MEM_MB_DATA17 A21 C19 MEM_MA_DATA17
11 MEM_MA0_ODT1 MA0_ODT1 MB_DATA17 MA_DATA17
MEM_MA1_ODT0 U21 W26 MEM_MB_DATA18 D24 D22 MEM_MA_DATA18
MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 11 MB_DATA18 MA_DATA18
Updated on Rev2.0 TP54 MEM_MA1_ODT1 V19 W23 MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
MA1_ODT1 MB0_ODT1 MEM_MB0_ODT1 11 MB_DATA19 MA_DATA19
TP52 Y26 MEM_MB1_ODT0 MEM_MB_DATA20 B20 E18 MEM_MA_DATA20
MB1_ODT0 TP56 MEM_MB_DATA21 MB_DATA20 MA_DATA20 MEM_MA_DATA21
[Fuqun] If remove R/C? 11 MEM_MA0_CS#0 T20 MA0_CS_L0 C20 MB_DATA21 MA_DATA21 F18
U19 V26 MEM_MB_DATA22 B24 B22 MEM_MA_DATA22
11 MEM_MA0_CS#1 MA0_CS_L1 MB0_CS_L0 MEM_MB0_CS#0 11 MB_DATA22 MA_DATA22
TP51 U20 W25 MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
MA1_CS_L0 MB0_CS_L1 MEM_MB0_CS#1 11 MB_DATA23 MA_DATA23
TP53 V20 U22 MEM_MB1_CS1 MEM_MB_DATA24 E23 F20 MEM_MA_DATA24
MA1_CS_L1 MB1_CS_L0 TP55 MEM_MB_DATA25 MB_DATA24 MA_DATA24 MEM_MA_DATA25
E24 MB_DATA25 MA_DATA25 F22
J22 J25 MEM_MB_DATA26 G25 H24 MEM_MA_DATA26

To reverse SODIMM socket


11 MEM_MA_CKE0 MA_CKE0 MB_CKE0 MEM_MB_CKE0 11 MB_DATA26 MA_DATA26
J20 H26 MEM_MB_DATA27 G26 J19 MEM_MA_DATA27
11 MEM_MA_CKE1 MA_CKE1 MB_CKE1 MEM_MB_CKE1 11 MB_DATA27 MA_DATA27
MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
MEM_MB_DATA29 MB_DATA28 MA_DATA28 MEM_MA_DATA29
11 MEM_MA_CLK1_P N19 MA_CLK_H5 MB_CLK_H5 P22 MEM_MB_CLK1_P 11 D26 MB_DATA29 MA_DATA29 E22
N20 R22 MEM_MB_DATA30 G23 H20 MEM_MA_DATA30

To normal SODIMM socket


11 MEM_MA_CLK1_N MA_CLK_L5 MB_CLK_L5 MEM_MB_CLK1_N 11 MB_DATA30 MA_DATA30
TP46 E16 A17 TP49 MEM_MB_DATA31 G24 H22 MEM_MA_DATA31
TP47 MA_CLK_H1 MB_CLK_H1 TP50 MEM_MB_DATA32 MB_DATA31 MA_DATA31 MEM_MA_DATA32
F16 MA_CLK_L1 MB_CLK_L1 A18 AA24 MB_DATA32 MA_DATA32 Y24
TP48 Y16 AF18 TP76 MEM_MB_DATA33 AA23 AB24 MEM_MA_DATA33
TP45 MA_CLK_H7 MB_CLK_H7 TP75 MEM_MB_DATA34 MB_DATA33 MA_DATA33 MEM_MA_DATA34
AA16 MA_CLK_L7 MB_CLK_L7 AF17 AD24 MB_DATA34 MA_DATA34 AB22
P19 R26 MEM_MB_DATA35 AE24 AA21 MEM_MA_DATA35
11 MEM_MA_CLK2_P MA_CLK_H4 MB_CLK_H4 MEM_MB_CLK2_P 11 MB_DATA35 MA_DATA35
P20 R25 MEM_MB_DATA36 AA26 W22 MEM_MA_DATA36
11 MEM_MA_CLK2_N MA_CLK_L4 MB_CLK_L4 MEM_MB_CLK2_N 11 MB_DATA36 MA_DATA36
3 MEM_MB_DATA37 AA25 W21 MEM_MA_DATA37 3
11 MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] 11 MB_DATA37 MA_DATA37
MEM_MA_ADD0 N21 P24 MEM_MB_ADD0 MEM_MB_DATA38 AD26 Y22 MEM_MA_DATA38
MEM_MA_ADD1 MA_ADD0 MB_ADD0 MEM_MB_ADD1 MEM_MB_DATA39 MB_DATA38 MA_DATA38 MEM_MA_DATA39
M20 MA_ADD1 MB_ADD1 N24 AE25 MB_DATA39 MA_DATA39 AA22
MEM_MA_ADD2 N22 P26 MEM_MB_ADD2 MEM_MB_DATA40 AC22 Y20 MEM_MA_DATA40
MEM_MA_ADD3 MA_ADD2 MB_ADD2 MEM_MB_ADD3 MEM_MB_DATA41 MB_DATA40 MA_DATA40 MEM_MA_DATA41
M19 MA_ADD3 MB_ADD3 N23 AD22 MB_DATA41 MA_DATA41 AA20
MEM_MA_ADD4 M22 N26 MEM_MB_ADD4 MEM_MB_DATA42 AE20 AA18 MEM_MA_DATA42
MEM_MA_ADD5 MA_ADD4 MB_ADD4 MEM_MB_ADD5 MEM_MB_DATA43 MB_DATA42 MA_DATA42 MEM_MA_DATA43
L20 MA_ADD5 MB_ADD5 L23 AF20 MB_DATA43 MA_DATA43 AB18
MEM_MA_ADD6 M24 N25 MEM_MB_ADD6 MEM_MB_DATA44 AF24 AB21 MEM_MA_DATA44
MEM_MA_ADD7 MA_ADD6 MB_ADD6 MEM_MB_ADD7 MEM_MB_DATA45 MB_DATA44 MA_DATA44 MEM_MA_DATA45
L21 MA_ADD7 MB_ADD7 L24 AF23 MB_DATA45 MA_DATA45 AD21
MEM_MA_ADD8 L19 M26 MEM_MB_ADD8 MEM_MB_DATA46 AC20 AD19 MEM_MA_DATA46
MEM_MA_ADD9 MA_ADD8 MB_ADD8 MEM_MB_ADD9 MEM_MB_DATA47 MB_DATA46 MA_DATA46 MEM_MA_DATA47
K22 MA_ADD9 MB_ADD9 K26 AD20 MB_DATA47 MA_DATA47 Y18
MEM_MA_ADD10 R21 T26 MEM_MB_ADD10 MEM_MB_DATA48 AD18 AD17 MEM_MA_DATA48
MEM_MA_ADD11 MA_ADD10 MB_ADD10 MEM_MB_ADD11 MEM_MB_DATA49 MB_DATA48 MA_DATA48 MEM_MA_DATA49
L22 MA_ADD11 MB_ADD11 L26 AE18 MB_DATA49 MA_DATA49 W16
MEM_MA_ADD12 K20 L25 MEM_MB_ADD12 MEM_MB_DATA50 AC14 W14 MEM_MA_DATA50
MEM_MA_ADD13 MA_ADD12 MB_ADD12 MEM_MB_ADD13 MEM_MB_DATA51 MB_DATA50 MA_DATA50 MEM_MA_DATA51
V24 MA_ADD13 MB_ADD13 W24 AD14 MB_DATA51 MA_DATA51 Y14
MEM_MA_ADD14 K24 J23 MEM_MB_ADD14 MEM_MB_DATA52 AF19 Y17 MEM_MA_DATA52
MEM_MA_ADD15 MA_ADD14 MB_ADD14 MEM_MB_ADD15 MEM_MB_DATA53 MB_DATA52 MA_DATA52 MEM_MA_DATA53
K19 MA_ADD15 MB_ADD15 J24 AC18 MB_DATA53 MA_DATA53 AB17
MEM_MB_DATA54 AF16 AB15 MEM_MA_DATA54
MEM_MB_DATA55 MB_DATA54 MA_DATA54 MEM_MA_DATA55
11 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 11 AF15 MB_DATA55 MA_DATA55 AD15
R23 U26 MEM_MB_DATA56 AF13 AB13 MEM_MA_DATA56
11 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 11 MB_DATA56 MA_DATA56
J21 J26 MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
11 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 11 MB_DATA57 MA_DATA57
MEM_MB_DATA58 AB11 Y12 MEM_MA_DATA58
MEM_MB_DATA59 MB_DATA58 MA_DATA58 MEM_MA_DATA59
11 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 11 Y11 MB_DATA59 MA_DATA59 W11
T22 U24 MEM_MB_DATA60 AE14 AB14 MEM_MA_DATA60
11 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 11 MB_DATA60 MA_DATA60
T24 U23 MEM_MB_DATA61 AF14 AA14 MEM_MA_DATA61
11 MEM_MA_WE# MA_WE_L MB_WE_L MEM_MB_WE# 11 MB_DATA61 MA_DATA61
MEM_MB_DATA62 AF11 AB12 MEM_MA_DATA62
MEM_MB_DATA63 MB_DATA62 MA_DATA62 MEM_MA_DATA63
AD11 MB_DATA63 MA_DATA63 AA12
11 MEM_MB_DM[0..7] MEM_MA_DM[0..7] 11
SOCKET_638_PIN MEM_MB_DM0 A12 E12 MEM_MA_DM0
MEM_MB_DM1 MB_DM0 MA_DM0 MEM_MA_DM1
B16 MB_DM1 MA_DM1 C15
MEM_MB_DM2 A22 E19 MEM_MA_DM2
MEM_MB_DM3 MB_DM2 MA_DM2 MEM_MA_DM3
E25 MB_DM3 MA_DM3 F24
MEM_MB_DM4 AB26 AC24 MEM_MA_DM4
MEM_MB_DM5 MB_DM4 MA_DM4 MEM_MA_DM5
AE22 MB_DM5 MA_DM5 Y19
CPU_VDDIO_SUS MEM_MB_DM6 AC16 AB16 MEM_MA_DM6
MEM_MB_DM7 MB_DM6 MA_DM6 MEM_MA_DM7
AD12 MB_DM7 MA_DM7 Y13

2 11 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 11 2


11 MEM_MB_DQS0_N B12 MB_DQS_L0 MA_DQS_L0 H13 MEM_MA_DQS0_N 11
R70 D16 G16
11 MEM_MB_DQS1_P MB_DQS_H1 MA_DQS_H1 MEM_MA_DQS1_P 11
1.00K C16 G15
11 MEM_MB_DQS1_N MB_DQS_L1 MA_DQS_L1 MEM_MA_DQS1_N 11
11 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 11
CPU_M_VREF_SUS A23 C21
11 MEM_MB_DQS2_N MB_DQS_L2 MA_DQS_L2 MEM_MA_DQS2_N 11
11 MEM_MB_DQS3_P F26 MB_DQS_H3 MA_DQS_H3 G22 MEM_MA_DQS3_P 11
11 MEM_MB_DQS3_N E26 MB_DQS_L3 MA_DQS_L3 G21 MEM_MA_DQS3_N 11
11 MEM_MB_DQS4_P AC25 MB_DQS_H4 MA_DQS_H4 AD23 MEM_MA_DQS4_P 11
11 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 11
11 MEM_MB_DQS5_P AF21 MB_DQS_H5 MA_DQS_H5 AB19 MEM_MA_DQS5_P 11
R69 sensing point for AF22 AB20
11 MEM_MB_DQS5_N MB_DQS_L5 MA_DQS_L5 MEM_MA_DQS5_N 11
1.00K C199 C205 op-amp feedback AE16 Y15
11 MEM_MB_DQS6_P MB_DQS_H6 MA_DQS_H6 MEM_MA_DQS6_P 11
10nF 1nF routed near CPU AD16 W15
11 MEM_MB_DQS6_N MB_DQS_L6 MA_DQS_L6 MEM_MA_DQS6_N 11
11 MEM_MB_DQS7_P AF12 MB_DQS_H7 MA_DQS_H7 W12 MEM_MA_DQS7_P 11
PLACE CLOSE TO CPU 11 MEM_MB_DQS7_N AE12 MB_DQS_L7 MA_DQS_L7 W13 MEM_MA_DQS7_N 11

SOCKET_638_PIN

CPU_VDDR
Place close to socket

C196 C195 C191 C188 C192 C180 C177 C182 C187 C176 C198 C181 C186 C183 C189 C197
1 4.7uF 4.7uF 4.7uF 4.7uF 220nF 220nF 220nF 220nF 1nF 1nF 1nF 1nF X_180pF X_180pF X_180pF X_180pF 1

[ChckList] VDDR:0.22u*4/1n*4/180p*4/4.7u*4 [Fuqun] NC 180pf cap in 1.0

MICRO-STAR INT'L CO.,LTD


MS-168x
MSI
Size Document Description Rev
C 1.0
SIG4 MEMORY
Date: Monday, June 21, 2010 Sheet 8 of 52
A B C D E
5 4 3 2 1

[DG] BEAD: R<40m(about 35), LAYOUT: ROUTE VDDA TRACE APPROX.


Keep net PWRGD, LDT_STOP#, LDT_RST# no stub [ChckList] VDDA:100u*1/4.7u*1/0.22u0603*1/3300p0603*1
I>500mA 50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
+VDDA
+1.5VRUN
L12 26R_600mA CPU_VDDA_RUN

C175 C166 C167 C169


R225 22uF 4.7UF 220nF 3.3NF
300R U22D
R224 PWRGD CPU_VDDIO_SUS
19 CPU_PWRGD
Keep trace from resisor to CPU within 0.6" F8 M11
VDDA1 VSS CPU_VDDIO_SUS
keep trace from caps to CPU within 1.2" F9 W18
C390 3.9NF VDDA2 RSVD11
+1.5VRUN CPU_CLKIN_SC_P A9 A6 CPU_SVC_R R216
D 24 CPU_CLKP CLKIN_H SVC D
200MHz R232 CPU_CLKIN_SC_N A8 A4 CPU_SVD_R 10K
169R CLKIN_L SVD R210 R200 Q15
24 CPU_CLKN
R213 C389 3.9NF LDT_RST# B7 1K 300R
RESET_L

B
300R PWRGD A7 N-MMBT3904_NL_SOT23
R219 LDT_STOP# LDT_STOP# PWROK
16,19 CPU_LDT_STOP# F10 LDTSTOP_L THERMTRIP_L AF6 CPU_THERMTRIP#_VDDIO CPU_THERMTRIP# 20

C
NOT needed by S1G4 TP27 CPU_LDT_REQ#_CPU

E
CPU_LDT_REQ# is C6 LDTREQ_L PROCHOT_L AC7 CPU_PROCHOT# 19
MEMHOT_L AA8 CPU_MEMHOT#_VDDIO TP35 R199 X_0R
VRD_PROCHOT# 44
[Fuqun] Thermal 20 CPU_SIC CPU_SIC AF4 S1G4 does not support MEMHOT_L
+1.5VRUN CPU_SID SIC
20 CPU_SID AF5 SID
place them to CPU within 1.5" CPU_ALERT AE6 W7 CPU_THERMDC TP36 Thermdc and Thermda should be routed away to VRM,
ALERT_L THERMDC CPU_THERMDA TP39
THERMDA W8 crystal, etc. Customer should follow the MBDG.
R227 R63 44.2R CPU_HTREF0 R6
300R R62 44.2R CPU_HTREF1 P6
HT_REF0 However, Guam is using TSI so this does not applies to Guam.
+VLDT HT_REF1
R228 LDT_RST#
19 CPU_LDT_RST#
44 CPU_VDD0_RUN_FB_H F6 VDD0_FB_H VDDIO_FB_H W9
E6 Y9 TP43
44 CPU_VDD0_RUN_FB_L VDD0_FB_L VDDIO_FB_L
C388 TP38 [CheckList] VDDIO_FB_H/L NC if not use
X_180pF TP29 Y6 H6
TP31 VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H 44
[CheckList} VDD1_FB_H/L NC if not use AB6 VDD1_FB_L VDDNB_FB_L G6
TP28
CPU_DBRDY G10
TP33 CPU_TMS DBRDY CPU_DBREQ#
AA9 TMS DBREQ_L E10
TP37 CPU_TCK AC9
CPU_TRST# TCK
TP40 AD9 TRST_L TDO AE9 CPU_TDO TP42
TP41 CPU_TDI AF9
CPU_VDDIO_SUS TDI
route as differential
CPU_TEST23_TSTUPD AD7 J7 CPU_TEST28_H_PLLCHRZ_P TP30 as short as possible
TEST23 TEST28_H CPU_TEST28_L_PLLCHRZ_N TP34
TEST28_L H8 testpoint under package
CPU_VDDIO_SUS CPU_VDDIO_SUS +3.3VSUS R236 CPU_TEST18_PLLTEST1 H10
CPU_TEST19_PLLTEST0 TEST18 CPU_TEST17_BP3 TP26
510R G9 TEST19 TEST17 D7
E7 CPU_TEST16_BP2 TP24 For debug only
R203 R204 4.7K CPU_TEST25_H_BYPASSCLK_H TEST16 CPU_TEST15_BP1
E9 TEST25_H TEST15 F7
C 1K 2.2K R194 CPU_TEST25_L_BYPASSCLK_L E8 C7 CPU_TEST14_BP0 C
TEST25_L TEST14
Q13 CPU_TEST21_SCANEN AB8 C3 CPU_TEST7_ANALOG_T TP23
TEST21 TEST7
B

N-MMBT3904_NL_SOT23 R234 CPU_TEST20_SCANCLK2 AF7 K8 CPU_TEST10_ANALOGOUT


CPU_SID CPU_TEST24_SCANCLK1 TEST20 TEST10
SMB_THRMCPU_DATA 24,25 510R AE7 TEST24
C

CPU_TEST22_SCANSHIFTEN CPU_TEST8_DIG_T TP25


E

AE8 TEST22 TEST8 C4


A C CPU_TEST12_SCANSHIFTENB AC8
D10 BAS40WS CPU_TEST27_SINGLECHAIN TEST12 CPU_VDDIO_SUS
AF8 TEST27
C9 CPU_TEST29_H_FBCLKOUT_P
CPU_TEST9_ANALOGIN TEST29_H
C2 TEST9 TEST29_L C8
CPU_VDDIO_SUS CPU_VDDIO_SUS +3.3VSUS TP32 CPU_TEST6_DIECRACKMON AA6 R65 CPU_DBREQ# R218 300R
R208 TEST6 80.6R CPU_TEST27_SINGLECHAIN R231 1K
0R A3 H18 CPU_TEST29_L_FBCLKOUT_N
R202 R201 4.7K RSVD1 RSVD10 CPU_TEST21_SCANEN R226 1K
A5 RSVD2 RSVD9 H19
1K 2.2K R193 B3 AA7 Route as 80ohm, diff CPU_TEST20_SCANCLK2 R221 1K
RSVD3 RSVD8 CPU_TEST24_SCANCLK1 R222 1K
B5 RSVD4 RSVD7 D5 R184's value is TBD.
Q12 C1 C5 CPU_TEST22_SCANSHIFTEN R233 1K
RSVD5 RSVD6
B

N-MMBT3904_NL_SOT23 CPU_TEST12_SCANSHIFTENB R229 1K


CPU_SIC CPU_TEST15_BP1 R61 X_300R
SMB_THRMCPU_CLK 24,25
C

CPU_TEST14_BP0 R64 X_300R


E

SOCKET_638_PIN
A C
D9 BAS40WS CPU_TEST18_PLLTEST1 R230 1K
[Fuqun] TEST23--R358 NC in ref schematic? CPU_TEST19_PLLTEST0 R223 1K
[Fuqun] RSVD/TEST6/7/8/10/28--NC CPU_TEST23_TSTUPD R217 1K
CPU_DBRDY R67 X_300R

CPU_VDDIO_SUS +3.3VSUS
[Fuqun] TEST14/15/16/17--Test Point
CPU_VDDIO_SUS
[Fuqun] TEST23/25--Test Point
4.7K
R207 R206 [Fuqun] TEST12/18~24--Pull down 1Kohn to VSS CPU_TEST10_ANALOGOUT R60 X_300R +VLDT
1K 10K R205
Q14 [Fuqun] TEST27 pull-up 1Kohm to VDDIO
B

N-MMBT3904_NL_SOT23
B CPU_ALERT [Fuqun] Connect SB [Fuqun] TEST25_H pull-up 510ohm to VDDIO R147, R152 is installed ONLY when SCAN is enabled B
SMBALERT# 20
C
E

R215, R185 internal ONLY


[Fuqun] TEST25_L pull-down 510ohm to VSS R162 is TBD
THERMDA/THERMDC is not used; [Fuqun] TEST9 is tied to VSS
CPU thermal control is based on TSI by default. [DateSheet] Internal Termination:Systems that do not require use of
[Fuqun] There is a (1%) differential termination between TEST29_L and these pins can rely on the internal termination to pull the signals
TEST29_H
[Fuqun] CPU_DBRDY not need pull down in checklist to the proper inactive state. When these pins are used, they must
not be driven with open-drain outputs,otherwise additional
termination is required

+1.5VRUN [DateSheet] Internal pull_up 870~1250 ohm:


SSA[2;0], TCK, TMS, TRST_L, TDI, DBREQ_L, PLATFORM_TYPE, TEST27

X_2.2K
[DateSheet] Internal pull_down 870~1250 ohm:
1K 1K [Fuqun] PWRGD pull-up in 2 times (R187 and R163)?
R212 R209 TEST12, TEST[20:24]

R215
CPU_SVC_R R214
CPU_SVD_R R211 CPU_SVC 44
CPU_SVD 44
Internal pull_up 870~1250 ohm:
PWRGD R220 SSA[2;0], TCK, TMS, TRST_L, TDI, DBREQ_L, PLATFORM_TYPE, TEST27
CPU_PWRGD_SVID_REG 44

A A
BOOT VOLTAGE(VDD)
SVC SVD
(CPUVRM_PRO# (CPUVRM_PRO#
= VCC/GND) = OPEN)

0 0 1.1 1.1
0 1 1.0 1.2
1 0 0.9 1.0
1 1 0.8 0.8 MICRO-STAR INT'L CO.,LTD
VID OVERIDE TABLE (VDD) MSI
MS-168x
Size Document Description Rev
Custom 1.0
SIG4 CTRL and DEBEG
Date: Monday, June 21, 2010 Sheet 9 of 52
5 4 3 2 1
5 4 3 2 1

CPU_VDD_RUN

U22F
BOTTOM SIDE DECOUPLING
AA4 VSS1 VSS66 J6
D AA11 VSS2 VSS67 J8 D
AA13 J10 C193 C173 C178 C184 C157 C155 C190
VSS3 VSS68 22uF 22uF 22uF 22uF 220nF 10nF X_180pF
AA15 VSS4 VSS69 J12
AA17 VSS5 VSS70 J14
AA19 VSS6 VSS71 J16
AB2 VSS7 VSS72 J18
AB7 VSS8 VSS73 K2
AB9 K7 CPU_VDD_RUN
VSS9 VSS74
AB23 VSS10 VSS75 K9
U22E AB25 VSS11 VSS76 K11
CPU_VDD_RUN CPU_VDD_RUN AC11 K13
VSS12 VSS77
AC13 VSS13 VSS78 K15
G4 P8 AC15 K17 C174 C179 C185 C194 C161 C154 C160
VDD_1 VDD_24 VSS14 VSS79 22uF 22uF 22uF 22uF 220nF 10nF X_180pF
H2 VDD_2 VDD_25 P10 AC17 VSS15 VSS80 L6
J9 VDD_3 VDD_26 R4 AC19 VSS16 VSS81 L8
J11 VDD_4 VDD_27 R7 AC21 VSS17 VSS82 L10
J13 VDD_5 VDD_28 R9 AD6 VSS18 VSS83 L12
J15 VDD_6 VDD_29 R11 AD8 VSS19 VSS84 L14 [Fuqun] NC 180pf cap in 1.0
K6 T2 AD25 L16 CPU_VDDNB_RUN CPU_VDDIO_SUS
VDD_7 VDD_30 VSS20 VSS85
K10 VDD_8 VDD_31 T6 AE11 VSS21 VSS86 L18
K12 VDD_9 VDD_32 T8 AE13 VSS22 VSS87 M7
K14 VDD_10 VDD_33 T10 AE15 VSS23 VSS88 M9
C
L4 VDD_11 VDD_34 T12 AE17 VSS24 VSS89 AC6 C
L7 T14 AE19 M17 C203 C202 C204 C201 C200 C222 C207 C209
VDD_12 VDD_35 VSS25 VSS90 22uF 22uF 22uF 22uF 22uF 220nF 220nF X_180pF
L9 VDD_13 VDD_36 U7 AE21 VSS26 VSS91 N4
L11 VDD_14 VDD_37 U9 AE23 VSS27 VSS92 N8
L13 VDD_15 VDD_38 U11 B4 VSS28 VSS93 N10
L15 VDD_16 VDD_39 U13 B6 VSS29 VSS94 N16
M2 VDD_17 VDD_40 U15 B8 VSS30 VSS95 N18
M6 VDD_18 VDD_41 V6 B9 VSS31 VSS96 P2
M8 VDD_19 VDD_42 V8 B11 VSS32 VSS97 P7
M10 VDD_20 VDD_43 V10 B13 VSS33 VSS98 P9 [ChckList] VDD:22u*8/0.22u*2/0.01u0603*2/180p*2
N7 VDD_21 VDD_44 V12 B15 VSS34 VSS99 P11 [ChckList] VDDNB:22u*3
N9 VDD_22 VDD_45 V14 B17 VSS35 VSS100 P17
N11 VDD_23 VDD_46 W4 B19 VSS36 VSS101 R8
CPU_VDDNB_RUN Y2 B21 R10
VDD_47 VSS37 VSS102
K16 VDDNB_1 VDD_48 AC4 B23 VSS38 VSS103 R16
M16 VDDNB_2 VDD_49 AD2 B25 VSS39 VSS104 R18
P16 CPU_VDDIO_SUS D6 T7
VDDNB_3 VSS40 VSS105
T16 Y25 D8 T9
CPU_VDDIO_SUS
V16
VDDNB_4
VDDNB_5
VDDIO27
VDDIO26 V25
V23
D9
D11
VSS41
VSS42
VSS106
VSS107 T11
T13
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO25 VSS43 VSS108
H25 V21 D13 T15
J17
K18
VDDIO1
VDDIO2
VDDIO24
VDDIO23 V18
U17
D15
D17
VSS44
VSS45
VSS109
VSS110 T17
U4
PLACE CLOSE TO PROCESSOR AS POSSIBLE
VDDIO3 VDDIO22 VSS46 VSS111
B K21 VDDIO4 VDDIO21 T25 D19 VSS47 VSS112 U6 B
K23 T23 D21 U8 CPU_VDDIO_SUS
VDDIO5 VDDIO20 VSS48 VSS113
K25 VDDIO6 VDDIO19 T21 D23 VSS49 VSS114 U10
L17 VDDIO7 VDDIO18 T18 D25 VSS50 VSS115 U12
M18 VDDIO8 VDDIO17 R17 E4 VSS51 VSS116 U14
M21 VDDIO9 VDDIO16 P25 F2 VSS52 VSS117 U16
M23 P23 F11 U18 C221 C223 C217 C216 C206 C212 C211 C213 C210 C214 C215 C220 C208
VDDIO10 VDDIO15 VSS53 VSS118 4.7uF 4.7uF 4.7uF 4.7uF 220nF 220nF 220nF 220nF 100nF 10nF X_180pF X_180pF 100nF
M25 VDDIO11 VDDIO14 P21 F13 VSS54 VSS119 V2
N17 VDDIO12 VDDIO13 P18 F15 VSS55 VSS120 V7
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
SOCKET_638_PIN F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
F25 VSS60 VSS125 V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6 [ChckList] VDDIO:22u*2/0.22u*6/0.1u0603*2/0.01u0603*1/180p*1/4.7u*4
J4 VSS65
SOCKET_638_PIN

A A

MICRO-STAR INT'L CO.,LTD

PROCESSOR POWER AND GROUND MSI


Size
Custom
MS-168x
Document Description Rev
1.0
SIG4 POWER and GND
Date: Monday, June 21, 2010 Sheet 10 of 52
5 4 3 2 1
5 4 3 2 1

CPU_VDDIO_SUS CPU_VDDIO_SUS

100
105
106
111
112
117
118
123
124

100
105
106
111
112
117
118
123
124
75
76
81
82
87
88
93
94
99

75
76
81
82
87
88
93
94
99
8 MEM_MA_ADD[0..15] MEM_MA_DATA[0..63] 8 8 MEM_MB_ADD[0..15] MEM_MB_DATA[0..63] 8
DIMM1 DIMM2
MEM_MA_ADD0 98 5 MEM_MA_DATA0 MEM_MB_ADD0 98 5 MEM_MB_DATA0

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA1
97 A1 DQ1 7 97 A1 DQ1 7
MEM_MA_ADD2 96 15 MEM_MA_DATA2 MEM_MB_ADD2 96 15 MEM_MB_DATA2
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3
95 A3/A4 DQ3 17 95 A3/A4 DQ3 17
MEM_MA_ADD4 92 4 MEM_MA_DATA4 MEM_MB_ADD4 92 4 MEM_MB_DATA4
MEM_MA_ADD5 A4/A3 DQ4 MEM_MA_DATA5 MEM_MB_ADD5 A4/A3 DQ4 MEM_MB_DATA5
91 A5/A6 DQ5 6 91 A5/A6 DQ5 6
D MEM_MA_ADD6 90 16 MEM_MA_DATA6 MEM_MB_ADD6 90 16 MEM_MB_DATA6 D
MEM_MA_ADD7 A6/A5 DQ6 MEM_MA_DATA7 MEM_MB_ADD7 A6/A5 DQ6 MEM_MB_DATA7
86 A7/A8 DQ7 18 86 A7/A8 DQ7 18
MEM_MA_ADD8 89 21 MEM_MA_DATA8 MEM_MB_ADD8 89 21 MEM_MB_DATA8
MEM_MA_ADD9 A8/A7 DQ8 MEM_MA_DATA9 MEM_MB_ADD9 A8/A7 DQ8 MEM_MB_DATA9
85 A9 DQ9 23 85 A9 DQ9 23
MEM_MA_ADD10 107 33 MEM_MA_DATA10 MEM_MB_ADD10 107 33 MEM_MB_DATA10
MEM_MA_ADD11 A10/AP DQ10 MEM_MA_DATA11 MEM_MB_ADD11 A10/AP DQ10 MEM_MB_DATA11
84 A11 DQ11 35 84 A11 DQ11 35
MEM_MA_ADD12 83 22 MEM_MA_DATA12 MEM_MB_ADD12 83 22 MEM_MB_DATA12
MEM_MA_ADD13 A12_BC# DQ12 MEM_MA_DATA13 MEM_MB_ADD13 A12_BC# DQ12 MEM_MB_DATA13
119 A13 DQ13 24 119 A13 DQ13 24
MEM_MA_ADD14 80 34 MEM_MA_DATA14 MEM_MB_ADD14 80 34 MEM_MB_DATA14
MEM_MA_ADD15 A14 DQ14 MEM_MA_DATA15 MEM_MB_ADD15 A14 DQ14 MEM_MB_DATA15
8 MEM_MA_BANK[0..2] 78 A15/BA3 DQ15 36 8 MEM_MB_BANK[0..2] 78 A15/BA3 DQ15 36
39 MEM_MA_DATA16 39 MEM_MB_DATA16
MEM_MA_BANK0 DQ16 MEM_MA_DATA17 MEM_MB_BANK0 DQ16 MEM_MB_DATA17
109 BA0/BA1 DQ17 41 109 BA0/BA1 DQ17 41
MEM_MA_BANK1 108 51 MEM_MA_DATA18 MEM_MB_BANK1 108 51 MEM_MB_DATA18
MEM_MA_BANK2 BA1/BA0 DQ18 MEM_MA_DATA19 MEM_MB_BANK2 BA1/BA0 DQ18 MEM_MB_DATA19
8 MEM_MA_DM[0..7] 79 BA2 DQ19 53 8 MEM_MB_DM[0..7] 79 BA2 DQ19 53
40 MEM_MA_DATA20 40 MEM_MB_DATA20
MEM_MA_DM0 DQ20 MEM_MA_DATA21 MEM_MB_DM0 DQ20 MEM_MB_DATA21
11 DM0 DQ21 42 11 DM0 DQ21 42
MEM_MA_DM1 28 50 MEM_MA_DATA22 MEM_MB_DM1 28 50 MEM_MB_DATA22
MEM_MA_DM2 DM1 DQ22 MEM_MA_DATA23 MEM_MB_DM2 DM1 DQ22 MEM_MB_DATA23
46 DM2 DQ23 52 46 DM2 DQ23 52
MEM_MA_DM3 63 57 MEM_MA_DATA24 MEM_MB_DM3 63 57 MEM_MB_DATA24
MEM_MA_DM4 DM3 DQ24 MEM_MA_DATA25 MEM_MB_DM4 DM3 DQ24 MEM_MB_DATA25
136 DM4 DQ25 59 136 DM4 DQ25 59
MEM_MA_DM5 153 67 MEM_MA_DATA26 MEM_MB_DM5 153 67 MEM_MB_DATA26
MEM_MA_DM6 DM5 DQ26 MEM_MA_DATA27 MEM_MB_DM6 DM5 DQ26 MEM_MB_DATA27
170 DM6 DQ27 69 170 DM6 DQ27 69
MEM_MA_DM7 187 56 MEM_MA_DATA28 MEM_MB_DM7 187 56 MEM_MB_DATA28
DM7 DQ28 MEM_MA_DATA29 DM7 DQ28 MEM_MB_DATA29
DQ29 58 DQ29 58
12 68 MEM_MA_DATA30 12 68 MEM_MB_DATA30
8 MEM_MA_DQS0_P DQS0 DQ30 8 MEM_MB_DQS0_P DQS0 DQ30
29 70 MEM_MA_DATA31 29 70 MEM_MB_DATA31
8 MEM_MA_DQS1_P DQS1 DQ31 8 MEM_MB_DQS1_P DQS1 DQ31
47 129 MEM_MA_DATA32 47 129 MEM_MB_DATA32
8 MEM_MA_DQS2_P DQS2 DQ32 8 MEM_MB_DQS2_P DQS2 DQ32
64 131 MEM_MA_DATA33 64 131 MEM_MB_DATA33

DDR3 SO-DIMM

DDR3 SO-DIMM
8 MEM_MA_DQS3_P DQS3 DQ33 8 MEM_MB_DQS3_P DQS3 DQ33
137 141 MEM_MA_DATA34 137 141 MEM_MB_DATA34
8 MEM_MA_DQS4_P DQS4 DQ34 8 MEM_MB_DQS4_P DQS4 DQ34
154 143 MEM_MA_DATA35 154 143 MEM_MB_DATA35
8 MEM_MA_DQS5_P DQS5 DQ35 8 MEM_MB_DQS5_P DQS5 DQ35
171 130 MEM_MA_DATA36 171 130 MEM_MB_DATA36
8 MEM_MA_DQS6_P DQS6 DQ36 8 MEM_MB_DQS6_P DQS6 DQ36
188 132 MEM_MA_DATA37 188 132 MEM_MB_DATA37
8 MEM_MA_DQS7_P DQS7 DQ37 8 MEM_MB_DQS7_P DQS7 DQ37
140 MEM_MA_DATA38 140 MEM_MB_DATA38
C DQ38 MEM_MA_DATA39 DQ38 MEM_MB_DATA39 C
8 MEM_MA_DQS0_N 10 DQS0# DQ39 142 8 MEM_MB_DQS0_N 10 DQS0# DQ39 142
27 147 MEM_MA_DATA40 27 147 MEM_MB_DATA40
8 MEM_MA_DQS1_N DQS1# DQ40 8 MEM_MB_DQS1_N DQS1# DQ40
45 149 MEM_MA_DATA41 45 149 MEM_MB_DATA41
8 MEM_MA_DQS2_N DQS2# DQ41 8 MEM_MB_DQS2_N DQS2# DQ41
62 157 MEM_MA_DATA42 62 157 MEM_MB_DATA42

(Reverse)
8 MEM_MA_DQS3_N DQS3# DQ42 8 MEM_MB_DQS3_N DQS3# DQ42
135 159 MEM_MA_DATA43 135 159 MEM_MB_DATA43
8 MEM_MA_DQS4_N 8 MEM_MB_DQS4_N
(Normal)
DQS4# DQ43 MEM_MA_DATA44 DQS4# DQ43 MEM_MB_DATA44
8 MEM_MA_DQS5_N 152 DQS5# DQ44 146 8 MEM_MB_DQS5_N 152 DQS5# DQ44 146
169 148 MEM_MA_DATA45 169 148 MEM_MB_DATA45
8 MEM_MA_DQS6_N DQS6# DQ45 8 MEM_MB_DQS6_N DQS6# DQ45
186 158 MEM_MA_DATA46 186 158 MEM_MB_DATA46
8 MEM_MA_DQS7_N DQS7# DQ46 8 MEM_MB_DQS7_N DQS7# DQ46
160 MEM_MA_DATA47 160 MEM_MB_DATA47
DQ47 MEM_MA_DATA48 DQ47 MEM_MB_DATA48
DQ48 163 DQ48 163
101 165 MEM_MA_DATA49 101 165 MEM_MB_DATA49
8 MEM_MA_CLK1_P CK0 DQ49 8 MEM_MB_CLK1_P CK0 DQ49
103 175 MEM_MA_DATA50 103 175 MEM_MB_DATA50
8 MEM_MA_CLK1_N CK0# DQ50 8 MEM_MB_CLK1_N CK0# DQ50
102 177 MEM_MA_DATA51 102 177 MEM_MB_DATA51
8 MEM_MA_CLK2_P CK1 DQ51 8 MEM_MB_CLK2_P CK1 DQ51
104 164 MEM_MA_DATA52 104 164 MEM_MB_DATA52
8 MEM_MA_CLK2_N CK1# DQ52 8 MEM_MB_CLK2_N CK1# DQ52
166 MEM_MA_DATA53 166 MEM_MB_DATA53
DQ53 MEM_MA_DATA54 DQ53 MEM_MB_DATA54
8 MEM_MA_CKE0 73 CKE0 DQ54 174 8 MEM_MB_CKE0 73 CKE0 DQ54 174
74 176 MEM_MA_DATA55 74 176 MEM_MB_DATA55
8 MEM_MA_CKE1 CKE1 DQ55 8 MEM_MB_CKE1 CKE1 DQ55
181 MEM_MA_DATA56 181 MEM_MB_DATA56
DQ56 MEM_MA_DATA57 DQ56 MEM_MB_DATA57
8 MEM_MA_RAS# 110 RAS# DQ57 183 8 MEM_MB_RAS# 110 RAS# DQ57 183
115 191 MEM_MA_DATA58 115 191 MEM_MB_DATA58
8 MEM_MA_CAS# CAS# DQ58 8 MEM_MB_CAS# CAS# DQ58
113 193 MEM_MA_DATA59 113 193 MEM_MB_DATA59
8 MEM_MA_WE# WE# DQ59 8 MEM_MB_WE# WE# DQ59
114 180 MEM_MA_DATA60 114 180 MEM_MB_DATA60
8 MEM_MA0_CS#0 S0# DQ60 8 MEM_MB0_CS#0 S0# DQ60
121 182 MEM_MA_DATA61 121 182 MEM_MB_DATA61
8 MEM_MA0_CS#1 S1# DQ61 8 MEM_MB0_CS#1 S1# DQ61
192 MEM_MA_DATA62 192 MEM_MB_DATA62
DQ62 MEM_MA_DATA63 DQ62 MEM_MB_DATA63
8 MEM_MA0_ODT0 116 ODT0 DQ63 194 8 MEM_MB0_ODT0 116 ODT0 DQ63 194
8 MEM_MA0_ODT1 120 ODT1 8 MEM_MB0_ODT1 120 ODT1
NC1 77 NC1 77
197 122 +3.3VRUN R76 4.7K 197 122
SA0 NC2 MEM_MA_TEST TP77 SA0 NC2 MEM_MB_TEST TP61
201 SA1 TEST 125 201 SA1 TEST 125

20,24 SDATA0 200 SDA 205 205 20,24 SDATA0 200 SDA 205 205
20,24 SCLK0 202 SCL 206 206 [Fuqun] Update DDR3 coonector LIB 20,24 SCLK0 202 SCL 206 206 [Fuqun] Update DDR3 coonector LIB
B B
+3.3VRUN 199 VDDspd VSS51 196 +3.3VRUN 199 VDDspd VSS51 196
VSS50 195 VSS50 195
8 MEM_MA_RST# 30 RST# VSS49 190 8 MEM_MB_RST# 30 RST# VSS49 190
VSS48 189 VSS48 189
TP60 MEM_MA_EVENT# 198 185 TP62 MEM_MB_EVENT# 198 185
EVENT# VSS47 EVENT# VSS47
VSS46 184 VSS46 184
MEM_M_VREF_SUS 1 VREF VSS45 179 MEM_M_VREF_SUS 1 VREF VSS45 179
VSS44 178 VSS44 178 Standard
MEM_M_VREFCA 126 VrefCA VSS43 173 MEM_M_VREFCA 126 VrefCA VSS43 173
VSS42 172 VSS42 172 Connector
MEM_VTT 203 VTT1 VSS41 168 MEM_VTT 203 VTT1 VSS41 168
C252 C269 204 VTT2 VSS40 167 C249 C264 204 VTT2 VSS40 167 1
1nF 1nF 162 1nF 1nF 162
VSS39 VSS39
2 VSS0 VSS38 161 2 VSS0 VSS38 161 1

3
5

7
2
4
6

3 156 3 156
9
10
11
12

VSS1 VSS37 VSS1 VSS37 2


13
14
15
16
17
18

8 155 8 155
19
20
21
22

VSS2 VSS36 VSS2 VSS36


23 24
25
26
27
28
29

9 151 9 151
30
31
32
33

VSS3 VSS35 VSS3 VSS35


34
35

Reverse
36
37
38
39

13 150 13 150
40

VSS4 VSS34 VSS4 VSS34


14 145 14 145 41

Connector
42

VSS5 VSS33 VSS5 VSS33


43
44
45
46
47 48
49

19 144 19 144
50
51
52
53

VSS6 VSS32 VSS6 VSS32


54
55
56
57
58
59

20 139 20 139
60
61
62
63

VSS7 VSS31 VSS7 VSS31


64
65

+3.3VRUN +3.3VRUN
67 66

2
68
69

CON_SODIM 20_STD_V1
70

25 138 25 138
71
72
73
74

VSS8 VSS30 VSS8 VSS30


75
76
77
78
79
80

26 134 26 134
81
82
83 84
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26

VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
85

VSS9 VSS29 VSS9 VSS29


86
87
88
89
1 90
2 91

31 133 31 133
3 92
4 93
5 94
6 95

VSS10 VSS28 VSS10 VSS28


7 96
8 97
9 98
10 99
11 100
12 101

32 128 32 128
13 103 102
14 104

1
15 105
16 106

VSS11 VSS27 VSS11 VSS27


17 107
19 18 108
20 109
21 110
22 111
23 112
24 113
25 114
26 115
27 116
28 117
29 118
30 119 120
31 121
32 122
33 123
34 124
35 36 125
37 126
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127

37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
38 127
39 128
40 129
130
131

C238 DDR3_SO-DIMM_SOCKET_1.5V C257


132
133
134
135
136
137
139 138
140
141
142

1uF 1uF DDR3_SO-DIMM_SOCKET_1.5V_REVERSE


41 143
43 42 144
44 145
45 146
46 147
47 148
48 149
49 150
50 151
51 152
52 153
53 154
54 155
55 157 156
56 158
57 159
58 160
59 60 161
61 162
62 163
63 164
64 165

200
65 166
66 167

199
67 168
68 169
69 170
CON_SODIM 20_RVS_V1

70 171
71 172
72 173
73 175 174
74 176
75 177
76 178
77 179
79 78 180
80 181

A A
81 182
82 183
83 184
84 185
85 186
86 187
87 188
88 189
89 190
90 191
91 192
92 193 194
93 195
94 196
95 96 197
97 198
98 199
99 200
100
101
102
103
104
105
106
107
108
109
110
111
112
113
115 114
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133 134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
151 150
152
153
154
155
156
157
158
159

MICRO-STAR INT'L CO.,LTD


160
161
162
163
164
165
166
167

199
168
169 170
171
172
173

200
174
175
176
177
178
179
180
181
182
183
184
185
187 186
188
189
190

MS-168x
191
192
193
194
195
196
197

MSI
198
199
200

Size Document Description Rev


Custom 1.0
DDR3 SO-DIMM-A
Date: Monday, June 21, 2010 Sheet 11 of 52
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A
MICRO-STAR INT'L CO.,LTD A

MSI
MS-168x
Size Document Description Rev
A 1.0
DDR3 SO-DIMM-B
Date: Monday, June 21, 2010 Sheet 12 of 52
5 4 3 2 1
5 4 3 2 1

MEM_VTT MEM_VTT

C240 X_100nF C243 X_100nF


CPU_VDDIO_SUS CPU_VDDIO_SUS
C256 X_100nF C270 X_100nF

D D
DE-COUPLING FOR CHANNEL A SODIMM DE-COUPLING FOR CHANNEL B SODIMM

CPU_VDDIO_SUS
CPU_VDDIO_SUS

C258 C259 C254 C267 C260 C253 C244 C251 C248 C255 C266 C262
C245 C398 C265 C396 C261 C399 C401 C400 C397 C247 C250 C246 X_100nF X_100nF X_100nF X_100nF X_100nF X_100nF 100nF 100nF 100nF 100nF 100nF 100nF
100nF 100nF 100nF 100nF 100nF 100nF X_100nF X_100nF X_100nF X_100nF X_100nF X_100nF

DE-COUPLING FOR CHANNEL B SODIMM (ONE CAP PER POWER PIN)


DE-COUPLING FOR CHANNEL A SODIMM (ONE CAP PER POWER PIN)

CPU_VDDIO_SUS MEM_VTT CPU_VDDIO_SUS MEM_VTT

[Fuqun] NC 2pcs 22pf cap in 1.0


C C
C395 C394 C268 C392 C393 C271
22uF_6.3V X_22uF_6.3V 4.7uF X_22uF_6.3V 22uF_6.3V 4.7uF

MEM_M_VREFCA MEM_VREF_SUS
CPU_VDDIO_SUS CPU_VDDIO_SUS

LAYOUT: PLACE CLOSE TO DIMMs


LAYOUT: PLACE CLOSE TO DIMMs
R73 R74
1.00K 1.00K
MEM_M_VREFCA MEM_M_VREF_SUS

R72 [ChckList] 1n*1/0.01u*1 R75 [ChckList] 1n*1/0.01u*1


B 1.00K C263 C242 1.00K C239 C241 B
1nF 10nF
[CRB] 1n*1/0.1u*1 1nF 10nF
[CRB] 1n*1/0.1u*1

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom 1.0
DDR3 DECOUPLING
Date: Monday, June 21, 2010 Sheet 13 of 52
5 4 3 2 1
5 4 3 2 1

U21A
7 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 7
D 7 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 7 D
7 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 7
7 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 7
7 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 7
7 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 7
7 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 7
7 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 7
7 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 7
7 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 7

HYPER TRANSPORT CPU I/F


7 HT_CPU_NB_CAD_H5 P22 HT_RXCAD5P HT_TXCAD5P J25 HT_NB_CPU_CAD_H5 7
7 HT_CPU_NB_CAD_L5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_NB_CPU_CAD_L5 7
7 HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 7
7 HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 7
7 HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 7
7 HT_CPU_NB_CAD_L7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L7 7

7 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 7


7 HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_NB_CPU_CAD_L8 7
7 HT_CPU_NB_CAD_H9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_NB_CPU_CAD_H9 7
7 HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 7
7 HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 7
7 HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 7
7 HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 7
7 HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 7
C 7 HT_CPU_NB_CAD_H12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 7 C
7 HT_CPU_NB_CAD_L12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 7
7 HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 7
7 HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 7
7 HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 7
7 HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 7
7 HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 7
7 HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 7

7 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 7


7 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 7
7 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 7
7 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 7

7 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 7


7 HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 7
7 HT_CPU_NB_CTL_H1 R21 HT_RXCTL1P HT_TXCTL1P P19 HT_NB_CPU_CTL_H1 7
7 HT_CPU_NB_CTL_L1 R20 HT_RXCTL1N HT_TXCTL1N R18 HT_NB_CPU_CTL_L1 7
R190 301R HT_RXCALP C23 B24 HT_TXCALP R192 301R
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25

RS880M A11 HF MVD

B B

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B 1.0
RS880M-HT
Date: Monday, June 21, 2010 Sheet 14 of 52
5 4 3 2 1
5 4 3 2 1

MXM3.0 need put the CAP on the motherboard.


MXM3.0 need put the CAP on the motherboard. Close to the MXM Slot
Close to the MXM Slot

U21B
D4 A5 GFX_TX0P_C C331 C0.1u10X0402
GFX_RX0P GFX_TX0P HDMI_DATA2P 27
C4 PART 2 OF 6 B5 GFX_TX0N_C C330 C0.1u10X0402
GFX_RX0N GFX_TX0N HDMI_DATA2N 27
A3 A4 GFX_TX1P_C C329 C0.1u10X0402
D GFX_RX1P GFX_TX1P HDMI_DATA1P 27 D
B3 B4 GFX_TX1N_C C328 C0.1u10X0402
GFX_RX1N GFX_TX1N HDMI_DATA1N 27
C2 C3 GFX_TX2P_C C324 C0.1u10X0402
GFX_RX2P GFX_TX2P HDMI_DATA0P 27
C1 B2 GFX_TX2N_C C327 C0.1u10X0402
GFX_RX2N GFX_TX2N HDMI_DATA0N 27
E5 D1 GFX_TX3P_C C326 C0.1u10X0402
GFX_RX3P GFX_TX3P HDMI_CLKP 27
F5 D2 GFX_TX3N_C C325 C0.1u10X0402
GFX_RX3N GFX_TX3N HDMI_CLKN 27

PCIE I/F GFX


G5 GFX_RX4P GFX_TX4P E2
G6 GFX_RX4N GFX_TX4N E1
H5 GFX_RX5P GFX_TX5P F4
H6 GFX_RX5N GFX_TX5N F3
J6 GFX_RX6P GFX_TX6P F1
J5 GFX_RX6N GFX_TX6N F2
J7 GFX_RX7P GFX_TX7P H4
J8 GFX_RX7N GFX_TX7N H3
L5 GFX_RX8P GFX_TX8P H1
L6 GFX_RX8N GFX_TX8N H2
M8 GFX_RX9P GFX_TX9P J2
L8 GFX_RX9N GFX_TX9N J1
P7 GFX_RX10P GFX_TX10P K4
M7 GFX_RX10N GFX_TX10N K3
P5 GFX_RX11P GFX_TX11P K1
M5 GFX_RX11N GFX_TX11N K2
R8 GFX_RX12P GFX_TX12P M4
P8 GFX_RX12N GFX_TX12N M3
C R6 GFX_RX13P GFX_TX13P M1 C
R5 GFX_RX13N GFX_TX13N M2
P4 GFX_RX14P GFX_TX14P N2
P3 GFX_RX14N GFX_TX14N N1
T4 GFX_RX15P GFX_TX15P P1
T3 GFX_RX15N GFX_TX15N P2

AE3 AC1 GPP_TX0P_C C0.1u10X0402 C333


35 PCIE_WLAN_RX0P GPP_RX0P GPP_TX0P PCIE_WLAN_TX0P 35
AD4 AC2 GPP_TX0N_C C0.1u10X0402 C334
35 PCIE_WLAN_RX0N GPP_RX0N GPP_TX0N PCIE_WLAN_TX0N 35
AE2 GPP_RX1P GPP_TX1P AB4
AD3 GPP_RX1N GPP_TX1N AB3
AD1 AA2 GPP_TX2P_C C0.1u10X0402 C335
34 PCIE_LAN_RX2P GPP_RX2P GPP_TX2P PCIE_LAN_TX2P 34
AD2 PCIE I/F GPP AA1 GPP_TX2N_C C0.1u10X0402 C336
34 PCIE_LAN_RX2N GPP_RX2N GPP_TX2N PCIE_LAN_TX2N 34
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 GPP_RX4N GPP_TX4N Y3
U8 V1 GPP_TX5P_C C0.1u10X0402 C339
30 PCIE_NEWCARD_RX4P GPP_RX5P GPP_TX5P PCIE_NEWCARD_TX4P 30
U7 V2 GPP_TX5N_C C0.1u10X0402 C338
30 PCIE_NEWCARD_RX4N GPP_RX5N GPP_TX5N PCIE_NEWCARD_TX4N 30

19 PCIE_SB_NB_RX0P AA8 AD7 A_TX0P_C C0.1u10X0402 C362


SB_RX0P SB_TX0P PCIE_NB_SB_TX0P 19
19 PCIE_SB_NB_RX0N Y8 AE7 A_TX0N_C C0.1u10X0402 C356
SB_RX0N SB_TX0N PCIE_NB_SB_TX0N 19
19 PCIE_SB_NB_RX1P AA7 AE6 A_TX1P_C C0.1u10X0402 C352
SB_RX1P SB_TX1P PCIE_NB_SB_TX1P 19
19 PCIE_SB_NB_RX1N Y7 AD6 A_TX1N_C C0.1u10X0402 C355
SB_RX1N SB_TX1N PCIE_NB_SB_TX1N 19
B 19 PCIE_SB_NB_RX2P AA5 PCIE I/F SB AB6 A_TX2P_C C0.1u10X0402 C348 B
SB_RX2P SB_TX2P PCIE_NB_SB_TX2P 19
19 PCIE_SB_NB_RX2N AA6 AC6 A_TX2N_C C0.1u10X0402 C351
SB_RX2N SB_TX2N PCIE_NB_SB_TX2N 19
19 PCIE_SB_NB_RX3P W5 AD5 A_TX3P_C C0.1u10X0402 C345
SB_RX3P SB_TX3P PCIE_NB_SB_TX3P 19
19 PCIE_SB_NB_RX3N Y5 AE5 A_TX3N_C C0.1u10X0402 C347
SB_RX3N SB_TX3N PCIE_NB_SB_TX3N 19
AC8 R37 1.27K +1.1VRUN [CheckList] Use VDD_PCIE power?
PCE_CALRP(PCE_BCALRP) R35 2.0K
PCE_CALRN(PCE_BCALRN) AB8

RS880M A11 HF MVD

RS880M Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3


DP0 All PCIe lane shou route 8" max for Gen2 connector and max 12" for Gen2 on board devices
AUX0 and HPD0 Keep the impendance of PCIE lane to 85ohm +/-15% Guam has the Lasso lane over 8" due to the large board, should use shorter lasso calbe for Guam.
Including the A-link Customer need to follow the MBDG.
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B 1.0
RS880M-PCIE
Date: Monday, June 21, 2010 Sheet 15 of 52
5 4 3 2 1
5 4 3 2 1

DDR3 based CPU and mobile platforms--Level shift to 1.8V


DDR2 based CPU mobile platforms--No need level shift
+3.3VRUN
+1.5VRUN +1.8VRUN L8 300R_300mA AVDD
[CheckList] Change 1K to 2.2K for DDR3/NoteBook
110mA C105
R186 R168 2.2uF_4V
1K 2.2K
Q9 +1.8VRUN
AVDDDI

B
N-MMBT3904_NL_SOT23 U21C
NB_LDT_STOP# 20mA C104 F12 A22
9,19 CPU_LDT_STOP# AVDD1(NC) TXOUT_L0P(NC) LVDS_TX_L0P 26

C
D 0.1uF D

E
E12 AVDD2(NC) PART 3 OF 6 TXOUT_L0N(NC) B22 LVDS_TX_L0N 26
F14 AVDDDI(NC) TXOUT_L1P(NC) A21 LVDS_TX_L1P 26
+1.8VRUN G15 B21
+1.8VRUN +1.8VRUN AVSSDI(NC) TXOUT_L1N(NC) LVDS_TX_L1N 26
L6 300R_300mA AVDDQ H15 B20
AVDDQ(NC) TXOUT_L2P(NC) LVDS_TX_L2P 26
C103 H14 A20
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) LVDS_TX_L2N 26
4mA 2.2uF_4V A19
R167 R187 TXOUT_L3P(NC) TP22
E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19
300R 1K [Fuqun] TV--NC F17 Y(DFT_GPIO2)

CRT/TVOUT
F15 COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) B18
ALLOW_LDTSTOP Termination resstors < 1 inch trace A18
19 ALLOW_LDTSTOP TXOUT_U0N(NC)
26 NB_VGA_R G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17
NB_PWRGD R49 140R 1% ** G17 B17
20 NB_PWRGD REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
26 NB_VGA_G E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20
R151 X_NC NB_RST#_IN R48 150R 1% F18 D21
18,19,24,25 A_RST# GREENb(NC) TXOUT_U2N(NC)
26 NB_VGA_B E19 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) D18
R50 150R 1% F19 D19
BLUEb(NC) TXOUT_U3N(NC)
[Fuqun] NBPWRGD:level shifterTto 1.8V if driven from a 3.3-V output?
18,26 NB_HSYNC# A11 DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) B16 LVDS_TX_CLKLP 26
[CheckList] >200ohm bead 18,26 NB_VSYNC# B11 DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) A16 LVDS_TX_CLKLN 26
26 DAC_SCL F8 DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4) D16
26 DAC_SDAT E8 DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1) D17
+1.8VRUN
+1.1VRUN [CheckList] 2.2uf? G14
R47 715R1%0402 DAC_RSET(PWM_GPIO1) B10 300R_300mA
+1.8VRUN VDDLTP18(NC) A13 15mA
L5 300R_300mA 65mA PLLVDD A12 B13
L7 3.9R PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
20mA D14

PLL PWR
C93 C102 PLLVDD18(NC) +1.8VRUN
B12 A15

LVTM
C118 2.2uF_4V 4.7uF_4V PLLVSS(NC) VDDLT18_1(NC) B8 300R_600mA
VDDLT18_2(NC) B15 300mA
22uF L9 300R_300mA 20mA VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC) C369
VDDLT33_2(NC) B14
C L4 300R_300mA VDDA18PCIEPLL C114 C117 2.2uF_4V C
120mA D7 VDDA18PCIEPLL1
E7 C14 0.1uF 4.7uF
C111 C82 VDDA18PCIEPLL2 VSSLT1(VSS)
Change B204/C262 for 2.2uF_4V 2.2uF_4V NB_RST#_IN D8
VSSLT2(VSS) D15
C16
SYSRESETb VSSLT3(VSS)
black screen issue in NB_PWRGD A10 POWERGOOD VSSLT4(VSS) C18

PM
NB_LDT_STOP# C10 C20
LDTSTOPb VSSLT5(VSS)
AMD 47329 document ALLOW_LDTSTOP C12 ALLOW_LDTSTOP VSSLT6(VSS) E20
VSSLT7(VSS) C22
24 HT_REFCLKP C25 HT_REFCLKP
24 HT_REFCLKN C24 HT_REFCLKN

24 NB_OSC E11 REFCLK_P/OSCIN(OSCIN)


R39 4.7K NB_REFCLKN

CLOCKs
+1.1VRUN F11 REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) E9 LVDS_VDDEN 26
R40 4.7K F7
LVDS_BLON(PCE_RCALRP) LVDS_BLON 26
T2 G12 TP21
24 GFX_REFCLKP GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
24 GFX_REFCLKN T1 GFX_REFCLKN [Fuqun] BIOS control for BLON or PWM function
[Fuqun] NC or not? TP19 GPP_REFCLKP U1
TP71 GPP_REFCLKN GPP_REFCLKP
U2 GPP_REFCLKN

24 NBLINK_RCLKP V4 GPPSB_REFCLKP(SB_REFCLKP)
24 NBLINK_RCLKN V3 GPPSB_REFCLKN(SB_REFCLKN)

26 LCD_I2C_CLK B9 I2C_CLK
26 LCD_I2C_DATA A9
A8
I2C_DATA MIS. TMDS_HPD(NC) D9
D10
HDMI_HPD 27
27 NB_HDMI_CLK DDC_CLK0/AUX0P(NC) HPD(NC)
27 NB_HDMI_DATA B8 DDC_DATA0/AUX0N(NC)
[Fuqun] Remove pull-low register in 1.0 B7 DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5) D12 SUS_STAT# 18,20
STRP_DATA: A7 DDC_DATA1/AUX1N(NC)
1. Strap function THERMALDIODE_P AE8
B B10 AD8 B
2. Control NB_CORE power 18 STRP_DATA STRP_DATA THERMALDIODE_N
1-0.95V;0-1.1V TP20 G11 D13 TEST_EN
RSVD TESTMODE
R155 150R RS880_AUX_CAL C8 R41
AUX_CAL(NC) 1.8K
RS880M A11 HF MVD

[Fuqun] SUS_STAT#-->Not need connect to SB if Side-Port memory not implemented

RS880M DEBUG PIN MAPPING


DEBUG_OUT0 LVDS_DIGON
DEBUG_OUT1 LVDS_ENA_BL
DEBUG_OUT2 LVDS_BLON
DEBUG_OUT3 TMDS_HPD
DEBUG_OUT4 AUX1N
DEBUG_OUT5 AUX1P
DEBUG_OUT6 HPD
A A
DEBUG_OUT7 AUX_CAL

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom 1.0
RS880M-I/F
Date: Monday, June 21, 2010 Sheet 16 of 52
5 4 3 2 1
5 4 3 2 1

AE14
RS880M POWER TABLE

AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U21F PIN NAME RS880M PIN NAME RS880M

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
RS880M A11 HF MVD
VDDHT +1.1V IOPLLVDD +1.1V

VDDHTRX +1.1V AVDD +3.3V

VDDHTTX +1.2V AVDDDI +1.8V

PART 6/6
D D
GROUND VDDA18PCIE +1.8V AVDDQ +1.8V

VDDG18 +1.8V PLLVDD +1.1V

VDD18_MEM +1.8V PLLVDD18 +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VDDPCIE +1.1V VDDA18PCIEPLL +1.8V

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDC +1.1V VDDA18HTPLL +1.8V

VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDDG33 +3.3V VDDLT18 +1.8V

IOPLLVDD18 +1.8V VDDLT33 NC

[CheckList] VDDHT can share with VDDC

CP14 X_NC_93519
1 2 [CheckList] VDDPCIE can share with VDDC
+1.1VRUN CP15 X_NC_93519 U21E VDD_PCIE CP12 X_NC_93519 +1.1VRUN
600mA 2.5A
1 2 VDDHT J17 A6 VDD_PCIE 1 2
C VDDHT_1 VDDPCIE_1 C
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6
CP11 X_NC_93519
L16 VDDHT_3 VDDPCIE_3 C6
[CheckList] VDDHTRX can share with VDDC C134 C121 C120 C122 M16 D6 C87 C86 C84 C88 C81 1 2
4.7uF 0.1uF 0.1uF 0.1uF VDDHT_4 VDDPCIE_4 0.1uF 0.1uF 1uF 1uF 4.7uF
P16 VDDHT_5 VDDPCIE_5 E6
+1.1VRUN R16 F6
VDDHT_6 VDDPCIE_6
T16 VDDHT_7 VDDPCIE_7 G7
CP17 X_NC_93519 700mA H8
VDDHTRX VDDPCIE_8
1 2 H18 VDDHTRX_1 VDDPCIE_9 J9
G19 VDDHTRX_2 VDDPCIE_10 K9
CP16 X_NC_93519 F20 M9
C136 C129 C138 C130 VDDHTRX_3 VDDPCIE_11
1 2 E21 VDDHTRX_4 VDDPCIE_12 L9
10u6.3V 0.1uF 0.1uF 0.1uF D22 P9
VDDHTRX_5 VDDPCIE_13
B23 VDDHTRX_6 VDDPCIE_14 R9
A23 VDDHTRX_7 VDDPCIE_15 T9
+VLDT 400mA V9
1.2V / 1.1V VDDHTTX VDDPCIE_16
AE25 VDDHTTX_1 VDDPCIE_17 U9
[Fuqun] 1.2V or 1.1V AD24 VCC_NB [CheckList] 0.95V~1.1V 10A
C137 C131 C127 C128 C124 VDDHTTX_2
AC23 VDDHTTX_3 VDDC_1 K12 10u*2/0.1u*7
[Fuqun] Share with 1.1V 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF AB22 J14
VDDHTTX_4 VDDC_2
AA21 VDDHTTX_5 VDDC_3 U16
Y20 J11 C107 C108 C96 C101 C109 C98 C97 C119 C106
VDDHTTX_6 VDDC_4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10u6.3V 10u6.3V
W19 VDDHTTX_7 VDDC_5 K15
V18 M12

POWER
VDDHTTX_8 VDDC_6
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 VDDHTTX_12 VDDC_10 M15
M17 VDDHTTX_13 VDDC_11 N12
+1.8VRUN 700mA N14
B9 300R_1A VDDA18PCIE VDDC_12
J10 VDDA18PCIE_1 VDDC_13 P11
B P10 P13 B
C365 C92 C94 C89 C95 C99 VDDA18PCIE_2 VDDC_14
K10 VDDA18PCIE_3 VDDC_15 P14
4.7uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF M10 R12
VDDA18PCIE_4 VDDC_16
L10 VDDA18PCIE_5 VDDC_17 R15
W9 VDDA18PCIE_6 VDDC_18 T11
H9 VDDA18PCIE_7 VDDC_19 T15
T10 VDDA18PCIE_8 VDDC_20 U12
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11
AE9 VDDA18PCIE_14 VDD_MEM3(NC) Y11 [Fuqun] For Side-Port memory
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
+1.8VRUN 10mA AB10
VDD_MEM5(NC)
F9 VDD18_1 VDD_MEM6(NC) AC10
G9 +3.3VRUN
C371 VDD18_2
AE11 VDD18_MEM1(NC) VDD33_1(NC) H11 60mA
1uF AD11 H12
VDD18_MEM2(NC) VDD33_2(NC) C100 C91
RS880M A11 HF MVD 0.1uF 0.1uF

[Fuqun] For Side-Port memory

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom 1.0
RS880M-POWER
Date: Monday, June 21, 2010 Sheet 17 of 52
5 4 3 2 1
5 4 3 2 1

+3.3VRUN
U21D
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 AA20 R160
MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) X_2K
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17 STRP_DATA 16
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
D AD13 AC20 R161 D
MEM_A8(NC) MEM_DQ8/DVO_D3(NC)

SBD_MEM/DVO_I/F
AD15 AD19 X_2K
MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16
AE17
MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21 NOTE: Providing access to STRAP_DATA
MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17 and I2C_CLK pins is MANDATORY.
MEM_DQS0N/DVO_IDCKN(NC) W18
W12 MEM_RASb(NC) MEM_DQS1P(NC) AD20 [Fuqun] STRP_DATA pull down in Ref-schematic
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_WEb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19 [Fuqun] Remove Bead and Cap follow CheckList
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23 15mA +1.8VRUN
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 26mA +1.1VRUN
W14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC) SPM_VREF
AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18 STRAP_DEBUG_BUS_GPIO_ENABLEb
RS880M A11 HF MVD R188
X_0R/4
R173 3K
16,26 NB_VSYNC# +3.3VRUN Enables the Test Debug Bus using GPIO.

C
RS880M C
1 Disable
0 Enable

DFT_GPIO1: LOAD_EEPROM_STRAPS
Selects Loading of STRAPS from EPROM
[Fuqun] NC D7 in 1.0
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
16,20 SUS_STAT# A C A_RST# 16,19,24,25 0 : I2C Master can load strap values from EEPROM if connected, or use
D7 X_BAS40WS
default values if not connected
R142 X_3K

[Fuqun] SUS_STAT# pull up in SB side

B B
RS880M: Enables Side port memory
R181 3K +3.3VRUN RS880M:HSYNC#
16,26 NB_HSYNC#

Selects if Memory SIDE PORT is available or not


1 = Memory Side port Not available
0 = Memory Side port available
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom 1.0
RS880M-STRAPS
Date: Monday, June 21, 2010 Sheet 18 of 52
5 4 3 2 1
5 4 3 2 1

PLACE THESE PCIE AC


COUPLING CAPS CLOSE TO U600
U16A

PCIE_RST#_SB P1
SB800 Part 1 of 5
W2
25 PCIE_RST#_SB PCIE_RST# PCICLK0
16,18,24,25 A_RST# R112 33R A_RST#_R L1 W1

PCI CLKS
A_RST# PCICLK1/GPO36 PCI_CLK1 23
PCICLK2/GPO37 W3 PCI_CLK2 23
C305 C313 100nF_6.3V A_RX0P_C AD26 W4
15 PCIE_SB_NB_RX0P A_TX0P PCICLK3/GPO38 PCI_CLK3 23
X_150PF C312 100nF_6.3V A_RX0N_C AD27 Y1
15 PCIE_SB_NB_RX0N A_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 23
C315 100nF_6.3V A_RX1P_C AC28
15 PCIE_SB_NB_RX1P A_TX1P
C314 100nF_6.3V A_RX1N_C AC29 V2 TP67
D 15 PCIE_SB_NB_RX1N A_TX1N PCIRST# D
C317 100nF_6.3V A_RX2P_C AB29
15 PCIE_SB_NB_RX2P A_TX2P
C316 100nF_6.3V A_RX2N_C AB28
15 PCIE_SB_NB_RX2N A_TX2N
C319 100nF_6.3V A_RX3P_C AB26 AA1
15 PCIE_SB_NB_RX3P A_TX3P AD0/GPIO0
C318 100nF_6.3V A_RX3N_C AB27 AA4
15 PCIE_SB_NB_RX3N A_TX3N AD1/GPIO1
AD2/GPIO2 AA3 PEX_STD_SW#: Low - Standard(desktop) Swing Level
15 PCIE_NB_SB_TX0P AE24 A_RX0P AD3/GPIO3 AB1 Input(3T) - Low Swing Level Mode (Default)
15 PCIE_NB_SB_TX0N AE23 A_RX0N AD4/GPIO4 AA5

PCI EXPRESS INTERFACES


15 PCIE_NB_SB_TX1P AD25 A_RX1P AD5/GPIO5 AB2
15 PCIE_NB_SB_TX1N AD24 A_RX1N AD6/GPIO6 AB6
15 PCIE_NB_SB_TX2P AC24 A_RX2P AD7/GPIO7 AB5
15 PCIE_NB_SB_TX2N AC25 A_RX2N AD8/GPIO8 AA6
15 PCIE_NB_SB_TX3P AB25 A_RX3P AD9/GPIO9 AC2
15 PCIE_NB_SB_TX3N AB24 A_RX3N AD10/GPIO10 AC3
AD11/GPIO11 AC4
R131 590R 1% AD29 AC1
R130 2.0K PCIE_CALRP AD12/GPIO12
PCIE_VDDR 1% AD28 PCIE_CALRN AD13/GPIO13 AD1
AD14/GPIO14 AD2
AA28 GPP_TX0P AD15/GPIO15 AC6
AA29 GPP_TX0N AD16/GPIO16 AE2
Y29 GPP_TX1P AD17/GPIO17 AE1
Y28 GPP_TX1N AD18/GPIO18 AF8
Y26 GPP_TX2P AD19/GPIO19 AE3
Y27 GPP_TX2N AD20/GPIO20 AF1
W28 GPP_TX3P AD21/GPIO21 AG1
W29 GPP_TX3N AD22/GPIO22 AF2
AD23/GPIO23 AE9 PCI_AD23 23
AA22 GPP_RX0P AD24/GPIO24 AD9 PCI_AD24 23
Y21 GPP_RX0N AD25/GPIO25 AC11 PCI_AD25 23
AA25 GPP_RX1P AD26/GPIO26 AF6 PCI_AD26 23
AA24 GPP_RX1N AD27/GPIO27 AF4 PCI_AD27 23
W23 GPP_RX2P AD28/GPIO28 AF3 PCI_AD28 23
C V24 GPP_RX2N AD29/GPIO29 AH2 PCI_AD29 23 C
W24 GPP_RX3P AD30/GPIO30 AG2
W25 GPP_RX3N AD31/GPIO31 AH3

PCI INTERFACE
CBE0# AA8
CBE1# AD5
CBE2# AD8
CBE3# AA10
FRAME# AE8
DEVSEL# AB9
24 SBSRC_CLKP M23 PCIE_RCLKP/NB_LNK_CLKP IRDY# AJ3
24 SBSRC_CLKN P23 PCIE_RCLKN/NB_LNK_CLKN TRDY# AE7
NOTE: SB8XX ONLY SUPPORTS 2 GPP PAR AC5
U29 AF5
PORT 2 AND 3 IS NOT SUPPORTED. U28
NB_DISP_CLKP STOP#
AE6
NB_DISP_CLKN PERR#
SERR# AE4
T26 AE11 TP10
NB_HT_CLKP REQ0#
T27 NB_HT_CLKN REQ1#/GPIO40 AH5
REQ2#/CLK_REQ8#/GPIO41 AH4
V21 CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 AC12 CLKREQ5#_GPIO42 23
T21 CPU_HT_CLKN GNT0# AD12
AJ5 +3.3VALW
GNT1#/GPO44
V23 SLT_GFX_CLKP GNT2#/GPO45 AH6
T23 AB12 CLKREQ7#_GPIO46 23 RTCVCC
must share Pad with the serial resistor close to U800

X
SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 D6
CLKRUN# AB11 PCI_CLKRUN# 25
L29 GPP_CLK0P LOCK# AD7
L28 GPP_CLK0N Z
AJ6 S-BAT54C_SOT23
INTE#/GPIO32
NOTE: The 0R serial resistor on SB CLK pair

N29 GPP_CLK1P INTF#/GPIO33 AG6


N28 AG4

Y
GPP_CLK1N INTG#/GPIO34
INTH#/GPIO35 AJ4
M29 GPP_CLK2P
M28 R128
GPP_CLK2N
B CLOCK GENERATOR 510R B
T25 GPP_CLK3P
V25 H24 R29 22R LPC_CLK0
GPP_CLK3N LPCCLK0 LPC_CLK0 23,25

RTCVDD
LPCCLK1 H25 LPC_CLK1 23,25
L24 J27 LPC_CLK1
GPP_CLK4P LAD0 LAD0 25

6
L23 J26 JRTC1
GPP_CLK4N LAD1 LAD1 25
LPC LAD2 H29 LAD2 25
P25 H28 EC96 EC22 2
GPP_CLK5P LAD3 LAD3 25
M25 G28 X_10p25N4 X_10p25N4 1
GPP_CLK5N LFRAME# LPC_FRAME# 25
LDRQ0# J25 LDRQ#0 25
P29 GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 AA18 EMI
P28 AB19 BH1X2S-1.25PITCH
SERIRQ 25

5
GPP_CLK6N SERIRQ/GPIO48
N26 GPP_CLK7P
N27 GPP_CLK7N
ALLOW_LDTSTP/DMA_ACTIVE# G21 ALLOW_LDTSTOP 16
T29 GPP_CLK8P PROCHOT# H21 CPU_PROCHOT# 9
T28 K19
CPU

GPP_CLK8N LDT_PG CPU_PWRGD 9


LDT_STP# G22 CPU_LDT_STOP# 9,16
LDT_RST# J24 CPU_LDT_RST# 9 PLACE THESE COMPONENTS CLOSE TO U600, AND
L25 14M_25M_48M_OSC USE GROUND GUARD FOR 32K_X1 AND 32K_X2
C309 22pF C1 32K_X1
32K_X1
1

Y4 25M_X1 L26 C2 32K_X2 Y3 2 1 32.768KHZ12.5P


25.0000_MHz R129 25M_X1 32K_X2
RTC

1M D2 RTC_CLK TP63
RTCCLK TP68 20M R123
B2 [Fqun] Y3 change P/N in 1.0
2

C310 22pF 25M_X2 INTRUDER_ALERT# VBAT_IN


L27 25M_X2 VDDBT_RTC_G B1 RTCVCC
C311 C307 C306
SB_GPP DEVICE CLKREQ# SB800 A11 1uF 22pF 22pF
A A
GFX_CLK MXM3.0 CLK_REQG#
0 EXPRESS 0
1 PE0 1
2 PE2 2 POWER EXPRESS SUPPORT
3 LAN 3
4 PE1 4 PE_GPIO0 MXM RESET H: Enable MICRO-STAR INT'L CO.,LTD
5 X4DT 5 PE_GPIO1 MXM POWER ENABLE H: Enable
6 PE3 6 MSI
MS-168x
PE_GPIO2 MODE SWITCH(BY NB) H:MXM L:NB
7 USB3.0 7 Size Document Description Rev
8 1394 8 TMDS_HPD0 MXM HOT PLUG Custom 1.0
SB820-PCIE/PCI/CPU/LPC/CLK
Date: Monday, June 21, 2010 Sheet 19 of 52
5 4 3 2 1
5 4 3 2 1

U16D
[Fuqun] Connect to New Card in 1.0 30 PCIE_CLKREQ# J2 PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC A10 CLK_48M_USB 24
K1 RI#/GEVENT22#
D3 G19 R25 11.8K
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP 1%
25 SLP_S3# F1 SLP_S3#
25 SLP_S5# H1

ACPI / WAKE UP EVENTS


PWR_BTN# SLP_S5#
25 PM_PWRBT# F2

USB 1.1 USB MISC


PWR_BTN#
25 SB_PWRGD H5
G6
PWR_GOOD SB800 J10
16,18 SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186
TP5 SB_TEST0 B3 Part 4 of 5 H11
TP6 SB_TEST1 TEST0 USB_FSD1N
D
[CheckList] TEST0~2 has internal 10K PD. C4 TEST1/TMS D
TP12 SB_TEST2 F6 H9
TEST2 USB_FSD0P/GPIO185
25 EC_A20M# AD21 GA20IN/GEVENT0# USB_FSD0N J8
25 EC_KB_RST# AE21 KBRST#/GEVENT1#
25 EC_SCI# K2 LPC_PME#/GEVENT3# USB_HSD13P B12
25 EC_SMI# J29 LPC_SMI#/GEVENT23# USB_HSD13N A12
H2 GEVENT5#
J1 SYS_RESET#/GEVENT19# USB_HSD12P F11
30,34 PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD12N E11
F3 IR_RX1/GEVENT20#
[CheckList] THERMTRIP# has internal 10K PU. 9 CPU_THERMTRIP# J6 THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P E14
16 NB_PWRGD 0R R27 AC19 E12
NB_PWRGD USB_HSD11N

25 RSMRST# RSMRST# G1 J12


+3.3VRUN RSMRST# USB_HSD10P
USB_HSD10N J14
AD19 CLK_REQ4#/SATA_IS0#/GPIO64
R30 2.2K SCLK0 AA16 A13
CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P USB9P 36
AB21 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N B13 USB9N 36
R28 2.2K SDATA0 AC18 CLK_REQ0#/SATA_IS3#/GPIO60
AF20 SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P D13 USB8P 36
R16 4.7K SUS_STAT# AE19 C13
SATA_IS5#/FANIN3/GPIO59 USB_HSD8N USB8N 36
TP16 SPKR AF19 SPKR/GPIO66
AD22 G12

USB 2.0
11,24 SCLK0 SCL0/GPIO43 USB_HSD7P USB7P 36
11,24 SDATA0 AE22 SDA0/GPIO47 USB_HSD7N G14 USB7N 36
SCLK1 F5 SCL1/GPIO227
SDATA1 F4 SDA1/GPIO228 USB_HSD6P G16 USB8 Camera
AH21 CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N G18
AB18 CLK_REQ1#/FANOUT4/GPIO61
USB7 WLAN

GPIO
E1 D16
+3.3VSUS AJ21
IR_LED#/LLB#/GPIO184 USB_HSD5P
C16
USB5P 30
USB5N 30
USB6 BT
8P4R-2.2K/4 SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD5N
C 1 2 SCLK1
H4
D5
DDR3_RST#/GEVENT7#
B14
USB5 PCIE Mini Slot C
GBE_LED0/GPIO183 USB_HSD4P USB4P 28
3 4 SDATA1 D7 A14
GBE_LED1/GEVENT9# USB_HSD4N USB4N 28
5 6 G5 GBE_LED2/GEVENT10#
7 8 K3 GBE_STAT0/GEVENT11# USB_HSD3P E18 USB3P 36 USB4 New Card
24 SB_OSC AA20 E16
RN3
CLK_REQG#/GPIO65/OSCIN USB_HSD3N USB3N 36 USB3 Card Reader
USB_HSD2P J16 USB2P 28 USB2 USB PORT2
H3 BLINK/USB_OC7#/GEVENT18# USB_HSD2N J18 USB2N 28
D1 USB_OC6#/IR_TX1/GEVENT6# USB1 ESATA
[Fuqun] ? E4 B17

USB OC
9 SMBALERT# USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USB1P 29
R122 X_10K HDA_SDIN0 D4 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N A17 USB1N 29 USB0 USB PORT1
E8 USB_OC3#/AC_PRES/TDO/GEVENT15#
R110 X_10K HDA_BITCLK F7 A16
USB_OC2#/TCK/GEVENT14# USB_HSD0P USB0P 28
E7 USB_OC1#/TDI/GEVENT13# USB_HSD0N B16 USB0N 28
F8 USB_OC0#/TRST#/GEVENT12#
EC89 X_10p25N4 HDA_BITCLK
RN6 8P4R-33R0402
EMI 31 HDA_BITCLK 1 2 HDA_BITCLK_R M3 D25 SCLK2 TP18
HDA_SDOUT_R AZ_BITCLK SCL2/GPIO193 SDATA2 TP17
23,31 HDA_SDOUT 3 4 N1 AZ_SDOUT SDA2/GPIO194 F23
31 HDA_SYNC 5 6 31 HDA_SDIN0 L2 B26 CPU_SIC 9

HD AUDIO
AZ_SDIN0/GPIO167 SCL3_LV/GPIO195
7 8 M2 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 E26 CPU_SID 9
M1 AZ_SDIN2/GPIO169 EC_PWM0/EC_TIMER0/GPIO197 F25
M4 AZ_SDIN3/GPIO170 EC_PWM1/EC_TIMER1/GPIO198 E22
HDA_SYNC_R N2 F22 GPIO199 23 STRAP pin to define
R113 33R HDA_RST#_R AZ_SYNC EC_PWM2/EC_TIMER2/GPIO199
31 HDA_RST# P2 E21 GPIO200 23
AZ_RST# EC_PWM3/EC_TIMER3/GPIO200 use LPC or SPI ROM
+3.3VSUS G24
GBE_COL KSI_0/GPIO201
T1 GBE_COL KSI_1/GPIO202 G25
GBE_CRS T4 E28
B R15 10K GBE_MDIO GBE_CRS KSI_2/GPIO203 B
L6 GBE_MDCK KSI_3/GPIO204 E29
GBE_MDIO L5 D29
GBE_MDIO KSI_4/GPIO205
T9 GBE_RXCLK KSI_5/GPIO206 D28
U1 GBE_RXD3 KSI_6/GPIO207 C29
U3 GBE_RXD2 KSI_7/GPIO208 C28
RN2 8P4R-10KR0402 T2

GBE LAN
GBE_COL GBE_RXD1
1 2 U2 GBE_RXD0 KSO_0/GPIO209 B28

EMBEDDED CTRL
3 4 GBE_CRS T5 A27
GBE_RXERR GBE_RXERR GBE_RXCTL/RXDV KSO_1/GPIO210
5 6 V5 GBE_RXERR KSO_2/GPIO211 B27
7 8 GBE_INTR P5 D26
GBE_TXCLK KSO_3/GPIO212
M5 GBE_TXD3 KSO_4/GPIO213 A26
P9 GBE_TXD2 KSO_5/GPIO214 C26
T7 GBE_TXD1 KSO_6/GPIO215 A24
P7 GBE_TXD0 KSO_7/GPIO216 B25
M7 GBE_TXCTL/TXEN KSO_8/GPIO217 A25
P4 GBE_PHY_PD KSO_9/GPIO218 D24
[CheckList] Applicable to MII Interface only M9 GBE_PHY_RST# KSO_10/GPIO219 B24
GBE_INTR V7 C24
GBE_PHY_INTR KSO_11/GPIO220
KSO_12/GPIO221 B23
E23 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222 A23

EMBEDDED CTRL
E24 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223 D22
F21 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224 C22
G29 FC_RST#/GPO160 KSO_16/GPIO225 A22
KSO_17/GPIO226 B22
D27 PS2KB_DAT/GPIO189
F28 PS2KB_CLK/GPIO190
F29 PS2M_DAT/GPIO191
E27 PS2M_CLK/GPIO192

A SB800 A11 A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom SB820-GPIO/USB/AZ 1.0

Date: Monday, June 21, 2010 Sheet 20 of 52


5 4 3 2 1
5 4 3 2 1

SATA trace should use only 1via on the trace.


customers can use 2vias with GND via within 150mils of
signal via as long as they can ensure that their platform
meets SATA logo requirements. Return loss is expected
to get affected with 2 vias. AMD platforms are validated
with one via only
U16B

D D
C375 10nF SATA_TX0+ AH9
SB800 AH28
30 SATA_TX0+_C C376 10nF SATA_TX0- SATA_TX0P FC_CLK
30 SATA_TX0-_C AJ9 SATA_TX0N Part 2 of 5 FC_FBCLKOUT AG28
FC_FBCLKIN AF26
C377 10nF SATA_RX0- AJ8
30 SATA_RX0-_C SATA_RX0N
C378 10nF SATA_RX0+ AH8 AF28
30 SATA_RX0+_C SATA_RX0P FC_OE#/GPIOD145
FC_AVD#/GPIOD146 AG29
C1 10nF SATA_TX1+ AH10 AG26
28 SATA_TX1+_C C2 10nF SATA_TX1- SATA_TX1P FC_WE#/GPIOD148
28 SATA_TX1-_C AJ10 SATA_TX1N FC_CE1#/GPIOD149 AF27
FC_CE2#/GPIOD150 AE29
C3 10nF SATA_RX1- AG10 AF29
28 SATA_RX1-_C SATA_RX1N FC_INT1/GPIOD144
C4 10nF SATA_RX1+ AF10 AH27
28 SATA_RX1+_C SATA_RX1P FC_INT2/GPIOD147
C387 10nF SATA_TX2+ AG12 AJ27
30 SATA_TX2+_C C386 10nF SATA_TX2- SATA_TX2P FC_ADQ0/GPIOD128
30 SATA_TX2-_C AF12 SATA_TX2N FC_ADQ1/GPIOD129 AJ26
FC_ADQ2/GPIOD130 AH25
C385 10nF SATA_RX2- AJ12 AH24
30 SATA_RX2-_C SATA_RX2N FC_ADQ3/GPIOD131
C384 10nF SATA_RX2+ AH12 AG23
30 SATA_RX2+_C SATA_RX2P FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133 AH23
AH14 SATA_TX3P FC_ADQ6/GPIOD134 AJ22
AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21
FC_ADQ8/GPIOD136 AF21
AG14 SATA_RX3N FC_ADQ9/GPIOD137 AH22

FLASH
AF14 SATA_RX3P FC_ADQ10/GPIOD138 AJ23
FC_ADQ11/GPIOD139 AF23
AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24
SATA PORTS DISTRIBUTION: AF17 SATA_TX4N FC_ADQ13/GPIOD141 AJ25
AG25
0, - 2.5 INCH DISK DRIVER PLACE SATA_CAL AJ17
FC_ADQ14/GPIOD142
AH26
1, SATA ODD SATA_RX4N FC_ADQ15/GPIOD143

SERIAL ATA
AH17
C
2, - 2.5 INCH DISK DRIVER
RES VERY CLOSE SATA_RX4P C

3, eSATA TO BALL OF U600 AJ18


AH18
SATA_TX5P
W5
Connect C7 and D8, then go to GND directly.
SATA_TX5N FANOUT0/GPIO52
4 & 5, NOT USED FANOUT1/GPIO53 W6
AH19 SATA_RX5N FANOUT2/GPIO54 Y9
AJ19 SATA_RX5P
FANIN0/GPIO56 W7
SATA_CALRP: AVDD_SATA V9
R22 1% 1.0K SATA_CALP AB14 FANIN1/GPIO57
SB8xx A11: 800-? 1% resistor to GND. SATA_CALRP FANIN2/GPIO58 W8
R24 1% 931R SATA_CALN AA14
SB8xx A12: 1K-? 1% resistor to GND. SATA_CALRN
TEMPIN0/GPIO171 B6
TEMPIN1/GPIO172 A6
33 LED_HDD# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
TEMPIN3/TALERT#/GPIO174 B5
C7 TEMP_COMM
TEMP_COMM
To meet SB800 SCL1.02: A3

HW MONITOR
X_22pF C37 SATA_X1 VIN0/GPIO175
AD16 B4
DNI SATA XTAL circuit's parts SATA_X1 VIN1/GPIO176
A4
VIN2/GPIO177
1

VIN3/GPIO178 C5 [Fuqun] HWM need pull-low follow MS-124X?


Y2 R23 A7
X_25.0000_MHz X_1M VIN4/GPIO179
VIN5/GPIO180 B7
B8
2

X_22pF C34 SATA_X2 VIN6/GBE_STAT3/GPIO181


[Fuqun] NC in 1.0 AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8

NOTE: ROUTE TEMP_COMM


TP7 SPI_DATAIN
AS A 10MIL TRACE
J5 SPI_DI/GPIO164 NC1 G27
TP65 SPI_DATAOUT E2 Y2
SPI ROM

B TP8 SPI_CLK SPI_DO/GPIO163 NC2 B


K4 SPI_CLK/GPIO162
TP13 SPI_CS# K9
TP64 SB700_ROM_RST# SPI_CS1#/GPIO165
G2 ROM_RST#/GPIO161
Jameslee: Don't share BIOS and EC rom.
SB800 A11

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom SB820-SATA/IDE/SPI/HWM 1.0

Date: Monday, June 21, 2010 Sheet 21 of 52


5 4 3 2 1
5 4 3 2 1

[Fuqun] Change bead P/N in 1.0


PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
1*10U/2*1U/2*0.1u
1*22U/3*0.1u
+1.1VRUN
+3.3VRUN +3.3V_SB_R U16C VCC_SB_R
CP2 131mA Part 3 of 5 510mA CP4
1 2 AH1
SB800 N13 1 2
D VDDIO_33_PCIGP_1 VDDCR_11_1 U16E D
V6 VDDIO_33_PCIGP_2 VDDCR_11_2 R15
X_COPPER Y19 N17 X_COPPER

CORE S0
CP1 X_NC_93519 VDDIO_33_PCIGP_3 VDDCR_11_3 C40 C38 C33 C28 C29 CP3
1 2 C21 C18 C26 C47
AE5
AC21
VDDIO_33_PCIGP_4 VDDCR_11_4 U13
U17 1uF 1uF 10uF 100nF 100nF 1 2 Y14
SB800 AJ2
22uF 100nF 100nF 100nF VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_1 VSS_1
AA2 V12 Y16 A28

PCI/GPIO I/O
VDDIO_33_PCIGP_6 VDDCR_11_6 X_COPPER VSSIO_SATA_2 VSS_2
AB4 VDDIO_33_PCIGP_7 VDDCR_11_7 V18 AB16 VSSIO_SATA_3 VSS_3 A2
AC8 VDDIO_33_PCIGP_8 VDDCR_11_8 W12 AC14 VSSIO_SATA_4 VSS_4 E5
AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W18 AE12 VSSIO_SATA_5 VSS_5 D23
AA9 +1.1V_CKVDD +1.1VRUN AE14 E25
VDDIO_33_PCIGP_10 VSSIO_SATA_6 VSS_6
AF7 VDDIO_33_PCIGP_11 TBDmA AF9 VSSIO_SATA_7 VSS_7 E6
AA19 K28 60R_800mA B7 AF11 F24
VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 VSSIO_SATA_8 VSS_8
VDDAN_11_CLK_2 K29 AF13 VSSIO_SATA_9 VSS_9 N15
VDDAN_11_CLK_3 J28 AF16 VSSIO_SATA_10 VSS_10 R13
K26 C68 C64 C60 C66 C65 AG8 R17

CLKGEN I/O
VDDAN_11_CLK_4 X_1uF X_100nF 100nF 1uF 22uF VSSIO_SATA_11 VSS_11
71mA VDDAN_11_CLK_5 J21 AH7 VSSIO_SATA_12 VSS_12 T10
VDDIO_18_FC AF22 J20 AH11 P10

FLASH I/O
VDDIO_18_FC_1 VDDAN_11_CLK_6 VSSIO_SATA_13 VSS_13
[Fuqun] GPIOD not used-->Tied to GND AE25 VDDIO_18_FC_2 VDDAN_11_CLK_7 K21 AH13 VSSIO_SATA_14 VSS_14 V11
R26 AF24 VDDIO_18_FC_3 VDDAN_11_CLK_8 J22 [CheckList] Bead-- 42 @ 100 MHz/4A/ 0.01 AH16 VSSIO_SATA_15 VSS_15 U15
0R AC22 VDDIO_18_FC_4 AJ7 VSSIO_SATA_16 VSS_16 M18
AJ11 VSSIO_SATA_17 VSS_17 V19
V1 SB_VDDRF_GBE_DUAL AJ13 M11
+3.3VRUN VDDRF_GBE_S VSSIO_SATA_18 VSS_18
AJ16 L12
POWER VDDIO_33_GBE_S M10 TBDmA VDDIO_33_GBE_S VSSIO_SATA_19 VSS_19
VSS_20 L18
43mA A9 VSSIO_USB_1 VSS_21 J7
B5 300R_300mA VDDPL_3.3V_PCIE AE28 GbE Controller Not Enabled: Connected to GND B10 P3

GBE LAN
VDDPL_33_PCIE VSSIO_USB_2 VSS_22
K11 VSSIO_USB_3 VSS_23 V4
C61 B9 AD6
TBDmA

PCI EXPRESS
2.2uF VDDCR_11_GBE_S VSSIO_USB_4 VSS_24
U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 D10 VSSIO_USB_5 VSS_25 AD4
+1.1VRUN PCIE_VDDR V22 L9 D12 AB7
VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 VSSIO_USB_6 VSS_26
C
600mA V26 VDDAN_11_PCIE_3 D14 VSSIO_USB_7 VSS_27 AC9
C
B6 60R_800mA VDDAN_11_PCIE V27 D17 V8
VDDAN_11_PCIE_4 TBDmA VDDIO_GBE_S VSSIO_USB_8 VSS_28
V28 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 M6 E9 VSSIO_USB_9 VSS_29 W9
[Fuqun] No 42ohm bead, Use 60ohm V29 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 P8 F9 VSSIO_USB_10 VSS_30 W10
C63 C67 C57 C54
22uF 1uF 100nF 100nF
W22
W26
VDDAN_11_PCIE_7 Updated on Rev2.0 F12
F14
VSSIO_USB_11 VSS_31 AJ28
B29
VDDAN_11_PCIE_8 VSSIO_USB_12 VSS_32
F16 VSSIO_USB_13 VSS_33 U4
+3.3VRUN C9 Y18
VSSIO_USB_14 VSS_34
93mA G11 VSSIO_USB_15 VSS_35 Y10
B2 300R_300mA VDDPL_3.3V_SATA +3.3VALW_R CP5 +3.3VSUS

GROUND
AD14 VDDPL_33_SATA 32mA F18 VSSIO_USB_16 VSS_36 Y12
VDDIO_33_S_1 A21 1 2 D9 VSSIO_USB_17 VSS_37 Y11
AJ20 VDDAN_11_SATA_1 VDDIO_33_S_2 D21 H12 VSSIO_USB_18 VSS_38 AA11
[CheckList] Bead-- 42 @ 100 MHz/4A/ 0.01 C32 AF18 B21 X_COPPER H14 AA12

SERIAL ATA
2.2uF VDDAN_11_SATA_4 VDDIO_33_S_3 C55 C59 VSSIO_USB_19 VSS_39
AH20 K10 H16 G4

3.3V_S5 I/O
+1.1VRUN VDDAN_11_SATA_2 VDDIO_33_S_4 2.2uF 2.2uF VSSIO_USB_20 VSS_40
AG19 VDDAN_11_SATA_3 VDDIO_33_S_5 L10 H18 VSSIO_USB_21 VSS_41 J4
AVDD_SATA AE18 J9 J11 G8
VDDAN_11_SATA_5 VDDIO_33_S_6 VSSIO_USB_22 VSS_42
567mA AD18 VDDAN_11_SATA_6 VDDIO_33_S_7 T6 J19 VSSIO_USB_23 VSS_43 G9
B3 60R_800mA AE16 T8 K12 M12
VDDAN_11_SATA_7 VDDIO_33_S_8 VSSIO_USB_24 VSS_44
K14 VSSIO_USB_25 VSS_45 AF25
K16 VSSIO_USB_26 VSS_46 H7
C41 C35 C44 C46 C51 CP6 +1.1VSUS
113mA K18 AH29

CORE S5
22uF 1uF 1uF 100nF 100nF VDDCR_1.1V VSSIO_USB_27 VSS_47
VDDCR_11_S_1 F26 1 2 H19 VSSIO_USB_28 VSS_48 V10
A18 VDDAN_33_USB_S_1 VDDCR_11_S_2 G26 VSS_49 P6
A19 X_COPPER N4
A20
VDDAN_33_USB_S_2
M8 TBDmA C62 C58 Y4
VSS_50
L4
VDDAN_33_USB_S_3 VDDIO_AZ_S VDDIO_AZ EFUSE VSS_51
B18 1uF 1uF L8
+3.3VSUS AVDD_USB VDDAN_33_USB_S_4 VDDCR_1.1V_USB VSS_52
B19 VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 A11 D8 VSSAN_HWM
B20 B11
USB I/O
658mA VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 +1.1VSUS
C18 VDDAN_33_USB_S_7 197mA M19 VSSXL VSSPL_SYS M20
B4 300R_1A C20 VDDAN_33_USB_S_8 47mA
B
D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 VDDPL_3.3V [CheckList] No bead? B
C43 C42 C53 C49 D19 P21 H23
+1.1VSUS 1uF 1uF 10uF_6.3V 10uF_6.3V VDDAN_33_USB_S_10 62mA C22 C25 C27 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14
D20 VDDAN_33_USB_S_11 VDDPL_11_SYS_S L22 VDDPL_1.1V P20 VSSIO_PCIECLK_2 VSSIO_PCIECLK_15 H26
E19 10uF_6.3V 100nF 100nF M22 AA21
PLL

VDDAN_33_USB_S_12 17mA VSSIO_PCIECLK_3 VSSIO_PCIECLK_16


VDDPL_33_USB_S F19 VDDPL_3.3V_USB M24 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 AA23
+3.3VSUS
TBDmA 5mA M26 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AB23
B1 300R_300mA VDDAN_1.1V_USB C11 D6 P22 AD23
VDDAN_11_USB_S_1 VDDAN_33_HWM_S VDDAN_3.3V_HWM VSSIO_PCIECLK_6 VSSIO_PCIECLK_19
D11 VDDAN_11_USB_S_2 P24 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AA26
L20 VDDXL_3.3V L1 300R_300mA P26 AC26
C31 C30 VDDXL_33_S VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
T20 VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 Y20
100nF 2.2uF T22 W21
SB800 A11 C39 C36 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23
T24 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24 W20
X_100nF 2.2uF_6.3V V20 AE26
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 L21
VSSIO_PCIECLK_27 K20
USB S3-S5 Wake Implemented: Tied to +3.3V_S5. USB S3-S5 Wake Implemented: Tied to +1.1V_S5.
USB S3-only Wake Implemented: Tied to +3.3V_S3. USB S3-only Wake Implemented: Tied to +1.1V_S3. Part 5 of 5
USB S3-S5 Wake Not Implemented: Tied to +3.3V_S3. USB S3-S5 Wake Not Implemented: Tied to +1.1V_S3. SB800 A11

Wake on LAN supported: Tied to a +3.3V_S5 rail

To meet SB800 SCL1.02:


Separate ferrite bead is not
+3.3VSUS required for VDDPL_33_USB_S, HWM not Implemented and not used as GPIOs: Bead and Decoupling caps not used.
Del B603/600ohm bead.

VDDIO_AZ
A VDDPL_3.3V +3.3VRUN VDDPL_1.1V +1.1VSUS VDDPL_3.3V_USB +3.3VSUS VDDAN_3.3V_HWM A
+3.3VSUS
R21 X_NC L2 300R_300mA L3 300R_300mA

[CheckList] 1.5VSUS or 3.3VSUS


C23 C48 C56 C52 C19 C24 C50
2.2uF 2.2uF 2.2uF_6.3V X_100nF 100nF 2.2uF_6.3V X_100nF
MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom SB820-POWER 1.0

Date: Monday, June 21, 2010 Sheet 22 of 52


5 4 3 2 1
5 4 3 2 1

[Datasheet] This +3.3VSUS


strap is not used for
[DG] Pull low external CLK Gen mode
+3.3VSUS +3.3VRUN +3.3VSUS
+3.3VRUN
OVERLAP COMMON PADS WHERE R126 [Datasheet] Have internal pull up 10Kohm
POSSIBLE FOR DUAL-OP RESISTORS. R109
X_10K
R120
X_10K R117
10K

X_10K R31
X_10K

D 20,31 HDA_SDOUT D
19 PCI_CLK1
19 PCI_CLK2
19 PCI_CLK3
19 PCI_CLK4
19,25 LPC_CLK0
19,25 LPC_CLK1
20 GPIO200
20 GPIO199

R108 R119
[Fuqun] SB800 10K X_10K R121 R118 R116 R6 R127 R125
doesn't support 10K 10K X_10K 10K 10K 2.2K
the lower power
mode

AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199


SB PCIE EEPROM STRAPS
REQUIRED
STRAPS 19 CLKREQ5#_GPIO42
TP15
TP14
PULL LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN 19 CLKREQ7#_GPIO46
HIGH MODE PCIE Gen2 Timer DEBUG CLOCK MODE ENABLED ENABLED H,H = Reserved
DEFAULT Enabled STRAP DEFAULT DEFAULT
H,L = SPI ROM

C C
PULL PERFORMANCE FORCE Watchdog IGNORE FUSION EC CLKGEN L,H = LPC ROM (Default)
LOW MODE PCIE Gen1 Timer DEBUG CLOCK MODE DISABLED DISABLED L,L = FWH ROM
Disabled STRAP
DEFAULT DEFAULT DEFAULT DEFAULT

PCI_CLK1(SMSC_CLK)-->SB820M: Only provision for pull-down is required, not installed by default--checklist


[Fuqun] GPIO199 NC in checklist
[Fuqun] PCI_CLK4 high or low?

SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

+3.3VRUN +3.3VRUN +3.3VRUN


DEBUG STRAPS
B B
R114 R115 R20 [Fuqun] NC R114,R115 in 1.0
X_10K X_10K X_10K
A11 A11
19 PCI_AD29
19 PCI_AD28
19 PCI_AD27 TP69
19 PCI_AD26 TP70
19 PCI_AD25
19 PCI_AD24 TP11
19 PCI_AD23 TP9

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

PULL USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
HIGH PLL AUTORUN PLL PCIE STRAPS MEM BOOT

DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI


LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A A

PCI23/24/26/27 have internal pull high 15kohm,But PCI25?


Why PCI28/29 pull high?
MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom SB820-STRAPS 1.0

Date: Monday, June 21, 2010 Sheet 23 of 52


5 4 3 2 1
5 4 3 2 1

1- PLACE ALL SERIAL TERMINATION


RESISTORS CLOSE TO U11
2- PUT DECOUPLING CAPS CLOSE TO U11
POWER PIN

+3.3VRUN

CP10
D 1 2 CLK_VDDA D

X_COPPER U19 R170 X_261R1%0402NC


C76 C341 C346 C350 C354 C90 C323 C73
CP24 22U6.3X 0.1U10X X_0.1uFX_0.1uF 0.1U10X 0.1U10X 0.1U10X 0.1U10X 44 50 CPU_CLKP_R R172 X_NC
VDDA CPUKG0T_LPRS CPU_CLKP 9
1 2 43 49 CPU_CLKN_R R166 X_NC
GNDA CPUKG0C_LPRS CPU_CLKN 9
CPUKG1T_LPRS 46
X_COPPER VDDREF 60 45
VDDREF CPUKG1C_LPRS
61 GNDREF
+3.3VRUN
CP21 38 GFX_REFCLKP_R R149 X_NC
ATIG0T_LPRS GFX_REFCLKP 16
1 2 VDD48 64 37 GFX_REFCLKN_R R147 X_NC
VDD48 ATIG0C_LPRS GFX_REFCLKN 16
34 VDDATIG ATIG1T_LPRS 36
X_COPPER 48 35
C370 C368 VDDCPU ATIG1C_LPRS
56 VDDHTT ATIG2T_LPRS 32
X_22U6.3X 0.1U10X 25 31
VDDSB_SRC ATIG2C_LPRS
11 VDDSRC ATIG3T_LPRS 30
+3.3VRUN
39 VDDSATA ATIG3C_LPRS 29 [Fuqun] Can use SB_SRC or SRC in checklist
CLK_VDDA 16 VDDSRC
27 SBSRC_CLKP_R R134 X_NC
SB_SRC0T_LPRS SBSRC_CLKP 19
CP22 26 SBSRC_CLKN_R R135 X_NC
SB_SRC0C_LPRS SBSRC_CLKN 19
1 2 VDDREF 3 23 NBLINK_RCLKP_R R136 X_NC
GND48 SB_SRC1T_LPRS NBLINK_RCLKP 16
33 22 NBLINK_RCLKN_R R137 X_NC
GNDATIG SB_SRC1C_LPRS NBLINK_RCLKN 16
X_COPPER C364 28
0.1U10X0402 GNDATIG PCIE_WLAN_CLKP_R R138 X_NC
47 GNDCPU SRC0T_LPRS 21 PCIE_WLAN_CLKP 35
53 20 PCIE_WLAN_CLKN_R R139 X_NC
GNDHTT SRC0C_LPRS PCIE_WLAN_CLKN 35
42 GNDSATA SRC1T_LPRS 19
C367 33p_50N C0402 24 18
GNDSB_SRC SRC1C_LPRS PCIE_LAN_CLKP_R R143 X_NC
10 GNDSRC SRC2T_LPRS 15 PCIE_LAN_CLKP 34

2
17 14 PCIE_LAN_CLKN_R R144 X_NC
C GNDSRC SRC2C_LPRS PCIE_LAN_CLKN 34 C
Y6 13 PCIE_EXPCARD_CLKP_R R146 X_NC
SRC3T_LPRS PCIE_NEWCARD_CLKP 30
[Fuqun] C P/N? 14.318MHZ20P_S 12 PCIE_EXPCARD_CLKN_R R148 X_NC
SRC3C_LPRS PCIE_NEWCARD_CLKN 30
TXC7A 9

1
X1 SRC4T_LPRS
62 X1 SRC4C_LPRS 8
C366 33p_50N C0402 X2 63 7
X2 DOC_1/SRC5T_LPRS EC_FSBOC1 25
DOC_0/SRC5C_LPRS 6 EC_FSBOC0 25
CLK_VDDA R180 10KR 51 41
PD# SRC6T/SATAT_LPRS
PD#: SRC6C/SATAC_LPRS 40
0 = Power Down
1 = normal operation 55 HT_REFCLKP_R R177 X_NC
HTT0T_LPRS/66M HT_REFCLKP 16
54 HT_REFCLKN_R R176 X_NC
HTT0C_LPRS/66M HT_REFCLKN 16
R156 0R0402 4 [Fuqun] NC R162 in 1.0
11,20 SCLK0 SMBCLK
R154 0R0402 5 2 SEL_CPU1 R162 X_33R/4
11,20 SDATA0 SMBDAT 48MHz_0 CLK_48M_USB 20
1 SEL_DOC R169 33R/4
SEL_DOC/48MHz_1 CLK_48M_CARD 29
R159 X_0R0402
9,25 SMB_THRMCPU_CLK
R152 X_0R0402 59 SEL_HT66 EC104
9,25 SMB_THRMCPU_DATA REF0/SEL_HTT66
CLK_VDDA 52 58 SEL_SATA R174 X_33R/4 X_10P50N EC106
RESTORE# REF1/SEL_SATA SB_OSC 20
57 SEL_OC R182 C0402 X_10P50N

GND
REF2 NB_OSC 16
C0402
158R1%0402
R175 ICS (ICS9LPRS477CKLFT) R185 EC107

65
10KR QFP_64P_CON 90.9R1%0402 X_10P50N
I11-RS4771C-I02 C0402
C A RESTORE#
16,18,19,25 A_RST#
D8
X_BAS40WS RESTORE#:
DIODE_SOD323 0 = Restore Settings
1 = normal operation. OSC_14M_NB
B B
RS880 1.1V 158R/90.9R

+3.3VRUN +3.3VRUN +3.3VRUN

R171 R158 R183


10KR X_10KR X_10KR NB CLOCK INPUT TABLE
SEL_HT66 NB CLOCKS RS740 RX780 RS780
SEL_DOC SEL_OC
SEL_CPU1 HT_REFCLKP 100M DIFF
66M SE(SINGLE END) 100M DIFF
R179 HT_REFCLKN NC 100M DIFF 100M DIFF
R165 10KR R178
X_10KR 10KR REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
REFCLK_N NC NC vref

GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*

GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT

GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF


A A
1 DOC INPUT 1 66 MHz 3.3V single ended HTT clock 1 Higher overclocking ability
SEL_DOC/48MHz-1 * SEL_HTT66 SEL_OC * * RS780 can be used as clock buffer to output two PCIE referecence clocks
0 SRCCLK5 0 100 MHz differential HTT clock 0 limited overclocking ability By deault, chip will configured as input mode, BIOS can program it to output
* default mode.
1 SRCCLK7 1 100MHz differential spreading SRC clock
SEL_CPU1/48MHz-2 * SEL_SATA
0 CPUKG1 0 100 MHz spreading differential SATA clock MICRO-STAR INT'L CO.,LTD
* default

MSI
MS-168x
Size Document Description Rev
Custom CLK GEN 0A

Date: Tuesday, May 18, 2010 Sheet 24 of 50


5 4 3 2 1
5 4 3 2 1

U3 +3.3VALW

19 SERIRQ 3 SERIRQ VCC 9


19 LPC_FRAME# 4 LFARAME# VCC 22
19,23 LPC_CLK0 12 PCICLK VCC 33 EMI
+3.3VALW 38 96
19 PCI_CLKRUN# CLKRUN#/GPIO1D VCC
10 LPC I/F 111 C13 C20 C17 C9 C8 EC92 EC17
19 LAD0 LAD0 VCC
19 LAD1 8 LAD1 VCC 125
7 X_0.1uF X_0.1uF 0.1uF 0.1uF X_4.7uF X_0.1uF X_0.1uF
19 LAD2 LAD2
19 LAD3 5 LAD3 POWER/GROUND AVCC 67
R9 69
10KR0402 AGND
D EC_RST# D
37 ECRST# GND 11
+3.3VALW 2 24
C11 20 EC_KB_RST# KBRST# GND
20 EC_SCI# 20 SCI#/GPIO0E GND 35
X_C1u6.3Y0402-RH 1 94
R17 2.2KR0402 BATCLK_M 20 EC_A20M# GA20 GND
16,18,19,24 A_RST# 13 PCIRST# GND 113
R18 2.2KR0402 BATDATA_M
38 AC_CTL 21 PWM0/GPIO0F SDA0/GPIO45 78 BATDATA_M 38,39
23 PWM1/GPIO10 SCL0/GPIO44 77 BATCLK_M 38,39
26 BR-PWM-ADJ 25 GPIO11/PWM2 SMBUS SDA1/GPIO47 80 SMB_THRMCPU_DATA 9,24
+3.3VRUN 34 79
GPIO19/PWM3 SCL1/GPIO46 SMB_THRMCPU_CLK 9,24
TP80 26 FAN&PWM
FANPWM0/GPIO12
27 FANPWM1/GPIO13 DA0/GPO3C 68 EC_MUTE# 31
R5 X_10KR0402 EC_A20M# 28 70 SCLK2 TP79
R7 X_10KR0402 33 FAN_TACH FANFB0/GPIO14 DA1/GPO3D
EC_KB_RST# 29 71
R4 X_10KR0402 FANFB1/GPIO15 DA2/GPO3E FAN_DA 33
EC_SCI# 72
R8 X_10KR0402 EC_SMI# DA3/GPO3F TP78
AD/DA AD0/GPI38 63
KBOUT0 39 64
KBOUT1 KSO0/GPIO20/TP_TEST AD1/GPI39
SCI#/SMI# don't pull-up in checklist 40 KSO1/GPIO21/TP_PLL AD2/GPI3A 65 VCC_NB_PG 37 [Fuqun] 1.2VPWRGD-->NBPWRGD
KBOUT2 41 66
KBOUT3 KSO2/GPIO22/TP_ANA_TEST AD3/GPI3B

27
42 KSO3/GPIO23/TP_ISP AD4/GPI42 75 AC_OK 38,39
R19 100KR0402 ENCHG KBOUT4 43 76
R14 X_100KR0402 RSMRST# KBOUT5 44
KSO4/GPIO24
KSO5/GPIO25
AD5/GPI43 EC_BATIN# 38 KeyBoard
KBOUT6 45 97
KBOUT7 KSO6/GPIO26 GPXIOA00/SDICS#
R10 X_10KR0402
46 KSO7/GPIO27 SDI GPXIOA01/SDICLK 98 SUS_ON 40
PCI_CLKRUN# KBOUT8 47 99
KSO8/GPIO28 GPXIOA02/SDIMOSI RSMRST# 20
KBOUT9 48 KBOUT17 26 FPC1
KBOUT10 KSO9/GPIO29 KBOUT16
49 KSO10/GPIO2A GPXIOA03 100 DIMM_ON 42 25
KBOUT11 50 IKB 101 KBIN0 24
KSO11/GPIO2B GPXIOA04 RUN_ON 40
KBOUT12 51 102 KBIN1 23

FPC26P-B-1PITCH_BLACK-RH
KBOUT13 KSO12/GPIO2C GPXIOA05 KBIN2
52 KSO13/GPIO2D GPXIOA06 103 22
KBOUT14 53 104 KBIN3 21
KSO14/GPIO2E GPXIOA07 WLAN_PWRON 35,36
KBOUT15 54 105 LED_ACPI# 33 KBIN4 20
KBOUT16 KSO15/GPIO2F/E51_RXD(ISP) GPXIOA08 KBIN5
81 KSO16/GPIO48 GPXIOA09 106 LED_CHARGE# 33 19
KBOUT17 82 107 KBIN6 18
C KSO17/GPIO49 GPXIOA10 LED_BATLOW# 33 C
108 KBIN7 17
GPXIOA11 LED_BLUETOOTH# 33
KBIN0 55 109 KBOUT15 16
KSI0/GPIO30/E51TXD(ISP) GPXIOD0 SUSPWROK 40
+3.3VSUS KBIN1 56 110 KBOUT14 15
KSI1/GPIO31 GPXIOD1 SLP_S5# 20
KBIN2 57 112 KBOUT13 14
KSI2/GPIO32 GPXIOD2 SLP_S3# 20
KBIN3 58 114 KBOUT12 13
KSI3/GPIO33 GPXIOD3 SB_PWRGD 20
KBIN4 59 115 KBOUT11 12
KSI4/GPIO34/EDI_CS GPXIOD4 PWR_SW# 33
NC7SZ08M5X KBIN5 60 116 KBOUT10 11
KSI5/GPIO35/EDI_CLK GPXIOD5
5

KBIN6 61 117 KBOUT9 10


KSI6/GPIO3/EDI_DIN GPXIOD6 LID# 26
VCC
A 1 PCIE_RST#_EC KBIN7 62 118 KBOUT8 9
ER11 X_NC 4 KSI7/GPIO37/EDI_DO GPXIOD7 KBOUT7
30,34,35 PCIE_RST# Y 8
B 2 PCIE_RST#_SB 19 TP2 ESBCLK 17 ESB 6 KBOUT6 7
TP4 ESBDATA GPIO0B/ESB_CLK GPIO04 KBOUT5
GND 18 GPIO0C/ESB_DAT_O/ESB_DAT_I GPIO07/i_clk_8051 14 6
U15 15 KBOUT4 5
3

GPIO08/i_clk_peri KBOUT3
40,41,42 ECO_VO 73 GPIO40/CIR_RX GPIO18 32 EC_SMI# 20 4
74 89 KBOUT2 3
GPIO41/CIR_RLC_TX GPIO50 ENCHG 38
16 CIR 90 KBOUT1 2
24 EC_FSBOC0 GPIO0A/RLC_RX2 E51CS#/GPIO52 POWER_LED# 33
19 92 KBOUT0 1
24 EC_FSBOC1 GPIO0D/RLC_TX2 E51TMR0/GPIO54/WDT_LED# LED_WLAN# 33
E51INT1/GPIO56 95 PM_PWRBT# 20
EC_RD# 119 121
MISO GPIO57/XCLK32K BT_PWRON 36
EC_WR# 120 127 N5A-26F0340-A81
MOSI GPIO59/TEST_CLKSPICLKI CAMERA_ON 36
EC_SPICLK 126 SPI FLASH
EC_CS# SPICLK/GPIO58
128 SPICS#

28
33 TP_CLK 87 PSCLK2/GPIO4E
33 TP_DATA 88 PSDAT2/GPIO4F
85 PSCLK1/GPIO4C PS2 I/F GPIO1A/NUMLED# 36 LED_NUM# 33
ECO_VO AC DC 86 PSDAT1/GPIO4D E51TMR1/GPIO53/CAPSLED# 91 LED_CAP# 33
PCIE_RST#_EC 83 93
PSCLK0/GPIO4A/P80CLK E51INT0/GPIO55/SCROLED# LED_SCR# 33
VCC_NB 0.95 1.1 84 PSDAT0/GPIO4B/P80DAT
[Fqun] Y3 change P/N in 1.0 TP3 E51TXD 30
TP1 E51RXD E51TXD/GPIO16 KBOUT17
31 E51RXD/GPIO17 UART 1 2 EC19
LED KBOUT16 3 4
B 32K_XI 122 5 6 X_8p4C-100p50N0402 B
32K_XO XCLKI
123 XCLKO 7 8
R13 X_10M
KBIN3 1 2 EC15
Y1
124 KBIN2 3 4
V18R KBIN1 X_8p4C-100p50N0402
2 1 5 6
KBIN0 7 8
32.768KHZ12.5P C14 KB3926QFD2-RH KBIN7 1 2 EC18
C15 C1u6.3Y0402-RH B07-0392614-E18 KBIN6 3 4
[Fuqun] Change cap from 18p to 22p in 1.0 C16 C22p50N0402 KBIN5 5 6 X_8p4C-100p50N0402
C22p50N0402 KBIN4 7 8

KBOUT3 1 2 EC10
KBOUT2 3 4
D04-0300800-T16 KBOUT1 5 6 X_8p4C-100p50N0402
D04-0300121-R10 KBOUT0 7 8
D04-0300220-T16 For SW Debug
+3.3VALW SPI CONNECTOR KBOUT7 2 EC12
15

1
KBOUT6 3 4
LPC_FRAME# 1 KBOUT5 5 6 X_8p4C-100p50N0402
C308 +3.3VALW
LAD3 2 KBOUT4 7 8
LAD2

8p4C-100p50N0402
3
LAD1 JSPI1 KBOUT11 2 EC13

12
4 1
LAD0 5 KBOUT10 3 4
C0.1u10X0402 L_LDRQ0# KBOUT9 X_8p4C-100p50N0402
19 LDRQ#0 6 10 5 6
19,23 LPC_CLK1 7 9 KBOUT8 7 8
SERIRQ 8 EC_RD# 8
A_RST# 9 R124 EC_WR# 7 KBOUT15 1 2 EC14
U17 EC_CS# KBOUT14
+5VRUN 10 4.7K/4 6 3 4
EC_CS# 1 8 11 EC_SPICLK_R 5 KBOUT13 5 6 X_8p4C-100p50N0402
CS VCC +3.3VRUN
EC_RD# 2 7 SPI_HOLD# ER1 12 4 KBOUT12 7 8
DO HOLD EC_SPICLK_R EC_SPICLK
3 WP CLK 6 13 3
4 5 EC_WR# 14 SPI_HOLD# 2
GND DIO EC9 1
A
W25X80AVSSIG-RH X_22pF R290 FOR EMI A
16

JDP1 EMI

11
ROM: M31-25X8013-W03 EMI 1683:N32-1100240-A81
BH1X14HS-1.25PITCH_WHITE-RH

[Fuqun] BIOS change P/N in 1.0

MICRO-STAR INT'L CO.,LTD

MSI MS-168x
Size Document Description Rev
Custom ENE3926 1.0

Date: Monday, June 21, 2010 Sheet 25 of 52


5 4 3 2 1
5 4 3 2 1

[Fuqun] Add F2 for EMI in 1.0


F2
+5VRUN 2 1

S-RB551V-30_SOD323
F-MICROSMD110F-RH CRT5V

[Fuqun] Change L13/L14/L15 to 4.7nH in 1.0


CRT5V 4.7nH_300mA D5
4.7nH_300mA
CRT 4.7nH_300mA

L15 VGA_R C289


16 NB_VGA_R
L14 VGA_G X_C0.1u10X0402
16 NB_VGA_G
R85 R82 L13 VGA_B
D 16 NB_VGA_B D
4.7K 4.7K

16

18
6
DAC_SDAT VGA_R 1 11
16 DAC_SDAT
7
DAC_SCL VGA_G 2 12 DAC_SDAT
16 DAC_SCL
8
CRT5V R_HSYN R84 33R0402 HSYN VGA_B 3 13 HSYN
9
R_VSYN R83 33R0402 VSYN 4 14 VSYN
U12
10
1 5 5 15 DAC_SCL
OE VCC
2 C277 C282 C276 C278 CRT1
16,18 NB_HSYNC# A R86 R87 R89 C285 C284 C286 C279 C280 C281 VGAF_BLACK-RH

17

19
3 GND Y 4

NC7SZ125_SOT23-5

CRT5V
X_C220p25N0402
150R1%0402 C6p50N0402 X_C15p50N0402 X_C220p25N0402
U11 150R1%0402 C6p50N0402 X_C15p50N0402 X_C100p16N0402
1 5 140R1%0402 C6p50N0402 X_C15p50N0402 X_C100p16N0402
OE VCC CRT5V CRT5V
16,18 NB_VSYNC# 2 A
3 GND Y 4

Y
NC7SZ125_SOT23-5 ED9 ED8 ED7 ED6

HSYN Z VSYN Z DAC_SDAT Z DAC_SCL Z

X
X_BAT54S-7-F_SOT23-RH X_BAT54S-7-F_SOT23-RH
C X_BAT54S-7-F_SOT23-RH X_BAT54S-7-F_SOT23-RH C

EMI

LVDS
LVDS POWER 3.3V

+3.3VRUN +3V_LCD

U1 C6 C5
5 VIN VOUT 1 ChA.L ChB.None
10u6.3X8

X_0.1u10X4

2 1A JLCD1
GND BH2X20S-1PITCH_WHITE-RH
16 LVDS_VDDEN 4 EN OCB 3
+3V_LCD
APL3511ABI-TRG_SOT23-5-HF +3.3VRUN

42
R3 1 21

42
1 21
4.7K 2 2 22 22
C291 3 23 R12 R11
X_C0.1u10X0402 3 23 4.7K 4.7K
16 LVDS_TX_L2N 4 4 24 24
16 LVDS_TX_L2P 5 5 25 25
6 6 26 26
16 LVDS_TX_L1N 7 7 27 27 LCD_I2C_CLK 16
16 LVDS_TX_L1P 8 8 28 28 LCD_I2C_DATA 16
9 9 29 29
Hall Switch 16 LVDS_TX_L0N 10
11
10 30 30
31
+3.3VRUN
B 16 LVDS_TX_L0P 11 31 B
+3.3VRUN 12 32 C10
12 32 C0.1u10X0402
16 LVDS_TX_CLKLN 13 13 33 33
16 LVDS_TX_CLKLP 14 14 34 34
C275 X_C0.1u10X0402 15 35
15 35
16 16 36 36
BL-ON 17 37
U10 17 37
18 18 38 38 0.387A
X R80 19 39 PWR_SRC
VDD 10KR0402 19 39
Z 20 40
GND LID#
25 BR-PWM-ADJ 20 41 40
VOUT Y LID# 25
41

C300 C303 C292


.APX9131AI-TRL_SOT23-3-RH EC70 X_C0.1u25XC0.1u25X C10u25X51206-RH
X-C1000p50X0402
I36-0913109-A30

LVDS_TX_L2N LVDS_TX_L0N
+3.3VRUN
EL7 EL9
4 1 4 1
NC7SZ08M5X_SOT23-5-RH ER7 ER9
5

X_150R 3 2 X_150R 3 2
LID# 1 A
VCC

Y 4 BL-ON
2 LVDS_TX_L2P LVDS_TX_L0P
16 LVDS_BLON B

GND
U13 X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH
3

EMI
R103 R104
4.7K X_10KR0402 LVDS_TX_L1N LVDS_TX_CLKLN

EL8 EL10
4 1 4 1
ER8 ER10
X_150R 3 2 X_150R 3 2
A A
LVDS_TX_L1P LVDS_TX_CLKLP

X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH

MICRO-STAR INT'L CO.,LTD

MSI MS-168x
Size Document Description Rev
Custom LVDS and CRT 1.0

Date: Monday, June 21, 2010 Sheet 26 of 52


5 4 3 2 1
3 2 1

HDMI
HDMI1
SHELL1 20
15 HDMI_DATA2P 1 D2+
2 D2 Shield GND 22
15 HDMI_DATA2N 3 D2-
15 HDMI_DATA1P 4 D1+
5 D1 Shield
15 HDMI_DATA1N 6 D1- MEC2 MEC2
15 HDMI_DATA0P 7 D0+ MEC1 MEC1
8 D0 Shield
15 HDMI_DATA0N 9 D0-
C C
15 HDMI_CLKP 10 CK+
11 CK Shield
15 HDMI_CLKN 12 CK-
13 CE Remote
14 NC
16 NB_HDMI_CLK 15 DDC CLK
[Fuqun] R=715ohm in checlist 16 NB_HDMI_DATA 16 DDC DATA
R94 R95 R97 R96 R98 R99 R100 R101 17 GND
+5V_HDMI 18 +5V GND 23
19 HP DET
715R1%0402 R91 R92 21
715R1%0402 4.7K 4.7K SHELL2
715R1%0402
D
+3.3VRUN R88 4.7KR0402 G N-2N7002_SOT23-1 715R1%0402 CONN-HDMI19P_BLACK-RH-4
S 715R1%0402
Q6 715R1%0402
[Fuqun] Use 5VRUN or 3VRUN open gate? 715R1%0402
715R1%0402 +5VRUN N5I-19M0180-AF2

+5VRUN +5V_HDMI

F1
2 1
B B
F-MICROSMD110F-RH +3.3VRUN

C287
X_C0.1u10X0402
R93
C
Q7 B HPD_HDMI
N-MMBT3904_NL_SOT23 E
200KR0402
16 HDMI_HPD
R90 [Fuqun] R320 mount or not?
X_200KR0402

R102
10KR0402

HDMI_DATA2P HDMI_DATA1P HDMI_DATA0P HDMI_CLKP

EL2 EL5 EL4 EL3


4 1 4 1 4 1 4 1
ER3 ER4 ER5 ER6
X_150R 3 2 X_150R 3 2 X_150R 3 2 X_150R 3 2

HDMI_DATA2N HDMI_DATA1N HDMI_DATA0N HDMI_CLKN


A A
X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH

EMI

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B HDMI 1.0

Date: Monday, June 21, 2010 Sheet 27 of 52


3 2 1
5 4 3 2 1

+3.3VSUS

R107

10KR0402
USB5V
U14
4 EN VOUT1 8

X_0.1u
+5VSUS
2 7 C298
R105 VIN1 VOUT2
D 3 6 D
X_100KR0402-RH C302 VIN2 VOUT3
X_C2.2u6.3Y 5 1
OC# GND

MEC2
UP7534ARA8-15_MSOP8-HF
USB5V
12

MEC2
GND
GND 13
1 VBUS GND 14
20 USB4N 2 D- GND 15
C288 3
20 USB4P D+
USB5V C0.1u10X0402 4

DIP
GND
5 GND
21 SATA_TX1+_C 6 RX+ GND 11
21 SATA_TX1-_C 7 RX- TX+ 10 SATA_RX1+_C 21

MEC1
EC83 C290 9 SATA_RX1-_C 21
TX-
1
+

GND 8
2

MEC1
ESATA_USB-RH-2

C100u6.3pSO X_C0.1u10X0402

6
ESATA1

USBAM_BLACK-RH-3
4

C 20 USB0N 3 C

2 USB0N
20 USB0P
1 EL6
4 1

3 2
5

USB1
USB0P

X_CMC-L12-9008010-RH

1
X_ESD-RCLAMP0502B

EMI ED10

3
B [Fuqun] Link to MS-168xA B

JUSB1

9
8
7
6
20 USB2P 5
20 USB2N 4
USB5V_CARD 3
+3.3VSUS 2
1

R78

10
10KR0402
USB5V_CARD
U9
4 EN VOUT1 8
X_0.1u

+5VSUS
2 7 C274 FPC8P-B-0.5PITCH_WHITE-RH
R79 VIN1 VOUT2
3 VIN2 VOUT3 6
X_100KR0402-RH C272
A X_C2.2u6.3Y A
5 OC# GND 1

UP7534ARA8-15_MSOP8-HF

[Fuqun] Cost Down MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom USB and ESATA 1.0

Date: Monday, June 21, 2010 Sheet 28 of 50


5 4 3 2 1
3 2 1

Card Reader controller


CP19 X_COPPER
MAX: 250mA Flash Card Socket
+3.3VSUS CARD_3V3
C227 CRD1
C230 XD_RDY/SD_CMD 1
X_10u10Y8 0.1u16Y4 C229 C228 XD_RE# XD_R/B
2 XD_RE
0.1U10X0402 C4.7u10Y0805 XD_CE# 3
XD_CLE XD_CE
4 XD_CLE GND3 37
XD/SD/MS_SCLK 5
C XD_WE#/MS_BS/SD_WP XD_ALE C
6 XD_WE
XD_WP# 7
XD_D0/SD_D0/MS_D0 XD_WP
8 XD_D0
A3_3V VCCA18 XD_D1/SD_D1/MS_D1 9
XD_D2/SD_D2/MS_D2 XD_D1
10 SD_D2
C219 C218 C225 XD_D3/SD_D3/MS_D3 11
C226 C224 CARD_3V3 XD_RDY/SD_CMD SD_D3
12 SD_CMD
X_0.1u16Y4 0.1u16Y4 4.7u6.3Y8 X_4.7u6.3Y8 0.1u16Y4 13 GND1
14 MS_VCC
XD/SD/MS_SCLK 15
XD_D3/SD_D3/MS_D3 MS_SCLK

10
15

30

29

28

31
16 MS_D3
U7 XD_CD#/MS_INS# 17
XD_D2/SD_D2/MS_D2 MS_INS
18

SYSVCC

CardVCC
VCC_PHY
VDD_PHY

VCC3V

VCC18
XD_D0/SD_D0/MS_D0 MS_D2
1 LedZ_WpZ 19 MS_D0
2 XD_D1/SD_D1/MS_D1 20
NC XD_WE#/MS_BS/SD_WP MS_D1
21 MS_BS
8 32 XD_WP# 22
24 CLK_48M_CARD EClkI_XI SmWpZ_GND GND2
23 SD_VCC
9 3 XD_WE#/MS_BS/SD_WP XD/SD/MS_SCLK 24
12MOut_XO SmWeZ_SDWPD_MSBS XD_CD#/MS_INS# XD_D0/SD_D0/MS_D0 SD_CLK
SmCDZ_MSINSZ 27 25 SD_D0
13 XD_D2/SD_D2/MS_D2 26 38
20 USB1N UbDmB XD_D2 GND4
14 24 ER2 X_NC XD/SD/MS_SCLK XD_D3/SD_D3/MS_D3 27
20 USB1P UbDpB SmALE_CLK XD_D3
22 XD_RDY/SD_CMD XD_D4 28
SmBsyZ_SDCMD XD_D1/SD_D1/MS_D1 XD_D4
12 REXT 29 SD_D1
26 SD_CDZ EC59 XD_D5 30
SDCDZ X_10p25N4 XD_D6 XD_D5
11 GND_PHY 31 XD_D6
R71 16 23 XD_CLE XD_D7 32
AGND_PHY SmCLE XD_CE# XD_D7
12K/0402 SmCeZ 7 33 XD_VCC
Card_D0
Card_D1
Card_D2
Card_D3
Card_D4
Card_D5
Card_D6
Card_D7
33 25 XD_RE# XD_CD#/MS_INS# 34
GND_TH SmReZ XD_WE#/MS_BS/SD_WP XD_CD_SW
35 SD_WP_SW
SD_CDZ 36 SD_CD_SW
SD+MS+MMC+XD
17
18
20
21
19
4
5
6
UB6250A1
B XD_CD#/MS_INS# N58-38F0010-TB4 B
XD_D7

XD_D6
EC61
XD_D5
X_0.1u16Y4
XD_D4

XD_D3/SD_D3/MS_D3

XD_D2/SD_D2/MS_D2

XD_D1/SD_D1/MS_D1

XD_D0/SD_D0/MS_D0

XD_D3/SD_D3/MS_D3 EC63 X_10p25N4


XD_D2/SD_D2/MS_D2 EC56 X_10p25N4
XD_D1/SD_D1/MS_D1 EC58 X_10p25N4
XD_D0/SD_D0/MS_D0 EC60 X_10p25N4
XD_WE#/MS_BS/SD_WP EC64 X_10p25N4
XD_RDY/SD_CMD EC65 X_10p25N4

A A
EMI

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom UB6250 1.0

Date: Monday, June 21, 2010 Sheet 29 of 52


3 2 1
5 4 3 2 1

G2
N2
SATA HDD 1.GND
2.TX
3.TX# SATA ODD
S1 4.GND
21 SATA_TX0+_C S2
5.RX#

S8
21 SATA_TX0-_C S3 1.GND
S4 6.RX 2.TX
21 SATA_RX0-_C S5 7.GND S1 3.TX#
D 21 SATA_RX0+_C S6 21 SATA_TX2+_C S2 4.GND D
S7 1.V33 21 SATA_TX2-_C S3
S4 5.RX#
2.V33 S5 6.RX
3.V33 21 SATA_RX2-_C
21 SATA_RX2+_C S6 7.GND
4.GND S7
5.GND 1.DP
6.GND 2.+5V
7.V5 3.+5V
P1
P2 8.V5 R197 10KR0402 P1 4.MD
+5VRUN
P3 9.V5 P2 5.GND
P4 10.GND +5VRUN P3 6.GND
P5 11.Reserved P4

X_C0.1u10X0402
C0.1u10X0402
P6 12.GND P5

C100u16.3V
P7 EC120 C383 C372 P6
13.V12

1+
+5VRUN P8
P9 14.V12
P10 15.V12

P7
X_C0.1u10X0402
C0.1u10X0402

JODD1
C100u16EL-RH-8

P11
1

N5N-13M0010-A81
+

P12
EC113 C374 C382 R59 P13 SATA_S13
X_0R0402 P14 SATA13PSM_BLACK-RH
2

P15

JHDD1
N5N-22F0080-H06
SATA_CON_22P_H5

G1

N1
SATA22PS_BLACK-RH-1
C C

NEW CARD CARD1

28 32
30
26 31
15 PCIE_NEWCARD_TX4P 25
15 PCIE_NEWCARD_TX4N 24
23
[CheckList] PCIE_RST# and GPIO_RST#-->PCIE device 15 PCIE_NEWCARD_RX4P 22
15 PCIE_NEWCARD_RX4N 21
U8 20
24 PCIE_NEWCARD_CLKP 19
25,34,35 PCIE_RST# 6 SYSRST# OC# 19 24 PCIE_NEWCARD_CLKN 18
ER12 X_NCCPPE- 17
20 PCIE_CLKREQ#
20 17 TP59 NEWCARD_CLKREQ- 16
B SHDN# AUXIN +3.3VSUS B
+3VRUN_CARD 15
1 STBY# RCLKEN 18 14
NEWCARD_PERST- 13
+3.3VRUN 2 3.3VIN AUXOUT 15 +3VSUS_CARD +3VSUS_CARD 12
20,34 PCIE_WAKE# 11
4 NC1 1.5VIN 12 +1.5VRUN +1.5VRUN_CARD 10
9
3 14 TP58 8
+3VRUN_CARD 3.3VOUT NC5 TP57 7
5 NC2 1.5VOUT 11 +1.5VRUN_CARD [Fuqun] Connect to SB in 1.0 6
5
NEWCARD_PERST- 8 13 CPUSB- 4
PERST# NC4
20 USB5P 3
16 10 CPPE- 2
NC3 CPPE# 20 USB5N
7 9 CPUSB- 1
GND CPUSB#
GND1 21 29
27
ENE_P2231E2

CARDBUS-26P-RH-2
CARDBUS_S26
N5D-26F0060-SH4

+3.3VSUS +3.3VRUN +1.5VRUN +3VSUS_CARD +3VRUN_CARD +1.5VRUN_CARD

A A
C233 C232 C236 C235 C231 C234
0.1U10X0402 0.1U10X0402 0.1U10X0402 X_0.1U10X0402 X_2.2U6.3Y X_2.2U6.3Y

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom HDD/ODD/NEW CARD 1.0

Date: Monday, June 21, 2010 Sheet 30 of 52


5 4 3 2 1
5 4 3 2 1

+5VRUN AVDD_5V
R53 +3.3VRUN
80L3A
AVDD IOVDD
L10
D2 C144 C123 C132 C133
C150 C149 X_S-RB551V-30_SOD323 X_10u10X 0.1u16X 0.1u16X X_10u10X
X_10u X_0.1u

[Fuqun] Cost Down


+3.3VRUN
D +5VRUN [Fuqun] Cost Down D
80L3A DVDD
PVDD C142
L11 C140 X_10u10X
[Fuqun] NC C145 in 1.0 0.1u16X
C151 C148 C145 C146
X_10u X_0.1u X_10u10X 0.1u16X

46
39

38
25

1
U4

DVDD-IO
PVDD2
PVDD1

AVDD2
AVDD1

DVDD
PGND
CPVEE 34 C139 2.2u10X

20 HDA_RST# 11 RESET#
21 MIC1_LC C113 4.7u10X
MIC1-L MIC1_L 32
20 HDA_SYNC 10 22 MIC1_RC C112 4.7u10X
SYNC MIC1-R MIC1_R 32
6 23

Digital I/O Pins


20 HDA_BITCLK BCLK LINE1-L
LINE1-R 24
20,23 HDA_SDOUT 5 SDATA-OUT
20 HDA_SDIN0 R52 33R HDA_SDIN0_R 8 14
SDATA-IN LINE2-L
LINE2-R 15
DEPOP_MUTE# 47 EAPD/SPDIFO2 MIC2_LC C115 C1U6.3X5
48 SPDIFO MIC2-L 16 INT_MIC 32
17 MIC2_RC C116 C1U6.3X5
MIC2-R
2 GPIO0/DMIC-DATA
3 GPIO1/DMIC-CLK
SPK-OUT-L+ 40 SPK_OUT_L+ 32

Analog I/O Pins


PD# 4 41
PD# SPK-OUT-L- SPK_OUT_L- 32
C 44 C
SPK-OUT-R- SPK_OUT_R- 32
VB VA SPK-OUT-R+ 45 SPK_OUT_R+ 32
32 MIC_VREFO_L 31 MIC1-VREFO-L CPVREF
32 MIC2_VREFOUT 29 MIC2-VREFO
30 32 FOUT_L
32 MIC_VREFO_R MIC1-VREFO-R HP-OUT-L FOUT_R
HP-OUT-R 33

Filter/Reference
C141 2.2u10X 35 R44 20KR1%
CBN MIC_JD# 32
36 13 SENSEA R45 39.2KR1%
CBP SenseA FRONT_JD# 32
SenseB 18
R43 20KR1% 19
JDREF

PCBEEP 12
VREF 27 VREF
VB VA MONO-OUT 20
28 LDO-CAP MIC1-VREFO-L
C125 C126 C135
PVSS2
PVSS1

AVSS2
AVSS1
DVSS
2.2u10X 0.1u16X 10u10X
PAD

ALC269-VB
43
42
49

37
26
+5VRUN
DEPOP CIRCUIT +5VRUN
R54
X_1K PGND
X_4.7K
R51 PD#
D

B B

G Q2
X_N-2N7002
D

Q1 Q11
25 EC_MUTE# G
X_N-2N7002 N-AO3404_SOT23 [Fuqun] Add R42/C152/C373 for EMI in 1.0
FOUT_R R191 75R FOUT_R_Q D S HPOUT_R 32
S

[Fuqun] Cost Down


C373 0.1u16Y4
D

Q10
HDA_RST# G Q3 N-AO3404_SOT23 CP18 X_CP_93519
X_N-2N7002 FOUT_L R189 75R FOUT_L_Q D S HPOUT_L 32
S

PGND

R42 0R/4
+5VRUN +5VSUS PWR_SRC
C152 0.1u16Y4

CP13 X_CP_93519

R239
10K R57 R55
100KR0402 33K/6
C147
R58
HP_MUTE#
A A
HDA_RST# D12
D

20KR0402
D

S-BAS40WS 1u25Y8
G
DEPOP_MUTE# D11 Q4 D1
G
Q5 N-2N7002 C A
S

S-BAS40WS N-2N7002
S

R56 C143
330K/6 X_1u25Y8 X_BAS40WS MICRO-STAR INT'L CO.,LTD
C402
X_1uF MS-168x
MSI
[Fuqun] NC C402 in 1.0 Size Document Description Rev
Custom ALC662 1.0

Date: Monday, June 21, 2010 Sheet 31 of 52


5 4 3 2 1
5 4 3 2 1

31 MIC2_VREFOUT

D1x4-BK
N32-10400V0-A81
53261_04
D R184 D
31 SPK_OUT_L- 1 1
4.7KR 31 SPK_OUT_L+ 2
3
25 5
6
SPEAKER
31 SPK_OUT_R+ 36
Internal Mic 31 SPK_OUT_R- 4 4
JSPK2
JMIC1 EC117 EC119 EC118 EC116
4

X_680P50X X_680P50X X_680P50X X_680P50X


2 PGND
INT_MIC 31
1

PGND
3

EC109
X_100p16N

AGND

BH1X2HS-1.25PITCH_WHITE AGND

MEC2
JSPK1
C C
31 FRONT_JD# 5
4
EL15 300L300mA-350-RH HPOUT_R_L 3
31 HPOUT_R
EL14 300L300mA-350-RH HPOUT_L_L
6
2
EARPHONE
31 HPOUT_L
1

MEC1
2

2
EC108 EC111 ED12 ED11
100p16N 100p16N X_ESD X_ESD

1
JACK-AUDIOF_OR-SP

AGND AGND AGND AGND AGND

31 MIC_VREFO_R
B 31 MIC_VREFO_L B

8
7
R195 R198 JMIC2
2.2KR0402 2.2KR0402 5
31 MIC_JD#
4
EL17 300L300mA-350-RH MIC_R_L
31 MIC1_R 3
6
MIC(PINK)
EL16 300L300mA-350-RH MIC_L_L 2
31 MIC1_L
1

2
ED14 ED13 IOC-JACK-D08-S56
EC122 EC114 X_ESD X_ESD
100p16N 100p16N AUDIO_JACK_6P_OB

1
AGND AGND AGND AGND AGND

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B SPK / HP / MIC 1.0

Date: Monday, June 21, 2010 Sheet 32 of 52


5 4 3 2 1
5 4 3 2 1

FAN
+3.3VRUN
+5VRUN

MAX: 0.35A [Fuqun] Link to MS-168xB


R111
10K/4
C12
X_0.1u16Y4 +3.3VALW
FAN_TACH 25
LCHBD1

13
D Jameslee: PWR_SW# add ESD D

BH1X3HS-1.25PITCH-RH
4
U2 R1
1 3 VCCFAN1 3 10KR0402
FSM# VOUT
2
2 1

FPC12P-B-0.5PITCH_WHITE-RH-3
VIN

X_2.2u6.3Y6
GND 8 12 PWR_SW# 25
7 11

5
GND

C7
6 EC90 10
GND X_1000p50X4
25 FAN_DA 4 VSET GND 5 9 [Fuqun] Remove hot-key in 1.0
JFAN1 8
APL5606KI-TRL_SOP8-RH EMI 7 POWER_LED# 25
6 R241 220R +5VALW
5
4
[Fuqun] P/N follow 1684 or 1688? 3
2
1 [Fuqun] EMI add in 2010-05-18

PWR_SW# EC1 1000pF


[Fuqun] Can chane 5V to 3V for Layout
LED8 POWER_LED# EC6 X_1000pF
LED04-B-20mA2.8V_1608-RH
LED_SCR# 25

14
+5VALW EC7 X_0.1uF
LED6
LED04-B-20mA2.8V_1608-RH EMI
LED_CAP# 25
+5VRUN 1 2
3 4 LED5
5 6 LED04-B-20mA2.8V_1608-RH
C
LED_NUM# 25 C
7 8
LED2
RN5 LED04-B-20mA2.8V_1608-RH
LED_HDD# 21
8P4R-220R

LED3
LED04-B-20mA2.8V_1608-RH
LED_BLUETOOTH# 25
LED_SCR# EC76 X_1000pF
LED4 LED_CAP# EC75 X_1000pF
+5VRUN 1 2 1 2 LED_NUM# EC74 X_1000pF
LED_WLAN# 25
3 4 LED04-G-20mA3.2V_20125-RH LED_HDD# EC73 X_1000pF
5 6 LED_BLUETOOTH# EC72 X_1000pF
7 8 LED1 LED_WLAN# EC71 X_1000pF
+5VALW
1 2 LED04-G-30mA2.4V_20125-RH LED_CHARGE# EC77 X_1000pF
LED_CHARGE# 25
RN4 LED_BATLOW# EC79 X_1000pF
8P4R-220R LED9 LED_ACPI# EC78 X_1000pF
1 2 LED04-O-25mA2.4V_20125-RH LED_BATLOW# 25
EMI
LED7
+5VSUS R81 220R LED04-B-20mA2.8V_1608-RH
LED_ACPI# 25

B B
TOUCH PAD
+5VRUN +5VRUN

SA5
SW-TACTB1-6PS
TPAD1 3mA
14

X_C0.1u10X0402

LEFT_D A B
C77 C D

EC66
F
E

R33 R32 X_0.1uF


10K 10K TP_DATA
1
2 TP_CLK
3 TP_DATA 25
4
5 EC25 EC26
TP_CLK 25
6 SA6 X_10p25N4 X_10p25N4
7 SW-TACTB1-6PS
8 EMI
9 LEFT_D RIGHT_D A B
10 C D
11
12 RIGHT_D EC67
F
E

X_0.1uF

A A
13

FPC12P-B-0.5PITCH_WHITE-RH-3

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom FAN/LED/TP 1.0

Date: Monday, June 21, 2010 Sheet 33 of 50


5 4 3 2 1
5 4 3 2 1

VDD33 power on rise time >1ms


CP8 X_NC_93519
+3.3VSUS 1 2 VDD33 VDD33
CP25 X_NC_93519 C360 C27p50N

C10U10Y0805
1 2

1
C74
C337 C83 C361 C72 C340 C358 Y5
C0.1u X_C0.1u C0.1u X_C0.1u C0.1u C0.1u 25MHZ20p_S-RH-2

2
R164 2.49K C359 C27p50N

TP74
D D

LED1/EESK
CP9

VDD33
VDD33

VDD10

VDD33
VDD10

VDD33
XTAL2
XTAL1
1 2 AVDD33_REG

RSET
AVDD33_REG

GPO
X_NC_93519

U18

48
47
46
45
44
43
42
41
40
39
38
37
C75 C78
X_C4.7u6.3 C0.1u_0402 49 VDD33

LED1/EESK
AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10(NC)
LED0
DVDD33
RSET

GPO/SMBALERT
GND
For Enable Switch Regulator.
AVDD33_REG
[Fuqun] Change 2.2uH to 4.7uH in 1.0 R157
MDI0+ 1 36 REGOUT
Change 4.7uF to 22uF in 1.0 MDI0- MDIP0 REGOUT AVDD33_REG
2 MDIN0 VDDREG 35
VDD10 3 34 AVDD33_REG
MDI1+ AVDD10 VDDREG ENSWREG
4 MDIP1 ENSWREG 33
MDI1- 5 32 EEDI/SDA
L16 VDD10 MDIN1 EEDI/SDA LED3/EEDO TP73 +3.3VRUN
6 AVDD10(NC) LED3/EEDO 31
CH-4.7u1A1240mA MDI2+ 7 30 EECS/SCL
CP20 MDIP2(NC) EECS/SCL
REGOUT 2 1 1 2 VDD10
MDI2-
VDD10
8
9
MDIN2(NC) RTL8105E/8111E DVDD10 29
28
VDD10
R140
VDD10 AVDD10(NC) LANWAKEB PCIE_WAKE# 20,30
MDI3+ 10 27 VDD33 1KR0402
X_NC_93519 MDI3- MDIP3(NC) DVDD33 ISOLATEB
11 MDIN3(NC) ISOLATEB 26
VDD33 12 25
AVDD33(NC) PERSTB PCIE_RST# 25,30,35
C363 C353

SMBDATA(NC)
SMBCLK(NC)
22U6.3X0805 C0.1u_0402 C343 C322 C349 C80 C342 C79 C344 R141

REFCLK_N
REFCLK_P
C0.1u C0.1u C0.1u C0.1u C0.1u X_C0.1u X_C0.1u

CLKREQB
15KR0402

DVDD10

EVDD10

HSON
HSOP
HSIN
HSIP

GND
C C

CP7

13
14
15
16
17
18
19
20
21
22
23
24
1 2 EVDD10

SMBDATA
EVDD10

SMBCLK

CLKREQB

EVDD10
VDD10
X_NC_93519

C70 C71
C1u16X-RH C0.1u

TP72 PCIE_LAN_RX2N_C C320 C0.1u10X0402


PCIE_LAN_RX2P_C C321 C0.1u10X0402 PCIE_LAN_RX2N 15
PCIE_LAN_RX2P 15

15 PCIE_LAN_TX2P PCIE_LAN_CLKN 24
VDD33 15 PCIE_LAN_TX2N PCIE_LAN_CLKP 24

CLKREQB R132 X_10KR0402

PCIE_WAKE# R145 X_10KR0402

10K ohm close to Host side

[Fuqun] For P/N and pin define?


B EECS/SCL 10K R150
Follow 1684 or 1688? B

EEDI/SDA 10K R153 LAN MAGNETICS


U20

MEC1
V_DAC 1 24 MCT4 LAN1
MDI3- TCT1 MCT1 TRD3-
2 TD1+ MX1+ 23 LAN-RJ45S-RH-4

9
MDI3+ 3 22 TRD3+ RN7
VDD33 V_DAC TD1- MX1- MCT3 MCT1
4 TCT2 MCT2 21 1 2
GPO R163 1K MDI2- 5 20 TRD2- MCT2 3 4
MDI2+ TD2+ MX2+ TRD2+ MCT3
6 TD2- MX2- 19 5 6
SMBDATA R133 10K V_DAC 7 18 MCT2 MCT4 7 8 TRD3- 1
MDI1- TCT3 MCT3 TRD1- TRD3+
8 TD3+ MX3+ 17 2
MDI1+ 9 16 TRD1+ 8P4R-75R C332 TRD1- 3
V_DAC TD3- MX3- MCT1 RN0402_MSI C1000p2000X1808 TRD2-
10 TCT4 MCT4 15 4
MDI0- 11 14 TRD0- C1808MS TRD2+ 5
MDI0+ TD4+ MX4+ TRD0+ TRD1+
When using EFuse/BIOS Patch without ASF function. 12 TD4- MX4- 13
TRD0-
6
7
GST5009 LF-RH TRD0+ 8

C357
C0.01u10X0402-RH

10

MEC2
A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom RTL8111D 1.0

Date: Monday, June 21, 2010 Sheet 34 of 52


5 4 3 2 1
5 4 3 2 1

WLAN CARD
+3.3VRUN

MS-6891 USE 1.5VRUN


+1.5VRUN +3.3VRUN
1.1A
1 WAKE# +3.3V_1 2
D D
3 BT_DATA GND7 4 375mA
5 6 C295 C293 C299
R2 X_10K/4 BT_CHCLK +1.5V_1
+3.3VRUN 7 CLKREQ# RSVD13 8
9 10 C296 C294 X_C0.1u10X0402X_C0.1u10X0402 C10u10Y0805
GND1 RSVD14
24 PCIE_WLAN_CLKN 11 REFCLK- RSVD15 12
13 14 X_C10u10Y0805 X_C0.1u10X0402
24 PCIE_WLAN_CLKP REFCLK+ RSVD16
15 GND2 RSVD17 16

KEY Active High


17 RSVD3 GND8 18
19 20 +3.3VRUN
RSVD4 W_DISABLE# WLAN_PWRON 25,36
21 GND3 PERST# 22 PCIE_RST# 25,30,34
15 PCIE_WLAN_RX0N 23 PET_N0 +3.3_AUX 24
15 PCIE_WLAN_RX0P 25 PET_P0 GND9 26
27 GND4 +1.5V_2 28 [CheckList] PCIE_RST# and GPIO_RST#-->PCIE device
29 GND5 RSVD18 30
15 PCIE_WLAN_TX0N 31 PER_N0 RSVD19 32
15 PCIE_WLAN_TX0P 33 PER_P0 GND10 34
35 GND6 USB_D- 36
37 RSVD5 USB_D+ 38
39 RSVD6 GND11 40
41 RSVD7 NC#42 42
[Fuqun] Add AW-NE785 WLAN in 1.0 43 RSVD8 LED_WLAN# 44
45 46 +3.3VRUN +1.5VRUN
NC pin 39/41/43 RSVD9 NC#46
47 RSVD10 +1.5V_3 48
49 RSVD11 GND12 50
51 RSVD12 +3.3V_2 52
EC23 EC80 EC85

C X_0.1uF X_0.1uF X_0.1uF C


53 GND17 GND17 54

NC 56
NC#55 55
N11-0520170-L06 EMI
SLOT_MINIPCIEXP52_H9
SLOT-MINIPCI52P-0.8PITCH-RH

PCIE1

B B

A A

MICRO-STAR INT'L CO.,LTD

MSI MS-168x
Size Document Description Rev
Custom MINI-PCIE 1.0

Date: Monday, June 21, 2010 Sheet 35 of 52


5 4 3 2 1
3 2 1

BLUETOOTH
BLUETOOTH
BH1X10S-0.8PITCH_WHITE-RH
MS-3871 C69 X_0.1U10X0402

12
JBT2

+3.3VRUN
10
9
MS-3801
8 JBT1
25,35 WLAN_PWRON

10
20 USB7N 7
C
WIFI 20 USB7P 6
C
5 +3.3VRUN 8
25 BT_PWRON 4 7
20 USB8N 3 20 USB3N 6
BLUETOOTH 20 USB8P 2 20 USB3P 5
1 C237 4
+3.3VRUN X_0.1U10X0402 3
C45 2

11
X_0.1U10X0402 25 BT_PWRON 1

N32-1100360-A81

9
BH1X8#S-1.25PITCH_WHITE-RH
USB7N USB8N WLAN_PWRON

EL12 EL13 BT_PWRON N32-1080280-A81


4 1 4 1

3 2 3 2 EC97 EC95
X_10nF X_10nF

USB7P USB8P

X_CMC-L12-9008010-RH X_CMC-L12-9008010-RH

EMI

B
CAMERA MAX: 130mA
B

+3.3VRUN IRLML6402PBF_SOT23 +3V_CAMERA


Q8
S D
G

C301 C297
X_10u10Y8 X_0.1u16Y4
R106

25 CAMERA_ON

15K1%4 C304
0.1u16Y4
Camera
CAMERA1
1
20 USB9N 2
20 USB9P 3 7
4 8
5
USB9N 6

EL11 BOX/HEADER/1*6
4 1 [Fuqun] For P/N and pin define? N32-1060410-A81
53261_06
A 3 2 A

USB9P

X_CMC-L12-9008010-RH

EMI MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B CAMERA/BT 1.0

Date: Monday, June 21, 2010 Sheet 36 of 52


3 2 1
5 4 3 2 1

D D

+3.3VRUN

VCC_NB +3.3VSUS
PR1
10K_0402

PR2
VCC_NB_PG 25
100K_0402
PR15

D
1K_0603 G PQ1 PC1

C
PQ2 N-2N7002_SOT23 0.1uF
C B C

S
SMBT3904

B B

A
MICRO-STAR INT'L CO.,LTD A

MSI
MS-168x
Size Document Description Rev
A POWER LOGIC 1.0

Date: Monday, June 21, 2010 Sheet 37 of 52


5 4 3 2 1
5 4 3 2 1

PL1 X_80L6A-30_6A DC_IN+


AC_JACK L0805_67
BAT-CONN.
L02-8008074-J07

6
PQ16 8
4 1 PL2 80L6A-30_6A 1 7
5 2 L0805_67 2 6 +VBATA
3 L02-8008074-J07 PC63 PC62 C0.1u50Y 3 5
X_C2200p50X0402
C0603 P-AO4433
PWR1 PC58 C0402 C283 SOIC8 +3.3VALW PC123

10
PWRJACK3P-RH-7 C0.1u50Y PR73 D03-0431702-A30 PC59 PC61 PC60

4
C0603 C0.01u25X0402 C0.1u50Y C10u25X51206-RH C0.1u50Y JBAT1
C0402 C0603 C1206_113 1
C1u25X0805-RH PR50

BAT9P_BLACK-RH-9
2
D PR72 150KR0402 100KR0402 3 D
200KR0402 4
PR48 100R0402 BATCLK_M_R 5

Y
GND 25,39 BATCLK_M PR49 100R0402 BATDATA_M_R
25,39 BATDATA_M 6
PQ14 7
IN 25 EC_BATIN#
X P-DTA114EKA 8
SOT23_3P_U1 +3.3VALW 9

D
OUT
C172

Z
PQ15 X_C0.1u10X0402

11
G N-2N7002_SOT23-1 C171 C170
25 AC_CTL
SOT23SGD_T

S
PR71 Z Z
100KR0402 N91-09M0091-AF2
R0402 D4 D3
BATHOLD_D9_1

X
X_C10p50N0402
X_C10p50N0402

X_BAT54S-7-F_SOT23-RH
X_BAT54S-7-F_SOT23-RH

C C

+3.3VALW PP-AO4805_SO8
PQ20A
SDC_IN+ 7 1
8
PR86
X_100KR0402

2
10KR0402 PR87 PR88 100KR0402

B B
PQ18

PWR_SRC
D
25,39 AC_OK G
S
N-2N7002_SOT23-1

PP-AO4805_SO8 +VBATA
PP-AO4805_SO8
PQ29B PQ29A
ES3BB-13-F-RH
5 3 1 7 PD1
V_CHG
6 8
4

PC120 C0.1u50Y
PR113 PP-AO4805_SO8
10KR0402 PQ20B
PR114 100KR0402 5 3 PWR_SRC
6
PR111
10KR0402 PQ28 CHG_BATT_N
4

D
25 ENCHG G

S
N-2N7002_SOT23-1
PR89
470KR0402

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom Battery SELECT 1.0

Date: Monday, June 21, 2010 Sheet 38 of 50


5 4 3 2 1
5 4 3 2 1

Adapter input voltage set 19 Voltage


DC_IN+ SDC_IN+

D PR91 D
0.02R1%XTRA

S-RB751V-40_SOD323-RH
PD3

28

27
PU6
PR101 PR99

CSSP

CSSN
365KR1%0402 33R0402
DCINPMOS 22 26 M31AVCC PD2
DCIN VCC S-RB751V-40_SOD323-RH
PC93
PC96 C1u10X50402-RH
C1u25X5-RH
8731A_AGND

M31AACIN 2 21 M31ALDO
ACIN LDO PC84 PC82 PC86
10U25X1206 10U25X1206 C0.1u50X
PR102 PC97
48.7KR1%0402 C0.1u25X PC100
M31ALDO C1u10X50402-RH
C C

BST 25
PR105
8731A_AGND 10KR1%0402 PR100 PC88
13 1R0402 C0.1u16X0402-2
25,38 AC_OK ACOK
R196 PQ23
DHI 24
14 8 1 V_CHG
15.8KR1%0402-RH BATSEL PL5
2
8731A_AGND 5 10u_104R
11 23 PR97 0R 3 6
VDD LX R0603
+3.3VALW 7 1 2
4 PR109
PC112 PC90 PR98 0.02R1%XTRA
C0.1u10X0402-1 X_C220p50N0402 X_2.2R PC117 10U25X1206
8731A_AGND NN-SI4914BDY-T1-E3 PC119 10U25X1206
C0.1u50X
JNC6 10 20 PC116 PC115
CLK_SMB SCL DLO PC89 10U25X1206
25,38 BATCLK_M
9 PC85 X_C1000p50X0402
DAT_SMB SDA C470p50X0402
25,38 BATDATA_M PGND 19

B 8 IINP B
JNC5
6 18 M31ACSIP
CCV CSIP
5 CCI CSIN 17

4 15 M31AFBSA
CCS FBSA PR104
3 16 100R0402
PR106 PC113 PR103 REF FBSB
10KR1%0402 C0.1u10X0402-1 4.7KR0402 7 DAC
GND

GND
BP

PC108 PC107 PC102 PC110 MAX8731AETI+_TQFN28-RH


12

29

PC98 C0.1u10X0402-1
C0.01u25X0402 C0.01u25X0402 C0.01u25X0402 C1u6.3X50402-HF

JNC2

8731A_AGND

A A

IINP : MICRO-STAR INT'L CO.,LTD


1. The transconductance from (CSSP - CSSN) to IINP is 3mA/V.
2. V_IINP = IINPUT x RS1 x 3mA/V x PR25 MSI
MS-168x
Size Document Description Rev
B CHARGER 1.0

Date: Monday, June 21, 2010 Sheet 39 of 50


5 4 3 2 1
A B C D E

3VSUS_EN JNC4 X_R/2 5VSUS_EN


PWR_SRC

GND_TPS51125

PWR_SRC
PC6
Place these CAPs C1u6.3X50402-HF
PC5

X_C2200p50X0402
close to FETs PC69 PR83
PR80 20KR1%0402 PC74

C0.1u25Y0402-RH
X_C10P50N

1
20KR1%0402

+
X_C10P50N C22u25SO-RH

C0.1u25Y0402-RH
1 1

PC77

PC78
VREF

2
1
PC80 X_C2200p50X0402 PR81 13KR1%0402 VFB2 VFB1 PR84 30KR1%0402

PC72

3 0R0402
PC71 PR79
PR78

PR82
115KR1%0402-RH 107KR1%0402-RH

1
GND_TPS51125 GND_TPS51125

ENTRIP2

VFB2

TONSEL

VFB1
VREF

ENTRIP1
C22u25SO-RH

7 VO2 VO1 24

8 23 +3VSUSPWROK
+3.3VALW VREG3 PGOOD PC67
PC66 C0.1u50Y PR74 4.7R PR75 4.7R C0.1u50Y
9 VBST2 VBST1 22 Current limit at 7A for +5VSUS
Current limit at 6A for +3.3VSUS DH2 10 21 DH1 PQ21
PQ19 DRVH2 DRVH1

+3VSUS +5VSUS
PL3
CH-4.7u10A40mS-RH-2 1 8 LL2 11 20 LL1 8 1 PL4
LL2 LL1
2 7 7 2
1 2 5 3 DL2 12 19 DL1 3 5 1 2
+3.3VSUS DRVL2 DRVL1 +5VSUS
6 4 4 6

SKIPSEL
C220u6.3pSO-1

C220u6.3pSO-1
VREG5
+1

+1
VCLK
NN-AO4932_SOIC8-RH CH-4.7u10A40mS-RH-2

GND
EN0
NN-AO4932_SOIC8-RH

VIN
PC73

PC81
PC70 25 CI1 PC76
C0.1u10X0402 PC68 SGND
2

2
PR90 C4.7u6.3X50805 TPS51125RGER_QFN24-RH X_C10p50N0402

13

14

15

16

17

18
X_2.7R C0805_67 PU5 C0.1u10X0402
PWR_SRC
2 PR96 2

X_R/2
JNC3
X_2.7R
PC75
8
7
6
5

X_C2200p50X0402 +5VALW

5
6
7
8
PQ4 PR7 PC65
4 20KR0402 RUND C0.1u25X PC83 +3.3VSUS PQ6
N-AO4468_SOIC8-RH VREF X_C2200p50X0402 RUND 4
N-AO4468_SOIC8-RH
PC10 PC64
1
2
3

C0.1u50Y JNC1 X_COPPER GND_TPS51125 C22u6.3X50805-RH

3
2
1
PR77
10KR0402 +5VRUN

+3.3VRUN GND_TPS51125 +3VSUSPWROK

+5VALW
PWR_SRC
PR5 X_200KR1%0402 VFB1
PWR_SRC
+3VSUS Voltage TABLE PR76
PR6 X_137KR1%0402 VFB2 100KR0402 PR93
ECO_VO Voltage 100KR0402
PR92
D1

D2

HIGH 3.3V(default) 5VSUS_EN RUN_ON_R 33KR0402

D1

D2
3 PQ3 3
LOW 3.15V RUND 42
PQ17

D2

D1
X_NN-2N7002DW

C0.1u25Y0402-RH
NN-2N7002DW_SOT363-RH
PQ22 PR95
S1
G1
S2
G2

PC79
PR4

S1
G1
S2
G2
NN-2N7002DW_SOT363-RH 470KR0402
25,41,42 ECO_VO +5VSUS Voltage TABLE
X_C0.1u25Y0402

25 SUS_ON
X_1KR0402 ECO_VO Voltage

G2
S2
G1
S1
PC3

HIGH 5V(default) PR85 25 RUN_ON


X_47KR0402
LOW 4.8V PR94
100KR0402

+5VSUS

[Fuqun] Change PR127 from 18.7 to 24.9Kohm in 1.0


+5VALW
+3.3VSUS PC146
10u10Y8
6

PU8 +3.3VSUS
PR128
VCNTL

PR20 5 100KR0402
100KR0402 VIN1

VIN2 9 PC148 Max current 2A


10u10Y8 1.1VSUS_EN
+1.1VSUS

D1

D2
25 SUSPWROK 7 POK
4 4
4 PQ36
1.1VSUS_EN VOUT1
8 EN
3 NN-2N7002DW_SOT363-RH
VOUT2
PR127 PC150 PC149 PC151
MICRO-STAR INT'L CO.,LTD
S1
G1
S2
G2
2 C22u6.3X50805 X_C22u6.3X50805 X_C0.1u10X0402
FB 24.9KR1%0402 +3VSUSPWROK
GND

PC147 0.1uF MSI


MS-168x
APL5912KAC-TRL_SOIC8-RH PR126 Size Document Description Rev
1

48.7KR1%0402 Custom SYSTEM POWER 3/5V 1.0

FB Vref=0.8 V Date: Monday, June 21, 2010 Sheet 40 of 50

A B C D E
5 4 3 2 1

PWR_SRC

D D

Max current 18A

D
PQ32

1
PC138

C22u25SO-RH
+
G
+3.3VRUN PC135 PC136 PC133
S X_C2200p50X0402 C0.1u50Y C10u25X6S1206-RH current limit 20A

2
PR65
100KR0402
PU3 N-AOL1448L_ULTRASO8-RH

1.1VRUNPWROK 1 10 PR67 2.2R


PR62 PGOOD VBST
2 9 PC52
PR63 1KR0402 TRIP DRVH C0.1u16X0402-2 PL9
44 VRM_PWRGD 28KR1%0402 3 8 1 2
EN SW +1.1VRUN
PC50 4 7 +5VRUN CH-0.56u25A1.8mS-RH

D
X_0.1u10X VFB V5IN PQ30 PQ31 PC127

C330u2.5pSO-1
5 6 G G PR115 PR60

GND
RF DRVL

+1

+1
X_2.2R 15.8KR1%0402-RH PC122
S S PC49
TPS51218DSCR_SON10-RH X_C10P50N PC124 C330u2.5pSO-1

11

2
C C
PR66 PC128 C0.1u16Y0402
X_1000p50X
PC51
464KR1%0402 C1u10X50402-RHN-AOL1718L_ULTRASO8-RH
N-AOL1718L_ULTRASO8-RH

PR64
VFB 27.4KR1%0402 0B

D
PQ7
1.1VRUND R46 33KR0402 G
PR61
VFB S

X_110KR1%0402-RH
[Fuqun] Change R46 from 0ohm to 33K in 1.0
D

PR59 X_1KR0402 +5VRUN AOL1718_TRASO_8 -RH


5,40,42 ECO_VO G PQ12
C110
X_N-2N7002_SOT23
C0.1u25Y0402-RH
S

PC48 +3.3VRUN PC2


B X_0.1u10X 10u10Y8 B

6
PU1 +3.3VRUN

VCNTL
PR3 5
100KR0402 VIN1
VCC_NB
9 PC4
VIN2

1 +
10u10Y8

PWR_SRC 42 1.8VPWRGD 7 POK


Max current 2A +1.8VRUN PC152
C100u16.3V

2
VOUT1 4
PWR_SRC 8 EN
VOUT2 3 [Fuqun] Power add 100uF cap in 1.0
PR17
100KR0402 PR9 PC8 PC7
PR11 2 C22u6.3X50805-RH C22u6.3X50805-RH
33KR0402 FB 3.83KR1%0402
GND

1.1VRUND PC9 C470p16X0402-RH


APL5912KAC-TRL_SOIC8-RH PR8
1
D2

D1

3.01KR1%0402
C0.1u25Y0402-RH

PQ8 PR10 FB Vref=0.8 V


PC11

NN-2N7002DW_SOT363-RH 37.4KR0402
A A
G2
S2
G1
S1

1.1VRUNPWROK
MICRO-STAR INT'L CO.,LTD
PR16 [Fuqun] PR10 470ohm to 37.4ohm in 1.0
100KR0402 MS-168x
MSI
Size Document Description Rev
B 1.5V 2.5V VLDT 1.0

Date: Monday, June 21, 2010 Sheet 41 of 50


5 4 3 2 1
A B C D E

PWR_SRC

1 1

C22u25SO-RH
PC137

+
D
+3.3VSUS PQ35 PC140 PC139 PC142
G X_C2200p50X0402 C0.1u50Y C10u25X6S1206-RH Max current 13A

2
S
PR116
100KR0402 Max current 15A
PU7

1 10 PR118 2.2R N-AOL1448L_ULTRASO8-RH


PR117 PGOOD VBST
2 9 PC130 PL10 CPU_VDDIO_SUS
TRIP DRVH C0.1u16X0402-2
44.2KR1%0402
3 8 1 2
25 DIMM_ON EN SW
PC129 4 7 +5VSUS CH-1.5u33A-RH

D
VFB V5IN PQ34

C330u2.5pSO-1
X_0.1u10X PC143
5 6 G PR125 PR124

GND
RF DRVL

+1

+1
X_2.2R 15.8KR1%0402-RH PC144
S PC134
TPS51218DSCR_SON10-RH X_C10P50N PC145 C330u2.5pSO-1

11

2
PR123 PC141 C0.1u16Y0402
X_1000p50X
2 PC132 2
464KR1%0402 C1u10X50402-RH N-AOL1718L_ULTRASO8-RH

5
6
7
8
PQ10
1.5VRUND 4
PR121 N-AO4468_SOIC8-RH
VFB3 13.7KR1%0402

3
2
1
+1.5VRUN
PR122
VFB3

PWR_SRC
X_15.8KR1%0402-RH
D

PR120 X_1KR0402 PWR_SRC


25,40,41 ECO_VO G PQ33
PR56
X_N-2N7002_SOT23 100KR0402
S

PC131 +5VRUN PR51


X_0.1u10X 33KR0402
3 3
CPU_VDDIO_SUS
PC57 PU4

D2

D1
+5VSUS

C0.1u25Y0402-RH
C4.7u6.3X50805 thermal pad(GND) 9
1 VIN NC1 8
2 7 PQ9 PR52
GND NC2

PC37
3 VREF VCNTL 6
PR69 4 5 PC53 NN-2N7002DW_SOT363-RH 470KR0402
PR70 VOUT NC3
C4.7u6.3X50805
10KR1%0402 APL5331KAC-TRL_SOP8-RH

G2
S2
G1
S1
10KR1%0402
41 1.8VPWRGD

MEM_VTT PR54
100KR0402
D1

D2

PC54 PC55
PQ13 C22u6.3X51206-RH-4 X_C22u6.3X51206-RH-4

PR68
NN-2N7002DW-7-F_SOT363-6-RH PC56
10KR1%0402 C0.1u25Y
S1
G1
S2
G2

40 RUND R77 X_NC

4 C273 4
X_C0.1u25Y0402-RH

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom DDR POWER 1.0

Date: Monday, June 21, 2010 Sheet 42 of 50

A B C D E
5 4 3 2 1

D D

+5VSUS

PC47
10u10Y8

6
PU2 CPU_VDDIO_SUS
+5VSUS Max current 2A

VCNTL
VIN1 5

9 PC45
PR55 VIN2
10u10Y8
100KR0402 7 CPU_VDDR
POK

VOUT1 4
8 EN

D1

D2
VOUT2 3
C C
PQ11 PR57 PC43 PC44
FB 2 C22u6.3X50805-RH C22u6.3X50805-RH
NN-2N7002DW_SOT363-RH 3.83KR1%0402

GND
PC46 C470p16X0402-RH
S1
G1
S2
G2

44 CPU_VDDA_RUN_PG PR53 X_NC APL5912KAC-TRL_SOIC8-RH PR58

1
12.1KR1%0402

PC41 FB Vref=0.8 V
X_C1u10Y0402-RH

B B
+3.3VRUN

+VDDA
P2
10KR0402

C165 U6
1u_6.3X 1 6
C0402 VIN VOUT
2 5CPU_VDDA_RUN_ADJ C162 C163 C164 C168
GND ADJ R66 22U6.3X 4.7U6.3X 0.22U6.3X X_3.9n16X
3 4 11K_1% C0805_67 C0603 C0402 C0402
EN PG R0402
AME8824

R68
10K_1%
A R0402 A

CPU_VDDA_RUN_PG 44 MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom NB SB CORE PWR 1.0

Date: Monday, June 21, 2010 Sheet 43 of 50


5 4 3 2 1
5 4 3 2 1

PR12

+5VRUN
D D
10R PWR_SRC

+5V_CTRL
PC12 PC13
C2.2u16Y0805 C2.2u16Y0805

D
C470u25EL-RH

+1
PQ25 PC94 PC91
GND_MAX17480 PC104 PC99 PC87

32

25
U5 G
X_C2200p50X0402 C0.1u50Y

2
S C10u25X6S1206-RH

VCC

VDD
C10u25X6S1206-RH
154KR1% PR30 PR13
GND_MAX17480 39 OSC BST1 27
0R
PC14 AOL1426_ULTRASO-8-RH PL8
37.4KR1% 40 C0.1u50Y
PR31 TIME
PR36 DH1 29 1 2 CPU_VDD_RUN

GND_MAX17480 ILIM12 1 PR107

D
ILIM12 PQ27 X_2.2R PR42 CH-0.36u60A1.2mS-RH
100KR1% PR32 0R 28 G 1.5KR1%
LX1

1
CPU_VDDIO_SUS VDDIO 13 PC106 PR40 PC38 PC39
VDDIO PC109
S 1.87KR1% + +
GND_MAX17480 PC27 C0.1u10X0402 X_2200p50X PC40
26 PC36 PR44 PR45 330U2
C0.1u50Y 330U2

2
DL1 X_C4700p50X0402
9 CPU_SVC 12 SVC PC16 1000p50X AOL1412_ULTRASO-8-RH
GND_MAX17480 C330p16N-RH 10KRT1%-RH
2.74KR1%
9 CPU_SVD 11 SVD
CSP1 33
34 PWR_SRC
CSN1 PC18 1000p50X PC17 C0.22u6.3X-RH
9 CPU_PWRGD_SVID_REG 19 PGD_IN
GND_MAX17480

D
PC15 PQ24
PR108 0R0402 8 23 G PC92 PC95
43 CPU_VDDA_RUN_PG SHDN BST2
[Fuqun] Mount PC111 for VDDA_PG glitch in 1.0 PC111 C0.1u10X0402 PR29 0R PR14 0R S PC103 PC101
C0.1u50Y C10u25X6S1206-RH
C GND_MAX17480 38 OPTION DH2 21 X_C2200p50X0402 C0.1u50Y C
C10u25X6S1206-RH
+3.3VRUN PR19 100KR0402 PL7
LX2 22 1 2 CPU_VDD_RUN
20 AOL1426_ULTRASO-8-RH PR41
41 VRM_PWRGD PWRGD PR110 1.5KR1% CH-0.36u60A1.2mS-RH

D
PQ26 X_2.2R
30 24 G PR43
9 VRD_PROCHOT# VR_HOT DL2

1
PC105 PC35 1.87KR1% PC125 PC126
S PC114 PR47 PR46 + +
+5V_CTRL PR18 10KR0402 31 X_2200p50X PC20 PC42
THRM PC19 1000p50X X_C4700p50X0402 C330p16N-RH 2.74KR1% 10KRT1%-RH 330U2 330U2
C0.1u50Y

2
GND_MAX17480
2 18 AOL1412_ULTRASO-8-RH C0.22u6.3X-RH
+5VRUN ILIM3 CSP2
CSN2 17 PC22
GND_MAX17480
3 36 PC21 1000p50X PR22 GND_MAX17480
PC118 IN3 FBAC1
2200p50X 4 41 PC23 3.01KR1%
PR112 2.2R IN3 PGND PR21 C4700p50X0402 CPU_VDD0_RUN_FB_H 9
PL6 35 PR26 PR34 10R
FBDC1 C2200p50X0402 3.01KR1% 100R
CPU_VDDNB_RUN
1.5U18A15mohm 5 15 PR25 PC26 GND_MAX17480
LX3 FBAC2
1

PC30 PC31 PC34


+

6 LX3
C2.2u10Y C2.2u10Y C1u10X50402-RH PC28 3.01KR1%
PR24
C4700p50X0402
PC121 PR35 C0.1u50Y PC24
2

C220u2.5-RH-2 X_1.1KR1% 7 16 PR23


BST3 FBDC2 C2200p50X0402 10R PR33
PC32 PR27
3.01KR1%
100R
9 OUT3 GNDS1 37
PR39 CPU_VDD0_RUN_FB_L 9
PR28
X_10R5% X_C0.22u25X PC29
X_C1000p50X
10 AGND GNDS2 14 +5V_CTRL 0B 100R

0R0402 1.1KR1% PC25


9 CPU_VDDNB_RUN_FB_H MAX17480
PR38 C4700p50X0402
B B

PC33
C4700p50X0402 GND_MAX17480
GND_MAX17480
CP23
1 2
GND_MAX17480
X_COPPER

GND_MAX17480

A A

MICRO-STAR INT'L CO.,LTD.


Title

CPU CORE PWR


Size Document Number Rev
C 1.0
MS-1684
Date: Monday, June 21, 2010 Sheet 44 of 50

5 4 3 2 1
5 4 3 2 1

CPU_VDDIO_SUS

P5 P6 P7 P9

EC140 EC138 EC135 EC141 EC136 EC139 EC142 EC129 EC127 EC131 EC133 EC128 EC130 EC137 EC132 EC134
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF X_100nF X_100nF X_100nF X_100nF X_100nF X_100nF X_100nF X_100nF

1
1

1
D X_COPPER X_COPPER X_COPPER X_COPPER D

PWR_SRC
P10 P8 P4 P3 P1

EC38 EC39 EC54 EC27 EC46 EC41 EC91 EC98 EC110 EC124 EC105 EC88 EC53 EC42 EC115 EC125 EC94 EC36 EC57 EC126

1
X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF

1
X_COPPER X_COPPER X_COPPER X_COPPER X_COPPER

+5VRUN +3.3VRUN
DC_IN+

EC69 EC55 EC20 EC11 EC112 EC28 EC82 EC35 EC31 EC43 EC21 EC93 EC8 EC16 EC24 EC84
EC81 EC87 EC100 EC103 X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF
X_0.1uF X_0.1uF X_0.1uF X_0.1uF
C C

+1.1VRUN +5VSUS CPU_VDD_RUN +1.8VRUN

EC29 EC40 EC44 EC33 EC34 EC68 EC86 EC101 EC52 EC51 EC50 EC49 EC48 EC47 EC32 EC30 EC102 EC37
X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF X_0.1uF

+VLDT +VBATA

B B

EC45 EC121
X_0.1uF X_0.1uF EC99 EC123
X_0.1uF X_0.1uF

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B EMI 1.0

Date: Monday, June 21, 2010 Sheet 47 of 52


5 4 3 2 1
5 4 3 2 1

HOLES_8X8_D3MM_VIA5 HOLES_8X8_D3MM_VIA8 HOLES_8X8_D3MM_VIA8


MH5
2
X_8x8
4
MH11
9
X_8x8
5
MH13 X_8x8
9 5 CPU WLAN NEW CARD
3 5 2 6 2 6
(NPTH) 6 3 (NPTH) 7 3 (NPTH) 7 H3 MH20_5
4 8 4 8 FRAM1
CPU SCREW HOLE E2M-4410111-RH

1
HOLES_R276D185P_PT
1

1
D D
PCH_ SCREW HOLE
E43-1204004-H29
H5 HOLES_R177D91

2
HOLES_8X8_D3MM_VIA8 HOLES_8X8_D3MM_VIA5 HOLES_8X8_D3MM MH20_8
MH12 X_8x8 MH7 X_8x8 MH4 X_8x8
9 5 2 4 CPU SCREW HOLE

1
2 6 3 5 HOLES_R276D185P_PT MYLAR1
3 (NPTH) 7 (NPTH) 6 (PTH)
4 8 H4 SP1

1
1
E43-1204004-H29
CPU SCREW HOLE
1

1
HOLES_R276D185P_PT MYLAR_MB_NEWCARD
E2P-4311514-Y42

HOLES_8X8_D3MM_VIA5 HOLES_8X8_D3MM_VIA8 HOLES_8X8_D3MM_VIA3


MH6 X_8x8 MH1 X_8x8 MH8 X_8x8
2
3
4
5
9
2
5
6
2 3
4
JCPU1 PCH_ SCREW HOLE PCH_ SCREW HOLE SB
(NPTH) 6 3 (NPTH) 7 (NPTH)
HOLES_R193D138_PT HOLES_R193D138_PT MH20_12 FRAM2
4 8 MH20_11
C C
1

SB_SINK
H1 H2 E31-0403231-TA9

1
CPU_SOCKET E43-1203003-G68
E2M-6710411-Y31 E43-1203003-G68

HOLES_8X8_D3MM_VIA3
MH2 X_8x8
2 3
4
(NPTH)

MYLAR5 MYLAR6
1

[Fuqun] ME add in 2010-05-18

FM3 FM2 TP_MODULE_RUBBER TP_MODULE_RUBBER


B FM20 FM1 1 1 E2Y-6810911-Y40 E2Y-6810911-Y40 B

X_F_PAD_M100 X_F_PAD_M100

FM4 FM7 FM17 FM5


FOR HDD
1 1 PCB1 HDMI_LOGO1 AMI_LOGO1
X_F_PAD_M100 X_F_PAD_M100 BAT1 MYLAR2

HDMI AMI
FM24 FM8 LOGO LOGO
X_F_PAD_M100 X_F_PAD_M100 FM23 FM10 RTC_BAT MYLAR_MB_HDD
1 1 D06-0100300-K26 E2P-6812411-G40
PCB LABEL LABEL
FM21 FM22

X_F_PAD_M120 X_F_PAD_M120

FM12 FM6
FOR DDR FOR LED
FM9 FM11 1 1
MYLAR3 MYLAR4
A X_F_PAD_M120 X_F_PAD_M120 A
[Fuqun] Add in 1.0

[Fuqun] ME change in 2010-05-18 MICRO-STAR INT'L CO.,LTD


FM26 FM25 FM27 MYLAR_MB_DDR MYLAR_MB_LED
1 1 1 E2P-6831411-G40 E2M-6812921-Y42 MS-168x
MSI
Size Document Description Rev
B ME 1.0

Date: Monday, June 21, 2010 Sheet 48 of 52


5 4 3 2 1
5 4 3 2 1

Single ended
Differential signal
SIP25 SIP23
L6_10mil_40ohm L4_8.5mil_40ohm
SIP15 SIP10
L1_DIFF_5/4.5/5_85 Ohm- L3_DIFF_4.5/5.5/4.5_85 Ohm-
X_PIN1*2 X_PIN1*2 L1_DIFF_5/4.5/5_85 Ohm+ L3_DIFF_4.5/5.5/4.5_85 Ohm+
D D
SIP11 SIP16
X_H1X4_black-RH X_H1X4_black-RH
L1_10mil_40ohm L3_8.5mil_40ohm
SIP32 SIP19
L6_DIFF_5/4.5/5_85 Ohm- L4_DIFF_4.5/5.5/4.5_85 Ohm-
X_PIN1*2 X_PIN1*2 L6_DIFF_5/4.5/5_85 Ohm+ L4_DIFF_4.5/5.5/4.5_85 Ohm+

X_H1X4_black-RH X_H1X4_black-RH

SIP28 SIP21
L6_6.5mil_50ohm L4_5.5mil_50ohm

SIP6 SIP7
X_PIN1*2 X_PIN1*2 L1_DIFF_5/5/5_90 Ohm- L3_DIFF_5/6/5_90 Ohm-
L1_DIFF_5/5/5_90 Ohm+ L3_DIFF_5/6/5_90 Ohm+

SIP9 SIP1
X_H1X4_black-RH X_H1X4_black-RH
L1_6.5mil_50ohm L3_5.5mil_50ohm
C SIP29 SIP18 C

L6_DIFF_5/5/5_90 Ohm- L4_DIFF_5/6/5_90 Ohm-


X_PIN1*2 X_PIN1*2 L6_DIFF_5/5/5_90 Ohm+ L4_DIFF_5/6/5_90 Ohm+

X_H1X4_black-RH X_H1X4_black-RH

SIP2 SIP3
L1_DIFF_4.5/5/4.5_93 Ohm- L3_DIFF_4.5/7/4.5_93 Ohm-
L1_DIFF_4.5/5/4.5_93 Ohm+ L3_DIFF_4.5/7/4.5_93 Ohm+
SIP27 SIP20
L6_5mil_55ohm L4_4.5mil_55ohm X_H1X4_black-RH X_H1X4_black-RH

X_PIN1*2 X_PIN1*2 SIP31 SIP24


L6_DIFF_4.5/5/4.5_93 Ohm- L4_DIFF_4.5/7/4.5_93 Ohm-
SIP13
L6_DIFF_4.5/5/4.5_93 Ohm+ L4_DIFF_4.5/7/4.5_93 Ohm+
SIP12
B L3_4.5mil_55ohm B
L1_5mil_55ohm
X_H1X4_black-RH X_H1X4_black-RH
X_PIN1*2
X_PIN1*2

SIP4 SIP5
L1_DIFF_4/7/4_100 Ohm- L3_DIFF_4/8/4_100 Ohm-
L1_DIFF_4/7/4_100 Ohm+ L3_DIFF_4/8/4_100 Ohm+
SIP26 SIP22
L6_4mil_60ohm L4_4mil_60ohm X_H1X4_black-RH X_H1X4_black-RH

SIP30 SIP17
X_PIN1*2 X_PIN1*2 L6_DIFF_4/7/4_100 Ohm- L4_DIFF_4/8/4_100 Ohm-
L6_DIFF_4/7/4_100 Ohm+ L4_DIFF_4/8/4_100 Ohm+

SIP14 SIP8
X_H1X4_black-RH X_H1X4_black-RH
L3_4mil_60ohm L1_4mil_60ohm
A A

X_PIN1*2 X_PIN1*2
MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
B IMPEDANCE 1.0

Date: Monday, June 21, 2010 Sheet 49 of 52


5 4 3 2 1
5 4 3 2 1

+1.1DUAL_PWRGD
+3.3VALW
+3.3VDUAL
3
V3V5_DUAL_PWRGD PWRGD

D
EC 1 MAX1533 +5VDUAL
2 PWRGD
+1.1VDUAL
D

SMSC VDD_DUAL_EN_EC +1.1VEN

MAX8717 +1.8V

PWR_BTN#_EC +1.8VEN
4 VDDIO_SUS
PWRGD

SLP_S5#
5 MAX8632
SB800 5
VTT

SLP_S3# VDDIO_SUS +1.5V

5 5
1V8_PWRGD SWITCH
+5VDUAL +5V
(OPTION)

SLP_S3# SWITCH 7 CPU_VDDA_RUN

+3.3VDUAL +3.3V
6 MAX1935 CPU_VDD_RUN +1.5V

C LDO VDDA_PWRGD
8 9 C
EN MAX 17009 1V8_PWRGD
PWRGD MAX1714
CPU_VDDNB_RUN
9
MAX 8792
PWRGD

VRM_PWRGD
CPU_VDDR
9
Power on Sequence required: AOZ1024 +1.1VDUAL
+1.1V
SB800:
1, +3.3VDUAL ramp before +1.1VDUAL 10 VRM_PWRGD SWITCH
2, +3.3V ramp before +1.8v
3, +1.8V ramp before +1.1v 1V8_PWRGD
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS

RS880: VCC_NB

B
1, 0 <(+3.3V) - (+1.8v) < 2.1 10 VRM_PWRGD B
2, +1.8V ramp before +1.1v
3. +1.1V ramp before VCC_NB
MAX8775
VLDT

A A

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom POWER SEQUENCE 1.0

Date: Monday, June 21, 2010 Sheet 50 of 52


5 4 3 2 1
5 4 3 2 1

JUSBA1 USBA1

10

5
D D
1 1
2
3 2
4 USBP5P_CARD
5 USBP5N_CARD 3
6
7 +USB5V_A 4
8
ECA1 CA1

1
+
X_0.1U10X0402

6
C100u6.3pSO
9

2
FPC8P-B-0.5PITCH_WHITE-RH

GNDA USBASM_BLACK-RH-5
GNDA

GNDA
C C

USBP5P_CARD

EL1
4 1

3 2

USBP5N_CARD

X_CMC-L12-9008010-RH
MH3 HOLES_8X8_D3MM_VIA5
X_2.21x2.21 MH14 X_8x8
B B
2 4 EMI
3 5
(PTH) (NPTH) 6
1

FMA2
PCB2 FM13 1
X_F_PAD_M120

A A
FMA1
FM15 1
MICRO-STAR INT'L CO.,LTD
PCBA X_F_PAD_M120
MSI MS-168x
Size Document Description Rev
Custom MS-168xA 1.0

Date: Monday, June 21, 2010 Sheet 51 of 52


5 4 3 2 1
5 4 3 2 1

LCHBD2

13
SA1
SW-TACTB1-6PS

B A PWR_SW#_B
D D
D C

2
ED1

FPC12P-B-0.5PITCH_WHITE-RH-3
ESD PWR_SW#_B 12

E
F
11
[Fuqun] EMI add in 2010-05-18 10

1
9
8
POWER_LED#_B 7
+5VALW_B 6
5
4
EC62 3
X_0.1uF 2
1
EMI
LED10

LED04-B-20mA3.8V_3216-RH
+5VALW_B 1 2 POWER_LED#_B

D0C-04018F0-L05

14
C C

GNDB

[Fuqun] Remove hot-key in 1.0

PCB3
MYLARB1 MYLARB2

MYLAR_BUTTOM_TOP MYLAR_BUTTOM_TOP
B E2M-6811111-G40 E2P-6811313-Y42 B
PCBB

X_HOLES_r177d91 X_HOLES_r177d91
FM16 FM14

X_F_PAD_M120 X_F_PAD_M120

HC1 HC2
1

1
X_1_5mm X_1_5mm
FM18 FM19

X_F_PAD_M120 X_F_PAD_M120

A A
MH9 MH10
1

MICRO-STAR INT'L CO.,LTD

MSI
MS-168x
Size Document Description Rev
Custom MS-168xB 1.0

Date: Monday, June 21, 2010 Sheet 52 of 52


5 4 3 2 1

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