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Q8:

a) Evaluate the following arithmetic expression using 1, 2, 3-address instruction:

F= (A+B)*(C+D)

Answer:

Case 1: Using 1 address Instruction

Sr. No.

Instruction

Interpretation

  • 1 LOAD D

acc

acc

D

  • 2 ADD

C

acc

acc

C+D

  • 3 STORE T

T

T acc

acc

  • 4 LOAD A

acc

acc

A

  • 5 ADD

B

acc

acc

A+B

  • 6 MPY T

acc

acc

(A+B)*(C+D)

  • 7 STORE Y

Y

Y (A+B)*(C+D)

(A+B)*(C+D)

Case 2: Using 3 address Instruction

Sr. No.

Instruction

Interpretation

  • 1 MOV Y,D

Y

  • D

  • 2 ADD

Y,C

  • C+D

Y

  • 3 MOV T,B

T

3 MOV T,B T B

B

  • 4 ADD

T,A

T

  • A+B

  • 5 MPY T,Y

T

  • (A+B)*(C+D)

Case 2: Using 3 address Instruction

Sr. No.

Instruction

Interpretation

  • 1 ADD Y,C,D

Y

  • C+D

  • 2 T,A,B

ADD

 
  • A+B

T

  • 3 MPY T,Y,T

T

3 MPY T,Y,T T (A+B)*(C+D)

(A+B)*(C+D)

b) Briefly explain the different address modes.

Answer: The method of specifying source of operand and output of result in an instruction is known as addressing mode.

The address field modes are as follows Immediate Direct Indirect Register Register indirect Displacement Stack

  • 1. Register Addressing Mode: In this addressing mode, the source of data or destination of result is Register. In this type of addressing mode the name of the register is given in the instruction where the data to be read or result is to be stored. Example: ADD A, R5 (The instruction will do the addition of data in Accumulator with data in register R5)

  • 2. Direct Addressing Mode: In this type of Addressing Mode, the address of data to be read is directly given in the instruction. In case, for storing result the address given in instruction is used to store the result. Example: MOV A, 46H ( This instruction will move the contents of memory location 46H to Accumulator)

  • 3. Register Indirect Addressing Mode: In Register Indirect Addressing Mode, as its name suggests the data is read or stored in register indirectly. That is, we provide the register in the instruction, in which the address of the other register is stored or which points to other register where data is stored or to be stored. Example: EA = (R) (This instruction will move the data to accumulator from the register whose address is stored in register R0).

  • 4. Immediate Addressing Mode: In Immediate Addressing Mode, the data immediately follows the instruction. This means that data to be used is already given in the instruction itself. Example: MOV A, #25H (This instruction will move the

data 25H to Accumulator. The # sign shows that preceding term is data, not the address.)

EA = actual (effective) address of the location containing the referenced operand

R = contents of an address field in the instruction that refers to a register

A = contents of an address field in the instruction

MODES

ALGORITHM

Immediate

OPERAND=A

Direct Addressing

EA = A

Indirect

EA = (A)

Addressing

Register direct

EA = R

Register Indirect

EA = (R)

Displacement

EA = A + (R)

Addressing

Stack Addressing

EA = TOP OF THE

STACK

c) What is virtual memory and why is it called virtual?

Answer: Virtual memory is feature that helps us to run a long program in a small physical memory. OS manages the big program by keeping only part of it in main memory and using the secondary memory for keeping the full program. The main memory space of the processor is not sufficient to run the large program. The physical main memory size is kept small to reduce the cost though the large processors has large logical memory space. It is called virtual as it gives programmer “ILLUSION” that a large memory space is at their disposal but actual memory is very small.

Q9. a) What do you mean by logical address space and physical address Space?

Answer: When a program needs to be executed, the CPU would generate addresses, called logical addresses. The corresponding addresses in the physical memory, as occupied

by the executing program, are called physical addresses. The set of all logical addresses generated by the CPU or program is called Logical address space and the set of all physical address corresponding to these addresses is called physical address space.

b) Explain with an example how logical address is converted into physical address and explain how page replacement takes place.

Answer: Logical Address is a reference to a memory location independent of the current assignment of data to memory – a translation must be made to a physical address before memory access can be achieved.

Physical Address is an actual location in main memory

Page addressing: Memory address translation takes place at run time. Reading a word from memory involves translating a virtual or logical address, consisting of a page number and offset, into an actual physical address, consisting of a frame number and offset. This process will make use of the Page Table entries.

Logical address address

Physical

Page

Offset

Logical address address Physical Page Offset Frame Offset If the system used 16 bits then it

Frame

Offset

If the system used 16 bits then it could utilize memory in this fashion:

15

00101

00000101

10

0

Page no

Displacement

With this set up the system would have 32 pages (2 5 ) each with 2048 bytes(2 11 ) Example If a logical address of

0010100000101010 was encountered this will represent

offset

42 on page 5. The Page table would be accessed to see the Mapping of page 5.

logical address

00101 0000010 10111 00000101 Physical address Page Table 01111 00101 00001 00011 10111
00101
0000010
10111
00000101
Physical address
Page Table
01111
00101
00001
00011
10111
Page Replacement : When a program starts execution, one or more pages are brought to the

Page Replacement: When a program starts execution, one or more pages are brought to the main memory and the page table is responsible to indicate their positions. When the CPU needs a particular page for execution and that page is not in physical memory, this situation is page fault. When the page fault occurs, the execution of the present program is suspended until the required page is brought into main memory from secondary memory. The required page replaces page is brought into main memory into secondary memory. The required page replaces an existing page in the page in the main memory, thus when a page fault occurs, a page replacement is needed to select one of the existing pages to make the room for the required page. There are several replacement algorithm 1.First in First out algorithm is simplest and its criterion is select one of the existing that has been in the main memory for longest period of time.

2. Least Recently Used algorithm selects a page for replacement, if the page has not been used often in the past.

3.Optical algorithm gives the lowest page faults of all algorithm and its criterion is replace a page that will not be used for the longest period of time.

  • c) Define seek time and rotational latency for magnetic

disk.

Answer: Seek Time: When anything is read or written to a disc drive, the read/write head of the disc needs to move to the right position. The actual physical positioning of the read/write head of the disc is called seeking. The amount of time that it takes the read/write head of the disc to move from one part of the disk to another is called the seek time. The seek time can differ for a given disc due to the varying distance from the start point to where the read/write head has been instructed to go. Because of these variables, seek time is generally measured as an average seek time

Rotational Latency: The amount of time it takes for the desired sector of a disk (i.e., the sector from which data is to be read or written) to rotate under the read-write heads of the disk drive. The average rotational latency for a disk is half the amount of time it takes for the disk to make one revolution

  • d) A disk pack has 20 recording surfaces and has a total

4000 cylinders. There is an average of 300 sectors per

track. Each sector contains 512 byte of data.

1) What is the maximum number bytes can be stored in this pack?

Answer:

Total size = cylinders * surfaces * sectors per track * 512 byte

=20*300*4000*512

=11.44 GB

2) What is the data transfer in bytes per second at a rotational speed of 3600rpm?

Answer: Data transfer=sectors per track/rotation time =300*512 /16.67 ms = 8.787 Mb/sec

Q10. a) Apply booths algorithm to multiply the two numbers +14 and -12.

Answer:

Booth’s Algorithm: It is a method of multiplication of two signed numbers in 2’s complement form.

The general procedure are:

We have (+14)*(-12) Now the multiplier is (-12)

Multiplicand=14

Binary:

Steps

Accumulator

Accumulator

Multiplier(Q)

Q -1

operations

0,n=5

A: 0 Q-1=0 Counter :n=5

00000

10100

0

1,n=4

No-operation, Right Shift, Maintain MSB of Acc.

00000

01010

0

n=4

2,n=3

No-operation, Right Shift, Maintain MSB of Acc.

     

n=3

00000

00101

0

3,n=2

A=A-M Right Shift, Maintain MSB of Acc.

10010

  • 00101 0

 

11001

  • 00010 1

n=2

4,n=1

A=A+M Right Shift,

00111

  • 00010 1

 

Maintain MSB of Acc

00011

  • 10001 0

n=1

5,n=0

A=A-M Right Shift,

10101

  • 10001 0

 

Maintain MSB of Acc.

11010

  • 11000 1

n=0

M: 14= 01110,

Q: (-12) =10100

Product: Output: 11010 11000

2’s complement o/p: 0010101000=i.e. the value is

168(magnitude)

b) What is the limitation of direct mapping method? Explain with example how it can be improved by set associative mapping?

Answer:

Limitations: Each block of main memory maps to a fixed location in the cache; therefore, if two different blocks map to the same location in cache and they are continually referenced, the two blocks will be continually swapped in and out (known as thrashing).

The disadvantage of direct mapping is that two words with same index but different tag cannot be stored into cache at the same time.

As an improvement to this disadvantage of direct mapping, a third type of cache organization called set associative mapping is used.

In this mapping process, each word of a cache can store two or more words of main memory under the same index address. Each data word is stored along with its tag and the number of tag data pair in one word of cache is said to form a set. An example of set associative cache organization with set size of two is shown in figure.

Index

ta

Data

Tag

Data

g

 
  • 0000110010 00 10101010

01

10010110

 
  • 0000111011 11 11000011

10

11000011

 
 

E.g.:

The words stored at address 000000110010 and 010000110010 of main memory are stored in cache memory at index address 0000110010. Similarly, the words stored at address 010000111011 and 100000111011 of main memory are stored in cache memory at index address 0000111011.

When CPU generates a memory request, the word is searched into cache with the help of index addresses.

  • c) Use 8 bit 2’s complement integer to perform -34 + (-

12).

Answer: In 2’s complement representation

-34=1101 1110

,-12=1111 0100

Adding this we get 1101 0010.

  • d) What is tri-state buffer? Design a common bus system

using tri state buffer for two registers of 4 bit each.

Answer: A tri-state buffer has two inputs: a data input x and a control input c. The control input acts like a valve. When the control input is active, the output is the input. That is, it behaves just like a normal buffer.

When it's not active, the output of the device is Z, which is high-impedance or, equivalently, nothing. This is when the "control line" is not active, and no electrical signal is allowed to pass to the output.

enable

When CPU generates a memory request, the word is searched into cache with the help of

Active low enable

active high
active high
REGISTER A DA Q3A DB Q3B DC Q3C DD Q4C Q3D Q4D 4 1 CP 2
REGISTER A
DA
Q3A
DB
Q3B
DC
Q3C
DD
Q4C
Q3D
Q4D
4
1
CP
2
3
4
1
2
3
4
REGISTER B
1
2
DA
Q3A
DB
Q3B
DC
Q3C
3
DD
Q4C
Q3D
Q4D
CP
4
control line
U6A

e) What is serial adder? Discuss it briefly with diagram.

Answer: A serial adder is used to add binary numbers in serial form.

The two binary numbers to be added serially are stored in two shift registers A and B. Bits are added one pair at a time through a single full adder circuit. The carry out of the full adder is transferred to a D flip-flop. The output of this flip-flop is then used as the carry input for the next pair of significant bits. The sum bit from the S output of the full adder could be transferred to a third shift register. By shifting the sum into A while the bits of A are shifted out, it is possible to use one

register for storing augend and the sum bits. The serial input register B can be used to transfer a new binary while the addend bits are shifted out during the addition.

register for storing augend and the sum bits. The serial input register B can be used