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Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or
service names are the property of their respective owners. Freescale Semiconductor, Inc. 2009.
Display Spectrum
Monochrome, Cost-Effective Color Graphic Displays
Segment LCD Displays
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Segment LCD Control
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Segment Display MCU Solution Considerations
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How Freescale Beats the LCD Design Challenge
Challenge Freescale Solutions
1. Too many pins required to drive many segments 1. Total
1. Too many pins required to drive many segments
of 8 backplanes
52 pins required for 192 segments in 4x48 mode 32 pins required for 192 segments in 8x24 mode
44 pins required for 160 segments in 4x40 mode 28 pins required for 160 segments in 8x20 mode
29 pins required for 100 segments in 4x25 mode 17 pins required for 104 segments in 8x13 mode
3. Layout is very complex because the frontplanes 3. Frontplane and backplane re-assignments
(FPs) and backplanes (BPs) are fixed in pin-outs
FPs and BPs are commonly distributed on all sides of the FP and BP can be software selectable to be either FP or BP,
microcontroller making board layout an easier task and very flexible for changes
Special device placement and layout must be performed to reduce
electromagnetic interference (EMI) and shorten communication
lines between the microcontroller and the LCD display
Result: complex layout, and time consuming
4. LCD glass requires many voltages, and voltage 4. Internal charge pump provides all voltages
divider resistor ladders consume too much power required to power up LCD glass
Battery voltage drops over the time to the point where displays Internal software selectable regulated power supply that keeps
suffers degradation by not having the optimum voltage levels constant voltage across LCD glass to avoid degradation
LL16 offers 4 bits resolution trim to adjust contrast control
(Only for S08 and V1 cores)
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Back or Front Panel Options
LCD Block
Up to
8 BP
Up to
31 FP
KEY FEATURE:
Up to 8 back panels means you can
drive more segments with fewer pins
BP1
BP2
BP3
BP4
LCD Redundancy to
Block BP Redundancy FP Redundancy
BP1 increase reliability
BP2
BP3
BP4
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Current and Future of LCD Segment Microcontrollers
256K 3V, low-power, high-performance
NEW NEW
Thermostat/Metering/Medical
3V, ultra-low-power
64K NEW
Portable Medical/T-stat/Metering
36K NEW NEW
S08LL16 S08LL16
16K 8x24=192
8x16=128
8K S08LL8
8x16=128
16K S08LG16
8x29=232
RS08LA8
8K 8x21=168
4K RS08LE4
8x14=112
28Pin 48Pin 64Pin 80Pin 100Pin 144Pin
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Explore New Segment LCD Solutions
Segment LCD Solutions Key Features and Benefits
LL16/8 offers Freescales ultra-low-power technology at
1.8V with winning features, such as 20MHz CPU, flash
S08LL16/8 reprogramming and ADC accuracy. Intended for low-power
and portable applications, such as thermostats and blood
glucose meters.
The LA8 is a cost-effective MCU that features 6-channel
9RS08LA8 10-bit ADC, analog comparator, internal charge pump and
internal oscillator.
The LE4 has the RS08 core, which provides 8-channel 10-
9RS08LE4 bit ADC in 28-pin SOIC package options for small
appliances and meters.
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9S08LL16
LCD Driver 9S08LL16 Packages
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Product Comparison: MC9S08LL16 vs TI MSP430
TI FSL
Segments %
Configuration MSP430F S08LL16
Configuration Improvement
IDD IDD
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Graphics and Video LCD Control
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Graphic Display System Considerations
Display Resolution
Screen size?
Resolution?
Color depth?
Memory requirements?
Basic LCD System Design
System Cost
Package type?
Power management?
Video, Graphic Support
Frame rate?
2D or 3D? Animation?
Availability of video CODECs?
Operating System
Linux, WinCE, or RTOS?
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Display Size
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What is a Pixel?
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Resolution
Usually described as r * c
r is # of pixels across the screen
c is # of pixels down the screen
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Aspect Ratio
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Color Depth
Color depth or bit depth, is a computer graphics term describing the
number of bits used to represent the color of a single pixel in a
bitmapped image or video frame buffer. This concept is also known as
bits per pixel (bpp), particularly when specified along with the number
of bits used. Higher color depth gives a broader range of distinct
colors. Wikipedia Color Depth
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LCD Memory Requirements
Memory Size
The panel size and bits per pixel determine the amount of memory needed
to hold the graphic buffer.
In some cases, twice as much memory (or more might be needed). It is
typical to use one graphic buffer to store the current image while a second
buffer containing the next image is prepared.
Panel Total bpp Required
Resolution Pixels (MemoryPP) Memory
320x240 (QVGA) 76.8K 18bpp (32bpp) 307.2KB
16/12bpp (16bpp) 153.6KB
8bpp (8bpp) 76.8KB
4bpp (4bpp) 38.4KB
2bpp (2bpp) 19.2KB
1bpp (1bpp) 9.6KB
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Basic Architecture of Graphics System
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Intelligent Chip on Glass Graphical LCD Application
System components SPI LCD Driven
Standard 8-, 16- or 32-bit MCU
Can be driven from any MCU
Advantages
Quick and easy to implement SPI
Can use any standard MCU
MCU
COG
Disadvantages Controller
Can perform only limited Chip on glass LCD
animation with integrated
LCD panel sizes limited to or display RAM
VGA maximum (at time of
writing)
Graphic images limited by 8bit parallel
MCU flash size
MCU
System cost (excluding LCD) COG
< $5 Controller
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Traditional Multi-chip Graphical LCD Application
System Components: Traditional LCD Driver
MPU
External flash Requires a dedicated LCD controller
External RAM
External Ethernet & USB
external graphics controller IC
MPU
Advantages
Ability to support large displays MPU bus
Support for complex o/s, eg Linux Graphics
Controller
Disadvantages Display
Cost Interface
Insecurity of memory supply
External bus bandwidth RAM
Remaining processor capacity
Package size and assembly costs
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Multi-chip MPU with Integrated LCD Controller
System Components: Traditional LCD Driver
MPU Requires a dedicated LCD controller
External flash
External RAM Graphical/Media
External Ethernet & USB Processor or
Accelerator
Advantages
Ability to support large displays MPU
Support for complex O/S, eg Linux Display
Internal graphics controller IC Controller
Display
MPU bus Interface
Disadvantages
Cost
RAM
External bus bandwidth
Remaining processor capacity
Package size & assembly costs
Program code
System cost (excluding LCD)
> $20
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Smart vs Dumb LCD Panels and Bus Requirements
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Other System Cost Factors
Memory support
Does the device have internal RAM?
What types of memory are supported? DDR2, DDR3, etc?
What options are available for large data storage memory?
System design
Do you have experience laying out high-speed data buses?
Multi-layer boards?
Do you need a power management device for this processor?
Display interface
What display interface are you planning to use? RGB, LVDS, or RSDS?
You may want to consider VGA, DVI, HDMI, or display port
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Video Overview
Hardware support
System must be able to decode video file and load the frame buffer
Some solutions have hardware to assist with video decoding
Storage size and memory transfer speeds must also be considered
Software support
Codec support is referred to as middleware and is a separated from the O/S
H.264 is a common video compression for embedded products
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Vector Graphics Overview
Vector Graphics is the use of primitives (points, lines, curves)
based on equations to represent an image
Advantage: Scalability
Vector Graphics provide easy scalability including:
High-quality rendering
Included anti-aliasing
Multiple screen size support without multiple bit maps
Great for navigation applications
2D vs 3D
Todays popular applications (iPhone) are 2D graphics
2D graphics accelerators can provide 3D look and feel
3D accelerators offer shading and depth
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OpenVG vs OpenGL ES
OpenVG
Accurately represents
SHAPE and
COLOR
OpenGL ES
Accurately represents
PERSPECTIVE and
LIGHTING
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OpenGL ES vs OpenVG
High-quality 2D
graphics using
OpenVG
High-quality 3D
graphics using
OpenGL ES
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A codec is a device or computer program Sample of Codec Portfolio
capable of encoding and/or decoding a
digital data stream or signal.
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Example of i.MX Multimedia Software Development Kit
Please note that third-party support varies across the product families.
For more details, please refer to the product summary pages on freescale.com.
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Ecosystem
GNU Tools
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Freescale Graphics Enabled Processors
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Freescale MCU/MPU Options with LCD
Family based on ColdFire architecture
Linux, RTOS options
$6-$14, QFP & BGA package options
Up to 240 MHz, USB, Ethernet, CAN, 12-bit A/D with
touch control option
Up to SVGA (800x600), < 0.5W
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Freescale Graphical LCD Portfolio
MPC8610
>400 MHz
Up to SXGA
Graphics and/or video
acceleration i.MX51x
D1 HD video MPC5121e/23
2.5 or 3D graphics
Video CODECs i.MX35x
i.MX31x
MPC51xx
>260 MHz
Up to SVGA i.MX27x
Video acceleration
D1 video i.MX25x
Video playback
Video CODECs i.MX23x
2009
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MCF5227x Family
The ColdFire MCF5227x family provides an easy
way to add support for graphical LCD interfaces to BDM PLL GPI/O JTAG
systems
SVGA LCD 8x12-bit ADC
USB otg UART
Controller Touchscreen
SVGA LCD and touch screen controller integration
simplifies the system and reduces cost. 4ch
16ch DMA DSPI UART
PWM
EMAC
System Bus
Serial boot flash, flexible external bus and on-chip ColdFire
Controller
SDRAM
touch screen controllers reduce overall system cost Core Controller
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i.MX233 Applications Processor
Key Features and Advantages
Ext Memory I/F
454-480MHz ARM926EJ-S core Standard Power Management
Connectivity NAND
LCD Parameters??? DC/DC 4.2V LD0 x 4
PMU with high-efficiency on-chip DC/DC with I2 C
Battery Charger BCH 20-bit
4.2V output, supports Li-Ion batteries SPI x 2
ECC8
Very low video and audio power consumption UART x 3
DDR1
1.5W mono speaker amplifier 12-bit ADC x 6 i.MX233
Stereo headphone DAC w/ 99dB SNR & ARM926EJ-S
mDDR
HS USB Phy
stereo ADC w/ 85 dB SNR with integrated 454MHz Internal Memory
amplifiers GPIO
32KB SRAM
NAND support SLC/MLC and managed
Audio 16K I 16K D 64KB ROM
Hardware BCH (up to 20-bit correction) and
I2 S x2 Cache Cache
RS ECC8 for current and future MLC NAND Ext Storage
support S/PDIF Tx MMC+/SD x 2
DDR1 support with integrated 2.5V regulator 1.5W Mono
Security
High-speed USB with embedded PHY Speaker Amp DRM Unique ID OTP AES Key User I/F
LCD Controller
Stereo ADC/DAC 128-bit AES SHA-1 Hashing
Package and Temperature with Amp Touchscreen
Standard System
169fpBGA 11x11mm .8mm Scaling
Timer x 4 PWM x 5
128LQFP 14x14mm* Multimedia
Alpha Blending
-10 to +70C (Consumer) 10-bit Video DAC Watch Dog SDMA
Rotation
-40C to +85C (Industrial) PAL/NTSC
Analog System Debug Color Space
TV Encoder ETM SJTAG Conversion
Availability:
Samples: Alpha Q109, Beta Q209
Production: Q309 BGA, *LQFP TBD
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Key Features and Advantages i.MX25 Applications Processor
400MHz ARM926EJ-S core
SVGA, 262k colors
10/100 Ethernet MAC with RMII support Ext Storage Advanced Connectivity Ext Memory I/F
Two on-chip USB ports with PHY MMC+/SD x2
10/100 Ethernet HS OTG + Phy NAND
High-speed USB OTG with HS PHY
High-speed USB Host with FS PHY P-ATA
CAN x 2 HS Host + Phy NOR
128KB on-chip SRAM for low power LCD refresh CE-ATA
3 general purpose 12-bit ADC channels SDIO x 2 Smartcard x 2 DDR2
Touch screen controller Int Memory mDDR
Two CAN interfaces 128KB SRAM SDRAM
Two smartcard interfaces i.MX258
Enhanced serial audio interface 32KB ROM ARM926EJ-S
External memory interface: User I/F
400MHz
133 MHz 16-bit 1.8V mobile DDR and DDR2 Standard LCD Controller
133 MHz 16-bit 3.3V SDRAM Connectivity
8-/16-bit NAND or NOR
16K I 16K D Touchscreen
3.3V I/O reduces external component count I2 C x3 Cache Cache
CMOS Sensor I/F
Enhanced security features, including tamper CSPI x 3
detection for voltage, frequency and temperature System Debug 8x8 Keypad
UART x 5
High-Assurance Boot (HAB) ETM SJTAG SLCD Controller
GPIO x 4
Availability
Alpha/Beta samples: Now
General availability: 6/22/2009
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i.MX35 Applications Processor
Specifications
System Control Connectivity
CPU: ARM1136JF-S, 400/532 MHz i.MX356
JTAG, ETM 2 x CSPI
Process: CMOS90LP
CPU Complex 2 x SSI/I2S
Core Voltage: 1.22-1.47V@400MHz, - Bootstrap
Smart Speed
40/85C, TBD@532 MHz System Reset
ARM1136 CPU
Switch (MAX) ESAI
Package: 400 ball 0.8mm BGA 3 x I2C
PLL & 16KB 16KB 128KB
Power Mgmt i-cache d-cache L2-cache
3 x UART
i.MX35 Value Proposition 32KB Boot ROM 128KB
USB HS Host
Multimedia & 2KB Secure RAM SRAM
24-bit interface to WVGA (800 x 480) TFT Human Interface
FS-PHY or ULPI
Vector Floating
displays Point Unit USB HS OTG
8x8 Keypad w/ HS-PHY
IPU - Image Processing Unit
Supports mirroring, rotation, image combining (2 ASRC Special S/PDIF I/O
Standard
planes), color space conversion. Functions System I/O
OpenVG 1.1 2 x FlexCAN
OpenVG vector graphics processor (i.MX356) 2.5D Accel. Security HW
Image
sDMA MLB
Enhanced audio peripherals multi-channel audio, Processing Unit
External 3 x Timers Ethernet
S/PDIF, sample rate conversion Inversion and
Memory
Rotation PWM 1-Wire
Flexible memory support SDRAM
Pre & Post 2 x SDIO/MMC
SDRAM 16/32 bit, 133 MHz mSDRAM WD Timer
Processing
mDDR
DDR2 16/32 bit, 266MHz SDIO/
Camera I/F DDR2 RTC
SLC/MLC NAND Memory Stick
NOR
Connectivity enhancements Blending SLC NAND GPIO PATA
MLC NAND
CAN (x2) and MLB (MOST) Display Ctrl CE-ATA
USB PHY integration
10/100 Ethernet
Inherited from i.MX31 New or enhanced from i.MX31
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i.MX51 Applications Processor
Specifications: System
CPU: Cortex A8, up to 1GHz Control i.MX515 Connectivity
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High-performance Power Architecture solution MPC5121e / MPC5123
at a cost-effective/power-efficient point, which
includes an MMU to enables full O/S (Linux) BDM
Temp Chip ID GPI/O
JTAG
Sensor 256-bit OTP x32
support.
PCI-2.3 ATA/ATAPI-6 SATA CAN x4
Display / processing support 66MHz UDMA-5 1.5G PHY J1850
Display interface supporting WXGA / 720p, 24-bit color
Network / audio acceleration, DSP-C programmable 10/100 USB2 OTG
SDHC S/PDIF
Enet MAC x2
OpenGL / OpenVG graphics acceleration (MPC5121e)
ITU-656 video input LCD Video Input Timer x8
PSC x12
Controller ITU-656 16-bit
Rich set of connectivity
12x flexible PSC (SPI, UART, AC97, I2S, Multi-Ch TDM) Graphics Net / Audio DMA
I2C x3
Accelerator Accelerator 64-ch
4x CAN2.0 A/B, supports data rates in excess of 1Mbs
Cost-effective / low-power memory system support 32K 32K 128K
Bootable NAND flash interface I-Cache D-Cache SRAM
- ECC corrects up to 4 errors (MLC support)
- Fully pipelined ECC operating at NAND speeds
DRAM Ctrlr
Flash Ctrlr
Power
DP-FPU
NAND
MMU
- Bootable interface
DDR
Architecture 42-bit
e300c4 LPC
DRAM interface (high-bandwidth, low-latency)
- 32/16-bit DDR2 support (low-cost)
- 32/16-bit MobileDDR support (low-power)
800 Dhrystone 2.1 MIPS @ 400 MHz
Low power Packages: 324 PBGA, 27x27mm, 1mm pitch
Total system power is typically <2W @400MHz Price: sub-$23/22 @ 10k qty
Hibernation power down mode <25uW Sampling now, production ramp April 2009
ADS512101 development board $999
MPlus5121 development platform $3495
3rd party boards listed on MPC5121e webpage
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MPC8610 Block Diagram and Features
e600 Power Architecture CPU
Integrated Host Processor
667 MHz 1.33 GHz e600 core
256 KB on-chip backside L2 Cache with ECC
AltiVec vector processor for image processing
Double precision FPU, 4 x integer units
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Freescale Introduces Product Longevity Program
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Q&A
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LCD Driving Solutions
GPIO
LED
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Using Blink Mode
1- Blinking to a blank screen turns all segments off, leading to lower standby current for the time that the screen is
blank
78C 78C
Stop Mode
2 - Using the alternate blink mode allows the application to remain in Stop mode for longer periods of time.
Example: Using alternate display to show time across 2 seconds
WITHOUT ALT
7:01:54 7:01:55
BLINK Stop Mode
WITH ALT
BLINK
7:01:54 7:01:55
Stop Mode
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LCD Memory Requirements (continued)
Panel Resolution Pixels BPP (MemoryPP) Required Memory
640x480 (VGA) 307.2K 18bpp (32bpp) 1228.8KB
16/12bpp (16bpp) 614.4KB
8bpp (8bpp) 307.2KB
4bpp (4bpp) 153.6KB
2bpp (2bpp) 76.8KB
1bpp (1bpp) 38.4KB
800x600 (SVGA) 480K 18bpp (32bpp) 1920KB
16/12bpp (16bpp) 960KB
8bpp (8bpp) 480KB
4bpp (4bpp) 240KB
2bpp (2bpp) 120KB
1bpp (1bpp) 60KB
Data frame buffer = (bpp * H * V) / 8
where: bpp = bits per pixel (colour depth)
H - viewable Horizontal pixels
V - viewable Vertical pixels
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LCD Memory Bandwidth (MB/s)
MB/s Screen refresh rate of 50Hz or
Screen resolution 8-bit 16-bit 8-bit 16-bit 60Hz
50Hz 50Hz 60Hz 60Hz
SVGA 22.9 45.8 27.5 54.9 High quality screen
VGA 14.6 29.3 17.6 35.2
BUT
HVGA 7.3 14.6 8.8 17.6
High system/memory loading
QVGA 3.7 7.3 4.4 8.8
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LCD Data Bus Mapping
RGB656
RGB666
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Color Depth
Color Depth R G B # of Colors Comments
1-Bit 2 Monochrome
4-Bit 1 1 1 16 Plus one bit for intensity
8-Bit 3 3 2 256 Baseline for graphics
12-Bit 3 3 3 4,096 Commonly used in cell phones
16-Bit 5 6 5 65,536 High Color
18-Bit 6 6 6 262,144 Most common in LCDs
24-Bit 8 8 8 16,777,216 True Color
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How many colors are needed ?
16 shades
Very noticeable edges where shade changes
32 shades
Slightly noticeable edges where shade changes
256 shades
No visible edges where shade changes
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Common Graphics APIs
OpenGL ES
OpenGL (Open Graphics Library) is a standard
specification defining a cross-language, cross-
platform API for writing applications that produce
2D and 3D computer graphics.
Full 3D API meant for 3D content such as games
and some UIs. Version 1.1 is fixed-function,
version 2.0 is fully programmable shader model
OpenVG
OpenVG is a royalty-free, cross-platform
standard API designed for hardware-accelerated
2D vector graphics. OpenVG is well suited to
accelerating Flash or SVG sequences.
Vector graphics API designed for User Interfaces,
Navigation, animations and Flash content. Fully
capable of compelling 3D UI effects
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UI with Vector Graphics
Video decoded with SW codec. Support for blending,
Composition/windowing through morphing, transparency,
composition API or perspective
frontend/backend composition transformation, etc...
16X edge AA in
HW
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Web Browser
2D element rasterization
with 2D engine
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OpenVG Advantages: The User Experience
Rich and responsive user interfaces
Todays mobile devices have raised expectations
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2D Applications
GPU-VGv1 Great for GUI Acceleration
Low-power, high-performance OpenVG accelerator Dynamic Vector Font Rendering
(licensed from ATI / AMD) Provides variety of advanced blending and drawing functions
Complete hardware OpenVG 1.1 pipeline Ultra-low-power mode for basic 2D blending
Both geometry and pixel processing
Great for Accelerating User Applications
Adaptive processing of Bezier curves and strokes
Fast, power-efficient, scalable, skinnable user-interfaces
Native Rendering of Vector Graphics Polygons including animations and different aspect ratios
No tessellation needed Web browsing
Navigation applications
Acceleration of Existing Content
Accurate map rendering at interactive frame rates
Accelerates Adobe Flash Lite, SVG Tiny, potentially Cartoons, anime, greeting cards, games, mobile entertainment
Silverlight
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or TM
service names are the property of their respective owners. Freescale Semiconductor, Inc. 2009. 56
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or TM
service names are the property of their respective owners. Freescale Semiconductor, Inc. 2009. 57