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TetraMAX ATPG
Automatic Test Pattern Generation
Options
TetraMAX DSMTest option enables advanced fault models and
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power-aware patterns
TetraMAX IDDQ Test option available for quiescent test validation
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Integrated with Synopsys Yield Explorer for seamless volume diagnostics
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and yield analysis
TetraMAX ATPG 2
TetraMAX DSMTest for Slack-
based Transition Testing
TetraMAX DSMTest also enables ATPG
to target subtle small delay defects
inside ICs that could lead to failures
when devices operate at full speed.
Detecting these defects reduces DPPM
compared to levels achieved by only
using standard transition delay patterns
and lowers the cost of production
testing.
TetraMAX ATPG 3
2 to 32 cores while achieving the same
high test coverage and low pattern
count from operation on a uniprocessor
SDF, SDC,
machine. Multicore processing in Parasitics Exceptions
TetraMAX ATPG is easily enabled with a
single command line switch.
PrimeTime
IDDQ Testing
IDDQ testing is a method for enhancing
the quality of IC tests by measuring the
power supply current of a CMOS circuit.
Pin Slacks
Defect free CMOS circuits draw very
low levels of current during a quiescent
state. IDDQ levels are typically an order
of magnitude higher in the presence of TetraMAX ATPG
TetraMAX DSMTest
a silicon defect. IDDQ testingtargets
physical defects that create a
conduction path from the power supply Transition and Reports,
Reports,
to ground and result in excessive Small Delay histograms
Defect Patterns histograms
current draw.
Silicon Diagnostics
TetraMAX Yield
In addition to identifying defective parts ATPG Explorer
from manufacturing, TetraMAX ATPG
can also isolate the location of defects
on devices that fail TetraMAX ATPG Figure 6: Integrated flow between TetraMAX ATPG and Yield Explorer
test patterns. Automatic and accurate
defect isolation is an important step
to diagnose critical yield issues, both
during production ramp as well as in diagnostics use advanced heuristics of failing parts are diagnosed with
volume manufacturing. TetraMAX ATPG and a high-performance fault simulator TetraMAX ATPG and Yield Explorer
diagnostics read the test patterns for rapid and reliable results in a volume correlates those with specific failure
and tester failure data, which are the manufacturing environment. mechanisms to determine the key
differences between measured and design or systematic issues that
expected responses to those test Failure and Yield Analysis are contributing to yield loss. Yield
patterns. They also report the fault TetraMAX ATPG is tightly integrated Explorer directly reads the accumulated
candidate locations that most likely with Yield Explorer for further analysis of diagnostics results from TetraMAX
explain the faulty device behavior diagnostics results. To perform volume ATPG and loads them into a complete
observed on the tester. TetraMAX ATPG diagnostics, hundreds or thousands database of previous diagnostics
TetraMAX ATPG 4
results, other test data, multiple Data Formats, Simulation
domains of design data, and if available, Testbenches and Tester
process data from the fab. Interfaces
TetraMAX ATPG and Yield Explorer TetraMAX ATPG supports popular
share standard interfaces for both industry standards for netlist and test
fail data from the tester as well as pattern formats:
physical design data. Physical data Circuit netlist: Verilog, VHDL
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is important for both diagnostics and (87 and 93)
yield analysis. Diagnostics accuracy is Library: Verilog functional (Structural
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significantly higher for defects caused and UDPs)
by metal shorts and opens when the Timing exceptions: SDC
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layout topology is incorporated into the Design layout: LEF/DEF
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diagnostics heuristics used by TetraMAX Simulation testbench: Verilog (serial
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ATPG. For yield analysis physical data and parallel)
allows volume diagnostics results to be Test Patterns: STIL, WGL, Verilog
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correlated with design-specific layout VCDE (input only)
characteristics and determine which Tester fails: STDF (V4 and V4-2007)
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ones are the most sensitive to process
variability.
Synopsys, Inc. 700 East Middlefield Road Mountain View, CA 94043 www.synopsys.com
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08/13.TL.CS3321.