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DESIGN AND ANALYSIS OF APPROXIMATE COMPRESSORS FOR MULTIPLICATION 2015

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DesignandAnalysisofApproximateCompressorsforMultiplication2015 Phone

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Inexact (or approximate) computing is an attractive paradigm for digital

processingatnanometricscales.Inexactcomputingisparticularlyinterestingfor
computer arithmetic designs. This paper deals with the analysis and design of Subject

two new approximate 42 compressors for utilization in a multiplier. These Re: Design and Analysis of Approximate Compressors for Multiplication 2015
designs rely on different features of compression, such that imprecision in
computation (as measured by the error rate and the socalled normalized error Message

distance) can meet with respect to circuitbased figures of merit of a design

(numberoftransistors,delayandpowerconsumption).Fourdifferentschemesforutilizingtheproposedapproximatecompressorsare
proposed and analyzed for a Dadda multiplier. Extensive simulation results are provided and an application of the approximate
multiplierstoimageprocessingispresented.Theresultsshowthattheproposeddesignsaccomplishsignificantreductionsinpower
dissipation,delayandtransistorcountcomparedtoanexactdesignmoreover,twooftheproposedmultiplierdesignsprovideexcellent
capabilitiesforimagemultiplicationwithrespecttoaveragenormalizederrordistanceandpeaksignaltonoiseratio(morethan50dB
fortheconsideredimageexamples).

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