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# Design Problem 2: Pulse Width Modulator

gvevidente@up.edu.ph
Electrical and Electronics Engineering Institute
University of the Philippines Diliman
AbstractThis design problem is for the partial fulfilment of II. CIRCUIT DESIGN
Electronic Circuits Laboratory II which will focus on applying the
knowledge learned about clamper, Schmitt trigger and ramp The three circuits: clamper, Schmitt trigger, and bootstrap
generator circuits using operational amplifiers. The objective is to ramp generator will be created according to a given
design and implement pulse width modulator according to given specification:
specifications. Vmax = 10 V Vmin = 5V
fmax = 6000 Hz fmin = 3000 Hz
I. INTRODUCTION VDC,source = -12 V to 12V
Pulse width modulation or pulse duration modulation (PWM All of the circuit blocks will use LF356 operational
or PDM) is a pulse modulation technique used for information amplifier.
transmission, motor controls, and other application [1]. As the
name implies, this technique varies the pulse width or duration A. Clamper Circuit
according to the instantaneous amplitude of the input. For this From the given maximum and minimum voltage
design problem, pulse width modulation is to be done using a requirement, the input sinusoid with = will
voltage comparator. Given an input wave, it will be offset to a +
be offset to a DC voltage level, = . To achieve
specified DC voltage level that will match the peak-to-peak of 2
this, a diode clamper circuit will be used, as shown in Figure 3.
a generated ramp wave. The comparator will then output a
pulse with a duration the same as the time the ramp voltage is
greater than the instantaneous amplitude of the input wave. This
is shown in the figure below.

## Capacitor C1 and resistor R1 are selected such that the

resistor will not discharge the capacitor during the negative or
positive portion of the input sinusoid. For this,
Fig. 1. Pulse modulated wave from a sinusoid and ramp inputs 1 = 100 , 1 = 6.8
On the other hand, the desire voltage bias is produced using
Now, to produce the pulse width modulator circuit, three a voltage divider from the supply voltage, VCC =12 V. To
blocks will be needed: a clamper, a free-running ramp generator achieve the desired DC voltage level, a network of two resistors
composed of bootstrap ramp generator and a Schmitt trigger, will be used where one will be varied accordingly. From the
and a voltage comparator. The block diagram is shown in simulation, R2 = 180 k and R3 = 100 k.
Figure 2 below.

## B. Bootstrap Ramp Generator

In the circuit shown in Figure 5, the ramp is generated across
capacitor C1, which is charged via resistor R1. The charging
current must be held constant so that the voltage across C1 will
Fig. 2. Block diagram for the PWM circuit
appear linear. Furthermore, capacitor C2 must be much larger
Fig. 7. Constructed PWM circuit

than C1 that it will hold the voltage across R1 constant, and thus, ,
a constant current is produced. On the other hand, the transistor 1@ = = 37
1@
acts as switch that will instantaneously discharge capacitor C2
as the Schmitt trigger circuit drives the bootstrap ramp circuit; 1
this will then produce the sawtooth or ramp waveform. 1@ = = 50

,
1@ = = 222
1@
For base resistor RB, it was set to 10 k to bias the PNP
transistor, while RL was set to 1k.
C. Schmitt Trigger
For the Schmitt trigger, the upper and lower trigger points
must be the maximum and minimum voltage, respectively. In
this way, it will trigger pulses only when the bootstrap ramp
circuit produces voltage same as the trigger points. The circuit
is shown in the figure below.
Fig. 5. Bootstrap ramp circuit

## The capacitor and resistor values according to the ramp time

are calculated as follows:
= 3( )
1 = 100 = 300 (1% )

1 1
= = 167 , = = 1

1
1 = = 10

1 Fig. 6. Schmitt trigger circuit with adjusted LTP
2 = = 417 (470 . )
0.01 Since the given specification for the trigger points are both
To achieve the maximum and minimum frequency, resistor positive, the Schmitt trigger must have an adjusted LTP. The
R1 must be varied. In doing this, the charging current will be resistor values are calculated as follows:
varied which controls the ramp time. 1 = 4 = 10
1@ = 1 , = 10.5
2 To test the bootstrap ramp block, it must output a ramp from
= 10 = (+, ) ( ) a step input with a slope equal to the required tmax and tmin,
1 + 2
2 = 200 measure from the minimum to maximum voltage level. The
KCL at V+ node, output waveforms from the bootstrap ramp are shown in Figure
, + 9.
+ = +
1 3 4 2
3 = 2.9 (3 . )
D. Voltage Comparator and PWM circuit
To have a well-defined pulse width modulated signal, the
comparator must have a high slew rate, such that it switch from
high to low almost instantaneously. The operational amplifier
used was LF356, having a slew rate of 13 V/swhich is
enough for the circuit.
For the free-running ramp generator that will produce the
sawtooth or ramp waveform, the Schmitt trigger and bootstrap
ramp generator circuits are connected in loop. In looping the
circuits, the Schmitt trigger will only allow a ramp that goes
from the minimum voltage to the maximum voltage. (c) Ramp at tmin, or fmin = 1 kHz.

## III. SIMULATION, ACTUAL IMPLEMENTATION, AND RESULTS

After simulating and implementing the circuit in actual, there
were slight deviations from the resistor values, which are not
that significant and within +/-10% of the original calculated
values.

## (d) Ramp at tmax, or fmax = 6 kHz

Fig. 9. Ramp output from a step input

## (b) Clamped input sinusoid at 6 kHz.

Fig. 8. Input and output waveforms of the diode clamper circuit
Fig. 11. The pulse modulated waveform

IV. CONCLUSION
In designing and constructing this project, which is focused
on operational amplifiers, RC and diode circuits, it was
essential to take into consideration the currents and voltages
significant for the creation of pulse width modulated signal.
From the results, it was evident that the specifications were
not precisely achieved, but the outputs were still close. It may
have not achieved the required numerical values, the circuit still
has accomplished the main function which was to modulate the
duty cycle of a pulse waveform.

REFERENCES
Fig. 10. Free-running ramp waveform with Vmin = 5V and Vmax = 10 V [1] D. A. Bell, Solid State Pulse Circuits, Reston Publishing Company, Inc.
A Prentice-Hall Company, Reston, Virginia, 1976