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Assemble Design
N Met
Engineering Change Order Merge together the individual blocks Signal Routes Merged with Top after
Timing ? and top. Assemble Design
Old Design
(in Memory) Local changes to
Y repair timing current logical netlist Educational Goals
Routing with no new to make functional
problem Placed Instances Scan Chain After
Identify Local modifications or Provide the students big picture on the sequence of and interaction
(Standard Cell) Reordering
introduction,
fix signal
Modifications meeting design among different stages of a modern physical design flow, which they learn
constraints
Post Route integrity only as disjoint steps in the class.
Optimizations issues Congestion View Make Logical May be manual Enhance the students understanding of challenges to achieve design
Analyze Design Changes (to Netlist) through loading an
ECO file.
closure and inevitability of backtracking within the design flow.
(Timing, DRV,
Power, Area)
May be done by tool
commands
Provide deeper understanding of inherent complexity of the design
Commit Physical (optDesign) during process by using commercial tools on moderately sized designs, thus
Changes optimizations students will better appreciate the effectiveness of the CAD algorithms
Incremental
N Constraints Placement & Routing Do not modify taught in the class.
Met ? currently
Placed/Routed References
Y objects. Use
Save Design ecoPlace/ecoRoute [1] W-J Dai, D. Huang, C-C Chang, M. Courtoy, Silicon virtual prototyping: the new cockpit for nanometer
Verify Design & High Congestion on to do incremental chip design, Proceedings of the Asia South Pacific Design Automation Conference, pp. 635 639, 2003.
Save Design the Routing Grid placement & routing
[2] Cadence Learning Management, http://leaning.cadence.com
(Vertical Edge View)