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PD- 91822C

SMPS MOSFET IRFPS37N50A


HEXFET Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
VDSS RDS(on) max ID
l Uninterruptable Power Supply 500V 0.13 36A
l High Speed Power Switching

Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current SUPER-247
l Effective Coss Specified (See AN
1001)

Absolute Maximum Ratings


Parameter Max. Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V 36
ID @ TC = 100C Continuous Drain Current, VGS @ 10V 23 A
IDM Pulsed Drain Current 144
PD @TC = 25C Power Dissipation 446 W
Linear Derating Factor 3.6 W/C
VGS Gate-to-Source Voltage 30 V
dv/dt Peak Diode Recovery dv/dt 3.5 V/ns
TJ Operating Junction and -55 to + 150
TSTG Storage Temperature Range C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Typical SMPS Topologies

l Full Bridge Converters


l Power Factor Correction Boost

Notes through are on page 8


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12/14/99
IRFPS37N50A
Static @ TJ = 25C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 500 V VGS = 0V, ID = 250A
RDS(on) Static Drain-to-Source On-Resistance 0.13 VGS = 10V, I D = 22A
VGS(th) Gate Threshold Voltage 2.0 4.0 V VDS = VGS, ID = 250A
25 VDS = 500V, VGS = 0V
IDSS Drain-to-Source Leakage Current A
250 VDS = 400V, VGS = 0V, TJ = 150C
Gate-to-Source Forward Leakage 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage -100 VGS = -30V

Dynamic @ TJ = 25C (unless otherwise specified)


Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 20 S V DS = 50V, ID = 22A
Qg Total Gate Charge 180 ID = 36A
Qgs Gate-to-Source Charge 46 nC VDS = 400V
Qgd Gate-to-Drain ("Miller") Charge 71 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time 23 VDD = 250V
tr Rise Time 98 ns ID = 36A
td(off) Turn-Off Delay Time 52 RG = 2.15
tf Fall Time 80 R D = 7.0,See Fig. 10
Ciss Input Capacitance 5579 VGS = 0V
Coss Output Capacitance 810 VDS = 25V
Crss Reverse Transfer Capacitance 36 pF = 1.0MHz, See Fig. 5
Coss Output Capacitance 7905 VGS = 0V, VDS = 1.0V, = 1.0MHz
Coss Output Capacitance 221 VGS = 0V, VDS = 400V, = 1.0MHz
Coss eff. Effective Output Capacitance 400 VGS = 0V, VDS = 0V to 400V
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy 1260 mJ
IAR Avalanche Current 36 A
EAR Repetitive Avalanche Energy 44 mJ
Thermal Resistance
Parameter Typ. Max. Units
RJC Junction-to-Case 0.28
RCS Case-to-Sink, Flat, Greased Surface 0.24 C/W
RJA Junction-to-Ambient 40
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
36
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

144
(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage 1.5 V TJ = 25C, IS = 36A, VGS = 0V


trr Reverse Recovery Time 570 860 ns TJ = 25C, IF = 36A
Qrr Reverse RecoveryCharge 8.6 13 C di/dt = 100A/s
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFPS37N50A

1000 100 VGS


VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)


7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 10

4.5V

4.5V
1

20s PULSE WIDTH 20s PULSE WIDTH


TJ = 25 C TJ = 150 C
0.1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.0
ID = 36A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5

100 2.0
(Normalized)

TJ = 150 C
1.5

TJ = 25 C
10 1.0

0.5

V DS = 50V
20s PULSE WIDTH VGS = 10V
1 0.0
4.0 5.0 6.0 7.0 8.0 9.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


Vs. Temperature
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IRFPS37N50A

100000 20
V G S = 0V, f = 1M Hz ID = 36A
C is s = C g s + C g d, C d sSHORTED
C rs s = C g d VDS = 400V

VGS , Gate-to-Source Voltage (V)


C o ss = C d s + C g d VDS = 250V
16
10000
VDS = 100V
C , C apacitance (pF )

C iss
12

1000
C oss
8

100
4
C rss
FOR TEST CIRCUIT
10
SEE FIGURE 13
A 0
1 10 100 1000 0 40 80 120 160 200
V D S , D rain-to-Source Volta ge (V) Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

100
I D , Drain Current (A)

100 10us
TJ = 150 C

10 100us

TJ = 25 C
10 1ms
1

TC = 25 C 10ms
TJ = 150 C
V GS = 0 V Single Pulse
0.1 1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 10 100 1000 10000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
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IRFPS37N50A

40 RD
VDS

VGS
D.U.T.
30
RG
+
I D , Drain Current (A)

-VDD

10V
Pulse Width 1 s
20
Duty Factor 0.1 %

Fig 10a. Switching Time Test Circuit


10
VDS
90%

0
25 50 75 100 125 150
TC , Case Temperature ( C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

1
Thermal Response (Z thJC )

D = 0.50
0.1
0.20

0.10

0.05
P DM
0.01 0.02
t1
0.01 SINGLE PULSE
(THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFPS37N50A

3000
1 5V ID

EAS , Single Pulse Avalanche Energy (mJ)


TOP 16A
2500 23A
L D R IV E R BOTTOM 36A
VDS

2000
RG D .U .T +
V
- DD
IA S A
1500
20V
tp 0 .0 1

1000
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp 500

0
25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)

IAS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
QG

10 V
580
QGS QGD
V D Sa v , Av alanche V oltage (V)

VG
560

Charge
Fig 13a. Basic Gate Charge Waveform 540

Current Regulator
Same Type as D.U.T.

50K 520
12V .2F
.3F

+
V
D.U.T. - DS
500 A
0 10 20 30 40
VGS
I av , Av alanche Current (A)
3mA

IG ID
Current Sampling Resistors Fig 12d. Typical Drain-to-Source Voltage
Fig 13b. Gate Charge Test Circuit Vs. Avalanche Current
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IRFPS37N50A

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
Low Stray Inductance
Ground Plane

Low Leakage Inductance
Current Transformer
-

+


- +
-


RG dv/dt controlled by RG +
Driver same type as D.U.T. VDD
-
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-channel HEXFET Power MOSFETs

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IRFPS37N50A

Case Outline and Dimensions Super-247


Dimensions are shown in millimeters

Notes:
Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%.
max. junction temperature. ( See fig. 11 )
Starting TJ = 25C, L = 1.94mH Coss eff. is a fixed capacitance that gives the same charging time
RG = 25, IAS = 36A. (See Figure 12) as Coss while VDS is rising from 0 to 80% VDSS

ISD 36A, di/dt 145A/s, VDD V(BR)DSS,


TJ 150C
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994

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Data and specifications subject to change without notice. 12/99
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