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Adeel Pasha, LUMS, Spring 2017

CS/EE-220: Lecture 7

Two-Level Circuits Optimization using K-Maps


Quiz Time

2 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

Two Level Circuit Optimization


Manual logic simplification can be done but it
is awkward
has no set of rules
such as what Boolean identity to be used and when?
has lower efficiency
have we reached the simplest form of the solution or not?
cannot be automated

Example? Simplify F = ABC+ABC+ABC+ABC+ABC


Done in class (in three different ways, there can still be others)

To do it systematically Kernaugh (K) Maps are used


Automation can be done!
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K-Maps

4 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

K-Maps
A diagram made of squares
Graphical representation of the truth table
Each square represent a Minterm

B 1
A 0
0 1
0

2 3
1

5 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

K-Maps
Graphical representation of Sum of Minterms
Example: F(A, B) = m (0, 1, 3)

B 1
A 0
AB 0 AB 1
0 1 1
AB 2 AB 3
1
1

6 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

K-Maps
No. of squares are equal to no. of minterms in truth table

2 variable K-Map: 2 2 Square Map


3 variable K-Map: 2 4 Rectangular Map
4 variable K-Map: 4 4 Square Map

7 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

3-variable
BC
K-Maps
00 01 11 10
A
m0 m1 m3 m2
0

m4 m5 m7 m6
1

But WHY the funny placement?


We can observe that
Row-1 terms m0, m1, m3, m2 are adjacent
Row-2 terms m4, m5, m7, m6 are adjacent
All columns terms are adjacent as well
Even the boundary terms of each row [m0, m2] and [m4, m6] are
adjacent
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Adeel Pasha, LUMS, Spring 2017

4-variable K-Maps
CD 01
AB 00 11 10
m0 m1 m3 m2

00

m4 m5 m7 m6
01

m12 m13 m15 m14


11

m8 m9 m11 m10
10

9 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

4-variable K-Maps
We can observe that
All rows have terms that are adjacent
All columns have terms that are adjacent as well
Even the boundary terms of each row are adjacent
Can be wrapped to make a cylinder
And finally the boundary terms of each column are adjacent
Can be wrapped vertically to convert the cylinder into a
donut/tube shape

10 CS/EE-220: Digital Logic Circuits 2/14/2017


Adeel Pasha, LUMS, Spring 2017

Circuit Optimization using K-Maps


Step-1: Make a K-Map
Input Form1: Truth Table
Input Form2: Canonical form as Sum of Minterms (SoM)
What if not in standard form? Thats why in last lecture I taught you to
go from non-canonical to canonical form through expansion

Step-2: Identify the collection of squares that can be part of


final simplified solution
Form rectangles whose sides are in power of 2
1 1, 1 2, 2 1, 2 2 and so on (remember no 13, 23, etc.)
No such rectangle can contain an empty cell/box
No diagonal covering
Use the biggest rectangle as it will lead to minimum terms/cost
11 CS/EE-220: Digital Logic Circuits 2/14/2017
Adeel Pasha, LUMS, Spring 2017

Circuit Optimization using K-Maps


Step-3: Determine if any rectangle is redundant
The 1s in K-Map are already covered without it
If so, again keep the largest and drop the smaller redundant ones

Step-4: Read off the map to form a SoP

Examples: Done in class

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3-variable K-Maps Examples

13 CS/EE-220: Digital Logic Circuits 2/14/2017

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