TDA2030

14 W hi-fi audio amplifier

Features
Wide-range supply voltage, up to 36 V
Single or split power supply
Short-circuit protection to ground

( s )
ct
Thermal shutdown

Description
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The TDA2030 is a monolithic integrated circuit in r o
Pentawatt (horizontal)

the Pentawatt package, intended for use as a

e P
low frequency class-AB amplifier. Typically it
provides 14 W output power (d = 0.5%) at Table 1.
l e t
Device summary
14 V/4 . At 14 V or 28 V, the guaranteed output
power is 12 W on a 4 load and 8 W on an 8
s o
Order code Package

(DIN45500).
O b TDA2030H Pentawatt horizontal

The TDA2030 provides high output current and

) -
has very low harmonic and crossover distortion.

t (s
Furthermore, the device incorporates an original
c
(and patented) short-circuit protection system

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comprising an arrangement for automatically

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limiting the dissipated power so as to keep the
operating point of the output transistors within
P
their safe operating range. A conventional thermal
e
l e t
shutdown system is also included.

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Figure 1. Ex: Functional block diagram

O b

June 2011 Doc ID 1458 Rev 3 1/17

www.st.com 17
 Device overview TDA2030

1 Device overview

Figure 2. Pin connections (top view)

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Figure 3. Test circuit

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 TDA2030 Electrical specifications

2 Electrical specifications

2.1 Absolute maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

Vs Supply voltage 18 (36) V

Vi Input voltage Vs
Vi Differential input voltage 15 V
Io Output peak current internally limited) 3.5
( s ) A
Ptot Power dissipation at Tcase = 90 C 20

u ct W
Tstg, Tj Storage and junction temperature -40 to 150

o d C

2.2 Thermal data P r

e t e
Table 3. Thermal data
o l
Symbol Parameter
b s Value Unit

Rth j-case Thermal resistance junction-case

- O max 3 C

( s )
2.3 t
Electrical characteristics
c
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Refer to the test circuit in Figure 3; VS = 14 V, Tamb = 25C unless otherwise specified.

Table 4. r o
Electrical characteristics
Symbol
e P Parameter Test conditions Min. Typ. Max. Unit

e t
ol
Vs 6 18
Supply voltage V
12 36

b s Id Quiescent drain current 40 60 mA

O Ib
VOS
Input bias current
Input offset voltage
0.2
2
2
20
A
mV
Vs = 18 (Vs = 36)
IOS Input offset current 20 200 nA
d = 0.5%, f = 40 to 15,000 Hz;
GV = 30 dB
RL = 4 12 14 W
Po
Output power RL = 8 8 9 W
d = 10%, f =1 kHz; GV = 30 dB
RL = 4 12 14 W
RL = 8 8 9 W

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 Electrical specifications TDA2030

Table 4. Electrical characteristics (continued)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Po = 0.1 to 12 W, RL = 4 ,
GV = 30 dB 0.2 0.5 %
f = 40 to 15.000 Hz
d Distortion
Po = 0.1 to 8 W, RL = 8 ,
GV = 30 dB 0.1 0.5 %
f = 40 to 15.000 Hz
Frequency response Po = 12 W, RL = 4 ;
B 10 Hz to 140 Hz
(3 dB) GV = 30 dB
Ri Input resistance (pin 1) 0.5 5 M
Gv
Voltage gain (open loop) 90
( s ) dB
Gv
Voltage gain (closed loop) f = 1 kHz 29.5 30

u ct
30.5 dB
eN Input noise voltage
B = 22 Hz to 22 kHz
o d3 10 V

Pr
iN Input noise current 80 200 pA
GV = 30 dB; RL = 4 ,
SVR Supply voltage rejection
t
Rg = 22 k, fripple = 100 Hz;

e e 40 50 dB
Vripple = 0.5 Veff
l
so
Po = 14 W, RL = 4
Id 900
Drain current mA
Po = 9 W, RL = 8

Tj Thermal shutdown junction

O b 500

)-
145
temperature

t ( s
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 TDA2030 Electrical specifications

2.4 Characterizations

Figure 4. Output power vs. supply voltage Figure 5. Output power vs. supply voltage

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Figure 6. Distortion vs. output power

- OFigure 7. Distortion vs. output power

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 Electrical specifications TDA2030

Figure 8. Distortion vs. output power Figure 9. Distortion vs. frequency

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Figure 10. Distortion vs. frequency
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Figure 11. Frequency response with different

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values of the rolloff capacitor C8

b s (see typical amplifier with split

power supply)

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 TDA2030 Electrical specifications

Figure 12. Quiescent current vs. supply Figure 13. Supply voltage rejection vs. voltage
voltage gain

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Figure 14. Power dissipation and efficiency
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Figure 15. Maximum power dissipation vs.
vs. output power
b s supply voltage (sine wave

- O operation)

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 Applications TDA2030

3 Applications

Figure 16. Typical amplifier with split power Figure 17. Typical amplifier with single power
supply supply

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a typical amplifier with split power O
Figure 18. PC board and component layout for Figure 19. PC board and component layout for
a typical amplifier with single power
supply

(s ) supply

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 TDA2030 Applications

Figure 20. Bridge amplifier configuration with split power supply (Po = 28 W, Vs = 14 V)

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 Practical considerations TDA2030

4 Practical considerations

4.1 Printed circuit board

The layout shown in Figure 19 should be adopted by the designers. If different layouts are
used, the ground points of input 1 and input 2 must be well decoupled from the ground
return of the output in which a high current flows.

4.2 Assembly suggestion

No electrical isolation is needed between the package and the heatsink with single supply
voltage configuration.
( s )
4.3 Application suggestions u ct
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The recommended values of the components are those shown on application circuit of
Figure 16. However, if different values are chosen, then the following table can be helpful.

Table 5. Variations from recommended values

e t e
Recommanded
o l Larger than Smaller than
Component
value
Purpose

b s recommanded value recommanded value

R1 22 k
O
Closed loop gain setting Increase of gain Decrease in gain(1)
R2 680
)-
Closed loop gain setting

( s
Decrease of gain(1) Increase in gain

R3 22 k
c t
Non-inverting input biasing
Increase of input
impedance
Decrease in input
impedance

d u Danger of oscillation at
R4
r 1
o Frequency stability high frequencies with

e P inductive loads
Poor high-frequency

let
R5 3 R2 Upper frequency cutoff Danger of oscillation
attenuation

so
Increase in low-
C1 1 F Input DC decoupling
frequency cutoff

O b C2 22 F
Inverting input DC
decoupling
Increase in low-
frequency cutoff
C3C4 0.1 F Supply voltage bypass Danger of oscillation
C5C6 100 F Supply voltage bypass Danger of oscillation
C7 0.22 F Frequency stability Danger of oscillation

1
C8 ------------------ Upper frequency cutoff Smaller bandwidth Larger bandwidth
2BR 1

D1D2 1N4001 To protect the device against output voltage spikes

1. Closed loop gain must be higher than 24 dB

10/17 Doc ID 1458 Rev 3

 TDA2030 Practical considerations

Table 6. Single supply application

Recommanded Larger than Smaller than
Component Purpose
value recommanded value recommanded value

R1 150 k Closed loop gain setting Increase in gain Decrease in gain(1)

R2 4.7 k Closed loop gain setting Decrease in gain(1) Increase in gain
Increase of input Decrease in input
R3 100 k Non-inverting input biasing
impedance Impedance
Danger of oscillation at
R4 1 Frequency stability high frequencies with
inductive loads
Poor high-frequency
( s )
ct
RA/RB 100 k Non-inverting input biasing Danger of oscillation
attenuation

C1 1 F Input DC decoupling u
Increase in low-
d
r ofrequency cutoff

C2 22 F Inverting DC decoupling

e P Increase in low-
frequency cutoff
C3 0.1 F Supply voltage bypass

l e t Danger of oscillation
C5 100 F Supply voltage bypass

s o Danger of oscillation
C7 0.22 F Frequency stability

O b Danger of oscillation

)-
1
C8 ------------------ Upper frequency cutoff Smaller bandwidth Larger bandwidth
2BR 1

t ( s
D1D2 1N4001
c
To protect the device against output voltage spikes.

u
1. Closed loop gain must be higher than 24 dB

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Doc ID 1458 Rev 3 11/17

 Short-circuit protection TDA2030

5 Short-circuit protection

The TDA2030 has an original circuit which limits the current of the output transistors.
Figure 21 shows that the maximum output current is a function of the collector emitter
voltage; hence the output transistors work within their safe operating area (Figure 5).
This function can therefore be considered as being peak power limiting rather than simple
current limiting.
It reduces the possibility that the device gets damaged during an accidental short-circuit
from AC output to ground.

Figure 21. Maximum output current vs. Figure 22. Safe operating area and collector

( s )
ct
voltage [VCEsat] across each output characteristics of the protected
transistor power transistor

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 TDA2030 Thermal shutdown

6 Thermal shutdown

The presence of a thermal limiting circuit offers the following advantages:

1. An overload on the output (even if it is permanent), or an above limit ambient
temperature can be easily supported since Tj cannot be higher than 150C.
2. The heatsink can have a smaller factor of safety compared with that of a conventional
circuit. There is no possibility of device damage due to high junction temperature. If for
any reason, the junction temperature increases to 150C, the thermal shutdown simply
reduces the power dissipation at the current consumption.
The maximum allowable power dissipation depends upon the size of the external heatsink

temperature for different thermal resistances.

( s )
(i.e. its thermal resistance); Figure 25 shows this power dissipation as a function of ambient

u ct
Figure 23. Output power and drain current vs. Figure 24. Output power and drain current vs.
case temperature (RL = 4 ) d
case temperature (RL = 8 )
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 Thermal shutdown TDA2030

Figure 25. Maximum allowable power Figure 26. Example of heatsink

dissipation vs. ambient
temperature

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The following table shows the length that the heatsink in Figure 26 must have for several
values of Ptot and Rth.

(s )
Table 7.
c t
Recommended values of heatsink
u
od
Dimension Recommended values Unit

Pr
Ptot 12 8 6 W

e t e
Length of heatsink
Rth of heatsink
60
4.2
40
6.2
30
8.3
mm
C/W

s ol
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 TDA2030 Package mechanical data

7 Package mechanical data

Figure 27. Pentawatt (horizontal) package outline and dimensions

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 4.80 0.188 MECHANICAL DATA
C 1.37 0.054
D 2.40 2.80 0.094 0.11
D1 1.20 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
F 0.80 1.05 0.031 0.041
F1 1.00 1.40 0.039 0.055
G
G1
3.20
6.60
3.40
6.80
3.60
7.00
0.126
0.260
0.134
0.267
0.142
0.275

( s )
ct
H2 10.40 0.41

u
H3 10.05 10.40 0.395 0.409
L
L1
14.20
5.70
15.00
6.20
0.56
0.224
0.59
0.244

o d
L2
L3
14.60
3.50
15.20
4.10
0.574
0.137
0.598
.161
P r
L4
L5 2.60
1.29
3.00 0.102
0.05
0.118

e t e
L6
L7
15.10
6.00
15.80
6.60
0.594
0.236
0.622
0.260
o l
bs
L9 2.10 2.70 0.083 0.106 Pentawatt H
L10 4.30 4.80 0.170 0.189

-O
DIA 3.65 3.85 0.143 0.151

(s)
L

c t C A

u
od
D D1

Pr
E L1

ete
L3 L2 F
G

ol
L7 G1
L4 L5
H2

b s
O F1
Dia.
H3

Resin between L9
leads L6 L10
PENTHME.EPS

0015982

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.

Doc ID 1458 Rev 3 15/17

 Revision history TDA2030

8 Revision history

Table 8. Document revision history

Date Revision Changes

June 1998 2 Second issue

Added Features on page 1
Removed Pentawatt (vertical) package option
21-Jun-2011 3
Replaced Figure 27 with Pentawatt (horizontal) package data
Updated presentation of document, minor textual changes

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 TDA2030

Please Read Carefully:

( s )
u ct
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o d
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o l
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- O
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