Universidad Autnoma De Quertaro

Campus Juriquilla.

Estudiante:
Javier Hernndez Santos

Expediente:
246612

Profesor:
Alejandro Romero

Asignatura:
Sistemas Digitales

Carrera:
Ingeniera En Computacin

Trabajo:
Sistema de alarma
 Binario Numero Decimal

0 0 0 0 0 0 1 1 3
0 0 0 0 0 1 0 1 5
0 0 0 0 1 0 0 0 8
1
0 0 0 0 1 1 0 0 2
2
0 0 0 1 0 1 1 1 3
4
0 0 1 0 1 1 0 1 5
5
0 0 1 1 1 0 0 1 7
6
0 1 0 0 0 1 0 1 9
7
0 1 0 0 0 1 1 0 0
8
0 1 0 1 0 1 0 1 5

Mapas de Karnaugh-Veitch

F0 =BA

F1 = CB

F2 = CBA
 F3 = AB

F4 = CB +
AC + BA

F5 = CBA + BA + CA

F6 = BA + CBA + CB

F7 = CB + CA
 F8 = CB + CBA

F9 = C

FUNCION MINIMA:
F9 = C

CODIGO EN VHDL
library IEEE;
use IEEE.std_logic_1164.all;

entity alarma is
port(
A: in std_logic_vector(7 downto 0);
y: out std_logic
);

end alarma;
architecture simple of alarma is
begin

process(A)
begin
case A is

when "00000011"=>y<='1';

when "00000101"=>y<='1';

when "00001000"=>y<='1';

when "00001100"=>y<='1';

when "00010111"=>y<='1';

when "00101101"=>y<='1';

when "00111001"=>y<='1';

when "01000101"=>y<='1';

when "01000110"=>y<='1';

when "01010101"=>y<='1';

when others =>y<='0';

 end case;
end process;
end simple;