00 голосов за00 голосов против

14 просмотров6 стр.hghiiiihih

May 25, 2017

© © All Rights Reserved

PDF, TXT или читайте онлайн в Scribd

hghiiiihih

© All Rights Reserved

14 просмотров

00 голосов за00 голосов против

hghiiiihih

© All Rights Reserved

Вы находитесь на странице: 1из 6

Talha Ahmed Bhatti, Abdur Raheem, Tanveer Alam, Muhammad Owais Malik, Abdullah Munir

Department of Electrical Engineering

NED University of Engineering and Technology

Karachi, Islamic Republic of Pakistan

talha.bhatti@yahoo.com

Abstract- The interconnection of several small & large systems extracted from the data in real time using statistical analysis

has increased the probability of large blackouts in the power tools. Furthermore control commands are generated depending

grid. One of the leading reason behind these blackouts is low whether the estimated parameters are within prescribed range

reporting rate of existing devices and unavailability of

synchronized system wide data. Synchrophasor technology

or not. The data & information flow of synchrophasor network

provides solution to the problem. Phasor Measurement Unit is depicted in Fig. I.

(PMU) is the most front end device required to implement

Synchrophasor Technology. The paper proposes a non-DFT

~

GPSSatellite

based technique for development of PMU conformed to IEEE

standards C37.118.1 and C37.118.2. The proposed technique

aims to reduce the processing time & sampling rate which

~

ultimately leads to reduced cost. The hardware of PMU is ~

implemented using Raspberry pi Model B+, ADS 1015 and GPS

(Global Positioning System) model PA6H on MTK3339 chipset Data analyze

Make decision

Control system

PMU, Synchrophasor

I. INTRODUCTION

which causes great economic and life losses. The main Fig. I Synchrophasor infonnation flow architecture

reason behind these blackouts is the unavailability of system

wide synchronized data and high latency of the monitoring

system. When there is a fault in one part of system or if any II. PHASOR M EASUREMENT U NIT IMPLEMENTATION

major generating unit is cut off from the national grid, then the

remaining generators also begin to trip one by one due to The heart of phasor measurement unit is the measurement of

excessive load stresses. This catastrophic failure results in a time stamped phasors synchronized to a common time source

system wide blackout. The blackouts can be eliminated by called Synchrophasors. [I] Synchrophasor can be estimated

making the monitoring system quick and wide using using different algorithms on the sampled data. The choice of

synchrophasor smart grid technology. For example if any line algorithm depends primarily upon three factors 1) Accuracy 2)

becomes faulty or generation reduces due to any fault, the Processing complexity (clock cycles required) 3) Response

smart control station isolates the faulty section and reduces the time. [2]

load in proportion with the generation within no time and The existing algorithms include the DFT (Discrete Fourier

thereby avoiding the system wide load stresses. Transform) & its improved version FFT (Fast Fourier

Synchrophasor Smart Grid technology can contribute to Transform) [3], weighted least square estimation [4] and

overcome several currently prevailing problems of power discrete wavelet transform methods [5] . The methods require

system e.g. blackouts, low reporting rate, unavailability of high sampling rates to avoid aliasing. It has been observed that

universally synchronized and time stamped data. The many of these references are prone to the spectral leakage &

technology aims to improve existing supervisory control and interference phenomenon. Although several techniques are

data acquisition system (SCADA). The prime differentiator used to mitigate the effect but it further increases the overall

between conventional and smart grid is the use of processing complexity of the algorithm [6].

synchrophasor data. The IEEE standard C37.IIS.1 does not require calculation

The synchrophasor architecture consists of a network of of higher order harmonics of the given signal i.e. only 1st

PMUs whose output data is concentrated using Phasor Data harmonic or fundamental component is required which can be

Concentrator (PDC). There can be several stages of data calculated using DFT based algorithm. Nyquist criteria will

concentration i.e. local, regional then super PDC. The suggest sampling rate of 100 Hz or above for 50 Hz nominal

concentrated data is then transmitted to monitoring & control frequency system, but in order to avoid spectral leakage that

center. Then several important electrical parameters are can occur due to the non-integer frequencies (non-multiple of

50 Hz) present in the signal a high sampling rate will be

required along with large window size. But large window will time synchronization unit, is implemented on microcontroller

increase the latency i.e. response time & also the PIC (Peripheral Interface Controller) 16f877a. The Linux is

computational requirement of the algorithm. Therefore, not a RTOS (Real Time Operating System), so it cannot be

fabrication of Non-DFT based PMU is represented in this used for precise timing operations. Therefore, the sampling

research paper. operation and transmission of message frames is dictated by

The advantage of using this non-DFT based phasor the ADPLL's output. The ADPLL's output can be a 10, 50 Hz

estimation technique is that the required sampling rate of PMU or any other higher frequency digital signal. The ADPLL's

is very low as compared to DFT & other techniques. Required frequency is set as per the required reporting rate ofPMU. The

sampling rate is equal to the desired reporting rate using this ADPLL's output wave is synchronized with 1 PPS signal, so

technique i.e. for 10 Hz reporting rate, the sampl ing rate is 10 that the sampling and transmission operations are in

sps (samples per second) & for 50 Hz, it is 50 samples per synchronism with the 1 PPS signal.

second & so on. Hence, there is no need to use high speed GPS is a part of time synchronization block. Two type of

ADCs. Considering 10 Hz rate, the processing power of the outputs are taken in the PMU development technique

microprocessor also reduces significantly because now only discussed in this paper, one is 1 PPS signal & other is UTC

10 samples are required to be processed. Hence, a very low (Co-ordinated Universal Time) time. UTC time is sent to the

processing power microprocessor and low cost ADC is Raspberry Pi using UART (universally asynchronous

required. receiver/transmitter). The standard defmition of UTC is: "The

time of day at the Earth's prime meridian (0 longitude)". This

III. FUNCTIONAL BLOCKS OF PMU UTC time is converted into SOC (Second of Century) for time

stamping the phasors conformed to IEEE standard.

The major functional blocks ofPMU are depicted in Fig. 2:

IV. MAGNITUDE ESTIMATION

Sa tellites

Time

The fundamental component of signal is to be calculated

'--_+I Synchronization only. The rms value of the given signal is estimated using ac

10 Hz to dc rectification. The ac signal is passed through a bridge

UTCTime

SIgnal From Cl ienL rectifier to convert it into dc. The dc signal is then a reflection

,-----,

of the given ac waveform. The ac value is obtained by

Signal Data multiplying the output of rectifier by a pre-calculated factor

Data

Acqui sitio n &

Processing Commu nication Therefore, the magnitude of a signal can be measured by

Co nditi oning

simply measuring the dc value using ADC. The magnitude

ToClienL measurement will not be effected by any frequency change,

i.e. the magnitude measurement accuracy remains almost same

Fig. 2 Functional Diagram of PMU at nominal and off nominal frequencies.

The signal conditioning block conditions both the input V. PHASE ANGLE ESTIMATION

voltage and current signals. The supply voltage is reduced to

suitable value using power resistors' VDR (Voltage Divide

The phase angle is estimated by calculating the time interval

Rule). The current sensing is done using ACS 712 IC

between the rising edge of the 1 PPS (Pulse Per Second) signal

(Integrated Circuit). Its output is clamped at 2.5 V so a

from GPS & the time of rising of sine wave at zero crossing

capacitor is connected after IC's output to remove this dc

shown in Fig. 4. But the phasor defmition pertinent to

offset. Then these voltage & current phasors are sent to both

C37.11S.l defmes the phase angle of a cosine function so 90

bridge rectifier and hysteresis comparator circuits for further

is subtracted after phase angle calculation using the sine

signal conditioning. Higher order harmonics are filtered from

function .

these signals using low pass filter as shown in Fig. 3. As it can

be seen in Fig. 3 that the low pass filter also introduces a

phase shift in the waveform but this phase shift is constant.

Therefore, this additional phase shift is subtracted from each

estimated phasor to obtain actual phase angle.

t , t I I ,

~

\\!LJ~ ~\)J

Figure 3 Harmonics removal using Low pass filter

All Digital Phase Lock Loop (ADPLL) which is present in Fig. 4. Phase angle estimation

1 1

The sinusoidal input waveform is fIrst converted into square f =B - B D ld = 1'5 (5)

function using hysteresis comparator, so that it can be fed Where, B= SOC time of zero crossing of current cycle

directly to the microprocessor. The output of comparator is a B _old=SOC time of zero crossing of preceding cycle

square wave having low & high voltage corresponding to the

Tp

dual power supply voltages. The microprocessor Raspberry pi

can only accept positive voltages, hence the negative portion

:.. ~I

positive portion is brought down to lower voltage i.e. 3.3 V I-~~--, _ --- _1- _ 1----,,...-- - , ____ ~-

I

using VDR. This positively clamped square wave can now be

given to microprocessor, where the rising edge of the square

wave reflects the zero crossing of sine wave.

The microprocessor is programmed such that the rising

edge generates an interrupt, the time of occurrence of this zero

crossing (rising edge) is measured in the Interrupt service

routine (ISR) & stored in a global variable. In a similar

fashion, the occurrence time of rising edge of 1 PPS signal is

measured and stored in another variable. The two variables

containing the SOC (Second of Century) time are now

subtracted to get the time interval between the PPS & sine

wave zero crossing. This time is then converted into phase B

angle "8 " using (5). For 50 Hz the waveform there are 18000

in 1 sec, hence the time is multiplied by 18000 to convert time Fig. 5. Frequency Estimation

in seconds into angle as shown in (1)

8 = t * 18000 (1) VII. RATE OF CHANGE OF FREQUENCY (ROC OF)

Where, t= time between rising edge of 1 PPS signal & CALCULATION

power signal waveform

Then the angle in (1) is subtracted by 90 because cosine

Another quantity which is still required to be calculated

function is to be considered instead of sine as per standard.

before fIlling & transmitting the PMU output message frame,

8 = (t * 18000) - 90 (2)

is the ROCOF (Rate of change of frequency). It is more prone

Now for further cycles, 360 is to be subtracted as each

to the amount of noise present in the input as compared to

cycle represents 360. Therefore, remainder operation is

other phasor estimates. The rate of change of angle IS

applied on (2) to get (3)

frequency, this relation is used to obtain rate of change of

8 = ((t * 18000) - 90) mod 360 (3)

frequency from rate of change of angle as shown in (6):

Where, mod= remainder operation

Finally (4) is obtained by subtracting 180 from (3) because

0(t)=fO)(t)dt = 00 + ~O)t + 0.5 0)'t 2 (6)

according to the IEEE standard the angle can vary from -180

to + 180, then the degrees are converted into radians.

Where Ts=Time of each sample

~O)= Change of frequency (COF)

8 = (((B- A+0.005)x 18000) mod 360) - 180)x(n/180) (4)

O)'=ROCOF

Where, B=SOC time of zero crossing of sine wave

Writing (3) in matrix form to get (4)

A=SOC time of 1 PPS signal ' s rising edge

In (4), B-A represents the time duration between the IPPS 00 1 0

and the signal' s zero crossing. 01 1 Ts

VI. FREQUENCY ESTIMATION

O2

03

1

1

2Ts

3Ts [:~l

X cu'

2

obtained through phase estimation technique as shown in Fig. 0N - 1

5. The two consecutive rising edges ' occurrence time are (7)

subtracted to get the time period. Actually the time interval

between the two rising edges is the time between zero Where 00=Estimated phase angle of fIrst sample

crossings of the sine wave, so just taking the inverse of this 01 =Estimated phase angle of second sample

time gives the frequency of the signal. The fundamental 0 N_l=Estimated phase angle of Nth sample

frequency is calculated using (5) Let N =50 then Ts=0.02 sec

Replacing the matrices in (7) with respective variables

yields (8) frames transmission after it is switched on. The data frame

[0]=[B] [A] (8) transmission is controlled by the command frame, i.e. the data

Where, frame transmission can be halt or resumed by sending

[0] Represents matrix of phase angle estimates in one appropriate command messages. On the other hand the header

complete window & configuration frames are not sent continuously, instead the

[B) Represents coefficient matrix of (8) PMU sends these frames only on the request of the client. One

[A] Represents unknown column matrix of (8) thing to be kept in mind that the PMU is the server & the

PDC, SVP (Synchro Vector Processor) or any other such

The Weighted Least-Squares (WLS) technique is used to synchrophasor data reception device that must be a client as

calculate the unknown vector [A]. Equation (9) is per the IEEE communication standard C3 7 .118.2.

implemented on PMU, in which the matrix G's value remains The header frame is implemented on python Raspberry pi as

constant, whereas matrix 0 is updated containing the latest shown in Table. 1:

estimated phase angles. (9) is derived from (8), whereas (10)

is used to calculate value of matrix "G". Table. 1.Header Frame

SYNC FRAMESIZE IDCODE SOC FRACSEC DATA DATA CHK

2B 2B 2B 4B 4B 3B 2B 2

(9)

OxAA ll OxOO1 5 OxOOOl xxxx xxxx "Tal" "ha" xxxx

Where, "xxxx" represents that the data of this field in not static

[G) = [BTB]-IBT (10) instead its value is different at every instant of time. SOC time

is calculated from the UTC time given by the GPS module

The matrix [G) is stored in real time for use and it is pre built on MTK3339 chipset using UART communication.

calculated. It consists of 50 rows (for 50 sps system) and 3 FRACSEC field is used to indicate the fraction of second, time

columns. The multiplication of matrix [G) with [0] is quality & also informs about leap second insertion or deletion

performed to obtain matrix [A] from which ROCOF can be nearby. Fraction of second is incremented with every rising

found at any time using (11). [3] edge. Its value varies between 0 and 49 for 50 sps reporting

w' rate PMU. The counter resets after completion of each second.

ROCOF =- (11)

21<. The CHK contains the cyclic redundancy check (CRC) of the

whole frame. It is calculated using mkcrcfun module of

python.

VIII. PMU DATA COMMUNICATION

The data frame is implemented as represented in Table. 2:

The data filling, reception & transmission is done as per Table. 2.Data Frame

IEEE standard C37.118.2-2011. TCP!UDP (Transmission

Control ProtocollUser Datagram Protocol) method is the opted

protocol which is most suitable for real time applications. The

modules of python used are socket, struct and RPIO

(Raspberry Pi Input Output). The struct module is used for

handling binary data for network connections. The data is

packed into bytes using struct.pack command, similarly

struct.unpack is used to convert the received bytes into

separate tuple entities as per given format. The socket module

deals with the UDP sockets, whereas RPIO module is utilized

to handle the TCP interrupt sockets. Although socket module The phasor is represented in polar form , while frequency

can also handle TCP sockets but it can't generate TCP and other value are represented in floating point format. The

interrupts, hence RPIO module is used instead of socket data frame is being sent after every 20 ms for 50 sps reporting

module for TCP sockets implementation. TCP/UDP method is rate. There can be several data streams transmitting from a

used for messages transmission. There are four types of single PMU simultaneously but here only one data stream is

message frames according to the standard out of which the implemented, so mCODE is assigned value " 1" which is

three i.e. command, header & configuration frames are going to be constant for all the frames. The actual PMU data

transmittedlreceived using TCP sockets whereas the single frame output is shown in Table. 3. The configuration frame is

data stream message frames are sent through UDP sockets in implemented in the similar fashion .

TCP/UDP method of communication. PMU transmits all the

above mentioned message frames except of the command Table. 3 PMU Data frame output

frame which is received by the PMU. Command frame is SYNC friiiiiiIi. ID soc FRACSEC STAT VOlTAGE ANGLE FRE ROCOF ANAlOG DIG CHK

43521 80 1 1443104668 100 128 268.25 1.89633 50.17 0.1 220 17 48676

usually sent by Phasor data concentrator (PDC) or such any 43521 80 1 1443104669 10 128 268.55 1.07378 50.17 220 17 43521

43521 80 1443104669 20 128 268.29 1.25039 50.17 0.1 220 17 49202

other synchrophasor device pertinent to C37.118.2. [7] 43521 80 1443104669 30 128 267.38 1.43404 50.18 11.56 220 17 49182

The PMU starts the spontaneous transmission of data 43521 80 1 1443104669 40 128 268.21 1.61463 50.18 0.2 220 17 42103

The command frame is different from above frames in the such disturbance

manner that it is to be received & decoded by the PMU. When Power system model validation

a command frame reaches the PMU's port, it generates a TCP Summing up all benefits, it is evident that the value of

interrupt. In interrupt service routine the CMD field of the benefits is much greater than the setup cost. Hence the

frame is interpreted and the rest of the program runs according payback period is equal to the blackout occurrence period.

to it. There can be several commands defined by the user but

there are four basic commands that are defmed by the standard X. CONCLUSION

itself. These are the switching on & off the data frames

transmission and requesting a header or configuration frame The most commercial PMUs estimate several order harmonics

from the PMU. along with the fundamental component, but there are several

applications which only require the data related to

IX. COST B ENEF IT ANALYSIS fundamental frequency component of power system. Hence,

this technique can be used to fabricate very low cost PMUs

The cost of implemented PMU excluding courier and which will reduce the overall implementation cost of

custom charges is around $107 which is much less as synchrophasor network. The actual hardware implemented and

compared to other commercial PMUs, for example the SEL- tested using this methodology is shown in Fig. 6. This PMU is

..

351A's retail price is $1260. The cost breakup of implemented intended to be tested using Phasor Measurement Unit

Calibration System-6135A/PMUCAL or any other such

PMU is shown Table. 4.

testillg equipment.

Table. 4 Cost breakup of implemented PMU

Equipment Cost

Microprocessor Raspberry Pi Model B+ S2S

2 GPS module Model: PA6H, chipset mtk333 S40

GPS Antenna and uFL to SMA connector S17

4 Current Sensing IC ACS71 2T ELC-20A SIS

ADC ADS 10 15 Adafruit S10

Sum $107

duty

straight forward which varies from system to system. It is

mainly due to the variation in installation charges. The

average cost can be estimated as PKR.50000/PMU and

PKR. I00000/PDC which includes manufacturing and

installation charges as well. Assuming that PMUs are installed

in each of the 64 EHT (Extra High Tension- 132 & 220 KV)

grids ofK-Electric's network and a PDC for 10 grids, the total

cost will be around PKR. 3800000. Fig. 6 Prototype of proposed technique

The current GDP (Gross Domestic Product) of Karachi is

around $100 billion. A 12 to 24 hour blackout will cause ACKNOWLEDGMENT

complete industrial shutdown, hence leading to a large We are very grateful to Dr. Muhammad Ali Memon,

economic loss. Apart from monetary loss, there are life losses Chairperson, Electrical Department, for supervising us. We

as well such as power outage in hospitals will halt the are also highly thankful to Sir Hassan-ul-Haque, Lecturer,

emergency operations, surgeries and other such lifesaving Electrical dept. for guiding and helping us in the design,

activities. Similarly the heat stroke death toll during June-20 15 implementation and troubleshooting of various modules of the

climbed past 1200. The effect of heat stroke was increased due hardware.

to the blackouts as these blackouts deprived customers of the

use of air conditioners, fans and other electric equipment. REFERENCES

not limited to blackouts prevention instead it provides [1] IEEE Standard for Synchrophasor Measurements for

following benefits also: Power Systems, ill IEEE Std C37.1I8.I-201I

Wide area monitoring which can prevent grid (Revision ofIEEE Std C37.118-2005)201l. p. 1-6l.

collapse [2] Thorp, A.G.P.aJ.S., Synchronized Phasor

Measurements and Their Applications, ed. A.S. M.A.

Enhancing grid throughput and optimization of

Pai. 2008, New York, NY 10013,USA: Springer-

available resources

Verlag.

Quick forensic analysis after blackout or any other

[3] Phadke, A.G., I.S. Thorp, and M.G. Adamiak, A New

Measurement Technique for Tracking Voltage

Phasors, Local System Frequency, and Rate of

Change of Frequency. Power Engineering Review,

IEEE, 1983. PER-3(5): p. 23-23.

[4] Sachdev, M.S. and M. Nagpal, A recursive least

error squares algorithm for power system relaying

and measurement applications. Power Delivery,

IEEE Transactions on, 1991. 6(3): p. 1008-1015.

[5] Chi-Kong, W., et al. A novel algorithm for phasor

calculation based on wavelet analysis (power system

analysis]. in Power Engineering Society Summer

Meeting, 2001.

[6] Romano, P. and M. Paolone, Enhanced Interpolated-

DFT for Synchrophasor Estimation in FPGAs:

Theory, Implementation, and Validation of a PMU

Prototype. Instrumentation and Measurement, IEEE

Transactions on, 2014.63(12): p. 2824-2836.

[7] IEEE Standard for Synchrophasor Data Transfer for

Power Systems. IEEE Std C37.118.2-20ll (Revision

ofIEEE Std C37.118-2005), 2011: p. 1-53.

## Гораздо больше, чем просто документы.

Откройте для себя все, что может предложить Scribd, включая книги и аудиокниги от крупных издательств.

Отменить можно в любой момент.