9684 KRUG 15 UMA-Latitude E5520

5 4 3 2 1
KRUG 15" UMA Block Diagram

XDP Debug
D
PG 6 Sandy Bridge D
(35W)
DDR3 SODIMM (A) LCD
Dual Channel DDR3
1333MHz 1.5V
PG 27
( rPGA 988 )
DDR3 SODIMM (B) PG 2,3,4,5 CRT MUX

PG 14, 15 CRT
MAX4885EETG+TCK2
PG 27
PG 26 Locate at I/O R
FDI DMI
MINI-CARD 3
HDMI Conn
Flash PCIE (#5) LVDS
PG25
PCH_VGA
PG 30 PCH_DPB DOCK_VGA
PCH_DPC DOCK_DP1
MINI-CARD 2 PCIE (#2)
WLAN PCH_DPD DOCK_DP2
USB2.0 (#4) DOCK_LAN
C
PG 31 C
PG 33 LAN LAN Switch

PCIE (#1) PCIE (#7) RJ-MAC
MINI-CARD 1 BCM5761 PI3L720ZHE
USB2.0 (#13)
WWAN PG 43
PG 40~42 Locate at I/O R
PG 32
5 in 1 Conn PCIE (#6)
OZ600RJ1LN-B MDC RJ11
MS/MMC/SD Locate at I/O R
PG 44 PG 44
Locate at I/O L board Dock-I2S
HD Audio
1394a 92HD90B
PG 44 IHDA Speaker
DC Jack BAT CONN
MIC/HP Combo Jack
PG 50
PCIE (#3) PG 24
PCIE (#3) Cougar Point BATT CHARGER
OZ600TJ0TN USB2.0 (#1)
PC MCIA USB 2.0 x 1 CONN Locate at Audio/B PG 51
OZ2522LN
USB2.0 (#12)
HM65
REGULATOR (DC/DC)
PCIE (#3) USB2.0 (#0) +3.3V_ALW/+5V_ALW/+15V_ALW
USB 2.0 x 1 CONN Locate at I/O R
TPS2231MRGPR Express Card USB2.0 (#12) PG 59
USB2.0 (#3) Docking Power
USB 2.0 x 1 CONN PG 52
PG 29
B Smart Card USB2.0 (#12) B
Smart Card CONN USB2.0 (#2) RUN POWER SW PG 60
OZ77CR6LN
eSATA /
(Option) SATA (#4) USB 2.0 CONN
PG 29
SATA (#0) Camera REGULATOR/LDO (DDR)
2.5" HDD Conn USB2.0 (#11) +1.5V_MEM/+0.75V_DDR_VTT
DE351DLTR8 SMBus PG 55
PG 27
PG 28 PG 28 PG 7 ~ 13 USB2.0 (#8, #9) REGULATOR (PCH /CPU)
+1.05V_RUN/+1.8V_RUN
SATA (#1) SATA (#5) PG 57, 54
ODD
REGULATOR (CPU VR, 0.85V)
PG 28 USB2.0 (#5) SPI ROM +VCC_CORE, +VCC_GFXCORE, +0.85V_RUN
uBT
PG 31 SPI 4MBytes
USB2.0 (#10) PG 53,56
2MBytes
BIO Sensor LPC
PG 45
LPC LPC Expander I/O D_LPC
PG 48
PG 38 ECE5048
PG 34
BC bus
TPM Thermal FAN
BC bus DMIC Hall IC LED RTC
AT97SC3204-X2A121-2 SIO EMC4021 PG 39
A
(BTO) MEC5055 PG 39 PG 36 PG 49 A
BC bus Keyboard Locate at Media/B Locate at LED/B

KBC
ECE1177
PS/2
PG 33
PG 35 Ever Light
Technology Limited
Touch Pad Title
PG 35 01 -- BLOCK DIAGRAM
Size Document Number Rev
KBC Module & TP Module KRUG 15" UMA 1A
Date: Wednesday, February 16, 2011 Sheet 1 of 69

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PEG_RCOMPO (H22) R_COMP place close to CPU
width 4 mils
SANDY BRIDGE PROCESSOR HOST, PEG, Others
PEG_ICOMPI (J22) VCC_IO
Trace length Max is 500 mils width 12 mils

PEG_ICOMPO (J21) R_COMP
+1.05V_RUN JCPU1B
JCPU1A
J22 PEG_COMP R323 24.9 +/-1%
PEG_ICOMPI J21
B27 PEG_ICOMPO H22 A28 CPU_DMI R679 *0_NC_SHORT +/-5%
[7] DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO BCLK CLK_CPU_DMI [10]
MISC
CLOCKS
B25 C26 A27 CPU_DMI# R681 *0_NC_SHORT +/-5%
[7] DMI_CRX_PTX_N1 DMI_RX#[1] PROC_SELECT# BCLK# CLK_CPU_DMI# [10]
A25
[7] DMI_CRX_PTX_N2 DMI_RX#[2]
B24 K33
[7] DMI_CRX_PTX_N3 DMI_RX#[3] PEG_RX#[0] M35 AN34
PEG_RX#[1] [34] CPU_DETECT# SKTOCC#
B28 L34 A16 DPLL_REF_SSCLK
D [7] DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] DPLL_REF_CLK D
B26 J35 A15 DPLL_REF_SSCLK#
[7] DMI_CRX_PTX_P1 DMI_RX[1] PEG_RX#[3] DPLL_REF_CLK#
A24 J32 C546
[7] DMI_CRX_PTX_P2
DMI
B23 DMI_RX[2] PEG_RX#[4] H34
[7] DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5]
1028: Add for ESdD solution *470pF_NC
H31 50V,X7R H_CATERR# AL33
G21 PEG_RX#[6] G33 CATERR#
[7] DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
E22 G30
THERMAL
F21 F35
D21 E34 AN33 R8 DDR3_DRAMRST#_CPU
[7] DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] [11,33] H_PECI PECI SM_DRAMRST#
E32
PEG_RX#[11]
DDR3
MISC
G22 D33
[7] DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12]
D22 D31
[7] DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
F20 B33 [33,51,56] H_PROCHOT# R293 56+/-5% H_PROCHOT#_R AL32 AK1 SM_RCOMP0
[7] DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] PROCHOT# SM_RCOMP[0]
PCI EXPRESS* - GRAPHICS

C21 C32 A5 SM_RCOMP1
[7] DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] SM_RCOMP[1] A4 SM_RCOMP2
J33 SM_RCOMP[2]
PEG_RX[0]
Max 500mils
L35 R291 *0_NC_SHORT +/-5% H_THERMTRIP#_R AN32
PEG_RX[1] [39] H_THERMTRIP# THERMTRIP#
K34
A21 PEG_RX[2] H35
[7] FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3]
H19 H32
E19 G34
F18 G31 AP29 XDP_PRDY#
[7] FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] PRDY# XDP_PRDY# [6]
Intel(R) FDI
B21 F33 place R6,R7 near CPU AP27 XDP_PREQ#
[7] FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7] PREQ# XDP_PREQ# [6]
C20 F30
D18 E35 AR26 XDP_TCLK
[7] FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9] TCK XDP_TCLK [6]
PWR MANAGEMENT
E17 E33 AR27 XDP_TMS
JTAG & BPM

[7] FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10] TMS XDP_TMS [6]
F32 AM34 AP30 XDP_TRST#
PEG_RX[11] [7] H_PM_SYNC PM_SYNC TRST# XDP_TRST# [6]
D34
A22 PEG_RX[12] E31 AR28 XDP_TDI_R R682 *0_NC +/-5%
[7] FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13] TDI XDP_TDI [6]
G19 C33 AP26 XDP_TDO_R R314 *0_NC +/-5%
[7] FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14] TDO XDP_TDO [6]
E20 B32 R277 *0_NC_SHORT +/-5% VCCPWRGOOD_0_R AP33
[7] FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] [6,11] H_CPUPWRGD UNCOREPWRGOOD
G18
[7] FDI_CTX_PRX_P3 FDI0_TX[3]
B20 M29
[7] FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
C19 M32 AL35 XDP_DBRESET#_R R662 *0_NC_SHORT +/-5%
[7] FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1] DBR# XDP_DBRESET# [6,7]
D19 M31 PM_DRAM_PWRGD_CPU V8
[7] FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2] SM_DRAMPWROK XDP_OBS[0..7] [6]
F17 L32
[7] FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] L29 AT28 XDP_OBS0_R R684 *0_NC +/-5% XDP_OBS0
J18 PEG_TX#[4] K31 BPM#[0] AR29 XDP_OBS1_R R678 *0_NC +/-5% XDP_OBS1
[7] FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] BPM#[1]
C J17 K28 VCCPWRGOOD_0_R AR30 XDP_OBS2_R R676 *0_NC +/-5% XDP_OBS2 C
[7] FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] BPM#[2]
J30 PCH_PLTRST#_R AR33 AT30 XDP_OBS3_R R677 *0_NC +/-5% XDP_OBS3
H20 PEG_TX#[7] J28 RESET# BPM#[3] AP32 XDP_OBS4_R R304 *0_NC +/-5% XDP_OBS4
[7] FDI_INT FDI_INT PEG_TX#[8] BPM#[4]
H29 AR31 XDP_OBS5_R R674 *0_NC +/-5% XDP_OBS5
J19 PEG_TX#[9] G27 R278 BPM#[5] AT31 XDP_OBS6_R R675 *0_NC +/-5% XDP_OBS6
[7] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] BPM#[6]
H17 E29 10K AR32 XDP_OBS7_R R273 *0_NC +/-5% XDP_OBS7
[7] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] BPM#[7]
F27 +/-5%
PEG_TX#[12] D28
+1.05V_RUN PEG_TX#[13] F26
PEG_TX#[14] E25
R692 24.9 EDP_COMP A18 PEG_TX#[15] CPU socket
+/-1% A17 eDP_COMPIO M28
eDP_ICOMPO PEG_TX[0]
Close to CPU
B16 M33 Avoid stub in the PWRGD path
eDP_HPD PEG_TX[1] M30
PEG_TX[2] L31
while placing resistors R277 & R278
C15 PEG_TX[3] L28 +1.05V_RUN
D15 eDP_AUX PEG_TX[4] K30
eDP_AUX# PEG_TX[5] K27
eDP
PEG_TX[6] J29 +3.3V_RUN

C17 PEG_TX[7] J27 R279 *56_NC H_THERMTRIP# +1.05V_RUN
F16 eDP_TX[0] PEG_TX[8] H28 +/-5%
C16 eDP_TX[1] PEG_TX[9] G28 +1.05V_RUN XDP_TMS R686 51 +/-5%
G15 eDP_TX[2] PEG_TX[10] E28 C450 R292 *49.9_NC H_CATERR# XDP_TDI_R R680 51 +/-5%
eDP_TX[3] PEG_TX[11] F28 0.1uF +/-1% XDP_PREQ# R308 *51_NC +/-1%
C18 PEG_TX[12] D27 10V,X5R DPLL_REF_SSCLK# R694 1K +/-5%
E16 eDP_TX#[0] PEG_TX[13] E26 R670 R281 62 H_PROCHOT#
D16 eDP_TX#[1] PEG_TX[14] D25 75 +/-5%
eDP_TX#[2] PEG_TX[15] U36
5
F15 +/-1%
eDP_TX#[3]
2 4 PCH_PLTRST#_BUF R672 43 PCH_PLTRST#_R XDP_TCLK R688 51 +/-5%
[8,9,11,30,31,32,33,34,46] PCH_PLTRST#
CPU socket +/-1% XDP_TRST# R305 51 +/-5%
NC 74LVC1G07GW
1
Each FDI pipeline can be configured according to required display bandwidth R673 SM_RCOMP0 R392 140 +/-1%
requirements. 1, 2, 3 or 4 Lanes may be used to transport frame data over the link. *0_NC
Trace length Max is 500 mils Each Lane transports at a rate of 2.7 Gbps and uses ANSI 8b10b encoding. +/-5% SM_RCOMP1 R695 25.5 +/-1%
DG(V0.7) P49: FDI Disable SM_RCOMP2 R696 200 +/-1%

B B
R_COMP place close to CPU FDI_TX[7:0] FDI_TX#[7:0] Can float on the processor. DPLL_REF_SSCLK R693 1K +/-5%
width 4 mils FDI_FSYNC[0..1],FDI_LSYNC[0..1],FDI_INT

eDP_COMPIO (A18) VCC_IO Can be tied to GND (through 1K 5% resistors); In addition,
FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0],
width 12 mils FDI_LSYNC[1] can be ganged together with one resistor.
eDP_ICOMPO (A17) R_COMP If left as no connect, there is no functional impact, but power
(~15 mW) may be wasted.
For CPU S3 Power Reduce +1.5V_MEM
R710 *0_NC +/-5%
R711
1K Q49
+/-5% BSS138
[14,15] DDR3_DRAMRST# R713 1K +/-5% D S DDR3_DRAMRST#_CPU
[5,10] DDR_HVREF_RST_PCH R705 *0_NC_SHORT +/-5% G

+3.3V_ALW_PCH +1.5V_RUN R706 *0_NC +/-5%
[33] DDR_HVREF_RST_GATE
Should be kept minimal R707
(can be shorter than 0.125"). 4.99K
C190 0.1uF 10V,X5R C495 +/-1%
R363 47nF
+3.3V_ALW_PCH 200 16V,X7R
5
U17 +/-5%
[33,34] RUNPWROK 2
4 RUNPWROK_AND PM_DRAM_PWRGD_CPU
R225 200 +/-5% 1 R376 130 +/-5%
74AHC1G09GW
3
[7] PM_DRAM_PWRGD R372

39
+/-5%
A A
D
Q23
2N7002W-7-F
[60] RUN_ON_CPU1.5VS3# R364 *0_NC_SHORT +/-5% G
S Ever Light
Technology Limited
need to confirm component of AND gate and MOS Title
02 -- SNB (rPGA) 1/4 HOST, PEG
Follow DG SM_DRAMPWROK topology
KRUG 15" UMA 1A

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5 4 3 2 1
D SANDY BRIDGE PROCESSOR (DDR3) D
JCPU1C JCPU1D
AB6 AE2
SA_CLK[0] DDR_A_CLK0 [14] SB_CLK[0] DDR_B_CLK0 [15]
AA6 AD2
[14] DDR_A_D[0..63] SA_CLK#[0] DDR_A_CLK#0 [14] [15] DDR_B_D[0..63] SB_CLK#[0] DDR_B_CLK#0 [15]
DDR_A_D0 C5 V9 DDR_B_D0 C9 R9
SA_DQ[0] SA_CKE[0] DDR_A_CKE0 [14] SB_DQ[0] SB_CKE[0] DDR_B_CKE0 [15]
DDR_A_D1 D5 DDR_B_D1 A7
DDR_A_D2 D3 SA_DQ[1] DDR_B_D2 D10 SB_DQ[1]
DDR_A_D3 D2 SA_DQ[2] DDR_B_D3 C8 SB_DQ[2]
DDR_A_D4 D6 SA_DQ[3] AA5 DDR_B_D4 A9 SB_DQ[3] AE1
SA_DQ[4] SA_CLK[1] DDR_A_CLK1 [14] SB_DQ[4] SB_CLK[1] DDR_B_CLK1 [15]
DDR_A_D5 C6 AB5 DDR_B_D5 A8 AD1
SA_DQ[5] SA_CLK#[1] DDR_A_CLK#1 [14] SB_DQ[5] SB_CLK#[1] DDR_B_CLK#1 [15]
DDR_A_D6 C2 V10 DDR_B_D6 D9 R10
SA_DQ[6] SA_CKE[1] DDR_A_CKE1 [14] SB_DQ[6] SB_CKE[1] DDR_B_CKE1 [15]
DDR_A_D7 C3 DDR_B_D7 D8
DDR_A_D8 F10 SA_DQ[7] DDR_B_D8 G4 SB_DQ[7]
DDR_A_D9 F8 SA_DQ[8] DDR_B_D9 F4 SB_DQ[8]
DDR_A_D10 G10 SA_DQ[9] AB4 DDR_B_D10 F1 SB_DQ[9] AB2
DDR_A_D11 G9 SA_DQ[10] SA_CLK[2] AA4 DDR_B_D11 G1 SB_DQ[10] SB_CLK[2] AA2
DDR_A_D12 F9 SA_DQ[11] SA_CLK#[2] W9 DDR_B_D12 G5 SB_DQ[11] SB_CLK#[2] T9
DDR_A_D13 F7 SA_DQ[12] SA_CKE[2] DDR_B_D13 F5 SB_DQ[12] SB_CKE[2]
DDR_A_D14 G8 SA_DQ[13] DDR_B_D14 F2 SB_DQ[13]
DDR_A_D15 G7 SA_DQ[14] DDR_B_D15 G2 SB_DQ[14]
DDR_A_D16 K4 SA_DQ[15] AB3 DDR_B_D16 J7 SB_DQ[15] AA1
DDR_A_D17 K5 SA_DQ[16] SA_CLK[3] AA3 DDR_B_D17 J8 SB_DQ[16] SB_CLK[3] AB1
DDR_A_D18 K1 SA_DQ[17] SA_CLK#[3] W10 DDR_B_D18 K10 SB_DQ[17] SB_CLK#[3] T10
DDR_A_D19 J1 SA_DQ[18] SA_CKE[3] DDR_B_D19 K9 SB_DQ[18] SB_CKE[3]
DDR_A_D20 J5 SA_DQ[19] DDR_B_D20 J9 SB_DQ[19]
DDR_A_D21 J4 SA_DQ[20] DDR_B_D21 J10 SB_DQ[20]
DDR_A_D22 J2 SA_DQ[21] AK3 DDR_B_D22 K8 SB_DQ[21] AD3
SA_DQ[22] SA_CS#[0] DDR_A_CS#0 [14] SB_DQ[22] SB_CS#[0] DDR_B_CS#0 [15]
DDR_A_D23 K2 AL3 DDR_B_D23 K7 AE3
SA_DQ[23] SA_CS#[1] DDR_A_CS#1 [14] SB_DQ[23] SB_CS#[1] DDR_B_CS#1 [15]
DDR_A_D24 M8 AG1 DDR_B_D24 M5 AD6
DDR_A_D25 N10 SA_DQ[24] SA_CS#[2] AH1 DDR_B_D25 N4 SB_DQ[24] SB_CS#[2] AE6
C C
DDR_A_D26 N8 SA_DQ[25] SA_CS#[3] DDR_B_D26 N2 SB_DQ[25] SB_CS#[3]
DDR_A_D27 N7 SA_DQ[26] DDR_B_D27 N1 SB_DQ[26]
DDR_A_D28 M10 SA_DQ[27] DDR_B_D28 M4 SB_DQ[27]
DDR_A_D29 M9 SA_DQ[28] AH3 DDR_B_D29 N5 SB_DQ[28] AE4
SA_DQ[29] SA_ODT[0] DDR_A_ODT0 [14] SB_DQ[29] SB_ODT[0] DDR_B_ODT0 [15]
DDR SYSTEM MEMORY B

DDR_A_D30 N9 DDR SYSTEM MEMORY A AG3 DDR_B_D30 M2 AD4
SA_DQ[30] SA_ODT[1] DDR_A_ODT1 [14] SB_DQ[30] SB_ODT[1] DDR_B_ODT1 [15]
DDR_A_D31 M7 AG2 DDR_B_D31 M1 AD5
DDR_A_D32 AG6 SA_DQ[31] SA_ODT[2] AH2 DDR_B_D32 AM5 SB_DQ[31] SB_ODT[2] AE5
DDR_A_D33 AG5 SA_DQ[32] SA_ODT[3] DDR_B_D33 AM6 SB_DQ[32] SB_ODT[3]
DDR_A_D34 AK6 SA_DQ[33] DDR_B_D34 AR3 SB_DQ[33]
DDR_A_D35 AK5 SA_DQ[34] DDR_B_D35 AP3 SB_DQ[34]
DDR_A_D36 AH5 SA_DQ[35] DDR_B_D36 AN3 SB_DQ[35]
SA_DQ[36] DDR_A_DQS#[0..7] [14] SB_DQ[36] DDR_B_DQS#[0..7] [15]
DDR_A_D37 AH6 C4 DDR_A_DQS#0 DDR_B_D37 AN2 D7 DDR_B_DQS#0
DDR_A_D38 AJ5 SA_DQ[37] SA_DQS#[0] G6 DDR_A_DQS#1 DDR_B_D38 AN1 SB_DQ[37] SB_DQS#[0] F3 DDR_B_DQS#1
DDR_A_D39 AJ6 SA_DQ[38] SA_DQS#[1] J3 DDR_A_DQS#2 DDR_B_D39 AP2 SB_DQ[38] SB_DQS#[1] K6 DDR_B_DQS#2
DDR_A_D40 AJ8 SA_DQ[39] SA_DQS#[2] M6 DDR_A_DQS#3 DDR_B_D40 AP5 SB_DQ[39] SB_DQS#[2] N3 DDR_B_DQS#3
DDR_A_D41 AK8 SA_DQ[40] SA_DQS#[3] AL6 DDR_A_DQS#4 DDR_B_D41 AN9 SB_DQ[40] SB_DQS#[3] AN5 DDR_B_DQS#4
DDR_A_D42 AJ9 SA_DQ[41] SA_DQS#[4] AM8 DDR_A_DQS#5 DDR_B_D42 AT5 SB_DQ[41] SB_DQS#[4] AP9 DDR_B_DQS#5
DDR_A_D43 AK9 SA_DQ[42] SA_DQS#[5] AR12 DDR_A_DQS#6 DDR_B_D43 AT6 SB_DQ[42] SB_DQS#[5] AK12 DDR_B_DQS#6
DDR_A_D44 AH8 SA_DQ[43] SA_DQS#[6] AM15 DDR_A_DQS#7 DDR_B_D44 AP6 SB_DQ[43] SB_DQS#[6] AP15 DDR_B_DQS#7
DDR_A_D45 AH9 SA_DQ[44] SA_DQS#[7] DDR_B_D45 AN8 SB_DQ[44] SB_DQS#[7]
DDR_A_D46 AL9 SA_DQ[45] DDR_B_D46 AR6 SB_DQ[45]
DDR_A_D48 AP11 SA_DQ[47] DDR_B_D48 AR9 SB_DQ[47]
SA_DQ[48] DDR_A_DQS[0..7] [14] SB_DQ[48] DDR_B_DQS[0..7] [15]
DDR_A_D49 AN11 D4 DDR_A_DQS0 DDR_B_D49 AJ11 C7 DDR_B_DQS0
DDR_A_D50 AL12 SA_DQ[49] SA_DQS[0] F6 DDR_A_DQS1 DDR_B_D50 AT8 SB_DQ[49] SB_DQS[0] G3 DDR_B_DQS1
DDR_A_D51 AM12 SA_DQ[50] SA_DQS[1] K3 DDR_A_DQS2 DDR_B_D51 AT9 SB_DQ[50] SB_DQS[1] J6 DDR_B_DQS2
DDR_A_D52 AM11 SA_DQ[51] SA_DQS[2] N6 DDR_A_DQS3 DDR_B_D52 AH11 SB_DQ[51] SB_DQS[2] M3 DDR_B_DQS3
DDR_A_D53 AL11 SA_DQ[52] SA_DQS[3] AL5 DDR_A_DQS4 DDR_B_D53 AR8 SB_DQ[52] SB_DQS[3] AN6 DDR_B_DQS4
DDR_A_D54 AP12 SA_DQ[53] SA_DQS[4] AM9 DDR_A_DQS5 DDR_B_D54 AJ12 SB_DQ[53] SB_DQS[4] AP8 DDR_B_DQS5
DDR_A_D55 AN12 SA_DQ[54] SA_DQS[5] AR11 DDR_A_DQS6 DDR_B_D55 AH12 SB_DQ[54] SB_DQS[5] AK11 DDR_B_DQS6
DDR_A_D56 AJ14 SA_DQ[55] SA_DQS[6] AM14 DDR_A_DQS7 DDR_B_D56 AT11 SB_DQ[55] SB_DQS[6] AP14 DDR_B_DQS7
DDR_A_D57 AH14 SA_DQ[56] SA_DQS[7] DDR_B_D57 AN14 SB_DQ[56] SB_DQS[7]
DDR_A_D59 AK15 SA_DQ[58] DDR_B_D59 AT14 SB_DQ[58]
DDR_A_D60 AL14 SA_DQ[59] DDR_B_D60 AT12 SB_DQ[59]
SA_DQ[60] DDR_A_MA[0..15] [14] SB_DQ[60] DDR_B_MA[0..15] [15]
DDR_A_D61 AK14 AD10 DDR_A_MA0 DDR_B_D61 AN15 AA8 DDR_B_MA0
DDR_A_D62 AJ15 SA_DQ[61] SA_MA[0] W1 DDR_A_MA1 DDR_B_D62 AR15 SB_DQ[61] SB_MA[0] T7 DDR_B_MA1
B
DDR_A_D63 AH15 SA_DQ[62] SA_MA[1] W2 DDR_A_MA2 DDR_B_D63 AT15 SB_DQ[62] SB_MA[1] R7 DDR_B_MA2 B
SA_DQ[63] SA_MA[2] W7 DDR_A_MA3 SB_DQ[63] SB_MA[2] T6 DDR_B_MA3
SA_MA[3] V3 DDR_A_MA4 SB_MA[3] T2 DDR_B_MA4
SA_MA[4] V2 DDR_A_MA5 SB_MA[4] T4 DDR_B_MA5
SA_MA[5] W3 DDR_A_MA6 SB_MA[5] T3 DDR_B_MA6
AE10 SA_MA[6] W6 DDR_A_MA7 AA9 SB_MA[6] R2 DDR_B_MA7
[14] DDR_A_BS0 SA_BS[0] SA_MA[7] [15] DDR_B_BS0 SB_BS[0] SB_MA[7]
AF10 V1 DDR_A_MA8 AA7 T5 DDR_B_MA8
V6 W5 DDR_A_MA9 R6 R3 DDR_B_MA9
AD8 DDR_A_MA10 AB7 DDR_B_MA10
SA_MA[10] V4 DDR_A_MA11 SB_MA[10] R1 DDR_B_MA11
SA_MA[11] W4 DDR_A_MA12 SB_MA[11] T1 DDR_B_MA12
AE8 SA_MA[12] AF8 DDR_A_MA13 AA10 SB_MA[12] AB10 DDR_B_MA13
[14] DDR_A_CAS# SA_CAS# SA_MA[13] [15] DDR_B_CAS# SB_CAS# SB_MA[13]
AD9 V5 DDR_A_MA14 AB8 R5 DDR_B_MA14
[14] DDR_A_RAS# SA_RAS# SA_MA[14] [15] DDR_B_RAS# SB_RAS# SB_MA[14]
AF9 V7 DDR_A_MA15 AB9 R4 DDR_B_MA15
[14] DDR_A_WE# SA_WE# SA_MA[15] [15] DDR_B_WE# SB_WE# SB_MA[15]
CPU socket CPU socket
A A
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Title
03 -- SNB (rPGA) 2/4 DDR
KRUG 15" UMA 1A

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SANDY BRIDGE PROCESSOR (POWER)

SANDY BRIDGE PROCESSOR (GRAPHICS POWER)
JCPU1F POWER +1.5V_RUN
VCCCORE = (SV) xxA max +0.75V_DDR_VTT SM_VREF_RES
+VCC_CORE 18-mil witdh,and shoulde use differential routing with 7-milseparation. R702
+1.05V_RUN Signals must have equal trace length *1K_NC
within 25 mils and are to be routed using external layer and +/-1%
AG35
AG34
AG33
VCC1
VCC2 VCCIO1
AH13
AH10 +VCC_GFXCORE JCPU1G
POWER GND referencing (no split plane referencing). VSS_SENSE,
VCC_SENSE are to use 25-mils separation from any other
signal or rail.
R703 *0_NC_SHORT +/-5%
AG32 VCC3 VCCIO2 AG10 C492 R704

AG31 VCC4 VCCIO3 AC10 *0.1uF_NC *1K_NC
VCC5 VCCIO4 26A
SENSE
LINES
AG30 Y10 AT24 AK35 10V,X5R +/-1%
VCC6 VCCIO5 VAXG1 VAXG_SENSE VAXG_SENSE [56]
AG29 U10 AT23 AK34
VCC7 VCCIO6 VAXG2 VSSAXG_SENSE VSSAXG_SENSE [56]
AG28 P10 C237 C234 C472 C470 C459 C471 AT21
AG27 VCC8 VCCIO7 L10 22uF 22uF 22uF 22uF 22uF 22uF AT20 VAXG3
D D
AG26 VCC9 VCCIO8 J14 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S AT18 VAXG4
AF35 VCC10 VCCIO9 J13 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 AT17 VAXG5
AF34 VCC11 VCCIO10 J12 AR24 VAXG6
AF33 VCC12 VCCIO11 J11 AR23 VAXG7
AF32 VCC13 VCCIO12 H14 AR21 VAXG8
AF31 VCC14 VCCIO13 H12 AR20 VAXG9 SM_VREF_RES
VCC15 VCCIO14 VAXG10
VREF
AF30 H11 AR18
AF29 VCC16 VCCIO15 G14 AR17 VAXG11
AF28 VCC17 VCCIO16 G13 AP24 VAXG12 AL1
VCC18 VCCIO17 VAXG13 SM_VREF
PEG AND DDR
AF27 G12 AP23
AF26 VCC19 VCCIO18 F14 AP21 VAXG14
AD35 VCC20 VCCIO19 F13 C463 C461 C246 C241 C240 C243 AP20 VAXG15
AD34 VCC21 VCCIO20 F12 22uF 22uF 22uF 22uF 22uF 22uF AP18 VAXG16 C501 100nF 10V,Y5V
AD33 VCC22 VCCIO21 F11 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S AP17 VAXG17
VCC23 VCCIO22 VAXG18
+V_SM_VREF should
AD32 E14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 AN24 +1.5V_RUN C499 100nF 10V,Y5V
VCC24 VCCIO23 VAXG19 have 10 mil trace width
AD31 E12 AN23
AD30 VCC25 VCCIO24 AN21 VAXG20 C500 100nF 10V,Y5V
AD29 VCC26 E11 AN20 VAXG21
AD28 VCC27 VCCIO25 D14 AN18 VAXG22
DDR3 -1.5V RAILS

VCC28 VCCIO26 Power page : VAXG23 5A C502 100nF 10V,Y5V
AD27 D13 AN17
VCC29 VCCIO27 330uF x 2 VAXG24
GRAPHICS
AD26 D12 AM24 AF7
AC35 VCC30 VCCIO28 D11 0.1uF x 2 AM23 VAXG25 VDDQ1 AF4 Power page :
VCC31 VCCIO29 VAXG26 VDDQ2
AC34
VCC32 VCCIO30
C14 EE page : AM21
VAXG27 VDDQ3
AF1 C497 C254 C252 C251 C253 C496
330uF x 2
AC33 C13 22uF x 12 AM20 AC7 10uF 10uF 10uF 10uF *10uF_NC 10uF
AC32 VCC33 VCCIO31 C12 AM18 VAXG28 VDDQ4 AC4 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 10uF x 1
AC31
VCC35 VCCIO33
C11 AM17
VAXG30 VDDQ6
AC1 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 EE page :
AC30 B14 Intel DG : AL24 Y7 330uF x 1
AC29 VCC36 VCCIO34 B12 AL23 VAXG31 VDDQ7 Y4
VCC37 VCCIO35 470uF x 2 Bottom Socket Edge VAXG32 VDDQ8 10uF x 5
AC28 A14 AL21 Y1
AC27 VCC38 VCCIO36 A13
22uF x 2 Top Socket Cavity AL20 VAXG33 VDDQ9 U7
AC26 VCC39 VCCIO37 A12 22uF x 4 Top Socket Edge AL18 VAXG34 VDDQ10 U4 C498 Intel DG :
AA35
VCC41 VCCIO39
A11 22uF x 2 Bottom Socket Cavity AL17
VAXG36 VDDQ12
U1 330uF
330uF x 1 Bottom Socket Edge
AA34 22uF x 4 Bottom Socket Edge AK24 P7 2V,+/-20%
AA33 VCC42 J23 AK23 VAXG37 VDDQ13 P4 10uF x 6 Bottom Socket Edge
AA32 VCC43 VCCIO40 AK21 VAXG38 VDDQ14 P1
AA31 VCC44 AK20 VAXG39 VDDQ15
AA30 VCC45 AK18 VAXG40
AA29 VCC46 AK17 VAXG41
VCC47 VIDALERT# VAXG42
AA28 AJ24
AA27 VCC48 Connect one end of series-resistor 435% close to AJ23 VAXG43
VCC49 VAXG44 Power page :
AA26 processor and pull-up to VCCIO through 755% on AJ21
VCC50 VAXG45 +0.85V_RUN 330uF x 1
CORE SUPPLY
Y35 the other end of the series-resistor towards Intel MVP 7. AJ20
Y34 VCC51 AJ18 VAXG46 10uF x1
Y33 VCC52 AJ17 VAXG47 6A EE page :
C
Y32 VCC53 +1.05V_RUN AH24 VAXG48 C
10uF x 2, NC x 2
SA RAIL
Y31 VCC54 AH23 VAXG49 C236 C229 C449 C232
Y30 VCC55 AH21 VAXG50 M27 *10uF_NC 10uF 10uF *10uF_NC
Y29 VCC56 AH20 VAXG51 VCCSA1 M26 4V,X6S 4V,X6S 4V,X6S 4V,X6S Intel DG :
Y28 VCC57 VIDSOUT R280 130 +/-5% AH18 VAXG52 VCCSA2 L26 c0805h14 c0805h14
VCC58 VAXG53 VCCSA3 330uF x 1 near CPU
Y27 AH17 J26
Y26 VCC59 VAXG54 VCCSA4 J25
10uF x 2 Bottom Socket Cavity
VCC60 Close to CPU VCCSA5
V35 J24 10uF x 1 Bottom Socket Edge
VCC61 VCCSA6
SVID
V34 AJ29 H_CPU_SVIDALRT# R294 43 +/-5% VIDALERT# [56] H26

V33 VCC62 VIDALERT# AJ30 VCCSA7 H25 R687 *0_NC_SHORT +/-5%
VCC63 VIDSCLK VIDCLK [56] VCCSA8 VCCSA_GND [53]
V32 AJ28 VIDSOUT VIDSOUT [56]
VCC64 VIDSOUT
1.8V RAIL
V31
V30 VCC65 +1.8V_RUN
VCC66 VIDSOUT:
V29 10mil .Spacing is 10mil
V28 VCC67 Requires a pull-up to VCCIO through a pull-up resistor of
V27 VCC68 130 5% close to the processor, and a pull-up to VCCIO 3A B6 H23
VCC69 VCCPLL1 VCCSA_SENSE VCCSA_SENSE [53]
MISC
V26 through a pull-up resistor of 130 5% close to Intel MVP 7. A6
U35 VCC70 C249 C487 C486 C485 A2 VCCPLL2
U34 VCC71 VIDSCLK: 330uF 10uF 1uF 1uF VCCPLL3
U33 VCC72 Required pull-up to VCCIO through 55 5% close to Intel 2.5V,<9mOhm 4V,X6S 6.3V,X5R 6.3V,X5R C22 H_FC_C22
U32 VCC73 c0805h14 c0402h6 c0402h6 FC_C22 C24 VCCSA_VID1 R683 *0_NC_SHORT +/-5%
VCC74 IMVP 7. VCCSA_VID1 VCCSA_CNTRL1 [53]
U31
U30 VCC75
VCC76 Power page :
U29 R689 R685
U28 VCC77 22uF x 1 CPU socket
VCC78 1K 1K
U27 0.1uF x 1
VCC79 +/-5% +/-5%
U26
VCC80
18-mil witdh,and shoulde use differential +VCC_CORE EE page :
R35 routing with 7-milseparation. 330uF x 1
R34 VCC81 Signals must have equal trace length
R33 VCC82
within 25 mils and are to be routed using external layer and VCC_SENSE & VSS_SENSE: 10uF x 1
R32 VCC83 R663 xxxxxx 1uF x 2
GND referencing (no split plane referencing). VSS_SENSE,
R31 VCC84 100 100- 1% pull-down to GND near processor
VCC_SENSE are to use 25-mils separation from any other
R30 VCC85 +/-1%
signal or rail. Intel DG :
R29 VCC86
VCC87 330uF x 1 Bottom Socket Edge
SENSE LINES
R28
VCC88
R27
VCC89 VCC_SENSE
AJ35 VCCSENSE_R R664 *0_NC_SHORT +/-5%
VCCSENSE [56]
10uF x 1 Bottom Socket Edge
R26 AJ34 VSSSENSE_R R665 *0_NC_SHORT +/-5% VSSSENSE VSSSENSE 1uF x2 Bottom Socket Edge
VCC90 VSS_SENSE VSSSENSE [56]
P35
P34 VCC91
P33 VCC92
P32 VCC93 B10 R666
VCC94 VCCIO_SENSE VCCIO_SENSE [57]
P31 A10 100
VCC95 VSSIO_SENSE VSSIO_SENSE [57]
P30 +/-1%
P29 VCC96
P28 VCC97
B B
P27 VCC98
P26 VCC99
VCC100 +1.05V_RUN
C245 C242 C474 C480 C479 C478 C477 C481 C250 C476 C475
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF *22uF_NC *22uF_NC
CPU socket 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
+VCC_CORE C235 C258 C256 C483 C257 C482 C255 C484 C226 C248
22uF *22uF_NC *22uF_NC *22uF_NC 22uF *22uF_NC *22uF_NC 22uF *330uF_NC 330uF
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 2V,<=9mOhm 2V,+/-20%
c0805h14 c0805h14 c0805h14
C213 C197 C455 C454 C452 C535
Power page : 22uF 22uF 22uF 22uF 22uF *22uF_NC
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S Power page :
470uF x 4 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
100nF x 2 330uF x 2
CPU Power Rail Table
EE page : 10uF x 1
22uF x 14 S0 Iccmax EE page :
10uF x 9 Voltage Rail Voltage Current (A) 330uF x 1, NC x 1
C453 C465 C200 C198 C467 C216 22uF x 12, NC x 7
Intel DG : 22uF 22uF *22uF_NC 22uF 22uF 22uF VCC 0.65-1.3 53
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S Intel DG :
470uF x 4 Bottom Socket Edge c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
22uF x 8 Top Socket Cavity 330uF x 2 near CPU
VCCIO 1.05 8.5
22uF x 8 Top Socket Edge 22uF x 5, NC x 5 Bottom Socket Cavity
10uF x 10 Bottom Socket Cavity 22uF x 7, NC x 2 Top Socket Cavity
VAXG 0.0-1.1 33 for 2012 capable designs
C212 C227 C201 C217 C211 C536 330 F x3
22uF 22uF *22uF_NC 22uF 22uF *22uF_NC VCCPLL 1.8 3
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
A
VDDQ 1.5 5 A
VCCSA 0.65-0.9 6
C458 C457 C456 C196 C215
10uF 10uF 10uF 10uF 10uF +1.5V_MEM 1.5 12-16 *
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14
Ever Light
C199
10uF
C228
10uF
C466
10uF
C195
*10uF_NC
C214
10uF
* Description
5A to Mem controller(+1.5V_CPU_VDDQ)
Technology Limited
4V,X6S 4V,X6S 4V,X6S 4V,X6S 4V,X6S Title
c0805h14 c0805h14 c0805h14 c0805h14 c0805h14 5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT 04 -- SNB (rPGA) 3/4 POWER
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
D SANDY BRIDGE PROCESSOR (GND) D
JCPU1H JCPU1I
AT35
VSS1 VSS81
AJ22
SANDY BRIDGE PROCESSOR( RESERVED, CFG)
AT32 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22 JCPU1E
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30
AT22 VSS5 VSS85 AJ7 T32 VSS163 VSS236 E27 L7
VSS6 VSS86 VSS164 VSS237 RSVD28 T96
AT19 AJ4 T31 E24 AG7 T98
VSS7 VSS87 VSS165 VSS238 +VCC_GFXCORE RSVD29
AT16 AJ3 T30 E21 CFG0 AK28 AE7 T100
VSS8 VSS88 VSS166 VSS239 [6] CFG0 CFG[0] RSVD30
AT13 AJ2 T29 E18 CFG1 AK29 AK2 T101
AT10 AJ1 T28 E15 CFG2 AL26 W8 T99
AT7 AH35 T27 E13 CFG3 AL27
VSS11 VSS91 VSS169 VSS242 [6] CFG3 CFG[3]
AT4 AH34 T26 E10 R317 *49.9_NC +/-1% RSVD1 CFG4 AK26
AT3 AH32 P9 E9 CFG5 AL29 AT26 T84
VSS13 VSS93 VSS171 VSS244 +VCC_CORE [6] CFG5 CFG[5] RSVD33
AR25 AH30 P8 E8 CFG6 AL30 AM33 T67
AR22 AH29 P6 E7 CFG7 AM31 AJ27 T82
AR19 AH28 P5 E6 CFG8 AM32
AR16 AH26 P3 E5 R282 *49.9_NC +/-1% RSVD3 CFG9 AM30
AR13 AH25 P2 E4 CFG10 AM28
AR10 AH22 N35 E3 CFG11 AM26
AR7 AH19 N34 E2 T72 CFG12 AN28
AR4 VSS20 VSS100 AH16 N33 VSS178 VSS251 E1 R295 *49.9_NC +/-1% RSVD2 CFG13 AN31 CFG[12] T8
VSS21 VSS101 VSS179 VSS252 T69 CFG[13] RSVD37 T97
AR2 AH7 N32 D35 T81 CFG14 AN26 J16 T88
AP34 VSS22 VSS102 AH4 N31 VSS180 VSS253 D32 R296 *49.9_NC +/-1% RSVD4 CFG15 AM27 CFG[14] RSVD38 H16
VSS23 VSS103 VSS181 VSS254 T75 CFG[15] RSVD39 T91
AP31 AG9 N30 D29 CFG16 AK31 G16 T92
AP28 AG8 N29 D26 R697 *1K_NC +/-1% SA_DIMM_VREFDQ CFG17 AN29
AP25 AG4 N28 D20
AP22 VSS26 VSS106 AF6 N27 VSS184 VSS257 D17 R701 *1K_NC +/-1% SB_DIMM_VREFDQ
AP19 VSS27 VSS107 AF5 N26 VSS185 VSS258 C34
AP16 VSS28 VSS108 AF3 M34 VSS186 VSS259 C31 AR35
AP13 AF2 L33 C28 RSVD1 AJ31 AT34 T62
AP10 VSS30 VSS110 AE35 L30 VSS188 VSS261 C27 RSVD2 AH31 VAXG_VAL_SENSE RSVD42 AT33
VSS31 VSS111 VSS189 VSS262 VSSAXG_VAL_SENSE RSVD43 T70
C AP7 AE34 L27 C25 RSVD3 AJ33 AP35 T65 C
AP4 VSS32 VSS112 AE33 L9 VSS190 VSS263 C23 RSVD4 AH33 VCC_VAL_SENSE RSVD44 AR34
VSS33 VSS113 VSS191 VSS264 VSS_VAL_SENSE RSVD45 T64
AP1 AE32 L8 C10
AN30 VSS34 VSS114 AE31 L6 VSS192 VSS265 C1
AN27 VSS35 VSS115 AE30 L5 VSS193 VSS266 B22 AJ26
VSS36 VSS116 VSS194 VSS267 T87 RSVD5
AN25 AE29 L4 B19
VSS37
VSS VSS117 VSS195
VSS VSS268
RESERVED
AN22 AE28 L3 B17
AN19 VSS38 VSS118 AE27 L2 VSS196 VSS269 B15 B34
AN16 AE26 L1 B13 SA_DIMM_VREFDQ B4 A33 T151
AN13 VSS40 VSS120 AE9 K35 VSS198 VSS271 B11 SB_DIMM_VREFDQ D1 RSVD6 RSVD47 A34
VSS41 VSS121 VSS199 VSS272 RSVD7 RSVD48 T150
AN10 AD7 K32 B9 B35 T153
AN7 VSS42 VSS122 AC9 K29 VSS200 VSS273 B8 RSVD49 C35
VSS43 VSS123 VSS201 VSS274
10mil .Spacing is 10mil RSVD50 T154
AN4 AC8 K26 B7
AM29 VSS44 VSS124 AC6 J34 VSS202 VSS275 B5 F25
AM25 AC5 J31 B3 T74 F24
AM22 VSS46 VSS126 AC3 H33 VSS204 VSS277 B2 F23 RSVD9
AM19 AC2 H30 A35 T85 D24 AJ32 T68
AM16 VSS48 VSS128 AB35 H27 VSS206 VSS279 A32 G25 RSVD11 RSVD51 AK32
VSS49 VSS129 VSS207 VSS280 T73 RSVD12 RSVD52 T66
AM13 AB34 H24 A29 T77 G24
AM10 VSS50 VSS130 AB33 H21 VSS208 VSS281 A26 E23 RSVD13
AM7 AB32 H18 A23 T83 D23
AM4 VSS52 VSS132 AB31 H15 VSS210 VSS283 A20 C30 RSVD15 AH27
VSS53 VSS133 VSS211 VSS284 T79 RSVD16 VCC_DIE_SENSE T76
AM3 AB30 H13 A3 T155 A31
AM2 VSS54 VSS134 AB29 H10 VSS212 VSS285 B30 RSVD17
VSS55 VSS135 VSS213 T157 RSVD18
AM1 AB28 H9 T156 B29
AL34 VSS56 VSS136 AB27 H8 VSS214 D30 RSVD19 AN35
VSS57 VSS137 VSS215 +3.3V_ALW T80 RSVD20 RSVD54 CLK_XDP_ITP [6]
AL31 AB26 H7 T152 B31 AM35 CLK_XDP_ITP# [6]
AL28 VSS58 VSS138 Y9 H6 VSS216 A30 RSVD21 RSVD55
AL25 Y8 H5 VCCIO_SEL(RSVD26): T78 C29
AL22 VSS60 VSS140 Y6 H4 VSS218 R690 RSVD23
AL19 VSS61 VSS141 Y5 H3 VSS219 For Huron River platforms, 10K
AL16 VSS62 VSS142 Y3 H2 VSS220 this pin must be pulled high +/-5% J20
AL13 Y2 H1 on the motherboard. T159 B18 AT2 T160
AL10 VSS64 VSS144 W35 G35 VSS222 H_VCCP_SEL A19 RSVD25 RSVD56 AT1
VSS65 VSS145 VSS223 VCCIO_SEL RSVD57 T161
AL7 W34 G32 AR1 T163
AL4 VSS66 VSS146 W33 G29 VSS224 RSVD58
AL2 VSS67 VSS147 W32 G26 VSS225 J15
AK33 W31 G23
B
AK30 VSS69 VSS149 W30 G20 VSS227 B
AK27 VSS70 VSS150 W29 G17 VSS228 B1
VSS71 VSS151 VSS229 KEY T162
AK25 W28 G11
AK22 VSS72 VSS152 W27 F34 VSS230
AK19 VSS73 VSS153 W26 F31 VSS231
AK16 VSS74 VSS154 U9 F29 VSS232
AK13 VSS75 VSS155 U8 VSS233
AK10 VSS76 VSS156 U6
AK7 VSS77 VSS157 U5 CPU socket
AK4 VSS78 VSS158 U3
AJ25 VSS79 VSS159 U2
VSS80 VSS160
CFG2 R315 *1K_NC +/-5%
1 0 CFG4 R318 *1K_NC +/-5%

CPU socket CPU socket
CFG2 Lan# definition matches CFG5 R309 *1K_NC +/-5%
(PEG Static socket pin map definition Lan Reversed CFG6 R275 *1K_NC +/-5%
Lane Reversal) (Default Value) CFG7 R276 *1K_NC +/-5%
CFG4 Disabled; No Physical Display Port Enabled; An external Display port
(Display Port attached to Embedded Diplay Port device is connected to the Embedded
Presence strap) (Default Value) Display port
Q28
*2N7002W-7-F_NC PEG Train immediately following
CFG7 xxRESETB de assertion PEG Wait for BIOS for training
D S SA_DIMM_VREFDQ (PEG Defer Training) (Default Value)
[14,16] M_VREF_DQ_A
G
[2,10] DDR_HVREF_RST_PCH
A G A
D S SB_DIMM_VREFDQ
[15,16] M_VREF_DQ_B
*2N7002W-7-F_NC 11 x16 - Device 1 functions 1 and 2 disable (Default Value)

Q34 Ever Light
CFG[6:5] 10 x8, x8 - Device 1 function 1 enable; function 2 disable
(PCIe Port Technology Limited
Bifurcation Straps) 01 Reserved - (Device 1 function 1 disable; function 2 enable) Title
05 -- SNB (rPGA) 4/4(GND)
00 x8, x8, x4 - Device 1 function 1 and 2 enable Size Document Number Rev
1A
KRUG 15" UMA
5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
R321 *0_NC +/-5%

R320 *0_NC +/-5% CLK_XDP_ITP [5]
CLK_XDP_ITP# [5]
CLK_XDP R312 *0_NC +/-5%
CLK_CPU_ITP [10]
CLK_XDP# R311 *0_NC +/-5%
CLK_CPU_ITP# [10]
+1.05V_RUN 1206: Change to NC

CPU XDP
D JXDP2 D
1 2
C224 C222 3 GND0 GND1 4
[2] XDP_PREQ# OBSFN_A0 OBSFN_C0 CFG16 [5]
0.1uF 0.1uF [2] XDP_PRDY# 5 6
10V,X5R 10V,X5R 7 OBSFN_A1 OBSFN_C1 8 CFG17 [5]
XDP_OBS0 9 GND2 GND3 10
XDP_OBS1 11 OBSDATA_A0 OBSDATA_C0 12 CFG0 [5]
13 OBSDATA_A1 OBSDATA_C1 14 CFG1 [5]
XDP_OBS3 17 OBSDATA_A2 OBSDATA_C2 18 CFG2 [5] +1.05V_RUN
19 OBSDATA_A3 OBSDATA_C3 20 CFG3 [5]
21 GND6 GND7 22
[5] CFG10 OBSFN_B0 OBSFN_D0 CFG8 [5] +3.3V_RUN
[2] XDP_OBS[0..7] 23 24
[5] CFG11 OBSFN_B1 OBSFN_D1 CFG9 [5]
25 26
XDP_OBS5 29 OBSDATA_B0 OBSDATA_D0 30 CFG4 [5]
31 OBSDATA_B1 OBSDATA_D1 32 CFG5 [5]
+1.05V_RUN XDP_OBS7 35 OBSDATA_B2 OBSDATA_D2 36 CFG6 [5] R300 R301
1206: Change to NC OBSDATA_B3 OBSDATA_D3 CFG7 [5]
37 38 51 1K
R313 *1K_NC +/-5% H_CPUPWRGD_XDP 39 GND12 GND13 40 CLK_XDP +/-5%
[2,11] H_CPUPWRGD PWRGOOD/HOOK0 ITPCLK/HOOK4
1206: Change to NC +/-1%
[7] SIO_PWRBTN#_R R307 *0_NC +/-5% CFD_PWRBTN#_XDP 41 42 CLK_XDP#
43 HOOK1 ITPCLK#/HOOK5 44
R302 *1K_NC +/-5% XDP_HOOK2 45 VCC_OBS_AB VCC_OBS_CD 46 XDP_RST#_R R303 *1K_NC +/-5%
[5] CFG0 HOOK2 RESET#/HOOK6 PLTRST_XDP# [9]
[7,33] RESET_OUT# R286 *0_NC +/-5% RESET_OUT#_XDP 47 48 XDP_DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# [2,7]
49 50
R284 *0_NC +/-5% XDP_HDD_SMBDAT_R1 51 GND14 GND15 52 XDP_TDO
[10,14,15,28,32] MEM_XDP_HDD_SMBDAT SDA TDO XDP_TDO [2]
The resistor R285 *0_NC +/-5% XDP_HDD_SMBCLK_R1 53 54
[10,14,15,28,32] MEM_XDP_HDD_SMBCLK SCL TRSTN XDP_TRST# [2]
55 56 XDP_TDI
for HOOK2 should be 57 TCK1 TDI 58 XDP_TMS
XDP_TDI [2]
placed such that the [2] XDP_TCLK TCK0 TMS XDP_TMS [2]
59 60
stub is very small GND16 GND17
on CFG0 net +3.3V_ALW *Header_2X30_NC
C C
R287 *1K_NC +/-5% RESET_OUT#_XDP
PCH XDP
JXDP1
1 2
3 GND0 GND1 4 XDP_FN16
5 OBSFN_A0 OBSFN_C0 6 XDP_FN17
7 OBSFN_A1 OBSFN_C1 8
XDP_FN0 9 GND2 GND3 10 XDP_FN8
XDP_FN1 11 OBSDATA_A0 OBSDATA_C0 12 XDP_FN9
13 OBSDATA_A1 OBSDATA_C1 14
XDP_FN3 17 OBSDATA_A2 OBSDATA_C2 18 XDP_FN11
19 OBSDATA_A3 OBSDATA_C3 20
21 GND6 GND7 22
23 OBSFN_B0 OBSFN_D0 24
25 OBSFN_B1 OBSFN_D1 26
XDP_FN5 29 OBSDATA_B0 OBSDATA_D0 30 XDP_FN13
31 OBSDATA_B1 OBSDATA_D1 32
1206: Change to NC GND10 GND11
XDP_FN6 33 34 XDP_FN14
XDP_FN7 35 OBSDATA_B2 OBSDATA_D2 36 XDP_FN15
37 OBSDATA_B3 OBSDATA_D3 38
+3.3V_ALW_PCH R106 *1K_NC +/-5% 1.05V_0.8V_PWROK_R 39 GND12 GND13 40 +3.3V_ALW_PCH
[33,56] 1.05V_0.8V_PWROK PWRGOOD/HOOK0 ITPCLK/HOOK4
1206: Change to NC
R114 *0_NC +/-5% PCH_PWRBTN#_XDP 41 42
B [7] SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5 B
43 44
45 VCC_OBS_AB VCC_OBS_CD 46 RSMRST#_XDP R237 *1K_NC +/-5%
HOOK2 RESET#/HOOK6 PCH_RSMRST# [7,33]
C185 47 48 XDP_DBRESET#
HOOK3 DBR#/HOOK7 XDP_DBRESET# [2,7]
0.1uF 49 50
10V,X5R R113 *0_NC +/-5% XDP_HDD_SMBDAT_R2 51 GND14 GND15 52 PCH_JTAG_TDO
[10,14,15,28,32] MEM_XDP_HDD_SMBDAT SDA TDO PCH_JTAG_TDO [8]
R105 *0_NC +/-5% XDP_HDD_SMBCLK_R2 53 54
[10,14,15,28,32] MEM_XDP_HDD_SMBCLK SCL TRSTN
55 56 PCH_JTAG_TDI
TCK1 TDI PCH_JTAG_TDI [8]
PCH_JTAG_TCK 57 58 PCH_JTAG_TMS
[8] PCH_JTAG_TCK TCK0 TMS PCH_JTAG_TMS [8]
59 60
GND16 GND17
*Header_2X30_NC
[9] USB_OC0#_R R112 *33_NC +/-5% XDP_FN0

[9] USB_OC1#_R R111 *33_NC +/-5% XDP_FN1
[9] USB_OC2# R110 *33_NC +/-5% XDP_FN2
[9] USB_OC3# R109 *33_NC +/-5% XDP_FN3
[9] USB_OC4# R108 *33_NC +/-5% XDP_FN4
[9] USB_OC5# R107 *33_NC +/-5% XDP_FN5
[9] USB_OC6# R116 *33_NC +/-5% XDP_FN6
[9] SIO_EXT_SMI_R# R115 *33_NC +/-5% XDP_FN7
R235 *33_NC +/-5% XDP_FN8
[11,34] SLP_ME_CSW_DEV#
R234 *33_NC +/-5% XDP_FN9
[11,32] USB_MCARD1_DET#
R239 *33_NC +/-5% XDP_FN10
[8] HDD_DET#_R
R238 *33_NC +/-5% XDP_FN11
[8,9] BBS_BIT0
R233 *33_NC +/-5% XDP_FN12
[11] PCH_GPIO36
R232 *33_NC +/-5% XDP_FN13
[11] FDI_OVRVLTG
R231 *33_NC +/-5% XDP_FN14
[11] EN_ESATA_RPTR
R230 *33_NC +/-5% XDP_FN15
[11,34] TEMP_ALERT#
A R240 *33_NC +/-5% XDP_FN16 A
[11] PCH_GPIO15
R236 *33_NC +/-5% XDP_FN17
[11] SIO_EXT_SCI#_R
1206: Change to NC
Ever Light
Technology Limited
Title
06 -- XDP Connector
Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
ENVDD_PCH R53 100K +/-5%

COUGAR POINT (DMI,FDI,GPIO) PANEL_BKEN_PCH R34 *100K_NC +/-5%
U3C
BC24 BJ14 FDI_CTX_PRX_N0 1231: Added for HDMI hot plug issue
D [2] DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 [2] D
BE20 AY14 FDI_CTX_PRX_N1
[2]
[2]
[2]
DMI_CTX_PRX_N1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
BG18
BG20
DMI1RXN
DMI2RXN
DMI3RXN
FDI_RXN1
FDI_RXN2
FDI_RXN3
BE14
BH13
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
[2]
[2]
[2]
If the LVDS interface is not implemented,
all signals associated with the interface can
COUGAR POINT (LVDS,DDI) HDM_HPD C559 10nF 25V,X7R
BC12 FDI_CTX_PRX_N4 be left as No Connects
FDI_RXN4 FDI_CTX_PRX_N4 [2]
BE24 BJ12 FDI_CTX_PRX_N5 DOCK_DP1_HPD R20 110K +/-5%
[2] DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 [2]
BC20 BG10 FDI_CTX_PRX_N6
BJ18 BG9 FDI_CTX_PRX_N7 U3D DOCK_DP2_HPD R55 110K +/-5%
BJ20
[2] DMI_CTX_PRX_P3 DMI3RXP BG14 FDI_CTX_PRX_P0 PANEL_BKEN_PCH J47 AP43
FDI_RXP0 FDI_CTX_PRX_P0 [2] [27] PANEL_BKEN_PCH L_BKLTEN SDVO_TVCLKINN
AW24 BB14 FDI_CTX_PRX_P1 ENVDD_PCH M45 AP45
[2] DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 [2] [27,34] ENVDD_PCH L_VDD_EN SDVO_TVCLKINP
AW20 BF14 FDI_CTX_PRX_P2
[2] DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 [2]
BB18 BG13 FDI_CTX_PRX_P3 P45 AM42
[2] DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 [2] [27] BIA_PWM_PCH L_BKLTCTL SDVO_STALLN
AV18 BE12 FDI_CTX_PRX_P4 AM40
[2] DMI_CRX_PTX_N3
DMI
FDI
DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 [2] SDVO_STALLP
BG12 FDI_CTX_PRX_P5 T40
FDI_RXP5 FDI_CTX_PRX_P5 [2] [27] LDDC_CLK_PCH L_DDC_CLK
AY24 BJ10 FDI_CTX_PRX_P6 K47 AP39
[2] DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 [2] [27] LDDC_DATA_PCH L_DDC_DATA SDVO_INTN
AY20 BH9 FDI_CTX_PRX_P7 AP40
[2] DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 [2] SDVO_INTP
AY18 +3.3V_RUN R32 *2.2K_NC +/-5% T45
[2] DMI_CRX_PTX_P2 DMI2TXP L_CTRL_CLK
AU18 R47 *2.2K_NC +/-5% P39
[2] DMI_CRX_PTX_P3 DMI3TXP L_CTRL_DATA
AW16
FDI_INT FDI_INT [2]
R64 2.37K +/-1% LVD_IBG AF37 P38
+1.05V_RUN LVD_IBG SDVO_CTRLCLK HDMI_CLK_PCH [25]
BJ24 AV12 LVD_VBG AF36 M39
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 [2] T5 LVD_VBG SDVO_CTRLDATA HDMI_DAT_PCH [25]
Width = 4 mil, Spacing = 20 mil
Close PCH within 500 mil R639 49.9 +/-1% DMI_COMP_R BG25 BC10 AE48
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 [2] LVD_VREFH
AE47 AT49
R124 750 +/-1% RBIAS_CPY BH21 AV14 LVD_VREFL DDPB_AUXN AT47
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 [2] DDPB_AUXP AT40 HDM_HPD
DDPB_HPD HDM_HPD [25]
BB10 AK39
FDI_LSYNC1 [2] [27] LCD_ACLK-_PCH
LVDS
FDI_LSYNC1 AK40 LVDSA_CLK# AV42
[27] LCD_ACLK+_PCH LVDSA_CLK DDPB_0N HDMI_TX2-_PCH [25]
AV40
DDPB_0P HDMI_TX2+_PCH [25]
AN48 AV45
[27] LCD_A0-_PCH LVDSA_DATA#0 DDPB_1N HDMI_TX1-_PCH [25]
A18 DSWODVREN AM47 AV46
Digital Display Interface

Deep Sleep not implemented
DSWVRMEN [27] LCD_A1-_PCH LVDSA_DATA#1 DDPB_1P HDMI_TX1+_PCH [25]
DPWROK connect to RSMRST# AK47 AU48
System Power Management

[27] LCD_A2-_PCH LVDSA_DATA#2 DDPB_2N HDMI_TX0-_PCH [25]
From EC AJ48 AU47
LVDSA_DATA#3 DDPB_2P HDMI_TX0+_PCH [25]
R652 *0_NC +/-5% SUSACK#_R C12 E22 PCH_DPWROK AV47
[34] SUSACK# SUSACK# DPWROK PCH_DPWROK [34] DDPB_3N HDMI_CLK-_PCH [25]
Deep Sleep not implemented AN47 AV49
[27] LCD_A0+_PCH LVDSA_DATA0 DDPB_3P HDMI_CLK+_PCH [25]
SYS_PWROK SUSACK# unconnected R641 *0_NC_SHORT +/-5% PCH_RSMRST#_R AM49
[27] LCD_A1+_PCH LVDSA_DATA1
This signal should be used on the platform to indicate K3 B9 AK49
[2,6] XDP_DBRESET# SYS_RESET# WAKE# [27] LCD_A2+_PCH LVDSA_DATA2
C that the processor VR power is good and therefore PCH_PCIE_WAKE# AJ47 P46 DOCK_DP1_PCH_CTRLCLK DOCK_DP1_PCH_CTRLCLK [48] C
PCH_PCIE_WAKE# [34] LVDSA_DATA3 DDPC_CTRLCLK
it can be connected to the same source as PWROK on PCH. P42 DOCK_DP1_PCH_CTRLDATA DOCK_DP1_PCH_CTRLDATA [48]
R213 *0_NC +/-5% SYS_PWROK_R P12 N3 CLKRUN# DDPC_CTRLDATA
[34] SYS_PWROK SYS_PWROK CLKRUN# / GPIO32 CLKRUN# [33,34,37,46]
AF40
[27] LCD_BCLK-_PCH LVDSB_CLK#
R197 *0_NC_SHORT +/-5% AF39 AP47 DOCK_DP1_PCH_AUX- [48]
[27] LCD_BCLK+_PCH LVDSB_CLK DDPC_AUXN
R214 *0_NC_SHORT +/-5% PCH_PWROK L22 G8 SUS_STAT#/LPCPD# T50 AP49 DOCK_DP1_PCH_AUX+ [48]
[6,33] RESET_OUT# PWROK SUS_STAT# / GPIO61 DDPC_AUXP
R198 *0_NC_SHORT +/-5% AH45 AT38 DOCK_DP1_HPD
[27] LCD_B0-_PCH LVDSB_DATA#0 DDPC_HPD DOCK_DP1_HPD [48]
AH47
[27] LCD_B1-_PCH LVDSB_DATA#1
R205 *0_NC +/-5% PM_APWROK_R L10 N14 SUSCLK T36 AF49 AY47
[33] PM_APWROK APWROK SUSCLK / GPIO62 [27] LCD_B2-_PCH LVDSB_DATA#2 DDPC_0N DOCK_DP1_TX0- [48]
AF45 AY49
LVDSB_DATA#3 DDPC_0P DOCK_DP1_TX0+ [48]
T44 AY43
DDPC_1N DOCK_DP1_TX1- [48]
R646 *0_NC_SHORT +/-5% PM_DRAM_PWRGD_R B13 D10 SIO_SLP_S5# AH43 AY45
[2] PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# [33] [27] LCD_B0+_PCH LVDSB_DATA0 DDPC_1P DOCK_DP1_TX1+ [48]
AH49 BA47
[27] LCD_B1+_PCH LVDSB_DATA1 DDPC_2N DOCK_DP1_TX2- [48]
Follow DG 0.9
T47 AF47 BA48
[27] LCD_B2+_PCH LVDSB_DATA2 DDPC_2P DOCK_DP1_TX2+ [48]
R642 *0_NC_SHORT +/-5% PCH_RSMRST#_R C21 H4 SIO_SLP_S4# AF43 BB47
[6,33] PCH_RSMRST# RSMRST# SLP_S4# SIO_SLP_S4# [34] LVDSB_DATA3 DDPC_3N DOCK_DP1_TX3- [48]
BB49
DDPC_3P DOCK_DP1_TX3+ [48]
T56
R650 *0_NC_SHORT +/-5% ME_SUS_PWR_ACK_R K16 F4 SIO_SLP_S3#
[33] ME_SUS_PWR_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SIO_SLP_S3# [34]
[26] PCH_CRT_BLU PCH_CRT_BLU N48 M43 DOCK_DP2_PCH_CTRLCLK DOCK_DP2_PCH_CTRLCLK [48]
[6] SIO_PWRBTN#_R CRT_BLUE DDPD_CTRLCLK
T39 [26] PCH_CRT_GRN PCH_CRT_GRN P49 M36 DOCK_DP2_PCH_CTRLDATA DOCK_DP2_PCH_CTRLDATA [48]
R160 *0_NC_SHORT +/-5% SIO_PWRBTN#_R E20 G10 SIO_SLP_A# PCH_CRT_RED T49 CRT_GREEN DDPD_CTRLDATA
[33] SIO_PWRBTN# PWRBTN# SLP_A# SIO_SLP_A# [34] [26] PCH_CRT_RED CRT_RED
T35 AT45 DOCK_DP2_PCH_AUX- [48]
CRT
H20 G16 SIO_SLP_SUS# PCH_CRT_DDC_CLK T39 DDPD_AUXN AT43
[33] AC_PRESENT ACPRESENT / GPIO31 SLP_SUS# SIO_SLP_SUS# [34] [26] PCH_CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP DOCK_DP2_PCH_AUX+ [48]
PCH_CRT_DDC_DAT M40 BH41 DOCK_DP2_HPD
[26] PCH_CRT_DDC_DAT CRT_DDC_DATA DDPD_HPD DOCK_DP2_HPD [48]
T54
+3.3V_ALW_PCH R181 8.2K +/-5% PCH_BATLOW# E10 AP14 BB43
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC [2] DDPD_0N DOCK_DP2_TX0- [48]
[26] PCH_CRT_HSYNC R615 20+/-1% HSYNC M47 BB45
CRT_HSYNC DDPD_0P DOCK_DP2_TX0+ [48]
[26] PCH_CRT_VSYNC R614 20+/-1% VSYNC M49 BF44
CRT_VSYNC DDPD_1N DOCK_DP2_TX1- [48]
PCH_RI# A10 K14 SIO_SLP_LAN# BE44
RI# SLP_LAN# / GPIO29 SIO_SLP_LAN# [34,40] DDPD_1P DOCK_DP2_TX1+ [48]
BF42
DDPD_2N DOCK_DP2_TX2- [48]
R66 1K +/-0.5% CRT_IREF T43 BE42
DAC_IREF DDPD_2P DOCK_DP2_TX2+ [48]
BD82HM65[VER.B3,SLJ4P] T42 BJ42
CRT_IRTN DDPD_3N DOCK_DP2_TX3- [48]
ME_SUS_PWR_ACK_R R651 *0_NC_SHORT +/-5% SUSACK#_R BG42
DDPD_3P DOCK_DP2_TX3+ [48]
SUSACK# and SUSWARN# can be tied together BD82HM65[VER.B3,SLJ4P]
if EC does not want to involve in the APWROK
handshake mechanism for the Deep Sleep state entry and exit. This is a input signal to the PCH from power monitoring circuit to indicate that all Active
B B
Sleep Well (ASW) rails, i.e. Intel ME sub-system and LAN power rails are stable on the
+3.3V_RUN
platform. Connect to ASW power rail monitoring circuit on motherboard. For platform
not supporting Intel AMT it can be connected to PWROK. The ASW power must be
stable for at least 1ms before platform logic asserts APWROK.
CRT_HSYNC and CRT_VSYNC resistor PCH_CRT_DDC_DAT R33 2.2K +/-5%
DPWROK 33 ohm for Direct Connect PCH_CRT_DDC_CLK R28 2.2K +/-5%
This is an input signal to the PCH from platform power monitoring logic to indicate that DOCK_DP1_PCH_CTRLDATA R31 2.2K +/-5%
20 ohm for Dock Support DOCK_DP1_PCH_CTRLCLK
all power rails associated with the PCH Deep Sx well (DSW) are valid and stable. R44 2.2K +/-5%
+3.3V_RUN 20 ohm for Switchable Graphics Device Down Topology DOCK_DP2_PCH_CTRLDATA R18 2.2K +/-5%
Connect to VccDSW3_3 power rail monitoring circuit on mother board for platforms
that support Deep Sx state. This signal can be tied to RSMRST# for platforms that do
10 ohm for Switchable Graphics Dock Support DOCK_DP2_PCH_CTRLCLK R17 2.2K +/-5%
R199 8.2K +/-1% CLKRUN#
not support the Deep Sx state. The DSW rails must be stable for at least 10ms before
DPWROK is asserted to PCH.
PCH_CRT_BLU R613 150 +/ -1%

PCH_CRT_GRN R612 150 +/ -1%
+3.3V_ALW_PCH PCH_CRT_RED R611 150 +/ -1%
R180 *10K_NC +/-5% SUS_STAT#/LPCPD#

Put close PCH 500 mil
R155 *10K_NC +/-5% SIO_SLP_LAN#
R147 10K +/-5% PCH_RI#
R162 10K +/-5% PCH_PCIE_WAKE#

+RTC_CELL
R211 10K +/-5% ME_SUS_PWR_ACK
DSWODVREN R644 330K +/-5%
R643 *330K_NC +/-5%
DSWODVREN - On Die DSW VR Enable

R645 10K +/-5% PCH_RSMRST#
A A
Enabled (DEFAULT)
HIGH: R142 STUFFED,
R145 UNSTUFFED
Disabled
LOW: R142 STUFFED,
R145 UNSTUFFED Ever Light
Technology Limited
Title
07 -- CBT 1/6 (DMI&VIDEO)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW_PCH
D D
USB_MCARD3_DET# R90 100K +/-5%
+RTC_CELL +3.3V_ALW_PCH
+3.3V_ALW_PCH
+RTC_CELL +3.3V_RUN
C146 18pF 50V,NPO R129 *0_NC_SHORT +/-5%
R636
*1K_NC
R648 R87 R640 20K +/-5% HDD_DET#_R R170 10K +/-5%
+/-5%
PCH_AZ_SDOUT 330K 1K Cougar Point (HDA,JTAG,SATA) BBS_BIT0 R245 4.7K +/-5%
1
+/-5% +/-5% C446 RTC_DET# R72 10K +/-5%
1uF Y2 SATA_ACT# R243 10K +/-5%
1
PCH_INTVRMEN PCH_AZ_SYNC 6.3V,X5R +/-20ppm R122 ODD_DET# R423 10K +/-5%
32.768KHz 10M
4
+/-5%
U3A
4
R647 R77
*330K_NC *100K_NC R95 20K +/-5%
+/-5% +/-5% PCH_RTCX1 A20 C38
RTCX1 FWH0 / LAD0 LPC_LAD0 [30,33,34,46]
C131 A38
LPC
FWH1 / LAD1 LPC_LAD1 [30,33,34,46]
1uF C140 18pF50V,NPO PCH_RTCX2 C20 B37
RTCX2 FWH2 / LAD2 LPC_LAD2 [30,33,34,46]
6.3V,X5R C37
FWH3 / LAD3 LPC_LAD3 [30,33,34,46]
PCH_RTCRST# D20
RTCRST# D36
FWH4 / LFRAME# LPC_LFRAME# [30,33,34,46]
INTVRMEN : SRTCRST# G22
SRTCRST# E36
Integrated 1.05 V VRM Enable / Disable. LDRQ0# LPC_LDRQ0# [34]
RTC
R637 1M +/-5% INTRUDER# K22 K36
Integrated 1.05 V VRMs is enabled when high INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# [34]
NOTE: This signal should always be pulled high PCH_INTVRMEN C17 V5 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ [33,34,37,46]
PLL ODVR VOLTAGE (HDA_SYNC have Internal PD 20k) AM3

SATA0RXN PSATA_PRX_DTX_N0_C [28]
PCH_AZ_BITCLK N34 AM1
HDA_BCLK SATA0RXP PSATA_PRX_DTX_P0_C [28]
SATA 6G
AP7 HDD
SATA0TXN PSATA_PTX_DRX_N0_C [28]
LOW - SET VCCVRM TO 1.8 V (DEFAULT) PCH_AZ_SYNC L34 AP5
HDA_SYNC SATA0TXP PSATA_PTX_DRX_P0_C [28]
HDA_SYNC SPKR T10 AM10
[24] SPKR SPKR SATA1RXN SATA_ODD_PRX_DTX_N1_C [28]
C AM8 C
SATA1RXP SATA_ODD_PRX_DTX_P1_C [28]
HIGH - SET VCCVRM TO 1.5 V PCH_AZ_RST# K34 AP11 ODD
HDA_RST# SATA1TXN SATA_ODD_PTX_DRX_N1_C [28]
AP10
SATA1TXP SATA_ODD_PTX_DRX_P1_C [28]
E34 AD7
[24] PCH_AZ_CODEC_SDIN0 HDA_SDIN0 SATA2RXN AD5
G34 SATA2RXP AH5
[37] PCH_AZ_MDC_SDIN1 HDA_SDIN1 SATA2TXN
R633 33+/-5% PCH_AZ_SDOUT AH4
[24] PCH_AZ_CODEC_SDOUT SATA2TXP
C34
HDA_SDIN2
IHDA
R79 33+/-5% PCH_AZ_SYNC_G AB8
[24] PCH_AZ_CODEC_SYNC SATA3RXN
A34 AB10
R78 33+/-5% PCH_AZ_RST# HDA_SDIN3 SATA3RXP AF3
[24] PCH_AZ_CODEC_RST# SATA3TXN AF1
R70 33+/-5% PCH_AZ_BITCLK PCH_AZ_SDOUT A36 SATA3TXP
[24] PCH_AZ_CODEC_BITCLK HDA_SDO
SATA
Y7
SATA4RXN ESATA_PRX_DTX_N4_C [29]
Y5
SATA4RXP ESATA_PRX_DTX_P4_C [29]
RTC_DET# C36 AD3 E-SATA
[49] RTC_DET# HDA_DOCK_EN# / GPIO33 SATA4TXN ESATA_PTX_DRX_N4_C [29]
AD1
SATA4TXP ESATA_PTX_DRX_P4_C [29]
C89 USB_MCARD3_DET# N32
[30] USB_MCARD3_DET# HDA_DOCK_RST# / GPIO13
*27pF_NC Y3
SATA5RXN SATA_PRX_DKTX_N5_C [48]
50V,NPO Y1
SATA5RXP SATA_PRX_DKTX_P5_C [48]
AB3 Docking
SATA5TXN SATA_PTX_DKRX_N5_C [48]
PCH_JTAG_TCK J3 AB1
[6] PCH_JTAG_TCK JTAG_TCK SATA5TXP SATA_PTX_DKRX_P5_C [48]
T51 +1.05V_RUN
PCH_JTAG_TMS H7 Y11
[6] PCH_JTAG_TMS
JTAG
JTAG_TMS SATAICOMPO
T58
PCH_JTAG_TDI K5 Y10 SATA_COMP R146 37.4 +/-1%
[6] PCH_JTAG_TDI JTAG_TDI SATAICOMPI
T49
PCH_JTAG_TDO H1 Width = 10 mil, Spacing = 20 mil
[6] PCH_JTAG_TDO JTAG_TDO +1.05V_RUN
T48 AB12 Close PCH within 500 mil
SATA3RCOMPO
+3.3V_RUN AB13 SATA3_COMP R123 49.9 +/-1%
SATA3COMPI
R656 *0_NC_SHORT +/-5% PCH_SPI_CLK_R T3 AH1 RBIAS_SATA3 R173 750 +/-1%

[45] PCH_SPI_CLK SPI_CLK SATA3RBIAS
R89 R208 *0_NC_SHORT +/-5% PCH_SPI_CS0#_R Y14
Q7 [45] PCH_SPI_CS0# SPI_CS0#
10K
B
+/-5% FDV301N Direct Connection to SPI ROM R655 *0_NC_SHORT +/-5% PCH_SPI_CS1#_R T1 B
[45] PCH_SPI_CS1#
SPI
SPI_CS1#
Due to DELL E3 information SATALED#
P3 SATA_ACT#
SATA_ACT# [36]
PCH_AZ_SYNC_G S D PCH_AZ_SYNC
R209 *0_NC_SHORT +/-5% PCH_SPI_SI_R V4 V14 HDD_DET#_R R171 *0_NC_SHORT +/-5%
[45] PCH_SPI_DO SPI_MOSI SATA0GP / GPIO21 HDD_DET# [28]
+5V_RUN R654 *0_NC_SHORT +/-5% PCH_SPI_SO_R U3 P1
G [45] PCH_SPI_DIN SPI_MISO SATA1GP / GPIO19 HDD_DET#_R [6]
R768
1M R171
+/-5% BD82HM65[VER.B3,SLJ4P] Maximum distance between resistor and PCH is 25.4mm.
No series resistor required
if routing length is 1.5-6.5 if using 1 SPI device
PCH_PLTRST# [2,9,11,30,31,32,33,34,46]
G
1214:Refer to Intel guide rev 1.5

D S ODD_DET#
ODD_DET# [28]
Q15
BBS_BIT0 [6,9]
2N7002W-7-F
R358 1K +/-5% PCH_AZ_SDOUT

[34] ME_FWP +3.3V_RUN
+3.3V_ALW_PCH
R251 R256
R634 33+/-5% PCH_AZ_SDOUT 10K *10K_NC
[37] PCH_AZ_MDC_SDOUT
R195 200 +/-5% PCH_JTAG_TMS +/-5% +/-5%
R73 33+/-5% PCH_AZ_SYNC_G
[37] PCH_AZ_MDC_SYNC
R183 200 +/-5% PCH_JTAG_TDI No Reboot strap. IRQ_SERIRQ
A R88 33+/-5% PCH_AZ_RST# A
[37] PCH_AZ_MDC_RST#
R175 200 +/-5% PCH_JTAG_TDO Low = Default.
R69 33+/-5% PCH_AZ_BITCLK SPKR SPKR
[37] PCH_AZ_MDC_BITCLK High = No Reboot.
C78 R178 51 +/-5% PCH_JTAG_TCK

*27pF_NC Note1, Sampled at rising edge of PWROK
50V,NPO R185 100 +/-5% PCH_JTAG_TMS The signal has a weak internal pull-down.
(the internal pull-down is disabled after PLTRST# deasserts.)
Ever Light
R184 100 +/-5% PCH_JTAG_TDI
Technology Limited
If the signal is sampled high, this indicate that
the system is strapped to the "No Reboot" mode
R189 100 +/-5% PCH_JTAG_TDO
Title
08 -- CBT 2/6 (SATA, HDA, SPI)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
Cougar Point (PCI,USB,NVRAM)

R244 *1K_NC +/-5%
BBS_BIT0 [6,8]
R54 *1K_NC +/-5% BBS_BIT1 U3E
AY7
RSVD1 AV7
T23 BG26 RSVD2 AU3
D
T27 BJ26 TP1 RSVD3 BG4 D
T25 BH25 TP2 RSVD4
T130 BJ16 TP3 AT10
T129 BG16 TP4 RSVD5 BC8
Boot BIOS Strap T6 AH38 TP5 RSVD6
T7 AH37 TP6 AU2
BBS_BIT[1] BBS_BIT[0] Boot BIOS Location TP7 RSVD7
T4 AK43 AT4
AK45 TP8 RSVD8 AT3
0 0 LPC T1
T128 C18 TP9 RSVD9 AT1
N30 TP10 RSVD10 AY3
0 1 Reserved (NAND) T20
H3 TP11 RSVD11 AT5
T55
AH12 TP12 RSVD12 AV3
1 0 PCI T45
AM4 TP13 RSVD13 AV1
T53
AM5 TP14 RSVD14 BB1
1 1 SPI T52
Y13 TP15 RSVD15 BA3
T38
T29 K24 TP16 RSVD16 BB5
T24 L24 TP17 RSVD17 BB3
T3 AB46 TP18 RSVD18 BB7
T2 AB45 TP19 RSVD19 BE8
RSVD
TP20 RSVD20 BD4
RSVD21 BF6
RSVD22
T127 B21 AV5
T33 M20 TP21 RSVD23 AV10
T43 AY16 TP22 RSVD24
T112 BG46 TP23 AT8
TP24 RSVD25
AY5
RSVD26 BA2
T12 BE28 RSVD27
T14 BC30 TP25 AT12
T10 BE32 TP26 RSVD28 BF3
T125 BJ32 TP27 RSVD29
T22 BC28 TP28
T11 BE30 TP29
T9 BF32 TP30
T126 BG32 TP31 C24
TP32 USBP0N USBP0- [37]
C T31 AV26 A24 Right Side pair top C
TP33 USBP0P USBP0+ [37]
T18 BB26 C25
T15 AU28 B25 Right Side pair bottom(Debug)
T19 AY30 C26
T30 AU26 A26 Left Side Top
T28 AY26 K28
T21 AV28 H28 Left Side Bottom
T13 AW30 E28
D28 WLAN
USBP4P USBP4+ [31]
C28
USBP5N USBP5- [31]
A28 Blue Tooth
USBP5P USBP5+ [31]
C29
USBP6N B29
PCI_PIRQA# K40 USBP6P N28
PCI_PIRQB# K38 PIRQA# USBP7N M28
PCI
PCI_PIRQC# H38 PIRQB# USBP7P L30
PIRQC# USBP8N USBP8- [48]
PCI_PIRQD# G38 K30 DOCK
PIRQD# USBP8P USBP8+ [48]
G30
USBP9N USBP9- [48]
PCI_REQ1# C46 E30 DOCK
USB
REQ1# / GPIO50 USBP9P USBP9+ [48]
PCIE_MCARD2_DET# C44 C30
[31] PCIE_MCARD2_DET# REQ2# / GPIO52 USBP10N USBP10- [38]
REQ# functionality is not available on Mobile BT_DET# E40 A30 BIO
[31] BT_DET# REQ3# / GPIO54 USBP10P USBP10+ [38]
L32
USBP11N USBP11- [27]
BBS_BIT1 D47 K32 Camera
GNT1# / GPIO51 USBP11P USBP11+ [27]
E42 G32
GNT2# / GPIO53 USBP12N USBP12- [37]
GNT# functionality is not available on Mobile PCI_GNT3# F46 E32 BTO Express Card or Smart Card
GNT3# / GPIO55 USBP12P USBP12+ [37]
C32
USBP13N USBP13- [32]
A32 WWAN
USBP13P USBP13+ [32]
LVDS_CBL_DET# G42
[27] LVDS_CBL_DET# PIRQE# / GPIO2
T164 PCH_GPIO3 G40
CAM_MIC_CBL_DET# C42 PIRQF# / GPIO3 C33 USBRBIAS R635 22.6 +/-1%
[27] CAM_MIC_CBL_DET# PIRQG# / GPIO4 USBRBIAS#
R57 *0_NC_SHORT +/-5% FFS_PCH_INT D44
[28] HDD_FALL_INT PIRQH# / GPIO5 +3.3V_ALW_PCH
Net USB_BIAS route impedacnes should be 50-ohm
PIRQ[H:E]# functionality is not available on Mobile B33 and length less than 500-mil spacing is 15-mil.
T59 K10 USBRBIAS
PME# RN2
PCH_PLTRST# C6 A14 USB_OC0#_R R137 *0_NC_SHORT +/-5% USB_OC0# USB_OC0#
[2,8,11,30,31,32,33,34,46] PCH_PLTRST# PLTRST# OC0# / GPIO59 USB_OC0# [29,37] 1 2
K20 USB_OC1#_R R132 *0_NC_SHORT +/-5% USB_OC1# USB_OC1#
OC1# / GPIO40 USB_OC1# [29] 3 4
R46 22+/-5% B17 USB_OC2# USB_OC3#
B [30] CLK_DEBUG OC2# / GPIO41 USB_OC2# [6] 5 6 B
CLK_PCI0 R43 22+/-5% CLK_PCI0 H49 C16 USB_OC3# USB_OC4#
[34] CLK_PCI_5048 CLKOUT_PCI0 OC3# / GPIO42 USB_OC3# [6] 7 8
CLK_PCI3 R623 22+/-5% CLK_PCI1 H43 L16 USB_OC4#
[33] CLK_PCI_MEC CLKOUT_PCI1 OC4# / GPIO43 USB_OC4# [6]
CLK_PCI4 R607 22+/-5% CLK_PCI2 J48 A16 USB_OC5# 10K
[48] CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC5# [6]
R624 22+/-5% CLK_PCI3 K42 D14 USB_OC6# +/-5%
[37] CLK_PCI_OZ CLKOUT_PCI3 OC6# / GPIO10 USB_OC6# [6]
C532 C533 C534 R45 22+/-5% CLK_PCI4 H40 C14 R224 *0_NC_SHORT +/-5% SIO_EXT_SMI# RN1
[10] CLK_PCI_LOOPBACK CLKOUT_PCI4 OC7# / GPIO14 SIO_EXT_SMI# [33]
10pF 10pF 10pF USB_OC5#
50V,NPO 50V,NPO 50V,NPO USB_OC6# 1 2
BD82HM65[VER.B3,SLJ4P] SIO_EXT_SMI# 3 4
USB_OC0#_R [6] 5 6
USB_OC2#
USB_OC1#_R [6] 7 8
10K
+/-5%
0823: EMI suggestion.Close to PCH. +3.3V_RUN
Add Buffers as needed for
C186 47nF
Loading and fanout concerns. SIO_EXT_SMI_R# [6]
16V,X7R
5
R265 *0_NC_SHORT +/-5% U16

[44] PLTRST_OZ600#
R266 *0_NC_SHORT +/-5% 2
[6] PLTRST_XDP#
R264 *0_NC_SHORT +/-5% PCH_PLTRST#_1 4
[40] PLTRST_LAN#
R263 *0_NC_SHORT +/-5% 1 PCH_PLTRST# R132,R137,R224
[37] PLTRST#_EXP
+3.3V_RUN 74AHC1G08GW
3
Maximum distance between resistor and PCH is 25.4mm.

R625 10K +/-5% LVDS_CBL_DET#
R622 10K +/-5% PCI_REQ1#
R626 10K +/-5% CAM_MIC_CBL_DET#
R50 10K +/-5% BT_DET#
R755 10K +/-5% PCH_GPIO3
1018: Add PU res R755 for PCH_GPIO3
R62 8.2K +/-5% PCI_PIRQA#
R631 8.2K +/-5% PCI_PIRQB#
R627 8.2K +/-5% PCI_PIRQC#
R63 8.2K +/-5% PCI_PIRQD#
A A
R49 *1K_NC +/-1% PCI_GNT3#
R527 100K+/-5% PCIE_MCARD2_DET#
A16 swap override Strap/Top-Block

Swap Override jumper Ever Light
Low = A16 swap
override/Top-Block
Technology Limited
GNT3# Title
Swap Override enabled
09 -- CBT 3/6 (USB, PCI, NVRAM)
High = Default
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
Cougar Point (PCI-E,SMBUS,CLK)

U3B
Place TX DC blocking caps close PCH.
BG34
[32] PCIE_PRX_WANTX_N1 PERN1
BJ34 E12 PCH_SMB_ALERT#
[32] PCIE_PRX_WANTX_P1 PERP1 SMBALERT# / GPIO11
2nd Mini Card WWAN C102 0.1uF 16V,X7R PCIE_PTX_WANRX_N1 AV32
[32] PCIE_PTX_WANRX_N1_C PETN1
C110 0.1uF 16V,X7R PCIE_PTX_WANRX_P1 AU32 H14 PCH_SMBCLK
[32] PCIE_PTX_WANRX_P1_C PETP1 SMBCLK
BE34 C9 PCH_SMBDAT
[31] PCIE_PRX_WLANTX_N2 PERN2 SMBDATA
BF34
[31] PCIE_PRX_WLANTX_P2 PERP2
1st Mini Card WLAN C99 0.1uF 16V,X7R PCIE_PTX_WLANRX_N2 BB32
[31] PCIE_PTX_WLANRX_N2_C PETN2
C94 0.1uF 16V,X7R PCIE_PTX_WLANRX_P2 AY32
[31] PCIE_PTX_WLANRX_P2_C
SMBUS
PETP2 A12 DDR_HVREF_RST_PCH
D SML0ALERT# / GPIO60 DDR_HVREF_RST_PCH [2,5] D
BG36
[37] PCIE_PRX_EXPTX_N3 PERN3
BJ36 C8 SML0_SMBCLK
[37] PCIE_PRX_EXPTX_P3 PERP3 SML0CLK +3.3V_ALW_PCH
Option(Express Card/PCMCIA) C95 0.1uF 16V,X7R PCIE_PTX_EXPRX_N3 AV34
[37] PCIE_PTX_EXPRX_N3_C PETN3
C87 0.1uF 16V,X7R PCIE_PTX_EXPRX_P3 AU34 G12 SML0_SMBDATA
[37] PCIE_PTX_EXPRX_P3_C PETP3 SML0DATA
BF36
BE36 PERN4 PCH_SMB_ALERT# R212 10K +/-5%
AY34 PERP4 C13 GPIO74 PCH_SMBCLK R156 2.2K +/-5%
PETN4 SML1ALERT# / PCHHOT# / GPIO74 T42
BB34 PCH_SMBDAT R151 2.2K +/-5%
PETP4 E14 SML1_SMBCLK GPIO74 R138 10K +/-5%
PCI-E*
SML1CLK / GPIO58 SML1_SMBCLK [33]
BG37 DDR_HVREF_RST_PCH R139 1K +/-5%
[30] PCIE_PRX_CARDTX_N5 PERN5
BH37 M16 SML1_SMBDAT SML1_SMBCLK R140 2.2K +/-5%
[30] PCIE_PRX_CARDTX_P5 PERP5 SML1DATA / GPIO75 SML1_SMBDAT [33]
3rd Mini-Card C79 0.1uF 16V,X7R PCIE_PTX_CARDRX_N5 AY36 SML1_SMBDAT R141 2.2K +/-5%
[30] PCIE_PTX_CARDRX_N5_C PETN5
C84 0.1uF 16V,X7R PCIE_PTX_CARDRX_P5 BB36
[30] PCIE_PTX_CARDRX_P5_C PETP5 PEG_B_CLKRQ# R248 10K +/-5%
BJ38 PEG_A_CLKRQ# R228 10K +/-5%
[44] PCIE_PRX_CARDTX_N6 PERN6
BG38
[44] PCIE_PRX_CARDTX_P6
Controller
C72 0.1uF 16V,X7R PCIE_PTX_CARDRX_N6 AU36 PERP6 M7 PCIECLKRQ6# R154 10K +/-5%
Card Reader [44] PCIE_PTX_CARDRX_N6_C PETN6 CL_CLK1
C77 0.1uF 16V,X7R PCIE_PTX_CARDRX_P6 AV36
[44] PCIE_PTX_CARDRX_P6_C PETP6 SML0_SMBCLK R169 2.2K +/-5%
Link
BG40 T11 SML0_SMBDATA R229 2.2K +/-5%
[40] PCIE_PRX_GLANTX_N7 PERN7 CL_DATA1
BJ40
[40] PCIE_PRX_GLANTX_P7 PERP7
LAN C64 0.1uF 16V,X7R PCIE_PTX_GLANRX_N7 AY40 PCIECLKRQ7# R167 10K +/-5%
[40] PCIE_PTX_GLANRX_N7_C PETN7
C63 0.1uF 16V,X7R PCIE_PTX_GLANRX_P7 BB40 P10
[40] PCIE_PTX_GLANRX_P7_C PETP7 CL_RST1#
BE38
BC38 PERN8
AW38 PERP8
AY38 PETN8
PETP8
M10 PEG_A_CLKRQ#
R41 *0_NC_SHORT +/-5% CLK_PCIE_MINI1#_C Y40 PEG_A_CLKRQ# / GPIO47
[32] CLK_PCIE_MINI1# CLKOUT_PCIE0N
[32] CLK_PCIE_MINI1 R42 *0_NC_SHORT +/-5% CLK_PCIE_MINI1_C Y39
R179 10K +/-5% CLKOUT_PCIE0P AB37
1st Mini Card WWAN +3.3V_ALW_PCH CLKOUT_PEG_A_N
CLOCKS
J2 AB38
[32] MINI1CLK_REQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
CLK_BUF_EXP# R135 10K +/-5%
C R618 *0_NC_SHORT +/-5% CLK_PCIE_LAN#_C AB49 AV22 CLK_BUF_EXP R136 10K +/-5% C
[40] CLK_PCIE_LAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# [2]
R617 *0_NC_SHORT +/-5% CLK_PCIE_LAN_C AB47 AU22
[40] CLK_PCIE_LAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI [2]
LAN +3.3V_RUN R201 10K +/-5%
M1 CLK_BUF_BCLK R638 10K +/-5%
[40] LANCLK_REQ# PCIECLKRQ1# / GPIO18 AM12
CLKOUT_DP_N AM13 CLK_BUF_DOT96# R92 10K +/-5%
R610 *0_NC_SHORT +/-5% CLK_PCIE_CARD#_C AA48 CLKOUT_DP_P CLK_BUF_DOT96 R94 10K +/-5%
[44] CLK_PCIE_CARD# CLKOUT_PCIE2N
R609 *0_NC_SHORT +/-5% CLK_PCIE_CARD_C AA47
[44] CLK_PCIE_CARD CLKOUT_PCIE2P
Card Reader +3.3V_RUN R250 10K +/-5% BF18 CLK_BUF_EXP# CLK_BUF_CKSSCD# R241 10K +/-5%
V10 CLKIN_DMI_N BE18 CLK_BUF_EXP CLK_BUF_CKSSCD R242 10K +/-5%
[44] MMICLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
CLK_PCH_14M R59 10K +/-5%
R40 *0_NC_SHORT +/-5% CLK_PCIE_MINI3#_C Y37 BJ30
[30] CLK_PCIE_MINI3# CLKOUT_PCIE3N CLKIN_GND1_N
R39 *0_NC_SHORT +/-5% CLK_PCIE_MINI3_C Y36 BG30 CLK_BUF_BCLK
[30] CLK_PCIE_MINI3 CLKOUT_PCIE3P CLKIN_GND1_P
3rd Mini-Card +3.3V_ALW_PCH R149 10K +/-5%
A8
[30] MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 G24 CLK_BUF_DOT96#
CLKIN_DOT_96N E24 CLK_BUF_DOT96
R35 *0_NC_SHORT +/-5% CLK_PCIE_EXP#_C Y43 CLKIN_DOT_96P
[37] CLK_PCIE_EXP# CLKOUT_PCIE4N
Option(Express Card/PCMCIA) R36 *0_NC_SHORT +/-5% CLK_PCIE_EXP_C Y45
[37] CLK_PCIE_EXP CLKOUT_PCIE4P
+3.3V_ALW_PCH R165 10K +/-5% AK7 CLK_BUF_CKSSCD#
L12 CLKIN_SATA_N AK5 CLK_BUF_CKSSCD
[37] EXPCLK_REQ# PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
R37 *0_NC_SHORT +/-5% CLK_PCIE_MINI2#_C V45 K45 CLK_PCH_14M

[31] CLK_PCIE_MINI2# CLKOUT_PCIE5N REFCLK14IN
2nd Mini Card WLAN R38 *0_NC_SHORT +/-5% CLK_PCIE_MINI2_C V46
[31] CLK_PCIE_MINI2 CLKOUT_PCIE5P
+3.3V_ALW_PCH R247 10K +/-5%
C442
L14 H45
[31] MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK [9]
XTAL25_IN R756 *0_NC_SHORT +/-5% XTA25L_IN_R
AB42 V47 XTAL25_IN

CLKOUT_PEG_B_N XTAL25_IN 30pF
2
AB40 V49 XTAL25_OUT R620
CLKOUT_PEG_B_P XTAL25_OUT +1.05V_RUN 1M X2 50V,NPO
PEG_B_CLKRQ# E6 +/-5% XTAL 25MHz
PEG_B_CLKRQ# / GPIO56
C441
1
Y47 XCLK_RCOMP R619 90.9 +/-1%
V40 XCLK_RCOMP XTAL25_OUT
V42 CLKOUT_PCIE6N Width = 10 mil, Spacing = 20 mil
B CLKOUT_PCIE6P B
Close PCH within 500 mil
PCIECLKRQ6# T13 30pF
PCIECLKRQ6# / GPIO45 50V,NPO
V38 K43 CLKOUTFLEX0 R52 22+/-5% 48Mhz Smart Card clock
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 CLK_SMART_48M [37]
FLEX CLOCKS
V37
CLKOUT_PCIE7P F47
PCIECLKRQ7# K12 CLKOUTFLEX1 / GPIO65
PCIECLKRQ7# / GPIO46 H47 CLKOUTFLEX2 R48 33+/-5%
CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM [46] 33Mhz TPM LPC clock
R193 *0_NC_SHORT +/-5% CLK_BCLK_ITP# AK14
[6] CLK_CPU_ITP# CLKOUT_ITPXDP_N
R194 *0_NC_SHORT +/-5% CLK_BCLK_ITP AK13 K49 CLKOUTFLEX3 R608 22+/-5% 14.318Mhz EC main clock
[6] CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 CLK_SIO_14M [34]
R616 *22_NC +/-5%
T165
BD82HM65[VER.B3,SLJ4P]
R157 *0_NC +/-5% R158 *0_NC +/-5%
3 4 PCH_SMBCLK PCH_SMBCLK 3 4
[33,40] LAN_SMBCLK MEM_XDP_HDD_SMBCLK [6,14,15,28,32]
Q14A Q12A
2N7002DW-7-F 2N7002DW-7-F
5
5
R159 2.2K +/-5%
+3.3V_ALW_PCH +3.3V_RUN
R153 2.2K +/-5%
2
2
Q14B Q12B
2N7002DW-7-F 2N7002DW-7-F
6 1 PCH_SMBDAT PCH_SMBDAT 6 1
[33,40] LAN_SMBDAT MEM_XDP_HDD_SMBDAT [6,14,15,28,32]
A A
R188 *0_NC +/-5% R152 *0_NC +/-5%
Ever Light
Technology Limited
Title
10 -- CBT 4/7 (PCIE, CLK)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW_PCH
1227: Pop R196 for Intel ME setting.
PCH_GPIO15 R196 1K +/-1%
PCH_GPIO28 R258 4.7K +/-5%
COUGAR POINT (GPIO,VSS_NCTF,RSVD) KB_DET# R259 10K +/-5%
PCIE_MCARD1_DET# R546 100K+/-5%
R252
+3.3V_RUN
Maximum distance between resistor and PCH is 25.4mm.
D D
SIO_RCIN# R257 10K +/-5%
U3F SIO_EXT_SCI# R253 10K +/-5%

[6] SIO_EXT_SCI#_R
GPIO15 TLS Confidentiality SIO_EXT_SCI# R252 *0_NC_SHORT +/-5% T7 C40 CONTACTLESS_DET# PCH_GPIO1 R628 10K +/-5%
[33] SIO_EXT_SCI# BMBUSY# / GPIO0 TACH4 / GPIO68
PCH_GPIO1 A42 B41 PCH_GPIO69 SIO_A20GATE R255 10K +/-5%
Low = Intel ME Crypto Transport Layer TACH1 / GPIO1 TACH5 / GPIO69
Security (TLS) cipher suite with no IOR_B_DET# H36 C41 PCIE_MCARD3_DET# CONTACTLESS_DET# R632 10K +/-5%
confidentiality [37] IOR_B_DET# TACH2 / GPIO6 TACH6 / GPIO70 PCIE_MCARD3_DET# [30]
High = Intel ME Crypto TLS cipher suite LED_B_DET# E38 A40 USB_MCARD2_DET# EN_ESATA_RPTR R207 10K +/-5%
with confidentiality [37] LED_B_DET# TACH3 / GPIO7 TACH7 / GPIO71 USB_MCARD2_DET# [31]
[34] SIO_EXT_WAKE# SIO_EXT_WAKE# C10 TEMP_ALERT# R653 10K +/-5%

GPIO8
[46] TPM_B_DET# TPM_B_DET# C4 MEDIA_DET# R254 10K +/-5%
R630 *1K_NC +/-1% PCH_GPIO1 LAN_PHY_PWR_CTRL / GPIO12
PCH_GPIO15 G2 P4 SIO_A20GATE FDI_OVRVLTG R246 *1K_NC +/-5%
[6] PCH_GPIO15 GPIO15 A20GATE SIO_A20GATE [33]
AU16 H_PECI_R R267 *0_NC SPEAKER_DET# R67 8.2K +/-5%
PECI H_PECI [2,33]
EN_ESATA_RPTR U2 +/-5%
[6] EN_ESATA_RPTR SATA4GP / GPIO16 P5 SIO_RCIN# PCIE_MCARD3_DET# R503 100K+/-5%
RCIN# SIO_RCIN# [33]
GPIO
SPEAKER_DET# D40 AY11 +1.05V_RUN USB_MCARD2_DET# R629 100K+/-5%
[24] SPEAKER_DET#
CPU/MISC
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD [2,6]
[37] MEDIA_DET# MEDIA_DET# T5 AY10 PCH_THRMTRIP#_R R176 56 +/-5% PCH_GPIO34 R203 10K +/-5%
PLL ON DIE VR ENABLE SCLOCK / GPIO22 THRMTRIP#
[32] PCIE_MCARD1_DET# PCIE_MCARD1_DET# E8 T14 INIT_3.3V# T41 PCH_GPIO69 R65 *10K_NC +/-5%
GPIO24 / MEM_LED INIT3_3V# C166
ENABLED - HIGH (R270 UNSTUFFED) DEFAULT PCH_GPIO27 E16 AY1 NV_CLE 0.1uF LED_B_DET# R56 10K +/-5%
DISABLED - LOW (R270 STUFFED) GPIO27 DF_TVS 10V,X5R
PCH_GPIO28 P8 IOR_B_DET# R58 10K +/-5%
GPIO28 AH8
PCH_GPIO34 K1 TS_VSS1 PCH_GPIO36 R206 *10K_NC +/-5%
STP_PCI# / GPIO34 AK11
USB_MCARD1_DET# K4 TS_VSS2 USB_MCARD1_DET# R190 100K+/-5%
[6,32] USB_MCARD1_DET# GPIO35
+3.3V_ALW_PCH AH10
PCH_GPIO36 V8 TS_VSS3
[6] PCH_GPIO36 SATA2GP / GPIO36
C AK10 C
FDI_OVRVLTG M5 TS_VSS4
[6] FDI_OVRVLTG SATA3GP / GPIO37
R182 10K +/-5% SIO_EXT_WAKE#
N2 P37
[46] TPM_ID0 SLOAD / GPIO38 NC_1
M3
[46] TPM_ID1 SDATAOUT0 / GPIO39
V13 BG2 VSS_NCTF_15 T145 PCH_GPIO27 R130 10K +/-5%
GPIO8 (SIO_EXT_WAKE#) [28] FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
TEMP_ALERT# V3 BG48 VSS_NCTF_16 T111
[6,34] TEMP_ALERT# SATA5GP / GPIO49 VSS_NCTF_16
Low - Intel ME Crypto Transport Layer Security (TLS) KB_DET# D6 BH3 VSS_NCTF_17 T143
cipher suite with no confidentiality [35] KB_DET# GPIO57 VSS_NCTF_17
High - Intel ME Crypto Transport Layer Security (TLS) BH47 VSS_NCTF_18 T108
cipher suite with confidentiality VSS_NCTF_18
VSS_NCTF_1 A4 BJ4 VSS_NCTF_19 T142
T133 VSS_NCTF_1 VSS_NCTF_19
NCTF
R223 *100K_NC +/-5% FDI_OVRVLTG
VSS_NCTF_7 B3 C2 VSS_NCTF_25 T137
VSS_NCTF_8 B47 C48 VSS_NCTF_26 T116
FDI TERMINATION VOLTAGE OVERRIDE VSS_NCTF_9 BD1 D1 VSS_NCTF_27 T138
VSS_NCTF_10 BD49 D49 VSS_NCTF_28 T120
LOW - Tx, Rx terminated T109 VSS_NCTF_10 VSS_NCTF_28
GPIO37 to same voltage VSS_NCTF_11 BE1 E1 VSS_NCTF_29 T139
(FDI_OVRVLTG) (DC Coupling Mode) T146 VSS_NCTF_11 VSS_NCTF_29 PLACE R638 CLOSE TO THE BRANCHING POINT
DEFAULT VSS_NCTF_12 BE49 E49 VSS_NCTF_30 T114
( TO CPU and NVRAM CONNECTOR)
B T110 VSS_NCTF_12 VSS_NCTF_30 B
VSS_NCTF_13 BF1 F1 VSS_NCTF_31 +VCCPNAND
T147 VSS_NCTF_13 VSS_NCTF_31 T136
VSS_NCTF_14 BF49 F49 VSS_NCTF_32 T121
AUDIO verb table selection T115 VSS_NCTF_14 VSS_NCTF_32
BD82HM65[VER.B3,SLJ4P] DMI & FDI Termination Voltage

LOW - Internal pull down 20K. R249
GPIO37 Default MIC detection. 2.2K
(FDI_OVRVLTG) High - Pop R297
External MIC detection +/-5%
NV_CLE
NV_CLE Set to Vss when LOW
Set to Vcc when HIGH
*2N7002W-7-F_NC
Q13
[6,34] SLP_ME_CSW_DEV# S D PCH_GPIO28
G
[2,8,9,30,31,32,33,34,46] PCH_PLTRST#
A A
Ever Light
Technology Limited
Title
11 -- CBT 5/7 (GPIO, CPU)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
COGAR POINT (POWER)

close PCH 100mil
+1.05V_RUN FB1 +3.3V_RUN
FB 1K Ohm, 300mA
U3G POWER 1 2
+VCCADAC
VCCCORE=1.3A max 0603h10 +1.05V_RUN
AA23 U48
AC23 VCCCORE[1] VCCADAC C55 C58 C59
AD21 VCCCORE[2] +3.3V_ALW_PCH
CRT
10uF 0.1uF 10nF R602 *0_NC +/-5%
C132 C129 C116 C114 AD23 VCCCORE[3] U47 10V,X5R 10V,X5R 25V,X7R
10uF 1uF 1uF 1uF AF21 VCCCORE[4] VSSADAC
VCC CORE
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R AF23
AG21
VCCCORE[5]
VCCCORE[6] +3.3V_RUN
R102 *0_NC_SHORT +/-5% +VCCPDSW U3J POWER +1.05V_RUN
AG23 VCCCORE[7] +VCCACLK AD49 N26

D VCCCORE[8] VCCALVDS = 1mA max VCCACLK VCCIO[29] D
AG24 AK36 C153
AG26 VCCCORE[9] VCCALVDS 0.1uF P26 C119
AG27 VCCCORE[10] AK37 C92 10V,X5R T16 VCCIO[30] 1uF
AG29 VCCCORE[11] VSSALVDS 0.1uF VCCDSW3_3 P28 6.3V,X5R
AJ23 VCCCORE[12] 10V,X5R VCCIO[31] +VCCA_USBSUS
LVDS
AJ26 VCCCORE[13] AM37 L10 +/-10% +1.8V_RUN +PCH_VCCDSW V12 T27
AJ27 VCCCORE[14] VCCTX_LVDS[1] 0.1uH,250mA DCPSUSBYP VCCIO[32]
VCCCORE[15] VCCTX_LVDS = 60mA max
AJ29 AM38 C157 T29 +3.3V_ALW_PCH C127
AJ31 VCCCORE[16] VCCTX_LVDS[2] 0805h11 *0.1uF_NC +3.3V_RUN_VCC_CLKF33 T38 VCCIO[33] *1uF_NC
VCCCORE[17] AP36 C82 C75 C57 10V,X5R VCC3_3[5] 6.3V,X5R
+1.05V_RUN VCCTX_LVDS[3] 10nF 10nF 22uF T23
AP37 25V,X7R 25V,X7R 6.3V,X5R +VCCAPLL_CPY_PCH BH23 VCCSUS3_3[7]
VCCTX_LVDS[4] VCCAPLLDMI2
close PCH
+1.05V_RUN AN19 c0805h14 T24 C128
VCCIO[28] AL29 VCCSUS3_3[8] width 100mil
+1.05V_RUN VCCIO[14] 0.1uF
V23 10V,X5R
USB
L18 *1uH_NC +VCCAPLLEXP BJ22 +3.3V_RUN VCCSUS3_3[9]
VCCAPLLEXP +VCCSUS1 AL24 V24 +3.3V_ALW_PCH
C152 V33 DCPSUS[3] VCCSUS3_3[10]
HVCMOS
*10uF_NC AN16 VCC3_3[6] C133 P24 C124 0.1uF10V,X5R
6.3V,X5R VCCIO[15] C111 *1uF_NC VCCSUS3_3[6]
close PCH
AN17 0.1uF 6.3V,X5R AA19 +1.05V_RUN
+1.05V_RUN 100mil VCCIO[16] V34 10V,X5R VCCASW[1] T26 R91 10+/-5% r0603h6
VCC3_3[7] +1.05V_RUN VCCIO[34] +5V_ALW_PCH
AA21
AN21 VCCASW[2] C117 D8 C A SDM10K45-7-F
VCCIO[17] +3.3V_ALW_PCH
AA24 M26 +PCH_V5REF_SUS 1uF
C151 C121 AN26 VCCASW[3] V5REF_SUS 6.3V,X5R +3.3V_ALW_PCH
VCCIO[18] V5REF_SUS = 1mA max
AA26
Clock and Miscellaneous

10uF 1uF
6.3V,X5R 6.3V,X5R AN27 AT16 C142 VCCASW[4] AN23 +VCCA_USBSUS
VCCIO[19] VCCVRM[3] +1.05V_+1.5V_1.8V_RUN DCPSUS[4]
1uF AA27
AP21 6.3V,X5R VCCASW[5] AN24 C126
VCCIO[20] AA29 VCCSUS3_3[1] 0.1uF
AP23 AT20 VCCASW[6] +PCH_V5REF_RUN 10V,X5R
VCCIO[21] VCCDMI[1] +1.05V_RUN AA31
DMI
C107 C115 C143 AP24 +1.05V_RUN VCCASW[7] C96 R75 10+/-5% r0603h6 +5V_RUN
VCCIO
1uF 1uF 1uF VCCIO[22] AC26 P34 0.1uF

6.3V,X5R 6.3V,X5R 6.3V,X5R AP26 AB36 L11 VCCASW[8] V5REF 10V,X5R D7 C A SDM10K45-7-F
VCCIO[23] VCCCLKDMI +3.3V_RUN
10uH C193 C168 AC27
AT24 C97 C113 +/-10% 22uF 22uF VCCASW[9] N20
C C
PCI/GPIO/LPC
VCCIO[24] 1uF *10uF_NC 0805h14 6.3V,X5R 6.3V,X5R AC29 VCCSUS3_3[2] +3.3V_ALW_PCH
6.3V,X5R 6.3V,X5R c0805h14 c0805h14 VCCASW[10] N22
+3.3V_RUN AN33 AC31 VCCSUS3_3[3]
VCCIO[25]
close PCH 100mil VCCASW[11] P20 C139
AN34 AG16 AD29 VCCSUS3_3[4] 1uF
VCCIO[26] VCCDFTERM[1] +VCCPNAND VCCASW[12] P22 6.3V,X5R +3.3V_RUN
AD31 VCCSUS3_3[5]
VCCASW[13]
close PCH 100mil
C109 BH29 AG17
DFT / SPI
0.1uF VCC3_3[3] VCCDFTERM[2] R226 *0_NC_SHORT +/-5% W21 AA16

+1.8V_RUN VCCASW[14] VCC3_3[1]
10V,X5R C137 C106 C118
AJ16 R227 *0_NC +/-5% +3.3V_RUN 1uF 1uF 1uF W23 W16 +3.3V_RUN
VCCDFTERM[3] 6.3V,X5R 6.3V,X5R 6.3V,X5R VCCASW[15] VCC3_3[8] C148
+1.05V_RUN AP16 C149 W24 T34 C90 0.1uF
+1.05V_+1.5V_1.8V_RUN VCCVRM[2] VCCASW[16] VCC3_3[4]
AJ17 0.1uF 0.1uF 10V,X5R
VCCDFTERM[4] 10V,X5R W26 10V,X5R
R186 *0_NC +/-5% +VCCAPLL_FDI BG6 VCCASW[17] +3.3V_RUN
VccAFDIPLL W29
+3.3V_RUN VCCASW[18]
C170 +1.05V_RUN AP17 W31 AJ2 C167 0.1uF 10V,X5R
*10uF_NC VCCIO[27] V1 VCCASW[19] VCC3_3[2]
FDI
6.3V,X5R VCCSPI W33

AU20 C177 VCCASW[20] AF13
+1.05V_RUN VCCDMI[2] VCCIO[5]
trace width
1uF +1.05V_RUN +1.05V_RUN
6.3V,X5R C154 0.1uF +VCCRTCEXT N16
40mil
BD82HM65[VER.B3,SLJ4P] 10V,X5R DCPRTC AH13
VCCIO[12]
+1.05V_+1.5V_1.8V_RUN Y49 AH14 C155
VCCVRM[4] VCCIO[13] 1uF close PCH 100mil
C159 6.3V,X5R
1uF AF14 +1.05V_RUN
6.3V,X5R +1.05V_RUN_VCCA_A_DPL BD47 VCCIO[6]
SATA
VCCADPLLA AK1 +VCCSATAPLL L19 *10uH_NC +/-10%
+1.05V_RUN +1.05V_RUN_VCCA_B_DPL BF47 VCCAPLLSATA
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN VCCADPLLB C174
AF11 +1.05V_+1.5V_1.8V_RUN *10uF_NC
AF17 VCCVRM[1] 6.3V,X5R
R23 *0_NC_SHORT +/-5% +1.05V_+1.5V_1.8V_RUN AF33 VCCIO[7]
B +1.8V_RUN AF34 VCCDIFFCLKN[1] AC16 +1.05V_RUN B
C445 C91 1uF AG34 VCCDIFFCLKN[2] VCCIO[2]
trace width VCCDIFFCLKN[3]
*330uF_NC 6.3V,X5R AC17
R21 *0_NC +/-5% 2V,<=9mOhm
40mil VCCIO[3]
+1.05V_RUN AG33 AD17 C147
VCCSSC VCCIO[4] 1uF
C93 6.3V,X5R
R22 *0_NC +/-5% +1.05V_RUN 1uF C145 0.1uF +VCCSST V16 +1.05V_RUN
6.3V,X5R 10V,X5R DCPSST
R96 *0_NC +1.05V_M_VCCSUS T17 T21

+/-5% V19 DCPSUS[1] VCCASW[22]
DCPSUS[2]
MISC
+1.05V_RUN L12 +1.05V_RUN_VCCA_A_DPL C141
10uH *1uF_NC V21
+/-10% 6.3V,X5R VCCASW[23]
CPU
0805h14 +1.05V_RUN BJ8
L14 +1.05V_RUN_VCCA_B_DPL V_PROC_IO T19
10uH VCCASW[21]
+/-10% +3.3V_ALW_PCH
0805h14 C443 C61 C444 C62 C161 C163 C164
220uF 1uF 220uF 1uF 4.7uF 0.1uF 0.1uF A22 P32
RTC
HDA
2.5V,<=15mOhm 6.3V,X5R 2.5V,<=15mOhm 6.3V,X5R 10V,X5R 10V,X5R 10V,X5R VCCRTC VCCSUSHDA
c0603h9 C112
BD82HM65[VER.B3,SLJ4P] 0.1uF
10V,X5R
close PCH 100mil, +RTC_CELL

trace width 20mil of L12,L14
C134 C144 C150

1uF 0.1uF 0.1uF
6.3V,X5R 10V,X5R 10V,X5R
+3.3V_RUN +1.05V_RUN
A L13 L16 *10uH_NC +VCCAPLL_CPY_PCH A

+3.3V_RUN_VCC_CLKF33
10uH +/-10% C136
0805h14 *10uF_NC +1.05V_RUN_VCCA_A_DPL R51 *0_NC +/-5% +1.05V_RUN_VCCA_B_DPL
6.3V,X5R
C65 C83 close PCH
10uF 1uF
6.3V,X5R 6.3V,X5R
width 100mil
Ever Light
Technology Limited
Title
12 -- CBT 6/7 (POWER)
close PCH 100mil
1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
Cougar Point (GND)
U3I
AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
D
B15 VSS[163] VSS[263] K7 D
B19 VSS[164] VSS[264] L18
B23 VSS[165] VSS[265] L2
B27 VSS[166] VSS[266] L20 U3H
B31 VSS[167] VSS[267] L26 H5
B35 VSS[168] VSS[268] L28 VSS[0]
B39 VSS[169] VSS[269] L36 AA17 AK38
B7 VSS[170] VSS[270] L48 AA2 VSS[1] VSS[80] AK4
F45 VSS[171] VSS[271] M12 AA3 VSS[2] VSS[81] AK42
BB12 VSS[172] VSS[272] P16 AA33 VSS[3] VSS[82] AK46
BB16 VSS[173] VSS[273] M18 AA34 VSS[4] VSS[83] AK8
BB20 VSS[174] VSS[274] M22 AB11 VSS[5] VSS[84] AL16
BB46 VSS[181] VSS[281] M42 AC19 VSS[12] VSS[91] AL27
BC14 VSS[182] VSS[282] M46 AC2 VSS[13] VSS[92] AL31
BC18 VSS[183] VSS[283] M8 AC21 VSS[14] VSS[93] AL33
BC2 VSS[184] VSS[284] N18 AC24 VSS[15] VSS[94] AL34
BC22 VSS[185] VSS[285] P30 AC33 VSS[16] VSS[95] AL48
BC26 VSS[186] VSS[286] N47 AC34 VSS[17] VSS[96] AM11
BC32 VSS[187] VSS[287] P11 AC48 VSS[18] VSS[97] AM14
BC34 VSS[188] VSS[288] P18 AD10 VSS[19] VSS[98] AM36
BC36 VSS[189] VSS[289] T33 AD11 VSS[20] VSS[99] AM39
BD46 VSS[193] VSS[293] P7 AD24 VSS[24] VSS[103] AM7
BD5 VSS[194] VSS[294] R2 AD26 VSS[25] VSS[104] AN2
BE22 VSS[195] VSS[295] R48 AD27 VSS[26] VSS[105] AN29
BE26 VSS[196] VSS[296] T12 AD33 VSS[27] VSS[106] AN3
BE40 VSS[197] VSS[297] T31 AD34 VSS[28] VSS[107] AN31
BF10 VSS[198] VSS[298] T37 AD36 VSS[29] VSS[108] AP12
BF16 VSS[200] VSS[300] W34 AD38 VSS[31] VSS[110] AP28
C C
BF26 VSS[204] VSS[304] V11 AD42 VSS[35] VSS[114] AP4
BD3 VSS[206] VSS[306] V26 AD45 VSS[37] VSS[116] AP46
BF38 VSS[208] VSS[308] V29 AD8 VSS[39] VSS[118] AR2
BF40 VSS[209] VSS[309] V31 AE2 VSS[40] VSS[119] AR48
BF8 VSS[210] VSS[310] V36 AE3 VSS[41] VSS[120] AT11
BG17 VSS[211] VSS[311] V39 AF10 VSS[42] VSS[121] AT13
BG21 VSS[212] VSS[312] V43 AF12 VSS[43] VSS[122] AT18
BG33 VSS[213] VSS[313] V7 AD14 VSS[44] VSS[123] AT22
BG44 VSS[214] VSS[314] W17 AD16 VSS[45] VSS[124] AT26
BG8 VSS[215] VSS[315] W19 AF16 VSS[46] VSS[125] AT28
BH11 VSS[216] VSS[316] W2 AF19 VSS[47] VSS[126] AT30
BH19 VSS[219] VSS[319] Y12 AF27 VSS[50] VSS[129] AT39
H10 VSS[220] VSS[320] Y38 AF29 VSS[51] VSS[130] AT42
BH33 VSS[223] VSS[323] Y46 AF4 VSS[54] VSS[133] AU24
BH35 VSS[224] VSS[324] Y8 AF42 VSS[55] VSS[134] AU30
BH39 VSS[225] VSS[325] BG29 AF46 VSS[56] VSS[135] AV16
BH43 VSS[226] VSS[328] N24 AF5 VSS[57] VSS[136] AV20
BH7 VSS[227] VSS[329] AJ3 AF7 VSS[58] VSS[137] AV24
D3 VSS[228] VSS[330] AD47 AF8 VSS[59] VSS[138] AV30
D12 VSS[229] VSS[331] B43 AG19 VSS[60] VSS[139] AV38
D16 VSS[230] VSS[333] BE10 AG2 VSS[61] VSS[140] AV4
D18 VSS[231] VSS[334] BG41 AG31 VSS[62] VSS[141] AV43
D22 VSS[232] VSS[335] G14 AG48 VSS[63] VSS[142] AV8
D24 VSS[233] VSS[337] H16 AH11 VSS[64] VSS[143] AW14
D26 VSS[234] VSS[338] T36 AH3 VSS[65] VSS[144] AW18
D30 VSS[235] VSS[340] BG22 AH36 VSS[66] VSS[145] AW2
D32 VSS[236] VSS[342] BG24 AH39 VSS[67] VSS[146] AW22
D34 VSS[237] VSS[343] C22 AH40 VSS[68] VSS[147] AW26
B
D38 VSS[238] VSS[344] AP13 AH42 VSS[69] VSS[148] AW28 B
D42 VSS[239] VSS[345] M14 AH46 VSS[70] VSS[149] AW32
D8 VSS[240] VSS[346] AP3 AH7 VSS[71] VSS[150] AW34
E18 VSS[241] VSS[347] AP1 AJ19 VSS[72] VSS[151] AW36
E26 VSS[242] VSS[348] BE16 AJ21 VSS[73] VSS[152] AW40
G18 VSS[243] VSS[349] BC16 AJ24 VSS[74] VSS[153] AW48
G20 VSS[244] VSS[350] BG28 AJ33 VSS[75] VSS[154] AV11
G26 VSS[245] VSS[351] BJ28 AJ34 VSS[76] VSS[155] AY12
G28 VSS[246] VSS[352] AK12 VSS[77] VSS[156] AY22
G36 VSS[247] AK3 VSS[78] VSS[157] AY28
G48 VSS[248] VSS[79] VSS[158]
H12 VSS[249] BD82HM65[VER.B3,SLJ4P]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
BD82HM65[VER.B3,SLJ4P]
A A
Ever Light
Technology Limited
Title
13 -- CBT 7/7 (GND)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
DDR3 Length Matching Formulas

Signal Group Min Length Max Length
Control-to-Clock Clock - 0.5" Clock - 0.0"
Command-to-Clock Clock - 0.5" Clock - 0.5"
Strobe-to-Clock Clock - 0.5" Clock - 1.0"
Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils
D D
JDIMMA1A
0810: Change P/N
[3] DDR_A_MA[0..15] DDR_A_D[0..63] [3]
DDR_A_MA0 98 5 DDR_A_D0
DDR_A_MA1 97 A0 DQ0 7 DDR_A_D1 +1.5V_MEM
DDR_A_MA2 96 A1 DQ1 15 DDR_A_D2 JDIMMA1B
DDR_A_MA3 95 A2 DQ2 17 DDR_A_D3 75 44
DDR_A_MA4 92 A3 DQ3 4 DDR_A_D4 76 VDD1 VSS16 48
DDR_A_MA11 84 A10/AP DQ10 35 DDR_A_D11 99 VDD8 VSS23 66
DDR_A_MA13 119 A12/BC# DQ12 24 DDR_A_D13 105 VDD10 VSS25 72
A15 DQ15 39 DDR_A_D16 112 VDD13 VSS28 133
109 DQ16 41 DDR_A_D17 117 VDD14 VSS29 134
[3] DDR_A_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_A_D18 118 138
79 53 DDR_A_D19 123 139
114 40 DDR_A_D20 124 144
[3] DDR_A_CS#0 S0# DQ20 VDD18 VSS33
121 42 DDR_A_D21 145
[3] DDR_A_CS#1 S1# DQ21 VSS34
101 50 DDR_A_D22 +3.3V_RUN 199 150
[3] DDR_A_CLK0 CK0 DQ22 VDDSPD VSS35
103 52 DDR_A_D23 151
[3] DDR_A_CLK#0 CK0# DQ23 VSS36
102 57 DDR_A_D24 All VREF traces should have 10 mil trace width 77 155
[3] DDR_A_CLK1 CK1 DQ24 NC1 VSS37
104 59 DDR_A_D25 122 156
[3] DDR_A_CLK#1 CK1# DQ25 NC2 VSS38
73 67 DDR_A_D26 125 161
+3.3V_RUN [3] DDR_A_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 DDR_A_D27 162
[3] DDR_A_CKE1 CKE1 DQ27 VSS40
C 115 56 DDR_A_D28 T104 TS#_DIMMA0 198 167 C
[3] DDR_A_CAS# CAS# DQ28 EVENT# VSS41
110 58 DDR_A_D29 30 168
[3] DDR_A_RAS# RAS# DQ29 [2,15] DDR3_DRAMRST# RESET# VSS42
R708 *10K_NC +/-5% 113 68 DDR_A_D30 172
[3] DDR_A_WE# WE# DQ30 VSS43
R709 10K +/-5% 197 70 DDR_A_D31 173
R712 10K +/-5% 201 SA0 DQ31 129 DDR_A_D32 1 VSS44 178
SA1 DQ32 [5,16] M_VREF_DQ_A VREF_DQ VSS45
202 131 DDR_A_D33 126 179
[6,10,15,28,32] MEM_XDP_HDD_SMBCLK SCL DQ33 VREF_CA VSS46
Address:0xA0 200 141 DDR_A_D34 184
[6,10,15,28,32] MEM_XDP_HDD_SMBDAT SDA DQ34 VSS47
143 DDR_A_D35 C336 C337 185
116 DQ35 130 DDR_A_D36 2.2uF 0.1uF 2 VSS48 189
[3] DDR_A_ODT0 ODT0 DQ36 VSS1 VSS49
120 132 DDR_A_D37 10V,X5R 10V,X5R 3 190
[3] DDR_A_ODT1 ODT1 DQ37 VSS2 VSS50
140 DDR_A_D38 8 195
11 DQ38 142 DDR_A_D39 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_A_D40 13 VSS4 VSS52
SA1 SA0 46 DM1 DQ40 149 DDR_A_D41 14 VSS5
63 DM2 DQ41 157 DDR_A_D42 19 VSS6
CHA0 0 0 136 DM3 DQ42 159 DDR_A_D43
[15,16] M_VREF_CA
20 VSS7 +0.75V_DDR_VTT
153 DM4 DQ43 146 DDR_A_D44 25 VSS8
CHB0 1 0 170 DM5 DQ44 148 DDR_A_D45 26 VSS9 203
C509 C507
187 DM6 DQ45 158 DDR_A_D46 2.2uF 0.1uF 31 VSS10 VTT1 204
DM7 DQ46 160 DDR_A_D47 10V,X5R 10V,X5R 32 VSS11 VTT2
[3] DDR_A_DQS[0..7] DQ47 VSS12
DDR_A_DQS0 12 163 DDR_A_D48 37 G1
DDR_A_DQS1 29 DQS0 DQ48 165 DDR_A_D49 38 VSS13 GND G2
DDR_A_DQS2 47 DQS1 DQ49 175 DDR_A_D50 43 VSS14 GND
DDR_A_DQS3 64 DQS2 DQ50 177 DDR_A_D51 VSS15
DDR_A_DQS4 137 DQS3 DQ51 164 DDR_A_D52 AS0A626-J8RG-7H
DDR_A_DQS5 154 DQS4 DQ52 166 DDR_A_D53
[3] DDR_A_DQS#[0..7] DQS7 DQ55
DDR_A_DQS#0 10 181 DDR_A_D56
DDR_A_DQS#1 27 DQS#0 DQ56 183 DDR_A_D57
DQS#7 DQ63
B B
AS0A626-J8RG-7H
+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector
330uF x 1
10uF x 6 Place these Caps near So-DimmA. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
1uF x 4 1uF x 4
C354 C367 C344 C333 C342 C348 C338 C351 C352 C346 C335 C493 C494 C503 C506 C505 C504
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 330uF 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2V,+/-20% 10V,X5R 10V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R
A A
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14 -- SODIMM-204P_JDIMM A
KRUG 15" UMA 1A

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DDR3 Length Matching Formulas

Signal Group Min Length Max Length
Control-to-Clock Clock - 0.5" Clock - 0.0"
Command-to-Clock Clock - 0.5" Clock - 0.5"
Strobe-to-Clock Clock - 0.5" Clock - 1.0"
Data-to-Strobe (per byte lane) Strobe - 20 mils Strobe + 20 mils
D D
JDIMMB1A
[3] DDR_B_MA[0..15] DDR_B_D[0..63] [3]
DDR_B_MA0 98 5 DDR_B_D0
DDR_B_MA1 97 A0 DQ0 7 DDR_B_D1 +1.5V_MEM
DDR_B_MA2 96 A1 DQ1 15 DDR_B_D2 JDIMMB1B
DDR_B_MA3 95 A2 DQ2 17 DDR_B_D3 75 44
DDR_B_MA4 92 A3 DQ3 4 DDR_B_D4 76 VDD1 VSS16 48
DDR_B_MA11 84 A10/AP DQ10 35 DDR_B_D11 99 VDD8 VSS23 66
DDR_B_MA13 119 A12/BC# DQ12 24 DDR_B_D13 105 VDD10 VSS25 72
A15 DQ15 39 DDR_B_D16 112 VDD13 VSS28 133
109 DQ16 41 DDR_B_D17 117 VDD14 VSS29 134
[3] DDR_B_BS0 BA0 DQ17 VDD15 VSS30
108 51 DDR_B_D18 118 138
79 53 DDR_B_D19 123 139
114 40 DDR_B_D20 124 144
[3] DDR_B_CS#0 S0# DQ20 VDD18 VSS33
121 42 DDR_B_D21 145
[3] DDR_B_CS#1 S1# DQ21 VSS34
101 50 DDR_B_D22 +3.3V_RUN 199 150
[3] DDR_B_CLK0 CK0 DQ22 VDDSPD VSS35
103 52 DDR_B_D23 151
[3] DDR_B_CLK#0 CK0# DQ23 VSS36
102 57 DDR_B_D24 77 155
[3] DDR_B_CLK1 CK1 DQ24 NC1 VSS37
104 59 DDR_B_D25 All VREF traces should have 10 mil trace width 122 156
[3] DDR_B_CLK#1 CK1# DQ25 NC2 VSS38
73 67 DDR_B_D26 125 161
[3] DDR_B_CKE0 CKE0 DQ26 NCTEST VSS39
74 69 DDR_B_D27 162
[3] DDR_B_CKE1 CKE1 DQ27 VSS40
115 56 DDR_B_D28 T106 TS#_DIMMB0 198 167
[3] DDR_B_CAS# CAS# DQ28 EVENT# VSS41
110 58 DDR_B_D29 30 168
[3] DDR_B_RAS# RAS# DQ29 [2,14] DDR3_DRAMRST# RESET# VSS42
R719 10K +/-5% 113 68 DDR_B_D30 172
[3] DDR_B_WE# WE# DQ30 VSS43
R720 *10K_NC +/-5% 197 70 DDR_B_D31 173
R718 10K +/-5% 201 SA0 DQ31 129 DDR_B_D32 1 VSS44 178
+3.3V_RUN SA1 DQ32 [5,16] M_VREF_DQ_B VREF_DQ VSS45
C 202 131 DDR_B_D33 126 179 C
[6,10,14,28,32] MEM_XDP_HDD_SMBCLK SCL DQ33 VREF_CA VSS46
Address:0xA4 200 141 DDR_B_D34 184
[6,10,14,28,32] MEM_XDP_HDD_SMBDAT SDA DQ34 VSS47
143 DDR_B_D35 C372 C365 185
116 DQ35 130 DDR_B_D36 2.2uF 0.1uF 2 VSS48 189
[3] DDR_B_ODT0 ODT0 DQ36 VSS1 VSS49
120 132 DDR_B_D37 10V,X5R 10V,X5R 3 190
[3] DDR_B_ODT1 ODT1 DQ37 VSS2 VSS50
140 DDR_B_D38 8 195
11 DQ38 142 DDR_B_D39 9 VSS3 VSS51 196
28 DM0 DQ39 147 DDR_B_D40 13 VSS4 VSS52
46 DM1 DQ40 149 DDR_B_D41 14 VSS5
SA1 SA0 63 DM2 DQ41 157 DDR_B_D42 19 VSS6
DM3 DQ42 [14,16] M_VREF_CA VSS7 +0.75V_DDR_VTT
CHA0 0 0 136 159 DDR_B_D43 20
153 DM4 DQ43 146 DDR_B_D44 25 VSS8
170 DM5 DQ44 148 DDR_B_D45 26 VSS9 203
CHB0 1 0 187 DM6 DQ45 158 DDR_B_D46
C370 C369
31 VSS10 VTT1 204
2.2uF 0.1uF
DM7 DQ46 160 DDR_B_D47 10V,X5R 10V,X5R 32 VSS11 VTT2
[3] DDR_B_DQS[0..7] DQ47 VSS12
DDR_B_DQS0 12 163 DDR_B_D48 37 G1
DDR_B_DQS1 29 DQS0 DQ48 165 DDR_B_D49 38 VSS13 GND G2
DDR_B_DQS2 47 DQS1 DQ49 175 DDR_B_D50 43 VSS14 GND#2-G2
DDR_B_DQS3 64 DQS2 DQ50 177 DDR_B_D51 VSS15
DDR_B_DQS4 137 DQS3 DQ51 164 DDR_B_D52 DDRIII
DDR_B_DQS5 154 DQS4 DQ52 166 DDR_B_D53
[3] DDR_B_DQS#[0..7] DQS7 DQ55
DDR_B_DQS#0 10 181 DDR_B_D56
DDR_B_DQS#1 27 DQS#0 DQ56 183 DDR_B_D57
DQS#7 DQ63
DDRIII
+1.5V_SUS decoupling caps be located at the VDD pins of each SO-DIMM connector in the
vicinity of the CMD, Clock and Control signals
B B
Those capacitors should be placed on the same side of the motherboard as the
SO-DIMM connector
330uF x 1
10uF x 6 Place these Caps near So-DimmB. +1.5V_MEM +3.3V_RUN +0.75V_DDR_VTT
1uF x 4 1uF x 4
1012: Cost down solution
C341 C334 C350 C368 C395 C355 C353 C347 C364 C345 C371 C517 C516 C514 C512 C513 C511
10uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF *330uF_NC 2.2uF 0.1uF 1uF 1uF 1uF 1uF
6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 2V,<=9mOhm 10V,X5R 10V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R 6.3V,X5R
A A
Ever Light
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Title
15 -- SODIMM-204P_JDIMMB
KRUG 15" UMA 1A

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M1: Fixed SO-DIMM VREF_DQ (Default) M2: Programmable SODIMM VREFDQ
+1.5V_MEM
R496
1K
+/-1%
D D
M_VREF_DQ_R R481 *0_NC_SHORT +/-5%

M_VREF_DQ_A [5,14]
For SO-DIMM VREF_DQ
R482
1K
+/-1% C343
0.1uF
10V,X5R
+1.5V_MEM
R510
1K
+/-1%
M_VREF_DQ_R R518 *0_NC_SHORT +/-5%

M_VREF_DQ_B [5,15]
R513
1K
+/-1% C366
0.1uF
10V,X5R
C C
+1.5V_MEM +0.75V_DDR_VTT
B B
R716 R717 *0_NC +/-5%
1K
+/-1% M_VREF_CA [14,15]
R467 *0_NC +/-5%

M_VREF_CA_R R714 *0_NC_SHORT +/-5%
M_VREF_CA [14,15]
For SO-DIMM VREF_CA M_VREF_DQ_A [5,14]
R715 C508 R519 *0_NC +/-5%

1K 0.1uF
+/-1% 10V,X5R M_VREF_DQ_B [5,15]
A A
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16 -- DDR3 VREF
Thunder 1A

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17 -- Blank Page (GPU)
KRUG 15" UMA 1A

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C C
Blank Page
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A A
Ever Light
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Title
KRUG 15" UMA 1A

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D D
C C
Blank Page
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A A
Ever Light
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Title
KRUG 15" UMA 1A

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D D
C C
Blank Page
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A A
Ever Light
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Title
KRUG 15" UMA 1A

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C C
Blank Page
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A A
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Title
KRUG 15" UMA 1A

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C C
Blank Page
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A A
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Title
KRUG 15" UMA 1A

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C C
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KRUG 15" UMA 1A

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Layout Note:
Layout Note: Place caps close to codec.
Speaker Connector
Place caps close to codec. JSPK1
+AUDIO_AVDD +5V_RUN
[11] SPEAKER_DET#
+3.3V_RUN 6
+3.3V_RUN AUD_SPK_R+ R732 *0_NC_SHORT +/-5% AUD_SPK_R+_R 5 6
AUD_SPK_R- R733 *0_NC_SHORT +/-5% AUD_SPK_R-_R 4 5
AUD_SPK_L+ R734 *0_NC_SHORT +/-5% AUD_SPK_L+_R 3 4
AUD_SPK_L- R735 *0_NC_SHORT +/-5% AUD_SPK_L-_R 2 3
C422 C402 C404 C403 C397 1 2 G1
C419 C415 C414 0.1uF 1uF 0.1uF 1uF 4.7uF 1 GND G2
0.1uF 1uF 0.1uF C407 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R GND#G2
10V,X5R 10V,X5R 10V,X5R 4.7uF c0603h9 R736 R737 R738 R739 Header_1X6
10V,X5R 33 33 33 33
D
c0603h9 U35 D
+/-5% +/-5% +/-5% +/-5%
1 27
DVDD_CORE AVDD1 38
AVDD2 C526 C527 C528 C529
3 45 680pF 680pF 680pF 680pF
DVDD_IO PVDD1 39 50V,NPO 50V,NPO 50V,NPO 50V,NPO
PVDD2
JACK Detect Port FAE suggestion
9 13 AUD_SENSE_A
Mapping close to audio chip
DVDD SENSE_A 14 AUD_SENSE_B SENSE_A : Port A
SENSE_B (39.2K)
PCH_AZ_CODEC_BITCLK 28 AUD_MIC_L Port B (20K)
PCH_AZ_CODEC_BITCLK 6 HP0_PORTA_L 29 AUD_MIC_R
[8] PCH_AZ_CODEC_BITCLK HDA_BITCLK HP0_PORTA_R Port C (10K)
23 +VREFOUT
R569 5 VREFOUT_A SPDIF0 (5.1K)
[8] PCH_AZ_CODEC_SDOUT HDA_SDO
*10_NC 31 Keep those trace as widely as possible
+/-5% 10 HP1_PORTB_L 32 AUD_HP_L [37]
[8] PCH_AZ_CODEC_SYNC HDA_SYNC HP1_PORTB_R AUD_HP_R [37] SENSE_B : Port E that will help to decrease the Power Loss
C416 R570 33 +/-1% CODEC_SDI 8 40 AUD_SPK_L+ (39.2K)
[8] PCH_AZ_CODEC_SDIN0 HDA_SDI SPK_PORTD_+L
*10pF_NC 41 AUD_SPK_L- Port F (20K)
50V,NPO 11 SPK_PORTD_-L
[8] PCH_AZ_CODEC_RST# HDA_RST# DMIC0 (10K)
44 AUD_SPK_R+ AUD_SENSE_B +AUDIO_AVDD
SPK_PORTD_+R 43 AUD_SPK_R- SPDIF1 (5.1K)
EMI Reserve SPK_PORTD_-R Layout Note:
15 25 Using 2.49K Pull-up to Place those close to pin14.
[47] CODEC_I2S_MCLK I2S_MCLK MONO_OUT R579
R584 22 CODEC_I2S_SCLK 16 12 AUD_PC_BEEP
AVDD
[47] CODEC_I2S_BCLK I2S_SCLK AnalogBeep 2.49K
+/-1%
17 +3.3V_RUN +3.3V_RUN AUD_SENSE_B
[47] CODEC_I2S_DO I2S_DOUT 2 R604 33 +/-5%
R577 22 CODEC_I2S_LRCLK_R 18 DMIC_CLK/GPIO1 4 DMIC_CLK [27,37]
[47] CODEC_I2S_LRCLK I2S_LRCLK DMIC0/GPIO2 MMB_DMIC_DATA [37]
46 R592 R591
DMIC1/GPIO0/SPDIFOUT1 CAMERA_DMIC_DATA [27]
24 48 100K R585 R586 100K
[47] CODEC_I2S_DI I2S_DIN SPDIFOUT0/GPIO3 +/-5% 39.2K 20K +/-5%
+/-1% +/-1% C427
1nF
19 36 C413 50V,X7R
No Connect_1 CAP+ 4.7uF
6
C 20 35 10V,X5R C
R560 10K +/-5% No Connect_2 CAP- c0603h9 5 2
+3.3V_RUN [34] DOCK_HP_DET DOCK_MIC_DET [34]
47 21 Q41A Q41B
[34] AUD_NB_MUTE# EAPD VREFFILT
1
22 2N7002DW-7-F 2N7002DW-7-F
CAP2 34
7 V- 37
DVSS VREG(+2.5V)
42 26 Place close to CODEC
PVSS AVSS1 30 C408 C418 C425 C428 If SENSE_B total length is greater
49 AVSS2 33 2.2uF 4.7uF 1uF 4.7uF than 6 inches, change C to 0.1uF.
PAD AVSS3 10V,X5R 10V,X5R 10V,X5R 10V,X5R
92HD90B2X5NLGXYAX8 c0603h9 c0603h9
Layout Note: +AUDIO_AVDD
Place caps close to codec.
Close codec +AUDIO_AVDD R581

2.49K
+3.3V_RUN AUD_SENSE_A AUD_SENSE_A +/-1%
R582 *0_NC_SHORT +/-5%
R580 *0_NC_SHORT +/-5% R757
R578 *0_NC_SHORT +/-5% *100K_NC R758
R557 *0_NC_SHORT +/-5% +/-5% *39.2K_NC R587
R759 +/-1% 20K
*100K_NC MIC_DET +/-1%
+/-5%
D C426
C
D 1nF
B Q50 Q51 +3.3V_RUN 50V,X7R
*MMST3904-7-F_NC Q42
+5V_RUN +AUDIO_AVDD R760 G R590
E
R754 *0_NC_SHORT +/-5% *39.2K_NC G
+/-1% *2N7002W-7-F_NC
C400 C405 S 100K 2N7002W-7-F
4.7uF 0.1uF +/-5% S
B B
10V,X5R 10V,X5R 1206: Change to Short pad 1206: Change to NC
c0603h9
AUD_MIC R761 *0_NC_SHORT +/-5%
[34,37] AUD_HP_NB_SENSE
+VREFOUT R762 2.2K

Layout Note:
+/-5% Place those close to pin13.
C545
1uF
R576 0 AUD_MIC_R 16V,Y5V
[37] AUD_MIC
+/-5%
R763
*0_NC
+/-5%
C539 2.2uF AUD_MIC_L
10V,X5R
+5V_ALW
For EMI Request
+5V_ALW
PC BEEP If SENSE_A total length is greater
than 6 inches, change C to 0.1uF.
1214: Change to 0.1uF to reduce noise
C1 C2
4.7nF 4.7nF
50V,X7R 50V,X7R AUD_PC_BEEP C417 0.1uF BEEP1 R571 100K +/-5%
BEEP [33]
Colay Note 10V,X5R
+3.3V_ALW
Default:uninstall R763,R758
C420 0.1uF SPKR1 R573 100K +/-5%
Install R576 10V,X5R
SPKR [8]
Second:unstall R576 R575 R574 R572

Install R763,R758 *10K_NC 10K 10K
A +/-5% +/-5% +/-5% A
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24 -- 92HD90B
Thunder 1A

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HDMI CONN
+5V_RUN
0816: Change to 520304300-237-G
A
D9
SDM10K45-7-F JHDMI1
C
D D
20
HDMI_TX2+_R 1 GND1 21
D2+ 1 GND2
2
D2 Shield 2
2
4
HDMI_TX2-_R 3
U20 RP1 HDMI_TX1+_R 4 D2-
HDMI_TX2+_R 1 10 HDMI_TX2+_R 5 D1+
IN1 O1 2.2K +/-5% D1 Shield
HDMI_TX2-_R 2 9 HDMI_TX2-_R HDMI_TX1-_R 6
3 IN2 O2 8 HDMI_TX0+_R 7 D1-
HDMI_TX1+_R 4 GND_1 GND_2 7 HDMI_TX1+_R 8 D0+
IN3 O3 D0 Shield
1
3
HDMI_TX1-_R 5 6 HDMI_TX1-_R HDMI_TX0-_R 9
IN4 O4 HDMI_CLK+_R 10 D0-
*RCLAMP0524P.TCT_NC 11 CK+
HDMI_CLK-_R 12 CK Shield
R290 0 +/-5% T134 HDMI_CEC 13 CK-
T148 14 CEC
R289 0 +/-5% HDMI_SCL_SINK 15 NC
HDMI_SDA_SINK 16 DDC CLK
U19 L23 17 DDC DATA
HDMI_TX0+_R 1 10 HDMI_TX0+_R C210 0.1uF 16V,X7R HDMI_TX2+_L 1 4 HDMI_TX2+_R 18 GND
IN1 O1 [7] HDMI_TX2+_PCH +5V 18
HDMI_TX0-_R 2 9 HDMI_TX0-_R HDMI_DET_R 19 22
IN2 O2 HP DET 19 GND3
3 8 C208 0.1uF 16V,X7R HDMI_TX2-_L 2 3 HDMI_TX2-_R 23
GND_1 GND_2 [7] HDMI_TX2-_PCH GND4
HDMI_CLK+_R 4 7 HDMI_CLK+_R
IN3 O3
*
HDMI_CLK-_R 5 6 HDMI_CLK-_R *90 Ohm,100mA_NC
IN4 O4 EXC24CG900U R192 F1 CONN - HDMI
*RCLAMP0524P.TCT_NC 20K Polyswitch
+/-5%
R283 0 +/-5%
+5V_RUN
R274 0 +/-5%
C181
L22 0.1uF
RV2 C207 0.1uF 16V,X7R HDMI_TX1+_L 1 4 HDMI_TX1+_R 10V,X5R
[7] HDMI_TX1+_PCH
*VZ0603M260APT_NC
HDMI_SCL_SINK C206 0.1uF 16V,X7R HDMI_TX1-_L 2 3 HDMI_TX1-_R
[7] HDMI_TX1-_PCH
*90 Ohm,100mA_NC
EXC24CG900U
C C
R272 0 +/-5%
R269 0 +/-5%
RV1 L21
*VZ0603M260APT_NC C205 0.1uF 16V,X7R HDMI_TX0+_L 1 4 HDMI_TX0+_R
[7] HDMI_TX0+_PCH
HDMI_SDA_SINK
C202 0.1uF 16V,X7R HDMI_TX0-_L 2 3 HDMI_TX0-_R
[7] HDMI_TX0-_PCH
*90 Ohm,100mA_NC
EXC24CG900U
R261 0 +/-5%
RV3 R260 0 +/-5%

*VZ0603M260APT_NC
HDMI_DET_R L20
C194 0.1uF 16V,X7R HDMI_CLK+_L 1 4 HDMI_CLK+_R
[7] HDMI_CLK+_PCH
C191 0.1uF 16V,X7R HDMI_CLK-_L 2 3 HDMI_CLK-_R
[7] HDMI_CLK-_PCH
*90 Ohm,100mA_NC
EXC24CG900U
Reserve for EMI and close to HDMI CONN
+3.3V_RUN
B B
1019: Change part to improve HDMI EA result. HDMI_CLK-_R R657 680 +/-5%
R126 R143 HDMI_CLK+_R R658 680 +/-5%

2.2K 2.2K
+/-5% +/-5% Q10A HDMI_TX0-_R R659 680 +/-5%
4 3 HDMI_SCL_SINK HDMI_TX0+_R R660 680 +/-5%

[7] HDMI_CLK_PCH
DMN66D0LDW-7 HDMI_TX1-_R R661 680 +/-5%
+3.3V_RUN
5
HDMI_TX1+_R R667 680 +/-5%
HDMI_TX2-_R R668 680 +/-5%

2
DMN66D0LDW-7 HDMI_TX2+_R R669 680 +/-5% HDMI_DATA_D
1 6 HDMI_SDA_SINK
[7] HDMI_DAT_PCH
D
+3.3V_RUN
Q10B
R671 10K +/-5% G
2N7002W-7-F
+3.3V_RUN S
Q47
R74 G
1M
+/-5%
S D HDMI_DET_R
[7] HDM_HPD
Q11
A A
2N7002W-7-F
Ever Light
Technology Limited
Title
25 -- HDMI
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
CRT Switch +5V_RUN +3.3V_RUN
1020: Change to New CIS part

C52 C46
0.1uF 0.1uF
10V,X5R 10V,X5R
U10
8
3 VCC
[7] PCH_CRT_RED R0
4 9
[7] PCH_CRT_GRN G0 VL
5
[7] PCH_CRT_BLU B0
6
[7] PCH_CRT_HSYNC H0
7 18
[7] PCH_CRT_VSYNC
[7] PCH_CRT_DDC_DAT
[7] PCH_CRT_DDC_CLK
1
2
V0
SDA0
SCL0
R1
G1
B1
16
14
11
RED_CRT
GREEN_CRT
BLUE_CRT
[37]
[37]
[37]
IOR/B
H1 12 HSYNC_BUF [37,48]
C C
V1 22 VSYNC_BUF [37,48]
24 SDA1 20 DAT_DDC2_CRT [37]
[34] CRT_SWITCH SEL SCL1 CLK_DDC2_CRT [37]
23
+3.3V_RUN EN
17 RED_DOCK [48]
R2 15
G2 GREEN_DOCK [48]
10 13 BLUE_DOCK [48]
GND B2
25 SDA2
21
19
DAT_DDC2_DOCK [48]
docking
Thermal GND SCL2 CLK_DDC2_DOCK [48]
MAX4885EETG+TCK2
CRT Switch table
SEL VGA signals Switch

RGB[0] = RGB[1]
L SDA[0] = SDA[1] IOR/B
SCL[0] = SCL[1]
RGB[0] = RGB[2]
B
H SDA[0] = SDA[2] DOCK B
SCL[0] = SCL[2]
A A
Ever Light
Technology Limited
Title
26 -- CRT & MUX
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+PWR_SRC Q43 +BL_PWR_SRC

FDC658AP +3.3V_RUN
6 40mil
40mil 4 5
2 +/-5% 2.2K R594 LDDC_CLK_PCH
1 C437 C440 +/-5% 2.2K R595 LDDC_DATA_PCH
C435 0.1uF 0.1uF
R597 0.1uF 25V,X7R 25V,X7R
3
330K 25V,X7R
+/-5%
0930: Fine tune LCD timimg.

R603
330K
D D
+/-5%
D
R24 0 +/-5%
Q46 R25 0 +/-5%

G 2N7002W-7-F
[33] EN_INVPWR
*90 ohm,150mA_NC
S 1 2 USB_CAMERA_D-
[9] USBP11-
4 3 USB_CAMERA_D+
[9] USBP11+
L9
In DOS mode : EC control backlight In DOS mode : EC control backlight

In WIN7 mode : PCH control backlight In WIN7 mode : PCH control backlight
A C D16 SDMK0340L-7-F A C D17 SDMK0340L-7-F

[7] BIA_PWM_PCH [7] PANEL_BKEN_PCH
LCD_PWM_VADJ LCD_BKEN
R599 10K +/-5% R600 10K +/-5%
[33] BIA_PWM_EC [34] PANEL_BKEN_EC
R596 R601
100K 100K
+/-5% +/-5%
C C
+3.3V_RUN +CAM_VCC +3.3V_RUN
Q2
R593 *0_NC_SHORT +/-5%
LVDS
G5
+15V_ALW *P5002CMG_NC JLVDS1
SMDFIX5
R16 D S Current: 220mA(max) 1

*100K_NC 2
+/-5% +LCDVCC 3
C430 C431 +3.3V_RUN 4
G *2.2uF_NC 5
0.1uF [34] LCD_TST
CCD_OFF# 10V,X5R 10V,X5R LDDC_CLK_PCH 6
[7] LDDC_CLK_PCH
C40 LDDC_DATA_PCH 7
[7] LDDC_DATA_PCH
D *0.1uF_NC 8
[7] LCD_A0-_PCH
25V,X7R 9
[7] LCD_A0+_PCH
10 G4
SMDFIX4
11 JCAMERA1
[7] LCD_A1-_PCH +CAM_VCC
G Q3 12
[34] CCD_OFF [7] LCD_A1+_PCH
*2N7002W-7-F_NC 13
14
S [7] LCD_A2-_PCH
15
[7] LCD_A2+_PCH
9
16
17
[7] LCD_ACLK-_PCH
GND#9
B B
18 1
[7] LCD_ACLK+_PCH [9] CAM_MIC_CBL_DET# 1
19 USB_CAMERA_D+ 2
20 G3 USB_CAMERA_D- 3 2
SMDFIX3
[7] LCD_B0-_PCH 3
21 4
[7] LCD_B0+_PCH 4
22 R605 0 DMIC_CLK_R 5
[24,37] DMIC_CLK 5
23 6
[7] LCD_B1-_PCH 6
24 R606 0 CAMERA_DMIC_DATA_R 7
[7] LCD_B1+_PCH [24] CAMERA_DMIC_DATA 7
25 8
GND
26 8
[7] LCD_B2-_PCH
27
[7] LCD_B2+_PCH
28
10
29
+3.3V_ALW [7] LCD_BCLK-_PCH
30 G2
SMDFIX2
[7] LCD_BCLK+_PCH
31
+15V_ALW 32
+LCDVCC 33
Q44 LVDS_CBL_DET# 34
[9] LVDS_CBL_DET#
FDC655BN LCD_PWM_VADJ 35 Header_1X8
LCD_BKEN 36
R29 C436 6 37
200K 0.1uF 5 4 38
+/-5% 2 C434 +BL_PWR_SRC 39
1 0.1uF 40 LVDS_CBL_DET# CAMERA_DMIC_DATA_R DMIC_CLK_R
10V,X5R
3
LCDVCC_ON C438 C54 C53

*1nF_NC *15pF_NC *15pF_NC
CONN-LVDS
G1
C56 50V,X7R 50V,NPO 50V,NPO
0.1uF
25V,X7R
+15V_ALW
3
R598
5 100 1006:Fine tune LCD timimg.
+/-5% +LCDVCC +3.3V_RUN +BL_PWR_SRC +CAM_VCC
R30 Q45A
4
200K 2N7002DW-7-F
A +/-5% C433 C432 C439 C45 A
*0.1uF_NC *0.1uF_NC *0.1uF_NC *0.1uF_NC
6
10V,X5R 10V,X5R 10V,X5R 10V,X5R

2 Q45B
2N7002DW-7-F
D
1
[7,34] ENVDD_PCH
1
D6
Q1
Close to JLVDS1 Close to JCAMERA1 Ever Light
3 EN_LCDVCC G 2N7002W-7-F Discharge Path
[34] LCD_VCC_TEST_EN
2
R11
Technology Limited
100K S Title
BAT54C +/-5% 29 -- LCD,Camera,Touch Conn
Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
HDD POWER +5V_ALW

Q6
+5V_HDD +5V_RUN ODD POWER +5V_ALW
Q25
+5V_ODD +5V_RUN
*P5002CMG_NC *P5002CMG_NC
D S R68 *0_NC_SHORT +/-5% D S R407 *0_NC_SHORT

+/-5%
+15V_ALW R61 +3.3V_ALW2 +15V_ALW R421
*100K_NC *100K_NC
G +/-5% G +/-5%
D +3.3V_ALW2 D
R426
R76 *100K_NC ODD_EN_5V
*100K_NC +/-5% R428 +/-5%
R85 +/-5% *100K_NC
3
*100K_NC C298
+/-5% HDD_EN_3V5V 5 *0.1uF_NC
25V,X7R
6
Q26A
4
3
C88 2 *2N7002DW-7-F_NC
[34] MODC_EN
5 *0.1uF_NC
6
25V,X7R Q26B
1
2 Q5A R430 *2N7002DW-7-F_NC
[33] HDDC_EN
4
*2N7002DW-7-F_NC *100K_NC
Q5B +/-5%
1
R86 *2N7002DW-7-F_NC
*100K_NC
+/-5%
HDD Connector
JHDD1
CONN-SATA
Main HDD
S1 ODD Connector
GND_1 S2 PSATA_PTX_DRX_P0 C68 10nF 25V,X7R
TX+ PSATA_PTX_DRX_P0_C [8]
S3 PSATA_PTX_DRX_N0 C69 10nF 25V,X7R
TX- PSATA_PTX_DRX_N0_C [8]
S4 JODD1
GND_2 S5 PSATA_PRX_DTX_N0 C70 10nF 25V,X7R S1
RX- PSATA_PRX_DTX_N0_C [8] GND1
S6 PSATA_PRX_DTX_P0 C71 10nF 25V,X7R G1 S2 SATA_ODD_PTX_DRX_P1 C319 10nF
RX+ PSATA_PRX_DTX_P0_C [8] PTH1 TXP SATA_ODD_PTX_DRX_P1_C [8]
C S7 G2 S3 SATA_ODD_PTX_DRX_N1 C317 10nF C
GND_3 PTH2 TXN SATA_ODD_PTX_DRX_N1_C [8]
+3.3V_RUN S4
GND2 S5 SATA_ODD_PRX_DTX_N1 C309 10nF
RXN SATA_ODD_PRX_DTX_N1_C [8]
C80 C73 C66 S6 SATA_ODD_PRX_DTX_P1 C307 10nF
RXP SATA_ODD_PRX_DTX_P1_C [8]
P1 *1nF_NC *0.1uF_NC *10uF_NC S7
V33_1 P2 50V,X7R 10V,X5R 10V,X5R GND3 +5V_ODD
V33_2 P3 P1 ODD_DET#
V33_3 DP ODD_DET# [8]
P4 P2
GND_4 P5 +5V P3
GND_5 HDD_DET# [8] +3.3V_RUN +5V#P3
P6 P4 C284 C285 C286 C287 C288
GND_6 P7 MD P5 *10uF_NC 1uF 0.1uF 0.1uF 1nF
V5_1 +5V_HDD GND
P8 P6 10V,X5R 25V,X5R 10V,X5R 10V,X5R 50V,X7R
V5_2 P9 C81 C74 C67 GND#P6
V5_3 P10 1nF 0.1uF 10uF CONN-SATA
GND_7 P11 50V,X7R 10V,X5R 10V,X5R R60
RSVD P12
GND_8 10K
P13 +/-5% HDD1_FFS_INT
V12_1 P14
V12_2
3
P15
V12_3 HDD1_FFS_INT 5
PTH2
PTH1
Q4A
4
FFS_INT2 2 2N7002DW-7-F
G2
G1
Q4B
1
2N7002DW-7-F
ODD_DET# R422 *0_NC +/-5%
DEVICE_DET# [33]
B +3.3V_RUN B
3-axis Fall Sensor (HDD data protector)
U21
6
HDD_FALL_INT 8 VDD 3
[9] HDD_FALL_INT INT1 RSVD(VDD)
FFS_INT2 9 1
[11] FFS_INT2 INT2 VDD_IO C223 C225
7 0.1uF 4.7uF
CS 2 10V,X5R 10V,X5R
12 GND_0 4 c0603h9
SDO GND_1 5
13 GND_2 10
[6,10,14,15,32] MEM_XDP_HDD_SMBDAT SDI/SDA/SDO GND_3 11 1012: Cost down solution
14 RSVD(GND)
[6,10,14,15,32] MEM_XDP_HDD_SMBCLK SPC/SCL
DE351DLTR8
+3.3V_RUN I2C Address Setting
SDO = H (3A) SDO = L (38)

R299 100K +/-5% HDD_FALL_INT Internal PU
Addr = 0011101 Addr = 0011100
A A
Ever Light
Technology Limited
Title
28 -- HDD, ODD, G-SENSOR
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
USB(Back Side)
USB Power USB+eSATA
+5V_ESATA/USB2
1015: Updated to CIS part.
+5V_ESATA/USB2
U37
+5V_ALW 1 8 R342 *0_NC C469 C473 C244 C247 C233
GND OC1 USB_OC1# [9]
150uF 10uF 0.1uF 0.1uF 0.1uF
2 7 6.3V,<=18mOhm 10V,X5R 10V,X5R 10V,X5R 10V,X5R
IN OUT1 L25
C263 C260 3 6 1 2 USBP2-_C
EN1 OUT2 [9] USBP2-
*10uF_NC 0.1uF
6.3V,X5R 10V,X5R 4 5 4 3 USBP2+_C
EN2 OC2 USB_OC1# [9] [9] USBP2+ JESATA1
90 Ohm,400mA S1
C464 10nF 25V,X7R ESATA_PTX_DRX_P4 S2 GND#S1 U1
G546B4P1Uf [8] ESATA_PTX_DRX_P4_C A+ VBUS
R343 *0_NC C462 10nF 25V,X7R ESATA_PTX_DRX_N4 S3 U2 USBP2-_C
[8] ESATA_PTX_DRX_N4_C A- D-
S4 U3 USBP2+_C
C460 10nF 25V,X7R ESATA_PRX_DTX_N4 S5 GND#S4 D+ U4
[8] ESATA_PRX_DTX_N4_C B- GND
PAD#G1
PAD#G2
PAD#G3
C 1006:Change U37 to G546B4P1Uf. C451 10nF 25V,X7R ESATA_PRX_DTX_P4 S6 C
[34] ESATA_USB_PWR_EN# [8] ESATA_PRX_DTX_P4_C B+
S7
GND#S7
PAD
+5V_ESATA/USB2
ESD2
G1
G2
G3
G4
USBP3-_C 1 6 USBP2-_C CONN-eSATA+USB
2 1 6 5
USBP3+_C 3 2 5 4 USBP2+_C
3 4
+5V_USB_RIGHT_PWR *SRV05-4_NC
+5V_ALW 1206: Change P/N
U32
1 8
GND OUT2
2 7
IN1 OUT1
C389 C390 3 6 R698 *0_NC +/-5%
*10uF_NC 1uF IN2 OUT
6.3V,X5R 16V,X5R 4 5 R699 *0_NC +/-5% +5V_ESATA/USB2
EN OC USB_OC0# [9,37]
G547J2P11U 90 Ohm,400mA
4 3 USBP3-_C
[9] USBP3-
1 2 USBP3+_C C489
[9] USBP3+
0.1uF
L30 10V,X5R
[34,37] USB_SIDE_EN#
JUSB1
1 G1
+5V_USB_RIGHT_PWR USBP3-_C 2 VCC PTH G2
USBP3+_C3 D- PTH G3
4 D+ PTH G4
GND PTH
C531 CONN-USB
0.1uF
10V,X5R
B B
A A
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Title
29 -- eSATA/USB, USB x 1
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
3rd MiniCard connector (Flash, half size)

MiniCard connector
D D
+3.3V_BKT +3.3V_BKT
+1.5V_RUN
JMINI2
1 2
[31,34,37,40] PCIE_WAKE# WAKE# +3_3V1
3 4
5 BT_DATA GND1 6
7 BT_CHCLK +1_5V1 8 R721 *0_NC_SHORT +/-5%
[10] MINI3CLK_REQ# CLKREQ# RESERVED1 LPC_LFRAME# [8,33,34,46]
9 10 R722 *0_NC_SHORT +/-5%
GND2 RESERVED2 LPC_LAD3 [8,33,34,46]
11 12 R723 *0_NC_SHORT +/-5%
[10] CLK_PCIE_MINI3# REFCLK- RESERVED3 LPC_LAD2 [8,33,34,46]
13 14 R520 *0_NC_SHORT +/-5%
[10] CLK_PCIE_MINI3 REFCLK+ RESERVED4 LPC_LAD1 [8,33,34,46]
15 16 R521 *0_NC_SHORT +/-5%
GND3 RESERVED5 LPC_LAD0 [8,33,34,46]
17 18
[2,8,9,11,31,32,33,34,46] PCH_PLTRST# 19 RESERVED6 GND4 20
[9] CLK_DEBUG 21 RESERVED7 W_DISABLE# 22 R522 *0_NC_SHORT +/-5%
23 GND5 PERST# 24 PCH_PLTRST# [2,8,9,11,31,32,33,34,46]
[10] PCIE_PRX_CARDTX_N5 PERn0 +3_3Vaux
25 26
[10] PCIE_PRX_CARDTX_P5 PERp0 GND6
27 28
29 GND7 +1_5V2 30
31 GND8 RESERVED8 32
[10] PCIE_PTX_CARDRX_N5_C PETn0 RESERVED9
33 34
[10] PCIE_PTX_CARDRX_P5_C PETp0 GND9
35 36
PCIE_MCARD3_DET# 37 GND10 RESERVED10 38
[11] PCIE_MCARD3_DET# 39 RESERVED11 RESERVED12 40 USB_MCARD3_DET#
41 RESERVED13 GND11 42 USB_MCARD3_DET# [8]
43 RESERVED14 NC1 44
CLK_DEBUG 45 RESERVED15 LED_WLAN# 46
47 RESERVED16 NC2 48
49 RESERVED17 +1_5V3 50
51 RESERVED18 GND12 52
GND
GND
R771 RESERVED19 +3_3V2
*33_NC
+/-5% CONN-Mini-PCIE
G1
G2
C C557 C
*12pF_NC
50V,NPO
1224: Added for EMI request
Close JMINI2
+1.5V_RUN +3.3V_BKT
C521 C518 C525 C523 C360 C520 C519 C359

47nF 47nF 4.7uF 47nF 47nF 0.1uF 0.1uF *0.1uF_NC
16V,X7R 16V,X7R 6.3V,X5R 16V,X7R 16V,X7R 10V,X5R 10V,X5R 10V,X5R
c0603h9
+15V_ALW +3.3V_ALW +3.3V_BKT +3.3V_RUN
D S R764 *0_NC_SHORT +/-5%

R498 R499
*100K_NC *100K_NC Q30
+/-5% +/-5% *P5002CMG_NC PCIE_MCARD3_DET# R515 *0_NC +/-5% USB_MCARD3_DET#
G
3
Q29B
*2N7002DW-7-F_NC 5
B B
Q29A C363
6
*2N7002DW-7-F_NC 4.7nF
4
2 50V,X7R
[34] MCARD_MISC_PWREN
C349
*4.7nF_NC
1
R497 50V,X7R WPAN Noise

*100K_NC
+/-5%
A A
Ever Light
Technology Limited
Title
30 -- Flash /PP(1/2Mini cad)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
2nd MiniCard connector (WLAN, half size)

MiniCard WLAN connector
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN
JMINI3
D D
1 2
[30,34,37,40] PCIE_WAKE# WAKE# +3_3V1
COEX2_WLAN_ACTIVE R504 *0_NC_SHORT +/-5% 3 4
COEX1_BT_ACTIVE R505 *0_NC_SHORT +/-5% 5 BT_DATA GND1 6
7 BT_CHCLK +1_5V1 8
[10] MINI2CLK_REQ# CLKREQ# RESERVED1
9 10 C379 4.7nF 50V,X7R
[10] CLK_PCIE_MINI2# REFCLK- RESERVED3
[10] CLK_PCIE_MINI2 13 14 MSDATA
15 REFCLK+ RESERVED4 16
17 GND3 RESERVED5 18 HOST_DEBUG_TX [33]
[33] HOST_DEBUG_RX RESERVED6 GND4
[33] MSCLK 19 20 WLAN_RADIO_DIS#_R
21 RESERVED7 W_DISABLE# 22 R529 *0_NC_SHORT +/-5%
GND5 PERST# PCH_PLTRST# [2,8,9,11,30,32,33,34,46]
23 24
[10] PCIE_PRX_WLANTX_N2 PERn0 +3_3Vaux
25 26
[10] PCIE_PRX_WLANTX_P2 PERp0 GND6
27 28
29 GND7 +1_5V2 30
[10] PCIE_PTX_WLANRX_N2_C PETn0 RESERVED9
33 34
[10] PCIE_PTX_WLANRX_P2_C PETp0 GND9
35 36 USBP4-_WLAN_C R508 0
PCIE_MCARD2_DET# 37 GND10 RESERVED10 38 USBP4+_WLAN_C
[9] PCIE_MCARD2_DET# RESERVED11 RESERVED12
39 40 USB_MCARD2_DET#
RESERVED13 GND11 USB_MCARD2_DET# [11] *90 ohm,150mA_NC
41 42
RESERVED14 NC1 WIMAX_LED# [36]
43 44 USBP4- 1 2 USBP4-_WLAN_C
RESERVED15 LED_WLAN# WLAN_LED# [36] [9] USBP4-
45 46
47 RESERVED16 NC2 48 R502 *0_NC +/-5% MSDATA USBP4+ 4 3 USBP4+_WLAN_C
RESERVED17 +1_5V3 MSDATA [33] [9] USBP4+
49 50
51 RESERVED18 GND12 52 L26
GND
GND
PCIE_MCARD2_DET# R524 *0_NC USB_MCARD2_DET# RESERVED19 +3_3V2
+/-5% R509 0
CONN-Mini-PCIE PCIE Express Mini Card Rev1.2 define LED pin is Open Drain.
G1
G2
COEX2_WLAN_ACTIVE
C358
*33p_NC
50V,NPO
C C
D13
WLAN_RADIO_DIS#_R A C
WLAN_RADIO_DIS# [34]
SDMK0340L-7-F
Suport for WoW Prevent backdrive when
R525 *0_NC +/-5% WoW is enabled.
+1.5V_RUN +3.3V_WLAN
Place caps close to WLAN connector.
C381 C378 C356 C522 C374 C377 C524 C373 C362

47nF 47nF *0.1uF_NC 0.1uF 47nF 0.1uF 47nF 4.7uF *330uF_NC
16V,X7R 16V,X7R 10V,X5R 10V,X5R 16V,X7R 10V,X5R 16V,X7R 10V,X5R 6.3V,<=25mOhm
c0603h9
B
MB side module side WLAN +15V_ALW +3.3V_ALW +3.3V_WLAN
B
12:GND 1:GND D S
R550 R545
Wire Cable 100K

+/-5%
100K
+/-5%
G
Q35
P5002CMG
2:USB_DN 11:USB_DN
3
1:USB_DP 12:USB_DP Q38A
Q38B 5 2N7002DW-7-F
2N7002DW-7-F
4
2
[34] AUX_EN_WOWL
C385
R536 4.7nF
1
R533 R549 *470K_NC 50V,X7R
100K *200K_NC +/-5%
+/-5% +/-5%
Bluetooth Support Blarney stone 375
JBT1 +3.3V_RUN
13
R554 0
GND
1 USBP5+_C
1 2 USBP5-_C L29
2 3 4 3 USBP5-_C
3 [9] USBP5-
4
4 5 COEX2_WLAN_ACTIVE 1 2 USBP5+_C
5 [9] USBP5+
6
6 BT_RADIO_DIS# [34]
A 7 *90 ohm,150mA_NC A
7 BT_ACTIVE [36]
8
8 9 R555 0
9 10 COEX1_BT_ACTIVE
10 11
GND#14
11 BT_DET# [9]
12
12 R523
C386
0.1uF
R530
10K
C383
33pF
C380
*100pF_NC
10K
+/-5%
C375
*0.1uF_NC Ever Light
14
Header_1X12 10V,X5R +/-5% 50V,NPO 50V,X7R 10V,X5R

Technology Limited
wire to board Title
31 -- WLAN(1/2 Mini cad), BT
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
MiniCard WWAN connector

+1.5V_RUN +3.3V_RUN_WWAN_PWR
Place caps close to WWAN connector.
+1.5V_RUN
C387 C421 C394 C382 C392 C423 C399 C398
+3.3V_RUN_WWAN_PWR +3.3V_RUN_WWAN_PWR 47nF 33pF 22uF 33pF 47nF 33pF 47nF 330uF
+SIM_PWR 16V,X7R 50V,NPO 6.3V,X5R 50V,NPO 16V,X7R 50V,NPO 16V,X7R 6.3V,<=25mOhm
JMINI1 c0805h14
1 2 33pF close WWAN connector pin 2 and 52

3 WAKE# +3_3V1 4
BT_DATA GND1 33pF close WWAN connector pin 6
5 6
7 BT_CHCLK +1_5V1 8
[10] MINI1CLK_REQ# CLKREQ# RESERVED1
9 10
D GND2 RESERVED2 UIM_DATA [37] D
11 12
[10] CLK_PCIE_MINI1# REFCLK- RESERVED3 UIM_CLK [37]
13 14
[10] CLK_PCIE_MINI1 REFCLK+ RESERVED4 UIM_RESET [37]
15 16 Check Power link
GND3 RESERVED5 UIM_VPP [37]
17 18
19 RESERVED6 GND4 20 +15V_ALW +15V_ALW +3.3V_ALW +3.3V_RUN_WWAN_PWR
RESERVED7 W_DISABLE# WWAN_RADIO_DIS# [34] +3.3V_RUN
21 22 R559 *0_NC_SHORT +/-5%
GND5 PERST# PCH_PLTRST# [2,8,9,11,30,31,33,34,46]
23 24 6
[10] PCIE_PRX_WANTX_N1 PERn0 +3_3Vaux
25 26 5 4 R552 *0_NC_SHORT +/-5%
[10] PCIE_PRX_WANTX_P1 PERp0 GND6
27 28 R562 R558 2 Q39
29 GND7 +1_5V2 30 WWAN_SMBCLK *100K_NC *100K_NC 1 *FDC655BN_NC
31 GND8 RESERVED8 32 WWAN_SMBDAT +/-5% +/-5%
[10] PCIE_PTX_WANRX_N1_C PETn0 RESERVED9
33 34
[10] PCIE_PTX_WANRX_P1_C PETp0 GND9
3
35 36 USBP13-_WWAN_C
PCIE_MCARD1_DET# 37 GND10 RESERVED10 38 USBP13+_WWAN_C
[11] PCIE_MCARD1_DET# RESERVED11 RESERVED12
3
39 40 USB_MCARD1_DET# Q40A C393 R548
RESERVED13 GND11 USB_MCARD1_DET# [6,11]
41 42 Q40B 5 *2N7002DW-7-F_NC *10uF_NC *20K_NC
43 RESERVED14 NC1 44 *2N7002DW-7-F_NC 10V,X5R +/-5%
RESERVED15 LED_WLAN#
6
45 46 R551 *0_NC_SHORT +/-5%
RESERVED16 NC2 LED_WWMAX_OUT# [36]
4
47 48 2
RESERVED17 +1_5V3 [34] MCARD_WWAN_PWREN
49 50 For WIMAX LED debug C396
51 RESERVED18 GND12 52 R561 *4.7nF_NC
GND
GND
RESERVED19 +3_3V2
1
*100K_NC 50V,X7R
+/-5%
CONN-Mini-PCIE
G1
G2
+3.3V_RUN_WWAN_PWR
LED_WWMAX_OUT# R767 100K +/-5%
PCIE_MCARD1_DET# R547 *0_NC USB_MCARD1_DET#

+/-5%
R532 *0_NC_SHORT +/-5%

C C
R556 0
WWAN_SMBCLK 4 3
MEM_XDP_HDD_SMBCLK [6,10,14,15,28] *90 ohm,150mA_NC
+/-5% Q36A 1 2 USBP13-_WWAN_C
[9] USBP13-
R534 *2.2K_NC *2N7002DW-7-F_NC
5
4 3 USBP13+_WWAN_C
[9] USBP13+
+3.3V_RUN_WWAN_PWR
L28
2
R528 *2.2K_NC Q36B R553 0
+/-5% *2N7002DW-7-F_NC
WWAN_SMBDAT 1 6
MEM_XDP_HDD_SMBDAT [6,10,14,15,28]
R526 *0_NC_SHORT +/-5%
B B
A A
Ever Light
Technology Limited
Title
32 -- WWAN+ SIM+MUX
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW
R740 10K +/-5% DYN_TUR_CURRNT_SET#

+RTC_CELL +3.3V_ALW
R490 8.2K +/-5% DOCK_SMB_DAT
R484 8.2K +/-5% DOCK_SMB_CLK R454 *0_NC_SHORT +/-5%
R432 2.2K +/-5% PBAT_SMBDAT C310 C294 C306 C293 C305 C304 C311 C329 C291
C324 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
R440 2.2K +/-5% PBAT_SMBCLK 0.1uF 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 6.3V,X5R
10V,X5R
R451 100K +/-5% BC_DAT_ECE1077
U25
B64
A11
A22
B35
A41
A58
A52
A26
B3
R476 100K +/-5% BC_DAT_EMC4022
VBAT
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
R400 100K +/-5% BC_DAT_ECE5048
D +3.3V_ALW D
R429 *100K_NC+/-5% LPC_LDRQ#_MEC
PS/2 INTERFACE MISC INTERFACE
R410 2.2K +/-5% CHARGER_SMBDAT A5 A10 SYSTEM_ID
[10] SML1_SMBDAT B6 GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1 B10 BOARD_ID
R398 2.2K +/-5% CHARGER_SMBCLK [10] SML1_SMBCLK A37 GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2 B14 DDR_ON C318
[35] CLK_TP_SIO B40 GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK B44 HOST_DEBUG_TX DDR_ON [55] 0.1uF
R412 2.2K +/-5% I2C2A_DATA [35] DAT_TP_SIO CLK_KBD A38 GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX B46 HOST_DEBUG_RX HOST_DEBUG_TX [31] 10V,X5R
[48] CLK_KBD DAT_KBD B41 GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX B26 HOST_DEBUG_RX [31]
[48] DAT_KBD GPIO113/PS2_DAT1A VCC_PRWGD RUNPWROK [2,34]
5
R399 2.2K +/-5% I2C2A_CLK CLK_MSE A39 A25 EN_INVPWR U29
[48] CLK_MSE DAT_MSE B42 GPIO114/PS2_CLK0A GPIO060/KBRST B36 EN_INVPWR [27] 2
[48] DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK 1.05V_VTT_PWRGD [53,57]
R491 2.2K +/-5% I2C1B_DATA PBAT_SMBDAT B59 B37 EC_GPIO103 4
[50] PBAT_SMBDAT GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_MISO [6,56] 1.05V_0.8V_PWROK
PBAT_SMBCLK A56 B38 1
[50] PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_MOSI VCCSA_PWRGD [34,53]
R485 2.2K +/-5% I2C1B_CLK A34
GPIO102/HSPI_SCLK DDR_HVREF_RST_GATE [2]
A35 DYN_TUR_CURRNT_SET# 74AHC1G08GW
GPIO104/HSPI_MISO DYN_TUR_CURRNT_SET# [51]
3
R408 2.2K +/-5% LAN_SMBDAT A36
GPIO106/HSPI_MOSI CPU1.5V_S3_GATE [60]
JTAG INTERFACE A40 MSDATA
R419 2.2K +/-5% LAN_SMBCLK JTAG_TDI A51 GPIO116/MSDATA B43 MSCLK MSDATA [31] PS_ID
GPIO145/I2C1K_DATA/JTAG_TDI GPIO117/MSCLK MSCLK [31]
JTAG_TDO B55 A45
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE [11]
R452 10K +/-5% PCMCIA_DET# JTAG_CLK B56 A55 PS_ID
JTAG_TMS A53 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 A57 PS_ID [50]
R453 10K +/-5% EXPRESS_DET# JTAG_RST# B57 GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 B61 C560
JTAG_RST# GPIO157/LED2 B65 FWP#
nFWP *0.1uF_NC
R459 10K +/-5% SMART_DET# A46 R411 *0_NC_SHORT +/-5% 10V,X5R
C313 0.1uF PROCHOT#/PWM4 H_PROCHOT# [2,51,56]
R416 10K +/-5% EC_GPIO103 10V,X5R FAN PWM & TACH
DOCK_POR_RST# B22 GENERAL PURPOSE I/O
[48] DOCK_POR_RST# GPIO050/FAN_TACH1
R473 2.2K +/-5% BAY_SMBDAT SUS_ON A21 B2 VOL_MUTE# VOL_MUTE# [37]
[60] SUS_ON GPIO051/FAN_TACH2 GPIO001/ECSPI_CS1
AUX_ON B23 A2 DOCK_SMB_ALERT#
[40] AUX_ON GPIO052/FAN_TACH3 GPIO002/ECSPI_CS2 DOCK_SMB_ALERT# [48]
R474 2.2K +/-5% BAY_SMBCLK B24 B8 VOL_UP# VOL_UP# [37]
PCH_ALW_ON A23 GPIO053/PWM0 GPIO014/GPTP-IN7/HSPI_CS1 B18 VOL_DOWN#
[60] PCH_ALW_ON GPIO054/PWM1 GPIO040/GPTP-OUT3/HSPI_CS2 VOL_DOWN# [37]
R475 100K +/-5% GPTP-IN1 B25 A8
[27] BIA_PWM_EC GPIO055/PWM2 GPIO015/GPTP-OUT7 ME_SUS_PWR_ACK [7]
A24 B9
[28] HDDC_EN GPIO056/PWM3 GPIO016/GPTP-IN8 1.5V_SUS_PWRGD [55]
R489 100K +/-5% VOL_MUTE# A9
GPIO017/GPTP-OUT8 PM_APWROK [7]
A14 GPTP-IN1
R492 100K +/-5% VOL_UP# GPIO026/GPTP-IN1 B15
BC-LINK GPIO027/GPTP-OUT1 ALW_PWRGD_3V_5V [59]
A43 A17 DEVICE_DET#
[34] BC_CLK_ECE5048 GPIO123/BCM_A_CLK GPIO041 DEVICE_DET# [28]
C R478 100K +/-5% VOL_DOWN# BC_DAT_ECE5048 B45 B39 RESET_OUT# C
[34] BC_DAT_ECE5048 GPIO122/BCM_A_DAT GPIO107/nRESET_OUT RESET_OUT# [6,7]
A42 A44
+3.3V_SUS [34] BC_INT#_ECE5048 A12 GPIO121/BCM_A_INT# GPIO125/GPTP-IN5 B47 +3.3V_ALW
[39] BC_CLK_EMC4022 GPIO022/BCM_B_CLK GPIO126 PCH_RSMRST# [6,7]
BC_DAT_EMC4022 B13 A54 AC_PRESENT
[39] BC_DAT_EMC4022 GPIO023/BCM_B_DAT GPIO151/GPTP-IN4 AC_PRESENT [7]
R417 2.2K +/-5% CARD_SMBDAT A13 B58
[39] BC_INT#_EMC4022 GPIO024/BCM_B_INT# GPIO152/GPTP-OUT4 SIO_PWRBTN# [7]
PCMCIA_DET# B20
[37] PCMCIA_DET# GPIO044/BCM_C_CLK
R418 2.2K +/-5% CARD_SMBCLK EXPRESS_DET# A18 R349 R351 R352 R355 R359
[37] EXPRESS_DET# GPIO043/BCM_C_DAT
SMART_DET# B19 SMBUS INTERFACE 10K 10K 10K 10K 49.9
G2
[37] SMART_DET# GPIO042/BCM_C_INT#
+5V_RUN A20 A3 DOCK_SMB_DAT +/-5% +/-5% +/-5% +/-5% +/-1% JP1
[35] BC_CLK_ECE1077 GPIO047/LSBCM_D_CLK GPIO003/I2C1A_DATA DOCK_SMB_DAT [48]
BC_DAT_ECE1077 B21 B4 DOCK_SMB_CLK
DOCK_SMB_CLK [48]
GND
R415 4.7K +/-5% CLK_KBD [35] BC_DAT_ECE1077 A19 GPIO046/LSBCM_D_DAT GPIO004/I2C1A_CLK A4 I2C1B_DATA 6
[35] BC_INT#_ECE1077 A16 GPIO045/LSBCM_D_INT# GPIO005/I2C1B_DATA B5 I2C1B_CLK JTAG_TDO 5 6
R402 4.7K +/-5% DAT_KBD [24] BEEP B16 GPIO032/GPTP-IN3/BCM_E_CLK GPIO006/I2C1B_CLK B7 BAY_SMBDAT JTAG_CLK 4 5
[7] SIO_SLP_S5# A15 GPIO31/GPTP-OUT2/BCM_E_DAT GPIO012/I2C1H_DATA/I2C2D_DATA A7 BAY_SMBCLK JTAG_TMS 3 4
[34,51] ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO013/I2C1H_CLK/I2C2D_CLK 3
R414 4.7K +/-5% CLK_MSE B48 I2C2A_DATA JTAG_TDI 2
GPIO130/I2C2A_DATA B49 I2C2A_CLK 1 2
GND
R401 4.7K +/-5% DAT_MSE GPIO131/I2C2A_CLK A47 CHARGER_SMBDAT 1
HOST INTERFACE GPIO132/I2C1G_DATA CHARGER_SMBDAT [51]
[9] SIO_EXT_SMI# A6 B50 CHARGER_SMBCLK
GPIO011/nSMI GPIO140/I2C1G_CLK CHARGER_SMBCLK [51]
+3.3V_RUN [11] SIO_RCIN# A27 B52 CARD_SMBDAT *Header_1X6_NC
GPIO061/LPCPD# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT [37]
G1
LPC_LDRQ#_MEC B29 A49 CARD_SMBCLK
LDRQ# GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK [37]
[8,34,37,46] IRQ_SERIRQ A28 B53 LAN_SMBDAT
SER_IRQ GPIO143/I2C1E_DATA LAN_SMBDAT [10,40]
R460 *10K_NC +/-5% DEVICE_DET# [2,8,9,11,30,31,32,34,46] PCH_PLTRST# B30 A50 LAN_SMBCLK
LRESET# GPIO144/I2C1E_CLK LAN_SMBCLK [10,40]
[9] CLK_PCI_MEC CLK_PCI_MEC A29
+3.3V_ALW_PCH B31 PCI_CLK
[8,30,34,46] LPC_LFRAME# LFRAME#
[8,30,34,46] LPC_LAD0 A30 DELL PWR SW INF
B32 LAD0 A59
[8,30,34,46] LPC_LAD1 LAD1 BGPO0
R434 10K +/-5% AC_PRESENT [8,30,34,46] LPC_LAD2 A31 B63
LAD2 VCI_IN2# LAT_ON_SW# [49]
[8,30,34,46] LPC_LAD3 B33 A60 +3.3V_ALW
LAD3 VCI_OUT ALWON [59]
R472 100K +/-5% DOCK_SMB_ALERT# [7,34,37,46] CLKRUN# A32 A63 VCI_IN1#
A33 CLKRUN# VCI_IN1# B67 POWER_SW_IN#
[11] SIO_EXT_SCI# GPIO100/nEC_SCI VCI_IN0# POWER_SW_IN# [39,49]
B1
VCI_OVRD_IN ACAV_IN [39,51]
A1 DOCK_PWR_SW# R306 R316 R325 R322
R445 100K+/-5% SUS_ON VCI_IN3# 10K 10K 10K *100K_NC
MASTER CLOCK PECI_VREF Trace width 20mils
MEC_XTAL1 A61 PECI B51 PECI_VREF R397 *0_NC_SHORT +/-5% +/-5% +/-5% +/-5% +/-5%
G2
XTAL1 PECI_VREF +1.05V_RUN
R477 100K+/-5% DDR_ON MEC_XTAL2 A62 A48 PECI_EC_R R409 43+/-1% JDEG1
XTAL2 PECI H_PECI [2,11]
B62
GND
R448 2.7K +/-5% AUX_ON R446 *0_NC_SHORT GPIO160/32KHZ_OUT B17 C292 6
[34] EC_32KHZ_ECE5048 I2S I2S_DAT T105 6
+/-5% B27 EC_I2S_SCLK_L R442 *0_NC +/-5% 0.1uF HOST_DEBUG_RX R310 *0_NC_SHORT +/-5% 5
B I2S_CLK 5 B
VSS_RO
VR_CAP
R449 100K+/-5% DOCK_POR_RST# +3.3V_RUN +3.3V_ALW R456 *0_NC B28 EC_I2S_LRCLK_L R433 *0_NC +/-5% 10V,X5R HOST_DEBUG_TX R319 *0_NC_SHORT +/-5% 4
I2S_WS 4
VSS[1]
VSS[4]
AGND
+/-5% MSDATA 3
3
NC1
NC2
NC3
R403 *8.2K_NC+/-5% RESET_OUT# R480 *1K_NC +/-5% MSCLK 2

EP
R462 *10K_NC +/-5% For R709 & R711 --- pop for 5045; de-pop for 5055 1 2
GND
1
1
5
R439 100K+/-5% EN_INVPWR MEC5055-LZY-KRU00

B34
A64
B68
B66
B11
B60
B12
B54
C1
R413 10K +/-5% MSDATA 4 2 R708 DB Version 0.12 *Header_1X6_NC

[37] EC_32KHZ_OZ888
G1
5028 de-pop C747 close to U45 at least 250 mils
R438 100K+/-5% PCH_ALW_ON U27 5048 pop C330
4.7uF +3.3V_SUS
3
R495 10K +/-5% 1.05V_0.8V_PWROK *NC7SZ126M5X_NC 6.3V,X5R

c0603h9
+3.3V_ALW
R396
15 mil at least 15 mil remove one bead 100K
R469 +/-5%
+3.3V_ALW circuit close to U49 B57 CLK_PCI_MEC 10K
PCH_PWRGD# [39]
+RTC_CELL +/-5% D
+RTC_CELL
R424 FWP#
10K R427
+/-5% R471 R468 RESET_OUT# G 2N7002W-7-F
*33_NC
100K *10K_NC Q24
+/-5%
JTAG_RST# R455 +/-5%
fae suggestion +/-5%
100K DOCK_PWR_SW# R470 10K +/-5% S
[39] DOCK_PWR_SW# DOCK_PWR_BTN# [48]
R420 C295 +/-5%
C302 *100_NC *12pF_NC VCI_IN1# C326 C325
0.1uF +/-5% 50V,NPO 1uF *1uF_NC
10V,X5R short pad follow SMSC-FAE suggestion 10V,X5R 10V,X5R
MISS STH HERE

Close pin A29 and pull-up
MEC_XTAL2
Cap Value (C327) Resistor Value (R493) +/- 5% Board Ver Cap Value (C328) Resistor Value (R494) +/- 5% System ID
A C320 A
3
33pF 1214: Modify Board ID. 4700PF 240K SSI (X00) 4700PF 240K Krug 14
Y3 50V,NPO
3
+/-20ppm 4700PF 130K PT (X01) +3.3V_ALW 4700PF 130K Krug 15

32.768KHz +3.3V_ALW
2
FAE SUGGESTION 4700PF 62K/33K ST (X02) 4700PF 62K System 3
Ever Light
2
4700PF 8.2K/4.3K QT(A00) R494 4700PF System 4

R493 130K
33K
MEC_XTAL1 8.2K (X04) +/-1%
C315
+/-1%
BOARD_ID
4700PF
4700PF
2K
1K (A00)
SYSTEM_ID
4700PF
4700PF
8.2K System 5
Technology Limited
33pF C328 Title
50V,NPO C327 4.7nF 4700PF 33 -- SIO (MEC5055)
4.7nF 50V,X7R
50V,X7R 4700PF Size Document Number Rev
DIFFERERNT FROM DELL

32KHz Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW
+3.3V_ALW2
R390 100K +/-5% SLICE_BAT_PRES#
+3.3V_ALW CLK_PCI_5048 CLK_SIO_14M
R336 10K +/-5% PCIE_WAKE#
R373 10K +/-5% USB_SIDE_EN#
R337 10K +/-5% DCIN_CBL_DET# R387 R389
R357 10K +/-5% ESATA_USB_PWR_EN# 10 *10_NC
C275 C273 C261 C238 C262 C278 +/-1% +/-1%
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF
R354 10K +/-5% FAN1_DET# 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R
R333 100K +/-5% VGA_ID C274 C276

4.7pF *4.7pF_NC
R347 100K +/-5% CPU_DETECT# 50V,NPO 50V,NPO
R338 100K +/-5% TP_DET#

D
GPIOE0
Close pin 56 Close pin 64 D
R345 100K +/-5%
+3.3V_ALW
R344 100K +/-5% GPIOE1
A17
B30
A43
A54
+3.3V_ALW
B5
U23
VCC1
VCC1
VCC1
VCC1
VCC1
R360 100K +/-5% DOCK_DET# A23 R385 *0_NC +/-5% LPC_LDRQ0# [8]
B52 GPIOI0 B63 C231
[26] CRT_SWITCH GPIOA0 GPIOI1 SIO_SLP_A# [7]
R479 100K +/-5% PWB_DET# A49 A60 0.75V_DDR_VTT_ON 0.75V_DDR_VTT_ON [55,60] 0.1uF
[37] MDC_RST_DIS# GPIOA1 GPIOI2/TACH0
B53 A61 SIO_SLP_S4# [7] 10V,X5R
[30] MCARD_MISC_PWREN GPIOA2 GPIOI3
DCIN_CBL_DET# A50 B65 SIO_SLP_S3# [7]
[50] DCIN_CBL_DET# GPIOA3 GPIOI4
+3.3V_RUN LID_CL_SIO# B54 A62 IMVP_PWRGD [56]
A51 GPIOA4 GPIOI5 B66 R339 *0_NC_SHORT +/-5%
GPIOA5 GPIOI6 IMVP_VR_ON [56]
5
R375 100K +/-5% WIRELESS_ON#/OFF PCIE_WAKE# B55 A63 U22
[30,31,37,40] PCIE_WAKE# GPIOA6 GPIOI7
A52 DOCK_AC_OFF_EC [33,51] ACAV_IN_NB 2
R383 100K +/-5% D_CLKRUN# GPIOA7 B67 4
GPIOJ0 AUX_EN_WOWL [31] DOCK_AC_OFF_Y [52]
USB_SIDE_EN# A33 A64 TP_DET# [35] DOCK_AC_OFF_EC 1
[29,37] USB_SIDE_EN# GPIOB0 GPIOJ1/TACH1
R386 100K +/-5% D_DLDRQ1# B36 A5 SIO_SLP_LAN# [7,40]
[47] EN_I2S_NB_CODEC# GPIOB1 GPIOJ2/TACH2
A34 B6 SIO_SLP_SUS# [7] 74AHC1G08GW
GPOC2 GPIOJ3
3
R384 100K +/-5% D_SERIRQ B37 A6 GPIO_PSID_SELECT [50] R330
[52] EN_DOCK_PWR_BAR GPOC3 GPIOJ4
A35 B7 MODC_EN [28] R765 33K
[27] PANEL_BKEN_EC GPOC4 GPIOJ5
R335 *10K_NC +/-5% SP_TPM_LPC_EN B38 A7 DOCK_HP_DET [24] 100K +/-0.5%
[7,27] ENVDD_PCH GPOC5 GPIOJ6
LCD_TST A36 B8 DOCK_MIC_DET [24] +/-1%
[27] LCD_TST GPOC6/TACH4 GPIOJ7
R356 *10K_NC +/-5% ME_FWP A37
[50] PSID_DISABLE# GPIOC7
B40 A8 ME_FWP [8]
[50] PBAT_PRES# GPIOD0 GPIOK0
A38 B9 MASK_SATA_LED# [36] 1207: Add resister
[43] DOCKED GPIOC1 GPIOK1/TACH3
DOCK_DET# B41 B10
[48,52] DOCK_DET# GPIOC0 GPIOK2 1.8V_RUN_PWRGD [54]
R388 100K +/-5% PBATT_OFF A39 A10 LED_SATA_DIAG_OUT# [36]
[24] AUD_NB_MUTE# GPIOB7 GPIOK3
B42 B11 TEMP_ALERT# [6,11]
[32] MCARD_WWAN_PWREN GPIOB6 GPIOK4
R362 100K +/-5% RUN_ON A40 A11 RUN_ON RUN_ON [37,54,60]
[27] LCD_VCC_TEST_EN GPIOB5 GPIOK5
B43 B12
[27] CCD_OFF GPIOB4 GPIOK6
R348 10K +/-5% SYS_LED_MASK# A41 A12 SPI_WP#_SEL [45]
[24,37] AUD_HP_NB_SENSE GPIOB3 GPIOK7
B44
ESATA_USB_PWR_EN#
[29] ESATA_USB_PWR_EN# GPIOB2
C R331 100K +/-5% 0.75V_DDR_VTT_ON B60 C
(5028) IRTX GPIOL0/PWM7 A57
(5028) IRRX GPIOL1/PWM8
R365 100K +/-5% LCD_TST B32 B64
GPIOD1 (5028) VSS GPIOL2/PWM0 BAT_A_LED# [36,37]
PBATT_OFF A31 B68
[52] PBATT_OFF GPIOD2 (5028) NC GPIOL3/PWM1
R334 *100K_NC +/-5% VGA_ID SLICE_BAT_PRES# B33 A9 Sink current on LED control pin
[48] SLICE_BAT_PRES# GPIOD3 (5028) VSS GPIOL4/PWM3 BAT_B_LED# [36,37]
B15 B1 B60: 8mA
[37] PWB_DET# GPIOD4 (5028) NC GPIOL5/PWM2
R378 100K +/-5% CPU_VTT_ON A15 A18
GPIOD5 (5028) VSS GPIOL6 T102 A57: 8mA
B16 A44
GPIOD6 (5028) VSS GPIOL7/PWM5 T95 B64: 16mA
R353 *1K_NC +/-5% ME_FWP A16
GPIOD7 B34 A9: 16mA
(5028) NC GPIOM1 B39 B39: 16mA
(5028) VSS GPIOM3/PWM4 BREATH_LED# [36,37,48]
GPIOE0 A1 B51
GPIOE0/RXD (5028) VSS GPIOM4/PWM6 T94
GPIOE1 B2
A2 GPIOE1/TXD
B3 GPIOE2/RTS# A27 LPC_LAD0
GPIOE3/DSR# LAD0 LPC_LAD0 [8,30,33,46]
CPU_DETECT# A3 A26 LPC_LAD1 LPC_LAD1 [8,30,33,46]
[2] CPU_DETECT# GPIOE4/CTS# LAD1
SMSC FAE suggestion GPIOE6:5048-A42 no connect B45 B26 LPC_LAD2 LPC_LAD2 [8,30,33,46]
when it is not used,but the EC firmware should FAN1_DET# A42 GPIOE5/DTR# LAD2 B25 LPC_LAD3 +3.3V_ALW
[39] FAN1_DET# GPIOE6/RI# LAD3 LPC_LAD3 [8,30,33,46]
configure this GPIO as GPO (output) to avoid it B4 A21 LPC_LFRAME# [8,30,33,46]
from floating.This pin's default function is GPI (input). GPIOE7/DCD# LFRAME# B22
LRESET# PCH_PLTRST# [2,8,9,11,30,31,32,33,46]
A28 CLK_PCI_5048 CLK_PCI_5048 [9]
A59 PCICLK B20 R340
GPIOF0 CLKRUN# CLKRUN# [7,33,37,46]
B62 100K
[41] LOM_SMB_ALERT# GPIOF1
A58 A22 LPC_LDRQ1# [8] +/-5%
[7] SUSACK# GPIOF2 LDRQ1#
B61 B21 IRQ_SERIRQ [8,33,37,46]
[40] LOM_ENERGY_DET GPIOF3/TACH8 SER_IRQ
VGA_ID A56 A32 CLK_SIO_14M CLK_SIO_14M [10] LID_CL_SIO# R341 10 +/-5%
GPIOF4/TACH7 14.318MHZ/GPIOM0 LID_CL# [36,37]
VGA_ID B59 B35 EC_32KHZ_ECE5048 [33]
1 = UMA GPIOF5 (5028) NC CLK32/GPIOM2
A55 C239
0 = DIS/SGfx B58 GPIOF6 47nF
[6,11] SLP_ME_CSW_DEV# GPIOF7 B29 D_LAD0 [48] 16V,X7R
DLAD0 B28
DLAD1 D_LAD1 [48]
B47 A25 D_LAD2 [48]
[40] LOM_LOW_PWR GPIOG0/TACH5 DLAD2
A45 A24 D_LAD3 [48]
[51] DYN_TURB_PWR_ALRT# GPIOG1 DLAD3
SYS_LED_MASK# B48 B23 D_LFRAME# [48]
[36] SYS_LED_MASK# GPIOG2 DLFRAME#
A46 A19 D_CLKRUN# D_CLKRUN# [48]
R346 *0_NC_SHORT +/-5% B49 GPIOG3 DCLKRUN# B24 D_DLDRQ1#
[11] SIO_EXT_WAKE# GPIOG4 DLDRQ1# D_DLDRQ1# [48] +3.3V_RUN
A47 A20 D_SERIRQ D_SERIRQ [48]
[36] WIRELESS_LED# GPIOG5 DSER_IRQ
B50
B [7] PCH_PCIE_WAKE# GPIOG6 B
A48
[31] WLAN_RADIO_DIS# GPIOG7/TACH6 A29 BC_INT#_ECE5048 [33]
BC_INT# B31 R350
BC_DAT BC_DAT_ECE5048 [33]
WIRELESS_ON#/OFF B13 A30 BC_CLK_ECE5048 [33] *10K_NC
[36] WIRELESS_ON#/OFF GPIOH0 BC_CLK
A13 +/-5%
[31] BT_RADIO_DIS# GPIOH1
A53
[32] WWAN_RADIO_DIS# SYSOPT1/GPIOH2
B57 A4 RUNPWROK RUNPWROK [2,33] RUNPWROK R583 *0_NC_SHORT +/-5%
[7] SYS_PWROK SYSOPT0/GPIOH3 PWRGD VCCSA_PWRGD [33,53]
B14 D
A14 GPIOH4 B56 SP_TPM_LPC_EN
GPIOH5 OUT65 SP_TPM_LPC_EN [46]
CPU_VTT_ON B17
[57] CPU_VTT_ON GPIOH6
R381 *0_NC B18
+/-5%
[7] PCH_DPWROK GPIOH7 B19 TEST_PIN *2N7002W-7-F_NC G
TEST_PIN Q22 RUN_ON# [54,60]
B46 CAP_LDO
CAP_LDO S
B27 C259 R382
VSS C1 4.7uF
EP 1K
6.3V,X5R +/-5%
c0603h9
ECE5048-LZY
dqfn133ch9
DB Version 0.4
A A
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34 -- SIO (ECE5048)
Thunder 1A

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5 4 3 2 1
+3.3V_RUN
TP Module
R297 R298
Keyboard Module
G2
4.7K 4.7K JTP1
+/-5% +/-5% [34] TP_DET# 8 +3.3V_RUN
GND2
D
PS2_CLK_TS 7 8 D
FB11 1 2 600 ohm,200mA +/-25% TP_CLK PS2_DAT_TS 6 7
[33] CLK_TP_SIO 6
+3.3V_RUN 5
FB12 1 2 600 ohm,200mA +/-25% TP_DATA 4 5 C221
[33] DAT_TP_SIO 4 JKB1
TP_DATA 3 0.1uF
TP_CLK 2 3 1 +5V_RUN
GND1
10V,X5R [11] KB_DET# +3.3V_ALW
C218 C219 C220 C209 1 2 PS2_CLK_TS 2 1
10pF 10pF 10pF 10pF 1 PS2_DAT_TS 3 2
50V,NPO 50V,NPO 50V,NPO 50V,NPO 4 3
+3.3V_ALW 4
G1
CONN - FPC 5 C125 C130
+5V_RUN 5
[33] BC_INT#_ECE1077 6 0.1uF 0.1uF
7 6 10V,X5R 10V,X5R
[33] BC_DAT_ECE1077 7
8
9 8 11
[33] BC_CLK_ECE1077 9 G1
10 12
10 G2
CONN-FPC Place close to Connector
C C
B B
A A
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35 -- KB+TP
KRUG 15" UMA 1A

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5 4 3 2 1
From TOP View:

WLAN
+3.3V_ALW MASK_BASE_LEDS#
[31] WIMAX_LED#
R507 *0_NC_SHORT +/-5% WIRELESS_OFF JWLAN1
R501 *0_NC_SHORT +/-5%

[31] WLAN_LED#
+5V_ALW A
S D
WIRELESS_ON [34] WIRELESS_ON#/OFF
B A
[32] LED_WWMAX_OUT# B
E
Q52 R516 Q32 Q31 C429
D D
2N7002W-7-F 100K G 2N7002W-7-F 0.1uF C
G +/-5% C
[34] MASK_SATA_LED# 47K
S D B
10K
D CONN-Switch
PDTA114YU
Q33 R506 *0_NC_SHORT +/-5%
C
2N7002W-7-F R514 330 +/-5%
LED_WLAN_OUT [37]
G
[31] BT_ACTIVE
S
[34] WIRELESS_LED#
+3.3V_ALW
MASK_BASE_LEDS#
5
HDD +3.3V_ALW
+5V_ALW [34,37] LID_CL#
2
U18
4 MASK_BASE_LEDS#
1
[34] SYS_LED_MASK#
E
Q18 Q17 *74AHC1G08GW_NC
Q19
3
R268 G 2N7002W-7-F
2N7002W-7-F 10K 47K
+/-5%
S D S D B R262 100K +/-5%
[8] SATA_ACT#
10K
C537
PDTA114YU 0.1uF
G R271 *0_NC_SHORT +/-5%
[34] MASK_SATA_LED#
C
R270 330 +/-5%
HDD_LED [37]
[34] LED_SATA_DIAG_OUT#
C C
B B
Charge D14 Amber

LED
C1 R589 620 +/-5%
BAT_A_LED# [34,37]
+5V_ALW A Amber
C2 R753 390 +/-5%
White BAT_B_LED# [34,37]
LED_White/Amber
White
A A
D15
BREATH PWRLED
White LED
+5V_ALW R588 390 +/-5%BREATH_LED_R A C
BREATH_LED# [34,37,48] Ever Light
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Technology Limited
D
Title
36 -- LED+Control, Wirele
Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+SIM_PWR +3.3V_ALW_PCH +5V_RUN
G1
+5V_ALW
8
JIOR1 JMEDIA1
JLED1 6
GND2
1 5 6
2 1 [33] VOL_MUTE# 4 5
[34,36] LID_CL# 2 [33] VOL_DOWN# 4
+3.3V_ALW 3 3
4 3 [33] VOL_UP# 2 3
GND1
+5V_ALW 4 2
1 2 5 1
[34,36] BAT_B_LED# 5 [11] MEDIA_DET# 1
3 4 UIM_CLK [32] 6
D [34,36] BAT_A_LED# 6 D
5 6 UIM_RESET [32] 7 CONN-FPC
[36] HDD_LED 7
7
7 8 UIM_VPP [32] 8
[36] LED_WLAN_OUT 8
9 10 9 11
[9,29] USB_OC0# UIM_DATA [32] 9 G1
11 12 10 12
[29,34] USB_SIDE_EN# [11] LED_B_DET# 10 G2
13 14
15 16 MDC_RST_DIS# [34] CONN-FPC
[9] USBP0-
17 18 PCH_AZ_MDC_SDIN1 [8]
[9] USBP0+
19 20 PCH_AZ_MDC_SYNC [8]
[43] SW_LAN_TX0- 21 22 PCH_AZ_MDC_SDOUT [8]
[43] SW_LAN_TX0+ 23 24 PCH_AZ_MDC_RST# [8]
25 26 PCH_AZ_MDC_BITCLK [8]
[43] SW_LAN_TX1- 27 28
[43] SW_LAN_TX1+ 29 30
RED_CRT [26]
31 32
GREEN_CRT [26]
[43] SW_LAN_TX2- 33 34
BLUE_CRT [26]
35 36
21
[43] SW_LAN_TX2+
37 38 JAUDIO1
HSYNC_BUF [26,48]
[43] SW_LAN_TX3- 39 40 1
VSYNC_BUF [26,48]
GND1
41 42 [24] AUD_MIC 2 1
[43] SW_LAN_TX3+ DAT_DDC2_CRT [26] [24] AUD_HP_L
43 44 3 2
CLK_DDC2_CRT [26]
45 46 4 3
[43] LAN_ACTLED_YEL# IOR_B_DET# [11]
47 48 [24,34] AUD_HP_NB_SENSE 5 4
[43] LED_100_ORG#
49 50 +3.3V_LAN 6 5
[43] LED_10_GRN#
7 6
8 7
9 8
10 9
[24] AUD_HP_R
11 10
12 11
CONN-BTB +5V_USB_RIGHT_PWR 13 12
14 13
G2
15 14
16 15
17 16
[9] USBP1-
18 17
[9] USBP1+
19 18
GND2
20 19
20
C C
CONN-FPC
22
1214: Change Pin defination and connector P/N to GB5RF201-1203-8H
Option (PCMCIA,Express card,Smart Card)

G1
JPCM1
+1.5V_RUN
+3.3V_SUS +3.3V_RUN +5V_RUN
1216: connector P/N to HN14021-0000-7H
2 1
B B
4 3 Reserve for EMI. CN18
6 5 3
8 7 Capcitors close to JLED Connector 1 GND#3
10 9 +3.3V_ALW 1
12 11
14 13 2
16 15 2 4
18 17 C156 GND
[33] PCMCIA_DET# 20 19 *0.1uF_NC Header_1X2
22 21 10V,X5R
[9] USBP12+
24 23
[9] USBP12-
26 25
EXPRESS_DET# [33]
28 27
[10] CLK_PCIE_EXP# EC_32KHZ_OZ888 [33]
30 29
[10] CLK_PCIE_EXP RUN_ON [34,54,60]
32 31
EXPCLK_REQ# [10]
34 33
[10] PCIE_PRX_EXPTX_N3
36 35
[10] PCIE_PRX_EXPTX_P3 PLTRST#_EXP [9]
38 37
40 39 Reserve for EMI.Capcitors close to JPCM Connector
[10] PCIE_PTX_EXPRX_N3_C SMART_DET# [33]
42 41
[10] PCIE_PTX_EXPRX_P3_C CLK_SMART_48M [10]
44 43
46 45 +3.3V_RUN +5V_RUN +1.5V_RUN +3.3V_SUS
[33] CARD_SMBCLK 48 47 CLK_PCI_OZ [9]
[33] CARD_SMBDAT CLKRUN# [7,33,34,46]
50 49
[30,31,34,40] PCIE_WAKE# IRQ_SERIRQ [8,33,34,46]
C391 C401 C406 C388
0.1uF 0.1uF *0.1uF_NC *0.1uF_NC
10V,X5R 10V,X5R 10V,X5R 10V,X5R
CONN-FPC
CONN-BTB 10 G2
[34] PWB_DET# 10 G2
G2
CLK_PCI_OZ 9 G1
[24,27] DMIC_CLK 9 G1
8
7 8
[24] MMB_DMIC_DATA 7
+5V_ALW 6
R772 5 6
+3.3V_RUN 5
*33_NC 4
3 4
A +/-5% A
[49] POWER_SW# 2 3
[34,36,48] BREATH_LED# 2
1
C558 1
*12pF_NC JPWB1
50V,NPO
1224: Added for EMI request
Close JPCM1
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Title
37 -- IO CONN

1A

5 4 3 2 1
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5 4 3 2 1
D D
Biometric Reader
+3.3V_RUN R326 *0_NC_SHORT +/-5% +3.3V_BIO
R324 0 +/-5% C230

CONN-FPC
fingerprint reader 0.1uF
8
R327 0 +/-5% 10V,X5R
6
GND2
5 6
[9] USBP10- 4 3 BTO_USBP-_R 4 5 1020: Need to update CIS
C 3 4 C
1 2 BTO_USBP+_R 2 3
GND1
[9] USBP10+
1 2
L24 1
*90 ohm,150mA_NC
7
+/-20% JBIO1
cks0504h9
ESD1
BTO_USBP-_R 1 6
2 1 6 5 +3.3V_BIO
BTO_USBP+_R 3 2 5 4
3 4
*SRV05-4_NC
B B
A A
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Title
41 -- BIO reader
1A

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5 4 3 2 1
REM_DIODE2_N_4022 EMC4022,EMC4021 colay Note +3.3V_SUS

Q Q
E
A
C
C203 Q20 B Q37 EMC4022: uninstall R457,R436,R437 VDD_PWRGD R444 10K +/-5%
C312
B B MMST3904-7-F
B C384
2.2nF *100pF_NC MMST3904-7-F Install R464,C323 +3.3V_ALW
C
50V,X7R *100pF_NC
E
REM_DIODE2_P_4022
EMC4021:unstall R464,C323 BC_INT#_EMC4022 R435 47K +/-5%
Put A close to Guardian. Install R457,R436,R437
+RTC_CELL
Put B close to Diode Q
Place Q20 near PCH at Top side.Q37 is near MEC5055 at Top side.
THERM_STP# R465 *47K_NC +/-5%
D D
+3.3V_SUS
REM_DIODE1_N_4022
THERMATRIP3# R464 *8.2K_NC +/-5%
E
A B Q48
B
C321 MMST3904-7-F C468 C323
2.2nF R457 *0.1uF_NC Close to EMC4021
50V,X7R
C
Q *100pF_NC *0_NC_SHORT 10V,X5R
REM_DIODE1_P_4022 +/-5%
Put A close to Guardian.

U26
Put B close to Diode Q EMC4021-1-EZK-TR
Place Q48 under CPU at Bottom side for OTP sensor. 7
[33] BC_DAT_EMC4022 SMDATA/BC_DATA
8
[33] BC_CLK_EMC4022 SMCLK/BC_CLK
REM_DIODE1_P_4022 24
REM_DIODE1_N_4022 23 DP1/VREF_T
+3.3V_SUS DN1/THERM
Put A close to Guardian. +3.3V_SUS
REM_DIODE2_P_4022 27
REM_DIODE2_N_4022 26 DP2/DN4
Place Q27 near EMC4021 at Top side. DN2/DP4
R463 R437 *0_NC_SHORT +/-5% 30 25 VCP1
8.2K +RTC_CELL R436 *0_NC_SHORT +/-5% 29 NC3 VIN 31
NC2 VCP T103
+/-5%
THERMATRIP2# R425 22+/-5% 1

VDD
C322 9 BC_INT#_EMC4022
A ATF_INT#/BC_IRQ# BC_INT#_EMC4022 [33]
C
Q27 0.1uF C301 16 20 PWR_SW#_4022

R487 2.2K THERM_B1 B 10V,X5R C297 0.1uF RTC_PWR3V POWER_SW# 21
+1.05V_RUN ACAVAIL_CLR ACAV_IN [33,51]
+/-5% MMST3904-7-F 1uF 10V,X5R C314 15
10V,X5R 1uF GPIO3/PWM/THERMTRIP_SIO 19 THERM_STP#
SYS_SHDN# THERM_STP# [59]
E
C 10V,X5R VDD_PWRGD 13 C
[2] H_THERMTRIP# VDD_PWRGD
12
[33] PCH_PWRGD# 3V_PWROK#
THERMATRIP2# 17
THERMATRIP3# 18 THERMTRIP2#
NC1
MAX8731_IINP [51]
VSET 28
VSET
R431 4.7K +/-5% 32
C308 R443 +5V_RUN ADDR_MODE/XEN R450
0.1uF 953 12K
10V,X5R +/-1% 2 +/-1%
3 VDD_Ha VCP1
VDD_Hb
C300 6 C316
0.1uF C296 VDD_L 0.1uF R447
10V,X5R 10uF 4 10V,X5R 4.99K
10V,X5R CPU_FAN_PWR 5 FAN_OUTa 14 +/-1%
FAN_OUTb TEST1 22
FAN1_TACH_FB 10 TEST2
11 TACH/GPIO1
GND_SLG
TEST3
+3.3V_RUN
R441
33
10K
+/-5%
C299
0.1uF C303
10V,X5R 10uF
10V,X5R
B B
+3.3V_RUN
CPU Fan +RTC_CELL

U28
R649 74AHC1G08GW
5
4.7K
2
G1
+/-5% DOCK_PWR_SW# [33]
JFAN1 PWR_SW#_4022 4
1
FAN1_TACH_FB 1 GND1 POWER_SW_IN# [33,49]
Maximum :600mA 1
2
[34] FAN1_DET# 2
3
CPU_FAN_PWR 3
4 3
GND2
C448 4
C447 0.1uF R458 *0_NC +/-5%
C
10uF 10V,X5R CONN-WTB

G2
10V,X5R D18 R483 *0_NC +/-5%

SDMK0340L-7-F
A
A A
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39 -- Thermal 4021 & FAN x 1
Thunder 1A

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5 4 3 2 1
U15A
C179 0.1uF 16V,X7R PCIE_RX+_R A10 E2 GPHY_TVCOI R81 *4.7K_NC+/-5%

[10] PCIE_PRX_GLANTX_P7 PCIE_TXDP GPHY_TVCOI
C178 0.1uF 16V,X7R PCIE_RX-_R B10 F1 RDAC R80 1.21K +/-1%
[10] PCIE_PRX_GLANTX_N7 PCIE_TXDN RDAC
K2 LAN_TX0+ [43]
A6 TRD0+[TRD0_P] K1
[10] PCIE_PTX_GLANRX_P7_C PCIE_RXDP TRD0-[TRD0_N] LAN_TX0- [43]
B6 J2 LAN_TX1+ [43]
[10] PCIE_PTX_GLANRX_N7_C PCIE_RXDN TRD1+[TRD1_P] J1 LAN_TX1- [43]
TRD1-[TRD1_N]
H2 LAN_TX2+ [43]
A8 TRD2+[TRD2_P] H1
[10] CLK_PCIE_LAN REFCLK+[PCIE_REFCLK_P] TRD2-[TRD2_N] LAN_TX2- [43]
D D
B8 G2 LAN_TX3+ [43]
[10] CLK_PCIE_LAN# REFCLK-[PCIE_REFCLK_N] TRD3+[TRD3_P] G1 LAN_TX3- [43]
TRD3-[TRD3_N]
R691 *0_NC_SHORT +/-5% J9

[10] LANCLK_REQ# CLKREQ#[NC]
K5 LOM_SPD10LED_GRN# [43]
LINKLED# J5
SPD100LED# LOM_SPD100LED_ORG# [43]
K4 SPD1000LED# T32 Speed Indicator LED:
SPD1000LED# 10M Green
BCM5761/BCM5754 TRAFFICLED#
H6 LOM_ACTLED_YEL# [43] 100M Amber
1G Yellow
J8 ENERGYDET R204 *0_NC_SHORT +/-5%
ENERGYDET[NC] LOM_ENERGY_DET [34]
LAN Activity LED:
Name - 5761 R191 10K +/-5% +3.3V_LAN When there are LAN activities running, this LED should be on/flashes.
J10 Name - 5754 unless different
[9] PLTRST_LAN# PERST#
K7
[Name] - 5754 only
[30,31,34,37] PCIE_WAKE# WAKE#
ENERGYDET : [ OT pu ] Energy Detection.
+3.3V_LAN
The BCM5761 drives this pin high when the network cable
R148 2.2K +/-5% SMB_CLK H5 is connected to the network port and valid link pulse or idles
SMB_CLK
are present.
R144 2.2K +/-5% SMB_DATA J6
SMB_DATA
BCM5761 LED mode need to config MODE5 (SPEED10/100 LED MODE)
Configuring the LED Mode bits to 10000 results in the following behavior for the LED signals
LOM_SMBCLK L10 TRAFFICLED : toggles for 30-ms intervals for each transmit or receive activity detected by the transceiver.
APE_SMB_CLK0
LINKLED : driven low when a link is detected while the transceiver is configured for 10 or 1000 Mbps operation.
LOM_SMBDATA L9 SPD100LED : driven low when a link is detected while the transceiver is configured for 100 or 1000 Mbps operation.
APE_SMB_DATA0
+3.3V_LAN
SMBus Interface
R177 2.2K +/-5% L8
APE_SMB_CLK1
C APE SMBus 0 is used by the manageability firmware to C
connect to SMBus devices such as sensors and remote R172 2.2K +/-5% L7
APE_SMB_DATA1
control devices.
APE SMBus 1 is may opionally be used for communicating,

for instance, with another management controller over a
separate SMBus. +3.3V_LAN
F11
Legace SMBus interface is controlled by the MAC CPU. HUSB_DP
This interface has no function assigned to it in BCM5761.
E11 C10 NV_STRAP1 R210 *4.7K_NC +/-5%
HUSB_DN NV_STRAP1[NC]
D10 NV_STRAP0 R216 *4.7K_NC +/-5%
NV_STRAP0[NC]
+3.3V_RUN +3.3V_LAN R127 R100 R93 R121
*4.7K_NC *4.7K_NC *4.7K_NC *4.7K_NC
+/-5% +/-5% +/-5% +/-5%
R163 1K +/-5% LOM_VAUXPRSNT G7 G5 LAN_SO
VAUXPRSNT[VAUX_PRSNT] SO[SO/EEDATA]
R83 1K +/-5% LOM_VMAINPRSNT B1 J3 LAN_SI
VMAINPRSNT[Vmain_PRSNT] SI
K3 LAN_CS#
CS#
R222 *0_NC_SHORT +/-5% F10 J4 LAN_SCLK
[34] LOM_LOW_PWR LOW_PWR SCLK[SCLK/EECLK]
+3.3V_LAN
LOW_PWR : [ Ipd ] Low Power Mode Enable These resistors must be
R104 R97 R99
installed with the BCM5754 to
*4.7K_NC *4.7K_NC *4.7K_NC
configure flash auto-sense. C160
+/-5% +/-5% +/-5%
BCM5761B0KFBG 0.1uF
VMINPRSNT ( I pd , VMAIN ) Main Voltage Present. 10V,X5R
Detects the presence of the system main power. Connect
this input to the main 3.3V power rail using a 1K series resistor.
Main power is expected to be available only when the All of these resistors must be uninstalled with the BCM5761 U14
system is in S0 power state. LAN_SO 1 8 LAN_SI
to configure flash auto-sense. LAN_SCLK 2 SI SO 7
B
3 SCK GND 6 B
LAN_CS# 4 RESET VCC 5
CS WP
VAUXPRSNT ( I pd , VDDIO ) Auxiliary Voltage Present. AT45DB081D-SU-SL955
Detects the presence of the auxiliary (stanby) power. +3.3V_ALW +3.3V_LAN
Q8
Connect this input to auxiliary 3.3V power rail using a 1K series resistor.
P5002CMG
1012: Cost down solution
D S
BCM5761 supports wake-up events from the D3 state when
auxiliary power is present.
VAUXPRSNT and VMAINPRSNT inputs are used to C120 C122
detect the state of the system. Therefore, WOL finctionality G *4.7uF_NC 0.1uF R219 *0_NC +/-5%
is only available when the system main power is not +15V_ALW 10V,X5R 10V,X5R
available (VMAINPRSNT is low) and the auxiliary system c0603h9
power is applied to the controller (VAUXPRSNT is high). 3 4 LOM_SMBCLK
[10,33] LAN_SMBCLK
+3.3V_ALW2
R98 Q16A
100K 2N7002DW-7-F
5
R133 +/-5%
100K R220 2.2K +/-5%
+/-5%
+3.3V_LAN
3
5 R218 2.2K +/-5%

6
2
Q16B
4
R119 *0_NC_SHORT +/-5% 2 Q9A C138 2N7002DW-7-F

[33] AUX_ON
2N7002DW-7-F 2.2nF 6 1 LOM_SMBDATA
[10,33] LAN_SMBDAT
Q9B 50V,X7R
1
R120 *0_NC +/-5% 2N7002DW-7-F

[7,34] SIO_SLP_LAN#
R217 *0_NC +/-5%
A A
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Title
40 -- LOM BCM57760
Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
+3.3V_LAN
+3.3V_LAN GPIO1/SERIAL_DI : [ I/O,pd ] General Purpose I/O or Serial Data Input.

This is a dual-purpose pin that defaults to SERIAL_DI.
As SERIAL_DI this is the serial data input for the debug
R145 R128 R134 R164 R161 R168 R174 U15B UART port and must be externally pulled up.
These resistors must be installed with the BCM5761 only. 10K 10K 10K 10K 10K 10K 10K When configured as a programmable I/O signal and if unused,
+/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% R142 R166 this pin may be left unconnected.
*1K_NC *1K_NC
D7 +/-5% +/-5%
D6 TP_D07[DC]
D5 TP_D06[DC]
C5 TP_D05[DC] E5 GPIO2/SERIAL_DO : [ I/O,pd ] General Purpose I/O or Serial Data Output.
F5 TP_C05[DC] GPIO1/SERIAL_DI[GPIO_1/SERIAL_DI] This is a dual-purpose pin that defaults to SERIAL_DO.
C3 TP_F05[DC]
As SERIAL_DO this is the serial data output for the debug
B5 TP_C03[DC] J7 UART port and must be externally pulled up.
TP_B05[DC] GPIO2/SERIAL_DO[GPIO2]
When configured as a programmable I/O signal and if unused,
this pin may be left unconnected.
D2
GPIO0[GPIO_0/SERIAL_DO] T8
Ruart_mode should be installed
to enable the debug UART
function when the BCM5754 is
used.
BCM5761/BCM5754
+3.3V_LAN
Ruart_mode It is recommended to make the

R215 *4.7K_NC LAN_UART_MODE_5754 D9 C4
BCM5761 balls L11, K11, J11 and
+/-5% DC_D09[UART_MODE] NC_C04[DC] L11 H11 accessible via test points for
NC_L11
C K11 debugging. C
NC_K11 J11
Name - 5761 NC_J11
Name - 5754 unless different H11
NC_H11
Implement TP-s as vias or SMT [Name] - 5754 only
pads to allow access to the Rrefclksel Rrefclksel must not be installed with
K10 R221 *4.7K_NC +/-5%
connecting balls. NC_K10[REFCLK_SEL] D11
the BCM5761, but may be installed
DC_D11 B3 with the BCM5754.
E9 NC_B03[DC]
Rd8_pd must be installed with DC_E09[DC]
C8
the BCM5761 only. DC_C08[DC]
Rd8_pd G10 LAN_TMS
TMS T61
R187 4.7K +/-5% D8 K6 LAN_TDO
TP_D08[DC] TDO T37
F9 LAN_TDI
TDI T60
H7 LAN_TCK
TCK T46
K9 LAN_TRST#
TRST# T57
The LAN_SMALERT# signal may
+3.3V_LAN
be connected to a system input
to be used as an ASF doorbell. If
this feature is used, Rsmalert_pu
must be installed. R103
4.7K
+/-5% A4 LAN_XTALO R118 200 +/-5% LAN_XTALO_R
APE_GPIO0 L3 XTALO
T26 APE_GPIO0
LOM_SMB_ALERT# L4
[34] LOM_SMB_ALERT# APE_GPIO1
APE_GPIO2 L5
T34 APE_GPIO2
APE_GPIO3 L6
T40 APE_GPIO3
APE_GPIO5 L2
T16 APE_GPIO5
APE_GPIO6 L1
T17 APE_GPIO6
Y1
B4 LAN_XTALI 2 1
XTALI
R82 *0_NC +/-5% APE_GPIO4 C1 XTAL 25MHz
APE_GPIO4[VSS]
B
Rvss_5754 B
C123 C135
27pF 27pF
Rvss_5754 must be installed 50V,NPO 50V,NPO
when the BCM5754 is used.
BCM5761B0KFBG
A A
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Title
41 -- BCM5761_TPM/GPIO
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
U15C
+3.3V_LAN
D D
+3.3V_LAN
FB7
1 2 LAN_XTALVDDH A5 K8
XTALVDDH[XTALVDD] VDDIO_K08 H10
600 ohm,200mA C158 VDDIO_H10 C2
BLM18AG601SN1D 0.1uF VDDIO_C02 A3 C180 C101
10V,X5R VDDIO_A03 0.1uF 0.1uF
10V,X5R 10V,X5R +3.3V_LAN +1.2V_LAN
BCM5761/BCM5754
FB5 +1.2V_LAN
1 2 LAN_AVDDH G3
H3 AVDDH_G03[AVDD] H8
600 ohm,200mA C108 C98 AVDDH_H03[AVDD] VDDC_H08 G9 R288 C204 C175 C187 C184 C188
BLM18AG601SN1D 0.1uF 0.1uF VDDC_G09 G8 1 2.2uF 0.1uF 0.1uF 0.1uF 0.1uF
10V,X5R 10V,X5R VDDC_G08 E10 +/-5% 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R
Name - 5761 VDDC_E10
Name - 5754 unless different C9 c0603h9
VDDC_C09
[Name] - 5754 only
3
FB6 D1 LAN_REGCTL12 1 Q21
1 2 LAN_BIASVDDH F2 REGCTL12
BIASVDDH[BIASVDD] C104 PBSS5540Z 1012: Cost down solution
600 ohm,200mA C105 *47nF_NC
2
4
BLM18AG601SN1D 0.1uF +/-10%
10V,X5R
F4 LAN_VDDP
VDDP[VDDC]
C192 C172 C183 C176 C189
A1 Cvddp 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF
+1.2V_LAN REGOUT25[REGCTL25] C100 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R
1uF Cvddp must have c0603h9
FB3 10V,X5R
1 2 LAN_AVDDL E3
ESR < 1 Ohm.
F3 AVDDL_E03[AVDDL]
600 ohm,200mA C76 C85 AVDDL_F03[AVDDL]
BLM18AG601SN1D 2.2uF 0.1uF
C 10V,X5R 10V,X5R C
c0603h9 Rpwr_down_pd
B2 LAN_PWR_DOWN R84 4.7K +/-5%
FB4 PWR_DOWN[VDDP]
1 2 LAN_GPHY_PLLVDDL E1
GPHY_PLLVDDL[GPHY_PLLVDD]
600 ohm,200mA C86 C103
10V,X5R 10V,X5R
c0603h9 Rvddp must be installed with the BCM5754 only.
H9
FB8 VSS_H09 H4
1 2 LAN_PCIE_PLLVDDL C7 VSS_H04 G11
PCIE_PLLVDDL[PCIE_PLLVDD] VSS_G11 Rpwr_down_pd must be installed with the
G6
600 ohm,200mA C165 C162 VSS_G06 G4
BCM5761 only.
BLM18AG601SN1D 2.2uF 0.1uF VSS_G04 F8
10V,X5R 10V,X5R VSS_F08 F7
VSS_F07 The PWR_DWN[VDDP] ball must not be driven to
c0603h9 F6
VSS_F06 E8
3.3V. Refer to the BCM5761 data sheet for logic
FB9 VSS_E08 E7 thresolds and maximum ratings.
1 2 LAN_PCIE_SDSVDDL B9 VSS_E07 E6
PCIE_SDSVDDL[PCIE_VDD] VSS_E06 E4
600 ohm,200mA C171 C169 VSS_E04 D4
BLM18AG601SN1D 2.2uF 0.1uF VSS_D04 D3
10V,X5R 10V,X5R VSS_D03 C6
c0603h9 VSS_C06 B11
VSS_B11 B7
FB10 VSS_B07 A11
1 2 LAN_USB_PLLVDDL C11 VSS_A11 A9
USB_PLLVDDL VSS_A09 A7
600 ohm,200mA C182 C173 VSS_A07 A2
FBusb_pll VSS_A02
10V,X5R 10V,X5R
c0603h9
Cusb_bulk Cusb_hf
B
1012: Cost down solution B
If the BCM5761 is installed, Fusb_pll,

Cusb_bulk and Cusb_hf must be laid out
even if the USB interface is not used
since the USB PLL may provide an
alternate clock source internal to the
BCM5761.
If the BCM5754 is installed, Fusb_pll,

Cusb_bulk and Cusb_hf may be
uninstalled.
A A
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Title
42 -- BCM5761_Power
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
36nH is a suggested value.

Actual value will be systgem dependent.
Must use 0603 package for lower DC resistance.
U8
D D
[40] LAN_TX0- 3 37 SW_LAN_TX0- SW_LAN_TX0- [37]

2 A0- B0- 38 SW_LAN_TX0+
[40] LAN_TX0+ A0+ B0+ SW_LAN_TX0+ [37]
6 A1- B1- 34 SW_LAN_TX1+
[40] LAN_TX1+ A1+ B1+ SW_LAN_TX1+ [37]
9 A2- B2- 29 SW_LAN_TX2+
[40] LAN_TX2+ A2+ B2+ SW_LAN_TX2+ [37]
11 A3- B3- 25 SW_LAN_TX3+
[40] LAN_TX3+ A3+ B3+ SW_LAN_TX3+ [37]
LOM_ACTLED_YEL# 15 17 LAN_ACTLED_YEL# LAN_ACTLED_YEL# [37]
[40] LOM_ACTLED_YEL# LEDA0 LEDB0
LOM_SPD100LED_ORG# 16 18 LED_100_ORG# LED_100_ORG# [37]
[40] LOM_SPD100LED_ORG# LEDA1 LEDB1
LOM_SPD10LED_GRN# 42 41 LED_10_GRN# LED_10_GRN# [37]
[40] LOM_SPD10LED_GRN# LEDA2 LEDB2
13 35 DOCK_LOM_TRD0- [48]
[34] DOCKED SEL C0- 36 DOCK_LOM_TRD0+ [48]
5 C0+ 31
+3.3V_LAN T107 PD C1- DOCK_LOM_TRD1- [48]
32 DOCK_LOM_TRD1+ [48]
C1+ 26
C2- DOCK_LOM_TRD2- [48]
1 27 DOCK_LOM_TRD2+ [48]
4 VDD_1 C2+ 22
DOCKED 8 VDD_2 C3- 23
DOCK_LOM_TRD3- [48]
SEL 0: RJ45. VDD_3 C3+ DOCK_LOM_TRD3+ [48]
C42 C41 C30 14
VDD_4
SEL 1: Dock. 0.1uF 0.1uF 0.1uF 21
VDD_5 LEDC0
19 DOCK_LOM_ACTLED_YEL# [48]
10V,X5R 10V,X5R 10V,X5R 30 20 DOCK_LOM_SPD100LED_ORG# [48]
39 VDD_6 LEDC1 40
VDD_7 LEDC2 DOCK_LOM_SPD10LED_GRN# [48]
43
GND
Reserve pull up.
PI3L720ZHE
+3.3V_LAN
LAN Switch table
R19 *10K_NC +/-5% LOM_SPD10LED_GRN#

DOCKED(SEL) LOM signals LED SIGNALS Switch
C C
R27 *10K_NC +/-5% LOM_SPD100LED_ORG# L Ax to Bx LEDAx to LEDBx MB

R26 *10K_NC +/-5% LOM_ACTLED_YEL#
H Ax to Cx LEDAx to LEDCx DOCK
B B
A A
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Title
43 -- RJ45 MUX Switch
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
For REV A, power use 3.3V +3.3V_RUN R405 *0_NC +/-5%

For REV B, power use 1.5V R406 *0_NC_SHORT +/-5%
+1.5V_RUN
C280 C290
0.1uF 2.2uF
10V,X5R 10V,X5R
+3.3V_RUN
FB13
2 1 C267 C268
2.2uF 0.1uF
D D
C271 10V,X5R 10V,X5R
600 ohm,200mA 0.1uF
10V,X5R
FB14
2 1
C538 C270 C289 C279 C269 C281 C265 C266

600 ohm,200mA 10nF 0.1uF 2.2uF 0.1uF 2.2uF 0.1uF 2.2uF 0.1uF
25V,X7R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R 10V,X5R
3/25 OZ FAE suggest:PCI-e interface, TX+/- (pin7,8)
28
33
34
24
10
35
11
42
U24
9
and RX+/- (pin 5,6), CLK_PCIE_Card +/-. please keep
For REV A, R404 use 5.1K
PE_VDDH
1394_VDDH
1394_VDDH
3.3VDDH
MMI_VCC_IN
VDDH
SKT_VCC
DVDD
DVDD
AVDD
equal length with 100ohm impedance.
R926,C890 and C891 close to U67 For REV B, R404 use 191R +VCC_CARD +VCC_CARD
MMI_CLK/XD_CE#
R404 191 +/-1% PE_REXT 4
PE_REXT +VCC_CARD C530
*22pF_NC
G2
5 25 50V,NPO JCARD1 C515 C510
[10] PCIE_PTX_CARDRX_N6_C PE_RXM MMI_VCC_OUT SD_D2/XD_RB# 1 0.1uF 2.2uF
PAD2
6 15 2 SD#9
[10] PCIE_PTX_CARDRX_P6_C PE_RXP XD_CD# EMI suggestion.Close to R374 MemoryStick#10
10V,X5R 10V,X5R
16 MS_CD# MMI_D3 3
MS_CD# 17 SD_CD# 4 SD#1
SD_CD# MMI_CLK/XD_CE# 5 MemoryStick#9
C282 0.1uF 16V,X7R PCIE_PRX_CARDTX_P6_C 7 MMI_BS/CMD/ALE 6 MemoryStick#8
[10] PCIE_PRX_CARDTX_P6 PE_TXP SD#2
14 SD_WPI/XD_WPO MMI_D3 7
C283 0.1uF 16V,X7R PCIE_PRX_CARDTX_N6_C 8 SD_WPI/XD_WPO 13 MS_CD# 8 MemoryStick#7
[10] PCIE_PRX_CARDTX_N6 PE_TXM XD_RE# MemoryStick#6
36 MMI_CLK/XD_CE#_R R374 22 +/-5% MMI_CLK/XD_CE# 9
MMI_CLK/XD_CE# 12 MS_XD_D2 10 SD#3
2 XD_WE# 37 MMI_BS/CMD/ALE_R R377 33 +/-5% MMI_BS/CMD/ALE 11 MemoryStick#5
[10] CLK_PCIE_CARD# PE_REFCLKM MMI_BS/CMD/ALE SD#4
MMI_D0 12
3 38 MS_XD_D1 13 MemoryStick#4
[10] CLK_PCIE_CARD PE_REFCLKP MMI_D7
1206: CLK damping to 22 ohm for driving validation MemoryStick#3
39 MMI_CLK/XD_CE# 14
MMI_D6 40 MMI_BS/CMD/ALE 15 SD#5
C C
18 MMI_D5 41 16 MemoryStick#2
[9] PLTRST_OZ600# PE_RST# MMI_D4 MemoryStick#1
43 MMI_D3_R R379 33 +/-5% MMI_D3 17
MMI_D3 44 MS_XD_D2_R R380 33 +/-5% MS_XD_D2 MMI_D0 18 SD#6
22 MS_XD_D2 45 SD_D2/XD_RB#_R R391 33 +/-5% SD_D2/XD_RB# SD_D1/XD_CLE 19 SD#7
[10] MMICLK_REQ# MULTI-IO2 SD_D2/XD_RB# SD#8
46 MS_XD_D1_R R393 33 +/-5% MS_XD_D1
MS_XD_D1 47 SD_D1/XD_CLE_R R394 33 +/-5% SD_D1/XD_CLE SD_CD# 20
3/25 OZ FAE suggest:1394 signal to SD_D1/XD_CLE SD-CD
TPBN0 26 48 MMI_D0_R R395 33 +/-5% MMI_D0 21
PAD1
connector should less than 5 inches TPBP0 27 1394_TPBN MMI_D0 SD_WPI/XD_WPO 22 SD-GND
with 90~110ohm impedance. TPAN0 29 1394_TPBP SD-WP(SW)
TPAP0 30 1394_TPAN CONN-Flash Memory Card
1394_TPAP
G1
TPBIAS0 31 23
1394_TPBIAS MULTI-IO1
C277 10pF50V,NPO 1394_XI 19

1394_XO 20 1394_XI
1394_XO
2
X1 1394_REF 32
XTAL-24.576MHz 1394_REF
GND
21
1394_CPS
1
C272 10pF50V,NPO OZ600RJ1LN-B
49
Layout note:
R368
3/25 OZ FAE suggest:Please care the SD interface layout,
5.9K
it is around 208Mhz clock speed, please control the SD
3/25 OZ FAE suggest:Please put the 1394 filter circuit +/-1% card signals as equal length .
and 24.576Mhz crystal near to OZ600RJ1.
R371 56 +/-1% TPBN0

1394a
R370 56 +/-1% TPBP0 R117 0 +/-5%
C264 R361 *90 ohm,150mA_NC +/-20%

B B
270pF 5.1K TPBN0 4 3 TPBN0_C
50V,X7R +/-1%
Card Reader Conn Pin definition TPBP0 1 2 TPBP0_C
NO FOR Pin Assign Function L15

JIEEE1
01 SD #9 SD-DAT2 TPBIAS0 R369 56 +/-1% TPAN0 R101 0 +/-5% 5
Shield_1
02 MemoryStick #10 MS-VSS C488 R367 56 +/-1% TPAP0
1uF 1
10V,X5R 2 TPB-
03 SD/MMC #1 SD-CD/DAT3 MMC-RSV TPB+
3
4 TPA-
04 MemoryStick #9 MS-VCC close to the U24 TPA+
05 MemoryStick #8 MS-SCLK
6
R125 0 +/-5% Shield_2
06 SD/MMC #2 SD-CMD MMC--CMD
07 MemoryStick #7 MS-DATA3 *90 ohm,150mA_NC +/-20% CONN-IEEE 1394
TPAN0 1 2 TPAN0_C
08 MemoryStick #6 MS-INS
TPAP0 4 3 TPAP0_C
09 SD/MMC #3 SD-VSS MMC-VSS1
L17
10 MemoryStick #5 MS-DATA2
R131 0 +/-5%
11 SD/MMC #4 SD-VDD MMC-VDD
close to the 1394 CONN
14 SD/MMC #5 SD-CLK MMC-CLK
15 MemoryStick #2 MS-BS
16 MemoryStick #1 MS-VSS
A A
17 SD/MMC #6 SD-VSS MMC-VSS2
18 SD/MMC #7 SD-DAT0 MMC-DAT
19 SD #8 SD-DAT1
20 SD CD SD-CD Ever Light
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21 SD GND SD-GND
22 SD SW.WP SD-WP(SW)
Title
44 -- MMI & 1394(OZ600RJ1)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
PCH, EC SPI ROM For BIOS (4M Byte)

+3.3V_RUN R729 *0_NC_SHORT +/-5%
+3.3V_ALW R731 *0_NC +/-5% +3.3V_SPI
D D
1206: Change to NC
+3.3V_SPI_J JSPI1
EC_SPI_CS1# 1
PCH_SPI_CS1# 2 1
[8] PCH_SPI_CS1# 2
EC_SPI_DO 3
PCH_SPI_DO 4 3
[8] PCH_SPI_DO 4
C410 EC_SPI_DIN 5
0.1uF PCH_SPI_DIN 6 5
[8] PCH_SPI_DIN 6
10V,X5R R540 R537 EC_SPI_CLK 7
R565 4.7K 3.3K PCH_SPI_CLK 8 7
[8] PCH_SPI_CLK 8
3.3K +/-5% +/-5% EC_SPI_CS0# 9
+/-5% U33 PCH_SPI_CS0# 10 9
[8] PCH_SPI_CS0# 10
8 1 EC_SPI_CS1# +3.3V_SPI_J 11
7 VCC /CS 2 SPI_DIN32 R539 33 +/-5% EC_SPI_DIN 12 11
/HOLD DO +3.3V_SPI 12
EC_SPI_CLK R564 33+/-5% SPI_CLK32 6 3 R538 *0_NC +/-5% SPI_WP#_SEL 13 G1
CLK /WP SPI_WP#_SEL [34] 13 GND
EC_SPI_DO R563 33+/-5% SPI_DO32 5 4 14 G2
DI GND 15 14 GND
C409 W25Q32BVSSIG 16 15
*22pF_NC 16
50V,NPO *CONN-FPC_NC
1206: Change to short pad.
EC_SPI_CS1# R724 *0_NC_SHORT +/-5% PCH_SPI_CS1#
EC_SPI_DO R725 *0_NC_SHORT +/-5% PCH_SPI_DO

PCH SPI ROM (2M Byte)
EC_SPI_DIN R727 *0_NC_SHORT +/-5% PCH_SPI_DIN
+3.3V_SPI_J
EC_SPI_CLK R726 *0_NC_SHORT +/-5% PCH_SPI_CLK
C C
EC_SPI_CS0# R728 *0_NC_SHORT +/-5% PCH_SPI_CS0#
+3.3V_SPI R730 *0_NC_SHORT +/-5% +3.3V_SPI_J

C412
R568 0.1uF R544
3.3K 10V,X5R 4.7K R541 Put close to JSPI1
+/-5% +/-5% 3.3K
U34 +/-5%
8 1 EC_SPI_CS0#
7 VCC CS 2 SPI_DIN16 R543 33 +/-5% EC_SPI_DIN
EC_SPI_CLK R567 33 +/-5%SPI_CLK16 6 HOLD DO 3 R542 *0_NC +/-5% SPI_WP#_SEL
CLK WP SPI_WP#_SEL [34]
EC_SPI_DO R566 33 +/-5%SPI_DO16 5 4
DI GND
W25Q16CVSSIG
C411
*22pF_NC
50V,NPO
B B
A A
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45 -- BIOS ROM(4M+8M)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
China TPM : ATMEL (TEMP SYMBOL)
+3.3V_RUN
LOW: Power Down Mode
50mA High: Woking Mode
C2 close to pin5 (<196mil) +3.3V_RUN
C1 close to pin5 (<393mil)) C548 C549
*0.1uF_nc 2.2nF
GND pin link to pin 4 16V,X7R 50V,X7R
U38 +3.3V_RUN
IRQ_SERIRQ [8,33,34,37]
1 28
2 ATest1 LPCPD# 27
3 ATest2 SERIRQ 26 close U1.24 (<196mil)
ATest3 LAD0 LPC_LAD0 [8,30,33,34]
4 25 and GND link to pin 25
5 GND1 GND4 24
6 SB3V Vcc3 23 C550
[34] SP_TPM_LPC_EN GPIO6 LAD1 LPC_LAD1 [8,30,33,34]
7 22 LPC_LFRAME# 2.2nF
NC LFRAME# LPC_LFRAME# [8,30,33,34]
8 21 50V,X7R
TestI LCLK CLK_PCI_TPM [10]
9 20 LPC_LAD2 [8,30,33,34]
10 TestBI LAD2 19
11 Vcc1 Vcc2 18
+3.3V_RUN 12 GND2 GND3 17
NBO1 LAD3 LPC_LAD3 [8,30,33,34]
13 16
NBO2 LRESET# PCH_PLTRST# [2,8,9,11,30,31,32,33,34]
14 15
NBO3 CLKRUN# CLKRUN# [7,33,34,37]
C551 C552 AT97SC3204-X2A121-2 +3.3V_RUN
0.1uF 2.2nF
16V,X7R 50V,X7R
C C
C553
C4 close to pin 10 (<196mil) 2.2nF
C3 close to pin 10 (<393mil)
and GND link to pin 11 50V,X7R
close U1.19 (<196mil)

and GND link to pin 18
FAE suggest: decoupling CAP is necessary
TPM ID. +3.3V_RUN +3.3V_RUN

Reserve for EMI.Close to U38.
+3.3V_RUN
CLK_PCI_TPM LPC_LFRAME#
R200 R202
100K 1K
+/-5% +/-5% C556 C554 C555
33pF 33pF 0.1uF
[11] TPM_ID0 [11] TPM_ID1 50V,NPO 50V,NPO 10V,X5R
R531 R535
*1K_NC *100K_NC
+/-5% +/-5%
TPM_ID0 TPM_ID1
No TPM 1 0
RSVD 0 1
TPM 1 1
B B
+3.3V_ALW_PCH
R769
*10K_NC
+/-5%
[11] TPM_B_DET# TPM_B_DET#
R770
100K
+/-5%
A A
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Title
46 -- TPM/TCM
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
D D
+3.3V_RUN
C361
0.1uF U31
10V,X5R
16
VCC
C C
2 3 DAI_BCLK# [48]
[24] CODEC_I2S_BCLK 1A 1Y#
4 5
From CODEC [24] CODEC_I2S_LRCLK 2A 2Y# DAI_LRCK# [48]
[24] CODEC_I2S_DO 6 7 DAI_DO# [48]

To Docking
3A 3Y#
R766 33+/-5% 10 9 DAI_12MHZ# [48]
[24] CODEC_I2S_MCLK 4A 4Y#
12 11 C544 100pF 50V,X7R
5A 5Y#
14 13
6A 6Y# CODEC_I2S_DI [24] to CODEC
[34] EN_I2S_NB_CODEC# 1
R500 1K 15 OE1# 8
+/-5% OE2# GND +3.3V_RUN
CD74HC366M96
2
D12
*DA204UT106_NC
3
DAI_DI [48] From Docking
B B
CD74HC366M96 table
INPUTS OUTPUTS(Y)
OE1# OE2# A HC366
L L L H
L L H L
X H X Z
NOTE:
H X X Z Z=High impedance (OFF) state
A A
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Title
47 -- Audio Buffer for Docking
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
JDOCK1 U5
DOCK_DP1_TX0+_C 1 10 DOCK_DP1_TX0+_C
1 2 DOCK_DP1_TX0-_C 2 IN1 O1 9 DOCK_DP1_TX0-_C
1 2 DOCK_AC_OFF [52] IN2 O2
[43] DOCK_LOM_SPD10LED_GRN# 3 4 DOCK_LOM_SPD100LED_ORG# [43] 3 8
DOCK_DP1_CA_DET 5 3 4 6 DOCK_DP2_CA_DET DOCK_DP1_TX1+_C 4 GND_1 GND_2 7 DOCK_DP1_TX1+_C
7 5 6 8 DOCK_DP1_TX1-_C 5 IN3 O3 6 DOCK_DP1_TX1-_C
C37 0.1uF 10V,X5R DOCK_DP1_TX0+_C 9 7 8 10 DOCK_DP2_TX0+_C C4 0.1uF 10V,X5R IN4 O4
[7] DOCK_DP1_TX0+ 9 10 DOCK_DP2_TX0+ [7]
[7] DOCK_DP1_TX0- C38 0.1uF 10V,X5R DOCK_DP1_TX0-_C 11 12 DOCK_DP2_TX0-_C C5 0.1uF 10V,X5R DOCK_DP2_TX0- [7] *RCLAMP0524P.TCT_NC
13 11 12 14
C31 0.1uF 10V,X5R DOCK_DP1_TX1+_C 15 13 14 16 DOCK_DP2_TX1+_C C15 0.1uF 10V,X5R U6
[7] DOCK_DP1_TX1- C32 0.1uF 10V,X5R DOCK_DP1_TX1-_C 17 18 DOCK_DP2_TX1-_C C16 0.1uF 10V,X5R DOCK_DP2_TX1- [7] DOCK_DP1_TX2+_C 1 10 DOCK_DP1_TX2+_C
19 17 18 20 2 IN1 O1 9
C33 0.1uF 10V,X5R DOCK_DP1_TX2+_C 21 19 20 22 DOCK_DP2_TX2+_C C17 0.1uF 10V,X5R DP2 DOCK_DP1_TX2-_C
3 IN2 O2 8
DOCK_DP1_TX2-_C
[7] DOCK_DP1_TX2+ 21 22 DOCK_DP2_TX2+ [7] GND_1 GND_2
23 24 4 7
DP1 [7] DOCK_DP1_TX2- C34 0.1uF 10V,X5R DOCK_DP1_TX2-_C
25 23 24 26
DOCK_DP2_TX2-_C C18 0.1uF 10V,X5R DOCK_DP2_TX2- [7] DOCK_DP1_TX3+_C
DOCK_DP1_TX3-_C 5 IN3 O3 6
DOCK_DP1_TX3+_C
DOCK_DP1_TX3-_C
C35 0.1uF 10V,X5R DOCK_DP1_TX3+_C 27 25 26 28 DOCK_DP2_TX3+_C C19 0.1uF 10V,X5R IN4 O4
[7] DOCK_DP1_TX3- C36 0.1uF 10V,X5R DOCK_DP1_TX3-_C 29 30 DOCK_DP2_TX3-_C C20 0.1uF 10V,X5R DOCK_DP2_TX3- [7] *RCLAMP0524P.TCT_NC
31 29 30 32
D
DOCK_DP1_AUX+ 33 31 32 34 DOCK_DP2_AUX+ U7 D
DOCK_DP1_AUX- 35 33 34 36 DOCK_DP2_AUX- DOCK_DP1_AUX+ 1 10 DOCK_DP1_AUX+
37 35 36 38 DOCK_DP1_AUX- 2 IN1 O1 9 DOCK_DP1_AUX-
DOCK_DP1_HPD 39 37 38 40 DOCK_DP2_HPD 3 IN2 O2 8
[7] DOCK_DP1_HPD 39 40 DOCK_DP2_HPD [7] GND_1 GND_2
+NBDOCK_DC_IN_SS 41 42 ACAV_DOCK_SRC# [52] DOCK_DP1_CA_DET 4 7 DOCK_DP1_CA_DET
43 41 42 44 DOCK_DP1_HPD 5 IN3 O3 6 DOCK_DP1_HPD
45 43 44 46 IN4 O4
[26] BLUE_DOCK
47 45 46 48
DAT_DDC2_DOCK [26]
CLK_DDC2_DOCK [26]
CRT I2C *RCLAMP0524P.TCT_NC
49 47 48 50
51 49 50 52 U2
53 51 52 54 SATA_PRX_DKTX_P5 C14 10nF 25V,X7R DOCK_DP2_TX0+_C 1 10 DOCK_DP2_TX0+_C
[26] RED_DOCK 53 54 SATA_PRX_DKTX_P5_C [8] IN1 O1
55 56 SATA_PRX_DKTX_N5 C12 10nF 25V,X7R SATA_PRX_DKTX_N5_C [8] DOCK_DP2_TX0-_C 2 9 DOCK_DP2_TX0-_C
57 55 56 58 3 IN2 O2 8
CRT RGB VS,HS 59 57 58 60 SATA_PTX_DKRX_P5 4 GND_1 GND_2 7
[26] GREEN_DOCK
61 59 60 62 SATA_PTX_DKRX_N5
C11
C13
10nF
10nF
25V,X7R
25V,X7R
SATA_PTX_DKRX_P5_C [8]
SATA_PTX_DKRX_N5_C [8]
SATA DOCK_DP2_TX1+_C
DOCK_DP2_TX1-_C 5 IN3 O3 6
DOCK_DP2_TX1+_C
DOCK_DP2_TX1-_C
63 61 62 64 IN4 O4
+3.3V_RUN 65 63 64 66 USBP8+_C *RCLAMP0524P.TCT_NC
[26,37] HSYNC_BUF 65 66
Change to HSYNC_DOCK to HSYNC_BUF
[26,37] VSYNC_BUF 67 68 USBP8-_C
69 67 68 70
VSYNC_DOCK to VSYNC_BUF
CLK_MSE 71 69 70 72 USBP9+_C USB*2 DOCK_DP2_TX2+_C 1
U4
10 DOCK_DP2_TX2+_C
[33] CLK_MSE 71 72 IN1 O1
[33] DAT_MSE DAT_MSE 73 74 USBP9-_C DOCK_DP2_TX2-_C 2 9 DOCK_DP2_TX2-_C
75 73 74 76 3 IN2 O2 8
DAI_BCLK#_C 77 75 76 78 CLK_KBD DOCK_DP2_TX3+_C 4 GND_1 GND_2 7 DOCK_DP2_TX3+_C
close to CONN 77 78 CLK_KBD [33] IN3 O3
DAI_LRCK#_C 79 80 DAT_KBD DAT_KBD [33] DOCK_DP2_TX3-_C 5 6 DOCK_DP2_TX3-_C
81 79 80 82 IN4 O4
81 82
1
[47] DAI_DI 83 84 *RCLAMP0524P.TCT_NC

DAI_DO#_C 85 83 84 86
87 85 86 88 U1
DAI_12MHZ_C 89 87 88 90 DOCK_DP2_AUX+ 1 10 DOCK_DP2_AUX+
91 89 90 92 DOCK_DP2_AUX- 2 IN1 O1 9 DOCK_DP2_AUX-
D2 D5 93 91 92 94 3 IN2 O2 8
93 94 GND_1 GND_2
3
*DA204UT106_NC *DA204UT106_NC 95 96 DOCK_DP2_CA_DET 4 7 DOCK_DP2_CA_DET

95 96 IN3 O3
1
[34] D_LAD0 97 98 BREATH_LED# [34,36,37] DOCK_DP2_HPD 5 6 DOCK_DP2_HPD

99 97 98 100 IN4 O4
[34] D_LAD1 99 100 DOCK_LOM_ACTLED_YEL# [43]
101 102 *RCLAMP0524P.TCT_NC
103 101 102 104
[34] D_LAD2 103 104 DOCK_LOM_TRD0+ [43]
[34] D_LAD3 105 106 DOCK_LOM_TRD0- [43]
D4 D3 107 105 106 108
C C
107 108
3
*DA204UT106_NC *DA204UT106_NC [34] D_LFRAME# 109 110 DOCK_LOM_TRD1+ [43] +LOM_VCT

111 109 110 112
[34] D_CLKRUN# 111 112 DOCK_LOM_TRD1- [43]
113 114
DAI_BCLK# 115 113 114 116
[47] DAI_BCLK# [34] D_SERIRQ 115 116
[34] D_DLDRQ1# 117 118
DAI_LRCK# 119 117 118 120 CLK_KBD DAT_KBD
[47] DAI_LRCK# 119 120
CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ [43]
[9] CLK_PCI_DOCK 121 122
[47] DAI_DO# DAI_DO# 123 124 DOCK_LOM_TRD2- [43] C7
125 123 124 126 1uF C9 C10
DAI_12MHZ# 127 125 126 128 6.3V,Y5V *10pF_NC *10pF_NC
[47] DAI_12MHZ# [33] DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ [43]
[33] DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- [43] 50V,NPO 50V,NPO
131 129 130 132
DAI_BCLK# R3 0 DAI_BCLK#_C 133 131 132 134
[33] DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ [51]
+/-5% [50] DOCK_PSID 135 136 DOCK_DCIN_IS- [51]
137 135 136 138
139 137 138 140
C24 [33] DOCK_PWR_BTN#
141 139 140 142 DOCK_DET_R#
DOCK_POR_RST# [33]
C A
Reserve for EMI
*12pF_NC DOCK_DET# [34,52]
50V,NPO 143 141 142 144
[34] SLICE_BAT_PRES# 143 144 D1 SD103AW
145 157
146 145 157 158 R741 *0_NC +/-5%
DAI_LRCK# R4 0 DAI_LRCK#_C 147 146 158 159
147 159
1020:Pop L31,L32 for EMI request
+/-5% 148 160 R742 *0_NC +/-5% +3.3V_ALW
+DOCK_PWR_BAR 149 148 160 161
C25 150 149 161 162
*12pF_NC 151 150 162 163 L31
50V,NPO 152 151 163 164 1 2 USBP8-_C R2
152 164 [9] USBP8-
153 *100K_NC
C28 C23 154 153 4 3 USBP8+_C
154 [9] USBP8+ +/-5%
DAI_DO# R5 0 DAI_DO#_C 0.1uF 0.1uF 155
+/-5% 25V,X7R 25V,X7R 156 155 90 Ohm,400mA
c0603h9 c0603h9 156 DOCK_DET#
SM24.TCT_SOT23-3~D
C26
*12pF_NC CONN-DOCKING
50V,NPO R743 *0_NC +/-5%
ESD3
R744 *0_NC +/-5% DOCK_POR_RST# 1 6
B
DAI_12MHZ# R6 0 DAI_12MHZ_C 2 1 6 5 B
2 5 +3.3V_ALW
+/-5% DOCK_DET# 3 4
L32 3 4
C27 1 2 USBP9-_C SRV05-4
[9] USBP9-
*12pF_NC
4 3 USBP9+_C
Reserve for EMI
50V,NPO
[9] USBP9+
Reserve for EMI
90 Ohm,400mA
Close to connector
CLK_PCI_DOCK DAT_MSE CLK_MSE
C22 C21
+3.3V_RUN +3.3V_RUN R7 *10pF_NC *10pF_NC
*33_NC 50V,NPO 50V,NPO
AUX/DDC SW for DP1 to E-DOCK +/-5%
R12
AUX/DDC SW for DP2 to E-DOCK C29
U12
100K R15 *12pF_NC
U13
+/-5% 100K 50V,NPO
7 8 DOCK_DP1_AUX- +/-5%
DOCK_DP1_AUX- 6 GND 3B 9 7 8 DOCK_DP2_AUX-
2B 3A DOCK_DP1_PCH_CTRLDATA [7] GND 3B
[7] DOCK_DP1_PCH_AUX- C49 0.1uF 10V,X5R DOCK_DP1_PCH_AUX-_C 5 10 DOCK_DP2_AUX- 6 9 DOCK_DP2_PCH_CTRLDATA [7]
4 2A 3OE 11 DOCK_DP1_AUX+ 0.1uF 10V,X5R DOCK_DP2_PCH_AUX-_C 5 2B 3A 10
DOCK_DP1_AUX+ 3 2OE 4B 12
[7] DOCK_DP2_PCH_AUX- C43
4 2A 3OE 11 DOCK_DP2_AUX+
Reserve for EMI
1B 4A DOCK_DP1_PCH_CTRLCLK [7] 2OE 4B
[7] DOCK_DP1_PCH_AUX+ C50 0.1uF 10V,X5R DOCK_DP1_PCH_AUX+_C 2 13 DOCK_DP2_AUX+ 3 12 DOCK_DP2_PCH_CTRLCLK [7]
1 1A 4OE 14 DOCK_DP1_CA_DET# C44 0.1uF 10V,X5R DOCK_DP2_PCH_AUX+_C 2 1B 4A 13
1OE Vcc [7] DOCK_DP2_PCH_AUX+ 1A 4OE
1 14 DOCK_DP2_CA_DET# DOCK_DP1_HPD DOCK_DP2_HPD
+3.3V_RUN 1OE Vcc
R13 R14 +3.3V_RUN
100K SN74CB3Q3125PWR 100K
+/-5% +5V_RUN +/-5% SN74CB3Q3125PWR R8 C39 R1 C3
+5V_RUN *110K_NC 33nF *110K_NC 33nF
C60 +/-5% 16V,X7R +/-5% 16V,X7R
A 0.1uF C51 A
C48 10V,X5R 0.1uF
0.1uF C47 10V,X5R
10V,X5R 0.1uF
U11 10V,X5R U9
5
DOCK_DP1_CA_DET 2 4 DOCK_DP1_CA_DET# DOCK_DP2_CA_DET 2 4 DOCK_DP2_CA_DET#

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R9 R10
1M 1M Title
+/-5% +/-5% 51 -- Docking Connector
Thunder 1A

5 4 3 2 1
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5 4 3 2 1
D D
+RTC_CELL +RTC_CELL
D11
Precision On
*DA204UT106_NC
2
R486
100K
+/-5%
RTC BATTERY
3
+RTC_CELL +3.3V_RTC_LDO
R488 *10K_NC +/-5%

[33] LAT_ON_SW#
D19
C A C339 C340 From Power Button board
RTC BATTERY CR2032 Wire Type *1uF_NC *1uF_NC
10V,X5R 10V,X5R
C SDMK0340L-7-F C491 C
2.2uF
10V,X5R RED (+)
BLACK (-)
BOM1
C A +RTC_1 R700 1K +RTC

+/-1% +RTC_CELL +RTC_CELL
D20 D10
C490 SDMK0340L-7-F *DA204UT106_NC
1uF
25V,X5R
G1
2
JRTC1
GND1 GND
1
1 2 R461
2 RTC_DET# [8]
3 100K
3 +/-5%
3
G2
Header_1X3 R466 10K +/-5% POWER_SW#

[33,39] POWER_SW_IN# POWER_SW# [37]
C331 C332 From Power Button board

1uF *1uF_NC
10V,X5R 10V,X5R
B B
A A
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Title
49 -- System Reset & RTC&UI
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
PC186
*0.47uF_NC +5V_ALW
10V,X5R
2
PR221
*0_NC
+/-5% PD15
*DA204UT106_NC
3
+DC_IN 30V,11A,18m@10V PQ15 +DC_IN_SS
CN1 AO4433L
D D
7 FB2 3 8
7 6 DCIN_CBL_DET# [34] 1 2 2 7
DB_PSID +DCIN_JACK +DC_IN
6 5 1 2 1 6
5 4 5
60 ohm,6A
S
4 3
D
FB16 PC23 PC22 PC11 PR25 PC12 PC16 PC176
3 2 60 ohm,6A 0.1uF 220nF PR40 10nF 10K 0.1uF 0.1uF 10uF
G
2 1 25V,X7R 25V,X7R 1M 25V,X7R +/-1% 25V,X7R 25V,X7R 25V,X5R
1
4
+DCIN_JACK +/-5% PR41
3
Header_1X7 PRV1
*VZ0603M260APT_NC PQ2
PC29 PC26 PC24 PC28 IMD2AT108 1M +/-5%
2.2nF 1nF 0.1uF 100pF PR42
50V,X7R 50V,X7R 25V,X7R 50V,X7R 22K
+/-5%
D
4
PR47
100K+/-5%
[52] NB_AC_OFF_BJT
PQ16 G
NB_AC_OFF [51,52]
PC1 2N7002W-7-F
100nF PC27
6.3V,X7R S 100nF
6.3V,X7R
consider use switch to

select different PSID +5V_ALW Check with Dell, no use?
[48] DOCK_PSID
C C
+3.3V_ALW
2
PR223
*0_NC
+/-5% PR59 PU3
2.2K 1 6 GPIO_PSID_SELECT [34]
PQ20 PR224 +/-5% NO IN
FDV301N 100 PD7 2 5
GND V+ +5V_ALW
3
+/-5% *DA204UT106_NC
DB_PSID D S 3 4
NC COM PS_ID [33]
C
TS5A63157DCKR
PC185 PD14 +5V_ALW
100pF *BAS316_NC PR51 G
50V,X7R 100K
A
+/-5% PR56
10K PR60
+/-1% *100_NC
+/-5%
PSID_DISABLE# [34]
3
B PQ19 PD8
MMST3904-7-F *DA204UT106_NC
PR53
E
15K
+/-5%
2
+5V_ALW
B B
+VCHGR
PC173
2.2nF
50V,X7R +3.3V_ALW
PC170
1
1nF
50V,X7R
PC171 PD4 PD3

100nF *DA204UT106_NC *DA204UT106_NC +3.3V_ALW
3
3
1
25V,X5R
PR2
10K
JBAT1 PD2 +/-1%
Adress : 16H 1 *DA204UT106_NC
BATT1+
3
2
BATT2+ 3 PR8 100 +/-1%
SMB_CLK PBAT_SMBCLK [33]
4 PR3 100 +/-1%
SMB_DAT PBAT_SMBDAT [33]
5
BATT_PRES# 6 PR1 100 +/-1%
SYSPRES# PBAT_PRES# [34]
7
BATT_ALBERT 8
BATT1- 9
BATT2-
PTH
PTH
A A
Battery conn
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Title
50 -- PW_DCin & Batt
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
PR31
1M
MOS P,AO4433L,30V,11A,18m@10V,G,SOIC-8,SMD 1207: Change footprint and wait for CIS released +/-1%
PQ49 +SDC_IN +PWR_SRC 8731_REF
AO4433L PR210 8731_REF +5V_ALW +3.3V_ALW
8 3 0.01 +/-1%
+DC_IN_SS +DC_IN_SS 7 2 2 1
6 1 +DC_IN_SS
5 PC19 PC18
3
10nF 100pF
D
PR208 50V,X7R 50V,X7R PR27 PR34
G
D D
PR207 100K PC17 8731_CSSN_P1 PR44 PR35 *100K_NC 100K
8731_CSSP_P1
4
10K +/-5% +/-5% 25V,Y5V 232K 59K +/-1% +/-1%
100nF +/-1% +/-1%
8
D
D 3 +
1 PR29 0 ACAV_IN_NB [33,34]
PQ17 PQ53 2 - +/-5%
G NTR4502PT1G
leakage A G +DC_IN PR36 PU1A C A leakage A
4
2N7002W-7-F 33K LM393DR2
S
PC279 +/-5% PC21 PD19
*1uF_NC S 100pF PR43 PR37 PC20 SDMK0340L-7-F
D 10V,X5R PR46 G PQ54 50V,X7R 20K 42.2K 100pF
160K NTR4502PT1G +/-1% +/-1% 50V,X7R
PQ52 +/-5%
S
G PR38
[50,52] NB_AC_OFF
2N7002W-7-F D 10K
D +/-5% S D
S DOCK_DCIN_IS+ [48]
PQ7
PQ18 NTR4502PT1G
8731_CSSN_P
G
8731_CSSP_P
PR212 PC180
[52] ACAV_DOCK_SRC
G
GND_CHG 33K 100nF G PQ6
PQ51 +/-5% 25V,Y5V 2N7002W-7-F S D +3.3V_ALW
DOCK_DCIN_IS- [48]
2N7002W-7-F S
S PR280 +5V_ALW
NTR4502PT1G 3.2V
1M
G
PR21 PR19 8731_REF +/-1% PR281
100K 100K PR20 10K
+5V_ALW
+/-5% +/-5% +/-5%
PR283
Same with E2 PR222 PR220
SW_GND [52]
PR282 100K
DYN_TURB_PWR_ALRT# [34]
0 0 10K +/-5% D
+/-5% +/-5% 100K +/-1%
+/-5%
8
PR284
5 + *1K_NC
7 G +/-5%
C OC_LEVEL 6 - C
PC34 PC31 PQ80
*100nF_NC *100nF_NC MAX8731_IINP PU1B S *2N7002W-7-F_NC
4
6.3V,X7R 6.3V,X7R PC252 LM393DR2 PC254
100pF PC253 *100pF_NC
+NBDOCK_DC_IN_SS +DC_IN_SS GND_CHG GND_CHG 50V,X7R 100pF 50V,X7R
PC32 PR285 PR286 50V,X7R H_PROCHOT# [2,33,56]
2
100nF 8.06K 4.64K PC255
6.3V,X7R PJP15 +/-1% +/-1% 10nF PC256
1
*POWER_JP 25V,X7R 10nF D

PD5 nc_1_short 25V,X7R
RB715FT106 D
1
+SDC_IN 8731_LDO
PQ81 G
Check
A
PR211 PQ85
8731_CSSN
8731_CSSP
3
PR214 *0_NC PD6 G *2N7002W-7-F_NC

[33] DYN_TUR_CURRNT_SET# S
200K +/-5% 8731_VCC *SDM10K45-7-F_NC 8731_VIN *2N7002W-7-F_NC
+/-5% PC182 AD OC_LEVEL OC Pout
C
8731_LDO PR54 100nF S
8731_DCIN
Set=16.7V 210K 25V,X5R PC184 PC178 PC177 PC169 PC168 H 65W 0.726V 3.63A 71W 0827: NC due to code is not ready
+/-1% 1uF 2.2nF 100nF 10uF 10uF
8731_REF PR55 49.9K +3.3V_ALW 50V,X7R 25V,X5R 25V,X5R 25V,X5R L 90W 1.0164V 5.08A 99W
28
27
10V,X5R
1
+/-1% PR218
33 GND_CHG PQ47
CSSN
CSSP
NC1
PR57 PC35 10nF 8731_ACIN 26 +/-1% AO4406AL

PR213 10K 25V,X7R 22 VCC
*15.8K_NC +/-5% 100nF PC30 DCIN 25 8731_BST PR219 2.2 8731_BSTP
BOOT
5
6
7
8
+/-1% 25V,X5R 2 +/-5%
ACIN
1207: Change footprint and wait for CIS released
[33,39] ACAV_IN PR216 0 GND_CHG 8731_ACOK 13 PC183 Max Charging current
+/-5% ACOK 21 8731_LDO PC181 100nF +VCHGR
11 VDDP 1uF 25V,X5R 4 IND,4.7uH@100KHz,+/-20%,7A,16mOhm,SHLD,G,SMD setting 5A
PR215 VDDSMB 10V,X5R TOKO 1164AY-H-4R7M=P3
*15.8K_NC PR49 0 +/-5% 8731_SCL 10 PC175 1207: Change footprint and wait for CIS released
[33] CHARGER_SMBCLK SCL PL1
1
2
3
+/-1% 24 8731_DHI *3.3nF_NC PR12
UGATE 4.7uH PJP1
PR50 0 +/-5% 8731_SDA 9 50V,X7R 0.01 +/-1%
[33] CHARGER_SMBDAT SDA 8731_LXP 1 2 2 1 +VCHGR_P 2 1
SMBUS Address 12 GND_CHG 14
B NC4 PR217 B
5
6
7
8
*POWER_JP
3
[39] MAX8731_IINP 8 23 8731_LX PC5 PC2 PC7
ICM PHASE PQ42 PR11 CHG_CS 2.2nF 100nF 10uF PR206 nc_1_short
8731_CCV 6 0 AO4406AL *2.2_NC 50V,X7R 25V,X5R 25V,X5R PR6 *1.8K_NC
VCOMP +/-5% 4 PC4 PC3 0 +/-1%
+/-5%
5 1nF 3.3nF PC10 PC9 +/-5%
NC2 20 8731_DLO PC167 PC6 PR13 50V,X7R 50V,X7R 10uF *10uF_NC
LGATE
1
2
3
8731_CCS 4 220pF *1nF_NC 10 25V,X5R 25V,X5R D
ICOMP PC25 50V,X7R 50V,X7R +/-1%
*220pF_NC PQ50
PC33 50V,X7R
10nF 8731_REF 3 G
25V,X7R VREF PC277 *2N7002W-7-F_NC
PR52 PR58 19 MOS N,AO4406AL,30V,12A,15.5m@4.5V,G,SOIC-8,SMD 100nF
*8.45K_NC 10K 7 PGND 25V,X5R ACAV_IN S
+/-1% +/-1% NC3 18 8731_CSIP
CSOP
17 8731_CSIN
12 CSON
GND1 15 PR45 100 8731_FB
29 VFB +/-5%
GND2 16
NC5
PC38 PC37 PC36
10nF 10nF 1uF
25V,X7R 25V,X7R 10V,X5R ISL88731CHRTZ-T
PU2
PR48 0
+/-5%
GND_CHG
A A
Ever Light
Technology Limited
Title
Charger (ISL88731C)
B3_14"_UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
MOS P,AO4433L,30V,11A,18m@10V,G,SOIC-8,SMD
PD1
+DOCK_PWR_BAR B340LA-13-F
A C
PQ44 +PWR_SRC
AO4433L
D D
8 3
7 2
6 1
5
S
D
PR14 PC8
G
SW_GND [51] 240K 470nF PR26
4
+3.3V_ALW2 PR7 +/-5% 25V,X5R 100K
100K D +/-5%
+/-5%
PQ5
EN_DOCK_PWR_BAR#
1
3
PR24 G PQ4
100K 2N7002W-7-F PR9 IMD2AT108
+/-5% 10K PR17
S
6
PQ9B +/-5% 47K
2 +/-5%
[48] ACAV_DOCK_SRC#
PR10
4
2N7002DW-7-F 22K D
1
+/-5%
PQ1
G
[34,48] DOCK_DET#
2N7002W-7-F
S
3
PQ9A
5
D
2N7002DW-7-F
4
PQ10
+3.3V_ALW G
[34] EN_DOCK_PWR_BAR
+5V_ALW 2N7002W-7-F
+3.3V_ALW
PR18 PR15 S
22K
PR16 100K +/-5%
C 22K +/-5% C
PR23 +/-5%
100K
NB_AC_OFF_BJT [50] NB_AC_OFF [50,51]
+/-5%
6
PQ8B PQ8A +VCHGR +PWR_SRC_VCHGR

NB_AC_OFF_CTRL 2 2N7002DW-7-F 5 2N7002DW-7-F
PQ45 PQ46 +PWR_SRC
AO4433L AO4433L
1
3 8 8 3
2 7 7 2
1 6 6 1
5 5 PC174 PC172
S
1
D
2.2nF 100nF
D
PQ43 PR201 50V,X7R 25V,Y5V
G
IMD2AT108 240K
4
+/-5%
4
PR202
47K +NBDOCK_DC_IN_SS
+3.3V_ALW2 +/-5%
+DC_IN_SS
PR22
PD12
100K 2
+/-5% 3 PBAT_G
1
ACAV_DOCK_SRC [51]
D
RB715FT106
PQ12 PD9 PR209
2 *1K_NC
G [34] PBATT_OFF 3
B DOCK_AC_OFF [48] +/-5% B
2N7002W-7-F 1
[34] DOCK_AC_OFF_Y PC179
S RB715FT106 *100nF_NC
PR121 25V,X5R
33K
+/-5%
PBATT_OFF Action
H Battery no use
PD13
PQ3
L Battery discharge +DOCK_PWR_BAR S D A C
SDM10K45-7-F
G
PR5 NTR4502PT1G
240K check footprint
+/-5% PR203
100K
+/-5%
PR4
47K
+/-5%
6
PR204 PQ48A PQ48B
EN_DOCK_PWR_BAR# *SHORT_NC 5 2
+/-5%
2N7002DW-7-F 2N7002DW-7-F
4
1
A A
*0_NC PR205
[51] ACAV_DOCK_SRC
+/-5%
Ever Light
Technology Limited
Title
52 -- PW_Dock_Selector(Dis)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
+5V_RUN
PR108
*SHORT_NC +/-5%
PR105 10 AO4406AL +PWR_SRC
+/-1%
+3.3V_RUN PC83
Current:13A
1uF RDS(ON):15.5m@4.5V
SA_VDD
PJP4
6.3V,X5R SO-8
PC81 8792_VIN 2 1
1uF
PR94 10V,X5R
10K PC77 PC75 PC74 *POWER_JP PC80
5
6
7
8
+/-5% PC76 100nF 10uF 10uF nc_1_short 100nF
9
PU5 PQ23 2.2nF 25V,X5R 25V,X5R 25V,X5R 25V,X5R
PR110 AO4406AL 50V,X7R
VDD
VDDP
SA_PHASE PR115 205K 16 13 SA_BOOT 2.2
+/-1% TON BOOT +/-5% 4
PR92 +/-5% SA_PGD 4 12 SA_UGATE PR106 8208A_DH Design Current: 4.2A
[33,34] VCCSA_PWRGD PGOOD UGATE 0
1
2
3
*SHORT_NC +1.05V_RUN 6 OCP:6.5A
D0 11 SA_PHASE PC86
5 PHASE 100nF IND,1.5uH@100KHz,+/-20%,8A,12.1mOhm,SHLD,G,SMD
PR112 D1 10 SA_CS 25V,X5R TOKO FDVE0630-H-1R5M=P3
C C
*100K_NC CS PL4 +0.85V_RUN
PJP5
+/-5% 7 8 SA_LGATE PR100 7.5K 1.5uH
0 G0 LGATE +/-1% 1 2 8792_VOUT 2 1
PR111 +/-5% 14 1
[4] VCCSA_CNTRL1 G1 VOUT PR97
VIA1
VIA2
VIA3
VIA4
VIA5
0 *POWER_JP
PAD
4
PR114 +/-5% 8208A_EN 15 3 SA_FB 0
[33,57] 1.05V_VTT_PWRGD EN/DEM FB
5
6
7
8
PR91 PR95 nc_1_short PC73
*2.2_NC PC200 PC78 10 100nF
8208A_DL
17
18
19
20
21
22
PR113 RT8208BGQW +/-5% 10uF 330uF +/-5% 6.3V,X7R
*10K_NC 10V,X5R 2V,+/-20%
+/-1% 4
PQ59
PC199 AO4406AL PC79
1
2
3
*3.3nF_NC *1.5nF_NC PR99
50V,X7R 50V,X7R 10K
+/-1%
PR96 PR101
SA_OUT 75K 150K
+/-1% +/-1%
PR98
VCCSA_SENSE [4]
*SHORT_NC
+/-5%
VCCSA_CNTRL1 VOUT(SPEC) PR93
VCCSA_GND [4]
0 0.90V
B *SHORT_NC B
1 0.80V +/-5%
A A
Ever Light
Technology Limited
Title
53 -- PW_+0.85V(MAX8792)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
PR160
10K +/-5%
For RT8015D
7153_VDD
For APW7153AQBI
PR255
330K
+/-5%
D PQ30
D 2N7002W-7-F
PQ68
*2N7002W-7-F_NC
G
C RUN_ON [34,37,60] C
G
[34,60] RUN_ON#
PR165
PR254 S 0 +/-5%
*0_NC
+/-5% S
PU11 Design Current: 1.1A

PR256 RT8015DGQW
PC218 1nF 10K +/-1% IND,2.2uH@100KHz,+/-20%,3A,58mOhm,SHLD,G,SMD OCP:2.94A ~ 3.54A
+5V_ALW 7153_COMP 10 1 7153_EN CYNTEC PCMB042T-2R2MS
25V,NPO COMP EN/RT
Iripple: 0.52A
7153_FB 9 2
FB GND PJP16
GND
PL9 2.2uH
7153_POK 8 3 7153_LX 1 2 P1.8V 2 1
PJP17
PR259 10 POK BOTTOM
SIDE
LX nc_1_short +1.8V_RUN
*
2 1 7153_VDD 7 PAD 4
nc_1_short +/-1% VDD LX#4 *POWER_JP
PC216 PC221 7153_PVDD 6 5 PR253
PC227*POWER_JP 22uF 0.1uF PVDD PGND
*SHORT_NC
VIA5
VIA4
VIA3
VIA2
VIA1
PAD
100nF 6.3V,X5R 16V,X7R PR149 +/-5%
6.3V,X7R PC223 *2.2_NC PC209 PC210 PC211 PC206
+3.3V_RUN 1uF +/-5% *22uF_NC 22uF 0.1uF 100nF
16
15
14
13
12
11
25V,X5R 6.3V,X5R 6.3V,X5R 16V,X7R 50V,NPO 6.3V,X7R
47pF
B B
PC130 PC222
PR262 *1.5nF_NC PR261
10K 50V,X7R 301K
+/-5% +/-1%
[34] 1.8V_RUN_PWRGD
PR263
*SHORT_NC
+/-5%
PR260
240K
+/-1%
A
Ever Light A
Technology Limited
Title
54 -- PW_SW_+1.8V(APW7153QBI)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
+5V_ALW
PR156
PR163 *SHORT_NC
0 +/-5%
+/-5%
P1.5V_EN PC138
[33] DDR_ON
PC142 Fsw:350KHz
1uF
6.3V,X5R
+PWR_SRC
*100nF_NC
PJP12
25V,X5R
P1.5V_VIN1 2 1
P1V5_BT_20 Design Current: 13.8A

PC129 PC124 PC134 PC136 *POWER_JP
2.2nF 100nF 10uF 10uF nc_1_short OCP:21.2A
5
PR161 PR162 50V,X7R 25V,X5R 25V,X5R 25V,X5R
210K 0
+/-1% PQ29 PQ28
15
14
+/-5%
1
PC140 4
AON6414AL
4
AON6414AL +1.5V_MEM
BOOT
NC
EN/DEM
+3.3V_ALW 100nF
PR159 25V,X5R IND,560nH@100KHz,+/-20%,29.5A,1.498mOhm,SHLD,G,SMD
1
2
3
1
2
3
10 TOKO FDU1040D-H-R56M=P3
PJP19
PR154 2 13 P_1.5V_DH1_40 PL10 560nH
+/-5% TON UGATE
PR153 100K 3
VOUT PHASE
12 P_1.5V_LX1_40 1 2 P1V5 2 1
*SHORT_NC +/-5% 4 11 P15V_ILIM nc_1_short
VDD CS
5
C +/-5% 5 10 PR257 *POWER_JP C
FB VDDP
4
6 9 P_1.5V_DL1_40 *2.2_NC
[33] 1.5V_SUS_PWRGD PGOOD LGATE PJP18
PQ69 +/-5%
PC139 AON6718L I ripple=4A PC229 PC232 PC231 2 1
PGND
1uF PU8 PR158 4 4 PQ70 10uF 330uF 330uF nc_1_short
GND
6.3V,X5R RT8209BGQW 4.53K AON6718L 6.3V,X5R 2V,+/-20% 2V,+/-20% *POWER_JP
+/-1% PC214
1
2
3
1
2
3
PC213 *1.5nF_NC
8
6.8nF 50V,X7R PC230
25V,X7R 100nF
P1.5V_FB 6.3V,X7R
PR270
PC137 +/-5%
*47pF_NC P/N:EEFSX0D331ER *SHORT_NC
50V,NPO
PR157
7.3*4.3*1.9
PR155 PC141
12K 12K +/-1% 1uF
+/-1% 6.3V,X5R
B B
+5V_ALW
+0.75V_DDR_VTT
+1.5V_MEM PR177
*SHORT_NC
PU10 +/-5%
PR187 0 +/-5% 1 10
r1206h7 2 VDDQSNS VIN 9 PR164 0
VLDOIN S5 DDR_ON [33]
PR188 0 +/-5% 3 8 +/-5%
PC158 r1206h7 4 VTT GND 7 PC145
1nF 5 PGND S3 6 10uF
VTTSNS VTTREF
EPAD
50V,X7R 6.3V,X5R
VIA1
VIA2
VIA3
VIA4
PC152 +V_DDR_REF
10uF PC148
6.3V,X5R APL5338XAI-TRG 100nF
11
12
13
14
15
6.3V,X7R
PR184 0
+/-5%
PC154
10uF
6.3V,X5R
PR178 0
0.75V_DDR_VTT_ON [34,60]
A +/-5% A
PC146
*100nF_NC
6.3V,X7R Ever Light
Technology Limited
Title
55 -- PW_DDR(RT8209B/APL5338AI)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+1.05V_RUN
FDMS7692
17411_VCC PR235 17411_VDD +5V_RUN Current:19A
PR249 PR84 PR248 10+/-5% RDS(ON):6.9m@4.5V
54.9 130 75 PR80 MLP-5 X 6
*SHORT_NC
+/-1% +/-1% +/-1%
PC190 PC65 *SHORT_NC
+/-5%
Change back to 620108L00-015-G PJP2 +PWR_SRC
PR86 +/-5% 1uF 2.2uF P_VCORE_VIN1_SHAPE 2 1
IMVP7 CPU/GPU VCORE REGULATOR

[4] VIDALERT#
*SHORT_NC 10V,X5R 10V,X5R
PR90 +/-5%
[4] VIDSOUT *POWER_JP
5
*SHORT_NC PC40 PC39 PC42 PC43 PC41 PC46 PC48 PC188 PC220
PR87 +/-5% 17411_AGND 2.2nF 100nF 10uF 10uF 10uF 1uF 1uF 68uF nc_1_short *47uF_NC
[4] VIDCLK
PQ21 50V,X7R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,+/-20% 25V,+/-20%
46
29
PU4 FDMS7692
17411_ALERT# 22 27 17411_DHA1 4
VDDA
VCC
P_VCORE_VIN1_SHAPE 17411_VDIO 21 ALERT# DHA1 PR85
VID0 FDMS0310S
+3.3V_RUN 17411_CLK 23 25 17411_BSTA1 +/-5% PL2
CLK BSTA1 Current:19A
1
2
3
0 PC70 360nH
D PR234 200K+/-1% 17411_TONA 48 220nF RDS(ON):5.15m@4.5V +/-20%,25A,845.3uOhm D
PR236 200K+/-1% 17411_TONB 1 TONA 25V,X7R FDUE1040D-H-R36M=P3
TONB MLP-5 X 6
26 17411_LXA1 17411_LXA1 1 2 P_VCORE_VOUT_SHAPE1
LXA1
5
17411_POKA 24 PR226
17411_THERMA PR89 PR228 POKA PQ55 PQ56 2.2
4
10K *100K_NC FDMS0310S FDMS0310S +/-5%
17411_THERMB +/-5% +/-1% 17411_POKB 12 PC98 PC60 PC102
POKB 28 17411_DLA1 4 4 100nF
DLA1 470uF 470uF
PC275 PC276 PR250 *SHORT_NC PC191 25V,X5R 2V,+/-20% 2V,+/-20%
*1nF_NC *1nF_NC +/-5% 47 PC187 1.5nF 17411_LXA1S PR78
EN
1
2
3
1
2
3
PR88 *SHORT_NC 30 1nF 50V,X7R 1 +/-1%
50V,X7R 50V,X7R [34] IMVP_PWRGD PGNDA
+/-5% 50V,X7R
PR229 0 PR68
[34] IMVP_VR_ON
+/-5% 2.43K
17411_IMAXA 35 +/-1%
PR65 *0_NC 17411_VCC IMAXA
[6,33] 1.05V_0.8V_PWROK
+/-5% PR233 PR239 PR71 PR231 PR230 17411_IMAXB 36 42 17411_CSPA1 PR75 12.1K +/-1%
17411_AGND 1K 205K 137K 5.62K 5.62K IMAXB CSPA1
+/-1% +/-1% +/-1% +/-1% +/-1% PC249 PC53 Near IC PC56
17411_THERMA 39 1nF 1nF PC52 1nF PC56 Near inducto
THERMA 50V,X7R 50V,X7R 220nF 50V,X7R
17411_THERMB40 25V,X7R
THERMB 17411_AGND
+PWR_SRC PR232 *0_NC
38
SR CSNA1
43 17411_CSNA
PJP3 +PWR_SRC
PJP10
+/-5% 17411_CSPBAVE 8
CSPBAVE
+1.05V_RUN P_VCORE_VIN2_SHAPE 2 1
0823: Change Value PR238
2 1 P_GFX_VIN1_SHAPE 17411_AGND PR237 PR67 PR225 PR251 17411_VDD
VRHOT#
4 *75_NC +/-1%
*POWER_JP
5
143K 82K 100K 100K 19 PC55 PC59 PC68 PC66 PC67 PC45 PC44 PC189
VDDB H_PROCHOT# [2,33,51] nc_1_short
FDMS7692 +/-1% +/-1% +/-1% +/-1% 2.2nF 100nF 10uF 10uF 10uF 1uF 1uF 68uF Design Current: 36A
Design Current:23.1A *POWER_JP PC118 PC119 PC115 PC114 PC113 PC116 PC117 PC193 43pF PQ22 50V,X7R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,+/-20%
nc_1_short Current:19A OCP:60A
5
OCP:35.5A 2.2nF 100nF 10uF 10uF 10uF 1uF 1uF PC197 50V,NPO 17411_AGND FDMS7692
50V,X7R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R RDS(ON):6.9m@4.5V beta=4250K 0.1uF 16 32 17411_DHA2 4
25V,X7R DHB DHA2
MLP-5 X 6
+VCC_GFXCORE PQ26 c0603h9 Please do the same for the other Core phases: PL1004 and PL1201 +VCC_CORE
1
2
3
FDMS7692 4 17411_AGND 17411_DHB1 PR76 FDMS7692 FDMS0310S
FDMS0310S PR246 2 17411_BSTB1 14 34 17411_BSTA2 +/-5% +/-20%,25A,845.3uOhm
+/-20%,25A,845.3uOhm +/-1% BSTB BSTA2 0 Current:19A Current:19A PL3
Current:19A
3
2
1
PL7 PC198 PC61 RDS(ON):6.9m@4.5V RDS(ON):5.15m@4.5V 360nH
360nH RDS(ON):5.15m@4.5V 220nF 220nF MLP-5 X 6 MLP-5 X 6
FDUE1040D-H-R36M=P3 MLP-5 X 6 25V,X7R 25V,X7R FDUE1040D-H-R36M=P3
2 1 17411_LXB1 15 33 17411_LXA2 1 2
LXB LXA2
4
4
5
5
PR120 PQ65 PQ63 PR63
C C
2.2 FDMS0310S FDMS0310S 17411_DLB1 18 31 17411_DLA2 PQ57 PQ58 2.2 PC97 PC103 PC63
+/-5% DLB DLA2 FDMS0310S FDMS0310S +/-5% 100nF 470uF 470uF
17411_CSPB1 9 25V,X5R 2V,+/-20% 2V,+/-20%
PC212 PC204 PR130 PR129 4 4 CSPB1 PC192 4 4
330uF 100nF 1 17411_LXB1S PC99 1nF PC49 PR77 1
25V,X5R +/-1% 1.5nF PC250 50V,X7R 1.5nF 17411_LXA2S
3
2
1
3
2
1
1
2
3
1
2
3
*2.43K_NC 50V,X7R 1nF 50V,X7R +/-1%
+/-1% PC72 50V,X7R 10
CSNB PR66
1nF
50V,X7R 17411_CSNB 2.43K
EEFSX0D331XE PR123 +/-1%
Cap: 330uF/2V 17411_AGND 44 17411_CSPA2 PR72 12.1K +/-1%
ESR: 6m *12.1K_NC PC107 PC64 CSPA2 PC251
Ripple Current: 3000mA +/-1% PC1048 Near inductor *1nF_NC *220nF_NC PC69 1nF PC51 PC54
50V,X7R 25V,X7R 0.1uF 50V,X7R 220nF 1nF
Package:7.3 X 4.3 X 1.9 16V,X7R 25V,X7R 50V,X7R
17411_AGND
17411_CSNA
6 3 17411_FBA
PR240 FBB FBA PR79
PR82 *SHORT_NC
PR243 *SHORT_NC 17411_FBB PR81 10 +/-1% VCCSENSE_FB
[4] VAXG_SENSE VCCSENSE [4]
+/-5%
PR242 PC194 7.68K PR104 +/-5%
PR148 10 *1nF_NC +/-1% 7 2 17411_GNDSA 8.06K PC57 10 +/-5%
+VCC_GFXCORE +/-1% 50V,X7R 17411_GNDSB GNDSB GNDSA +/-1% 4.7nF +VCC_CORE
50V,X7R
10+/-5% PC196 PC58
17411_AGND 0.1uF 0.22uF PR64
PR244 *SHORT_NC17411_VSSAXG_SENSE PR245 16V,X7R 10V,X7R 17411_AGND *SHORT_NC +/-5%
[4] VSSAXG_SENSE
+/-5% 10+/-5% PR70 10 +/-1% VSSSENSE_FB
VSSSENSE [4]
17411_AGND 17411_AGND
PC278 *470pF_NC PR102
PS:NC 17411_VDD
50V,X7R
PR147 17411_VDD 17411_DRVPWMB13 41 17411_CSPAAVE
10+/-5%
+PWR_SRC
+PWR_SRC PJP11 1028: Add for ESdD solution 10 DRVPWMB CSPAAVE PS:NC PJP6
*POWER_JP +/-5% *POWER_JP
nc_1 11 37 17411_DRVPWMA nc_1
2 1 P_GFX_VIN2_SHAPE CSPB2 DRVPWMA P_VCORE_VIN3_SHAPE 2 1
FDMS7692 PC82
PC215 17 45 *1uF_NC
Current:19A PGNDB CSPA3
5
5
PC219 PC128 PC127 PC132 PC131 PC133 PC126 *1uF_NC 50 25V,X5R PC92 PC93 PC89 PC88 PC94 PC90 PC91
*68uF_NC *10uF_NC PC125 RDS(ON):6.9m@4.5V 51 VIA1 *2.2nF_NC *100nF_NC *10uF_NC *10uF_NC *10uF_NC *1uF_NC *1uF_NC
*2.2nF_NC *100nF_NC *10uF_NC *10uF_NC *1uF_NC 25V,X5R VIA2
25V,+/-20% 25V,X5R *1uF_NC MLP-5 X 6 52 50V,X7R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R 25V,X5R
50V,X7R 25V,X5R 25V,X5R 25V,X5R 25V,X5R PU12 VIA3
5
5
B 25V,X5R PQ27 53 B
AGND2
AGND1
*FDMS7692_NC 4 17411_DHB2 8 54 VIA4 8 17411_DHA3 4 PQ24
VDD
VDD
DH VIA5 DH
PAD
PR258 +/-5% 1 1 17411_BSTA3 PR109 *FDMS7692_NC
*0_NC BST 2 2 BST *0_NC
EEFSX0D331XE PWM PWM Please do the same for the other Core phases: PL1004 and PL1201
3
2
1
1
2
3
17411_LXB2 7 7 17411_LXA3 +/-5%
Cap: 330uF/2V LX MAX17411GTM+ LX
20
49
5
FDMS0310S
ESR: 6m +/-20%,25A,845.3uOhm PC217 17411_DLB2 4 6 6 4 +/-20%,25A,845.3uOhm
PL8 Current:19A 3 DL SKIP SKIP DL 3 PC85 PL5
Ripple Current: 3000mA *220nF_NC GND GND
*360nH_NC RDS(ON):5.15m@4.5V *220nF_NC *360nH_NC
Package:7.3 X 4.3 X 1.9 25V,X7R
VIA4
VIA3
VIA2
VIA1
VIA1
VIA2
VIA3
VIA4
PAD
PAD
FDUE1040D-H-R36M=P3 MLP-5 X 6 25V,X7R FDUE1040D-H-R36M=P3
2 1 1 2
PR83 0 17411_AGND
13
12
11
10
9
9
10
11
12
13
5
*MAX17491GTA+T_NC +/-5% PU6 PQ61 PQ60 PR107

4
4
5
5
PR144 PQ66 *MAX17491GTA+T_NC *FDMS0310S_NC *FDMS0310S_NC
*2.2_NC *FDMS0310S_NC 17411_DLA4 *2.2_NC PC62 PC96
+/-5% PQ67 +/-5% *100nF_NC *470uF_NC
PC207 PC106 *FDMS0310S_NC 4 4 17411_AGND 25V,X5R 2V,+/-20%
PR150
330uF 100nF PR151 PC201 4 4
25V,X5R *1_NC 17411_LXB2S PC123 17411_VCC *1nF_NC PC87 PR119
17411_VCC
3
2
1
3
2
1
+/-1% *1.5nF_NC 50V,X7R *1.5nF_NC 17411_LXA3S *1_NC
1
2
3
1
2
3
50V,X7R PC224 50V,X7R +/-1%
*2.43K_NC
*1nF_NC EEFLX0D471R4
+/-1% PR117
50V,X7R
PR247 PR227 *2.21K_NC Cap: 470uF/2V
1K 1K +/-1% ESR: 4.5m
PR152 17411_CSPB2 +/-5% +/-5% Ripple Current: 3800mA
*12.1K_NC +/-1% 17411_CSPA3 PR116
PC135 PC71 *11K_NC +/-1%
Package:7.3 X 4.3 X 1.9
*1nF_NC *220nF_NC PC50 PC95
50V,X7R PR317 25V,X7R *220nF_NC *1nF_NC
PC1229 Near inductor *0_NC +/-5% 25V,X7R 50V,X7R
17411_CSNB
17411_CSNA PR318 *0_NC
+/-5%
PC273
50V,X7R
*1nF_NC PC274
50V,X7R
*1nF_NC 17411_CSPAAVE
17411_CSPBAVE
PC195 PR69
0.22uF PR241 PR136 17411_CSNA PC47 0.33uF PR61 4.32K 17411_LXA1S
17411_CSNB 10V,X7R 1 +/-1% 2.1K 17411_LXB1S 10V,X7R 1 +/-1% +/-1%
A A
+/-1%
PR73 PR62
PR134 34.8K 4.32K 17411_LXA2S
34.8K +/-1% +/-1% +/-1%
17411_CSPBAVE PR321 0 +/-5% 17411_CSPB1 PR146 PR320
PR135 PR319 *4.32K_NC PRT1 PR74 *0_NC +/-5% PR118
PRT2 10K +/-1% 3.01K +/-1% *0_NC +/-5% +/-1% 3.01K *6.49K_NC 17411_LXA3S
*
17411_LXB2S +/-1% +/-1%

*
10K +/-1%
T
C547
Thermistor,NTC,10KOhm,+/-1%,3435K,SMD0402,G
Thermistor,NTC,10KOhm,+/-1%,3435K,SMD0402,G 100pF50V,X7R Ever Light
17411_AGND
Technology Limited
Title
56 -- PW_CPU Vcore(MAX17411GTM)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
PD10
*SD103AW_NC
D D
C A
+5V_ALW
PR143
PVTT_EN
[34] CPU_VTT_ON
PC122
+PWR_SRC
1K
A
*100nF_NC PJP9
+/-5% 25V,X5R PD11 *POWER_JP
SD103AW P1.05V_VTT_VIN1 1 2
nc_1_short
C
PR142 PC104 PC105 PC101 PC100
2 +/-1% 2.2nF 100nF 10uF 10uF
5
50V,X7R 25V,X5R 25V,X5R 25V,X5R
PR140
L_SENSE_A 6.19K +/-1%
PQ25 Design Current: 9.9A
PC120 4 AON6414AL
100nF OCP:15.2A
14
1
25V,X5R
1
2
3
L_SENSE_B
BST
EN_SKIP
I ripple=3.83A
If DCR is big 5217_CS+
IND,1uH@100KHz,+/-20%,16A,2.51mOhm,SHLD,G,SMD
+1.05V_RUN
Probably need 2 13 5217_DH TOKO FDUE1040D-H-1R0M=P3
PR139 PC121 CS+ DH
R4 11K 100nF PL6 1uH PJP7
+/-1% 6.3V,X7R PU7 *POWER_JP
PC112 3
CS-/Vo SWN
12 5217_SWN 1 2 P1.05V 1 2
22pF NCP5217AMNTXG nc_1_short
5
50V,NPO PR137 PR252
4
PR138 11K +/-1% *2.2_NC PC84 PC203 PC202 PJP8
PC111 56.2K 5217_COMP 4 11 PQ62 PQ64 +/-5% 10uF 330uF 330uF *POWER_JP
470pF +/-1% COMP IDRP/OCP AON6718L *AON6718L_NC 10V,X5R 2V,+/-20% 2V,+/-20% 1 2
50V,X7R PC110 2.2uF 4 4 nc_1_short
C 10V,X5R C
5217_FB 5 10 +5V_ALW PC208
FB VCC
1
2
3
1
2
3
*1.5nF_NC PC205
PR132 4.7+/-5% PC108 50V,X7R 100nF
2.2nF 7.3*4.3*1.9 6.3V,X7R
PC109 6 9 5217_DL 50V,X7R
1.2nF PGOOD DL/TRESET
50V,X7R PR131 PR122 L_SENSE_A PR103
AGND
PGND
c0402h6 2.4K 7.68K 10
PAD
+/-0.5% +/-0.5% VIA L_SENSE_B +/-5%

PR128
75K
7
15
16
8
PR133 +/-1%
390
+/-1% +5V_RUN +3.3V_ALW
PR145
PR124 +/-5% *SHORT_NC
PR126 PR125 *100K_NC
VCCIO_SENSE [4]
*SHORT_NC 10K +/-5%
+/-5% +/-5%
[33,53] 1.05V_VTT_PWRGD
PR127 PR141
20K +/-5% *SHORT_NC
+/-5% VSSIO_SENSE [4]
1008:1.05V_VTT_PWRGD level is 5V.
B B
A A
Ever Light
Technology Limited
Title
57 -- PW_1.05V(RT8209B)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
C C
B B
Ever Light
A Technology Limited A
Title
58 -- PW_Blank for Ext.GPU
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW2 +3.3V_RTC_LDO
D D
P5V/FSW=300KHz
TPS51125A_VREF P3V/FSW=375KHz PR287 PR288
0 0
+3.3V_ALW2 +/-5% +/-5%
PR289
*SHORT_NC PR290
+/-5% *SHORT_NC +/-5% P3V_LDO
PR291 TPS51125A_VREF PC258

PC257
*0_NC +/-5% 10uF
10V,X5R
PR292
1uF *0_NC +/-5%
10V,X5R
GND_SYS PR294
P5V_VOUT PR293 33K +/-1% +5V_FB 6.49K
+/-1%
PC259 PC260 GND_SYS +3.3V_FB P3V_VOUT
PR295 *18pF_NC *18pF_NC PC261
+3.3V_ALW *0_NC +/-5% 50V,NPO 50V,NPO PC262 *18pF_NC PR296
*18pF_NC 50V,NPO +/-5% *0_NC
50V,NPO
PR298
PR297 21.5K P5V_ILIM
100K +/-1% P3.3V_ILIM PR301 PJP22
+/-5% PR299 10K *POWER_JP
[33] ALW_PWRGD_3V_5V 51K +/-1% PR300 +/-1% P3V_VIN 1 2
PJP23 64.9K +PWR_SRC
nc_1_short
*POWER_JP PR302 GND_SYS +/-1%
P5V_VIN
6
1 2 0 GND_SYS PC238 PC240 PC242 PC241
+PWR_SRC nc_1_short +/-5% 29 32 GND_SYS GND_SYS 2.2nF 100nF 10uF 10uF
VREF
ENTRIP1
VFB1
TONSEL
VFB2
ENTRIP2
PC245 PC244 PC164 PC165 30 VIA4 VIA7 33 50V,X7R 25V,X5R 25V,X5R 25V,X5R
10uF 10uF 100nF 2.2nF 31 VIA5 VIA8 34
PR278 25V,X5R 25V,X5R 25V,X5R 50V,X7R VIA6 VIA9
C C
Design Current: 6.9A GND_SYS 24 7 GND_SYS Design Current: 8.0A
*SHORT_NC VO1 VO2 PC264 PR279
OCP:10.6A OCP:12.3A
5
P_3V5V_PG_10 23 8 P3V_LDO 0.1uF *SHORT_NC
+/-5% PC263 PGOOD VREG3 PR304 25V,X7R +/-5%
PR303 22 9 P3V_BST_20 PQ77 PJP20
PJP14 PQ78 VBST1 VBST2 AON6414AL *POWER_JP
*POWER_JP AON6414AL 4 0.1uF 25V,X7R 3.3 +/-1%P5VDH_40 21 10 P3VDH_40 3.3 +/-1% 4 1 2
1 2 DRVH1 DRVH2 nc_1_short
nc_1_short IND,2.2uH@100KHz,+/-20%,11.4A,6.8mOhm,SHLD,G,SMD P5V_LX_40 20 11 P3V_LX_40 IND,2.2uH@100KHz,+/-20%,11.4A,6.8mOhm,SHLD,G,SMD
LL1 LL2
3
2
1
1
2
3
PJP13 TOKO FDVE1040-H-2R2M=P3 l4439h40_p4 TOKO FDVE1040-H-2R2M=P3 l4439h40_p4 PJP21
*POWER_JP PL12 2.2uH P5V_DL_40 19 12 P3VDL_40 PL11 2.2uH *POWER_JP +3.3V_ALW
P5V DRVL1 DRVL2 P3V
+5V_ALW 1 2 1 2 1 2 1 2
SKIPSEL
nc_1_short 26 nc_1_short
VREG5
VIA1
5
27
VCLK
GND
VIA2
3
4
EN0
5
28 25
VIN
VIA3 GPAD PQ75 PR198
PR277 PQ76 AON6718L *2.2_NC
18
17
16
15
14
13
PC236 PC166 PC248 *2.2_NC AON6718L GND_SYS TPS51125ARGER 4 +/-5%
100nF 220uF +/-5% 4 PU9 GND_SYS PR306
6.3V,X7R *220uF_NC P3V_VIN PC243
1
2
3
P5V_LDO
PC237 *2.2nF_NC P_3VSUS_SNB_20
VCLK
3
2
1
P_5VSUS_SNB_20 *2.2nF_NC *620K_NC 50V,X7R

50V,X7R PR305 +/-5%
PC235 *620K_NC PC162
*1.5nF_NC +/-5% *1.5nF_NC
50V,X7R PR307 0 50V,X7R PC246 PC239 PC247
+/-5% 100nF
GND_SYS 220uF 6.3V,X7R *220uF_NC
SPET CAP,220uF,+/-20%,6.3V,85C,G,SMD2816,ESR<=15mOhm PR308 +3.3V_ALW2
*SHORT_NC +/-5%
GND_SYS
PC265 PR309 TPS51125A_VREF SPET CAP,220uF,+/-20%,6.3V,85C,G,SMD2816,ESR<=15mOhm

10uF *0_NC +/-5%
10V,X5R
PR310
B
*0_NC +/-5% +3.3V_ALW2 B
P5V P3.3V_ILIM
PC266
100nF D PR311
+PWR_SRC
1
25V,X5R PD16 10K

BAT54S 3 +/-5%
PC267 PR312 G
2
100nF *SHORT_NC
25V,X5R PD17 +/-5% PQ82
PC268 PC270 S 2N7002W-7-F
*BAT54C_NC
1
100nF 1nF P_5V3V_VIN_10

25V,X5R PD18 3 50V,X7R
BAT54S PC271
1
PC269 100nF P5V_ILIM

2
100nF 25V,X5R
+15V_ALW 25V,X5R D
PR313 G
*SHORT_NC
+/-5% PC272 PQ83 D
1uF S 2N7002W-7-F
25V,X5R
G EN_3.3V_5V +/-1% 1K PR314

ALWON [33]
PQ84 PR315
S THERM_STP# [39]
2N7002W-7-F
PR316 *SHORT_NC +/-5%
200K
+/-5%
A A
Ever Light
Technology Limited
Title
59 -- PW_SYSTEM(TPS51125A)
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+5V_ALW: 5.74A +5V_RUN: 2.894A

+3.3V_ALW: 7.084A +3.3V_SUS: 0.1992A
+5V_ALW +5V_RUN
+3.3V_ALW +3.3V_SUS
+15V_ALW PQ39 +15V_ALW
AO4430 PQ37
8 3 P5002CMG
7 2 PR193
PR196 6 1 100K D S
100K 5 +/-5%
+3.3V_ALW2 +/-5% +3.3V_ALW2 PC161
PC163 0.1uF
4
0.1uF SUS_3.3V_ENABLE G 16V,X7R
PR200 RUN_ENABLE_5V 16V,X7R
100K PR195
+/-5% 100K PR192 PC159
PC160 +/-5% 100K 4.7nF
D D
6
PQ40B 4.7nF PQ36B +/-5% 50V,X7R
RUN_ON# 2 50V,X7R SUS_ON_3.3V# 2
[34,54] RUN_ON#
2N7002DW-7-F 2N7002DW-7-F
1
3
PQ40A
5
[34,37,54] RUN_ON
3
+3.3V_ALW: 7.084A +3.3V_RUN: 5.39A PQ36A
2N7002DW-7-F 5
[33] SUS_ON
4
+3.3V_ALW +3.3V_RUN 2N7002DW-7-F +3.3V_SUS: 0.1992A
4
+15V_ALW
PQ34 +3.3V_ALW PQ11 +3.3V_ALW_PCH +3.3V_ALW
AO4430 +15V_ALW P5002CMG
8 3
PR166 7 2 D S PR32 *0_NC
100K 6 1 PR28 +/-5%
+/-5% 5 100K
PC144 +/-5% Change to 0603 size
0.1uF +3.3V_ALW2 G PC14
4
16V,X7R 0.1uF
RUN_ENABLE_3.3V PCH_ALW_ENABLE 16V,X7R
D
PR30
PC143 100K PR33 PC15
4.7nF +/-5% 330K 4.7nF
6
RUN_ON# G PQ32 50V,X7R PQ14B +/-5% 50V,X7R
2N7002W-7-F PCH_ALW_ON# 2
S 2N7002DW-7-F
1
+5V_ALW PQ13 +5V_ALW_PCH +5V_ALW
3
PQ14A 2N7002W-7-F
5
[33] PCH_ALW_ON
+1.5V_SUS: 18A +1.5V_RUN: 9.265A D S PR39 *0_NC
C 2N7002DW-7-F +/-5% C
4
+1.5V_MEM +1.5V_RUN PC13
0.1uF Change to 0603 size
PQ73 G 16V,X7R
+15V_ALW AON6718L
3
+3.3V_ALW2 2
PR264 5 1
100K
PR266 +/-5% PC228
100K 0.1uF
4
+/-5% 16V,X7R
3
PC226
RUN_ON_CPU1.5VS3# 5 4.7nF
50V,X7R
6
PQ72A
4
[34,37,54] RUN_ON PR269 *0_NC 2 2N7002DW-7-F

+/-5% +V_DDR_REF
PQ72B SM_VREF_RES PR265 *0_NC +/-5%
1
2N7002DW-7-F
[33] CPU1.5V_S3_GATE PR268 +/-5%
PQ71
*SHORT_NC *2N7002W-7-F_NC
S D
PC225
*0.1uF_NC
G 10V,X5R
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3# [2]
B B
Reserve discharge path

Reserve discharge path
+5V_RUN +3.3V_RUN +1.5V_RUN +0.75V_DDR_VTT +3.3V_SUS +1.5V_MEM
+5V_ALW
PR199 PR169 PR267 PR197 PR194
*1K_NC *1K_NC 1K PR168 *1K_NC *1K_NC
+/-1% +/-1% +/-1% 22 +/-1% +/-1%
+/-1%
PR167
D D D 100K D D
+/-5%
6
PQ31B
RUN_ON# G PQ41 G PQ33 RUN_ON_CPU1.5VS3# G PQ74 2 SUS_ON_3.3V# G PQ38 G PQ35
*2N7002W-7-F_NC *2N7002W-7-F_NC 2N7002W-7-F *2N7002W-7-F_NC *2N7002W-7-F_NC
2N7002DW-7-F
S S S
1
S S
3
PQ31A
5
[34,55] 0.75V_DDR_VTT_ON
2N7002DW-7-F
4
A A
Ever Light
Technology Limited
Title
60 -- PW_Run Power Switch
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
C C
B B
Ever Light
A Technology Limited A
Title
61 -- PW_Blank
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
D D
C C
B B
A
Ever Light A
Technology Limited
Title
62 -- PW_Blank
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+1.05V_M
VT356FCX-ADJ
RUN_ON
+1.05V_RUN_VTT AO4406AL +1.05V_RUN
ADAPTER
RUN_ON
DDR_ON
FDC658AP +1.5V_MEM TPS51200DRCR
D +BL_PWR_SRC D
0.75V_DDR_VTT_ON FDC655BN FDC655BN

BATTERY
+PWR_SRC
+VCC_GFXCORE
SI3456DV-T1-E3
MAX17039GTN+
TPS51200DRCR
+VCC_CORE
CHARGER
+5V_HDD +5V_MOD
+1.5V_RUN
+0.75V_DDR_VTT
+15V_ALW
MAX17020ETJ+ 5V_ALW
RUN_ON
ISL95870AHRUZ-T +0.8V_VCC_SA
AO4406AL
C C
+3.3V_ALW
AUX_EN_WOWL
RUN_ON
AUX_ON
+5V_RUN
PCH_ALW
SUS_ON
RUN_ON
M_ON
ISL8014IRZ-T FDC655BN SI3456DV SI3456DV FDC655BN AO4430 SI3456DV
+1.8V_RUN +3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LNA +3.3V_RUN +3.3V_M
B B
+1.0V_LAN +1.05V_M
A A
Ever Light
Technology Limited
Title
63 -- power flow
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
For CPU Heatsink

H8
H1 H6 *mhd25_c60b70_p_NC
H15 H9 H10 H16 *mhd23_c70_vp_NC *mhd23_c70_vp_NC
*MHD43_C57B55_P_NC *MHD43_C57B55_P_NC *MHD43_C65B55_P_NC *MHD43_C65B55_P_NC 7 4 7 4
8 5 8 5
D D
9 6 9 6
1
3
2
1
1
+
H4 H3 H24 H25 H26
*mhd30_sh80x95b70_vp_NC *mhd30_sh80x95b70_vp_NC *mhd30_c85_vp_NC *mhd30_c70_vp_NC *mhd27_c70b80_vp_NC
7 4 7 4 7 4 7 4 7 4
8 5 8 5 8 5 8 5 8 5
9 6 9 6 9 6 9 6 9 6
2
C C
H12 H17 H14

H23 H19 H7 H5 *mhd30_c120b70_vp_NC *mhd30_sh70x100b85_vp_NC *mhd30_sh80x82b70_p_NC
*mhd30_c70_p_NC *mhd30_c70_p_NC *mhd30_c70_p_NC *mhd27_c100b70_p_NC 7 4 7 4
8 5 8 5
9 6 9 6
1
1
1
H11 H2 H22 H13
*mhd30_sh80x95b70_p_NC *mhd30_sh80x95b80_p_NC *mhd32x38_c70_p_NC *mhd58_c68b88_NC
B B
1
1
1210: Change F/P to pad_c50
optics point()
NUT H27 H28
*mhd32_np_NC *mhd32_np_NC
H18 H20 H21 FD1 FD2 FD3 FD4 FD5 FD6
4045HB20-1010SF1 4035HA20-0000SF1 4035HB20-1008SF1

1
1
1
1
NUT M2 H4.5 A NUT M2 H3.5 B NUT M2 H3.5 A
(EXP Card) (DB Card) (DB Card)
A A
Ever Light
Technology Limited
Title
64 -- PAD,SCREW & Stiching CAPs
KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
+3.3V_ALW_PCH +3.3V_RUN
0 ohm
2.2K 2.2K 2.2K 2.2K
H14 PCH_SMBCLK 2N_7002W MEM_XDP_HDD_SMBCLK SMBUS Address :

SMBCLK
DIMM A0 B0 DIMM A0: 0xA0
C9 PCH_SMBDATA MEM_XDP_HDD_SMBDATA DIMM B0: 0xA4
SMBDATA 2N_7002W
*0 ohm_NC
+3.3V_ALW_PCH
PCH
D D
MEM_XDP_HDD_SMBCLK
2.2K 2.2K
XDP conn SMBUS Address [0x??]
MEM_XDP_HDD_SMBDATA
C8 SML0_SMBCLK
SML0CLK
G12 SML0_SMBDATA
SML0DATA
2N_7002W
2N_7002W
0 *0 ohm_NC
0
+3.3V_ALW_PCH MEM_XDP_HDD_SMBCLK
HDD fall sensor SMBUS Address [0x3A]
MEM_XDP_HDD_SMBDATA
2.2K 2.2K
+3.3V_RUN_WWAN_PWR
SML1CLK E14 SML1_SMBCLK
SML1DATA M16
SML1_SMBDATA 0 ohm
2.2K 2.2K *2.2K_NC
2N_7002W WWAN_SMBCLK
B6
I2C1D/I2C3A_CLK WWAN SMBUS Address [0x??]
WWAN_SMBDATA
A5 2N_7002W
I2C1D/I2C3A_DATA
+3.3V_ALW
0 ohm
SIO *2N7002_NC
MEC5055 2.2K 2.2K SMBUS Address :
APR_EC: 0x48
SPR_EC: 0x70
B4 DOCK_SMB_CLK MSLICE_EC: 0x72
I2C1A_CLK
DOCK ( UMA ) USB: 0x59
A3 DOCK_SMB_DAT
I2C1A_DATA AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
C
+3.3V_ALW C
2.2K 2.2K
B5 I2C1B_CLK
I2C1B_CLK
A4 I2C1B_DATA
I2C1B_DATA
+3.3V_ALW
2.2K 2.2K
A56 PBAT_SMBCLK
I2C1C_CLK
BATTERY SMBUS Address [0x16]
B59 PBAT_SMBDAT
I2C1C_DATA
+3.3V_ALW +3.3V_LAN
0 ohm
2.2K 2.2K *2.2K_NC 2.2K 2.2K
A50 LAN_SMBCLK 2N_7002W LOM_SMBCLK

I2C1E_CLK
LAN : BCM5761 SMBUS Address [0x??]
B53 LAN_SMBDATA LOM_SMBDATA
I2C1E_DATA 2N_7002W
+3.3V_SUS +3.3V_CARDAUX
0 ohm *0 ohm_NC
0 ohm
2.2K 2.2K 2.2K 2.2K *2.2K_NC
B B
A49 CARD_SMBCLK 2N_7002W EXP_SMBCLK

I2C2B/I2C1F_CLK
EXPRESS SMBUS Address [0x??]
B52 CARD_SMBDATA EXP_SMBDATA
I2C2B/I2C1F_DATA 2N_7002W
+3.3V_ALW
0 ohm
*2N7002_NC
2.2K 2.2K
B50 CHARGER_SMBCLK
I2C1G_CLK
CHARGER SMBUS Address [0x12]
A47 CHARGER_SMBDAT
I2C1G_DATA
+3.3V_ALW
2.2K 2.2K
A7 BAY_SMBCLK
I2C1H/I2C2D_CLK
B7 BAY_SMBDAT
I2C1H/I2C2D_DATA
+3.3V_ALW
2.2K 2.2K
B49 I2C2A_CLK
I2C2A_CLK
A
B48 I2C2A_DATA A
I2C2A_DATA
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Title
65 -- SMBUS Diagram
Thunder 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU
5 4 3 2 1
[AC in] [Battery only, AC absent] EC pay attention timing
+PWR_SRC
+PWR_SRC UMA Power On Sequence
ACAV_IN Ta
ACAV_IN Ta
1ns < Tg < 4s
POWER_SW#
ALWON Tb [AC in] [Battery only, AC absent]
ALWON Tc
+5V_ALW Tc ITEM Measure Point Time ITEM Measure Point Time
+5V_ALW Td Ta +PWR_SRC To ACAV_IN Ta +PWR_SRC To ACAV_IN
D
+3.3V_ALW Td D
Tb ACAV_IN To ALWON Tb POWER_SW#_MB Low pluse width N/A
+3.3V_ALW Te
+3.3V_ALW2 Te Tc ALWON To +5V_ALW Tc POWER_SW#_MB To ALWON
+3.3V_ALW2 Tf Td ALWON To +3.3V_ALW Td ALWON To +5V_ALW
+15V_ALW Tf
Te ALWON To +3.3V_ALW2 Te ALWON To +3.3V_ALW
1ns < Tg < 4s +15V_ALW Tg
MAIN_PWR_SW# Tf ALWON To +15V_ALW Tf ALWON To +3.3V_ALW2
Tg MAIN_PWR_SW# Low pluse width N/A Tg ALWON To +15V_ALW
T1
Output PCH_ALW_ON
T2
+3.3V_ALW_PCH
10ms < T3 (DPWROK assert at least 10 ms after VccDSW power are valid)
ITEM Measure Point Time
T1 MAIN_PWR_SW# To PCH_ALW_ON
Output PCH_DPWROK
10ms < T4 (RSMRST# de-assert at least 10 ms after VccSUS power are valid) T2 PCH_ALW_ON To +3.3V_ALW_PCH
Output PCH_RSMRST# T3 +3.3V_ALW_PCH To PCH_DPWROK
T5
T4 +3.3V_ALW_PCH To PCH_RSMRST#
ME_SUS_PWR_ACK
T6 < 90ms T5 PCH_RSMRST# To ME_SUS_PWR_ACK
Input AC_PRESENT T6 PCH_RSMRST# To AC_PRESENT
16ms < T7 < 4s T7 SIO_PWRBTN# To Low pluse width
Output SIO_PWRBTN#
T8 SIO_SLP_S5# To SIO_SLP_S4#
Input SIO_SLP_S5# T9 SIO_SLP_S4# To SUS_ON
30us < T8
T10 SUS_ON To +3.3V_SUS
Input SIO_SLP_S4#
T9 T11 +3.3V_SUS To AUX_EN_WOWL
Output SUS_ON T12 AUX_EN_WOWL To +3.3V_WLAN
T10
T13 SIO_SLP_S4# To DDR_ON
+3.3V_SUS
C
T11 T14 DDR_ON To +1.5V_MEM C
Output AUX_EN_WOWL T15 +1.5V_MEM To 1.5V_SUS_PWRGD

T12
T16 SIO_SLP_S4# To SIO_SLP_S3#
+3.3V_WLAN
T13 T17 SIO_SLP_S3# To RUN_ON
Output DDR_ON T18 RUN_ON To +5V_RUN
T14
T19 RUN_ON To +3.3V_RUN
+1.5V_MEM
T15 T20 RUN_ON To +1.5V_RUN
Input 1.5V_SUS_PWRGD T21 RUN_ON To +1.8V_RUN
T16
T22 +1.8V_RUN To +1.8V_RUN_PWRGD
Input SIO_SLP_S3#
T17 T23 RUN_ON To CPU_VTT_ON
Output RUN_ON T24 CPU_VTT_ON To +1.05V_RUN
T18
T25 +1.05V_RUN To 1.05V_VTT_PWRGD
+5V_RUN
T19 T26 1.05V_VTT_PWRGD To +0.85V_RUN
+3.3V_RUN T27 +0.85V_RUN To VCCSA_PWRGD
T20
T28 1.05V_0.8V_PWROK To CPU1.5V_S3_GATE
+1.5V_RUN
T21 T29 CPU1.5V_S3_GATE To +1.5V_CPU_VDDQ
+1.8V_RUN T30 +1.5V_CPU_VDDQ To 0.75V_DDR_VTT_ON
T22
T31 0.75V_DDR_VTT_ON To +0.75V_DDR_VTT
Input 1.8V_RUN_PWRGD
T23 T32 +0.75V_DDR_VTT To RUNPWROK
Output CPU_VTT_ON T33 RUNPWROK To PM_APWROK
T24
T34 PM_APWROK To RESET_OUT#
+1.05V_RUN
T25 T35 RESET_OUT# To PM_DRAM_PWRGD
1.05V_VTT_PWRGD T36 PM_DRAM_PWRGD To H_CPUPWRGD
T26
T37 H_CPUPWRGD To IMVP_VR_ON
+0.85V_RUN
T27 T38 IMVP_VR_ON To SVID
B
VCCSA_PWRGD T39 IMVP_VR_ON To +VCC_CORE B
T28
T40 IMVP_VR_ON To +VCC_GFXCORE
Input 1.05V_0.8V_PWROK
T29 T41 +VCC_CORE To IMVP_PWRGD
Output CPU1.5V_S3_GATE T42 IMVP_PWRGD To SYS_PWROK
T30
T43 SYS_PWROK To PCH_PLTRST#
+1.5V_CPU_VDDQ
T31
Output 0.75V_DDR_VTT_ON
T32
+0.75V_DDR_VTT
T33
Output RUNPWROK
T34
Output PM_APWROK
T35
Output RESET_OUT#
T36
PCH Output PM_DRAM_PWRGD
T37
PCH Output H_CPUPWRGD
99ms < T38
Output IMVP_VR_ON
5ms > T39
SVID
T40
+VCC_CORE
T41
Input IMVP_PWRGD
CLK_BUF_BCLK stable
Output SYS_PWROK T42

T43
A A
PCH Output PCH_PLTRST#
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Title
66 -- Power Sequency Timing
Thunder 1A

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D D
C C
B B
A A
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Title
67 -- Power Sequency Timing
KRUG 15" UMA 1A

5 4 3 2 1
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5 4 3 2 1
Change List
Item Date T Page# Issue Description Solution Description Rev
A00
01 PWR Delete Power Jump. Change Power Jump to short pad.
A00
02 P39 Edit thermal diode note.
03 P40 IEEE test fail. Change R80 to 1.2K.
04 EE P45 SCH Changed Change R724~R728,R730 to shortpad.De pop JSPI1.
05 P29 Change eSATA connector part number. Change eSATA connector part number.
06 P02 SCH Changed De pop R273,R304,R314,R674~R678,R682,R684
07 P06 SCH Changed Remove XDP component.Change R107~R112,R115,R116,R230~R236,RR238~R240 to NC
08 P06 SCH Changed Change R284~R286,R302,R303,,R307,R311~R313,R105,R106,R113,R114,R237 to NC
09 EE P24 SCH Changed Change R761 to Short pad
D 10 P24 SCH Changed Change R757,R759,R760,Q50,Q51 to NC D
11 P44 Design Changed CLK damping to 22 ohm (R374) for driving validation
12 P51 Design Changed Change P/N and FP for PR12,PR210,PL1 and wait for CIS released.
PWR
13 P34 Design Changed ADD R765 100K ohm for power request
14 P49 Delete Power switch SW1. Delete Power switch SW1.
15 P11 TPM only Pop R202 and De-pop R535
16 P37 TPM only Delete JTPM1,C541~C543,C376
17 P46 Change TPM SCH to MB Add U38,C548~C556 for TPM SCH changed.
18 P47 SCH Changed Add R766 between U31 and Singal "CODEC_I2S_MCLK"
EE
19 P64 Design Changed Change H20 to new f/p mhd11_c50b_paste
20 P46 TPM only Move TPM ID table to Page46.
21 P51 Power Changed Reserve 1uF(PC279) at leakage A,let it will be low after +3.3V_ALW turn on.
22 P36, P32 Wlan LED is lighting when WWAN module insert after AC-IN. Add mosfet (Q52) and Res 100K (R767) to control LED .
23 P37 Add 2 pin connector (CN18) Add 2 pin connector (CN18)
24 P36 LED Current & Brightness adjust Change R588 & R753 to 130 ohm, R589 to 180 ohm.
25 PWR P56 De-rating thermal issue Change PC41,42,43 to 62011HS00-015-G
26 P64 Design Changed Change H20 to new f/p pad_c50
27 P24 Reduce noise Change C417 and c420 to 0.uF
28 P43 IEEE test fail. Delete R745~R752
29 P43 Refer Intel guide rev 1.5 Add R768
EE
30 P32 Pin 42 of WWAN module is open drain .Add PU resistor at LED_WWAN_OUT# . Add R767(100K ohm) and PU to "+3.3V_RUN_WWAN_PWR" for net"LED_WWAN_OUT#"
31 P37 Modify Audio board pin define. Modify Audio board pin define.
32 P33 Change board ID. Change board ID R493 to 8.2K.
33 P33 Design Changed Depop R456,R480,R462,U27
34 P52~P60 Cost down Change 0 ohm to short pad for power portion P52~P60.
35 PWR P56 Acoustic test result. Change PC188,PC189 to 68uF(62110VQ00-024-G)
36 P56 De-rating thermal issue Change PC41,42,43 to 620108L00-015-G
37 P37 P/N Changed Change JAudio1 to GB5RF201-1203-8H and CN18 to HN14021-0000-7H
EE
38 P11 Design Changed Change R246 to 1K. modify GPIO37 table.
39 P33 P/N Changed Change MEC5055 mfg PN to MEC5055-LZY-KRU00 .
PWR
40 P51 P/N Changed Add PL1 Foxconn PN .
C
41 P51 P/N Changed Change PL1 part number to 1164AY-H-4R7M=P3 and keep footprint. C
42 P46 Add pull down resistor R770 at TPM_B_DET#. Modified TPM selection table. Add pull down resistor R770 at TPM_B_DET#. Modified TPM selection table.
43 P33 Add MEC5055 Foxconn part number which the same in ST stage. Add MEC5055 Foxconn part number which the same in ST stage.
44 P07~P13 P/N Changed Update PCH P/N to 21011EG00-187-G
45 P64 Add H27,H28 Add H27,H28
46 P36 LED Current & Brightness adjust Change LED RES R753,R588 to 390 ohm and R589 to 620 ohm
EE
47 P07~P13 P/N Changed Update PCH P/N to 21011EG00-187-G
48 P04 P/N Changed Change C249 part number to 622203J00-022-G because part number is error .
49 P30,P37 EMI Request Reserve R771,C557 for "CLK_DEBUG" and R772,C558 for "CLK_PCI_OZ"
50 P11 Intel feedback Pop R196 for Intel ME setting.
51 P07 HDMI Hot plug detect issue Add C559 (620103600-011-G) to fix
52 P56 Solve overshoot issue Change PC69 and PC196 to 62010JC00-026-G
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
B B
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
A A
103
104
105
106
PROJECT : KRUG DOC. NO. : xxx REV : X02

KRUG 15" UMA Ever Light
APPROVED BY : Walt CHECKED BY: Walt DRAWN BY: SHEET 1 OF 1
Technology Limited
Title
68 -- Change List
1A

5 4 3 2 1
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5 4 3 2 1
D
POWER SATES D
C C
PM TABLE
B B
A A
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Title
69 -- configuration

KRUG 15" UMA 1A

5 4 3 2 1
WWW.MANUALS.CLAN.SU

9684 KRUG 15 UMA-Latitude E5520

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5 4 3 2 1

KRUG 15" UMA Block Diagram

DDR3 SODIMM (B) PG 2,3,4,5 CRT MUX

PG 33 LAN LAN Switch

BC bus Keyboard Locate at Media/B Locate at LED/B

Date: Wednesday, February 16, 2011 Sheet 1 of 69

PEG_RCOMPO (H22) R_COMP place close to CPU

Trace length Max is 500 mils width 12 mils

PCI EXPRESS* - GRAPHICS

JTAG & BPM

PEG_TX[6] J29 +3.3V_RUN

DG(V0.7) P49: FDI Disable SM_RCOMP2 R696 200 +/-1%

width 4 mils FDI_FSYNC[0..1],FDI_LSYNC[0..1],FDI_INT

R710 *0_NC +/-5%

[14,15] DDR3_DRAMRST# R713 1K +/-5% D S DDR3_DRAMRST#_CPU

[5,10] DDR_HVREF_RST_PCH R705 *0_NC_SHORT +/-5% G

[7] PM_DRAM_PWRGD R372

Date: Wednesday, February 16, 2011 Sheet 2 of 69

D SANDY BRIDGE PROCESSOR (DDR3) D

DDR SYSTEM MEMORY B

CPU socket CPU socket

Date: Wednesday, February 16, 2011 Sheet 3 of 69

SANDY BRIDGE PROCESSOR (POWER)

VCCCORE = (SV) xxA max +0.75V_DDR_VTT SM_VREF_RES

AG32 VCC3 VCCIO2 AG10 C492 R704

DDR3 -1.5V RAILS

V34 AJ29 H_CPU_SVIDALRT# R294 43 +/-5% VIDALERT# [56] H26

Date: Wednesday, February 16, 2011 Sheet 4 of 69

D SANDY BRIDGE PROCESSOR (GND) D

1 0 CFG4 R318 *1K_NC +/-5%

*2N7002W-7-F_NC 11 x16 - Device 1 functions 1 and 2 disable (Default Value)

R321 *0_NC +/-5%

+1.05V_RUN 1206: Change to NC

R287 *1K_NC +/-5% RESET_OUT#_XDP

[9] USB_OC0#_R R112 *33_NC +/-5% XDP_FN0

Date: Wednesday, February 16, 2011 Sheet 6 of 69

ENVDD_PCH R53 100K +/-5%

Digital Display Interface

System Power Management

PCH_CRT_BLU R613 150 +/ -1%

R180 *10K_NC +/-5% SUS_STAT#/LPCPD#

R147 10K +/-5% PCH_RI#

R162 10K +/-5% PCH_PCIE_WAKE#

R643 *330K_NC +/-5%

DSWODVREN - On Die DSW VR Enable

Date: Wednesday, February 16, 2011 Sheet 7 of 69

PLL ODVR VOLTAGE (HDA_SYNC have Internal PD 20k) AM3

R656 *0_NC_SHORT +/-5% PCH_SPI_CLK_R T3 AH1 RBIAS_SATA3 R173 750 +/-1%

1214:Refer to Intel guide rev 1.5

R358 1K +/-5% PCH_AZ_SDOUT

C78 R178 51 +/-5% PCH_JTAG_TCK

Date: Wednesday, February 16, 2011 Sheet 8 of 69

Cougar Point (PCI,USB,NVRAM)

R265 *0_NC_SHORT +/-5% U16

Maximum distance between resistor and PCH is 25.4mm.

R527 100K+/-5% PCIE_MCARD2_DET#

A16 swap override Strap/Top-Block

Date: Wednesday, February 16, 2011 Sheet 9 of 69

Cougar Point (PCI-E,SMBUS,CLK)

R37 *0_NC_SHORT +/-5% CLK_PCIE_MINI2#_C V45 K45 CLK_PCH_14M

AB42 V47 XTAL25_IN

R157 *0_NC +/-5% R158 *0_NC +/-5%

R188 *0_NC +/-5% R152 *0_NC +/-5%

R157 0_NC +/-5% R158 0_NC +/-5%

R188 0_NC +/-5% R152 0_NC +/-5%