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www.fairchildsemi.com

AN-6005
Synchronous buck MOSFET loss calculations
with Excel model
Jon Klein Power Management Applications

Abstract High-Side Losses:


The synchronous buck circuit is in widespread use to The power loss in any MOSFET is the combination
provide point of use high current, low voltage of the switching losses and the MOSFETs
power for CPUs, chipsets, peripherals etc. conduction losses.
Typically used to convert from a 12V or 5V bulk PMOSFET = PSW + PCOND (1)
supply, they provide outputs as low as 0.7V for low
voltage CPUs made in sub-micron technologies. Q1 (Figure 1) bears the brunt of the switching losses,
The majority of the power lost in the conversion since it swings the full input voltage with full current
process is due to losses in the power MOSFET through it. In low duty cycle converters (for
switches. The profiles of loss for the High-Side and example: 12VIN to 1.8VOUT) switching losses tend to
Low-Side MOSFET are quite different. dominate.
These low output voltage converters have low duty High-Side Conduction Losses:
cycles, concentrating the majority of the conduction Calculating high-side conduction loss is
loss in the low-side MOSFET. straightforward as the conduction losses are just the
V IN I2R losses in the MOSFET times the MOSFETs duty
cycle:
PWM CONTROLLER

H igh-Side VOUT
Q1 PCOND = IOUT 2 RDS(ON) (2)
VIN
SW N O D E L1
+ where RDS(ON) is @ the maximum operating
VO UT
D1 MOSFET junction temperature (TJ(MAX) ).
Low -S ide The maximum operating junction temperature is
Q2 equation can be calculated by using an iterative
technique. Since
Figure 1. Synchronous Buck output stage RDS(ON) rises with TJ and
TJ rises with PD (dissipated power) and
For the examples in the following discussion, we will
be analyzing losses for the following synchronous PD is largely being determined by I2 x RDS(ON) .
buck converter: The spreadsheet calculator iterates the die
System Parameters temperature and accounts for the MOSFET's positive
VIN 12 V RDS(ON) temperature coefficient. Iteration continues
VOUT 1.5 V in the "DieTemp" custom function until the die
IOUT 15 A
temperature has stabilized to within 0.01C.
FSW 300 kHz High-Side Switching Losses:
Table 1. Example Synchronous Buck The switching time is broken up into 5 periods (t1-t5)
as illustrated in Figure 3. The top drawing in Figure
A spreadsheet to aid in the estimation of 3 shows the voltage across the MOSFET and the
synchronous buck losses is available on current through it. The bottom timing graph
Fairchild's web site at : represents VGS as a function of time. The shape of
https://www.fairchildsemi.com/design/design- this graph is identical to the shape of the QG curve
tools/switching-loss-calculation-tool/ contained in MOSFET datasheets, which assumes the
Operation of the spreadsheet is described in the gate is being driven with a constant current. The QG
Appendix at the end of this document.

1.0.2 11/21/2014
Synchronous Buck Loss Calculation AN-6005

notations indicate which QG is being charged during During this time the current is constant (at IOUT) and
the corresponding time period. the voltage is falling fairly linearly from VIN to 0,
VIN therefore:
VDRIVE (VDD) V I
D E t3 = t3 IN OUT (4)
CRSS 2
RDRIVER COSS
HDRV G
RGATE During t4 and t5, the MOSFET is just fully
enhancing the channel to obtain its rated RDS(ON) at a
CGS
rated VGS. The losses during this time are very small
SW S compared to t2 and t3, when the MOSFET is
simultaneously sustaining voltage and conducting
Figure 2. Drive Equivalent Circuit current, so we can safely ignore them in the analysis.
C C C The switching loss for any given edge is just the
V DS
ISS RSS ISS
power that occurs in each switching interval,
multipied by the duty cycle of the switching interval:
S w itching losses
V I
PSW = IN OUT (t2 + t3) (FSW )
are in S haded
section (5)
2
Now, all we need to determine are t2 and t3. Each
period is determined by how long it takes the gate
ID driver to deliver all of the charge required to move
through that time period:

V GS Q G(x)
Q GS Q GD
4.5V
tx = (6)
I DRIVER
V SP Most of the switching interval is spent in t3, which
V TH
Q G (SW ) occurs at a voltage we refer to as VSP, or the
switching point voltage. While this is not
specifically specified in most MOSFET datasheets, it
t1 t2 t3 t4 t5
can be read from the Gate Charge graph, or
CISS = CGS + CRSS approximated using the following equation:
Figure 3. High-Side Switching losses and QG I
VSP VTH + OUT (7)
GM
The switching interval begins when the high-side
MOSFET driver turns on and begins to supply where GM is the MOSFETs transconductance, and
current to Q1s gate to charge its input capacitance. VTH is its typical gate threshold voltage.
There are no switching losses until VGS reaches the With VSP known, the gate current can be determined
MOSFETs VTH. therefore Pt1 = 0. by Ohms law on the circuit in Figure 2:
When VGS reaches VTH, the input capacitance (CISS) is
VDD - VSP
being charged and ID (the MOSFETs drain current) IDRIVER(L H) = (8A)
is rising linearly until it reaches the current in L1 (IL) RDRIVER(PULL -UP) + RGATE
which is presumed to be IOUT. During this period (t2)
VSP
the MOSFET is sustaining the entire input voltage IDRIVER(HL ) = (8B)
across it, therefore, the energy in the MOSFET RDRIVER(PULL-DOWN) + RGATE
during t2 is:
The rising time (L-H) and falling times (H-L) are
V I treated separately, since IDRIVER can be different for
E t2 = t2 IN OUT (3) each edge.
2
The VGS excursion during t2 is from VTH to VSP.
Now, we enter t3. At this point, IOUT is flowing Approximating this as VSP simplifies the calculation
through Q1, and the VDS begins to fall. Now, all of considerably and introduces no significant error.
the gate current will be going to recharge CGD. CGD is This approximation also allows us to use the QG(SW)
similar to the Miller capacitance of bipolar term to represent the gate charge for a MOSFET to
transistors, so t3 could be thought of as Miller time. move through the switching interval. A few

2 1.0.2 11/21/2014
AN-6005 Synchronous Buck Loss Calculation

MOSFET manufacturers specify QG(SW) on their data Driver dissipation calculates to :


sheets. For those that don't, it can be approximated
500 * 5
by: PDR(H-L) = = 147mW (11E)
2(8.5)
QGS
QG(SW ) QGD + (9) 500 * 2
2 PDR(L-H) = = 91mW (11F)
2(5.5)
so the switching times therefore are:
QG(SW) PDRIVER = PDR(H-L) + PDR(L -H) = 238mW (11G)
t S(L H) = (10A)
IDRIVER(L -H)
2. The power to charge the MOSFETs output
QG(SW) capacitance:
tS(HL ) = (10B)
IDRIVER(H-L) C oss VIN2 FSW
PCOSS (11H)
2
The switching loss discussion above can be
summarized as: where COSS is the MOSFETs output capacitance,
(CDS +CDG).
V XI
2


( )
PSW = IN OUT (FSW ) t S(L -H) + t S(H L ) (10C) 3. If an external schottky is used across Q2, the
Schottkys capacitance needs to be charged
There are several additional losses that are typically during the high-side MOSFETs turn-on:
much smaller than the aforementioned losses.
Although their proportional impact on efficiency is CSCHOTTKY VIN2 FSW
PC(SCHOTTKY) = (12A)
low, they can be significant because of where the 2
dissipation occurs (for example, driver dissipation). If a Schottky diode is not used:
They are listed in order of importance:
4. Reverse recover power for Q2s body diode:
1. The power to charge the gate:
PQRR = QRR VIN FSW (12B)
PGATE = QG X VDD X FSW (11A)
where QRR is the body diodes reverse recovery
Note that PGATE is the power from the VDD supply charge. If the MOSFET contains an integrated body
required to drive a MOSFET gate. It is independent diode (like SyncFET), the QRR figure in the
of the driver's output resistance and includes both the datasheet is actually QOSS, or the charge required by
rising and falling edges. the MOSFETs COSS . If a SyncFET is used, then
set QRR to 0 in the companion spreadsheet.
PGATE is distributed between RDRIVER, RGATE, and
RDAMPING propoprtional to their resistances.
Dissipation in the driver for the rising edge is: Low-Side Losses
PGATE RDRIVER(PULL -UP) Low-side losses (PLS) are also comprised of
PDR(L -H) = (11B) conduction losses and switching losses.
2(RTOTAL )
PLS = PSW + PCOND (13)
where
Switching losses are negligible, since Q2 switches on
RTOTAL = RDRIVER + RGATE + RDAMPING (11C)
and off with only a diode drop across it, however for
completeness we will include the analysis.
Similarly, dissipation in the driver for the falling edge
is: Conduction losses for Q2 are given by:
PGATE RDRIVER(PULL -DOWN) PCOND = ( 1 D ) X IOUT 2 X R DS(ON) (14)
PDR(H-L) = (11D)
2(RTOTAL ) where RDS(ON) is the RDS(ON) of the MOSFET at the
For an output stage (Driver + MOSFET) with the anticipated operating junction temperature and
following parameters: VOUT
D= is the duty cycle for the converter.
VIN
PGATE 500 mW
RDRIVER (PULL-UP) 5 The junction temperature (TJ) of the MOSFET can be
calculated if the junction to ambient thermal
RDRIVER (PULL-DOWN) 2
resistance (JA) and maximum ambient temperature
RDAMPING 2 are known.
RGATE 1.5

1.0.2 11/21/2014 3
Synchronous Buck Loss Calculation AN-6005

TJ = TA + (PLS JA ) (15) the RDS(ON) is typically 110% of the specified RDS(ON)


.
PCOND dominates PLS. Since RDS(ON) determines
PCOND , and is a function of TJ, either an iterative The rising edge transition times for the low-side (t2
calculation can be used, or TJ can be assumed to be and t3 in Figure 4) can now be calculated from the
some maximum number determined by the design RC equations.
goals. The calculations in the accompanying t2R = K 2R (R DRIVER + R GATE ) CISS (17A)
spreadsheet use TA and JA iteratively to determine where
the low-side operating TJ at full current, assuming a
MOSFET RDS(ON) temperature coefficient of VDRIVE VDRIVE
K 2R = ln ln (17B)
0.4%/C, which is typical for the MOSFETs used in VDRIVE VSP VDRIVE VTH
this application.
t3R = K 3R (R DRIVER + R GATE ) CISS (17C)
Low-side Switching Losses where
C ISS VDRIVE VDRIVE
0 K 3R = ln ln
DRIVE
V 0 . 9 VSPEC DRIVE
V VSP
IO U T (17D)
x R D S (O N )
ID and where CISS is the MOSFETs input capacitance
V DS (CGS + CGD) when VDS is near 0V. If the MOSFET
0.6 datasheet has no graph of capacitance vs. VDS, use
1.25 times the typical CISS value, which is usually
IO U T
given with of the rated VDS across the MOSFET.
t1 t2 t3
The turn-off losses are the same, but in reverse, so
the switching waveforms are:
V D R IV ER
C ISS
0.9 x V S P EC 0
V SP
V GS
V TH I x R D S (O N )
ID
V DS
0.6
t

I
Figure 4. Low-Side turn-on switching loss t3 t2 t1
waveforms
V D R IV ER
Low-side switching losses for each edge can be
calculated in a similar fashion to high-side switching 0.9 x V S P EC
losses: V SP
V GS
PSW(LS)
V TH
VF + IOUT 1.1 RDS(ON)
t2 VF + t3 IOUT Fsw
2
(16) t
but instead of VIN as in eq. 3, we use VF , the schottky
Figure 5. Low-Side turn-off switching loss
diode drop (approximated as 0.6V) in the equation. waveforms
Also, there is almost no Miller effect for the low-side
MOSFET, since VDS is increasing (becoming less The falling edge transition times for the low-side
negative) as we turn the device on, the gate driver is (t3 and t2 in Figure 5) can now be calculated from the
not having to supply charge to CGD. The voltage RC equations:
collapse for Q2 is caused by the RDS(ON) going from
t3F = K 3F (R DRIVER + R GATE ) CISS (18A)
0 .6
@ VGS = VSP, to 90% of VSPEC, the gate voltage
IOUT where
for the highest specified RDS(ON) . At 90% of VSPEC

4 1.0.2 11/21/2014
AN-6005 Synchronous Buck Loss Calculation

0.9VSPEC Q GS
K3F = ln (18B) t TH (20)
VSP 2 ILDRV

t2F = K 2F (R DRIVER + R GATE ) C ISS (18C) This approximation holds, since prior to reaching
where threshold, the gate voltage is low enough that ILDRV
can be approximated with a constant current of
V
K2F = ln SP (18D) V
VTH VDRIVER TH
2
ILDRV (21)
Dead-Time (Diode Conduction) Losses R GATE + R DRIVER
The dead-time is the amount of time that both Q GS
MOSFETs are off. During this time the diode (body and typically Q G( TH) .
2
diode or parallel schottky diode) is in forward
conduction. It's power loss is: The diode's total on-time on the falling edge is then:
PDIODE = tDEADTIME FSW VF IOUT (19) Q GS (R GATE + RDRIVER )
t DEADTIME(F) t DELAY(F) +
VTH
where tDEADTIME = tDEADTIME(R) + tDEADTIME(F), which VDRIVER
are the deadtimes associated before the SW Node 2
(Figure 1) rises, after Q2 turns off, and after SW (22)
Node falls, before Q2 turns on, respectively. On the rising edge, tDELAY(R) is usually much longer to
To determine tDEADTIME, we need to consider how the allow the low-side MOSFETs gate to discharge
driver controls the MOSFET gate drives. Most completely. This is necessary since charge is coupled
drivers use "adaptive dead-time circuits, which wait into the low-side gate during the rising edge of the
for the voltage of the opposite MOSFET to reach an SW node. The peak of the resultant voltage spike
"off" voltage before beginning to charge its own at the low-side gate is the sum of the amplitude of the
MOSFET. Most drivers add a fixed delay to prevent injected spike and the voltage the gate has discharged
shoot-through, especially on the low to high to when the SW node begins to rise. Sufficient delay
transition. is necessary to avoid having the resultant peak rise
significantly above the low-sides VTH , turning on
HDRV
both MOSFETs, and inducing shoot-through
H.S. MOSFET
losses.
CGD
40nS 6 14

1V LDRV RGATE 12
5
G SW NODE VOLTAGE 10
RDamping
CGS 4
8
RDRIVER LS MOSFET GATE
VGS

V
6

4
2
Figure 6. Typical Adaptive Gate drive (low-high 2
1
transition) 0

0 -2
For the tDEADTIME(F) the diode will be conducting the 0 20 40 60 80
full load current from the time the switch node falls, t (nS)
until the Low-side MOSFET reaches threshold. This
"deadtime" consists of 2 portions: Figure 7. Coupled voltage spike on Low-side
1. tDELAY(F) : The drivers built in delay time from MOSFET gate from SW node rising edge
detection of 1VGS at the high-side MOSFET
gate until beginning of low-side MOSFET turn- The other component of deadtime on the rising edge
on, plus is the time it takes for the high-side MOSFETs gate
2. tTH : the time for the driver to charge the low- to charge to VSP. This is typically less than 10% of
side MOSFET's gate to reach threshold (VTH). tDELAY(R) so we will ignore it and set:
tTH can be approximated by: tDEADTIME(R) tDELAY(R) (23)

1.0.2 11/21/2014 5
Synchronous Buck Loss Calculation AN-6005

Summary of results
A spreadsheet which contains MOSFET parameters
is used to compute the losses for our example circuit
(Table 1) using a 5V gate drive with 6 pull-up and
2 pull-down strength.
High-Side Low-Side
MOSFET FDD6644 FDB6676 Total
Switching Loss 1.09 0.31 1.40 W
Conduction Loss 0.21 1.15 1.36 W
Other Losses 0.26 W
Total Losses 1.30 1.46 3.02 W
Output Power 22.5 W
Efficiency 88%

Table 2. Results for 15A example (Table 1)

Its instructive to review the results in order to


observe a few key points:
Switching losses for the low-side MOSFET are
only 15% of low-side MOSFETs total losses.
Unless the switching frequency is very high
(above 1 Mhz.), the loss contribution due to
diode conduction (deadtime loss) is minimal.
High-side losses are dominated by switching
losses since the duty cycle is low.

6 1.0.2 11/21/2014
AN-6005 Synchronous Buck Loss Calculation

Appendix: Using the efficiency and loss calculation spreadsheet tool


The spreadsheet is avaiable at the following :
https://www.fairchildsemi.com/design/design-tools/switching-loss-calculation-tool/
The spreadsheet implements the loss calculations described in this app note. To see the sheet in action press the
"Run" button on the "EfficiencySummary" sheet.
The controller/driver database models several Fairchild products driver products. A listing of these is found in the
ControllerDriver tab.
These detailed instructions can also be found in the " General Instructions" tab of the spreadsheet:
Notes: Be sure to turn off Macro Protection in Excel to allow the custom functions and macros in this sheet to run.
For Excel 2000, this is done through "Tools|Macro|Security". Set the level to "low".
In Excel 97, you can do this through "Tools|Options. In the "General" tab, the "Macro Virus Protection" box
should not be checked.
DieTemp function RDS(ON) is a function of die temperature, and the die temperature is a function of Power Dissipation which is in
turn dependent on RDS(ON). To solve for dissipation or die temperature, the conduction loss calculations in
this spreadsheet use an iterative calculation method to arrive at the die temperature and dissipation.

Tabs Function / Description


Definitions Provides guidance on what MOSFET parametric data to enter in the "MOSFETDatabase" tab. This sheet is a
hotlink destination from some of the column headings in the MOSFETDatabase table.
EfficiencyChart Plots efficiency data from the table in EfficiencySummary tab.
LossChart Plots power loss data from the table in EfficiencySummary tab.
ControllerDriver Database for the IC Controllers. Fairchild's portable PWM controllers are featured in this database. Any
controller can be added by using the "Add" button and filling in the appropriate fields.
MOSFETDatabase Database for the MOSFETs. Many popular Fairchild MOSFETs are featured in this database. Any MOSFET
can be added by using the "Add" button and filling in the appropriate fields.
EfficiencySummary The main sheet where the system requirements and MOSFET choices can be entered, and the data is stored
for graphing. To run the graphing routine, push the "RUN" button at the top of the sheet.
Output The calculations contained in the "Synchronous buck MOSFET loss calculations" app note are programmed
into this sheet. The EfficiencySummary macro uses this sheet as its calculator. If a particular operating point
needs to be examined in more detail, then use this sheet, and enter the parameters by hand. Be sure to save a
copy of this workbook before overwriting formulas in "Output" tab.

Cells are color coded as follows:


Indicates user input parameters
Indicates calculated values that can be overwritten with selected values if desired.
These fields default to the calculated value directly above them.
These fields are written into, or contain formulae that were input on the "EfficiencySummary" sheet.

Macro Security Note:


Switching Loss Calculation Design Tool excel file uses macros extensively. For the spreadsheet to operate
properly, check the Always trust macros from this source box if a security warning appears, then click the
Enable Macros button..
This is only required the first time you run a Fairchild spreadsheet tool with macros.

1.0.2 11/21/2014 7
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductors product/patent
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. Typical parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer
application by customers technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.

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