LG 47lm6200-Sa CH - Lj22e PDF

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LJ22E
MODEL : 47LM6200 47LM6200-SA

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67402906 (1203-REV00) Printed in Korea

CONTENTS
CONTENTS . ............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION........................................................................................ 4
ADJUSTMENT INSTRUCTION............................................................... 14
SCREW ASSEMBLY WORKING GUIDE................................................ 22
EXPLODED VIEW .................................................................................. 23
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 M and 5.2 M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
This spec sheet is applied all of the 32,42,47,55,60, 65
LCD TV with LJ22E chassis.
2. Test condition
Each part is tested as below without special notice.
1) Temperature : 25 C 5 C (779 F), CST : 405 C

2) Relative Humidity: 65 % 10 %
3) Power Voltage
- AC 100-240 V~, 50/60 Hz
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
3. Test method
1) Performance: LGE TV test method followed
2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
4. General Specification
No Item Specification Remark
1. Display Screen Device 32 wide Color Display Module Resolution: 1920*1080
42 wide Color Display Module Resolution: 1920*1080
2. Aspect Ratio 16:9 All
3. LCD Module 32" TFT WUXGA LCD
42" TFT WUXGA LCD
47 TFT WUXGA LCD
55 TFT WUXGA LCD
60 TFT WUXGA LCD
65 TFT WUXGA LCD
4. Operating Environment 1) Temp. : 0 ~ 40 deg LGE SPEC
2) Humidity : 0 ~ 85%
5. Storage Environment 1) Temp. : -20 ~ 60 deg
2) Humidity : 10 ~ 90%
6. Input Voltage AC100 ~ 240V, 50/60Hz
7. Power Consumption(Max) = FHD 32 38 W Normal : LC320EUN-SEM1 [32LS5700-SB]
LCD(Module) + Backlight(LED) T120Hz 42 48 W Normal : LC420EUE-SEM1 [42LS5700-SB]
Edge LED
47 72 W Normal : LC470EUE-SEM1 [47LS5700-SB]
60 W Normal :TBD [60LS5700-SB]
FHD 32 38 W FPR : LC320EUN-SEF2 [32LM6200-SA]
T120 42 48 W FPR : LC420EUE-SEF1 [42LM6200-SA]
(M120)Hz
Edge LED 47 72 W FPR : LC470EUE-SEF1 [47LM6200-SA]
FPR (GPR) 55 98 W FPR : LC550EUE-SEF1 [55LM6200-SA]
65 Typ : 182 W GPR : T645HB01-V0 [65LM6200-SA]
Max : 197
FHD 32 45 W FPR : LC320EUA-PEF1 [32LM6400-SA]
T120Hz 42 62 W FPR : LC420EUG-PEF1 [42LM64/6700-SA]
Semi-LCM
47 59 W FPR : LC470EUG-PEF1 [47LM64/6700-SA]
55 67.2 W FPR : LC550EUG-KEF1 [55LM64/6700-SA]
FHD 42 60 W FPR : LC420EUH-PEF1 [42LM7600-SA]
T240Hz 47 83 W FPR : LC470EUH-PEF1 [47LM7600-SA]
Semi-LCM
55 108 W FPR : LC550EUH-PEF1 [55LM7600-SA]
8. LCD Module Size Maker Inch (H) (V) (D)
LGD 32 727.4 x 429.0 x 22.7 LC320EUN-SEM1
LC320EUN-SEF2
715.8 x 423.03 x 23.8 LC320EUA-PEF1
(with Side Sealing)
42 960.4 x 560.4 x 17.4 LC420EUE-SEF1
LC420EUE-SEM1
949.2 x 554.2 x 16.8 LC420EUG-PEF1
LC420EUH-PEF1
47 1070.6 x 622.0 x 22.0 LC470EUE-SEF1
LC470EUE-SEM1
1058.7 x 615.8 x 20.7 LC470EUG-PEF1
LC470EUH-PEF1
55 1244.6 x 720.9 x 22.0 LC550EUE-SEF1
1228.6 x 711.4 x 20.7 LC550EUG-KEF1 : Edge 3D_T120Hz
LC550EUH-KEF1 : Edge 3D_T240Hz
AUO 65 1508 x 878 x 12.8
Pixel Pitch Maker Inch (H) (V) (D)
LGD 32 0.36375 x 0.36375 LC320EUN-SEM1
LC320EUN-SEF2
0.12125 x 0.12125 LC320EUA-PEF1
42 0.4845 x 0.4845 LC420EUE-SEF1
LC420EUE-SEM1
LC420EUG-PEF1
LC420EUH-PEF1
47 0.5415 x 0.5415 LC470EUE-SEF1
LC470EUE-SEM1
LC470EUH-PEF1
0.51415 x 0.51415 LC470EUG-PEF1
55 0.630 x 0.630 LC550EUE-SEF1 : Edge 3D_T120Hz
LC550EUG-KEF1 : Edge 3D_T120Hz
LC550EUH-KEF1 : Edge 3D_T240Hz
Back Light LGD 32 Edge-LED LC320EUN-SEF2
LC320EUA-KEF1
42 Edge-LED LC420EUE-SEF1
LC420EUG-KEF1
LC420EUE-SEM1
LC420EUH-KEF1
LC470EUG-KEF1
LC470EUE-SEM1
LC470EUH-KEF1
LC550EUG-KEF1
LC550EUH-KEF1
AUO 32 Edge-LED T320HVN01.0
65 Edge-LED
5. Supported video resolutions
5.1. Component (Y, PB, PR)
No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

1. 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2. 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3. 720*480 31.50 60 27.027 SDTV 480P
4. 720*480 31.47 59.94 27.00 SDTV 480P
5. 720*576 15.625 50* 13.5 SDTV 576I
6. 720*576 31.25 50* 13.5 SDTV 576P
7. 1280*720 37.5 50* 74.25 HDTV 720P
8. 1280*720 45.00 60.00 74.25 HDTV 720P
9. 1280*720 44.96 59.94 74.176 HDTV 720P
10. 1929*1080 28.125 50* 74.25 HDTV 1080I
11. 1920*1080 33.75 60.00 74.25 HDTV 1080I
12. 1920*1080 33.72 59.94 74.176 HDTV 1080I
13. 1920*1080 56.25 50* 148.5 HDTV 1080P
14. 1920*1080 67.50 60 148.50 HDTV 1080P
15. 1920*1080 67.432 59.94 148.352 HDTV 1080P
16. 1920*1080 27.00 24.00 74.25 HDTV 1080P
17. 1920*1080 26.97 23.976 74.176 HDTV 1080P
18. 1920*1080 33.75 30.00 74.25 HDTV 1080P
19. 1920*1080 33.71 29.97 74.176 HDTV 1080P
5.2. RGB( PC ) : RGB-PC EDID DATA : Refer to adjust specification

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 800*600 37.879 60.31 40.00 VESA(SVGA) O
5 1024*768 48.363 60.00 65.00 VESA(XGA) O
6 1152*864 54.348 60.053 VESA
7 1360*768 47.712 60.015 85.50 VESA (WXGA) O
8 1920*1080 67.5 60.00 148.5 WUXGA(CEA861D) O
5.3. HDMI : EDID DATA : Refer to adjust specification
Pixel
No Resolution H-freq(kHz) V-freq.(Hz) Proposed Remark
clock(MHz)
PC
1 640*350 31.468 70.09 25.17 EGA
2 720*400 31.469 70.08 28.32 DOS
3 640*480 31.469 59.94 25.17 VESA(VGA)
4 800*600 37.879 60.31 40 VESA(SVGA)
5 1024*768 48.363 60.00 65 VESA(XGA)
6 1152*864 54.348 60.053 80.002 VESA(VGA)
7 1360*768 47.712 60.020 84.75 VESA(WXGA)
8 1280*1024 63.981 60.015 109.00 SXGA Only FHD Model
(Support to HDMI-PC)
9 1920*1080 67.5 60.00 158.40 WUXGA(Reduced Blanking) FHD only
DTV
1 720*480 15.73 59.94 13.500 SDTV, DVD 480I(525I)
2 720*480 15.75 60.00 13.514 SDTV, DVD 480I(525I)
3 720*576 15.625 50.00 13.500 SDTV, DVD 576I(625I) 50Hz
4 720*480 31.47 59.94 27 SDTV 480P
5 720*480 31.5 60.00 27.027 SDTV 480P
6 720*576 31.25 50.00 27 SDTV 576P
7 1280*720 44.96 59.94 74.176 HDTV 720P
8 1280*720 45 60.00 74.25 HDTV 720P
9 1280*720 37.5 50.00 74.25 HDTV 720P
10 1920*1080 28.125 50.00 74.25 HDTV 1080I
11 1920*1080 33.72 59.94 74.176 HDTV 1080I
12 1920*1080 33.75 60.00 74.25 HDTV 1080I
13 1920*1080 26.97 23.976 63.296 HDTV 1080P
14 1920*1080 27.00 24.000 63.36 HDTV 1080P
15 1920*1080 33.71 29.97 79.120 HDTV 1080P
16 1920*1080 33.75 30.00 79.20 HDTV 1080P
17 1920*1080 56.25 50.00 148.5 HDTV 1080P
18 1920*1080 67.432 59.94 148.350 HDTV 1080P
19 1920*1080 67.5 60.00 148.5 HDTV 1080P
5.4. 3D mode
5.2.1. RF Input
No Resolution Proposed 3D input proposed mode
1 HD 1080I 2D to 3D
720P Side by Side(Half)
Top & Bottom
2 SD 576P 2D to 3D
576I
5.2.2. RF Input (3D supported mode automatically)
No Signal 3D input proposed mode

1 Frame Compatible Side by Side(Half), Top & Bottom
5.2.3. HDMI Input 1.3(3D supported mode manually)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1 1280*720 45.00 60.00 74.25 HDTV 720P 2D to 3D
Side by Side(half),
Top & Bottom,
Single Frame Sequential
2 1280*720 37.500 50 74.25 HDTV 720P 2D to 3D
Side by Side(half),
Top & Bottom,
3 1920*1080 33.75 60.00 74.25 HDTV 1080I 2D to 3D
Side by Side(half),
Top & Bottom
4 1920*1080 28.125 50.00 74.25 HDTV 1080I 2D to 3D
Side by Side(half),
Top & Bottom
5 1920*1080 27.00 24.00 74.25 HDTV 1080P 2D to 3D
Side by Side(half),
Top & Bottom,
Checkerboard
6 1920*1080 28.12 25 74.25 HDTV 1080P 2D to 3D
Side by Side(half),
Top & Bottom,
Checkerboard
7 1920*1080 33.75 30.00 74.25 HDTV 1080P 2D to 3D
Side by Side(half),
Top & Bottom,
Checkerboard
8 1920*1080 56.25 50 148.5 HDTV 1080P 2D to 3D
Side by Side(half),
Top & Bottom,
Checkerboard,
Single Frame Sequential,
Row Interleaving,
Column Interleaving
9 1920*1080 67.50 60.00 148.5 HDTV 1080P 2D to 3D
Side by Side(half),
Top & Bottom,
Checkerboard,
Single Frame Sequential,
Row Interleaving,
Column Interleaving
5.2.4. HDMI Input 1.4b (3D supported mode automatically)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed Proposed
mode
1 640*480 31.469 / 31.5 59.94/ 60 25.175/25.2 Top-and-Bottom Secondary(SDTV 480P)
Side-by-side(half) Secondary(SDTV 480P)
2 62.938 / 63 59.94/ 60 50.35/50.4 Frame packing Secondary(SDTV 480P)
Line alternative (SDTV 480P)
3 31.469 / 31.5 59.94/ 60 50.35/50.4 Side-by-side(Full) (SDTV 480P)
4 720*480 31.25 50 27 Top-and-Bottom Secondary(SDTV 480P)
5 62.5 50 54 Frame packing Secondary(SDTV 480P)
6 31.25 50 54 Side-by-side(Full) (SDTV 480P)
7 720*576 31.25 50 27 Top-and-Bottom Secondary(SDTV 576P)
8 62.5 50 54 Frame packing Secondary(SDTV 576P)
9 31.25 50 54 Side-by-side(Full) (SDTV 576P)
10 15.625 50 27 Top-and-Bottom Secondary(SDTV 576I)
Side-by-side(half) Secondary(SDTV 576I)
11 31.25 50 54 Frame packing Secondary(SDTV 576I)
Field alternative (SDTV 576I)
12 15.625 50 54 Side-by-side(Full) (SDTV 576I)
13 1280*720 37.5 50 74.25 Top-and-Bottom Primary(HDTV 720P)
Side-by-side(half) Primary(HDTV 720P)
14 75 50 148.5 Frame packing Primary(HDTV 720P)
Line alternative (HDTV 720P)
15 37.5 50 148.5 Side-by-side(Full) (HDTV 720P)
16 44.96 / 45 59.94 / 60 74.18/74.25 Top-and-Bottom Primary(HDTV 720P)
17 89.91 / 90 59.94 / 60 148.35/148.5 Frame packing Primary(HDTV 720P)
18 44.96 / 45 59.94 / 60 148.35/148.5 Side-by-side(Full) (HDTV 720P)
Copyright LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed Proposed
mode
19 1920*1080 33.72 / 33.75 59.94 / 60 74.18/74.25 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
20 67.432 / 67.5 59.94 / 60 148.35/148.5 Frame packing Primary(HDTV 1080I)
Field alternative (HDTV 1080I)
21 33.72 / 33.75 59.94 / 60 148.35/148.5 Side-by-side(Full) (HDTV 1080I)
22 28.125 50.00 74.25 Top-and-Bottom Secondary(HDTV 1080I)
Side-by-side(half) Primary(HDTV 1080I)
23 56.25 50.00 148.5 Frame packing Primary(HDTV 1080I)
Field alternative (HDTV 1080I)
24 28.125 50.00 148.5 Side-by-side(Full) (HDTV 1080I)
25 26.97 / 27 23.97 / 24 74.18/74.25 Top-and-Bottom Primary(HDTV 1080P)
26 43.94 / 54 23.97 / 24 148.35/148.5 Frame packing Primary(HDTV 1080P)
27 26.97 / 27 23.97 / 24 148.35/148.5 Side-by-side(Full) (HDTV 1080P)
28 28.12 25 74.25 Top-and-Bottom Secondary(HDTV 1080P)
Side-by-side(half) Secondary(HDTV 1080P)
29 56.25 25 148.5 Frame packing Secondary(HDTV 1080P)
30 28.125 25 148.5 Side-by-side(Full) (HDTV 1080P)
31 33.716 / 33.75 29.976 / 30.00 74.18/74.25 Top-and-Bottom Primary(HDTV 1080P)
32 67.432 / 67.5 29.976 / 30.00 148.35/148.5 Frame packing Primary(HDTV 1080P)
33 33.716 / 33.75 29.976 / 30.00 148.35/148.5 Side-by-side(Full) (HDTV 1080P)
34 56.25 50 148.5 Top-and-Bottom Primary(HDTV 1080P)
35 67.43 / 67.5 59.94 / 60 148.35/148.50 Top-and-Bottom Primary(HDTV 1080P)
5.2.5. HDMI-PC 3D Input (3D supported mode manually)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

1 1024*768 48.36 60 65 2D to 3D, HDTV 768P
Side by Side(half)
Top & Bottom
2 1360*768 47.71 60 85.5 2D to 3D, HDTV 768P
Side by Side(half)
Top & Bottom
3 1920*1080 67.500 60 148.50 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom,
Checker Board,
4 Others - - - 2D to 3D 640*350
720*400
640*480
800*600
1152*864
5.2.6. RGB-PC 3D Input (3D supported mode manually)

1 1024*768 48.36 60 65 2D to 3D, HDTV 768P
Side by Side(half)
Top & Bottom
2 1360*768 47.71 60 85.5 2D to 3D, HDTV 768P
Side by Side(half)
Top & Bottom
3 1920*1080 67.500 60 148.50 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
4 Others - - - 2D to 3D 640*350
720*400
640*480
800*600
1152*864
1280*1024
5.2.7. USB Input (3D) (3D supported mode manually)

1 1920*1080 33.75 30 74.25 2D to 3D HDTV 1080P
Side by Side(Half)*,
Top & Bottom*,
Checkerboard*
Row Interleaving,
Column Interleaving
(Photo : side by Side(half),
Top & Bottom)
5.2.8. DLNA Input (3D)

1 1920*1080 33.75 30 74.25 2D to 3D HDTV 1080P
Side by Side(Half)*,
Top & Bottom*,
Checkerboard*
Row Interleaving,
Column Interleaving
(Photo : side by Side(half), Top
& Bottom)
5.2.9. Component 3D Input (3D supported mode manually)

1 1280*720 37.5 50 74.25 2D to 3D, HDTV 720P
Side by Side(half),
Top & Bottom
2 1280*720 45.00 60.00 74.25 2D to 3D, HDTV 720P
Side by Side(half),
Top & Bottom
3 1280*720 44.96 59.94 74.176 2D to 3D, HDTV 720P
Side by Side(half)
Top & Bottom
4 1920*1080 33.75 60.00 74.25 2D to 3D, HDTV 1080I
Side by Side(half)
Top & Bottom
5 1920*1080 33.72 59.94 74.176 2D to 3D, HDTV 1080I
Side by Side(half)
Top & Bottom
6 1920*1080 28.12 50 74.25 2D to 3D, HDTV 1080I
Side by Side(half)
Top & Bottom
7 1920*1080 67.500 60 148.50 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
8 1920*1080 67.432 59.94 148.352 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
9 1920*1080 27.000 24.000 74.25 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
10 1920*1080 28.12 25 74.25 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
11 1920*1080 56.25 50 74.25 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
12 1920*1080 26.97 23.976 74.176 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
13 1920*1080 33.75 30.000 74.25 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
14 1920*1080 33.71 29.97 74.176 2D to 3D, HDTV 1080P
Side by Side(half)
Top & Bottom
ADJUSTMENT INSTRUCTION
1. Application Range 4. PCB Assembly Adjustment
This specification sheet is applied all of the LJ22E LCD TV 4.1. M AC Address, ESN Key and Widevine
models, which produced in manufacture department or similar
LG TV factory. Key download
4.1.1. Equipment & Condition
1) Play file: keydownload.exe
2. Specification 4.1.2. Communication Port connection
(1) Because this is not a hot chassis, it is not necessary to use
1) Key Write: Com 1,2,3,4 and 115200 (Baudrate)
an isolation transformer. However, the use of isolation
2) Barcode: Com 1,2,3,4 and 9600 (Baudrate)
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs. 4.1.3. Download process
(3) The adjustment must be performed in the circumstance of 1) Select the download items.
25 5C of temperature and 6510% of relative humidity if 2) Mode check: Online Only
there is no specific designation. 3) Check the test process
(4) The input voltage of the receiver must keep 100~220V, - DETECT -> MAC_WRITE -> ESN_WRITE -> WIDEVINE_
50/60Hz. WRITE
(5) Before adjustment, execute Heat-Run for 5 minutes. 4) Play : START
5) Check of result: Ready, Test, OK or NG
After Receive 100% Full white pattern (06CH) then process
Heat-run 4.1.4. Communication Port connection
(or 8. Test pattern condition of Ez-Adjust status) 1) Connect: PCBA Jig -> RS-232C Port == PC -> RS-232C
How to make set white pattern Port
1) Press Power ON button of Service Remocon
2) Press ADJ button of Service remocon. Select 8. Test
pattern and, after select White using navigation button,
and then you can see 100% Full White pattern.
* In this status you can maintain Heat-Run useless any pattern
generator
* Notice : if you maintain one picture over 20 minutes
(Especially sharp distinction black with white pattern
-13Ch, or Cross hatch pattern 09Ch) then it can
appear image stick near black level.
3. Adjustment items 4.1.5. Download

3.1. PCB Assembly Adjustment 1) 11Y LCD TV + MAC + Widevine + ESN Key
MAC Address / ESN / Widevine Download
Adjust 1080p Comp1/RGB (Except GP3 BCM MODEL using
ADC OTP)
EDID (The Extended Display Identification Data)/DDC
(Display Data Channel) download
* If it is necessary, it can adjustment at Manufacture Line
You can see set adjustment status at 1. ADJUST CHECK
of the In-start menu
3.2. Set Assembly Adjustment

Color Temperature (White Balance) Adjustment
Using RS-232C
PING Test
Selection Factory output option
4.1.6. Inspection
- In INSTART menu, check these keys.
4.2. LAN PORT INSPECTION(PING TEST) 4.3. Using RS-232C
4.1.1. Equipment setting - Adjust 3 items at 3.1 PCB assembly adjustments adjustment
1) Play the LAN Port Test PROGRAM. sequence one after the order.
2) Input IP set up for an inspection to Test
Program. Adjustment protocol
*IP Number : 12.12.2.2. Order Command Set response
(1) Inter the Adjustment mode aa 00 00 a 00 OK00x
(2) Change the Source xb 00 40 b 00 OK40x (Adjust 480i Comp1 )
xb 00 60 (Adjust 1080p Comp1)
b 00 OK60x (Adjust 1080p RGB)
(3) Start Adjustment ad 00 10
(4) Return the Response OKx ( Success condition )
NGx ( Failed condition )
4.2.2. LAN PORT inspection (PING TEST)
1) Play the LAN Port Test Program. (5) Read Adjustment data ( main) (main : component1 480i, RGB 1080p)
2) connect each other LAN Port Jack. ad 00 20 000000000000000000000000007c007b-
3) Play Test (F9) button and confirm OK Message. ( main ) 006dx
4) remove LAN CABLE ad 00 30 (main : component1 1080p)
000000070000000000000000007c0083
0077x
(6) Confirm Adjustment ad 00 99 NG 03 00x (Failed condition)
NG 03 01x (Failed condition)
NG 03 02x (Failed condition)
OK 03 03x (Success condition)
(7) End of Adjustment ad 00 90 d 00 OK90x
See ADC Adjustment RS232C Protocol_Ver1.0
Necessary items before Adjustment items

Pattern Generator : (MSPG-925FA)
Adjust 480i Comp1 (MSPG-925FA:model :209 , pattern :65)
Comp1 Mode
Adjust 1080p Comp1 (MSPG-925FA:model :225 , pattern
:65) Comp1 Mode
Adjust RGB (MSPG-925FA:model :225 , Pattern :65) RGB-
PC Mode
If you want more information then see the below Adjustment

method (Factory Adjustment)
Adjustment sequence
aa 00 00: Enter the ADC Adjustment mode.
xb 00 40: Change the mode to Component1 (No actions)
ad 00 10: Adjust 480i Comp
ad 00 10: Adjust 1080p Comp
xb 00 60: Change to RGB-PC mode(No action)
ad 00 10: Adjust 1080p RGB
xb 00 90: Endo of Adjustmennt
5. Factory Adjustment Write HDMI EDID data
Using instruments
5.1. E
DID (The Extended Display Identification - Jig.(PC Serial to D-Sub connection) for PC, DDC adjustment.
Data)/DDC (Display Data Channel) Download - S/W for DDC recording (EDID data write and read)
- D-sub jack
Summary - Additional HDMI cable connection Jig.
It is established in VESA, for communication between PC
and Monitor without order from user for building user Preparing and setting
condition. It helps to make easily use realize Plug and Play - Set instruments and Jig. Like pic.5), then turn on PC and Jig
function. For EDID data write, we use DDC2B protocol. - Operate DDC write S/W (EDID write & read)
- It will operate in the DOS mode.
Auto Download
After enter Service Mode by pushing ADJ key LCD TV SET
Enter EDID D/L mode.
(or digital board)
Enter START by pushing OK key. PC
=> Caution : Never connect HDMI & D-sub Cable when the
user downloading . Use the proper cables below JIG
for EDID Writing.
Pic.3) For write EDID data, setting Jig and another instruments.
* EDID data for Non 3DTV (LS5700-SB Series) (Model name =

LG TV)
- HDMI EDID table (0x1E : Physical Address)
Edid data and Model option download (RS232)

NO Item CMD 1 CMD 2 Data 0
Enter Download A E 0 0 When transfer the
download Mode In Mode In,
MODE Carry the com-
mand.
Edid data Download A E *Note1 *Note2 Automatically
and download
Model (The use of a - HDMI-1 EDID table (0x43, 0x15)
option internal Data)
download 1) HDMI 1 Check sum : 0x43, 0X15 (CEA Block 0x1E :10)
Adjust A E 9 0 2) HDMI 2 Check sum : 0x43, 0X05 (CEA Block 0x1E :20)
Mode Out 3) HDMI 3 Check sum : 0x43, 0XF5 (CEA Block 0x1E :30)
4) HDMI 4 Check sum : 0x43, 0XE5 (CEA Block 0x1E :40)
Adjustment A E 9 9 To check Download
Confirma- on Assembly line.
- Analog (RGB) EDID table
tion
Manual Download
1) RGB CheckSum : 5C
* EDID data for 3DTV (LM6200 Series) (Model name = LG TV) Connection Diagram (Auto Adjustment)
Using Inner Pattern
- HDMI EDID table (0x1E : Physical Address)
Using HDMI input
HDMI-1 EDID table (0x43, 0x4D)
1) HDMI 1 Check sum : 0x43, 0X4D (CEA Block 0x1E :10)

4) HDMI 4 Check sum : 0x43, 0X1D (CEA Block 0x1E :40) <Pic.5 Connection Diagram for Adjustment White balance>
- Analog (RGB) EDID table White Balance Adjustment

If you cant adjust with inner pattern, then you can adjust it
using HDMI pattern. You can select option at Ez-Adjust Menu
7. White Balance there items NONE, INNER, HDMI. It is
normally setting at inner basically. If you cant adjust using
inner pattern you can select HDMI item, and you can adjust.
In manual Adjust case, if you press ADJ button of service

remocon, and enter Ez-Adjust Menu 7. White Balance,
then automatically inner pattern operates. (In case of Inner
originally Test-Pattern. On will be selected in The Test-
Pattern. On/Off.
5.2. Adjustment Color Temperature Connect all cables and equipments like Pic.5)
(White balance) Set Baud Rate of RS-232C to 115200. It may set 115200
Using Instruments orignally.
Color Analyzer: CA-210 (CH 14) Connect RS-232C cable to set
- Using LCD color temperature, Color Analyzer (CA-210) must Connect HDMI cable to set
use CH 14, which Matrix compensated (White, Red, Green,
Blue compensation) with CS-2100. See the Coordination
bellowed one.
Auto-adjustment Equipment (It needs when Auto-adjustment
It is availed communicate with RS-232C : Baud rate:
115200)
Video Signal Generator MSPG-925F 720p, 216Gray (Model:
217, Pattern 78)
RS-232C Command (Commonly apply) White Balance Adjustment (Manual adjustment)
RS-232C COMMAND Test Equipment: CA-210
Explanation - Using LCD color temperature, Color Analyzer (CA-210) must
CMD DATA ID use CH 14, which Matrix compensated (White, Red, Green,
wb 00 00 White Balance adjustment start Blue compensation) with CS-2100. See the Coordination
bellowed one.
Wb 00 10 Start of adjust gain (Inner white pattern) Manual adjustment sequence is like bellowed one.
wb 00 1f End of gain adjust - Turn to Ez-Adjust mode with press ADJ button of service
wb 00 20 Start of offset adjust(Inner white pattern) remocon.
- Select 10.Test Pattern with CH+/- button and press enter.
wb 00 2f End of offset adjust Then set will go on Heat-run mode. Over 30 minutes set let
wb 00 ff End of White Balance adjust on Heat-run mode.
(Inner pattern disappeared) - Let CA-210 to zero calibration and must has gap more 10cm
from center of LCD module when adjustment.
wb 00 00: Start Auto-adjustment of white balance. - Press ADJ button of service remocon and select 7.White-
wb 00 10: Start Gain Adjustment (Inner pattern) Balance in Ez-Adjust then press button of navigation
jb 00 c0 : key.
(When press button then set will go to full white mode)
wb 00 1f: End of Adjustment - Adjust at three mode (C50, 0, W50)
* If it needs, offset adjustment (wb 00 20-start, wb 00 2f-end) - If C50 (cool) mode
wb 00 ff: End of white balance adjustment (inner pattern Let B-Gain to 192 and R, G, B-Cut to 64 and then control R, G
disappear) gain adjustment High Light adjustment.
- If 0 (Medium) and W50(Warm) mode
Notice) Adjustment Mapping information Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B
gain adjustment High Light adjustment.
RS-232C COMMAND MIN CENTER MAX
- All of the three mode
[CMD ID DATA] (DEFAULT)
Let R-Gain to 192 and R, G, B-Cut to 64 and then control G, B
C50 0 W50 00 C50 0 W50 gain adjustment High Light adjustment.
R Gain Jg ja jd 00 192 192 192 192 - With volume button (+/-) you can adjust.
- After all adjustment finished, with Enter ( key) turn to
G Gain Jh jb je 00 189 175 157 192
Ez-Adjust mode. Then with ADJ button, exit from adjustment
B Gain Ji jc jf 153 127 57 192 mode
R Gain 64 64 64 127
Attachment: White Balance adjustment coordination and color
G Gain 64 64 64 127 temperature.
B Gain 64 64 64 127
Using CS-1000 Equipment.
W hen Color temperature (White balance) Adjustment - C50 (COOL) : T=11000K, uv=0.000, x=0.276 y=0.283
(Automatically) - 0 (MEDIUM) : T=9300K, uv=0.000, x=0.285 y=0.293
- Press Power only key of service remocon and operate - W50 (WARM) : T=6500K, uv=0.000, x=0.313 y=0.329
automatically adjustment.
- Set BaudRate to 115200. Using CA-210 Equipment. (14 CH)
You must start wb 00 00 and finish it wb 00 ff. - Contrast value: 208 Gray
If it needs, then adjustment Offset. Color Coordination
Color temperature Test Equipment
x y
C50 CA-210 0.2690.002 0.2730.002
0 CA-210 0.2850.002 0.2930.002
W50 CA-210 0.3130.002 0.3290.002
Using CA-210 Equipment. (18 CH) 5.3. EYE-Q function check
White Balance adjustment coordination and color temperature for (1) Turn on TV
Edge LED (2) Press EYE key of Adj. R/C
X=0.269 (3) Cover the Eye Q II sensor on the front of the using your
(0.002) hand and wait for 6 seconds
C50 13,000k K
Y=0.273 (4) Confirm that R/G/B value is lower than 10 of the Raw Data
(0.002) (Sensor data, Back lignt ) . If after 6 seconds, R/G/B
<Test signal> value is not lower than 10, replace Eye Q II sensor
X=0.285
Inner pattern (5) Remove your hand from the Eye Q II sensor and wait for 6
Color (0.002)
0 9,300k K (204 Gray seconds
Temperature Y=0.293
80IRE) (6) Confirm that ok pop up.
(0.002)
X=0.313
If change is not seen, replace Eye Q II sensor
(0.002)
W50 6,500k K
Y=0.329
(0.002)
White Balance adjustment table

Color coordination is different according to heat run time.
LSxxxx, LM5xxx, LM6xxx, 42LM7xxx, AUO(65LM6200) Step2 Step3 Step4
Cool Medium Warm

H/R Time(Min) x y x x y x
269 273 285 293 313 329
1 0-2 280 287 296 307 320 337
2 3-5 279 285 295 305 319 335 Step5 Step6
3 6-9 277 284 293 304 317 334
4 10-19 276 283 292 303 316 333
5.4. Magic Motion remote controller Check
5 20-35 274 280 290 300 314 330
5.4.1 Test equipment
6 36-49 272 277 288 297 312 327 - R F-remote controller for check, IR-KEY-CODE remote
7 50-79 271 275 287 295 311 325 controller.
- Check AA battery before test. A recommendation is that a
8 80-119 270 274 286 294 310 324 tester change battery every lots.
9 Over 120 269 273 285 293 309 323
5.4.2. Test
47/55LM7xxx, 47/55LM8xxx, 47/55LM9xxx (1) Make pairing with TV set by pressing Mute (START) key
Cool Medium Warm on RCU.
(2) Check a cursor on screen by pressing ENTER or OK
H/R Time(Min) x y x x y x
key of RCU
269 273 285 293 313 329 (3) Stop paring with TV set by pressing VOL+ (STOP) key.
1 0-2 283 293 299 313 320 339
2 3-5 282 291 298 311 319 337
3 6-9 281 290 297 310 318 336
4 10-19 279 289 295 309 316 335
5 20-35 277 284 293 304 314 330
6 36-49 274 279 290 299 311 325
7 50-79 271 277 287 297 308 323
8 80-119 270 274 286 294 307 320
9 Over 120 269 273 285 293 306 319
5.5. 3D pattern test (Only for 3D models) 5.6. HDMI ARC Function Inspection
5.5.1. Test equipment 5.6.1. Test equipment
(1) P
attern Generator MSHG-600 or MSPG-6100 (HDMI 1.4 - Optic Receiver Speaker
support) - MSHG-600 (SW: 1220 )
(2) Pattern: HDMI mode (model No. 872, pattern No. 83) - HDMI Cable (for 1.4 version)
5.5.2. Test method 5.6.2. Test method

(1) Input 3D test signal as Fig.1. (1) Insert the HDMI Cable to the HDMI ARC port from the
master equipment (HDMI1)
(2) Check the sound from the TV Set
(2) Press OK key as a 3D input OSD is shown.

(3) C
heck pattern as Fig2 without 3D glasses. (3D mode
without 3D glasses)
(3) Check the Sound from the Speaker or using AV & Optic
TEST program (Its connected to MSHG-600)
Fig.2 Fig.3
<OK in 3D mode without 3D glasses> <NG in 3D mode without 3D glasses>
* Remark: Inspect in Power Only Mode and check SW version

in a master equipment
5.7. Selection of Country option

Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.
Models: All models which use LJ22E Chassis (See the first
page.)
Press In-Start button of Service Remocon, then enter the
Option Menu with PIP CH- Button
Select one of these three (USA, CANADA, MEXICO) defends
on its market using Vol. +/-button.
Caution : Dont push The INSTOP KEY after completing the

function inspection
6. GND and ESD Testing 8. USB DOWNLOAD (*.epk file download)
6.1. Prepare GND and ESD Testing (1) Put the USB Stick to the USB socket
(1) C
heck the connection between set and power cord (2) Press Menu key, and move OPTION
(3)
6.2. Operate GND and ESD auto-test

(1) F ully connected (Between set and power cord) set enter
the Auto-test sequence.
(2) Connect D-Jack AV jack test equipment.
(3) Turn on Auto-controller(GWS103-4)
(4) Start Auto GND test.
(5) If its result is NG, then notice with buzzer.
(6) If its result is OK, then automatically it turns to ESD Test.
(7) Operate ESD test
(8) If its result is NG, then notice with buzzer.
(9) If its result is OK, then process next steps. Notice it with
Good lamp and STOPER Down.Check Items.
(10) Test Voltage (4) Press FAV Press 7 times.
- GND: 1.5KV/min at 100Ma
- Signal: 3KV/min at 100Ma
(11) Test time: just 1 second.
(12) Test point
- GND test: Test between Power cord GND and Signal cable
metal GND.
- E SD test: Test between Power cord GND and Live and
neutral.
(13) Leakage current: Set to 0.5Ma(rms)
7. Default Service option

(5) Select download file (epk file)
7.1. ADC-Set
R-Gain adjustment Value (default 128)
G-Gain adjustment Value (default 128)
B-Gain adjustment Value (default 128)
R-Offset adjustment Value (default 128) (6) After download is finished, remove the USB stick.
G-Offset adjustment Value (default 128) (7) Press IN-START key of ADJ remote control, check the
B-Offset adjustment Value (default 128) S/W version
SCREW WORKING GUIDE
Screw specification and application situation FAB31339402
A A A A (M3*L4.5, BK, Machine)
12EA
A A
B B
Warning
FAB30078812
A Check Screw Type When Screw is assembled
(M6*L10, BK, Machine) at A Part. If C Screw is used at the A part
A 4EA A
A Module will get damaged
B A B
A
C C C C C C C C
FAB31339201
(M3*L10, BK, Taptite)
8EA D
D
FAB30016122
D
(M4*L20, BK, Taptite) D
4EA
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
900
910
400
521
540
810
530
LV1
800
200
AG1
120
WM1
511
A5
510
300
A2

TV
TV

//

3D

3D

310
EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
Crystal Matching Test result
: 27pF -> 20pF -> 24pF
IC104-*1
M24256-BRMN6TP
IC104-*2
R1EX24256BSAS0A X-TAL
+3.3V_NORMAL
NVRAM E0
E1
1 8
VCC
WC
A0
A1
1 8
VCC
WP
+3.3V_NORMAL +3.3V_NORMAL X100
27MHz
IC
R119
2 7 2 7 MT5369_XTAL_IN MT5369_XTAL_OUT
E2
3 6
SCL A2
3 6
SCL
C113 C115 0
24pF 24pF
R103 R105 IC104 +3.3V_NORMAL VSS
4 5
SDA VSS
4 5
SDA
MTK_JTAG Close to eMMC Flash
4.7K 4.7K
OPT
AT24C256C-SSHL-T
NVRAM_ST NVRAM_RENESAS
JTAG AR100
10K
R146
10K
R152 MTK_JTAG
1K P100
12507WS-12L
(IC8100)
R104 A0 VCC
MTK_JTAG
1 8 Write Protection 1 EMMC_CLK
4.7K
OPT A1 WP - Low : Normal Operation 2
2 7 JTRST# R174 MT5369_NON_RM
- High : Write Protection 10K
A2 SCL
JTDI 3
IC105
3 6 R136 33
I2C_SCL5 JTMS 4 LGE2112
+3.3V_NORMAL
GND SDA JTCLK 5
4 5 R137 33
I2C_SDA5
6
R143 33 AP14 AR18

JTDO 7 JTCLK JTCK U0TX SOC_TX
NVRAM_ATMEL AM14 AP18
MTK_JTAG 8 JTDI JTDI U0RX SOC_RX R165 R167
+3.3V_NORMAL AR14 4.7K 4.7K
JTDO JTDO
9 AR15 AU16
R144 JTMS JTMS U1RX M_REMOTE_RX
10K 10 AN14 AT16
JTRST# JTRST U1TX M_REMOTE_TX
HDCP EEPROM HDCP_EEPROM_MICRO

IC100-*1
24LC16B R145 R149
11
12 OSDA0
OSCL0
AP12
AN12
OSDA0
OSCL0
POWE
POOE
A35
C33
EMMC_CMD
10K 10K 13
B34 EMMC_DATA[2-7]
A0 1
8 VCC MTK_JTAG MTK_JTAG POCE1
AP15 D33
+3.3V_NORMAL OSDA1 OSDA1 POCE0
HDCP_EEPROM_ST AN15 D29 EMMC_DATA[7]
A1 2 WP
IC100 7 OSCL1 OSCL1 PDD7
C30 EMMC_DATA[6]
M24C16-R
C101 A2 3 SCL PDD6 EMMC_DATA[5]
0.1uF 6 AT34 D30
NC_1 VCC 16V MT5369_XTAL_IN XTALI PDD5 EMMC_DATA[4]
1 8 VSS 4 SDA AU34 B31 +3.3V_NORMAL
5 MT5369_XTAL_OUT XTALO PDD4
A31 EMMC_DATA[3]
NC_2 WC R181 4.7K
2 7 AVDD_33SB PDD3 EMMC_DATA[2]
AK27 B32
NC_3 AVDD33_XTAL_STB PDD2 R157
SCL R191 22
3 6 I2C_SCL1 C116 AH26 A32 4.7K
0.1uF AVSS33_XTAL_STB PDD1
VSS 4 SDA C32 OPT
5 R192 22 PDD0
I2C_SDA1 D32
PARB R178
AVDD_33SB A34 4.7K
+3.3V_NORMAL PACLE EMMC_DATA[1]
AK18 C34 OPT
AVDD33_VGA_STB PAALE EMMC_DATA[0]
C117 AK17 C29
0.1uF AVSS33_VGA_STB EMMC_CLK EMMC_CLK
AM20 +3.3V_NORMAL
R147 R153 STRAPPING LED_PWM0 LED_PWM1 OPCTRL3 OPWRSB
R150 VDD3V3
1K 1K 1K
OPT OPT ICE mode + 27M + Serial boot 0 0 0 AK23 AM22
AVDD33_PLLGP ORESET R155
C118 AM27 10K
LED_PWM0 AVSS33_PLLGP
ICE mode + 27M + ROM to Nand boot 0 0 1 0.1uF AU21 R158 33 OPT
R172
LED_PWM1 OIRI IR
OPT SOC_RESET
OPCTRL3 ICE mode + 27M + Rom to eMMC boot 0 1 0
R151 from eMMC pins (share pins w/s NAND) AJ20 D27 R159 4.7K 22 C114
R148 R154 AVDD10_LDO FSRC_WR
1K 1K 1K 0.1uF
OPT C107 C108 16V
ICE mode + 27M + ROM to eMMC boot 0 1 1
2.2uF 2.2uF AT21
from SDIO pins STB_SCL STB_SCL
10V 10V AR21
CI_ADDR[0-14] STB_SDA STB_SDA
CI_ADDR[0] H32 T34 FE_TS_DATA[0-7]

GPIO0 DEMOD_RST PCM_RST
CI_ADDR[1] F37 T32
GPIO1 DEMOD_TSCLK FE_TS_CLK
CI_ADDR[2] F36 T36 FE_TS_DATA[0]
GPIO2 DEMOD_TSDATA0 FE_TS_DATA[1]
CI_ADDR[3] G37 U36
CI_ADDR[4] G36 T33
CI_ADDR[5] G35 T30
MT5369_RM
IC105-*1
GPIO5 DEMOD_TSDATA3 FE_TS_DATA[4] EXTERNAL DEMOD
LGE2112-AL
CI_ADDR[6] G34 V33
I2C_1 : AMP, L/DIMMING,HDCP KEY GPIO6 DEMOD_TSDATA4 -> SOC
CI_ADDR[7] H34 V32 FE_TS_DATA[5]
I2C_2 : T-CON AC1
AC2
DDRV_44 ARDQM0
C19
C21 CI_ADDR[8] L34
GPIO7 DEMOD_TSDATA5
V31 FE_TS_DATA[6]
DDRV_45 ARDQS0
I2C_3 : MICOM A3 B21

GPIO8 DEMOD_TSDATA6
I2C I2C_4 : S/Demod,T2/Demod, LNB
A4
B4
C4
D4
DDRV_1
DDRV_2
DDRV_5
DDRV_8
DDRV_10
ARDQS0
ARDQ0
ARDQ1
ARDQ2
ARDQ3
C23
B17
D23
C17
SOC -> CI SLOT
MT5369_MCLKI
CI_ADDR[9]
CI_ADDR[10]
L32
K33
GPIO9 DEMOD_TSDATA7
V30
T35
FE_TS_SYNC
FE_TS_DATA[7]
I2C_5 : NVRAM AC3

B3
C3
DDRV_4
DDRV_7
ARDQ4
ARDQ5
D24
C16
C24
MT5369_MIVAL_ERR CI_ADDR[11] K32
GPIO10 DEMOD_TSSYNC
T31
+3.3V_NORMAL I2C_6 : TUNER_MOPLL(T/C,ATV) AC4
DDRV_46
DDRV_47
ARDQ6
ARDQ7
D15 GPIO11 DEMOD_TSVAL FE_TS_VAL
MT5369_MISTRT CI_ADDR[12] H33
G10 D21
G9
MEMTP ARDQM1
B20
GPIO12
MEMTN ARDQS1
C20 CI_ADDR[13] L35 N36
G13
ARDQS1
A17 GPIO13 CI_INT /PCM_REG
RVREF_B ARDQ8
G21
RVREF_A ARDQ9
A23
SOC -> CI SLOT CI_ADDR[14] K36 T37
ARDQ10
D17
B23
GPIO14 CI_TSCLK /PCM_CE1
F10
ARDQ11
D20 J32 R35
R128 R131 R134 R139 R142 R173 R185 R188 R156 R160 ARCKE ARDQ12
D22 MT5369_TS_OUT[0-7] GPIO15 CI_TSDATA0 MT5369_TS_SYNC CI SLOT -> SOC
R164 R177 D9
ARDQ13
D19 J34 R37
1.2K 1.2K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K 2.7K C9
ARCLK1 ARDQ14
C22 /PCM_WE
2.7K 2.7K ARCLK1 ARDQ15 GPIO16 CI_TSSYNC
A20 A7 K34 R36 /PCM_OE
A21
ARCLK0
ARCLK0
ARDQM2
ARDQS2
B9 GPIO17 CI_TSVAL
R110 33 A9 MT5369_TS_OUT[0] K35
STB_SCL I2C_SCL1 E18
ARODT
ARDQS2
ARDQ16
C12
GPIO18
F17 D6
R111 33 E17
ARRAS ARDQ17
B12 MT5369_TS_OUT[1] K37 R34
STB_SDA I2C_SDA1 E16
ARCAS ARDQ18
C5 GPIO19 PVR_TSCLK MT5369_TS_VAL CI SLOT -> SOC
ARCS ARDQ19
D14 C13 MT5369_TS_OUT[2] J36 R32
OPCTRL_11_SCL R112 33 I2C_SCL2
ARWE ARDQ20
ARDQ21
A5
GPIO20 PVR_TSVAL CI_A_VS1
B14 A12
ARRESET ARDQ22
B5 MT5369_TS_OUT[3] J37 R33
OPCTRL_10_SDA R113 33 I2C_SDA2 A13
ARDQ23
GPIO21 PVR_TSSYNC MT5369_TS_CLK CI SLOT -> SOC
ARBA0
G11
ARBA1 ARDQM3
E10 MT5369_TS_OUT[4] J35 P33
OSCL1 R114 33 I2C_SCL3
D16
ARBA2 ARDQS3
C8
D8
GPIO22 PVR_TSDATA0 /PCM_IRQA
F18
ARDQS3
C6 MT5369_TS_OUT[5] J33 P34
OSDA1 R115 33 I2C_SDA3
ARCSX ARDQ24
ARDQ25
D10 CI_DATA[0-7] GPIO23 PVR_TSDATA1 /PCM_WAIT
C15
ARA14 ARDQ26
D7 MT5369_TS_OUT[6] G33
OSCL2 R116 33 I2C_SCL4
A15
F13
ARA13 ARDQ27
C11
C7
GPIO24 +3.3V_NORMAL
C14
ARA12 ARDQ28
C10 MT5369_TS_OUT[7] H35 N37
R117 33 ARA11 ARDQ29
GPIO25 SPI_CLK1 /CI_CD2
OSDA2 I2C_SDA4 F11
E15
ARA10 ARDQ30
B7
B10 CI_DATA[0] H31 P35
R118 33 D13
ARA9 ARDQ31
GPIO26 SPI_CLK /CI_CD1
OSCL0 I2C_SCL5 B15
ARA8
ARA7 CI_DATA[1] F34 N34
E14 N14
OSDA0 R121 33 I2C_SDA5 F16

ARA6
ARA5
AVDD33_MEMPLL
AVSS33_MEMPLL
N15 GPIO27 SPI_DATA /PCM_IORD R168 R161
E13
ARA4
CI_DATA[2] E36 N35 R166 4.7K 4.7K
OPCTRL_1_SCL R122 33 I2C_SCL6
B13
ARA3 GPIO28 SPI_CLE /PCM_IOWR 2.7K
A14
F14
ARA2 DVSS_50
R1
P21 CI_DATA[3] N33 OPT OPT
OPCTRL_0_SDA R123 33 I2C_SDA6 F15
ARA1 DVSS_48
GPIO29 OPT
ARA0
CI_DATA[4] P32 AU12 R171
GPIO30 OPWM2 PWM_DIM2
CI_DATA[5] M35 AT12 22
GPIO31 OPWM1 PWM_DIM1
CI_DATA[6] M37 AR12 R169 10K R170 22
GPIO32 OPWM0 A_DIM
CI_DATA[7] M33 OPT
GPIO33 R120 C120
F35 A37 R126
MT5369_TS_IN[0] 1K 1K 2.2uF
GPIO34 SD_D0 SMARTCARD_CLK
E35 C35 10V
MT5369_TS_IN[1] GPIO35 SD_D1 SMARTCARD_PWR_SEL OPT
E37 A36 PWM2_PULL_DOWN_1K
MT5369_TS_IN[2] GPIO36 SD_D2 SMARTCARD_RST
MT5369_TS_IN[3] N32 B35 PWM1_PULL_DOWN_1K
+3.3V_NORMAL Model Option CI SLOT -> SOC

MT5369_TS_IN[4]
M34
M36
GPIO37
GPIO38
SD_D3
SD_CMD
B36
B37
SMARTCARD_DET
SMARTCARD_VCC SMARTCARD_CLK
MT5369_TS_IN[5] GPIO39 SD_CLK SMARTCARD_DATA SMARTCARD_PWR_SEL
M32 FOR JAPAN
MT5369_TS_IN[6] GPIO40 SMARTCARD_RST
MT5369_TS_IN[7] L33
MTK_OPTIC_Tx_IC
GPIO41 SMARTCARD_DET
MTK_DVB_T2_TUNER
MTK_3D_DEPTH_IC
MTK_Int_FRC/URSA5
MTK_DVB_C2_TUNER
MTK_DVB_S_TUNER
/USB_OCD2 E33 AT11

SoC GPIO42 LDM_CS
MTK_DDR_768MB
SMARTCARD_VCC
MTK_FRC3/URSA5
E32 AU11
MTK_CP_BOX
NO_FRC internal LG FRC2 Reserved /USB_OCD1 L/DIM0_SCLK

GPIO43 LDM_CLK SMARTCARD_DATA
FRC
MTK_FHD
MTK_EPI
/USB_OCD3 F32 AR10

R140
4.7K
R135
4.7K
R175
4.7K
R130
4.7K
L/DIM0_VS
R186
4.7K
R132
4.7K
R125
4.7K
GPIO44 LDM_VSYNC
R106
4.7K
R108
4.7K
R189
4.7K
R101
4.7K
MODEL_OPT_0 A29 AM9 FOR JAPAN

0 0 1 1 USB_CTL2 L/DIM0_MOSI
GPIO45 LDM_DO
D31 AP10
MODEL_OPT_1 0 USB_CTL1 GPIO46 LDM_DI
1 0 1 C31
USB_CTL3 GPIO47
E30
MODEL_OPT_0 EPI_LOCK6 GPIO48
E31 AN22
MODEL_OPT_0 GPIO49 LED_PWM1 LED_PWM1
MODEL_OPT_1 F31 AP21
C100 C102 C103 C105 C106 C104 MODEL_OPT_1 GPIO50 LED_PWM0 LED_PWM0
HIGH LOW E29
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
MODEL_OPT_2 ERROR_OUT GPIO51
OPT OPT OPT OPT OPT OPT AP9
MODEL_OPT_2 FHD HD MODEL_OPT_3 GPIO52
MODEL_OPT_3 AT9 5V Tolerance
MODEL_OPT_7 M_RFModule_ISP GPIO53
MODEL_OPT_3 OPTIC NON_OPTIC AR9 AU20
/S2_RESET MODEL_OPT_4 MODEL_OPT_5 GPIO54 OPCTRL11 OPCTRL_11_SCL
3D DEPTH 3D_Depth_IC SC_ID_SOC AU9 AT20
MODEL_OPT_4 NON_3D_Depth_IC MODEL_OPT_6 GPIO55 OPCTRL10 OPCTRL_10_SDA
MODEL_OPT_5 HEAT SINK SMD GASKET AN18
DDR DDR_768MB DDR_Default OPCTRL9 COMP1_DET
MODEL_OPT_5 NON_EU AP20
MODEL_OPT_6 OPCTRL8 SC_DET
R193 10K AN23 AM18
M_RFModule_ISP MODEL_OPT_6 CP BOX Enable Disable ADIN0_SRV OPCTRL7 DSUB_DET
MODEL_OPT_7 R176 10K AN24 AN19
MTK_H/S_3.5T
ADIN1_SRV OPCTRL6 HP_DET

MTK_H/S_3.5T
MTK_H/S_3.5T
MTK_H/S_9.5T
MTK_H/S_3.5T
MODEL_OPT_7 R162
MDS62110214
MODEL_OPT_8 10K AP23 AP19

MTK_NON_OPTIC_Tx_IC
MDS62110213
MDS62110213
MDS62110213
MDS62110213
T2 Tuner Support Not Support AV1_CVBS_DET

R163 ADIN2_SRV OPCTRL5
10K AR23 AR19
MTK_NON_DVB_T2_TUNER
MTK_NON_DVB_C2_TUNER
MODEL_OPT_9
MTK_NON_3D_DEPTH_IC
MTK_NO_FRC/Int_FRC
AMP_RESET_SOC
MTK_NON_DVB_S_TUNER
M104
MODEL_OPT_8 ADIN3_SRV OPCTRL4

M100
M101
M102
M103
S Tuner Support Not Support AU23 AN21

MTK_NO_FRC/FRC3
MTK_DDR_DEFAULT
M_RFModule_RESET ADIN4_SRV OPCTRL3 OPCTRL3

MTK_NON_CP_BOX
MODEL_OPT_10 AT23 AM19

MTK_NON_EPI
MODEL_OPT_9 Reserved Default OPC_EN ADIN5_SRV OPCTRL2 RF_SWITCH_CTL

AM24 AN20
MTK_HD
/TU_RESET ADIN6_SRV OPCTRL1 OPCTRL_1_SCL

R133
4.7K
R102
4.7K
R107
4.7K
R129
4.7K
R127
4.7K
R109
4.7K
R141
4.7K
R138
4.7K
R184
4.7K
R187
4.7K
R190
4.7K
MODEL_OPT_10 EPI Support Not Support AM23 AR20

MODEL_OPT_4 /S2_RESET ADIN7_SRV OPCTRL0 OPCTRL_0_SDA
MODEL OPTION 8 is just for CP Box

It should not be appiled at MP
R124
AMP_RESET_SOC AMP_RESET_N
33
AMP_RESET_BY_SOC R100 AMP_RESET_BY_SOC
10K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MID_MAIN_1 2011.12.13
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. 8
Copyright 2012 LG Electronics. Inc. All right reserved.

Only for training and service purposes LGE Internal Use Only
PLACE AT JACK SIDE
C319
1608 sizs For EMI
10uF
R314 16V
PC_L_IN PC_L_IN_SOC
0 1608 sizs For EMI
R300 R333
C300 C314
470K AV1_CVBS_IN AV1_CVBS_IN_SOC
560pF 100pF
OPT 120-ohm
50V 50V
C344 C348 R330
OPT OPT ZD300 C340
27pF 100pF 75
5.48VTO5.76V 50V 50V 47pF
C320 1% 50V
1608 sizs For EMI ZD301 OPT
10uF
R336 16V 5.48VTO5.76V
PC_R_IN PC_R_IN_SOC
0 1.0Vpp 1608 sizs For EMI
0 R374
R301 C301 C315 COMP1_Y COMP1_Y_SOC
470K 560pF 100pF
OPT 50V 50V C388 C394
ZD302 C384
OPT OPT 27pF 27pF R355
5.48VTO5.76V 75 10pF
50V 50V
50V
ZD303 OPT OPT 1%
C345 5.48VTO5.76V
1608 sizs For EMI
10uF
R344 16V
AV1_L_IN AV1_L_IN_SOC 1608 sizs For EMI
30K 0 R373
COMP1_Pb COMP1_Pb_SOC
R328
C338 C342
470K C386 C391
560pF 100pF
OPT 50V 50V ZD304 27pF 27pF R354 C379
5.48VTO5.76V 50V 50V 75 10pF
+5V_NORMAL OPT
OPT OPT 1% 50V
ZD305
5.48VTO5.76V
DSUB_VSYNC DSUB_VSYNC_SOC
R308 OPT C346
1.2K C329 R324 22 1608 sizs For EMI
R325 10uF
R302 10V OPT 5pF 2K
R345 16V 1608 sizs For EMI
180 50V 0
ARC C311 1uF COMP1_Pr R372 COMP1_Pr_SOC
HDMI_ARC OPT AV1_R_IN AV1_R_IN_SOC
30K
R303
82 R309 C385 C392 C378
100K R329 C339 C343 ZD306 R353
DSUB_HSYNC OPT DSUB_HSYNC_SOC 27pF 27pF 75 10pF
C330 R323 470K 560pF 100pF 5.48VTO5.76V
22 R326 50V
FOR EMI 50V 50V
5pF OPT 50V 50V 1%
2K OPT
50V OPT ZD307 OPT
OPT 5.48VTO5.76V
IC105 IC105
LGE2112 LGE2112
CHANGE SYMBOL
AG3
AA32 AG35 AO3N TXC4N
HDMI_CEC HDMI_0_RX_0 D0+_HDMI2_JACK AG4
AG34 AO3P TXC4P
HDMI_0_RX_0B D0-_HDMI2_JACK AG1
AG33 AG37 AO4N TXC3N
DDC_SCL_2_JACK HDMI_0_SCL HDMI_0_RX_1 D1+_HDMI2_JACK AG2
AE33 AG36 AO4P TXC3P
DDC_SCL_3_JACK HDMI_1_SCL HDMI_0_RX_1B D1-_HDMI2_JACK AF3
AC33 AF35 AOCLKN TXCCLKN
DDC_SCL_1_SOC HDMI_2_SCL HDMI_0_RX_2 D2+_HDMI2_JACK AF4
AH32 AF34 AOCLKP TXCCLKP
DDC_SCL_4_JACK HDMI_3_SCL HDMI_0_RX_2B D2-_HDMI2_JACK AE3
AH35 AO2N TXC2N
HDMI_0_RX_C CK+_HDMI2_JACK AE4
AF33 AH34 AO2P TXC2P
DDC_SDA_2_JACK HDMI_0_SDA HDMI_0_RX_CB CK-_HDMI2_JACK AE1
AD33 AO1N TXC1N
DDC_SDA_3_JACK HDMI_1_SDA F27 AE2
AB33 AE37 MODEL_OPT_8 TCON0 AO1P TXC1P
DDC_SDA_1_SOC HDMI_2_SDA HDMI_1_RX_0 D0+_HDMI3_JACK E27 AD1
AH33 AE36 MODEL_OPT_9 TCON1 AO0N TXC0N
DDC_SDA_4_JACK HDMI_3_SDA HDMI_1_RX_0B D0-_HDMI3_JACK F30 AD2
AD35 MODEL_OPT_10 TCON2 AO0P TXC0P
HDMI_1_RX_1 D1+_HDMI3_JACK F29
R304 1K AG31 AD34 GCLK_SOC TCON3
5V_HDMI_2_JACK HDMI_0_PWR5V HDMI_1_RX_1B D1-_HDMI3_JACK B27 AL3
R305 1K AE31 AC35 MCLK_SOC TCON4 AE4N TXD4N
5V_HDMI_3_JACK HDMI_1_PWR5V HDMI_1_RX_2 D2+_HDMI3_JACK A27 AL4
R306 1K AC31 AC34 GST_SOC TCON5 AE4P TXD4P
5V_HDMI_1_SOC HDMI_2_PWR5V HDMI_1_RX_2B D2-_HDMI3_JACK B28 AL1
R307 1K AH31 AE35 EO_SOC TCON6 AE3N TXD3N
5V_HDMI_4_JACK HDMI_3_PWR5V HDMI_1_RX_C CK+_HDMI3_JACK A28 AL2
AE34 VCOM_DYN TCON7 AE3P TXD3P
HDMI_1_RX_CB CK-_HDMI3_JACK C28 AK3
AG32 PMIC_RESET TCON8 AECLKN TXDCLKN
HDMI_HPD_2_JACK HDMI_0_HPD D28 AK4
AE32 AB35 2D/3D_CTL TCON9 AECLKP TXDCLKP
HDMI_HPD_3_JACK HDMI_1_HPD HDMI_2_RX_0 D0+_HDMI1_SOC E28 AJ3
AC32 AB34 MODEL_OPT_2 TCON10 AE2N TXD2N
HDMI_HPD_1_SOC HDMI_2_HPD HDMI_2_RX_0B D0-_HDMI1_SOC F28 AJ4
AJ32 AA35 PCM_5V_CTL TCON11 AE2P TXD2P
HDMI_HPD_4_JACK HDMI_3_HPD HDMI_2_RX_1 D1+_HDMI1_SOC B29 AJ1
+1.2V_MTK_AVDD AA34 EMMC_RST TCON12 AE1N TXD1N
HDMI_2_RX_1B D1-_HDMI1_SOC AJ2
AA24 AA37 +1.2V_MTK_AVDD AE1P TXD1P
AVDD12_HDMI_0_RX HDMI_2_RX_2 D2+_HDMI1_SOC AH3
Y24 AA36 AE0N TXD0N
C303 C306 AVDD12_HDMI_1_RX HDMI_2_RX_2B D2-_HDMI1_SOC AH4
0.1uF 0.1uF W24 AC37 AE0P TXD0P
AVDD12_HDMI_2_RX HDMI_2_RX_C CK+_HDMI1_SOC AG6
AB24 AC36 AVDD12_LVDS_1
AVDD12_HDMI_3_RX HDMI_2_RX_CB CK-_HDMI1_SOC C350 C354 AJ6 AT2
AVDD12_LVDS_2 BO4N TXA4N CI_ADDR[0-14]
0.1uF 0.1uF VDD3V3 AF6 AU2 CH3
AB29 AK35 AVDD12_VPLL BO4P TXA4P
AVDD33_HDMI_0_RX HDMI_3_RX_0 D0+_HDMI4_JACK AE6 AT1 CI_ADDR[0]
VDD3V3 AA29 AK34 AVDD33_LVDSB BO3N TXA3N TP312
AVDD33_HDMI_1_RX HDMI_3_RX_0B D0-_HDMI4_JACK AH7 AU1 CI_ADDR[1]
Y29 AJ35 C347 AVDD33_LVDSA BO3P TXA3P TP313
AVDD33_HDMI_2_RX HDMI_3_RX_1 D1+_HDMI4_JACK AR1 CI_ADDR[2]
AC29 AJ34 0.1uF BOCLKN TXACLKN TP314
AVDD33_HDMI_3_RX HDMI_3_RX_1B D1-_HDMI4_JACK AJ5 AR2
TXACLKP
CH2 CI_ADDR[3]
TP315
AJ37 AVSS12_LVDS_2 BOCLKP
HDMI_3_RX_2 D2+_HDMI4_JACK AG5 AP1 CI_ADDR[4]
C304 C307 AB30 AJ36 AVSS12_LVDS_1 BO2N TXA2N TP316
AVSS33_HDMI_RX_1 HDMI_3_RX_2B D2-_HDMI4_JACK AF5 AP2 CI_ADDR[5]
0.1uF 0.1uF AD30 AJ33 TXA2P TP317
AVSS12_VPLL BO2P CI_ADDR[6]
AVSS33_HDMI_RX_2 HDMI_3_RX_C CK+_HDMI4_JACK AE5 AN1
AF31 AK33 AVSS33_LVDSB BO1N TXA1N TP318
CK-_HDMI4_JACK AH5 AN2 CI_ADDR[7]
AF32
AVSS33_HDMI_RX_3 HDMI_3_RX_CB
AVSS33_LVDSA BO1P TXA1P CH1 TP319
AVSS33_HDMI_RX_4 AM3 CI_ADDR[8]
BO0N TXA0N TP320
AG7 AM4 CI_ADDR[9]
C36 REXT_VPLL BO0P TXA0P TP321
USB_DP3 USB_DP_P0 MT5369_MCLKI CI_ADDR[10]
C37 R343 TP322
USB_DM3 24K AT6 MT5369_MIVAL_ERR CI_ADDR[11]
USB_DM_P0
BE4N TXB4N TP323
1% AU6 MT5369_MISTRT CI_ADDR[12]
D36 BE4P TXB4P TP324
USB_DP2 USB_DP_P1 AP6 CI_ADDR[13]
D37 BE3N TXB3N TP325
USB_DM2 USB_DM_P1 AR6 For PCB Pattern CI_ADDR[14]
Port was changed !!!! BE3P
AP5
TXB3P TP326
AT13 BECLKN TXBCLKN MT5369_TS_OUT[0-7] TP327
WIFI_DP USB_DP_P2 AR5 HP_OUT HP_OUT
AU13 BECLKP TXBCLKP 1.2K R351 1.2K R369 TP328
WIFI_DM USB_DM_P2 AT4 HP_ROUT_MAIN
BE2N TXB2N 1.2K R352 1.2K R370 TP329
AU4 MT5369_TS_OUT[0]
AT14 BE2P TXB2P CH6 C377 C390 C395
HP_LOUT_MAIN
TP330
USB_DP1 USB_DP_P3 SC_R_IN_SOC AP4 HP_OUT C383 HP_OUT MT5369_TS_OUT[1]
VDD3V3 AU14 BE1N TXB1N 1200pF 1200pF 1200pF 1200pF TP331
USB_DM1 SC_L_IN_SOC AR4 MT5369_TS_OUT[2]
USB_DM_P3
BE1P TXB1P CH5 HP_OUT HP_OUT HP_OUT HP_OUT TP332
AP3 MT5369_TS_OUT[3]
D35 BE0N TXB0N TP333
AR3 MT5369_TS_OUT[4]
AP13
AVDD33_USB_P0P1
For PCB Pattern BE0P TXB0P CH4 SCART_Rout_SOC TP334
AVDD33_USB_P2P3 SCART_Lout_SOC MT5369_TS_OUT[5]
C302 CI_DATA[0-7] TP335
AU37 AN35 MT5369_TS_OUT[6]
0.1uF D34 AIN0_R_AADC AR0_ADAC TP336
AVSS33_USB_P1 AU35 AN34 MT5369_TS_OUT[7]
AR13 AUDIO_R_OUT_COMMERCIAL TP337
AIN0_L_AADC AL0_ADAC CI_DATA[0]
AVSS33_USB_P2 R311 30K AT35 AUDIO_L_OUT_COMMERCIAL
PC_R_IN_SOC AIN1_R_AADC TP338
R310 30K AT37 AM32 CI_DATA[1]
W35 AT18 PC_L_IN_SOC AIN1_L_AADC AR1_ADAC TP339
PCIE11_TXP TXVP_0 EPHY_TDP AU36 AM34 CI_DATA[2]
W34 AU18 AIN2_R_AADC AL1_ADAC TP340
+1.2V_MTK_AVDD PCIE11_TXN TXVN_0 EPHY_TDN AP34 CI_DATA[3]
Y34 AIN2_L_AADC TP341
PCIE11_RXN R338 0 AT36 AM37 CI_DATA[4]
Y35 AU17 AV1_R_IN_SOC AIN3_R_AADC AR2_ADAC TP342
PCIE11_RXP RXVN_1 EPHY_RDN R337 0 AR37 AM33 CI_DATA[5]
VDD3V3 C316 AT17 AV1_L_IN_SOC AIN3_L_AADC AL2_ADAC TP343
RXVP_1 EPHY_RDP AR33 CI_DATA[6]
0.1uF U24 TP344
AIN4_R_AADC CI_DATA[7]
AVDD12_PCIE11 AP32 AM36 1.2K R376 1.2K R378
V24 AN16 AIN4_L_AADC AR3_ADAC TP345
AVDD33_PCIE11 PHYLED1 AR36 AM35 1.2K R377 1.2K R379 MT5369_TS_IN[0]
C308 AM16 AIN5_R_AADC AL3_ADAC TP346
0.1uF PHYLED0 AP37 C398 C399 C400 MT5369_TS_IN[1]
W30 AIN5_L_AADC C397 1200pF 1200pF TP347
AVSS12_PCIE11 AR35 AG30 1200pF 1200pF MT5369_TS_IN[2]
AD15 24K R315 AIN6_R_AADC AVDD33_DAC TP348
REXT AP36 AF30 MT5369_TS_IN[3]
W36 +1.2V_MTK_AVDD AIN6_L_AADC AVDD33_DAC1 TP349
DAC_3V3
PCIE11_REFCKN MT5369_TS_IN[4]
W37 AD14 TP350
PCIE11_REFCKP AVDD12_REC
C323 VDD3V3
VDD3V3
AVSS33_DAC
AK30
C365 C380 SPDIF_OUT PLACE AT JACK SIDE MT5369_TS_IN[5] TP351
0.1uF AE30 MT5369_TS_IN[6]
AD16 AVSS33_DAC1 0.01uF 0.1uF TP352
AVDD33_COM AL31 ARC MT5369_TS_IN[7]
AD17 TUNER_SIF C305 C362 AVDD33_AADC TP353
AVDD33_LD C328 AJ28 Y33 L300
1uF 0.1uF SC_ID_SOC
0.1uF AVSS33_AADC ALIN DSUB_R+ TP354
25V AR16
AL16 ASPDIF0 BLM15BD121SN1 /CI_CD2 TP355
AVSS33_LD AJ27 Y32 C333
AL15 VMID_AADC ASPDIF1 R322 /CI_CD1 TP356
AVSS33_COM AR11 R366 100 47pF 75
AL14 AOBCK AUD_SCK 50V D301 /PCM_IORD TP357
AVSS12_REC C352 0.01uF AN28 AP11 R367 100 ADLC 5S 02 015
T/C&AT&CHB MPXP AOLRCK AUD_LRCK /PCM_IOWR TP358
C312 AM12 R368 100 5.5V
R339 AOMCLK AUD_MASTER_CLK
C358 C363 AM10 R371 100 PCM_RST TP307
2.2K AUD_LRCH
0.01uF 1uF AOSDATA4 /PCM_REG
OPT AM11 TP308
33pF 50V 25V AOSDATA3 C387 C389 C393 C396
T/C&AT&CHB AN11 Dont use as GPIO /PCM_CE1 TP309
22pF 22pF 22pF 33pF L301
R346 0 R334 51 AOSDATA2 MT5369_TS_SYNC
IF_P AN10 OPT OPT OPT DSUB_G+ TP310
AOSDATA1 OPT
C336 1uF AN9 /PCM_WE TP311
T/C&AT&CHB BLM15BD121SN1
10V AOSDATA0 C335 R321 /PCM_OE
Close to Tuner C309 47pF D300 TP359
T/C&AT&CHB Close to MT5369 75
OPT AU32 AN25 50V ADLC 5S 02 015 MT5369_TS_VAL TP360
ADCINP_DEMOD HSYNC DSUB_HSYNC_SOC 5.5V
R331 0 C337 1uF R335 51 AT32 AM25 CI_A_VS1 TP361
IF_N ADCINN_DEMOD VSYNC DSUB_VSYNC_SOC
AR25 0.01uF C366 100 R356 MT5369_TS_CLK TP362
T/C&AT&CHB 10V T/C&AT&CHB VDD3V3 RP
T/C&AT&CHB C310 AD22 AR24 0.01uF C367 100 R357 /PCM_IRQA TP363
AVDD33_DEMOD GP L304
+1.2V_MTK_AVDD C364 AU24 0.01uF C368 100 R358 /PCM_WAIT TP364
BP DSUB_B+
0.1uF AP24 0.01uF C369 100 R359
33pF BLM15BD121SN1 SC_R_IN_SOC TP365
COM
T/C&AT&CHB AL27 AT24 1500pF C370 C334 SC_L_IN_SOC
AVDD12_DEMOD SOG R320 D302 TP366
C351 AR22 47pF
75 ADLC 5S 02 015 SC_CVBS_IN_SOC TP367
0.1uF VGA_SDA RGB_DDC_SDA 50V
AM28 AP22 5.5V
T/C&AT&CHB T/C&AT&CHB AVSS33_DEMOD VGA_SCL RGB_DDC_SCL SC_COM_SOC TP368
AJ26
R332 10K R342 10K AVSS12_DEMOD SC_G_SOC TP369
IF_AGC AT26
C355 COM1 SC_COM_SOC SC_R_SOC TP370
Close to Tuner AR26
C341 0.047uF PB1P SC_G_SOC SC_B_SOC TP371
0.047uF T/C&AT&CHB AP26
PR1P SC_R_SOC SC_FB_SOC TP372
T/C&AT&CHB U35 AU26
IF_AGC Y1P SC_B_SOC DTV/MNT_V_OUT_SOC TP373
U34 AP25
SC_FB_SOC
Close to MT5369 TP300 RF_AGC SOY1
AU28 0.01uF C371 100 R361
SCART_Rout_SOC TP374
HP_OUT COM0 SCART_Lout_SOC TP375
AP31 AT28 0.01uF C372 100 R362 For PCB Pattern
L303 LOUTN PB0P
AN30 AR28 0.01uF C373 100 R363
BLM18PG121SN1D LOUTP PR0P PCM_5V_CTL
AP27 0.01uF C374 100 R364 TP377
HP_LOUT_AMP HP_LOUT Y0P COMP1_Pb_SOC SC_DET TP378
V35 AR27 1500pF C375
OSCL2 OSCL2 SOY0 COMP1_Pr_SOC
HP_OUT V34
C332 OSDA2 OSDA2 OPT COMP1_Y_SOC
AU30 0 R349
0.22uF VDACX_OUT
10V AP28 AP29 0 R350
SC0 VDACY_OUT DTV/MNT_V_OUT_SOC
AR29
SC_CVBS_IN_SOC SY0 VDD3V3
AD20
AVDD33_VDAC_BG
AT30 AD21
For PCB Pattern CVBS3P AVDD33_VDAC
R341 100 C360 0.047uF AR30
AV1_CVBS_IN_SOC CVBS2P
R340 100 C359 0.047uF AR31 AD19
TU_CVBS CVBS1P AVDD12_RGB
AN29 +1.2V_MTK_AVDD
HP_OUT CVBS0P
C361 1uF AP30
L302 CVBS_COM
BLM18PG121SN1D AJ22
VDD3V3 AVSS33_VDAC_BG C382
HP_ROUT_AMP HP_ROUT AK24 AJ21
AVDD33_CVBS_1 AVSS12_RGB 0.1uF
HP_OUT AK25 AL24
C331 AVDD33_CVBS_2 AVSS33_VDAC
0.22uF
10V AL25
AVSS33_CVBS_1
AM26
AVSS33_CVBS_2
Place at JACK SIDE


+3.3V_NORMAL VDD3V3 +1.2V_MTK_CORE 5600mA
60mA
L500
BLM18PG121SN1D
IC105
C524 C506 C505 C529 C532 C535
LGE2112 IC105
C500 C503 C510 C504 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF
10uF 10uF 0.1uF 2.2uF LGE2112
+1.2V_MTK_CORE
+1.2V_MTK_CORE
AR7 AC22
VCCK_43 VCCK_31 R2 R6
AT7 AC23 DVSS_51 DVSS_55
VCCK_45 VCCK_32 R3 R20
AU7 AD24 DVSS_52 DVSS_62
VCCK_47 VCCK_36 J4 T20
AP8 P23 DVSS_37 DVSS_73
VCCK_42 VCCK_8 R4 U20
AR8 R24 DVSS_53 DVSS_83
+1.2V_MTK_CORE VCCK_44 VCCK_10 Y4 V20
AT8 T24 DVSS_107 DVSS_92
VCCK_46 VCCK_12 F5 W20
AU8 AC24 DVSS_20 DVSS_104
VCCK_48 VCCK_33 J5 Y20
AM7 AC21 DVSS_38 DVSS_117
VCCK_37 VCCK_30 R5 AA20
C539 C543 C546 C548 C550 C552 C553 AN7 P20 DVSS_54 DVSS_127
VCCK_39 VCCK_7 Y5 AB20
10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF AP7 AC20 DVSS_108 DVSS_137
VCCK_41 VCCK_29 W5 G16
AM8 P19 DVSS_95 DVSS_29
VCCK_38 VCCK_6 L7 R21
AN8 AC18 DVSS_44 DVSS_63
VCCK_40 VCCK_27 M7 T21
P14 P18 DVSS_46 DVSS_74
VCCK_1 VCCK_5 R7 U21
R14 AC17 DVSS_56 DVSS_84
VCCK_9 VCCK_26 AA5 V21
T14 P17 DVSS_120 DVSS_93
VDD3V3 VCCK_11 VCCK_4 AB5 W21
AVDD_33SB U14 AD18 DVSS_130 DVSS_105
VCCK_13 VCCK_34 K7 Y21
V14 AD23 DVSS_43 DVSS_118
L501 VCCK_14 VCCK_35 U7 AA21
BLM18PG121SN1D W14 DVSS_77 DVSS_128
VCCK_16 VDD3V3 W7 AB21
Y14 DVSS_97 DVSS_138
VCCK_18 E9 R22
C501 AA14 DVSS_13 DVSS_64
+1.2V_MTK_CORE +1.2V_MTK_AVDD VCCK_20 E8 T22
0.1uF AB14 AL9 DVSS_12 DVSS_75
VCCK_22 VCC3IO_B_4 F9 U22
L502 AC14 AK10 DVSS_22 DVSS_85
BLM18PG121SN1D VCCK_23 VCC3IO_B_2 G14 V22
AC19 AK9 DVSS_28 DVSS_94
VCCK_28 VCC3IO_B_1 J6 W22
P15 AK11 DVSS_39 DVSS_106
C525 C502 VCCK_2 VCC3IO_B_3 R15 Y22
AC15 H29 DVSS_57 DVSS_119
10uF 0.1uF VCCK_24 VCC3IO_A_5 T15 AA22
P16 J29 DVSS_68 DVSS_129
VCCK_3 VCC3IO_A_7 U15 AB22
AC16 H30 DVSS_78 DVSS_139
VCCK_25 VCC3IO_A_6 V15 R23
V23 J30 DVSS_87 DVSS_65
VCCK_15 VCC3IO_A_8 W15 T23
W23 G31 DVSS_99 DVSS_76
VCCK_17 VCC3IO_A_3 Y15 U23
Y23 G32 DVSS_112 DVSS_86
VCCK_19 VCC3IO_A_4 AA15 AB23
AA23 F33 DVSS_122 DVSS_140
VCCK_21 VCC3IO_A_2 AB15 W6
E34 DVSS_132 DVSS_96
VCC3IO_A_1 H11 G17
DVSS_34 DVSS_30
R16 F25
DVSS_58 DVSS_27
T16 Y6
DVSS_69 DVSS_109
U16 E21
DVSS_79 DVSS_17
+5V_NORMAL DAC_3V3 V16 F21
DVSS_88 DVSS_25
W16 L8
IC501 DVSS_100 DVSS_45
Y16 T7
AP1117E33G-13 DVSS_113 DVSS_66
AA16 D11
DVSS_123 DVSS_7
AB16 E11
INADJ/GND DVSS_133 DVSS_14
R17 D12
OUT DVSS_59 DVSS_8
POWER_ON/OFF1 T17 E22
DVSS_70 DVSS_18
TP500 C526 U17 F22
10uF DVSS_80 DVSS_26
V17 G25
10V DVSS_89 DVSS_33
Y17 AB19
DVSS_114 DVSS_136
T18 AA19
DVSS_71 DVSS_126
V18 P22
DVSS_90 DVSS_49
Y18 W19
DVSS_115 DVSS_103
R500 T19 U19
1 DVSS_72 DVSS_82
V19 R19
DVSS_91 DVSS_61
Y19 Y7
DVSS_116 DVSS_110
C540 C544 W17 AB18
10uF 0.1uF DVSS_101 DVSS_135
AA17 AA18
10V 16V DVSS_124 DVSS_125
AB17 W18
DVSS_134 DVSS_102
R18 U18
DVSS_60 DVSS_81
AB6 AA7
DVSS_131 DVSS_121
H19 N22
DVSS_35 DVSS_47
H22 T8
DVSS_36 DVSS_67
J11 W8
DVSS_40 DVSS_98
J12 Y8
DVSS_41 DVSS_111
J22 E7
DVSS_42 DVSS_11
F8
DVSS_21
+3.3V_NORMAL +3.3V_NORMAL EMMC_VCCQ

3.3V_EMMC
LAN_JACK_POWER
L504 L506
BLM18PG121SN1D BLM18PG121SN1D
TP501
C512 C522
0.1uF 0.1uF
16V 16V
DECAP FOR SOC (HIDDEN - UCC) DECAP FOR SOC (BOTTOM)
SMD Gaskit +1.2V_MTK_CORE +1.2V_MTK_CORE

SMD_GASKIT_8.5T_COMP
SMD_GASKIT_8.5T_LAN
SMD_GASKIT_8.5T_RGB
C514 C520 C527 C531 C537 C545

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
LAN RGB COMP
MDS62110209
MDS62110209
MDS62110209
M500
M501
M502
SMD_GASKIT_12.5T_HDMI2
SMD_GASKIT_12.5T_HDMI1
SMD_GASKIT_12.5T_USB1
SMD_GASKIT_12.5T_USB3
+1.5V_DDR +1.5V_DDR
HDMI1~2 HDMI2~3 USB1~2 USB3

MDS62110217
MDS62110217
MDS62110217
MDS62110217
C508 C523 C533 C536 C547

0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
M503
M504
M505
M506


+1.5V_DDR
IC701 IC703
H5TQ2G63BFR-PBC H5TQ2G63BFR-PBC
A_RVREF2 C703 C701
+1.5V_DDR C750 C752 C754 C756 C758
A_RVREF4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF
ARA[0-13] 10V
ARA[0-13]
+1.5V_DDR ARA[0] ARA[0] N3 M8
M8 N3 A0 VREFCA A_RVREF2
VREFCA A0 ARA[1] ARA[1] P7 C735
P7 A1 R720 0.1uF
A1 ARA[2] P3 A_RVREF3 1K
A_RVREF1 P3 ARA[2] 1%
A_RVREF1 C713 A2
A2 ARA[3] ARA[3] N2 H1
R706 0.1uF H1 N2
1K ARA[4] P8 A3 VREFDQ
1% VREFDQ A3 ARA[4]
P8 A4 1%
1% A4 ARA[5] ARA[5] P2 240 R721
P2 A5 R716 1K C736
R710 240 A5 ARA[6] ARA[6] R8 L8 1% 0.1uF
L8 R8 A6 ZQ +1.5V_DDR
R707 ZQ A6 ARA[7] R2
1K C714 R2 ARA[7] +1.5V_DDR
1% +1.5V_DDR ARA[8] A7
0.1uF A7 ARA[8] T8
T8 A8
A8 ARA[9] ARA[9] R3 B2
B2 R3 A9 VDD_1 C704
VDD_1 A9 ARA[10] ARA[10] L7 D9 C745 C751 C753 C755 C757 C702
D9 L7 +1.5V_DDR 10uF
A10/AP VDD_2 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF
VDD_2 A10/AP ARA[11] ARA[11] R7 G7 10V
+1.5V_DDR G7 R7 A11 VDD_3
VDD_3 A11 ARA[12] ARA[12] N7 K2
K2 N7 A12/BC VDD_4
VDD_4 A12/BC ARA[13] T3 K8 A_RVREF3 C733
K8 T3 ARA[13]
A13 VDD_5 R718 0.1uF
A_RVREF4 VDD_5 A13 N1 1K
C715 N1 VDD_6 1%
R708 0.1uF VDD_6 M7 N9
1K N9 M7 A15 VDD_7
1% VDD_7 A15 R1
R1 VDD_8
VDD_8 M2 R9 R719
R9 M2 ARBA0 BA0 VDD_9 1K C734
VDD_9 BA0 ARBA0 N8 1%
R709 N8 ARBA1 0.1uF
1K C716 ARBA1 ARCLK1 BA1
BA1 M3
1% 0.1uF M3 ARBA2 BA2
BA2 ARBA2 ARCLK0 A1
A1 VDDQ_1
VDDQ_1 J7 A8
A8 J7 R714 CK VDDQ_2
VDDQ_2 CK R712 100 K7 C1
C1 K7 100 5% CK VDDQ_3
VDDQ_3 CK 5% K9 C9
C9 K9 ARCKE CKE VDDQ_4
VDDQ_4 CKE ARCKE D2
D2
VDDQ_5 /ARCLK0 /ARCLK1 L2
VDDQ_5
E9 IC105
E9 L2 /ARCS
VDDQ_6 CS /ARCS K1
CS VDDQ_6
F1 LGE2112
F1 K1 ARODT ODT VDDQ_7
VDDQ_7 ODT ARODT J3 H2
H2 J3 /ARRAS +1.5V_DDR
IC701-*2 /ARRAS RAS VDDQ_8
IC701-*1 VDDQ_8 RAS K3 H9
K4B2G1646C-HCK0 NT5CB128M16BP-DI H9 K3 /ARCAS CAS VDDQ_9 IC703-*1
VDDQ_9 CAS /ARCAS L3 NT5CB128M16BP-DI
IC703-*2 AC1 C19
L3 /ARWE WE K4B2G1646C-HCK0
DDRV_44 ARDQM0 ARDQM0
N3
A0 VREFCA
M8 M8 N3 WE /ARWE J1 AC2 C21
P7
A1
VREFCA A0
P7 J1 NC_1 N3 M8 DDRV_45 ARDQS0 ARDQS0
A1
P3
A2
P3 NC_1 T2 J9 P7
A0 VREFCA N3
A0 VREFCA
M8
A3 B21
N2
A3 VREFDQ
H1 H1
A2
N2 J9 T2 ARREST RESET NC_2 P3
A1 P7
A1 DDRV_1 ARDQS0 /ARDQS0 ARDQ[0-7]
P8
A4
VREFDQ A3
P8 NC_2 RESET ARREST L1 N2
A2
H1
P3
A2 A4 C23
P2
A5
A4
P2 L1 NC_3 P8
A3 VREFDQ N2
A3 VREFDQ
H1
DDRV_2 ARDQ0
A5
R8
A6 ZQ
L8 L8 R8 NC_3 L9 P2
A4 P8
A4 B4 B17
R2
A7
ZQ A6
R2 L9 NC_4 R8
A5
L8
P2
A5 DDRV_5 ARDQ1
A7
T8
A8
T8 NC_4 F3 T7 R2
A6 ZQ R8
A6 ZQ
L8
C4 D23
R3
A9 VDD_1
B2 B2
A8
R3 T7 F3 ARDQS2 DQSL NC_6 ARA[14] T8
A7 R2
A7 DDRV_8 ARDQ2
L7
A10/AP VDD_2
D9 D9
VDD_1 A9
L7 ARA[14] NC_6 DQSL ARDQS0 G3 R3
A8
B2
T8
A8 D4 C17
R7
A11 VDD_3
G7 G7
VDD_2 A10/AP
R7 G3 /ARDQS2 DQSL L7
A9 VDD_1
D9
R3
A9 VDD_1
B2
DDRV_10 ARDQ3
N7
A12/BC VDD_4
K2 K2
VDD_3 A11
N7 DQSL /ARDQS0 R7
A10/AP VDD_2
G7
L7
A10/AP VDD_2
D9
B3 D24
T3 K8 VDD_4 A12 A11 VDD_3 R7 G7
A13 VDD_5
K8
VDD_5 NC_6
T3 N7 K2
N7
A11 VDD_3
K2
DDRV_4 ARDQ4
VDD_6
N1 N1 C7 A9 T3
A12 VDD_4
K8 A12/BC VDD_4 C3 C16
M7
NC_5 VDD_7
N9 N9
VDD_6
M7 A9 C7 ARDQS3 DQSU VSS_1 NC_6 VDD_5
N1
T3
A13 VDD_5
K8
DDRV_7 ARDQ5
VDD_8
R1 R1
VDD_7 NC_5
VSS_1 DQSU ARDQS1 B7 B3 M7
VDD_6
N9 VDD_6
N1
AC3 C24
M2
BA0 VDD_9
R9 R9
VDD_8
M2 B3 B7 /ARDQS3 DQSU VSS_2 NC_5 VDD_7
R1
M7
NC_5 VDD_7
N9
DDRV_46 ARDQ6
N8
BA1
VDD_9 BA0
N8 VSS_2 DQSU /ARDQS1 E1 M2
VDD_8
R9 VDD_8
R1
AC4 D15
M3
BA2
BA1
M3 E1 VSS_3 N8
BA0 VDD_9 M2
BA0 VDD_9
R9
DDRV_47 ARDQ7
BA2
VDDQ_1
A1 A1 VSS_3 E7 G8 M3
BA1 N8
BA1
J7
CK VDDQ_2
A8 A8
VDDQ_1
J7 G8 E7 ARDQM2 DML VSS_4 BA2
A1
M3
BA2
K7
CK VDDQ_3
C1 C1
VDDQ_2 CK
K7 VSS_4 DML ARDQM0 D3 J2 J7
VDDQ_1
A8 VDDQ_1
A1
G10 D21
K9
CKE VDDQ_4
C9 C9
VDDQ_3 CK
K9 J2 D3 ARDQM3 DMU VSS_5 K7
CK VDDQ_2
C1
J7
CK VDDQ_2
A8
TP700 MEMTP ARDQM1 ARDQM1
VDDQ_5
D2 D2
VDDQ_4 CKE
VSS_5 DMU ARDQM1 J8 K9
CK VDDQ_3
C9
K7
CK VDDQ_3
C1
G9 B20
L2 E9 E9
VDDQ_5
L2 J8 ARDQ[16-23] VSS_6 CKE VDDQ_4 K9 C9
TP701 MEMTN ARDQS1 ARDQS1
K1
CS VDDQ_6
F1 F1
VDDQ_6 CS
K1 VSS_6 ARDQ[0-7] ARDQ[16] E3 M1 VDDQ_5
D2 CKE VDDQ_4
D2
RVREF_A RVREF_B C20
J3
ODT VDDQ_7
H2 VDDQ_7 ODT M1 E3 L2
CS VDDQ_6
E9
L2
VDDQ_5
E9
/ARDQS1 ARDQ[8-15]
RAS VDDQ_8
H2
VDDQ_8 RAS
J3
ARDQ[17] DQL0 VSS_7 K1 F1 CS VDDQ_6 ARDQS1
K3
CAS VDDQ_9
H9 H9 K3 VSS_7 DQL0 F7 M9 J3
ODT VDDQ_7
H2
K1
ODT VDDQ_7
F1
G13 A17
L3 VDDQ_9 CAS
L3 M9 F7 DQL1 VSS_8 RAS VDDQ_8 J3 H2
RVREF_B ARDQ8
WE
J1 J1
WE
VSS_8 DQL1 ARDQ[18] F2 P1
K3
CAS VDDQ_9
H9
K3
RAS
CAS
VDDQ_8
VDDQ_9
H9
G21 A23
NC_1 L3
T2 J9 J9
NC_1
T2 P1 F2 DQL2 VSS_9 WE L3
RVREF_A ARDQ9
RESET NC_2
L1 L1
NC_2 RESET
VSS_9 DQL2 ARDQ[19] F8 P9 NC_1
J1 WE
NC_1
J1
D17
NC_3 T2 J9
L9 L9
NC_3 P9 F8 DQL3 VSS_10 RESET NC_2 T2 J9
ARDQ10
F3
NC_4
T7 T7
NC_4
F3 VSS_10 DQL3 ARDQ[20] H3 T1 NC_3
L1
L9
RESET NC_2
NC_3
L1
B23
DQSL NC_6
G3 NC_7 DQSL
G3 T1 H3 DQL4 VSS_11 NC_4 L9
ARDQ11
DQSL DQSL
VSS_11 DQL4 ARDQ[21] H8 T9
F3
DQSL NC_7
T7
F3
DQSL
NC_4
NC_6
T7
F10 D20
G3
C7 A9 A9 C7 T9 H8 DQL5 VSS_12 DQSL G3
ARCKE ARCKE ARDQ12
B7
DQSU VSS_1
B3 B3
VSS_1 DQSU
B7 VSS_12 DQL5 ARDQ[22] G2 C7 A9
DQSL
D22
DQSU VSS_2
E1 E1
VSS_2 DQSU G2 DQL6 DQSU VSS_1 C7 A9
ARDQ13
E7
VSS_3
G8 G8
VSS_3
E7 DQL6 ARDQ[23] H7
B7
DQSU VSS_2
B3
B7
DQSU
DQSU
VSS_1
VSS_2
B3
D9 D19
DML VSS_4 E1
D3
DMU VSS_5
J2 J2
VSS_4 DML
D3 H7 DQL7 E7
VSS_3
G8 VSS_3
E1
ARCLK1 ARCLK1 ARDQ14
VSS_5 DMU
VSS_6
J8 J8 DQL7 ARDQ[24-31] B1 D3
DML VSS_4
J2
E7
DML VSS_4
G8
C9 C22
E3 M1 M1
VSS_6
E3 B1 ARDQ[8-15] VSSQ_1 DMU VSS_5 D3 J2
/ARCLK1 ARCLK1 ARDQ15
F7
DQL0 VSS_7
M9 M9
VSS_7 DQL0
F7 VSSQ_1 ARDQ[24] D7 B9 VSS_6
J8 DMU VSS_5
VSS_6
J8
DQL1 VSS_8 E3 M1
F2 P1 P1
VSS_8 DQL1
F2 B9 D7 DQU0 VSSQ_2 DQL0 VSS_7 E3 M1
F8
DQL2 VSS_9
P9 P9
VSS_9 DQL2
F8 VSSQ_2 DQU0 ARDQ[25] C3 D1
F7
DQL1 VSS_8
M9
F7
DQL0
DQL1
VSS_7
VSS_8
M9
A20 A7
DQL3 VSS_10 F2 P1
H3 T1 T1
VSS_10 DQL3
H3 D1 C3 DQU1 VSSQ_3 DQL2 VSS_9 F2 P1
ARCLK0 ARCLK0 ARDQM2 ARDQM2
H8
DQL4 VSS_11
T9 T9
VSS_11 DQL4
H8 VSSQ_3 DQU1 ARDQ[26] C8 D8
F8
H3
DQL3 VSS_10
P9
T1
F8
DQL2
DQL3
VSS_9
VSS_10
P9
A21 B9
DQL5 VSS_12
G2 VSS_12 DQL5
G2 D8 C8 DQU2 VSSQ_4 DQL4 VSS_11 H3 T1
/ARCLK0 ARCLK0 ARDQS2 ARDQS2
H7
DQL6 DQL6
H7 VSSQ_4 DQU2 ARDQ[27] C2 E2
H8
DQL5 VSS_12
T9
H8
DQL4
DQL5
VSS_11
VSS_12
T9
A9
DQL7 G2
B1 B1
DQL7 E2 C2 DQU3 VSSQ_5 DQL6 G2
ARDQS2 /ARDQS2
D7
VSSQ_1
B9 B9
VSSQ_1
D7 VSSQ_5 DQU3 ARDQ[28] A7 E8
H7
DQL7 H7
DQL6
DQL7 E18 C12 ARDQ[16-23]
DQU0 VSSQ_2 B1
C3 D1 D1
VSSQ_2 DQU0
C3 E8 A7 DQU4 VSSQ_6 VSSQ_1 B1
ARODT ARODT ARDQ16
C8
DQU1 VSSQ_3
D8 D8
VSSQ_3 DQU1
C8 VSSQ_6 DQU4 ARDQ[29] A2 F9
D7
DQU0 VSSQ_2
B9
D7
DQU0
VSSQ_1
VSSQ_2
B9 +1.5V_DDR F17 D6
DQU2 VSSQ_4 C3 D1
C2 E2 E2
VSSQ_4 DQU2
C2 F9 A2 DQU5 VSSQ_7 DQU1 VSSQ_3 C3 D1
/ARRAS ARRAS ARDQ17
A7
DQU3 VSSQ_5
E8 E8
VSSQ_5 DQU3
A7 VSSQ_7 DQU5 ARDQ[30] B8 G1
C8
C2
DQU2 VSSQ_4
D8
E2
C8
DQU1
DQU2
VSSQ_3
VSSQ_4
D8
E17 B12
DQU4 VSSQ_6
A2 F9 F9
VSSQ_6 DQU4
A2 G1 B8 DQU6 VSSQ_8 DQU3 VSSQ_5 C2 E2
/ARCAS ARCAS ARDQ18
B8
DQU5 VSSQ_7
G1 G1
VSSQ_7 DQU5
B8 VSSQ_8 DQU6 ARDQ[31] A3 G9
A7
DQU4 VSSQ_6
E8
A7
DQU3
DQU4
VSSQ_5
VSSQ_6
E8
E16 C5
DQU6 VSSQ_8 A2 F9
A3
DQU7 VSSQ_9
G9 G9
VSSQ_8 DQU6
A3 G9 A3 DQU7 VSSQ_9 B8
DQU5 VSSQ_7
G1
A2
DQU5 VSSQ_7
F9 RVREF_A C746 /ARCS ARCS ARDQ19
VSSQ_9 DQU7
VSSQ_9 DQU7 A3
DQU6 VSSQ_8
G9
B8
DQU6 VSSQ_8
G1
R730 D14 C13
DQU7 VSSQ_9 A3
DQU7 VSSQ_9
G9
1K 0.1uF /ARWE ARWE ARDQ20
1% A5
DDR_SS ARDQ21
DDR_NANYA B14 A12
DDR_NANYA DDR_SS ARREST ARRESET ARDQ22
B5
DDR_HYNIX DDR_HYNIX R731 ARDQ23
1K C747 A13
1% ARBA0 ARBA0
0.1uF G11 E10
ARBA1 ARBA1 ARDQM3 ARDQM3
D16 C8
ARBA2 ARBA2 ARDQS3 ARDQS3
D8 ARDQ[24-31]
ARDQS3 /ARDQS3
F18 C6
+1.5V_DDR ARCSX ARDQ24
D10
ARA[14]C15 ARDQ25
D7
ARA[13]A15 ARA14 ARDQ26
C11
RVREF_B C748 ARA13 ARDQ27
ARA[12]F13 C7
R732 0.1uF
1K ARA[11]C14 ARA12 ARDQ28
1% C10
ARA[10]F11 ARA11 ARDQ29
B7
ARA[9] E15 ARA10 ARDQ30
B10
R733 ARA[8] D13 ARA9 ARDQ31
1K C749 AVDD3V3_MEMPLL
1% 0.1uF ARA[7] B15 ARA8
+1.5V_DDR ARA7
ARA[6] E14 N14 +3.3V_NORMAL
ARA[5] F16 ARA6 AVDD33_MEMPLL AVDD3V3_MEMPLL
N15
ARA[4] E13 ARA5 AVSS33_MEMPLL L700
C718 C720 C722 C724 C726 C728 C705 C707 ARA[3] B13 ARA4 BLM18PG121SN1D
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF 10uF ARA3
10V ARA[2] A14 R1
ARA[1] F14 ARA2 DVSS_50 C700
P21 0.1uF
ARA[0] F15 ARA1 DVSS_48
ARA0
ARA[0-14]
+1.5V_DDR
C717 C719 C721 C723 C725 C727 C706 C708

1uF 10uF
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
10V IC105
LGE2112
RVREF_C
RVREF_D
P13 G2
RVREF_C BRDQM0 BRDQM0
V7 E4
RVREF_D BRDQS0 BRDQS0
E3
BRDQS0 /BRDQS0 BRDQ[0-7]
F4 A1
BRCLK0 BRCLK0 BRDQ0
F3 J1
/BRCLK0 BRCLK0 BRDQ1
B2
BRDQ2
V4 J2
BRCLK1 BRCLK1 BRDQ3
V3 C2
/BRCLK1 BRCLK1 BRDQ4
K1
BRDQ5
P6 A2
BRCKE BRCKE BRDQ6
+1.5V_DDR K2
IC702 BRDQ7
H6
H5TQ2G63BFR-PBC IC704 BRODT BRODT
H4 D1
+1.5V_DDR RVREF_C /BRRAS BRDQM1
B_RVREF6
H5TQ2G63BFR-PBC B_RVREF8 R726
C741
H5
BRRAS BRDQM1
F1
1K 0.1uF /BRCAS BRCAS BRDQS1 BRDQS1
+1.5V_DDR BRA[0-13] 1% K3 F2
/BRCS /BRDQS1 BRDQ[8-15]
M8 N3 BRA[0] BRA[0-13] BRCS BRDQS1
B_RVREF7 C739 J3
VREFCA A0 BRA[1] BRA[0] N3 BRDQ8
P7 M8 R724 0.1uF N1 B1
B_RVREF5 B_RVREF5 A1 A0 VREFCA 1K BRBA0 BRBA0 BRDQ9
C709 P3 BRA[2] BRA[1] P7 1% R727
R702 B_RVREF7 1K C742 P5 H3
0.1uF A2 BRA[2] A1 1% BRBA1 BRBA1 BRDQ10
1K H1 N2 BRA[3] P3 0.1uF K4 D3
1% VREFDQ A3 A2 BRBA2
P8 BRA[4] BRA[3] N2 H1 BRBA2 BRDQ11
R725 G3
A4 BRA[4] A3 VREFDQ BRDQ12
1% P2 BRA[5] P8 1K C740 L4 C1
A5 A4 1% 1% 0.1uF /BRWE BRWE BRDQ13
R703 R711 240 L8 R8 BRA[6] BRA[5] P2 240 BRA[0-14]
1K C710 G4
ZQ A6 BRA[6] A5 R717 BRDQ14
1% 0.1uF R2 BRA[7] R8 L8 +1.5V_DDR BRA[14] L5 D2
+1.5V_DDR A6 ZQ
A7 BRA[8] BRA[7] R2 BRA14 BRDQ15
T8 +1.5V_DDR BRA[13] M4
A8 BRA[8] T8 A7 BRA13
B2 R3 BRA[9] BRA[12] N5 Y1
VDD_1 A9 BRA[9] R3 A8 +1.5V_DDR RVREF_D C743 BRA12 BRDQM2 BRDQM2 BRDQ[16-23]
D9 L7 BRA[10] B2 BRA[11] M5 V2
+1.5V_DDR VDD_2 A10/AP A9 VDD_1 R728 0.1uF
G7 R7 BRA[11] BRA[10] L7 D9 1K BRA[10] BRA11 BRDQS2 BRDQS2
1% P4 V1
VDD_3 A11 BRA[11] R7 A10/AP VDD_2 BRA10 BRDQS2 /BRDQS2
K2 N7 BRA[12] G7 BRA[9] M3 T4
VDD_4 A12/BC A11 VDD_3 B_RVREF8 C737
K8 T3 BRA[13] BRA[12] N7 K2 R722 BRA[8] BRA9 BRDQ16
B_RVREF6 C711 0.1uF L6 AB4
VDD_5 A13 BRA[13] T3 A12/BC VDD_4 1K R729 BRA8 BRDQ17
R704 0.1uF N1 K8 1% BRA[7] L3 P2
1K VDD_6 A13 VDD_5 1K C744
1% N9 M7 N1 1% 0.1uF BRA[6] BRA7 BRDQ18
N4 AB3
VDD_7 A15 VDD_6 BRA6 BRDQ19
R1 M7 N9 BRA[5] K5 P3
VDD_8 A15 VDD_7 R723 BRA5 BRDQ20
R9 M2 R1 1K C738 BRA[4] N6 AB1
R705 VDD_9 BA0 BRBA0 VDD_8 1%
1K C712 N8 M2 R9 0.1uF BRA[3] BRA4 BRDQ21
1% BRBA1 BRBA0 BA0 N2 P1
0.1uF BA1 VDD_9 BRA3 BRDQ22
M3 N8 BRA[2] M1 AB2
BA2 BRBA2 BRCLK0 BRBA1 BA1
A1 M3 BRA[1] BRA2 BRDQ23
BRBA2 BA2 N3
VDDQ_1 BRCLK1 BRA1
A8 J7 A1 BRA[0] K6 U1
VDDQ_2 CK R713 VDDQ_1 BRDQM3
C1 K7 100 J7 A8 BRA0 BRDQM3
5% R715 CK W3
VDDQ_3 CK VDDQ_2 BRDQS3 BRDQS3
C9 K9 100 K7 C1 G5 W4
VDDQ_4 CKE BRCKE 5% CK VDDQ_3 +1.5V_DDR /BRDQS3 BRDQ[24-31]
D2 K9 C9 BRCSX BRDQS3
BRCKE CKE AA3
VDDQ_5 /BRCLK0 VDDQ_4 BRDQ24
E9 L2 D2 D5 U4
VDDQ_6 CS /BRCS /BRCLK1 VDDQ_5 DDRV_11 BRDQ25
F1 K1 L2 E9 E5 AA4
VDDQ_7 ODT BRODT /BRCS CS VDDQ_6
H2 J3 K1 F1 DDRV_13 BRDQ26
/BRRAS BRODT T5 T3
VDDQ_8 RAS ODT VDDQ_7 DDRV_38 BRDQ27
H9 K3 J3 H2 V5 Y3
VDDQ_9 CAS /BRCAS /BRRAS RAS VDDQ_8
L3 K3 H9 DDRV_42 BRDQ28
IC702-*1 /BRWE /BRCAS U5 U3
IC702-*2 WE CAS VDDQ_9 DDRV_40 BRDQ29
K4B2G1646C-HCK0
NT5CB128M16BP-DI J1 L3 IC704-*1 IC704-*2 E6 Y2
NC_1 /BRWE WE NT5CB128M16BP-DI K4B2G1646C-HCK0
J9 T2 J1 DDRV_14 BRDQ30
BRREST F6 U2 +1.5V_DDR
N3 M8
M8
VREFCA A0
N3 NC_2 RESET NC_1 DDRV_18 BRDQ31
P7
A0 VREFCA
A1
P7 L1 T2 J9 N3 M8 N3 M8 G6
A1 P3 NC_3 BRREST RESET NC_2 A0 VREFCA A0 VREFCA
P3
H1
A2
N2 L9 L1
P7
A1
P7
A1 DDRV_23
N2
A2
H1 VREFDQ A3 P3 P3 U6 M2
P8
A3 VREFDQ
A4
P8 NC_4 NC_3 N2
A2
H1 N2
A2
H1 DDRV_41 BRRESET BRREST
P2
A4
A5
P2 T7 F3 L9 P8
A3 VREFDQ
P8
A3 VREFDQ
T6
R8
A5
L8
L8
ZQ A6
R8 BRA[14] NC_6 DQSL BRDQS0 NC_4 P2
A4
P2
A4
DDRV_39
R2
A6 ZQ
A7
R2 G3 F3 T7 R8
A5
L8 R8
A5
L8 AC5 E23
A7 T8 DQSL /BRDQS0 BRDQS2 DQSL NC_6 BRA[14] A6 ZQ A6 ZQ
T8
B2
A8
R3 G3
R2
A7
R2
A7 DDRV_48 DDRV_16
R3
A8
A9 VDD_1
B2
D9
VDD_1 A9
L7 /BRDQS2 DQSL
T8
A8
T8
A8
F7 F24
L7 D9
G7
VDD_2 A10/AP
R7 A9 C7
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 DDRV_19 DDRV_22
R7
A10/AP VDD_2
G7 VDD_3 A11
BRDQS1
L7
A10/AP VDD_2
D9 L7 D9 G7 G24
N7
A11 VDD_3
K2
K2
VDD_4 A12
N7 VSS_1 DQSU R7 G7 R7
A10/AP VDD_2
G7 DDRV_24 DDRV_29
T3
A12/BC VDD_4
K8
K8
VDD_5 NC_6
T3 B3 B7 C7 A9 N7
A11 VDD_3
K2 N7
A11 VDD_3
K2 AC6 F23
A13 VDD_5 N1 VSS_2 DQSU /BRDQS1 BRDQS3 DQSU VSS_1 A12 VDD_4 A12/BC VDD_4
N1
N9
VDD_6
M7 E1 B7 B3
T3
NC_6 VDD_5
K8 T3
A13 VDD_5
K8 DDRV_49 DDRV_21
M7
VDD_6
N9 VDD_7 NC_5
/BRDQS3 DQSU
N1 N1 N7 G23
NC_5 VDD_7
R1
R1
VDD_8 VSS_3 VSS_2 M7
VDD_6
N9 M7
VDD_6
N9 DDRV_36 DDRV_28
M2
VDD_8
R9
R9
VDD_9 BA0
M2 G8 E7 E1 NC_5 VDD_7
R1 NC_5 VDD_7
R1 P7 E24
N8
BA0 VDD_9
BA1
N8 VSS_4 DML BRDQM0 VSS_3 M2
VDD_8
R9 M2
VDD_8
R9 DDRV_37 DDRV_17
M3
BA1
BA2
M3 J2 D3 E7 G8 N8
BA0 VDD_9
N8
BA0 VDD_9
V6 E12
BA2 A1 VSS_5 DMU BRDQM1 BRDQM2 DML VSS_4 M3
BA1 BA1
A1
A8
VDDQ_1
J7 J8 D3 J2 BA2
M3
BA2 DDRV_43 DVSS_15
J7
VDDQ_1
A8 VDDQ_2 CK BRDQ[0-7] BRDQM3 DMU
A1 A1 J10 F12
K7
CK VDDQ_2
C1
C1
VDDQ_3 CK
K7 VSS_6 VSS_5 J7
VDDQ_1
A8 J7
VDDQ_1
A8 DDRV_35 DVSS_23
CK VDDQ_3 C9 K9 M1 E3 J8 K7
CK VDDQ_2
C1 CK VDDQ_2
H10 A18
K9 C9
D2
VDDQ_4 CKE
VSS_7 DQL0 BRDQ[16-23] VSS_6 CK VDDQ_3
K7
CK VDDQ_3
C1
CKE VDDQ_4
D2
E9
VDDQ_5
L2 M9 F7 BRDQ[16] E3 M1
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 DDRV_32 DVSS_1
L2
VDDQ_5
E9 VDDQ_6 CS
DQL0
D2 D2 H13 B18
K1
CS VDDQ_6
F1
F1
VDDQ_7 ODT
K1 VSS_8 DQL1 BRDQ[17] VSS_7 L2
VDDQ_5
E9 L2
VDDQ_5
E9 DDRV_33 DVSS_3
J3
ODT VDDQ_7
H2
H2
VDDQ_8 RAS
J3 P1 F2 F7 M9 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1 E20 C18
K3
RAS VDDQ_8
H9
H9
VDDQ_9 CAS
K3 VSS_9 DQL2 BRDQ[18] DQL1 VSS_8 J3
ODT VDDQ_7
H2 J3
ODT VDDQ_7
H2 DDRV_15 DVSS_5
L3
CAS VDDQ_9
WE
L3 P9 F8 F2 P1 K3
RAS VDDQ_8
H9 K3
RAS VDDQ_8
H9 F20 D18
WE
J1
J1
NC_1 VSS_10 DQL3 BRDQ[19] DQL2 VSS_9 L3
CAS VDDQ_9
L3
CAS VDDQ_9
DDRV_20 DVSS_9
T2
NC_1
J9
J9
NC_2 RESET
T2 T1 H3 F8 P9 WE
J1 WE
J1 G20 E19
RESET NC_2
L1
L1
NC_3 VSS_11 DQL4 BRDQ[20] DQL3 VSS_10 T2
NC_1
J9 T2
NC_1
J9 DDRV_27 DVSS_16
NC_3
L9
L9
NC_4
T9 H8 H3 T1 RESET NC_2
L1 RESET NC_2
L1 G15 F19
F3
NC_4
T7
T7
NC_7 DQSL
F3 VSS_12 DQL5 BRDQ[21] DQL4 VSS_11 NC_3
L9 NC_3
L9 DDRV_25 DVSS_24
G3
DQSL NC_6
DQSL
G3 G2 H8 T9 F3
NC_4
T7 F3
NC_4
T7 G18 G19
DQSL DQL6 BRDQ[22] DQL5 VSS_12 G3
DQSL NC_7
G3
DQSL NC_6
DDRV_26 DVSS_31
C7 A9
A9
VSS_1 DQSU
C7 H7 G2 DQSL DQSL
D25 G22
B7
DQSU VSS_1
B3
B3
VSS_2 DQSU
B7 DQL7 BRDQ[23] DQL6 C7 A9 C7 A9 DDRV_12 DVSS_32
DQSU VSS_2
E1
E1
VSS_3
B1 BRDQ[8-15] H7 B7
DQSU VSS_1
B3 B7
DQSU VSS_1
B3 C25 E25
E7
VSS_3
G8
G8
VSS_4 DML
E7 VSSQ_1 DQL7 DQSU VSS_2
E1 DQSU VSS_2
E1 DDRV_9 DVSS_19
D3
DML VSS_4
J2
J2
VSS_5 DMU
D3 B9 D7 BRDQ[24-31] B1 E7
VSS_3
G8 E7
VSS_3
G8 B25 A26
DMU VSS_5
J8
J8
VSS_6 VSSQ_2 DQU0 BRDQ[24] VSSQ_1 D3
DML VSS_4
J2 D3
DML VSS_4
J2 DDRV_6 DVSS_2
E3
VSS_6
M1
M1
VSS_7 DQL0
E3 D1 C3 D7 B9 DMU VSS_5
J8 DMU VSS_5
J8 A25 B26
F7
DQL0 VSS_7
M9
M9
VSS_8 DQL1
F7 VSSQ_3 DQU1 BRDQ[25] DQU0 VSSQ_2 E3
VSS_6
M1 E3
VSS_6
M1 DDRV_3 DVSS_4
F2
DQL1 VSS_8
P1
P1
VSS_9 DQL2
F2 D8 C8 C3 D1 F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9 H7 C26
F8
DQL2 VSS_9
P9
P9
VSS_10 DQL3
F8 VSSQ_4 DQU2 BRDQ[26] DQU1 VSSQ_3 F2
DQL1 VSS_8
P1 F2
DQL1 VSS_8
P1 DDRV_30 DVSS_6
H3
DQL3 VSS_10
T1
T1
VSS_11 DQL4
H3 E2 C2 C8 D8 F8
DQL2 VSS_9
P9 F8
DQL2 VSS_9
P9 H8 D26
H8
DQL4 VSS_11
T9
T9
VSS_12 DQL5
H8 VSSQ_5 DQU3 BRDQ[27] DQU2 VSSQ_4 H3
DQL3 VSS_10
T1 H3
DQL3 VSS_10
T1 DDRV_31 DVSS_10
G2
DQL5 VSS_12
DQL6
G2 E8 A7 C2 E2 H8
DQL4 VSS_11
T9 H8
DQL4 VSS_11
T9 J8
H7
DQL6
DQL7
H7 VSSQ_6 DQU4 BRDQ[28] DQU3 VSSQ_5 G2
DQL5 VSS_12
G2
DQL5 VSS_12
DDRV_34
DQL7
B1
B1
VSSQ_1
F9 A2 A7 E8 H7
DQL6
H7
DQL6
D7
VSSQ_1
B9
B9
VSSQ_2 DQU0
D7 VSSQ_7 DQU5 BRDQ[29] DQU4 VSSQ_6 DQL7
B1 DQL7
B1
C3
DQU0 VSSQ_2
D1
D1
VSSQ_3 DQU1
C3 G1 B8 A2 F9 D7
VSSQ_1
B9 D7
VSSQ_1
B9
C8
DQU1 VSSQ_3
D8
D8
VSSQ_4 DQU2
C8 VSSQ_8 DQU6 BRDQ[30] DQU5 VSSQ_7 C3
DQU0 VSSQ_2
D1 C3
DQU0 VSSQ_2
D1
C2
DQU2 VSSQ_4
E2
E2
VSSQ_5 DQU3
C2 G9 A3 B8 G1 C8
DQU1 VSSQ_3
D8 C8
DQU1 VSSQ_3
D8
A7
DQU3 VSSQ_5
E8
E8
VSSQ_6 DQU4
A7 VSSQ_9 DQU7 BRDQ[31] DQU6 VSSQ_8 C2
DQU2 VSSQ_4
E2 C2
DQU2 VSSQ_4
E2
A2
DQU4 VSSQ_6
F9
F9
VSSQ_7 DQU5
A2 A3 G9 A7
DQU3 VSSQ_5
E8 A7
DQU3 VSSQ_5
E8
B8
DQU5 VSSQ_7
G1
G1
VSSQ_8 DQU6
B8 DQU7 VSSQ_9 A2
DQU4 VSSQ_6
F9 A2
DQU4 VSSQ_6
F9
DQU6 VSSQ_8 G9 A3 DQU5 VSSQ_7 DQU5 VSSQ_7
A3 G9 VSSQ_9 DQU7 B8 G1 B8 G1
DQU7 VSSQ_9 DQU6 VSSQ_8 DQU6 VSSQ_8
A3 G9 A3 G9
DQU7 VSSQ_9 DQU7 VSSQ_9
DDR_SS DDR_NANYA DDR_HYNIX

DDR_HYNIX DDR_NANYA DDR_SS

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 2011.12.09
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR ONE SIDE 12

FROM LIPS & POWER B/D +12V TYP 1450mA
+3.5V_ST
R2408
MMBT3906(NXP)
Q2401
L2408
BLM18SG121TN1D
PANEL_POWER
1 3
RL_ON 10K PANEL_VCC
OPT Q2407
2 P2400 AO3407A
R2401 +24V C2433
MTK_NON_EPI
FW20020-24S
D
R2442-*1
10K C2432 0.1uF
MTK_EPI
0.01uF
R2442
50V 50V
33K
10K
L2403
PWR ON 1 2 24V G
PANEL_DISCHARGE_REG
CIS21J121
PANEL_DISCHARGE_REG
24V 3 4 24V C2435 C2440
GND GND 4.7uF 1uF
+3.5V_ST 5 6
R2451
R2452
C2413 25V
1/8W
L2402
1/8W
50V C2443
2K
2K
GND GND OPT
MTK_NON_EPI
CIS21J121 7 8 0.1uF
R2441-*1
0.1uF
3.5V 9 10 3.5V 50V
MTK_EPI
50V
R2441
5.6K
1.8K
3.5V 11 12 3.5V
R2423 0 +3.3V_NORMAL
C2406 GND GND L/DIM0_VS
0.1uF 13 14 R2426
POWER_16_VSYNC
16V GND 15 16 GND/V-sync R2425 1K
100 INV_CTL C
12V 17 18 INV ON R2437
12V A.DIM 10K B Q2406
19 20 A_DIM PANEL_CTL
MMBT3904(NXP)
+12V 12V 21 22 P.DIM1
L2401 PWM_DIM1
GND/P.DIM2 23 24 Err OUT E
CIS21J121 PWM_DIM2
POWER_16_GND
POWER_24_GND
R2420
C2401
0
25
0.1uF
50V SMAW200-H24S2
0
+3.3V_NORMAL
R2422
P2401
R2424
#16/#20/#23 4.7K
LD - GND OR USE OPT
LE(N.L.D.) - OPEN R2405
LE(L.D.) - USE 22
ERROR_OUT
POWER_24_ERROR_OUT
Power_DET
+12V +3.5V_ST R2417
+5V_Normal
100K +3.5V_ST +12V +5V_NORMAL
OPT R2421
R2410 R2413 10K L2407
IC2402
2.7K
1%
0
5% NCP803SN293
OPT BLM18PG121SN1D DEV_DCDC_TPS54327
R2419 POWER_DET
VCC RESET 100
3 2
C2411 1
0.1uF C2415
GND
R2409 16V 10uF IC2404
1.2K 16V TPS54327DDAR [EP]GND
1% C2412
0.1uF POWER_ON/OFF2_3
16V R2435
10K EN VIN
1 8
C24001
THERMAL
OPT 0.1uF
R1 1% 16V VFB VBST C2429
R2416
9
+24V 2 7
100K
R2415 0.1uF L2409 +3.3V_NORMAL
not to RESET at 8kV ESD
OPT 16V 3.6uH L2413
56K VREG5 SW
On-semi R2412
8.2K
5%
IC2401
NCP803SN293
C2416
100pF
50V
SS
3 6
GND
NR8040T3R6N BLM18PG121SN1D
CN
C2430
OPT
VCC 3 2 RESET
R2418
100
R2439
4
3A 5
22uF
10V
+3.5V_ST
L2412
+3.3V_TU_IN
POWER_ON/OFF1
R2411 1 OPT 10K C2417 C2428 POWER_ON/OFF2_1
1.5K C2410 24V-->3.48V R2 POWER_ON/OFF2_2
GND 1uF 3300pF BLM18PG121SN1D C2436
1% 0.1uF 12V-->3.58V 1%
10V 50V NON_CN
0.1uF POWER_ON/OFF2_3
OPT 50V
OPT ST_3.5V-->3.5V 16V POWER_ON/OFF2_4
DDR MAIN 1.5V

+1.2V_MTK_CORE
POWER_ON/OFF2_1
+12V
R2430
+12V
MAX 3.4 A
+3.3V_NORMAL
10K
L2404 C2420
L2400 IC2400 2uH
AOZ1038PI [EP]LX L2410 IC2405
BLM18PG121SN1D
0.1uF BLM18PG121SN1D [EP]PGND TPS54425PWPR +3.3V_NORMAL
*NOTE 17 +3.5V_ST C2423
PGND
1 8
NC_2 16V
OPT
R2404
0.1uF
THERMAL
R24000 C2407 C2408 C2409 C2414 C2441

Placed on SMD-TOP
5.6K
1%
VIN NC_1 10uF 10uF 10uF 10uF 3300pF +1.5V_DDR

9
VIN2 VO
EP[GND]
2 7
10V 10V 10V 10V 50V 14 1
C2405 OPT 16V R2
VIN_3
PWRGD
THERMAL
AGND EN
BOOT
3 6 4700pF L2405
C2400 C2402 C2403 R2402 R1 R2428
EN
50V BLM18PG121SN1D
15
10uF 10uF 0.1uF FB COMP 3.3K VIN1 VFB 10K
16V 16V 16V 4 5
C2431 13 2
OPT L2406 10uF 1%
16
15
14
13
3.6uH 16V
VIN_1 1 12 PH_3 VBST VREG5
R2406
12 3
THERMAL NR8040T3R6N
10K
C2438
1%
VIN_2 PH_2
R2403 POWER_ON/OFF1 R2
C2448 C2418
10uF
C2419
0.1uF
2 17 11
C2424 C2425 C2446 C2447
C2427
SW2
4A SS
1uF
10V
C2404 10K 10uF GND_1 PH_1 0.1uF C2434 11 4
10V 16V 3 IC2403 10 10uF 10uF 10uF 10uF
10V 16V
0.1uF TPS54319TRE C2422 10V 10V 10V 10V 0.1uF R1
16V GND_2 4 9 SS/TR 50V C2445
3A 0.01uF
SW1
10 5
GND R2427
33K 22pF
47K 1%
1%
R2434
C2426 C2439 50V

5
50V R2407
100pF 100K 3300pF
50V PGND2 PG 50V
AGND
VSENSE
COMP
RT/CLK
9 6
R2432
1/16W 330K 5%
R1
PGND1 EN R2414 10K
R2431 C2421 8 7
15K 4700pF
Vout=0.8*(1+R1/R2) 1/16W 5% 50V
C2437
0.1uF
POWER_ON/OFF2_2
+3.3V_NORMAL
L2411
2uH
R2433
56K R2
1/16W C2442 C2444
3A $ 0.145 1% 22uF
10V
22uF
10V
Vout=0.827*(1+R1/R2)=1.521V
Vout=(0.763+0.0017*Vout.set)*(1+R1/R2)

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MID_POWER 2011.11.25

Renesas MICOM +3.3V_NORMAL
R3035
4.7K
OPT
For Debug 12V_EXT_PWR_DET
HDMI_WAUP:HDMI_INIT
10K
+3.5V_ST
R3000
FLG_POD_DR
COMMERCIAL_12V_CTL
8pF
8pF
POD_WAKEUP_N
MICOM_DEBUG
/RST_DIIVA
R3014 1K
R3011 10K
C3002
C3003
Dont remove R3014,
MICOM_DEBUG
MICOM_DEBUG
/RST_DIIVA
MICOM_RESET
P3000
12507WS-12L
not making float P40 POD_WAKEUP_N
FLG_POD_DR X3000
22
1
MICOM_DIIVA
32.768KHz
22
2
MICOM_DIIVA
for DiiVA R3023 +3.5V_ST
R3002
3
4.7M
R3001
4 OPT
5
MICOM_DEBUG
10K
22
MICOM_DIIVA
6
R3025
R3026
8
MICOM_RESET_SW
GND SW3000
+3.5V_ST
9
MICOM_RESET JTP-1127WEM
2 1
22
10
R3027
270K
EXT_AMP_MUTE
OPT
C3004
P124/XT2/EXCLKS
0.47uF
11
0.1uF
4 3
16V
R3024
12
EXT_AMP_RESET
P122/X2/EXCLK
P41/TI07/TO07
13 C3000
0.1uF COMMERCIAL_12V_CTL
C3001
12V_EXT_PWR_DET
P137/INTP0
P120/ANI19
P40/TOOL0
P123/XT1
P121/X1
+3.3V_NORMAL
SCART_MUTE
RESET
REGC
VDD
VSS
R3032 R3033
10K 10K POWER_ON/OFF2_4
AMP_RESET_BY_MICOM
GP4 High/MID Power SEQUENCE
48
47
46
45
44
43
42
41
40
39
38
37
P60/SCLA0 1 36 P140/PCLBUZ0/INTP6 RL_ON
+3.3V_NORMAL
I2C_SCL3
POWER_ON/OFF! P61/SDAA0 P00/TI00/TXD1
I2C_SDA3
2 35 SCART_MUTE R3037
P62 P01/TO00/RXD1 For Japan:LNB_INIT 10K
AMP_RESET_N
R3003 22
3 34 POWER_ON/OFF2_4 OPT
POWER_ON/OFF2_1
AMP_RESET_BY_MICOM P63 4 33 P130
PANEL_CTL
P31/TI03/TO03/INTP4 IC3000 P20/ANI0/AVREFP
POWER_ON/OFF2_1
MODEL1_OPT_5
5 32 KEY2
IR
P75/KR5/INTP9/SCK01/SCL01 6 R5F100GEAFB 31 P21/ANI1/AVREFM
POWER_ON/OFF2_2 KEY1
P74/KR4/INTP8/SI01/SDA01 7 30 P22/ANI2 +3.3V_NORMAL
HDMI_CEC MODEL1_OPT_2
P73/KR3/SO01 MICOM P23/ANI3
POWER_ON/OFF2_3 POWER_ON/OFF2_2 8 29 MODEL1_OPT_1
R3036
POWER_ON/OFF2_3 POWER_ON/OFF2_3
P72/KR2/SO21 9 28 P24/ANI4 10K
MODEL1_OPT_0
OPT
P71/KR1/SI21/SDA21 10 27 P25/ANI5
POWER_ON/OFF2_4 EEPROM_SDA SIDE_HP_MUTE
EEPROM_SCL
P70/KR0/SCK21/SCL21 11 26 P26/ANI6
MODEL1_OPT_4
P30/INTP3/RTC1HZ/SCK11/SCL11 12 25 P27/ANI7
MODEL1_OPT_6 MODEL1_OPT_3
SOC_RESET
13
14
15
16
17
18
19
20
21
22
23
24
R3018 R3019
3.3K 3.3K
P50/INTP1/SI11/SDA11
P51/INTP2/SO11
P17/TI02/TO02
P16/TI01/TO01/INTP5
P15/PCLBUZ1/SCK20/SCL20
P14/RXD2/SI20/SDA20
P13/TXD2/SO20
P12/SO00/TXD0/TOOLTXD
P11/SI00/RXD0/TOOLRXD/SDA00
P10/SCK00/SCL00
P146
P147/ANI18
+3.5V_ST
MICOM MODEL OPTION

MICOM MODEL OPTION
0 1
+3.5V_ST
MODEL_OPT_0 NON DIVA DIVA For China
MICOM_OLED_MAIN
MICOM_OLED_FRC
R3005-*1
R3005-*2
NON JAPAN JAPAN

MICOM_TOUCH_KEY
MODEL_OPT_1 For JAPAN

MICOM_GP4_10PIN
10K
10K
10K
10K
MICOM_JAPAN
MICOM_DIIVA
10K
10K
10K
56K
22K
MICOM_PDP
MICOM_GED
MICOM_MHL
TACT_KEY TOUCH_KEY
MODEL_OPT_2
R3005
R3007
R3009
R3012
R3016
R3020
R3030
MODEL_OPT_3 LCD / OLED PDP
MODEL1_OPT_0
10K
IR Wafer IR Wafer
MODEL1_OPT_1
MODEL_OPT_4
MODEL1_OPT_2 12/15Pin 10Pin For Sample Set
MODEL1_OPT_3 (GP3_Soft touch) (GP4_TOOL)
R3022
MODEL1_OPT_4
MODEL1_OPT_5 MODEL_OPT_5 NON_MHL MHL GP4_HIGH

MODEL1_OPT_6
MODEL_OPT_6 NON_GED GED

POWER_DET
SOC_RX
SOC_RESET
INV_CTL
LOGO_LIGHT
EXT_AMP_RESET
LOGO_LIGHT
AMP_MUTE
LED_B/GP4_LED_R
SOC_TX
EXT_AMP_MUTE
+3.3V_NORMAL
For CEC
MICOM_GP3_12/15PIN
MICOM_NON_JAPAN
MICOM_NON_DIIVA
MICOM_LCD/OLED
MICOM_TACT_KEY
MICOM_NON_GED
MICOM_NON_MHL
10K
10K
10K
10K
10K
10K
10K
R3034
4.7K
R3006
R3008
R3010
R3013
R3017
R3021
R3031
OPT
Eye Sensor Option POWER_ON/OFF1
EDID_WP
C +3.5V_ST
MODEL_OPT_4 B Q3000
0 1 MMBT3904(NXP)
EDID_WP
MODEL_OPT_2 E
R3028 R3029
N/A MC8101_ABOV
0 27K 120K
G
(TACT_KEY)
D3000
BAT54_SUZHO
CM3231_CAPELLA CEC_REMOTE HDMI_CEC
1 CM3231_CAPELLA
S
(GP3 Soft touch) (GP4 Soft touch) Q3001
RUE003N02
G
HDMI_CEC_FET_ROHM
Q3001-*1
SI1012CR-T1-GE3
S
HDMI_CEC_FET_VISHAY

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 30

5V_HDMI_4_JACK
5V_HDMI_3_JACK
BODY_SHIELD
R3310 R3312
1K 4.7K R3330 R3336
GND 1K 4.7K
BODY_SHIELD
C
20 R3311
1K C R3331
R3307 Q3301 B 20
HP_DET HDMI_HPD_4_JACK Q3303 B 1K
MMBT3904(NXP)
100K HP_DET R3327 HDMI_HPD_3_JACK
19 100K
MMBT3904(NXP)
5V E 19
5V
18 E
GND 18
GND
17
DDC_DATA R3308 100 17
DDC_SDA_4_JACK DDC_DATA R3328 100
16 DDC_SDA_3_JACK
DDC_CLK R3309 100 16
DDC_SCL_4_JACK DDC_CLK R3329 100
15
ARC R3300 15 DDC_SCL_3_JACK
NC
14 0
CE_REMOTE 14
CEC_REMOTE CE_REMOTE
13 CEC_REMOTE
CK- 13
CK-_HDMI4_JACK CK-
12 CK-_HDMI3_JACK
CK_GND 12
CK_GND
EAG62611201
11
EAG62611201
CK+ 11
10 CK+_HDMI4_JACK CK+
HDMI_ARC 10 CK+_HDMI3_JACK
D0-
9 D0-_HDMI4_JACK D0-
9 D0-_HDMI3_JACK
D0_GND
8 D0_GND
8 5V_HDMI_3_JACK +5V_NORMAL
D0+ 5V_HDMI_1_SOC +5V_NORMAL
7 D0+_HDMI4_JACK D0+
7 D0+_HDMI3_JACK
D1-
6 D1-_HDMI3_JACK
D1_GND
A1
A2
A1
A2
5 D1_GND
5 IC3300 MMBD6100
D1+ MMBD6100
4 D1+_HDMI4_JACK D1+ D3302
4 M24C02-RMN6T D3300
D1+_HDMI3_JACK
C
D2-
C
3 D2-_HDMI3_JACK
D2_GND
2 D2_GND E0 VCC
2 1 8
D2+
1 D2+ C3300 C3302
D2+_HDMI4_JACK 0.1uF 0.1uF
1 D2+_HDMI3_JACK E1 WC 16V 16V R3337 R3339
2 7 EDID_WP R3323 R3325
47K 47K 47K 47K
HDMI_EXT_EDID R3319
E2 SCL 22
RSD-105156-100 JK3303 3 6 DDC_SCL_1_SOC DDC_SCL_3_JACK
HDMI_EXT_EDID
JK3301
UI : HDMI1 RSD-105156-100
VSS SDA
R3320
22
4 5
UI : HDMI3 HDMI_EXT_EDID
DDC_SDA_1_SOC DDC_SDA_3_JACK
5V_HDMI_2_JACK +5V_NORMAL 5V_HDMI_4_JACK +5V_NORMAL
A1
A2
A1
A2
MMBD6100 MMBD6100
5V_HDMI_2_JACK 5V_HDMI_1_SOC D3301 D3303
C
C3301 C3303
R3316 R3318 R3304 R3306 0.1uF 0.1uF
1K 4.7K 1K 4.7K 16V 16V
BODY_SHIELD BODY_SHIELD HDMI_INTERNAL_EDID R3324 R3326 R3338 R3340
47K 47K 47K 47K
C C
20 R3317 20 R3305
Q3302 B 1K Q3300 B 1K
HP_DET R3313 HDMI_HPD_2_JACK HP_DET R3301 HDMI_HPD_1_SOC DDC_SCL_2_JACK DDC_SCL_4_JACK
MMBT3904(NXP)
100K MMBT3904(NXP)
100K
19 19
5V 5V R3321
E E
4.7K DDC_SDA_2_JACK
18 18 DDC_SDA_4_JACK
GND GND HDMI_EXT_EDID
17 17
DDC_DATA R3314 100 DDC_DATA R3302 100
DDC_SDA_2_JACK DDC_SDA_1_SOC
16 16
DDC_CLK R3315 100 DDC_CLK R3303 100
15 DDC_SCL_2_JACK 15 DDC_SCL_1_SOC
NC NC
14 14
CE_REMOTE CE_REMOTE
CEC_REMOTE CEC_REMOTE
13 13
CK- CK-
CK-_HDMI2_JACK CK-_HDMI1_SOC
12 12
CK_GND CK_GND
EAG62611201
EAG62611201
11 11
CK+ CK+
10 CK+_HDMI2_JACK 10 CK+_HDMI1_SOC
D0- D0-
9 D0-_HDMI2_JACK 9 D0-_HDMI1_SOC
D0_GND D0_GND
8 8
D0+ D0+
7 D0+_HDMI2_JACK 7 D0+_HDMI1_SOC
D1- D1-
D1_GND D1_GND
5 5
D1+ D1+
D2- D2-
D2_GND D2_GND
2 2
D2+ D2+
JK3302 JK3300
RSD-105156-100 UI : HDMI2 RSD-105156-100 UI : HDMI4

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS HDMI 4 2011.10.29

RGB/ PC AUDIO/ SPDIF
RGB_5V RGB_5V +5V_NORMAL

RGB PC
A1
C
A2
MMBD6100
D3620
R3641
RGB_EDID
R3642 R3645
IC3600
M24C02-RMN6T 2.7K 2.7K 10K
E0 VCC
1 8
RGB_EDID JK3602
+3.3V_NORMAL
E1
2 7
WC 2F11TC1-EM52-4F
EDID_WP
E2 SCL R3643 22 VIN
3 6
RGB_DDC_SCL
SPDIF OUT A
Fiber Optic
VSS SDA R3644 22
4 5
RGB_DDC_SDA
VCC B
R3620
C3633 C3634 2.7K
18pF 18pF R3615 OPT
50V 50V 33 GND C
SPDIF_OUT
D3613 C3615 4
5.5V 0.1uF
16V
SHIELD
D3613-*1 ADUC 5S 02 0R5L
DSUB_VSYNC 5.5V OPT
D3621 ADUC 5S 02 0R5L
D3615
ADUC 5S 02 0R5L ESD_MTK
30V 5.5V
OPT OPT
DSUB_HSYNC D3622
ADUC 5S 02 0R5L
D3616 5.5V
30V OPT
OPT
RGB_DEBUG
R3602
100
DSUB_B+ SOC_RX
RGB_DEBUG
R3647 PC AUDIO
100
SOC_TX
R3600 D3600 JK3601
0 20V D3601 KJA-PH-0-0177
R3601
NON_RGB_DEBUG OPT 0 20V
OPT 5 GND
NON_RGB_DEBUG
4 L
PC_L_IN
+3.3V_NORMAL
DSUB_G+
3 DETECT D3611
5.6V D3611-*1
R3646 ESD_MTK
10K 1 R OPT
5.6V
DSUB_DET
D3623 PC_R_IN
5.6V
DSUB_R+ OPT
D3612
D3612-*1
5.6V
ESD_MTK
OPT
5.6V
11
12
13
14
10
15
6
1
7
2
8
3
9
Closed to JACK
11
12
13
14
15
16
16
10
6
9
1
JK3603
SLIM-15F-D-2

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS JACK HIGH / MID 2011.11.21

HP_LOUT JK3700
+3.3V_NORMAL KJA-PH-0-0177
GND 5
R3700
10K L 4
HP_OUT
DETECT 3
HP_DET
R 1
HP_ROUT EAG61030001
HP_OUT
VA3700
5.6V
OPT
ESD for MTK ESD for LG1152
VA3700-*1
VA3700-*2
5.6V
5.6V
ESD_MTK_HP_OUT
ESD_LG1152_HP_OUT

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS JACK_COMMON 2011.11.21

12V_COMMERCIAL_OUT
12V 1A FOR COMMERCIAL(RS-232C POWER)
12V_COMMERCIAL_OUT
RS232C 10
CVBS 1 PHONE JACK
5 +3.3V_NORMAL
9
IR_OUT 4
R3810
10K
IC3800 +3.5V_ST RS232 8
MAX3232CDR 100 R3820
3 AV1_CVBS_DET
7
RS232 D3800
0.1uF C3800 C1+ VCC 100
1 16 R3821 5.6V
2 AV_JACK_BLACK OPT
RS232 +3.5V_ST
OPT_RS232 6 JK3800
C3801 V+ GND D3804 D3805
0.1uF 2 15 R3834 KJA-PH-1-0177
20V 20V
1 5 M5_GND
RS232 OPT OPT 10K
C1- DOUT1 RS232
3 14 FOR COMMERCIAL
4 M4
SPG09-DB-009 AV1_CVBS_IN
0.1uF C3802 C2+ RIN1
4 13 JK3803 3 M3_DETECT
RS232 RS232
C2- ROUT1 1 M1
5 12
6 M6
0.1uF C3803 V- DIN1
6 11
RS232
DOUT2 DIN2
7 10 AV_JACK_YELLOW AV1_L_IN
JK3800-*1
RIN2 ROUT2 KJA-PH-1-0177-1 D3801
8 9 SOC_RX
5.6V
5 M5_GND
OPT
EAN41348201
SOC_TX
4 M4
UART_4PIN_STRAIGHT UART_4PIN_ANGLE
+3.5V_ST 3 M3_DETECT
+3.5V_ST P3800 P3801
12507WS-04L 12507WR-04L
1 M1
R3811 R3814 AV1_R_IN
4.7K 4.7K 6 M6
OPT OPT 1 1 D3802
5.6V
OPT
2 2
3 3
4 4
5 5
ESD For MTK ESD For LG1152
COMPONENT 1 PHONE JACK D3803-*1

5.6V
D3803-*2
5.6V
ESD_LG1152
+3.3V_NORMAL ESD_MTK
D3800-*1 D3800-*2
R3806 5.6V 5.6V
10K ESD_MTK ESD_LG1152
COMP1_DET
D3803 D3801-*1 D3801-*2

5.6V 5.6V 5.6V
COMP_JACK_BLACK ESD_LG1152
OPT ESD_MTK
JK3801
KJA-PH-1-0177
5 M5_GND D3802-*2
D3802-*1
5.6V 5.6V
4 M4 COMP1_Y ESD_MTK ESD_LG1152
3 M3_DETECT
1 M1
6 M6
COMP_JACK_GREEN COMP1_Pb
JK3801-*1
KJA-PH-1-0177-2
5 M5_GND
4 M4
3 M3_DETECT
1 M1 COMP1_Pr
6 M6

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS JACK_COMMON 2011.11.21

+3.5V_ST
IR & KEY RGB Sensor

GP4_IR_10P
EEPROM_SCL R4123
100 P4102
R4117 R4118
12507WR-10L
10K 10K D4105
5% 5% ADUC 20S 02 010L
20V
R4113 OPT 1
COMMERCIAL +3.5V_ST 100
KEY1 R4124
EEPROM_SDA 100
R4114 D4101 2
COMMERCIAL_IR +3.5V_ST 100 5.6V
R4101 KEY2 D4106
1K AMOTECH CO., LTD. ADUC 20S 02 010L
C4100 C4102 OPT 20V 3
COMMERCIAL_IR 0.1uF 0.1uF
R4103 +3.5V_ST D4100 OPT
IR
3.3K 5.6V
R4102 AMOTECH CO., LTD. 4
Q4100 C 10K IR_BYPASS +3.5V_ST OPT
B R4107
MMBT3904(NXP)
E 10K
COMMERCIAL_IR COMMERCIAL_IR R4104 5
C 47K
L4100
B BLM18PG121SN1D
Q4101 E
MMBT3904(NXP) COMMERCIAL_IR 6
COMMERCIAL_IR
C4104 R4125 1.5K 7

1000pF LED_B/GP4_LED_R
50V
R4100
0
9
IR_BYPASS
C4107 D4104 OPT
100pF 5.6V
+3.5V_ST 50V AMOTECH CO., LTD. 10
COMMERCIAL
COMMERCIAL_IR_EU 11
+3.5V_ST
R4109
1K
R4105 COMMERCIAL_IR
22
IR_OUT R4115
COMMERCIAL_IR COMMERCIAL_IR_EU3.3K
R4111
Q4102 C 10K
MMBT3904(NXP) B
COMMERCIAL_IR_EU E R4119
C 47K
B
Q4104
MMBT3904(NXP)
E COMMERCIAL_IR
Soft Touch Micom D/L
COMMERCIAL_IR
R4108
0
Zener Diode is
COMMERCIAL_IR_US
close to wafer
D4105-*1
ADUC 20S 02 010L
20V 10pF
ESD_MTK
D4106-*1
ADUC 20S 02 010L
20V 10pF
ESD_MTK
D4100-*2
D4100-*1 5.6V 200pF

ADMC 5M 02 200L
5.6V 200pF
ADMC 5M 02 200L ESD_LG1152
ESD_MTK
D4101-*2
5.6V 200pF
D4101-*1
ADMC 5M 02 200L
5.6V200pF
ESD_LG1152
ADMC 5M 02 200L
ESD_MTK
D4104-*2
5.6V 200pF
D4104-*1
ADMC 5M 02 200L
5.6V 200pF ESD_LG1152
ADMC 5M 02 200L
ESD_MTK

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS IR / KEY 2011.11.21

+3.3V_NORMAL
+5V_USB FOR USB1

R4327
10K R4323
10K
OPT
MAX 2A
POWER_ON/OFF2_4
IC4303
R4328 TPS2554 [EP]
10K
D4304-*1
C4327
0.1uF GND FAULT
SX34
1 10
40V
16V
16V
THERMAL
L4308
+24V 0.1uF C4329 IC4305 6.8uH
11
IN_1 OUT_2
TPS54331D
USB1
R4330
2 9
0
L4305
D4304
SMAB34
IN_2 OUT_1 C4323

BOOT PH 3 8
40V
1 8 C4333 C4336 10uF

BLM18PG121SN1D 22uF
10V
0.1uF
16V
ILIM_SEL ILIM0
10V DVR Ready
VIN GND 4 7
2 7 /USB_OCD1
MAX 1.8A
C4324
10uF
C4326
0.1uF EN
3A COMP USB_CTL1
EN
5 6
ILIM1
820
R4343
35V 3 6
50V
1%
3AU04S-305-ZC-(LG)
R4300
1/10W
R4341
1/10W
C4332 C4334 JK4303
27K
SS/TR VSENSE
27K
OPT
4 5 47pF 4700pF
330K
50V 50V
OPT
R4329
R1
1
R4338
USB DOWN STREAM

C4328 R4336 1% OPT
10K
0.01uF 20K C4338
1000pF USB_DM1
2
50V
50V
RCLAMP0502BA
3
USB_DP1
R4339
Vout=0.8*(1+R1/R2)
D4303
4
R2
1%
2K
OPT
5
R4332
IC4306 POWER_ON/OFF2_4
10K
[EP]GND SN1104041, DC-DC+2CH USB SW C4300
0.1uF
16V
+12V +3.3V_NORMAL
V7V EN
24 1
USB_DCDC_SN1104041
THERMAL
C4341 R4342
25
4.7uF AGND_3 COMP 10K

L4306 10V
23 2
BLM18PG121SN1D 5% USB_DCDC_SN1104041 10K
R4304 10K
10K
10K
VIN_2 SS C4340 C4340-*1
USB2
OPT
OPT
22 3 C4342 4700pF 0.01uF
100pF
R4301
50V 50V
R4302
R4303
50V USB_DCDC_BD86180
C4325
10uF
VIN_1
21 4
ROSC
USB_DCDC_SN1104041
MAX 1.5A
16V +5V_USB_2
PGND_2 EN_SW2
20 5 3AU04S-305-ZC-(LG)
USB_CTL2
JK4302
PGND_1 EN_SW1
19 6
1
/USB_OCD2
USB DOWN STREAM

BST NFAULT2
+5V_USB 18 7
2
USB_DM2
C4331
L4307
0.1uF
RCLAMP0502BA
3.6uH LX_2 NFAULT1
16V
17 8
3
USB_DP2
DEV_USB_DCDC_BD86180
IC4306-*1
BD86180MUV [EP]GND
C4337 C4301 +5V_USB_3
LX_1 SW_OUT2 C4322
D4302
22uF 22uF 16 9
4
EN VREG
1 24
10uF
THERMAL
OPT
10V 10V
25
COMP GND_3
2 23
10V
5
SS VIN_2
3 22
RT VIN_1
SW_IN_3 AGND_1
4 21
15 10
CTL2 PGND_2
5 20
CTL1 PGND_1
6 19
FLG2
7 18
BST
SW_IN_2 AGND_2 +5V_USB_2
FLG1
8 17
SW_2
14 11
USB_OUT2 SW_1
9 16
GND_1 USB_IN_3
10 15
SW_IN_1 SW_OUT1
GND_2
11 14
USB_IN_2
13 12
USB_OUT1 USB_IN_1
12 13
USB3
MAX 1.5A
+5V_USB_3
3AU04S-305-ZC-(LG)
JK4300
1
USB DOWN STREAM
ESD for MTK
2
ESD for LG1152
RCLAMP0502BA
3
D4300
C4310
4
OPT
10uF
5
10V
RCLAMP0502BA
D4300-*2
ESD_LG1152
USB_WIFI
RCLAMP0502BA
+5V_USB
D4302-*1
ESD_LG1152
L4302 WIFI 120-ohm

BLM18PG121SN1D
C4319 C4321 C4339
From SoC 0.1uF

16V
C4320
0.1uF
16V
10uF
10V
10uF
10V
MAX 0.4A
RCLAMP0502BA
WIFI WIFI WIFI WIFI

P4301
D4303-*3
12507WR-04L
ESD_LG1152
USB_DM3 For EMI

WIFI
VDD
USB_DP3 1
DM
WIFI_DM 2
USB_CTL3
/USB_OCD3 DP
WIFI_DP 3
GND
4

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS USB3_HUB_WiFi 2011.10.26

ZigBee_Radio Pulse M_REMOTE OPTION
+3.3V_NORMAL
P4800
12507WR-08L
L4800
M_REMOTE 120-ohm
1
3.3V M_REMOTE AR4800
C4800 100
2
GND 0.1uF
1/16W
RX
3 M_REMOTE_RX
TX
4 M_REMOTE_TX
RESET
5 M_RFModule_RESET
DC
6 M_RFModule_ISP
DD
7 3D_SYNC_RF
8
GND M_REMOTE
9
3D_SYNC_RF
Only For PDP
ALL M_REMOTE OPTION

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS MOTION REMOTE 2011.11.21

Ethernet Block
LAN_JACK_POWER
C5000 C5001 C5002 C5003

0.1uF 0.01uF 0.1uF 0.01uF
16V 50V 16V 50V
JK5000
XRJH-01A-4-DA7-180-LG(B)
LAN_XML
P1[CT]
1
P2[TD+]
2
EPHY_TDP
P3[TD-]
3
EPHY_TDN
P4[RD+]
4
EPHY_RDP
P5[RD-]
5
EPHY_RDN
P6[CT] D5000 D5001 D5002 D5003

6
5.5V 5.5V 5.5V 5.5V
OPT OPT OPT OPT
P7
7
P8
8
P9
9
P10[GND]
10
P11
11
YL_C
D1
YL_A
D2
GN_C
D3
GN_A
D4
12
SHIELD ESD_LG1152
D5000-*1
ESD_MTK
D5000-*2
ADUC 5S 02 0R5L
5.5V
ADUC 5S 02 0R5L
ESD_LG1152
D5001-*1
ESD_MTK
ADUC 5S 02 0R5L D5001-*2
5.5V
ADUC 5S 02 0R5L
JK5000-*1
TLA-6T764
ESD_LG1152
LAN_TDK
R1
1
2
R2 D5002-*1
R3
ESD_MTK
3
ADUC 5S 02 0R5L D5002-*2
R4
4 5.5V
R5
ADUC 5S 02 0R5L
5
R6
6
7
R7 ESD_LG1152
R8
8
D5003-*1
R9
9 ESD_MTK
R10[GND]
D5003-*2
10 ADUC 5S 02 0R5L
5.5V
R11
11 ADUC 5S 02 0R5L
YL_C
D1
YL_A
D2
GN_C
D3
GN_A
D4
12
SHIELD

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LAN_VERTICAL 2011.12.09

DUAL COMPONENT +3.3V_NORMAL AMP_RESET_N
C5415
1000pF
Q1801 1ST : 0TRIY80001A 2ND : 0TR387500AA 50V
50V
L5401
+24V_AMP
22000pF
BLM18PG121SN1D
C5416
OPT
AUD_MASTER_CLK R5406
3.3
+24V_AMP OPT
+24V
C5424
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
C5418 C5420 C5422
0.1uF 0.1uF 10uF 0.01uF
VDD_IO
GND_IO
/RESET
PGND1A
C5413 C5414 50V
50V 50V 35V
CLK_I
BST1A
10uF
L5400 0.1uF
10V
[EP]
CIS21J121 16V SPK_L+

D5400
AD
1N4148W R5407 R5414
12 12 L5404
100V 10.0uH C5436 R5415
OPT OPT 0.1uF
OPT C5409 C5411 5.1K
C5400 C5401 C5405 C5407 10uF 0.1uF C5429 50V
0.1uF 0.1uF 390pF NRS6045T100MMGK
50V 50V 10uF 4.7uF 10V 16V 50V C5434
10V 10V L5405 0.47uF
48
47
46
45
44
43
42
41
40
39
38
37
C5403
1000pF
50V
10.0uH 50V
SPEAKER_L
C5402 C5430 C5437
100pF R5404 AGND_PLL 1 36 OUT1B_2 D5401
390pF
50V
NRS6045T100MMGK 0.1uF
50V
R5416
50V 3.3K 1N4148W R5408 R5412 5.1K
AVDD_PLL 2 35 OUT1B_1 100V
OPT
12 12
THERMAL SPK_L-
DVDD_PLL 3 49 34 PGND1B C5425
22000pF
LF 4 33 BST1B 50V
WAFER-ANGLE
DGND_PLL IC5400 VDR1

5 32 SPK_L+
OPT 4
C5410
10uF
GND_1 6 NTP-7500L 31 VCC_5
C5412
10V 0.1uF SPK_L-
16V DGND 7 30 AGND 3
DVDD 8 29 VDR2 SPK_R+

2
0x54 C5427 C5428 C5433
SDATA 9 28 BST2A 1uF
25V
1uF
25V
1uF
25V SPK_R-
AUD_LRCH 1
WCK 10 27 PGND2A C5426
P5400
AUD_LRCK 22000pF
50V
BCK 11 26 OUT2A_2
AUD_SCK
R5402 100 SDA 12 25 OUT2A_1

I2C_SDA1
13
14
15
16
17
18
19
20
21
22
23
24
R5403 100
I2C_SCL1
C5406 C5408
+3.3V_NORMAL
33pF 33pF
50V 50V SPK_R+
SCL
/FAULT
MONITOR0
MONITOR1
MONITOR2
BST2B
PGND2B
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
+24V_AMP D5402 R5409 R5413

R5401 1N4148W 12 L5402
10K 12
100V 10.0uH
C5438 R5417
R5405 OPT
C5431 NRS6045T100MMGK 0.1uF 5.1K
C 100 C5404 390pF C5435 50V
50V 0.47uF
R5400 B Q5400
1000pF C5419 C5421 C5423
L5403
10.0uH
50V
SPEAKER_R
AMP_MUTE 50V C5432
10K MMBT3904(NXP) 0.1uF 0.1uF 10uF 390pF
50V 50V 50V NRS6045T100MMGK C5439 R5418
E 35V D5403
C5417 1N4148W R5410 R5411 0.1uF 5.1K
22000pF 100V 12 12 50V
OPT
50V
SPK_R-
WOOFER_MUTE
WOOFER_MUTE TP5403

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS AMP_NEO 2011.11.21

+3.3V_NORMAL
EARPHONE AMP L6100

120-ohm
BLM18PG121SN1D
C6105 C6107
10uF 0.1uF
10V 16V
HP_LOUT_AMP
C6104
Close to the IC
1uF
10V
OUTL
SGND
VDD
+3.3V_NORMAL
EN
R6104
C6108 100K
C6100 16 15 14 13 2.2uF OPT
1uF 10V R6105 OPT
10V INL- HPVDD 4.7K R6106
1 12
HP_LOUT_MAIN 0
C
INL+ CPP R6107
2 11 1K
Q6100 B
IC6100 C6109 MMBT3904(NXP) SIDE_HP_MUTE
INR+ TPA6132A2 PGND 2.2uF
3 10 10V E From Micom
C6103
1uF
10V INR- CPN
4 EAN60724701 9
HP_ROUT_MAIN
5 6 7 8
R6100
R6102
4.7K
OUTR
G0
G1
HPVSS
4.7K
OPT
R6101
OPT
R6103 HP_ROUT_AMP
4.7K C6106
2.2uF
10V

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 2011.09.29
HEADPHONE AMP
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 61
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

T/C/S & H/NIM & T2/C TUNER(EU & CHINA)
RF_SWITCH_CTL USE: T2/C,T/C,ATSC,DTMB.ISDB-T LNB_TX CHB_CVBS
ERROR & VALID PIN
TU6504 TU6500 TU6501 TU6502 TU6503
LNB_OUT CHB_ERR L9_T2/C/S
TDSH-T151F +3.3V_TU ATV_OUT CHB_SYNC IC6500 +3.3V_TU

TDSS-G151D TDSN-G351D TDSQ-H051F TDSQ-G051D OPT
CHB_VAL 74LVC1G08GW
CHB +5V_TU R6511 CHB_CLK
L6508 100K CHB_DATA
BR_TW_CN_TUNER TU_TS_VAL B VCC
close to TUNER BLM18PG121SN1D R6500-*1 C6520 /TU_RESET 1 5
0.1uF L9_T2/C/S
16V 0.1uF
1K 5% C6544
TU_TS_ERR A 16V
2
MTK/L9_DVB/ATSC/NTSC
TW_H/NIM T/C_H/NIM_V T2/C_F/NIM_DEV CHB_V T/C/S2_V CHB RF_SWITCH RF_SWITCH
RF_SWITCH_CTL R6526
C6501 C6503 R6500 0 GND Y 100
RF_S/W_CTL NC NC_1 +5V[SPLITTER] 1 N.C_1 10uF 0.1uF BR_TW_CN_TUNER 3 4 FE_TS_VAL
1 1 1 1 R6508-*1
10V 16V ATV_OUT 1/16W
R6508 5%
RESET RESET RESET RESET RESET 100 1K 5% L9_T2/C/S
2 2 2 2 2
MTK/L9_DVB/ATSC/NTSC R6525
SCL SCL SCL TU_SCL SCL R6509
+5V_TU
0
3 3 3 3 3 I2C_SCL6 BR_TW_CN_TUNER BR_TW_CN_TUNER +5V_TU
C6508 33 C6508-*1 C6506-*1 NOT_L9_T2/C/S
SDA SDA SDA OPT 18pF R6510 68pF 68pF
4 4 4 TU_SDA 4 SDA 4 50V R6516
I2C_SDA6 50V 50V 470 R6518 2012 perallel
OPT C6506 33
18pF
+3.3V_TU 82 R6520
220
R6521 because of derating
+B1[3.3V]
5
+B1[3.3V]
5 +B1[3.3V] 5 M_+3.3V 5 +3.3V_TUNER close to TUNER TUNER_SIF 220
5 50V E
C6511 C6514
100pF 0.1uF TU_CVBS
SIF SIF SIF M_SIF SIF 50V C6522
6 6 6 6 6 16V B E
0.1uF 16V Q6500
L6500 C
+B2[1.8V] +B2[1.8V] +B2[1.8V] R6515 MMBT3906(NXP)
7 7 7 M_+1.8V 7 +1.8V_TUNER 7 BLM18PG121SN1D 4.7K B Q6501 T/C_H/NIM T/C/S2 T2/C_F/NIM T2/C/S2 CHB
AT_H/NIM CN BR
C6551 C6550 C6505 +1.8V_TU R6519 C
MMBT3906(NXP)
CVBS CVBS CVBS M_CVBS CVBS 100pF 0.1uF 0.1uF 1K
8 8 8 8 8 50V 16V 16V T/C&AT&CHB DVB_S NOT_T/C&AT DVB_S CHB T/C&AT&CHB CN
close to Tuner 1. should be guarded by ground OPT

IF_AGC IF_AGC NC_2 M_IF_AGC T/C_IF_AGC 100 T/C&AT&CHB
9 9 9 9 9 C6500 R6506
IF_AGC2. No via on both of them NOT_DVB_S DVB_S&CHB T2/C DVB_S&CHB DVB_S&CHB NOT_DVB_S NOT_T/C&AT
L9 ATSC
0.1uF should be guarded by groumd 3. Signal Width >= 12mils
DIF[P] DIF[P] NC_3 M_DIF[P] T/C_DIF[P] Signal to Signal Width = 12mils
10 10 10 10 10 16V IF_P Not_L9_T2/C/S NOT_T/C&AT T2/C&CN NOT_T/C&AT NOT_T/C&AT Not_L9_T2/C/S RF_SWITCH
Ground Width >= 24mils
DIF[N] DIF[N] NC_4 M_DIF[N] T/C_DIF[N] +3.3V_D_Demod
11 11 11 11 11 IF_N CHB OPT OPT T2/C NOT_T/C&AT&CHB
C6523 C6528 T/C&AT&CHB T2/C&CHB&CN T/C&AT&CHB
C6525
+B3[3.3V] 12 S_3.3V 12 N.C_2 12
100pF 0.1uF 10uF
6.3V
50V 16V
12 12 C6509 NOT_T/C&AT&CHB NOT_T/C&AT&CHB
T2/C&CN T2/C&CHB&CN NOT_DVB_S
+B4[1.23V] 0.1uF T2/C&CN&BR
13 S_1.8V 13 N.C_3 13 16V L6502 +1.23V_TU
CHB BLM18PG121SN1D
SHIELD SHIELD Not_L9_T2/C/S NOT_DVB_S T2/C&CHB&CN H/NIM&CHB Not_L9_T2/C/S
NC_5 14 S_CVBS 14 N.C_4 14 close to TUNER CHB
L6507 +1.8V_TU
C6507 C6510 C6513 Not_L9_T2/C/S NOT_T/C&AT&CHB Not_L9_T2/C/S
C6516
GND 15 GND_1 15 GND_1 15
100pF 1000pF 4700pF 0.1uF BLM18PG121SN1D
50V 50V CN 50V CN 16V
T2/C&CHB&CN&BR
ERROR 16 SD_ERROR 16 ERROR 16
T2/C&CHB&CN&BR
CHB_CVBS L9_T2/C/S
CHB_ERR
SYNC 17 SD_SYNC 17 SYNC 17
CHB_SYNC
CHB_VAL
NOT_T/C&AT&CHB
VALID CHB_CLK
18 SD_VALID 18 VALID 18 AR6500 0
TU_TS_ERR
MCLK 19 SD_MCLK 19 MCLK 19
FE_TS_SYNC
TU_TS_VAL
D0 FE_TS_CLK
20 SD_SERIAL_D0 20 D0 20
CHB_DATA
D1 21 N.C_1 21 D1 21 NOT_T/C&AT&CHB FE_TS_DATA[0-7]
AR6501
0 FE_TS_DATA[0]
D2 22 N.C_2 22 D2 22 FE_TS_DATA[1]
FE_TS_DATA[2] T2 : Max 1.7A
D3 N.C_3 D3 FE_TS_DATA[3] else : Max 0.7A
23 23 23
D4 24 N.C_4 24 D4 24
FE_TS_DATA[4]
FE_TS_DATA[5]
D5 FE_TS_DATA[6]
25 N.C_5 25 D5 25 FE_TS_DATA[7]
NOT_T/C&AT
D6 26 N.C_6 26 D6 26 AR6502 +3.3V_TU_IN IC6501
+1.23V_TU
0
NOT_T/C&AT&CHB AP2132MP-2.5TRG1 [EP]
D7 27 N.C_7 27 D7 27 NOT_T/C&AT
Seperate GND for CHB R6527
20K R2 CN
28 1 8
GND_2 28 GND_2 28 C6540
1% R6528-*1
THERMAL
PG GND NOT_T/C&AT 12K
0.1uF
R6528
9
GND_3 GND_3 2 7 11K 1/16W
SHIELD 29 29 DVB_S&CHB
1% 1%
R6529 R1
L6501 +1.23V_TU
EN ADJ
BLM18PG121SN1D R6523
10K 10K
SD_1.23V_DEMOD
30 +1.23V_S2_DEMOD
30 DVB_S&CHB 3 6 1%
C6512 C6515 C6519 +3.3V_D_Demod NOT_T/C&AT VOUT NOT_T/C&AT
VIN
100pF 0.1uF 10uF C6533
SD_RESET 31 S2_RESET 31 DVB_S&CHB 10V
OPT
R6512 10uF
4 2A 5
DVB_S&CHB 2.2K +5V_NORMAL
16V VCTRL NC NOT_T/C&AT
R6513
SD_3.3V_DEMOD32 +3.3V_S2_DEMOD
32 10 EAN61387601 C6549
C6521 /S2_RESET
0.1uF DVB_S&CHB 10uF
N.C_8 33 S2_F22_OUTPUT 33 OPT +3.3V_D_Demod 16V
OPT
SD_SCL 34 S2_SCL 34 C6524 C6527 C6535
100pF 0.1uF 1uF
LNB_TX OPT OPT
SD_SDA 35 S2_SDA 35
R6503 22
LNB 36 C6517 DVB_S&CHB
I2C_SCL4 Vout=0.6*(1+R1/R2)
36 18pF
OPT 50V
GND_4 37 CHB : Max 480mA
38 R6504 22 else : Max 240mA
I2C_SDA4
C6518 DVB_S&CHB
SHIELD 18pF
LNB_OUT OPT 50V +3.3V_D_Demod +3.3V_TU
+1.8V_TU
SHIELD +3.3V_TU
IC6503
NOT_T/C&AT
L6506 AZ1117BH-1.8TRE1
BLM18PG121SN1D
NOT_T/C&AT
NOT_T/C&AT IN OUT
C6538 C6542 3 2
C6531 10uF 0.1uF 1 R6531
0.1uF 10V
ADJ/GND 1
BR_F/NIM_V CN_ATBM T2/C/S2
CN_LG3921 TU6503-*1
TU6501-*1 TU6501-*2 TDSQ-G351D
TDSN-B051F TDSN-C251D TU6501-*3
TDSN-C051D N.C_1
1
RF_S/W_CTL RF_S/W_CTL RESET
1 1 2
2
RESET
2
RESET 1
RF_S/W_CTL 3
SCL
SDA
C6546 C6548
RESET 4
SCL SCL
3 3 2
SCL
5
+B1[3.3V]
10uF 0.1uF
SDA SDA 3 SIF
4
+B1[3.3V]
4
+B1[3.3V] 4
SDA
6
7
+B2[1.8V]
Close to the tuner 10V 16V
5 5 CVBS
+B1[3.3V] 8
SIF SIF 5
6 6 N.C_2
9
+B2[1.8V] +B2[1.8V] SIF N.C_3
7 7 6 10
AT_H/NIM_V CVBS CVBS +B2[1.8V] 11
N.C_4
8 8 7
TU6500-*1 +B3[3.3V]
CVBS 12
TDSS-H151F NC_1 NC_1 8 +B4[1.23V]
9 9 13
NC_2 NC_2 NC_1 N.C_5
10 10 9 14
NC_2 GND_1
NC_3 NC_3
NC 11 11 10 15
ERROR L9/BR_TW_CN_TUNER
1 +B3[3.3V] +B3[3.3V] 11
NC_3 16
465mA(MAX)
2
RESET 12
+B4[1.23V]
12
+B4[1.23V] 12
+B3[3.3V]
17
18
SYNC
VALID
R6532-*1
13 13
3
SCL
14
NC_4
14
NC_4 13
+B4[1.23V] 19
MCLK
D0
BLM18PG121SN1D 150mA(MAX)
NC_4 20
SDA GND GND 14
15 15 D1
4 21
ERROR ERROR GND D2
+B1[3.3V] 16 16 15 22
5 SYNC SYNC 16
ERROR 23
D3 120-ohm
6
SIF 17
18
VALID
17
18
VALID 17
SYNC 24
25
D4
D5
+3.3V_NORMAL +3.3V_TU
+B2[1.8V] MCLK MCLK VALID D6
7 18
8
CVBS
19
20
D0
19
20
D0 19
MCLK
26
27
D7
GND_2
+5V_NORMAL +5V_TU
D0 28
D1 D1 20
IF_AGC 21 21 29
GND_3
9 D1
DIF[P] 22
D2
22
D2 21
D2
30
+B5[1.23V]
S2_RESET L6503 NOT_L9_BR_TW_CN Tuner

10 D3 D3
DIF[N]
23 23 22
D3
31
32
+B6[3.3V]
BLM18PG121SN1D R6532
D4 D4
11 24
D5
24
D5
23
D4
33
S2_F22_OUTPUT
S2_SCL
0
25 25 24 34
D5 S2_SDA
12 D6 D6 25 35
26 26 LNB
SHIELD 27
D7
27
D7 26
D6 36
GND_4
C6529 C6532 C6534
37
C6526 C6530 22uF C6536 C6539
D7 38
28 28 27
0.1uF 22uF 0.1uF
28 SHIELD 0.1uF 22uF 0.1uF
SHIELD SHIELD
16V 10V 16V 16V 10V 16V
SHIELD
10V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES Close to the tuner
Close to the tuner
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS TUNER 2011.11.21

FOR COMMERCIAL 12V OUT RS-232C 9 PIN
(OPT:COMMER_EXT_12V)
R7001
100
IC7000
MP5000DQ
GND SOURCE_5
1 10 +3.5V_ST
C7000
470pF
50V
DV/DT
2 9
SOURCE_4
12V_COMMERCIAL_OUT
FOR COMMERCIAL AUDIO OUT
R7000
1K ENABLE/FAULT SOURCE_3
R7006
10K
(OPT:COMMER_EXT_AMP)
COMMERCIAL_12V_CTL 3 8 L7000
BLM18PG121SN1D
FOR 12V CONTROL (FROM MICOM) I-LIMIT SOURCE_2 12V_EXT_PWR_DET P7000
4 7 12507WR-12L
C7003 C7004 +24V
22uF 0.1uF R7004
NC SOURCE_1 50V 100K
5 6 25V L7001
BLM18PG121SN1D
C
Q7001 1
11 B MMBT3904(NXP)
C7005
0.1uF 50V
VCC +12V 2
E
C7001 R7005
C7002
1uF 22K 3
22uF
25V 25V
AUDIO_L_OUT_COMMERCIAL
4
5
AUDIO_R_OUT_COMMERCIAL
EXT_AMP_RESET 7
FOR AMP RESET (MAIN SOC)

8
EXT_AMP_MUTE
SPK_L_OUT_COMMERCIAL 10
11
PATTERN SHOULD BE CONSIDERED (MAX 3W)
AUDIO OUT JACK
12
(OPT:COMMER_EXT_AMP) COMMER_EXT_AMP_JACK
JK7000
SPK_R_OUT_COMMERCIAL
13
KJA-PH-0-0177
GND 5
L 4
SPK_L_OUT_COMMERCIAL
C7006
10uF D7000 DETECT 3
16V 5.6V
R 1
SPK_R_OUT_COMMERCIAL
C7007
10uF D7001
16V 5.6V EAG61030001

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. 2011.11.21
COMMERCIAL_OPTION
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR 70

LVDS LVDS_51PIN
P7100
FI-RE51S-HF-J-R1500
[51Pin LVDS OUTPUT Connector] [41Pin LVDS OUTPUT Connector]
NC 2D/3D_CTL
1 R7100 33
NC LGD_2D/3D_CTRL
2
LVDS_SEL
NC
3
NC +3.3V_NORMAL
4 R7105 33 I2C_SDA1
NC CP_BOX
5 R7106 33 I2C_SCL1
AUO_65_MIRROR CP_BOX R7101
6 LVDS_41PIN
3.3K
LVDS_SEL LVDS_SEL_HIGH P7101
7
FI-RE41S-HF-J-R1500
NC R7107 33
8 PWM_DIM1 R7102
NC LGD_32/37_LVDS_PWM 10K
9 LVDS_SEL_LOW NC
L/DIM_ENABLE 1
R7108 33
10 OPC_EN NC 2D/3D_CTL
2 R7104 33
GND LGD_32/37_LVDS_OPC
11 NC AUO_2D/3D_CTRL
RA0N 3
12 TXA0N NC
RA0P 4
13 TXA0P NC
RA1N 5
14 TXA1N NC
RA1P 6
15 TXA1P NC
RA2N 7
16 TXA2N NC
RA2P 8
17 TXA2P GND
GND 9
18 RC0N
RACLKN 10 TXC0N
19 TXACLKN RC0P
RACLKP 11 TXC0P
20 TXACLKP RC1N
GND 12 TXC1N
21 RC1P
RA3N 13 TXC1P
22 TXA3N RC2N
RA3P 14 TXC2N
23 TXA3P RC2P
RA4N 15 TXC2P
24 TXA4N GND
RA4P 16
25 TXA4P RCCLKN
GND 17 TXCCLKN
26 RCCLKP
BIT_SEL BIT_SEL 18 TXCCLKP
27 GND
RB0N 19
28 TXB0N R7103 RC3N
RB0P 10K 20 TXC3N
29 TXB0P BIT_SEL_LOW RC3P
RB1N 21 TXC3P
30 TXB1N RC4N
RB1P 22 TXC4N
31 TXB1P RC4P
RB2N 23 TXC4P
32 TXB2N GND
RB2P 24
33 TXB2P GND
GND 25
34 RD0N
RBCLKN 26 TXD0N
35 TXBCLKN RD0P
RBCLKP 27 TXD0P
36 TXBCLKP RD1N
GND 28 TXD1N
37 RD1P
RB3N 29 TXD1P
38 TXB3N RD2N
RB3P 30 TXD2N
39 TXB3P RD2P
RB4N 31 TXD2P
40 TXB4N GND
RB4P 32
41 TXB4P RDCLKN
GND 33 TXDCLKN
42 RDCLKP
GND 34 TXDCLKP
43 GND
GND 35
44 RD3N
PANEL_VCC 36
GND TXD3N
45 RD3P
GND 37 TXD3P
46 RD4N
L7100 38
NC TXD4N
47 BLM18SG121TN1D RD4P
VLCD LVDS_51PIN 39 TXD4P
48 GND
VLCD 40
49 GND
VLCD 41
50 C7100 C7101 C7102
VLCD 10uF 1000pF 0.1uF
51 16V 50V 50V 42
OPT OPT OPT
GND
52
GND

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LVDS_HIGH_MID 2011.08.11

LOCAL DIMMING
[To LED DRIVER]
P7600 +3.3V_NORMAL
12507WR-08L
L/DIM_OUT
R7600
10K
OPT
1
AR7600
R7601
10K
33
2 L/DIM_OUT 1/16W
3 L/DIM0_SCLK
5 L/DIM0_MOSI
6 I2C_SCL1
7
L/DIM_OUT I2C_SDA1
8 R7606 33
L/DIM0_VS
L/DIM_OUT
9
R7607
4.7K
L/DIM_OUT

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS LOCAL DIMMING 2011.12.13

VCOM_P
<POWER BLOCK>
VCOM_N
VCOM_LOOP
VCC18
L7700 R7708 0
VCOMRFB
C7705 C7708 1/16W
LQM2HPN2R2MG0L
GMA15
GMA14
GMA12
GMA7
GMA5
GMA4
10uF 10uF 2.2uH R7709 0
10V 10V VCOMLFB VCC
OPT 1/16W R7759 R7760
0 0 INSTEAD OF AMCC0208
R7710 0 R7730 R7737 1/16W
VCOM_DYN 1/16W
Vcore 1/16W OPT OPT
1/16W 1/16W Q7700
R7725 0 FROM SOC 1/16W
PMIC_RESET CTRLN MMBT3904(NXP)
[EP]AGND
L7705 TO SOC OPT VGL_FB R7728 100K
C
VCC
VCOMFB
BLM18PG121SN1D
PGND4
SWN
VCOM
GMA6
GMA5
GMA4
GMA3
GMA2
GMA1
OPT L7701 1/16W 5% D7703 VGL_FB
DYN
POS
NEG
1N4148W
CTRLN
B
C7706 C7709 LQM2HPN2R2MG0L R7701
100V VGL
48
47
46
45
44
43
42
41
40
39
38
37
10uF 10uF 2.2uH 10K SWP
10V 10V 1/16W OUT4 1 36 CTRLN VGH_FB C7745 C7747 R7745 0
SWB4 2 35 VGL CTRLP SWN
THERMAL 1uF 25V 1uF 25V 1/16W
RST 3 34 SWN D7705 R7739
49 C7727 C7756 C7733
1N4148W 1.5K
OUT1 4 33 SWP 0.1uF 1/16W 1uF 10uF
OUT2 5
IC7700 32 VGH
100V 50V 5% 25V 16V
VCC
SWB2 6 TPS65178RSLR 31 CTRLP
L7702 PGND2 7 EPI 30 TCOMP
TCOMP VL
SWB1_1 8 29 VL
C7707 C7728 22uH SWB1_2 9 28 SDA
R7700 C7704 C7710 C7711 C7712 PANEL_VCC I2C_SDA2
10uF 10uF C7721 10uF NC SCL C7742
2K 0.1uF 10uF 10uF 1uF D7700 10 27 I2C_SCL2
10V 10V SX34 25V PVINB1_1 1uF
1/16W 16V 10V 10V 10V OPT 11 26 COMP
OPT OPT 40V COMP 25V
PVINB1_2 SS INSTEAD OF AMCC0209
12 25 SS
VGH_FB
13
14
15
16
17
18
19
20
21
22
23
24
C7713 C7714 C7716
10uF 10uF 10uF D7704
25V 25V 25V C7746 C7748 1N4148W
AVIN
PVINB3
SWB3
OUT3
PGND3
PGND_1
PGND_2
SW_1
SW_2
SWI
SWO
AGND
VGH
OPT SS SWP R7746 0
COMP 1uF 25V 1uF 25V 100V
C7724 1/16W
R7717 C7731 VDD C7755 C7757
1uF CTRLP
B
33K OPT 0.1uF
1/16W D7706 1uF 1uF
25V C7740 16V 1N4148W R7744 R7750
50V 50V 20K
1000pF 100V 20K
1/10W 1/10W
C7736 50V 5% 5%
C
H_VDD L7703
NR6020T6R8NC 1000pF R7727 100K
THIS IS REVERSE PATTERN !!!! 6.8uH
50V
1/16W 5% MMBT3906(NXP)
Q7701 C7754
0.1uF
50V
R7729 C7715 C7722
2.7K 10uF 10uF
1/16W 16V 16V
VDD
[Left Source(51PIN LOCATION)] [Right Source(41PIN LOCATION)]
C7737 C7739 R7718

0.1uF 0.1uF C7730
50V 50V 68uF 9.1K
35V VL
R7713 C7729 1/16W
PANEL_VCC 2.2 1000pF
VCC18
1/16W 50V
VCC18
OPT OPT
L7704 D7701 R7720
22uH SX34 47K
1/16W
5%
C7703 C7702 40V TCOMP
C7701 C7700 0.1uF 0.01uF C7723 C7725 C7734 C7738 C7732 C7735
0.1uF 0.01uF 50V 50V 10uF 10uF 0.1uF 0.1uF 0.1uF 68uF
TH7700 R7722
50V 50V 25V 25V 50V 50V 50V 35V 100K
47k-ohm 1/16W
OPT 1%
NCP18WB473F10RB
51
51
50
Z_OUT
50 GMA1
49
49 GMA3 CLK1
48
48 GMA4 CLK2
47
47
46
GMA5
GMA7
46
45
CLK3
CLK4
<LEVEL SHIFTER BLOCK>
45 GMA9 CLK5
44
44 GMA10 CLK6
43
R7702
43 GMA12 VGH_R 0
42
CLK6_I CLK6
42 GMA14 VGH_F R7707
41 CLK5_I CLK5
41 GMA15 0 R7711
40
VGH_ODD CLK4_I CLK4
0 R7712
40 GMA16 VGH_EVEN CLK3_I CLK3
39
0 R7714
39 GMA18 VGL_I CLK2_I CLK2
Vcore 38 0 R7715
38
CLK1_I CLK1
VST
CLK6_I
CLK5_I
CLK4_I
CLK2_I
CLK1_I
CLK3_I
37 0
37 GIP_RST
36
36
EPI_LOCK3
35
VCOMRFB
35 VCOM
34
VDD H_VDD
34
33 VCC
33
32 RE
32
TXB2P CH6
31 VGL R7748
CLK6
CLK5
CLK4
CLK3
CLK2
CLK1
31
TXB2N FROM SOC 1K VGL
30 1/16W
RE
30
29 [EP]VGL REVERSE R7740 0
VGL_I
R7749
1
29 TXA4P
28
R7703 1K 1/16W
TXB1P 47 VGH_R BI-SCAN
28 CH5 TXA4N EO_SOC EO VGH_R 8 28 REVERSE
1/16W
THERMAL
27 OPT R7741 0
TXB1N 1/16W DISCHG
27 FROM SOC FROM SOC VGH_F GCLK
29
26 VGH_F 9 27 GCLK VCC 1/16W
26 C7717 ODD MCLK OPT
25
VGH_ODD 10 26 MCLK
25
15pF
TXACLKP
TXB0P
24 50V EVEN 11 TPS65198 25 GST VDD
24 CH4 23
TXACLKN
VGH_EVEN
IC7701
GST R7735
VST EO 100
TXB0N FROM SOC H_VDD 12 24 1/16W
23
22
VST EPI EO
R7742 3K
22 R7719 0 RESET VSENSE RE
21 GIP_RST 13 23 OPT 1/16W
VDD
21 TXA1P R7704 47 1/16W
20 GST_SOC GST DISCHG 14 22 GND R7736 C7750
DISCHG R7743 0
20 1/16W 3K 1uF
TXA1N 1/16W
15
16
17
18
19
20
21
19 FROM SOC FROM SOC 25V OPT 1/16W
19 VDD PANEL_VCC
18
Vcore OPT
C7718 VGL R7716
VGL
VGH1
VGH2
OUT
NEG
POS
AVDD
18 15pF 0 VGL R7751 R7753
17 1/16W 15K 15K
17
VCOM 50V OPT R7738 R7747 1/16W 1/16W
16 0 0 OPT
VCOMLFB 1/16W 1/16W
16 EPI_LOCK3 OPT R7754
15 R7721 R7752
GIP_RST +3.3V_NORMAL 0 C7726 15K 15K
15 EPI_LOCK6_SOURCE 1/16W 1uF 1/16W 1/16W
14 OPT
14
VST 25V
13
VGL_I
13 GMA18 R7705 47
12 MCLK_SOC MCLK VCOM_P
12
VGH_EVEN C7741 C7743
11
GMA16 1/16W VCOM_N
VGH_ODD FROM SOC 10uF 1uF
11 GMA15 R7758
10 10K 16V 25V VCOM_LOOP
VGH_F VCC18 R7756 C7719 R7731 0
10 GMA14
9 10K EPI_LOCK6 15pF 1/16W
9
VGH_R C 50V
GMA12
VCOM
8
CLK6 R7757
8 GMA10 B VDD
7 MMBT3904(NXP)
CLK5 Q7703
7 GMA9 R7761 10K
6
CLK4 10K E D7702
6 GMA7 OPT R7734 0
5
C R7706 47
5
CLK3 GCLK_SOC GCLK
4
GMA5 R7755 1/16W OPT
CLK2 B 1/16W OPT
4 GMA4 EPI_LOCK6_SOURCE Q7702 R7723 R7724 40V
3 FROM SOC C7744 R7726 R7732 C7749
100 MMBT3904(NXP) 0 0 0 0 R7733
3
CLK1 C7720 1/16W 1/16W 1uF 0 1uF
GMA3 1/16W 1/16W 1/16W
2 E 15pF OPT 50V 50V
2
OPT OPT
1
GMA1 50V
1
Z_OUT
VGH VGH
FL8S050HA1
FL8S050HA1 P7703
P7702 DEV_50WAFER
DEV_50WAFER

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. T-Con 77

eMMC I/F
EMMC_VCCQ
EMMC DATA LINE 47K PULL/UP

47K
47K
47K
47K
47K
47K
47K
47K
R8117
R8116
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
EMMC DATA LINE
10K PULL/UP
R8100-*1
R8101-*1
R8102-*1
R8103-*1
R8104-*1
R8105-*1
R8106-*1
R8107-*1
R8100
R8101
R8102
R8103
R8104
R8105
R8106
R8107
IC8100 IC8100-*3
IC8100-*1 IC8100-*2
SDIN5D2-4G-974L1 H26M31001EFR
H26M21001ECR KLM2G1HE3F-B001
AR8100
EMMC_DATA[0-7] 22
1/16W
EMMC_DATA[0] A3 C8 A3 C8
DAT0 NC_25 DAT0 NC_25 A3 C8 A3 C8
EMMC_DATA[1] A4 C9 A4 C9 DAT0 NC_25 DAT0 NC_25
EMMC_DATA[2] A5 C10 A5 C10 DAT1 NC_26 DAT1 NC_26
EMMC_DATA[3] B2 C11 B2 C11 DAT2 NC_27 DAT2 NC_27
EMMC_DATA[4] DAT3 NC_28 DAT3 NC_28 B2 C11 B2 C11
B3 C12 B3 C12 DAT3 NC_28 DAT3 NC_28
EMMC_DATA[7] AR8101 DAT6 NC_31 DAT6 NC_31 B5 C14 B5 C14
22 B6 D1 B6 D1 DAT6 NC_31 DAT6 NC_31
1/16W DAT7 NC_32 DAT5 DAT7 NC_32 B6 D1 B6 D1
D2 D2 DAT7 NC_32 DAT7 NC_32
NC_33 NC_33 D2 D2
D3 D3 NC_33 NC_33
NC_34 NC_34 D3 D3
M6 D4 M6 D4 NC_34 NC_34
CLK NC_35 CLK NC_35 M6 D4 M6 D4
M5 D12 M5 D12 CLK NC_35 CLK NC_35
CMD NC_36 CMD NC_36 M5 D12 M5 D12
D13 D13 CMD NC_36 CMD NC_36
NC_37 NC_37 D13 D13
D14 D14 NC_37 NC_37
NC_38 NC_38 D14 D14
A6 E1 A6 E1 NC_38 NC_38
NC_3 NC_39 NC_3 NC_39 A6 E1 A6 E1
A7 E2 A7 E2 NC_3 NC_39 NC_3 NC_39
NC_4 NC_40 NC_4 NC_40 A7 E2 A7 E2
C5 E3 C5 E3 NC_4 NC_40 NC_4 NC_40
NC_23 NC_41 NC_23 NC_41 C5 E3 C5 E3
E5 E12 E5 E12 NC_23 NC_41 NC_23 NC_41
NC_42 NC_46 NC_42 NC_46 E5 E12 E5 E12
E8 E13 E8 E13 NC_42 NC_46 NC_42 NC_46
NC_43 NC_47 NC_43 NC_47 E8 E13 E8 E13
AR8102 22 E9 E14 E9 E14 NC_43 NC_47 NC_43 NC_47
EMMC_CLK NC_44 NC_48 NC_44 NC_48 E9 E14 E9 E14
E10 F1 E10 F1 NC_44 NC_48 NC_44 NC_48
EMMC_CMD NC_45 NC_49 DAT6 NC_45 NC_49 E10 F1 E10 F1
F10 F2 F10 F2 NC_45 NC_49 NC_45 NC_49
EMMC_RST NC_52 NC_50 NC_52 NC_50 F10 F2 F10 F2
G3 F3 G3 F3 NC_52 NC_50 NC_52 NC_50
NC_58 NC_51 NC_58 NC_51 G3 F3 G3 F3
G10 F12 G10 F12 NC_58 NC_51 NC_58 NC_51
NC_59 NC_53 NC_59 NC_53 G10 F12 G10 F12
H5 F13 H5 F13 NC_59 NC_53 NC_59 NC_53
NC_66 NC_54 NC_66 NC_54 H5 F13 H5 F13
J5 F14 J5 F14 NC_66 NC_54 NC_66 NC_54
C8107 NC_73 NC_55 NC_73 NC_55 J5 F14 J5 F14
OPT 10pF K6 G1 K6 G1 NC_73 NC_55 NC_73 NC_55
NC_80 NC_56 NC_80 NC_56 K6 G1 K6 G1
50V K7 G2 K7 G2 NC_80 NC_56 NC_80 NC_56
NC_81 NC_57 NC_81 NC_57 K7 G2 K7 G2
K10 G12 K10 G12 NC_81 NC_57 NC_81 NC_57
NC_82 NC_60 NC_82 NC_60 K10 G12 K10 G12
P7 G13 P7 G13 NC_82 NC_60 NC_82 NC_60
NC_116 NC_61 NC_116 NC_61 P7 G13 P7 G13
P10 G14 P10 G14 NC_116 NC_61 NC_116 NC_61
NC_119 NC_62 NC_119 NC_62 P10 G14 P10 G14
H1 H1 NC_119 NC_62 NC_119 NC_62
HYNIX_EMMC_2GB
SANDISK_EMMC_4GB
NC_63 NC_63 H1 H1
H2 H2 NC_63 NC_63
NC_64 NC_64 H2 H2
K5 H3 K5 H3 NC_64 NC_64
RESET NC_65 RESET NC_65 K5 H3 K5 H3
H12 H12 RESET NC_65 RSTN NC_65
SAMSUNG_EMMC_2GB
C8100 H12 H12
DEV_HYNIX_EMMC_4GB
NC_67 NC_67
0.1uF H13 H13 NC_67 NC_67
OPT NC_68 NC_68 H13 H13
16V C6 H14 C6 H14 NC_68 NC_68
VCCQ_1 NC_69 VCCQ_1 NC_69 C6 H14 C6 H14
EMMC_VCCQ 3.3V_EMMC M4 J1 M4 J1 VCCQ_1 NC_69 VDD_1 NC_69
VCCQ_2 NC_70 VCCQ_2 NC_70 M4 J1 M4 J1
N4 J2 N4 J2 VCCQ_2 NC_70 VDD_2 NC_70
VCCQ_3 NC_71 VCCQ_3 NC_71 N4 J2 N4 J2
P3 J3 P3 J3 VCCQ_3 NC_71 VDD_3 NC_71
VCCQ_4 NC_72 VCCQ_4 NC_72 P3 J3 P3 J3
P5 J12 P5 J12 VCCQ_4 NC_72 VDD_4 NC_72
VCCQ_5 NC_74 VCCQ_5 NC_74 P5 J12 P5 J12
EMMC_RESET_BALL
DAT3
DAT4
DAT5
DAT6
EMMC_CLK_BALL
EMMC_CMD_BALL
J13 J13 VCCQ_5 NC_74 VDD_5 NC_74

C8105 C8106 NC_75 NC_75 J13 J13
0.1uF 2.2uF J14 J14 NC_75 NC_75
NC_76 NC_76 J14 J14
16V 10V E6 K1 E6 K1 NC_76 NC_76
VCC_1 NC_77 EMMC_RESET_BALL VCC_1 NC_77 E6 K1 E6 K1
F5 K2 F5 K2 VCC_1 NC_77 VDDF_1 NC_77
VCC_2 NC_78 VCC_2 NC_78 F5 K2 F5 K2
J10 K3 J10 K3 VCC_2 NC_78 VDDF_2 NC_78
VCC_3 NC_79 VCC_3 NC_79 J10 K3 J10 K3
K9 K12 K9 K12 VCC_3 NC_79 VDDF_3 NC_79
VCC_4 NC_83 VCC_4 NC_83 K9 K12 K9 K12
K13 K13 VCC_4 NC_83 VDDF_4 NC_83
NC_84 NC_84 K13 K13
EMMC_VDDI K14 K14 NC_84 NC_84
NC_85 NC_85 K14 K14
C2 L1 C2 L1 NC_85 NC_85
VDDI NC_86 VDDI NC_86 C2 L1 C2 L1
L2 L2 VDDI NC_86 VDDI NC_86
C8104 NC_87 NC_87 L2 L2
0.1uF L3 L3 NC_87 NC_87
NC_88 NC_88 L3 L3
16V E7 L12 E7 L12 NC_88 NC_88
VSS_1 NC_89 VSS_1 NC_89 E7 L12 C4 L12
G5 L13 G5 L13 VSS_1 NC_89 VSS_1 NC_89
VSS_2 NC_90 VSS_2 NC_90 G5 L13 E7 L13
H10 L14 H10 L14 VSS_2 NC_90 VSS_2 NC_90
VSS_3 NC_91 VSS_3 NC_91 H10 L14 G5 L14
K8 M1 K8 M1 VSS_3 NC_91 VSS_3 NC_91
VSS_4 NC_92 VSS_4 NC_92 K8 M1 H10 M1
C8102 C8103 C4 M2 C4 M2 VSS_4 NC_92 VSS_4 NC_92
0.1uF 2.2uF VSSQ_1 NC_93 VSSQ_1 NC_93 C4 M2 K8 M2
N2 M3 N2 M3 VSSQ_1 NC_93 VSS_5 NC_93
16V 10V VSSQ_2 NC_94 VSSQ_2 NC_94 N2 M3 N2 M3
N5 M7 N5 M7 VSSQ_2 NC_94 VSS_6 NC_94
VSSQ_3 NC_95 VSSQ_3 NC_95 N5 M7 N5 M7
P4 M8 P4 M8 VSSQ_3 NC_95 VSS_7 NC_95
VSSQ_4 NC_96 VSSQ_4 NC_96 P4 M8 P4 M8
P6 M9 P6 M9 VSSQ_4 NC_96 VSS_8 NC_96
VSSQ_5 NC_97 VSSQ_5 NC_97 P6 M9 P6 M9
M10 M10 VSSQ_5 NC_97 VSS_9 NC_97
NC_98 NC_98 M10 M10
M11 M11 NC_98 NC_98
NC_99 NC_99 M11 M11
M12 M12 NC_99 NC_99
NC_100 NC_100 M12 M12
A1 M13 A1 M13 NC_100 NC_100
DAT3 NC_1 NC_101 NC_1 NC_101 A1 M13 A1 M13
A2 M14 A2 M14 NC_1 NC_101 NC_1 NC_101
DAT4 NC_2 NC_102 NC_2 NC_102 A2 M14 A2 M14
A8 N1 A8 N1 NC_2 NC_102 NC_2 NC_102
NC_5 NC_103 NC_5 NC_103 A8 N1 A8 N1
A9 N3 A9 N3 NC_5 NC_103 NC_5 NC_103
NC_6 NC_104 NC_6 NC_104 A9 N3 A9 N3
A10 N6 A10 N6 NC_6 NC_104 NC_6 NC_104
NC_7 NC_105 EMMC_CMD_BALL NC_7 NC_105 A10 N6 A10 N6
A11 N7 A11 N7 NC_7 NC_105 NC_7 NC_105
NC_8 NC_106 NC_8 NC_106 A11 N7 A11 N7
A12 N8 A12 N8 NC_8 NC_106 NC_8 NC_106
NC_9 NC_107 NC_9 NC_107 A12 N8 A12 N8
A13 N9 A13 N9 NC_9 NC_107 NC_9 NC_107
NC_10 NC_108 NC_10 NC_108 A13 N9 A13 N9
A14 N10 A14 N10 NC_10 NC_108 NC_10 NC_108
NC_11 NC_109 NC_11 NC_109 A14 N10 A14 N10
B1 N11 B1 N11 NC_11 NC_109 NC_11 NC_109
NC_12 NC_110 NC_12 NC_110 B1 N11 B1 N11
B7 N12 B7 N12 NC_12 NC_110 NC_12 NC_110
NC_13 NC_111 NC_13 NC_111 B7 N12 B7 N12
B8 N13 B8 N13 NC_13 NC_111 NC_13 NC_111
NC_14 NC_112 NC_14 NC_112 B8 N13 B8 N13
B9 N14 B9 N14 NC_14 NC_112 NC_14 NC_112
NC_15 NC_113 NC_15 NC_113 B9 N14 B9 N14
B10 P1 B10 P1 NC_15 NC_113 NC_15 NC_113
NC_16 NC_114 NC_16 NC_114 B10 P1 B10 P1
B11 P2 B11 P2 NC_16 NC_114 NC_16 NC_114
NC_17 NC_115 NC_17 NC_115 B11 P2 B11 P2
B12 P8 B12 P8 NC_17 NC_115 NC_17 NC_115
NC_18 NC_117 EMMC_CLK_BALL NC_18 NC_117 B12 P8 B12 P8
Dont Connect Power At VDDI EMMC_VDDI B13
B14
NC_19
NC_20
NC_118
NC_120
P9
P11
B13
B14
NC_19
NC_20
NC_118
NC_120
P9
P11
B13
B14
NC_18
NC_19
NC_117
NC_118
P9
P11
B13
B14
NC_18
NC_19
NC_117
NC_118
P9
P11
C1 P12 C1 P12 NC_20 NC_120 NC_20 NC_120
NC_21 NC_121 NC_21 NC_121 C1 P12 C1 P12
(Just Interal LDO Capacitor) DAT5
C3
C7
NC_22 NC_122
P13
P14
C3
C7
NC_22 NC_122
P13
P14
C3
NC_21
NC_22
NC_121
NC_122
P13 C3
NC_21
NC_22
NC_121
NC_122
P13
NC_24 NC_123 NC_24 NC_123 C7 P14 C7 P14
NC_24 NC_123 NC_24 NC_123
DU1 DU9 DU1 DU9

DUMMY_1 DUMMY_9 DUMMY_1 DUMMY_9
DU2 DU10 DU2 DU10
DU3 DU11 DU3 DU11
DU4 DU12 DU4 DU12
DU5 DU13 DU5 DU13
DU6 DU14 DU6 DU14
DU7 DU15 DU7 DU15
DU8 DU16 DU8 DU16

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS eMMC 11.09.29
81

+3.5V_ST
BLM18PG121SN1D
LOGO_LIGHT
P8900
L8900
12507WR-03L
Place Near Micom

1
LOGO_LIGHT
+3.5V_ST
2
R8900
10K
3
R8902
OPT
22
LOGO_LIGHT 4
C
LOGO_LIGHT
B
LOGO_LIGHT
LOGO_LIGHT
1K Q8900
LOGO_LIGHT
R8903
R8901
E
C8900 LOGO_LIGHT MMBT3904(NXP)
10K
0.1uF
16V


Contents of LCD TV Standard Repair Process
No. Error symptom (High category) Error symptom (Mid category) Page Remarks
1 No video/Normal audio 1
2 No video/No audio 2
3 A. Video error Video error, video lag/stop, fail tunning 3, 4
4 Color error 5
Vertical/Horizontal bar, residual image, light

5 6
spot, external device color error
6 No power 7
B. Power error Off when on, off while viewing, power auto
7 8
on/off
8 No audio/Normal video 9
C. Audio error
9 Wrecked audio/discontinuation/noise 10
No response in remote controller, key error,
10 11
D. Function error recording error, memory error
11 External device recognition error 12
12 E. Noise Circuit noise, mechanical noise 13
13 F. Exterior error Exterior defect 14
First of all, Check whether there is SVC Bulletin in GCSC System for these model.

Contents of LCD TV Standard Repair Process Detail Technical Manual
No. Error symptom Content Page Remarks
1 Check LCD back light with naked eye A1
2 LED driver B+ 24V measuring method A2
A. Video error_ No video/Normal audio
3 Check White Balance value A3
4 Power Board voltage measuring method A4
6 TUNER input signal strength checking method A6
A. Video error_ No video/Video lag/stop
7 LCD-TV Version checking method A7
9 LCD TV connection diagram A8
10 Tuner Checking Part A9
A. Video error_Color error A10 A10 : 32/37/42/47/55
11 Check Link Cable (LVDS) reconnection condition
A11 A11 : 32 AUO
12 Adjustment Test pattern - ADJ Key A12
13 LCD TV connection diagram A8
A. Video error_Vertical/Horizontal bar, A10 A10 : 32/37/42/47/55
14 Check Link Cable (LVDS) reconnection condition
residual image, light spot A11 A11 : 32 AUO
15 Adjustment Test pattern - ADJ Key A12
16 Exchange T-Con Board (1) A-1/5
17 Exchange T-Con Board (2) A-2/5

<Appendix>
Defected Type caused by T-Con/ Inverter/ 55 : driver board
18 Exchange LED driver Board (PSU) A-3/5
Module Other : PSU
19 Exchange Module itself (1) A-4/5

20 Exchange Module itself (2) A-5/5

Standard Repair Process
Established
Error A. Video error date
LCD TV symptom
No video/ Normal audio Revised date 1/13
First of all, Check whether all of cables between board is inserted properly or not.
(Main B/D Power B/D, LVDS Cable,Speaker Cable,IR B/D Cable,,,)
A1 A4
No video Normal Y Check Back Light Y Check Power Board Normal Y Replace T-con Board
Normal audio On or module
audio On with naked eye 12v,3.5v etc. voltage
And Adjust VCOM
N N N A28
Move to No
A2 Check Power Board 24v output Repair Power Board
video/No audio or parts
Replace Inverter
Normal Y
or module
voltage
End
N
Repair Power
Board or parts
Precaution A7 & A3
Always check & record S/W Version and White
Balance value before replacing the Main Board Replace Main Board Re-enter White Balance value

Established
LCD TV symptom
No video/ No audio Revised date 2/13
A4
Check various voltages Check and
Normal Y
No Video/ of Power Board replace
No audio ( 3.5V,12V,20V or voltage?
MAIN B/D
24V)
N End
Replace Power
Board and repair
parts

Established
Error A. Picture Problem date
LCD TV symptom
Picture broken/ Freezing Revised date 3/13
. By using Digital signal level meter

A6
. By using Diagnostics menu on OSD
Check RF Signal level ( Menu Set up Support Signal Test )
- Signal strength (Normal : over 50%)
- Signal Quality (Normal: over 50%)
Y Check whether other equipments have problem or not.

Normal
(By connecting RF Cable at other equipment)
Signal?
DVD Player ,Set-Top-Box, Different maker TV etc`
N
MenuSetup Booster
A7
Check RF Cable Booster menu
Normal Y Check SVC N Normal Y
Connection OnOff: Check Close
1. Reconnection Picture? S/W Version Bulletin? Picture?
OffOn: Check
2. Install Booster
N Y N
S/W Upgrade Check

Normal N Contact with signal distributor Tuner soldering
Picture? or broadcaster (Cable or Air)
Normal N
Y Picture? Replace
Main B/D
Y
Close
Close

Established
Error A. Picture Problem (DVB-S/S2) date
LCD TV symptom
Tuning fail, Picture broken/ Freezing Revised date 3/13
A6 Check RF signal cable (DVB satellite signal or not)

Check whether other equipments have problem or not.
Check RF Signal level
(By connecting RF Cable at other equipment)
Set-Top-Box, Different maker TV etc
Check satellite setting. A7

- Check LNB frequency. Y N
Normal Y Normal Check SVC Check Replace
- Check satellite
Signal? setting? S/W Version Bulletin? Tuner soldering Main B/D
- Check Satellite connection
(DiSEqC, motor, etc) Y
N N
S/W Upgrade
Contact with
Change satellite setting N
signal distributor Normal
(match with installed ANT)
or broadcaster Picture?
(Cable or Air)
Y
N
Normal
Picture? Close
Close
Y
Close

Established
LCD TV symptom
Color error Revised date 4/13
A8
A10/ A11
Check and Y
Check color by input
replace Link
-External Input Y Y
Color Cable Color Color
-COMPONENT Replace Main B/D Replace module
error? (LVDS) and error? error?
-RGB
contact
-HDMI/DVI N N N
condition
Check error End

color input mode
A12 Check
External Input/ External device Y
external
Check Test pattern Component /Cable Replace Main B/D
device and
error normal
cable
N
Request repair
for external
device/cable
RGB/ Check external External device Y

HDMI/DVI device and /Cable Replace Main B/D
error cable normal

A. Video error Established

Error date
LCD TV symptom Vertical / Horizontal bar, residual image,
Revised date 5/13
light spot, external device color error
Vertical/Horizontal bar, residual image, light spot Replace

Module
A8
A10/ A11 N
Check color condition by input Check external
Check and
A28
-External Input Screen Y device Y Screen N Screen
-Component Normal? replace Link Replace Main B/D
normal? connection normal? normal?
-RGB Cable (adjust VCOM)
condition
-HDMI/DVI For LGD panel Y
N N
Y
Replace Main B/D
Replace Request repair End End
for external
A12 module
device For other panel
Check Test pattern
External device screen error-Color error

Check screen
condition by input
External
Check S/W Version Check N -External Input
Input Connect other external device
version -Component and cable N
error Screen Replace
-RGB (Check normal operation of normal?
-HDMI/DVI External Input, Component, RGB Main B/D
Y Component and HDMI/DVI by connecting Jig,
error pattern Generator ,Set-top Box
Y
S/W Upgrade
etc.
Request repair for
external device
RGB
error Connect other external device Y
Normal N and cable Screen N
screen? Replace
(Check normal operation of
normal? Main B/D
HDMI/ External Input, Component,
Y RGB and HDMI/DVI by
DVI
connecting Jig, pattern
End Generator ,Set-top Box etc.

Established
Error B. Power error date
LCD TV symptom
No power Revised date 6/13
A17 A19
Y DC Power on N Y Replace
Check Power LED Normal Check Power
by pressing Power Key OK? Power
Power LED On? operation? On High
On Remote control B/D
. Stand-By: Red N N
Y
. Operating: white
Check Power cord Replace Main B/D
was inserted properly
A4
N Measure voltage of each output of Power B/D
Normal?
Y
Y Y
Normal
voltage?
Replace Main B/D
Close Normal
Check ST-BY 3.5V Y
voltage? N
A18
Replace Power B/D
N
Replace Power
B/D

Established
Error B. Power error date
LCD TV symptom
Off when on, off while viewing, power auto on/off Revised date 7/13
Check outlet
A22
N CPU Y
Check A/C cord Error? Check Power Off Normal? End
Replace Main B/D
Mode Abnormal
N
Check for all 3- phase
Y Abnormal Replace Power B/D
power out
1
Fix A/C cord & Outlet A19

and check each 3 (If Power Off mode is
phase out not displayed) Normal Y
Replace Main B/D
Check Power B/D voltage?
voltage
Caution
N
Check and fix exterior
of Power B/D Part
Replace Power B/D
Status Power off List Explanation

"POWEROFF_REMOTEKEY" Power off by REMOTE CONTROL
"POWEROFF_OFFTIMER" Power off by OFF TIMER
"POWEROFF_SLEEPTIMER" Power off by SLEEP TIMER
* Please refer to the all cases which "POWEROFF_INSTOP" Power off by INSTOP KEY
can be displayed on power off mode. "POWEROFF_AUTOOFF" Power off by AUTO OFF
Normal "POWEROFF_ONTIMER" Power off by ON TIMER
"POWEROFF_RS232C" Power off by RS232C
"POWEROFF_RESREC" Power off by Reservated Record
"POWEROFF_RECEND" Power off by End of Recording
"POWEROFF_SWDOWN" Power off by S/W Download
"POWEROFF_UNKNOWN" Power off by unknown status except listed case
"POWEROFF_ABNORMAL1" Power off by abnormal status except CPU trouble
Abnormal
"POWEROFF_CPUABNORMAL" Power off by CPU Abnormal

Established
Error C. Audio error date
LCD TV symptom
No audio/ Normal video Revised date 8/13
A24 A25
Check user N Check audio B+ 24V Y
No audio Normal
menu > Off of Power Board
Screen normal voltage
Speaker off
Y N
Cancel OFF Replace Power Board and repair parts
Check Speaker N
Disconnection Replace MAIN Board End
disconnection
Replace Speaker

Established
Error C. Audio error date
LCD TV symptom
Wrecked audio/ discontinuation/noise Revised date 9/13
abnormal audio/discontinuation/noise is same after Check input signal compared to No audio
A25
Wrecked audio/
Check and replace
Discontinuation/ Check audio
speaker and
Noise for B+ Voltage (24V)
connector
Check input all audio
signal Y Y
Signal
-RF
normal? Wrecked audio/
-External Input Normal
signal Discontinuation/
N Replace Main B/D voltage?
Noise only
for D-TV
N
Wrecked audio/
Discontinuation/
Replace Power B/D
Noise only
for Analog
(When RF signal is not
received)
Request repair to external Wrecked audio/ Replace Main B/D End
cable/ANT provider Discontinuation/
Noise only
(In case of External for External Input
N
Input signal error) Connect and check Normal
Check and fix other external device audio?
external device
Y
Check and fix external device

D. General Function Problem Established

Error date
LCD TV symptom
Remote control & Local switch checking Revised date 10/13
1. Remote control(R/C) operating error Replace

Main B/D
A27 A27 A27
Check & Repair N Y Y
Check R/C itself Normal Y Normal Check B+ 3.5V Normal Check IR Normal
Cable connection
Operation operating? operating? On Main B/D Voltage? Output signal Signal?
Connector solder
N
Y N N
A4
Check R/C Operating Check & Replace Close Check 3.5v on Power B/D Repair/Replace
When turn off light Baterry of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D dont have problem)
If R/C operate, Normal
operating? Close
Explain the customer
cause is interference
from light in room. N
Replace R/C

Established
Error D. Function error date
LCD TV symptom
External device recognition error Revised date 11/13
Y Check technical
Check N External Input and
Signal information Technical
input input? information?
Component Replace Main B/D
- Fix information Recognition error
signal
- S/W Version
N Y
RGB,HDMI/
Check and fix DVI, Optical
Fix in Replace Main B/D
external device/cable Recognition error
accordance
with technical
information

Established
Error E. Noise date
LCD TV symptom
Circuit noise, mechanical noise Revised date 12/13
Replace PSU(with LED driver)

Identify Circuit Check
nose type location of OR
noise
noise Replace LED driver
Mechanical Check location of

noise noise
When the nose is severe, replace the module

Mechanical noise is a natural (For models with fix information, upgrade the S/W or
phenomenon, and apply the 1st level provide the description)
description. When the customer does not OR
agree, apply the process by stage. If there is a Tak Tak noise from the cabinet,
Describe the basis of the description in refer to the KMS fix information and then proceed
Part related to nose in the Owners Manual. as shown in the solution manual
(For models without any fix information, provide
the description)

Established
Error F. Exterior defect date
LCD TV symptom
Exterior defect Revised date 13/13
Zoom part with Module

Replace module Adjust VCOM
exterior damage damage
A28
Cabinet
damage Replace cabinet
Remote
controller Replace remote controller
damage
Stand
dent Replace stand

Contents of LCD TV Standard Repair Process Detail Technical Manual
Continued from previous page
No. Error symptom Content Page Remarks

21 Check front display LED A17
22 Check power input Voltage & ST-BY 5V A18
23 B. Power error_No power Checking method when power is ON A19
24 POWER BOARD voltage measuring method A4
25
B. Power error_Off when on, off while
26 POWER OFF MODE checking method A22
viewing
B. Power error_Off when on, off while
27 POWER BOARD PIN voltage checking method A19
viewing
Checking method in menu when there is no
28 A24
audio
C. Audio error_No audio/Normal video
Voltage and speaker checking method when
29 A25
there is no audio
C. Audio error_Wrecked Voltage and speaker checking method in case of
30 A25
audio/discontinuation audio error
D. Function error_ No response in remote
31 Remote controller operation checking method A27
controller, key error
32 D. VCOM Adjustment Sequence of the Vcom adjustment A28

Standard Repair Process Detail Technical Manual
Error Established
symptom A. Video error_No video/Normal audio date
2010. 12 .14
LCD TV
Revised
Content Check White Balance value A4
date
<ALL MODELS>
Entry
Entry method
method
1. Press
1. Press the
the ADJ
ADJ button
button on
on the
the remote
remote controller
controller for
for adjustment.
adjustment.
2. Enter
2. Enter into
into White
White Balance
Balance of
of item
item 7.
6.
3.
3. After
After recording
recording the
the R,
R, G,
G, B
B (GAIN,
(GAIN, Cut)
Cut) value
value of
of Color
Color Temp
Temp (Cool/Medium/Warm),
(Cool/Medium/Warm), re-
re-
enter the value after replacing the MAIN BOARD.
enter the value after replacing the MAIN BOARD.

Error Established
symptom A. Video error_No video/ Audio date
2010. 12 .14
LCD TV
Revised
Content Power Board voltage measuring method A5
date
Check the DC 24V, 12V, 3.5V.
Edge LED 24 Pin (Power Board Main Board) -

SMAW200-H24S (YEONHO)
1 Power on 2 24V
3 24V 4 24V
5 GND 6 GND
7 GND 8 GND
9 3.5V 10 3.5V
11 3.5V 12 3.5V
13 GND 14 GND
15 GND 16 GND
17 12V 18 Inverter On/off
19 12V 20 Lamp : A-Dim

LED : N.C
21 12V 22 PWM Dim #1
23 GND/P_DIM2 24 Error-out
Lamp SCANNING Model
: PWM Dim #2

Error Established
symptom A. Video error_Video error, video lag/stop date
2010. 12 .14
LCD TV
TUNER input signal strength checking method Revised
Content A6
date
<ALL MODELS>
MENU - Set up support - signal test

- select channel
When the signal is strong, use the

attenuator (-10dB, -15dB, -20dB etc.)

Error Established
symptom A. Video error_Video error, video lag/stop date
2010. 12 .14
LCD TV
LCD-TV Version checking method Revised
Content A7
date
<ALL MODELS> 1. Checking method for remote controller for adjustment
Version
Press the IN-START with the remote

controller for adjustment

Error A. Video error _Vertical/Horizontal bar, Established
symptom 2010. 12 .14
LCD TV residual image, light spot date
Revised
Content LCD TV connection diagram (1) A8
date
<ALL MODELS>
As the part connecting to the external input, check the

screen condition by signal

Error Established
symptom
A. Video error_Video error, video lag/stop 2010. 12 .14
LCD TV date
TUNER checking part Revised
Content A9
date
<ALL MODELS>
Checking method:
1. Check the signal strength or check whether the screen is normal when the external device is connected.
2. After measuring each voltage from power supply, finally replace the MAIN BOARD.

Error Established
symptom
A. Video error_Color error 2010. 12 .14
LCD TV date
Adjustment Test pattern - ADJ Key Revised
Content A12
date
You can view 6 types of patterns using the ADJ Key

Checking item : 1. Defective pixel 2. Residual image 3. MODULE error (ADD-BAR,SCAN BAR..)
4.Video error (Classification of MODULE or Main-B/D!)

Error Established
symptom B. Power error _No power date
2010. 12 .14
LCD TV
Revised
Content Check front display LED A17
date
Front LED control :

Menu Option Power Indicator
Standby light ON
ST-BY condition: Red

Power ON condition: white

Error Established
2010. 12 .14
LCD TV
Revised
Content Check power input voltage and ST-BY 5V A18
date
For 10 models, there is no voltage out for st-by purpose.

When st-by, only 3.5V is normally on.
24 Pin (Power Board Main Board)
Check the DC 20V/24V, 12V,
SMAW200-H24S 3.5V.
(YEONHO)
Edge LED
1 Power on 2 24V
3 24V 4 24V
5 GND 6 GND
Edge LED
7 GND 8 GND
9 3.5V 10 3.5V
11 3.5V 12 3.5V
13 GND 14 GND
15 GND 16 GND

LED : N.C
21 12V 22 PWM Dim #1
Lamp SCANNING Model
: PWM Dim #2

Error Established
2010. 12 .14
LCD TV
Revised
Content Checking method when power is ON A19
date
Check power on pin is high
24 Pin (Power Board Main Board) -

Edge LED
1 Power on 2 24V
3 24V 4 24V
5 GND 6 GND
Edge LED
7 GND 8 GND
9 3.5V 10 3.5V
11 3.5V 12 3.5V
13 GND 14 GND
15 GND 16 GND

LED : N.C
21 12V 22 PWM Dim #1
Lamp SCANNING Model
: PWM Dim #2

Error Established
symptom B. Power error _Off when on, off whiling viewing date
2010. 12 .14
LCD TV
Revised
Content POWER OFF MODE checking method A22
date
<ALL MODELS>
Entry method
1. Press the IN-START button of the remote controller

for adjustment
2. Check the entry into adjustment item 3

Error Established
symptom C. Audio error_No audio/Normal video 2010. 12 .14
LCD TV date
Revised
Content Checking method in menu when there is no audio A24
date
<ALL MODELS>
Checking method
1. Press the MENU button on the remote controller
2. Select the AUDIO function of the Menu
3. Select TV Speaker from Off to On

Error Established
symptom C. Audio error_No audio/Normal video date
2010. 12 .14
LCD TV
Voltage and speaker checking method Revised
Content A25
when there is no audio date
<ALL MODELS> 24 Pin (Power Board Main Board) -
1

Power on 2 20V (24V)
3 20V (24V) 4 20V (24V)
5 GND 6 GND
7 GND 8 GND
9 3.5V 10 3.5V
11 3.5V 12 3.5V
13 GND 14 GND
15 GND 16 GND


LED : N.C
21 12V 22 PWM Dim #1
Checking order when there is no audio
Check the contact condition of or 24V connector of Main Board

Measure the 24V input voltage supplied from Power Board
(If there is no input voltage, remove and check the connector)
Connect the tester RX1 to the speaker terminal and if you hear the Chik Chik sound when you touch the GND
and output terminal, the speaker is normal.

Error D. Function error_ No response in remote controller, Established
symptom key error 2010. 12 .14
LCD TV date
Revised
Content Remote controller operation checking method A27
date
<ALL MODELS>
P4102
1 SCL
2 SDA
3 GND
4 KEY1
5 KEY2
6 St 3.5V
7 GND
8 RED_LED
9 IR
10 GND

Checking order
1, 2. Check IR cable condition between IR & Main board.
3. Check the st-by 3.3V on the terminal 6.
4. When checking the Pre-Amp when the power is in ON condition, it is normal when the Analog
Tester needle moves slowly, and defective when it does not move at all.

Error Established
symptom D. VCOM Adjustment date
2010. 12 .14
LCD TV
Revised
Content Sequence of the Vcom adjustment A28
date
1. Case
LCD module change
T-Con board change
2. Equipment
Service Remote controller
3. Adjust sequence
Press the adj key
select V-COM
As pushing the right or the left button on the remote controller, And find the V-COM value Which is no or
minimized the Flicker.
(If there is no flicker at default value, Press the exit key and finish the VCOM adjustment.)
Push the OK key to store the value. Then the message Saving OK is pop.
Press the exit key to finish V-COM adjustment.

5. Block Diagram for Middle-end models(Main BD)
SYSTEM SYSTEM
X_TAL DDR3 X DDR3 X
Air TDSH-T151F, T101F 27MHz 1600 X 1600 X
Analog 2~69ch 16 16 SYSTEM
Digital 2~69ch INPUT ANALOG (2Gb) (2Gb) DDR3 X
Cable Switch DEMOD 1600 X 16
Analog 1~125ch ISDB-T (2Gb)
Demod
FE_TS_DATA[8] DDR
SYSTEM
CVBS CONTROLER A/B
DDR3 X
CVBS
1600 X 16
(2Gb)
USB1
USB2
USB SYSTEM EEPROM X 1
USB3 (256Kb)
USB_WIFI
HDMI1 Side (HDCP eMMC X 1

HDMI2 (4GB)
HDMI EEPROM)
HDMI3 MUX 51P
LVDS 41P
HDMI4
50P
EPI 50P
Audio
Main I2S Out
AMP
(NTP7500
or STA380)
Soc
SPI LOCAL DIMMING
M-Remote
UART
Rear Module
PC-RGB RGB,H/V
PC-AUDIO L/R In IR
OPTIC SPDIF OUT Sub Micom

I2C Remote Control
(RENESAS)
* LVDS LS5700/LM6200 Series LAN Ethernet UART
* EPI Above LM6400 Series
RS-232C
only Dev

5. Block diagram for Middle models(Backend)
* EPI & T-con (LM6400 ~ LM7600 Series)
VCC SWN
50Pin
EPI LEFT
VGL_FB
CTRLN
IC7700
VDD TPS65178
CTRLP
VGH_FB
SWP
VCOM_P/N/LOOP
VGL_I
Main
SoC
VCOM, GIP_RST
DISCHG VGL_I
R(0)
EO_SOC EO
OPT
[TCON6]
GST_SOC GST VGH_ODD, VGH_EVEN
[TCON5]
MCLK_SOC
R
(47) MCLK
IC7701 VGH_R, VGH_F, VST
[TCON4]
GCLK_SOC GCLK
TPS65198 CLK1~6_I R CLK1~6
[TCON3] (0)
50Pin
EPI RIGHT

50Pin
* EPI & T-con (LM6400 ~ LM7600 Series) VCC18 EPI LEFT
Vcore
H_VDD
VDD
TXA1N/P, TXACLKN/P, TXA4N/P
EPI VCOMLFB
CH1/2/3
GMA[1][3][9][10][12][14][15][16][18]
[TCON7] VCOM_DYN
EPI_LOCK3
Z_OUT
[TCON8] PMIC_RESET
Main SoC [OPCTRL11] I2C_SDA2 GMA[4][5][7][12][15]
IC7700
[OPCTRL10] I2C_SCL2
TPS65178
EPI_LOCK6_SOURCE
EPI_LOCK6
VCOMRFB
EPI TXA0N/P, TXB1N/P, TXB2N/P
CH4/5/6 VCC18
Vcore
H_VDD
VDD
50Pin
EPI RIGHT
* LVDS Tx & Local Dimming(LS57~ LM62 Series)
L/DIMO_SCLK
[LDM_CK]
L/DIMO_MOSI
[LDM_D0]
I2C_SCL1
[STB_SCL]
[STB_SDA]
I2C_SDA1
L/DIMO_VS
[LDM_VSYNC]
Main SoC
PANEL_VCC
(+12V)
Dual-link LVDS Output

51Pin
LVDS
24
10-bit (R) Output
LVDS_SEL
LVDS Tx BIT_SEL_LOW
Block
Dual-link LVDS Output 41Pin
24 LVDS
10-bit (R)
Output
LVDS_SEL : H=JEIDA, L or NC=VESA (LGD)

BIT_SEL : H or NC = 10-bit, L = 8-bit

5. Block Diagram for Low-end models( Main BD)
LJ21B/LT21B Model : LM58, LM46, LS46, LS40, LS56
SIDE_USB_DM/DP IC1401
USB SPI_SCK/SDI/SDO/CS Serial Flash
+5V_USB1 OCP IC : AP2191DSG USB1_OCD/CTL
(JK1450) (8Mbit)
(IC1450)
SIDE
CK+/-, D0+/-, D1+/-, D2+/-, D3+/-_HDMI4 IC104
HDMI3 I2C_SCL/SDA
DDC_SCL/SDA_4
System EEPROM
(JK803) (256Kbit)
FE_TS_DATA[8]
IC102
TU_SCL / SDA PCM_A[0-7], NAND FLASH
SIF (1Gbit)
CVBS
IC1201, IC1202
A-MDQL[0-7], A-MDQU[0-7],
B-MDQL[0-7], B-MDQU[0-7], DDR3 SDRAM
(1Gbit)
Main SOC AUD_MASTER_CLK,

AUD_LRCH,
(LGE2111A) AUD_LRCK,
SPK_L
(IC101) AUD_SCK NTP-7500L
CK+/-, D0+/-, D1+/-, D2+/-, D3+/-_HDMI1
HDMI1 AMP_SCL/SDA (IC501)
DDC_SCL/SDA_1
(JK801) SPK_R
CK+/-, D0+/-, D1+/-, D2+/-, D3+/-_HDMI2
HDMI2
DDC_SCL/SDA_2
(JK802) SENSOR_SCL/SDA,
KEY1/2, LED_B, IR
Ethernet EPHY_RP/N, EPHY_TP/N 10P P2401
(JK2100) connector
REAR
RGB-PC DSUB_R+/G+/B+, DSUB_H/VSYNC
(JK1104)
(P703)
(P705)
51P FHD LVDS wafer

PC-AUDIO PC_L/R_IN
30P HD LVDS wafer

(JK1102) RXA0+/-~RXA4+/-, RXACK+/-
RXB0+/-~RXB4+/-, RXBCK+/-
SPDIF(Optic) SPDIF_OUT
(JK1103)
COMP2_Y+/Pb+/Pr+, AV_CVBS_IN
COMP2_L/R_IN
Component1
Component2 & AV COMP1_Y+/Pb+/Pr+
(JK1601)
SC1/COMP1_L/R_IN

5. Block Diagram for Low-end models( Main BD)
LJ21C/LT21C Model : LM34, LS35, LS34, CS46, CS56
SIDE_USB_DM/DP IC1401
USB SPI_SCK/SDI/SDO/CS Serial Flash
+5V_USB1 OCP IC : AP2191DSG USB1_OCD/CTL
(JK1450) (8Mbit)
(IC1450)
SIDE
IC104
I2C_SCL/SDA
System EEPROM
(256Kbit)
FE_TS_DATA[8]
IC102
TU_SCL / SDA PCM_A[0-7], NAND FLASH
SIF (1Gbit)
CVBS
IC1201, IC1202
A-MDQL[0-7], A-MDQU[0-7],
B-MDQL[0-7], B-MDQU[0-7], DDR3 SDRAM
(1Gbit)
Main SOC AUD_MASTER_CLK,

AUD_LRCH,
TDSN-B001F (LGE2111A) AUD_LRCK,
SPK_L
FULL NIM (IC101) AUD_SCK
CK+/-, D0+/-, D1+/-, D2+/-, D3+/-_HDMI1
NTP-7500L
HDMI1 AMP_SCL/SDA (IC501)
DDC_SCL/SDA_1
(JK801) SPK_R
CK+/-, D0+/-, D1+/-, D2+/-, D3+/-_HDMI2
HDMI2
DDC_SCL/SDA_2
(JK802) SENSOR_SCL/SDA,
KEY1/2, LED_B, IR
10P P2401
connector
REAR
(P703)
(P705)
51P FHD LVDS wafer
30P HD LVDS wafer

RXA0+/-~RXA4+/-, RXACK+/-
RXB0+/-~RXB4+/-, RXBCK+/-
COMP1_Y+/Pb+/Pr+, AV_CVBS_IN
Component1& AV
(JK1601) COMP1_L/R_IN

6. Jack Interface for High/Middle models
REAR SIDE
SPDIF_OUT
[SPDIF_OUT] SPDIF(AUDIO OPTIC)
USB DM3 / DP3 USB3
APPS
Air
Main SoC Analog 2~69ch Main SoC USB USB_DM2 / DP2 USB2
Digital 2~69ch USB HUB
MUX
Cable
Analog 1~125ch USB_DM1 / DP1 USB1
DVR Ready
CVBS 1
Phone JACK _Yellow
[CVBS0P] AV1_CVBS_IN
[AIN3_L_AADC] AV1_L_IN
[AIN3_R_AADC] AV1_R_IN
[OPCTRL5] AV1_CVBS_DET
AV PHONE JACK HDMI1 D0/D1/D2/CLK/SCL/SDA/HPD
HDMI1 /ARC
Component 1
Phone JACK _Green
COMP1_Y/Pb/Pr
COMP1_DET
HDMI2 D0/D1/D2/CLK/SCL/SDA/HPD
COMP PHONE JACK HDMI2
PC AUDIO
[AIN2_L_AADC]
PC_L_IN HDMI
PC_R_IN MUX
[AIN2_R_AADC]
RGB_PC HDMI3 D0/D1/D2/CLK/SCL/SDA/HPD HDMI3
DSUB_DET
[Y1P],[PB1P],[PR1P] [OPCTRL7]
[OPCTRL9] [VGA_SCL]
RGB_DDC_SCL
[VGA_SDA] RGB_DDC_SDA
HDMI4 D0/D1/D2/CLK/SCL/SDA/HPD HDMI4 / PC
DSUB_R+, DSUB_G+, DSUB_B+
[RP],[GP],[BP]
DSUB_VSYNC, DSUB_HSYNC
[VSYNC], [HSYNC]
EPHY_TDP/TDN //RDP/RDN
LAN


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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 47LM6200 47LM6200-SA

P/NO : MFL67402906 (1203-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

SCREW ASSEMBLY WORKING GUIDE................................................ 22

EXPLODED VIEW .................................................................................. 23

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

1) Temperature : 25 C 5 C (779 F), CST : 405 C

No. Resolution H-freq(kHz) V-freq.(kHz) Pixel clock Proposed

5.2. RGB( PC ) : RGB-PC EDID DATA : Refer to adjust specification

5.2.2. RF Input (3D supported mode automatically)

No Signal 3D input proposed mode

5.2.3. HDMI Input 1.3(3D supported mode manually)

5.2.5. HDMI-PC 3D Input (3D supported mode manually)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

5.2.7. USB Input (3D) (3D supported mode manually)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

5.2.8. DLNA Input (3D)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) 3D input proposed mode Proposed

3. Adjustment items 4.1.5. Download

3.2. Set Assembly Adjustment

See ADC Adjustment RS232C Protocol_Ver1.0

Necessary items before Adjustment items

If you want more information then see the below Adjustment

* EDID data for Non 3DTV (LS5700-SB Series) (Model name =

- HDMI EDID table (0x1E : Physical Address)

Edid data and Model option download (RS232)

Using HDMI input

HDMI-1 EDID table (0x43, 0x4D)

1) HDMI 1 Check sum : 0x43, 0X4D (CEA Block 0x1E :10)

- Analog (RGB) EDID table White Balance Adjustment

In manual Adjust case, if you press ADJ button of service

White Balance adjustment table

LSxxxx, LM5xxx, LM6xxx, 42LM7xxx, AUO(65LM6200) Step2 Step3 Step4

Cool Medium Warm

5.5.2. Test method 5.6.2. Test method

(2) Check the sound from the TV Set

(2) Press OK key as a 3D input OSD is shown.

* Remark: Inspect in Power Only Mode and check SW version

5.7. Selection of Country option

Caution : Dont push The INSTOP KEY after completing the

6.2. Operate GND and ESD auto-test

7. Default Service option

R143 33 AP14 AR18

HDCP EEPROM HDCP_EEPROM_MICRO

CI_ADDR[0] H32 T34 FE_TS_DATA[0-7]

I2C_3 : MICOM A3 B21

I2C_5 : NVRAM AC3

OSDA0 R121 33 I2C_SDA5 F16

+3.3V_NORMAL Model Option CI SLOT -> SOC

/USB_OCD2 E33 AT11

NO_FRC internal LG FRC2 Reserved /USB_OCD1 L/DIM0_SCLK

/USB_OCD3 F32 AR10

MODEL_OPT_0 A29 AM9 FOR JAPAN

ADIN1_SRV OPCTRL6 HP_DET

* EDID data for Non 3DTV (LS5700-SB Series) (Model name =

* Remark: Inspect in Power Only Mode and check SW version

Caution : Dont push The INSTOP KEY after completing the

D3803 D3801-1 D3801-2