Вы находитесь на странице: 1из 57

A B C D E

MYALL2 Block Diagram Project Code PCB


CLK GEN. Intel Mobile CPU 91.4G901.001 06203-MP
IDT CV125 TV Out
4 3 4
14
Yonah 478
G792 Celeron M CRT
4~5
19 14

FSB 400/533/667 MHz


LCD CPU DC/DC
13 ISL6262 37 ~ 38
DDR II INPUTS OUTPUTS
SO-DIMM 1
11 ~ 12 RAM BUS Calistoga PEG Nvidia VCC_CORE
VRAMx4 DCBATOUT 0.844~1.3V
533/667 MHz
945PM / 940GML G72M-V 49 ~ 50 27A
DDR II 46 ~ 48 , 51 ~ 55
SO-DIMM 2
6 ~ 10
11 ~ 12
PWR SW SYSTEM DC/DC
MAX8744 35
DMI 100 MHz CP2211 25
3
PCMCIA INPUTS OUTPUTS
3

TI SLOT 27 3D3V_S5
PCI BUS DCBATOUT
PCI7412 5V_S5
Card APL5331-KAC
a. Line In Codec HDA Reader26 APL5912-KAC
b. Mic In ALC883 24 ~ 25
1394 26 APL5308-25AC 40
c. INT Mic 29 28
Intel INPUTS OUTPUTS

d. Line Out OP AMP 82801 GBM TV & Video-In 1D5V_S5 1D05V_S0


e. INT.SPKR G1421B Mini-PCI 30 1D8V_S3 1D5V_S0
29
29 ICH7-M 30 3D3V_S5 1D5V_S5
WIRELESS 30 3D3V_S0 2D5V_S0
MODEM APW7057-KC
TPS51100DGQ
MDC Card PCIE x 1 LAN TXFM RJ45 APL5331-KAC 41
2 21 2

RTL8111B 23 23 INPUTS OUTPUTS


22 ~ 23
5V_S5 3D3V_S5
PCIE x 1 LPC BUS 5V_S5 1D8V_S3
MINI CARD 5V_S5 0D9V
26
1D8V_S0 1D2V_S0
SATA DEBUG SIO KBC
CONN34 NS87381 32 KB3910 CHARGER
31 ISL6255 42
15 ~ 18
X BUS
INPUTS OUTPUTS

FIR Touch BT+


BIOS INT. KB CIR DCBATOUT
32 16.8V 3A
PCB Layer Stackup 34 Pad 33 33 33

1 L1: Signal 1 PATA USB 1

L2: VCC
Wistron Corporation

om
L3: Signal 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

l.c
SATA HDD CDROM MINI USB USB Taipei Hsien 221, Taiwan, R.O.C.

ai
L4: Signal 3 CAMERA

tm
24 ~ 25 20 20 Title
BlueTooth 4 Port21

ho
L5: GND 13
21 BLOCK DIAGRAM

f@
L6: Signal 4 Size Document Number Rev

in
MYALL2

xa
MP

he
Date: Tuesday, April 11, 2006 Sheet 1 of 57
A B C D E
A B C D E
ICH7M Integrated Pull-up 954305D 27Mhz/LCDCLK Spread Calistoga Strapping Signals and
and Pull-down Resistors ICH7-M EDS 17837 1.5V1
and Frequency Selection Table Configuration EDS 17050 0.71
page 7
SS3 SS2 SS1 SS0
Byte9 bit6 bit5 bit4 Spread Amount% page 3 Pin Name Strap Description Configuration
EE_DIN, EE_DOUT, GNT[3:0], GPIO[25], bit 7 CFG[2:0] FSB Frequency Select
GNT[4]#/GPIO48, GNT[5]#/GPO17, PME#, 0 0 0 0 -0.50 Down 001 = FSB533
ICH7 internal 20K pull-ups 011 = FSB667
LAD[3:0]#/FHW[3:0]#, LAN_RXD[2:0] 0 0 0 1 -1.00 Down others = Reserved

4 LDRQ[0], LDRQ[1]/GPIO[41], 0 0 1 0 -1.50 Down CFG[4:3] Reserved 4


PWRBTN#, TP[3] 0 0 1 1 -2.00 Down CFG5 DMI x2 Select 0 = DMI x2
1 = DMI x4 (Default)
0 1 0 0 -0.75 Down CFG6 Reserved
DD[7], DDREQ ICH7 internal 11.5K pull-downs
0 1 0 1 -1.25 Down CFG7 0 = Reserved
CPU Strap 1 =Mobile CPU(Default)
ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0], ICH7 internal 20K pull-downs 0 1 1 0 -1.75 Down
Reserved
ACZ_SDOUT, ACZ_SYNC, DPRSLPVR/GPIO16, 0 1 1 1 -2.25 Down CFG8
EE_CS,SPI_ARB, SPI_CLK, SPKR, 1 0 0 0 +-0.25 Center 0 = Reverse Lanes,15->0,14->1 ect..
CFG9 PCI Express Graphics 1= Normal operation(Default):Lane
1 0 0 1 +-0.5 Center Lane Reversal Numbered in order
USB[7:0][P,N] ICH7 internal 15K pull-downs
1 0 1 0 +-0.75 Center
CFG[11:10] Reserved
SATALED# ICH7 internal 15K pull-up 1 0 1 1 +-1.0 Center
XOR/ALL Z test 00 = Reserved
1 1 0 0 +-0.25 Center CFG[13:12] straps 01 = XOR mode enabled
LAN_CLK ICH7 internal 100K pull-down 10 = All Z mode enabled
1 1 0 1 +-0.5 Center 11 = Normal Operation
(Default)
1 1 1 0 +-0.75 Center
CFG[15:14] Reserved Reserved
ICH7M IDE Integrated Series 1 1 1 1 +-1.0 Center
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled

3 Termination Resistors Global R-comp Disable


1 = Dynamic ODT Enabled (Default)
0 = All R-comp Disable 3
CFG17 (All R-comps) 1 = Normal Operation (Default)
DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
PCI Routing page 16
CFG18 VCC Select 0 = 1.05V (Default)
DDACK#, IORDY, DA[2:0], DCS1#, 1 = 1.5V
DCS3#, IDEIRQ
IDSEL INT -> PIRQ REQ/GNT CFG19 DMI Lane Reversal 0 = Normal operation (Default):lane
A->G, B->B, Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
7412 22 C->F, D->G 0
A/C -> E 0 = Only SDVO or PCIE x1 is
ICH7M Functional Strap Definitions page 16
MiniPCI 21 B/D -> E 1 CFG20 SDVO/PCIE
Concurrent
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
Signal Usage/When Sampled Comment
SDVOCRTL SDVO Present 0 = No SDVO Card present
ACZ_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 _DATA (Default)
PCIE Port Config bit1, pulled low.When TP3 not pulled low at rising edge 1= SDVO Card present
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h) NOTE: All strap signals are sampled with respect to the leading
edge of the Calistoga GMCH PWORK in signal.
ACZ_SYNC PCIE bit0, Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Rising Edge of PWROK.
EE_CS Reserved This signal should not be pull high.
EE_DOUT Reserved This signal should not be pull low.
2 GNT2# Reserved This signal should not be pull low. 2
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for
GNT3# Swap Override. all cycles targeting FWH BIOS space).
Rising Edge of PWROK. Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GNT5#/ Boot BIOS Destination Controllable via Boot BIOS Destination bit
GPIO17#, Selection. (Config Registers:Offset 3410h:bit 11:10).
GNT4#/ Rising Edge of PWROK. GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.
GPIO48

DPRSLPVR Reserved This signal should not be pull high.


GPIO25 Reserved.
Rising Edge of RSMRST#. This signal should not be pull low.
INTVRMEN Integrated VccSus1_05 Enables integrated VccSus1_05 VRM when
VRM Enable/Disable. sampled high
Always sampled.
LINKALERT# Reserved Requires an external pull-up resistor.
REQ[4:1]# XOR Chain Selection.
Rising Edge of PWROK. TBD, Chapter 8.
1 1
SATALED# Reserved This signal should not be pull low.
SPKR No Reboot. If sampled high, the system is strapped to the Wistron Corporation
Rising Edge of PWROK. "No Reboot" mode(ICH7 will disable the TCO Timer 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
system reboot feature). The status is readable
via the NO REBOOT bit. Title

TP3 XOR Chain Entrance. This signal should not be pull low unless using
Reference
Rising Edge of PWROK. XOR Chain testing. Size Document Number Rev
MYALL2 MP
Date: Friday, March 24, 2006 Sheet 2 of 57
A B C D E

3D3V_S0
3D3V_S0 R448 R204 R437
0R0603-PAD 0R0603-PAD 0R0603-PAD
1 2 3D3V_CLKPLL_S0 3D3V_S0 1 2 3D3V_48MPWR_S0 3D3V_CLKGEN_S0 2 1

1
C647 C652 C626 C633 C636 C655 C654 C653 C637 C625 C632
SC1U6D3V2ZY-GP SC1U6D3V2ZY-GP
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
4 4

3D3V_S0
1

R426
10KR2J-3-GP

DREFSSCLK_1 4 1 RN67 DREFSSCLK 7


2

DREFSSCLK#_1 3 2 SRN33J-5-GP-U DREFSSCLK# 7


SS_SEL
H/L: 100/96MHz CLK_MCH_3GPLL_1 4 1 RN68 CLK_MCH_3GPLL 7
1

U41 CLK_MCH_3GPLL_1# 3 2 SRN33J-5-GP-U CLK_MCH_3GPLL# 7


R427 DY
10KR2J-3-GP 31 PCLK_KBC R4512 1 33R2J-2-GP PCLKCLK0 56 17 DREFSSCLK_1 CLK_PCIE_ICH_1 3 2 RN73 CLK_PCIE_ICH 16
PCI0 LVDS DREFSSCLK#_1 CLK_PCIE_ICH_1#
3 PCI1 LVDS# 18 4 1 SRN33J-5-GP-U CLK_PCIE_ICH# 16
25 PCLK_PCM R4412 1 22R2J-2-GP PCLKCLK2 4
2

R4322 33R2J-2-GP PCLKCLK3 PCI2 CLK_MCH_3GPLL_1 CLK_PCIE_LAN_1


32 PCLK_SIO 1 5 PCI3 SRC1 19 3 2 RN71 CLK_PCIE_LAN 22
34 PCLK_FWH R4382 1 22R2J-2-GP 20 CLK_MCH_3GPLL_1# CLK_PCIE_LAN_1# 4 1 SRN33J-5-GP-U CLK_PCIE_LAN# 22
R4342 33R2J-2-GP SS_SEL SRC1# CLK_PCIE_ICH_1
30 PCLK_MINI 1 9 PCIF1/SEL100/96# SRC2 22
16 CLK_ICHPCI R2052 1 33R2J-2-GP ITP_EN 8 23 CLK_PCIE_ICH_1# CLK_PCIE_SATA_1 4 1 RN69 CLK_PCIE_SATA 15
R4332 10KR2J-3-GP PCIF0/ITP_EN SRC2# CLK_PCIE_LAN_1 CLK_PCIE_SATA_1#
1 SRC3 24 3 2 SRN33J-5-GP-U CLK_PCIE_SATA# 15
16 PM_STPPCI# 55 25 CLK_PCIE_LAN_1#
PCI_STOP# SRC3# CLK_PCIE_SATA_1
H/L : CPU_ITP/SRC7 SRC4 26
27 CLK_PCIE_SATA_1#
SRC4#
PCLK_FWH & PCLK_PCM 11,18 SMBC_ICH 46 SCL SRC5 31
3 47 30 CLK_PCIE_MINI_12 3 2 RN78 CLK_PCIE_MINI2 26
3
need equal length 11,18 SMBD_ICH SDA SRC5#
33 CLK_PCIE_MINI_12 CLK_PCIE_MINI_12# 4 1 SRN33J-5-GP-U CLK_PCIE_MINI2# 26
RN66 SRN33J-5-GP-U SRC6 CLK_PCIE_MINI_12#
SRC6# 32
7 DREFCLK 1 4 DREFCLK_1 14 CLK_PCIE_PEG_1 3 2 RN77 G72 CLK_PCIE_PEG 46
DREFCLK#_1 DOT96 CLK_PCIE_PEG_1 CLK_PCIE_PEG_1#
7 DREFCLK# 2 3 15 DOT96# CPU2_ITP/SRC7 36 4 1 SRN33J-5-GP-U CLK_PCIE_PEG# 46 When use UMA RN9 DUMMY
C648 35 CLK_PCIE_PEG_1#
SC27P50V2JN-2-GP CPU2_ITP#/SRC7# CLK_CPU_BCLK_1 3 2 RN75 CLK_CPU_BCLK 4
1 2 GEN_XTAL_IN 50 44 CLK_CPU_BCLK_1 CLK_CPU_BCLK_1# 4 1 SRN33J-5-GP-U CLK_CPU_BCLK# 4
GEN_XTAL_OUT_R R444 2 XTAL_IN CPU0
1 0R0603-PAD GEN_XTAL_OUT 49 XTAL_OUT CPU0# 43 CLK_CPU_BCLK_1#
1

X4 41 CLK_MCH_BCLK_1 CLK_MCH_BCLK_1 3 2 RN76 CLK_MCH_BCLK 6


X-14D31818M-31GP 32 R4522 CPU1
CLK14_SIO 1 22R2J-2-GP CPU1# 40 CLK_MCH_BCLK_1# CLK_MCH_BCLK_1# 4 1 SRN33J-5-GP-U CLK_MCH_BCLK# 6
C640 82.30005.831 16 CLK_ICH14 R4532 1 22R2J-2-GP GEN_REF 52
SC27P50V2JN-2-GP R4502 REF
1 475R2F-L1-GP GEN_IREF 39 54 PM_STPCPU# 16
2

IREF CPU_STOP# CPU_SEL2


1 2 FSC/TEST_SEL 53 CPU_SEL2 4,7
16 CPU_SEL1 CPU_SEL1 4,7
FSB/TEST_MODE CLK48 R436 22R2J-2-GP 2
37 CLK_EN# 10 VTT_PWRGD#/PD USB48/FSA 12 1 CLK48_ICH 16
R435 R428 22R2J-2-GP 2 1 CLK48_CARDBUS 25
10KR2J-3-GP R429 2K2R2J-2-GP 2 1 CPU_SEL0 CPU_SEL0 4,7
3D3V_S0 2 1 2 34 3D3V_CLKGEN_S0
VSS_PCI VDD_SRC
6 VSS_PCI VDD_SRC 21

51 VSS_REF VDD_PCI 7
45 VSS_CPU VDD_PCI 1
38 VSSA
13 VSS48 VDD_REF 48 FSC FSB FSA CPU FSB
29 VSS_SRC VDD_CPU 42
37 3D3V_CLKPLL_S0 0 0 0 266M X
VDDA 3D3V_48MPWR_S0 0 0 1 133M 533M
VDD48 11
28 0 1 0 200M X
2 VDD_SRC 0 1 1 166M 667M 2
1 0 0 333M X
IDTCV125PAG-GP 71.00125.A0W 1 0 1 100M X
1 1 0 400M X
1 1 1 Reserved X
RN63
SRN49D9F-GP
DREFSSCLK# 1 4 1D05V_S0
DREFSSCLK 2 3

2
RN62
SRN49D9F-GP R573 DY R574 DY R575 DY
DREFCLK# 1 4 1K74R2F-GP 1K74R2F-GP 1K74R2F-GP
DREFCLK 2 3

1
CPU_SEL0 CPU_SEL1 CPU_SEL2
RN79 RN72

2
SRN49D9F-GP SRN49D9F-GP
CLK_CPU_BCLK 1 4 CLK_PCIE_LAN 1 4 R576 DY R577 DY R578 DY
CLK_CPU_BCLK# 2 3 CLK_PCIE_LAN# 2 3 1K74R2F-GP 1K74R2F-GP 1K74R2F-GP

1
RN80 RN65
PCLK_SIO EC50 1 2 SC10P50V2JN-4GP DY SRN49D9F-GP SRN49D9F-GP
CLK_MCH_BCLK 1 4 CLK_PCIE_SATA 2 3
CLK_ICH14 EC55 1 2 SC10P50V2JN-4GP DY CLK_MCH_BCLK# 2 3 CLK_PCIE_SATA# 1 4
PCLK_MINI EC46 1 2 SC10P50V2JN-4GP

om
1 DY 1
RN81 G72 RN74

l.c
PCLK_PCM EC51 1 2 SC10P50V2JN-4GP DY SRN49D9F-GP SRN49D9F-GP

ai
CLK_PCIE_PEG CLK_PCIE_ICH
1 4 1 4
Wistron Corporation

tm
PCLK_KBC EC53 1 2 SC10P50V2JN-4GP DY CLK_PCIE_PEG# 2 3 CLK_PCIE_ICH# 2 3
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

ho
CLK_ICHPCI EC45 1 2 SC10P50V2JN-4GP Taipei Hsien 221, Taiwan, R.O.C.

f@
DY
RN64 RN82

in
CLK48_ICH EC47 1 2 SC10P50V2JN-4GP DY SRN49D9F-GP SRN49D9F-GP Title

xa
CLK_MCH_3GPLL 2 3 CLK_PCIE_MINI2 1 4 Clock Generator ICS954305D

he
EMI CLK_MCH_3GPLL# 1 4 CLK_PCIE_MINI2# 2 3
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 3 of 57
A B C D E
A B C D E

H_DINV#[3..0]
H_DINV#[3..0] 6
H_DSTBN#[3..0]
H_DSTBN#[3..0] 6
TP24 TPAD30
U34A 1D05V_S0 H_DSTBP#[3..0]
H_DSTBP#[3..0] 6
H_A#[31..3] H_A#3 J4 H1
6 H_A#[31..3] A[3]# ADS# H_ADS# 6
4 H_A#4 L4 E2 H_D#[63..0] 4
A[4]# BNR# H_BNR# 6 H_D#[63..0] 6
H_A#5 M3 G5 H_BPRI# 6
A[5]# BPRI#

1
H_A#6 K5 A[6]#

ADDR GROUP 0
H_A#7 M1 H5 H_DEFER# 6 R101
H_A#8 A[7]# DEFER# 56R2J-4-GP
N2 A[8]# DRDY# F21 H_DRDY# 6
H_A#9 J1 E1 H_DBSY# 6
H_A#10 A[9]# DBSY#
N3

2
H_A#11 A[10]# Place testpoint on
P5 A[11]# BR0# F1 H_BREQ#0 6
H_A#12 P2 H_IERR# with a GND
A[12]#

CONTROL
H_A#13 L1 D20 H_IERR# 0.1" away
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 15
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 6
L2 H_CPURST# 6 U34B
6 H_ADSTB#0 ADSTB[0]#
B1 H_RS#[2..0] 6 H_D#0 E22 AA23 H_D#32
6 H_REQ#[4..0] RESET# D[0]# D[32]#
H_REQ#0 K3 F3 H_RS#0 H_D#1 F24 AB24 H_D#33
H_REQ#1 H2 REQ[0]# RS[0]# H_RS#1 H_D#2 D[1]# D[33]# H_D#34
REQ[1]# RS[1]# F4 E26 D[2]# D[34]# V24
H_REQ#2 K2 G3 H_RS#2 H_D#3 H22 V26 H_D#35
H_REQ#3 J3 REQ[2]# RS[2]# H_D#4 D[3]# D[35]# H_D#36
REQ[3]# TRDY# G2 H_TRDY# 6 F23 D[4]# D[36]# W25

DATA GRP 0
H_REQ#4 L5 H_THERMDA H_D#5 H_D#37

DATA GRP 2
REQ[4]# G25 D[5]# D[37]# U23
G6 H_HIT# 6 H_D#6 E25 U25 H_D#38
HIT# D[6]# D[38]#

1
H_A#17 Y2 E4 H_HITM# 6 H_D#7 E23 U22 H_D#39
H_A#18 A[17]# HITM# C160 H_D#8 D[7]# D[39]# H_D#40
U5 A[18]# K24 D[8]# D[40]# AB25
H_A#19 R3 AD4 XDP_BPM#0 TP48 TPAD30 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41

2
A[19]# BPM[0]# D[9]# D[41]#

ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 TP49 TPAD30 H_THERMDC H_D#10 J24 Y23 H_D#42
H_A#21 A[20]# BPM[1]# XDP_BPM#2 TP43 TPAD30 H_D#11 D[10]# D[42]# H_D#43
U4 A[21]# BPM[2]# AD1 J23 D[11]# D[43]# AA26
H_A#22 Y5 AC4 XDP_BPM#3 TP42 TPAD30 H_D#12 H26 Y26 H_D#44
A[22]# BPM[3]# D[12]# D[44]#
XDP/ITP SIGNALS
H_A#23 U2 AC2 XDP_BPM#4 TP40 TPAD30 H_D#13 F26 Y22 H_D#45
H_A#24 A[23]# PRDY# XDP_BPM#5 TP41 TPAD30 1D05V_S0 H_D#14 D[13]# D[45]# H_D#46
R4 A[24]# PREQ# AC1 K22 D[14]# D[46]# AC26
3 H_A#25 T5 AC5 XDP_TCK TP47 TPAD30 H_D#15 H25 AA24 H_D#47 3
A[25]# TCK D[15]# D[47]#

2
H_A#26 T3 AA6 XDP_TDI TP35 TPAD30 H23 W24 H_DSTBN#2 6
A[26]# TDI 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]#
H_A#27 W3 AB3 XDP_TDO TP39 TPAD30 R88 G22 Y25 H_DSTBP#2 6
A[27]# TDO 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]#
H_A#28 W5 AB5 XDP_TMS TP38 TPAD30 56R2J-4-GP J26 V23 H_DINV#2 6
A[28]# TMS 6 H_DINV#0 DINV[0]# DINV[2]#
H_A#29 Y4 AB6 XDP_TRST# TP46 TPAD30
H_A#30 A[29]# TRST# XDP_DBRESET# TP10 TPAD30
W2 C20

1
H_A#31 A[30]# DBR# H_D#16 H_D#48
Y1 A[31]# N22 D[16]# D[48]# AC22
V4 D21 CPU_PROCHOT# 37 H_D#17 K25 AC23 H_D#49
THERM

6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[17]# D[49]#


A24 H_THERMDA 19 H_D#18 P26 AB22 H_D#50
THERMDA H_D#19 D[18]# D[50]# H_D#51
15 H_A20M# A6 A20M# THERMDC A25 H_THERMDC 19 R23 D[19]# D[51]# AA21
15 H_FERR# A5 H_D#20 L25 AB21 H_D#52
FERR# H_D#21 D[20]# D[52]# H_D#53
15 H_IGNNE# C4 C7 PM_THRMTRIP-A# 7 L22 AC25

DATA GRP 1
IGNNE# THERMTRIP# D[21]# D[53]#

DATA GRP 3
H_D#22 L23 AD20 H_D#54
R96 0R0402-PAD H_D#23 D[22]# D[54]# H_D#55
15 H_STPCLK# D5 STPCLK# M23 D[23]# D[55]# AE22
15 H_INTR C6 1 2 PM_THRMTRIP-I# 19 H_D#24 P25 AF23 H_D#56
LINT0 D[24]# D[56]#
H CLK

B4 A22 PM_THRMTRIP# H_D#25 P22 AD24 H_D#57


15 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 3 D[25]# D[57]#
A3 A21 should connect to H_D#26 P23 AE21 H_D#58
15 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 3 D[26]# D[58]#
ICH7 and Calistoga H_D#27 T24 AD21 H_D#59
TPAD30 TP34 without T-ing H_D#28 D[27]# D[59]# H_D#60
AA1 RSVD[01] R24 D[28]# D[60]# AE25
TPAD30 TP31 AA4 T22 TP27 TPAD30 ( No stub) H_D#29 L26 AF25 H_D#61
TPAD30 TP33 RSVD[02] RSVD[12] 1D05V_S0 H_D#30 D[29]# D[61]# H_D#62
AB2 RSVD[03] T25 D[30]# D[62]# AF22
TPAD30 TP32 AA3 H_D#31 N24 AF26 H_D#63
RSVD[04] D[31]# D[63]#

1
TPAD30 TP26 TP17 TPAD30
RESERVED

M4 RSVD[05] RSVD[13] D2 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6


TPAD30 TP25 N5 F6 TP22 TPAD30 R188 N25 AE24 H_DSTBP#3 6
RSVD[06] RSVD[14] 1KR2F-3-GP 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]#
TPAD30 TP28 T2 D3 M26 AC20 H_DINV#3 6
RSVD[07] RSVD[15] 6 H_DINV#1 DINV[1]# DINV[3]#
TPAD30 TP29 V3 C1
RSVD[08] RSVD[16] TP50 TPAD30 Layout Note: CPU_GTLREF0 COMP0 R164 1 27D4R2F-L1-GP
B2 AF1 AD26 R26 2

1 2
TPAD30 TP16 RSVD[09] RSVD[17] TP21 TPAD30 0.5" max length. GTLREF COMP[0] COMP1 R1721 54D9R2F-L1-GP
C3 RSVD[10] RSVD[18] D22 MISC COMP[1] U26 2

1
SC1KP16V2KX-GP
C23 TP20 TPAD30 U1 COMP2 R146 1 2 27D4R2F-L1-GP
2 TPAD30 TP13 RSVD[19] TP19 TPAD30 R189 C258 R381 COMP[2] 2
B25 RSVD[11] RSVD[20] C24 2 1TEST1 C26 TEST1 COMP[3] V1 COMP3 R1761 2 54D9R2F-L1-GP
2KR2F-3-GP 1KR2J-1-GP

2
BGA479-SKT6-GPU1 1 2TEST2 D25 E5 H_DPRSLP# 15,37
62.10079.001 R384 51R2F-2-GP TEST2 DPRSTP#
B5 H_DPSLP# 15

2
DPSLP#
2nd source: 62.10053.401 DPWR# D24 H_DPWR# 6
3,7 CPU_SEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 15,19
3,7 CPU_SEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6,15
3,7 CPU_SEL2 C21 BSEL[2] PSI# AE6 PSI# 37
BGA479-SKT6-GPU1
Layout Note:
1D05V_S0 Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

XDP_TDI 1 2
R184 150R2F-1-GP
XDP_TMS 1 2
R186 DY 39D2R3F-2-GP
XDP_TDO R185 1 2 54D9R2F-L1-GP
DY
H_CPURST# R98 1 2 54D9R2F-L1-GP

3D3V_S0

1
XDP_DBRESET# 1 2 1
R90 150R2F-1-GP

XDP_TCK 1 2 Wistron Corporation


R200 27D4R2F-L1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XDP_TRST# R201 1 2 680R3F-GP Taipei Hsien 221, Taiwan, R.O.C.

All place within 2" to CPU Title

CPU (1 of 2)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 4 of 57
A B C D E
A B C D E

VCC_CORE_S0
U34D
VCC_CORE_S0 A4 P6
VSS[001] VSS[082]
4 A8 VSS[002] VSS[083] P21 4
A11 VSS[003] VSS[084] P24
U34C A14 R2
VSS[004] VSS[085]
A7 VCC[001] VCC[068] AB20 A16 VSS[005] VSS[086] R5
A9 VCC[002] VCC[069] AB7 A19 VSS[006] VSS[087] R22
A10 VCC[003] VCC[070] AC7 A23 VSS[007] VSS[088] R25
A12 VCC[004] VCC[071] AC9 A26 VSS[008] VSS[089] T1
A13 VCC[005] VCC[072] AC12 B6 VSS[009] VSS[090] T4
A15 VCC[006] VCC[073] AC13 B8 VSS[010] VSS[091] T23
A17 VCC[007] VCC[074] AC15 B11 VSS[011] VSS[092] T26
A18 VCC[008] VCC[075] AC17 B13 VSS[012] VSS[093] U3
A20 VCC[009] VCC[076] AC18 B16 VSS[013] VSS[094] U6
B7 VCC[010] VCC[077] AD7 B19 VSS[014] VSS[095] U21
B9 VCC[011] VCC[078] AD9 B21 VSS[015] VSS[096] U24
B10 VCC[012] VCC[079] AD10 B24 VSS[016] VSS[097] V2
B12 VCC[013] VCC[080] AD12 C5 VSS[017] VSS[098] V5
B14 VCC[014] VCC[081] AD14 C8 VSS[018] VSS[099] V22
B15 VCC[015] VCC[082] AD15 C11 VSS[019] VSS[100] V25
B17 VCC[016] VCC[083] AD17 C14 VSS[020] VSS[101] W1
B18 VCC[017] VCC[084] AD18 C16 VSS[021] VSS[102] W4
B20 VCC[018] VCC[085] AE9 C19 VSS[022] VSS[103] W23
C9 VCC[019] VCC[086] AE10 C2 VSS[023] VSS[104] W26
C10 VCC[020] VCC[087] AE12 C22 VSS[024] VSS[105] Y3
C12 VCC[021] VCC[088] AE13 C25 VSS[025] VSS[106] Y6
C13 VCC[022] VCC[089] AE15 D1 VSS[026] VSS[107] Y21
C15 VCC[023] VCC[090] AE17 D4 VSS[027] VSS[108] Y24
C17 VCC[024] VCC[091] AE18 D8 VSS[028] VSS[109] AA2
C18 VCC[025] VCC[092] AE20 D11 VSS[029] VSS[110] AA5
D9 VCC[026] VCC[093] AF9 D13 VSS[030] VSS[111] AA8
3 D10 AF10 D16 AA11 3
VCC[027] VCC[094] VSS[031] VSS[112]
D12 VCC[028] VCC[095] AF12 D19 VSS[032] VSS[113] AA14
D14 VCC[029] VCC[096] AF14 D23 VSS[033] VSS[114] AA16
D15 VCC[030] VCC[097] AF15 D26 VSS[034] VSS[115] AA19
D17 AF17 Layout Note E3 AA22
VCC[031] VCC[098] VSS[035] VSS[116]
D18 VCC[032] VCC[099] AF18 E6 VSS[036] VSS[117] AA25
E7 AF20 1D05V_S0 E8 AB1
VCC[033] VCC[100] VSS[037] VSS[118]
E9 VCC[034] E11 VSS[038] VSS[119] AB4
E10 V6 CPU_V6 1 R170 2 E14 AB8
VCC[035] VCCP[01] 0R0402-PAD VSS[039] VSS[120]
E12 VCC[036] VCCP[02] G21 E16 VSS[040] VSS[121] AB11
E13 VCC[037] VCCP[03] J6 E19 VSS[041] VSS[122] AB13
E15 VCC[038] VCCP[04] K6 E21 VSS[042] VSS[123] AB16
1

E17 VCC[039] VCCP[05] M6 E24 VSS[043] VSS[124] AB19


E18 J21 C245 F5 AB23
VCC[040] VCCP[06] VSS[044] VSS[125]
E20 K21 F8 AB26
2

VCC[041] VCCP[07] SCD1U10V2KX-4GP VSS[045] VSS[126]


F7 VCC[042] VCCP[08] M21 F11 VSS[046] VSS[127] AC3
F9 VCC[043] VCCP[09] N21 F13 VSS[047] VSS[128] AC6
F10 VCC[044] VCCP[10] N6 F16 VSS[048] VSS[129] AC8
F12 VCC[045] VCCP[11] R21 F19 VSS[049] VSS[130] AC11
F14 VCC[046] VCCP[12] R6 F2 VSS[050] VSS[131] AC14
F15 VCC[047] VCCP[13] T21 F22 VSS[051] VSS[132] AC16
F17 VCC[048] VCCP[14] T6 F25 VSS[052] VSS[133] AC19
F18 V21 1D5V_VCCA_S0 1D5V_S0 G4 AC21
VCC[049] VCCP[15] 1D05V_S0 VSS[053] VSS[134]
F20 VCC[050] VCCP[16] W21 L26 G1 VSS[054] VSS[135] AC24
AA7 VCC[051] G23 VSS[055] VSS[136] AD2
AA9 VCC[052] VCCA B26 1 2 G26 VSS[056] VSS[137] AD5
AA10 HCB1608KF121T30-GP H3 AD8
VCC[053] VSS[057] VSS[138]
1

AA12 H_VID[6..0] C553 68.00230.041 H6 AD11


VCC[054] H_VID[6..0] 37 VSS[058] VSS[139]
AA13 AD6 H_VID0 C554 H21 AD13
VCC[055] VID[0] VSS[059] VSS[140]

1
2 H_VID1 SCD01U16V2KX-3GP SC4D7U6D3V3KX-GP C188 C216 C231 C209 C217 C233 C237 C243 2
AA15 AF5 H24 AD16
2

VCC[056] VID[1] H_VID2 VCC_CORE_S0 VSS[060] VSS[141]


AA17 VCC[057] VID[2] AE5 J2 VSS[061] VSS[142] AD19

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
AA18 AF4 H_VID3 J5 AD22
2

2
VCC[058] VID[3] H_VID4 VSS[062] VSS[143]
AA20 VCC[059] VID[4] AE3 J22 VSS[063] VSS[144] AD25
1

AB9 AF2 H_VID5 J25 AE1


VCC[060] VID[5] H_VID6 R198 VSS[064] VSS[145]
AC10 VCC[061] VID[6] AE2 K1 VSS[065] VSS[146] AE4
AB10 100R2F-L1-GP-U K4 AE8
VCC[062] VSS[066] VSS[147]
AB12 VCC[063] K23 VSS[067] VSS[148] AE11
AB14 AF7 VCC_SENSE 37 K26 AE14
2

VCC[064] VCCSENSE VSS[068] VSS[149]


AB15 VCC[065] L3 VSS[069] VSS[150] AE16
AB17 VCC[066] L6 VSS[070] VSS[151] AE19
AB18 VCC[067] VSSSENSE AE7 VSS_SENSE 37 L21 VSS[071] VSS[152] AE23
VCC_CORE_S0 L24 AE26
VSS[072] VSS[153]
1

BGA479-SKT6-GPU1 Layout Note: M2 AF3


R199 VSS[073] VSS[154]
M5 VSS[074] VSS[155] AF6
100R2F-L1-GP-U VCCSENSE and VSSSENSE lines DY M22 AF8
VSS[075] VSS[156]
1

1
should be of equal length. C184 C246 C183 C255 C239 C267 C145 M25 AF11
VSS[076] VSS[157]
SCD1U10V2KX-4GP

N1 AF13
2

VSS[077] VSS[158]
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
N4 AF16
2

2
Layout Note: VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
Provide a test point (with N26 AF21
no stub) to connect a VSS[080] VSS[161]
P3 VSS[081] VSS[162] AF24
differential probe
between VCCSENSE and BGA479-SKT6-GPU1
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
VCC_CORE_S0

om
1 1

l.c
ai
DY DY DY DY
Wistron Corporation

tm
1

1
C192 C189 C146 C268 C266 C147 C585 C269 C559 C148 C190 C191 C242 C241 C240

ho
SC10U10V5ZY-1GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
Taipei Hsien 221, Taiwan, R.O.C.

f@
2

in
Title

xa
CPU (2 of 2)

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 5 of 57
A B C D E
A B C D E

H_XRCOMP

1
R416
24D9R2F-L-GP
H_D#[63..0] U39A H_A#[31..3]
4 H_D#[63..0] H_A#[31..3] 4
H_D#0 F1 H9 H_A#3

2
H_D#1 H_D#_0 H_A#_3 H_A#4
J1 H_D#_1 H_A#_4 C9
4 H_D#2 H1 E11 H_A#5 4
H_D#3 H_D#_2 H_A#_5 H_A#6
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
1D05V_S0 H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
H_D#8 K9 J12 H_A#11
H_D#9 H_D#_8 H_A#_11 H_A#12
K1 H_D#_9 H_A#_12 G14

2
H_D#10 K7 D9 H_A#13
R415 H_D#11 H_D#_10 H_A#_13 H_A#14
J8 H_D#_11 H_A#_14 J14
54D9R2F-L1-GP H_D#12 H4 H13 H_A#15
H_D#13 H_D#_12 H_A#_15 H_A#16
J3 H_D#_13 H_A#_16 J15
H_D#14 K11 F14 H_A#17
1
H_D#15 H_D#_14 H_A#_17 H_A#18
G4 H_D#_15 H_A#_18 D12
H_XSCOMP H_D#16 T10 A11 H_A#19
H_D#17 H_D#_16 H_A#_19 H_A#20
W11 H_D#_17 H_A#_20 C11
H_D#18 T3 A12 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22
U7 H_D#_19 H_A#_22 A13
1D05V_S0 H_D#20 U9 E13 H_A#23
H_D#21 H_D#_20 H_A#_23 H_A#24
U11 H_D#_21 H_A#_24 G13
H_D#22 T11 F12 H_A#25
H_D#_22 H_A#_25
1

H_D#23 W9 B12 H_A#26


R180 H_D#24 H_D#_23 H_A#_26 H_A#27 1D05V_S0
T1 H_D#_24 H_A#_27 B14
221R2F-2-GP H_D#25 T8 C12 H_A#28
H_D#26 H_D#_25 H_A#_28 H_A#29
T4 H_D#_26 H_A#_29 A14

1
H_D#27 W7 C14 H_A#30
2

H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31 R196


U5 H_D#_28 H_A#_31 D14
H_D#29 T9 100R2F-L1-GP-U
H_D#_29
1

H_D#30 W6 E8 H_ADS# 4
H_D#_30 H_ADS#
2

3 R183 H_D#31 T5 B9 H_ADSTB#0 4


3

2
100R2F-L1-GP-U C249 H_D#32 H_D#_31 H_ADSTB#_0
AB7 H_D#_32 H_ADSTB#_1 C13 H_ADSTB#1 4
SCD1U16V2ZY-2GP H_D#33 AA9 J13 H_VREF
1

H_D#34 H_D#_33 H_VREF_0


W4 C6 H_BNR# 4
2

H_D#_34 H_BNR#

1
HOST
H_D#35 W3 F6 H_BPRI# 4
H_D#_35 H_BPRI#

2
H_D#36 Y3 C7 H_BREQ#0 4 R192
H_D#37 H_D#_36 H_BREQ#0 C262 200R2F-L-GP
Y7 H_D#_37 H_CPURST# B7 H_CPURST# 4
H_D#38 W5 A7 SCD1U16V2ZY-2GP
H_DBSY# 4

1
H_D#39 H_D#_38 H_DBSY#
Y10 C3 H_DEFER# 4

2
H_D#40 H_D#_39 H_DEFER#
AB8 H_D#_40 H_DPWR# J9 H_DPWR# 4
H_D#41 W2 H8 H_DRDY# 4
H_YRCOMP H_D#42 H_D#_41 H_DRDY#
AA4 H_D#_42 H_VREF_1 K13
H_D#43 AA7 H_DINV#[3..0]
H_D#_43 H_DINV#[3..0] 4
H_D#44 AA2 J7 H_DINV#0
H_D#_44 H_DINV#_0
1

H_D#45 AA6 W8 H_DINV#1


R442 H_D#46 H_D#_45 H_DINV#_1 H_DINV#2
AA10 H_D#_46 H_DINV#_2 U3
24D9R2F-L-GP H_D#47 Y8 AB10 H_DINV#3
H_D#48 H_D#_47 H_DINV#_3 H_DSTBN#[3..0]
AA1 H_D#_48 H_DSTBN#[3..0] 4
H_D#49 AB4 K4 H_DSTBN#0
2

H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1


AC9 H_D#_50 H_DSTBN#_1 T7
H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_DSTBP#[3..0]
H_D#_53 H_DSTBP#[3..0] 4
H_D#54 AC2 K3 H_DSTBP#0
1D05V_S0 H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1
AD1 H_D#_55 H_DSTBP#_1 T6
H_D#56 AD9 AA5 H_DSTBP#2
H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3
AC1 H_D#_57 H_DSTBP#_3 AC5
H_D#58 AD7 H_D#_58
2

H_D#59 AC6
2 R430 H_D#60 H_D#_59 2
AB5 H_D#_60 H_HIT# D3 H_HIT# 4
54D9R2F-L1-GP H_D#61 AD10 D4 H_HITM# 4
H_D#62 H_D#_61 H_HITM#
AD4 H_D#_62 H_LOCK# B3 H_LOCK# 4
H_D#63 AC8
1

H_D#_63
H_YSCOMP H_XRCOMP E1 H_REQ#[4..0] 4
H_XSCOMP H_XRCOMP H_REQ#0
E2 H_XSCOMP H_REQ#_0 D8
H_XSWING E4 G8 H_REQ#1
H_XSWING H_REQ#_1 H_REQ#2
H_REQ#_2 B8
1D05V_S0 H_YRCOMP Y1 F8 H_REQ#3
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4
U1 H_YSCOMP H_REQ#_4 A8
H_YSWING W1 H_RS#[2..0] 4
H_YSWING
1

B4 H_RS#0
R431 H_RS#_0 H_RS#1
3 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
221R2F-2-GP AG1 D6 H_RS#2
3 CLK_MCH_BCLK# H_CLKIN# H_RS#_2
E3 H_CPUSLP# 4,15
2

H_YSWING H_SLPCPU#
H_TRDY# E7 H_TRDY# 4
1

CALISTOGA KI.94501.006
2

R440
100R2F-L1-GP-U C627
SCD1U16V2ZY-2GP
1
2

1 Place them near to the chip ( < 0.5") 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (1 of 5)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 6 of 57
A B C D E
A B C D E

U39B
RSVD_0 H32
11 M_CLK_DDR0 AY35 SM_CK_0 RSVD_1 T32
11 M_CLK_DDR1 AR1 SM_CK_1 RSVD_2 R32
11 M_CLK_DDR2 AW7 SM_CK_2 RSVD_3 F3
11 M_CLK_DDR3 AW40 SM_CK_3 RSVD_4 F7 for calistoga configuration

RSVD
AG11 R419
RSVD_5 U39C 24D9R2F-L-GP
11 M_CLK_DDR#0 AW35 SM_CK#_0 RSVD_6 AF11
11 M_CLK_DDR#1 AT1 H7 TP36 TPAD30 D32 D40 2 1 1D5V_PCIE_S0
SM_CK#_1 RSVD_7 BL_ON L_BKLTCTL EXP_A_COMPI
11 M_CLK_DDR#2 AY7 SM_CK#_2 RSVD_8 J19 31 BL_ON J30 L_BKLTEN EXP_A_COMPO D38
AY40 K30 LCTLA_CLK H30 PEG_RXN[15..0]
11 M_CLK_DDR#3 SM_CK#_3 RSVD_9 L_CLKCTLA PEG_RXN[15..0] 46
J29 LCTLB_DATA H29 F34 PEG_RXN0
RSVD_10 CLK_DDC_EDID L_CLKCTLB EXP_A_RXN_0 PEG_RXN1
11,12 M_CKE0 AU20 SM_CKE_0 RSVD_11 A41 13 CLK_DDC_EDID G26 L_DDC_CLK EXP_A_RXN_1 G38
4 11,12 M_CKE1 AT20 A35 13 DAT_DDC_EDID DAT_DDC_EDID G25 H34 PEG_RXN2 4
SM_CKE_1 RSVD_12 TPAD30 TP30 LIBG L_DDC_DATA EXP_A_RXN_2 PEG_RXN3
11,12 M_CKE2 BA29 SM_CKE_2 RSVD_13 A34 B38 L_IBG EXP_A_RXN_3 J38
11,12 M_CKE3 AY29 D28 TPAD30 TP37 L_LVBG C35 L34 PEG_RXN4
SM_CKE_3 RSVD_14 GMCH_LCDVDD_ON L_VBG EXP_A_RXN_4 PEG_RXN5
RSVD_15 D27 13 GMCH_LCDVDD_ON F32 L_VDDEN EXP_A_RXN_5 M38
11,12 M_CS0# AW13 C33 N34 PEG_RXN6
SM_CS#_0 L_VREFH EXP_A_RXN_6 PEG_RXN7
11,12 M_CS1# AW12 SM_CS#_1 C32 L_VREFL EXP_A_RXN_7 P38
PEG_RXN8

MUXING
11,12 M_CS2# AY21 SM_CS#_2 CFG_0 K16 CPU_SEL0 3,4 EXP_A_RXN_8 R34
11,12 M_CS3# AW21 K18 CPU_SEL1 3,4 13 GMCH_TXACLK- A33 T38 PEG_RXN9
SM_CS#_3 CFG_1 LA_CLK# EXP_A_RXN_9 PEG_RXN10
CFG_2 J18 CPU_SEL2 3,4 13 GMCH_TXACLK+ A32 LA_CLK EXP_A_RXN_10 V34
M_OCDCOMP0 AL20 F18 CFG3 13 GMCH_TXBCLK- E27 W38 PEG_RXN11
M_OCDCOMP1 SM_OCDCOMP_0 CFG_3 CFG4 LB_CLK# EXP_A_RXN_11 PEG_RXN12
AF10 SM_OCDCOMP_1 CFG_4 E15 13 GMCH_TXBCLK+ E26 LB_CLK EXP_A_RXN_12 Y34
1

F15 CFG5 AA38 PEG_RXN13


CFG_5 EXP_A_RXN_13

LVDS
R214DY R209 DY 11,12 M_ODT0 BA13 E18 CFG6 13 GMCH_TXAOUT0- C37 AB34 PEG_RXN14
40D2R2F-GP 40D2R2F-GP 11,12 M_ODT1 SM_ODT_0 CFG_6 CFG7 LA_DATA#_0 EXP_A_RXN_14 PEG_RXN15
BA12 SM_ODT_1 CFG_7 D19 13 GMCH_TXAOUT1- B35 LA_DATA#_1 EXP_A_RXN_15 AC38
AY20 D16 CFG8 A37 PEG_RXP[15..0]
11,12 M_ODT2 SM_ODT_2 CFG_8 13 GMCH_TXAOUT2- LA_DATA#_2 PEG_RXP[15..0] 46

CFG
11,12 M_ODT3 AU21 G16 CFG9 D34 PEG_RXP0
2

SM_ODT_3 CFG_9 CFG10 EXP_A_RXP_0 PEG_RXP1


E16 F38

DDR
CFG_10 EXP_A_RXP_1

GRAPHICS
M_RCOMPN AV9 D15 CFG11 G34 PEG_RXP2
DDR_VREF_S3 M_RCOMPP SM_RCOMP# CFG_11 CFG12 EXP_A_RXP_2 PEG_RXP3
AT9 SM_RCOMP CFG_12 G15 13 GMCH_TXAOUT0+ B37 LA_DATA_0 EXP_A_RXP_3 H38
K15 CFG13 13 GMCH_TXAOUT1+ B34 J34 PEG_RXP4
CFG_13 CFG14 LA_DATA_1 EXP_A_RXP_4 PEG_RXP5
AK1 SM_VREF_0 CFG_14 C15 13 GMCH_TXAOUT2+ A36 LA_DATA_2 EXP_A_RXP_5 L38
C649 AK41 H16 CFG15 M34 PEG_RXP6
SM_VREF_1 CFG_15 EXP_A_RXP_6
1

C298 G18 CFG16 N38 PEG_RXP7


CFG_16 EXP_A_RXP_7
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

H15 CFG17 13 GMCH_TXBOUT0- G30 P34 PEG_RXP8


CFG_17 CFG18 LB_DATA#_0 EXP_A_RXP_8 PEG_RXP9
3 CLK_MCH_3GPLL# AF33 J25 13 GMCH_TXBOUT1- D30 R38
2

G_CLKIN# CFG_18 CFG19 LB_DATA#_1 EXP_A_RXP_9 PEG_RXP10


3 CLK_MCH_3GPLL AG33 G_CLKIN CFG_19 K27 13 GMCH_TXBOUT2- F29 LB_DATA#_2 EXP_A_RXP_10 T34
DREFCLK# A27 J26 CFG20 V38 PEG_RXP11
3 DREFCLK# D_REFCLKIN# CFG_20 EXP_A_RXP_11

CLK
DREFCLK A26 W34 PEG_RXP12
3 DREFCLK DREFSSCLK# D_REFCLKIN EXP_A_RXP_12 PEG_RXP13
3 DREFSSCLK# C40 D_REFSSCLKIN# PM_BMBUSY# G28 PM_BMBUSY# 16 EXP_A_RXP_13 Y38
3 DREFSSCLK D41 F25 PM_EXTTS#0 13 GMCH_TXBOUT0+ F30 AA34 PEG_RXP14 3
3 DREFSSCLK D_REFSSCLKIN PM_EXTTS#_0 LB_DATA_0 EXP_A_RXP_14

PM
PM_EXTTS#_1 H26 PM_EXTTS#1 R2130R2J-2-GP DY 13 GMCH_TXBOUT1+ D29 LB_DATA_1 EXP_A_RXP_15 AB38 PEG_RXP15

PCI-EXPRESS
G6 F28 PEG_TXN[15..0]
PM_THRMTRIP# PM_THRMTRIP-A# 4 13 GMCH_TXBOUT2+ LB_DATA_2 PEG_TXN[15..0] 46
DMI_TXN0 AE35 AH33 1 2 VGATE_PWRGD 16,37 F36 GTXN0 1 2 C248SCD1U10V2KX-5GP PEG_TXN0
16 DMI_TXN0 DMI_TXN1 DMI_RXN_0 PWROK R215 0R2J-2-GP EXP_A_TXN_0 GTXN1 C610SCD1U10V2KX-5GP PEG_TXN1
16 DMI_TXN1 AF39 DMI_RXN_1 RSTIN# AH34 1 2 EXP_A_TXN_1 G40 1 2
DMI_TXN2 AG35 R212 1 2 PWROK 16,19 H36 GTXN2 1 2 C254SCD1U10V2KX-5GP PEG_TXN2
16 DMI_TXN2 DMI_TXN3 DMI_RXN_2 100R2J-2-GP EXP_A_TXN_2 GTXN3 C615SCD1U10V2KX-5GP PEG_TXN3
16 DMI_TXN3 AH39 DMI_RXN_3 PLT_RST1# 16,18,22,26,31,32,34,46,51 EXP_A_TXN_3 J40 1 2
MISC SDVO_CTRLCLK H28
H27
TP45 TPAD30
TP44 TPAD30
14 TV_DACA TV_DACA
TV_DACB
A16
C18
TV_DACA_OUT EXP_A_TXN_4 L36
M40
GTXN4
GTXN5
1
1
2
2
C259SCD1U10V2KX-5GP
C618SCD1U10V2KX-5GP
PEG_TXN4
PEG_TXN5
SDVO_CTRLDATA 14 TV_DACB TV_DACB_OUT EXP_A_TXN_5
DMI_TXP0 AC35 K28 MCH_ICH_SYNC# 16 14 TV_DACC TV_DACC A19 N36 GTXN6 1 2 C263SCD1U10V2KX-5GP PEG_TXN6
16 DMI_TXP0 DMI_RXP_0 LT_RESET# TV_DACC_OUT EXP_A_TXN_6

TV
DMI_TXP1 AE39 P40 GTXN7 1 2 C620SCD1U10V2KX-5GP PEG_TXN7
16 DMI_TXP1 DMI_TXP2 DMI_RXP_1 R389 4K99R2F-L-GP TV_IREF EXP_A_TXN_7 GTXN8 C272SCD1U10V2KX-5GP PEG_TXN8
16 DMI_TXP2 AF35 DMI_RXP_2 UMA 1 2 J20 TV_IREF EXP_A_TXN_8 R36 1 2
DMI_TXP3 AG39 D1 R385 0R2J-2-GP UMA 1 2 TV_IRTNA B16 T40 GTXN9 1 2 C622SCD1U10V2KX-5GP PEG_TXN9
16 DMI_TXP3 DMI_RXP_3 NC0 R106 0R2J-2-GP TV_IRTNB TV_IRTNA EXP_A_TXN_9 GTXN10 C278SCD1U10V2KX-5GP PEG_TXN10
NC1 C41 UMA 1 2 B18 TV_IRTNB EXP_A_TXN_10 V36 1 2
C1 R108 0R2J-2-GP UMA 1 2 TV_IRTNC B19 W40 GTXN11 1 2 C628SCD1U10V2KX-5GP PEG_TXN11
DMI_RXN0 NC2 TV_IRTNC EXP_A_TXN_11 GTXN12 C281SCD1U10V2KX-5GP PEG_TXN12
16 DMI_RXN0 AE37 DMI_TXN_0 NC3 BA41 EXP_A_TXN_12 Y36 1 2
DMI_RXN1 AF41 BA40 AA40 GTXN13 1 2 C631SCD1U10V2KX-5GP PEG_TXN13
16 DMI_RXN1 DMI_TXN_1 NC4 EXP_A_TXN_13
NC

DMI_RXN2 AG37 BA39 AB36 GTXN14 1 2 C286SCD1U10V2KX-5GP PEG_TXN14


16 DMI_RXN2 DMI_RXN3 DMI_TXN_2 NC5 EXP_A_TXN_14 GTXN15 C638SCD1U10V2KX-5GP PEG_TXN15
16 DMI_RXN3 AH41 DMI_TXN_3 NC6 BA3 EXP_A_TXN_15 AC40 1 2
BA2 PEG_TXP[15..0]
PEG_TXP[15..0] 46
DMI

NC7 GMCH_BLUE GTXP0 C251SCD1U10V2KX-5GP PEG_TXP0


NC8 BA1 14 GMCH_BLUE E23 CRT_BLUE EXP_A_TXP_0 D36 1 2
DMI_RXP0 AC37 B41 3D3V_S0 GMCH_BLUE# D23 F40 GTXP1 1 2 C608SCD1U10V2KX-5GP PEG_TXP1
16 DMI_RXP0 DMI_RXP1 DMI_TXP_0 NC9 RN10 DY GMCH_GREEN CRT_BLUE# EXP_A_TXP_1 GTXP2 C253SCD1U10V2KX-5GP PEG_TXP2
16 DMI_RXP1 AE41 DMI_TXP_1 NC10 B2 14 GMCH_GREEN C22 CRT_GREEN EXP_A_TXP_2 G36 1 2

VGA
DMI_RXP2 AF37 AY41 SRN10KJ-5-GP GMCH_GREEN# B22 H40 GTXP3 1 2 C612SCD1U10V2KX-5GP PEG_TXP3
3D3V_S0 16 DMI_RXP2 DMI_RXP3 DMI_TXP_2 NC11 GMCH_RED CRT_GREEN# EXP_A_TXP_3 GTXP4 C257SCD1U10V2KX-5GP PEG_TXP4
16 DMI_RXP3 AG41 DMI_TXP_3 NC12 AY1 4 1 14 GMCH_RED A21 CRT_RED EXP_A_TXP_4 J36 1 2
AW41 3 2 GMCH_RED# B21 L40 GTXP5 1 2 C617SCD1U10V2KX-5GP PEG_TXP5
NC13 CRT_RED# EXP_A_TXP_5 GTXP6 C261SCD1U10V2KX-5GP PEG_TXP6
NC14 AW1 EXP_A_TXP_6 M36 1 2
A40 N40 GTXP7 1 2 C619SCD1U10V2KX-5GP PEG_TXP7
NC15 GMCH_DDCCLK EXP_A_TXP_7 GTXP8 C271SCD1U10V2KX-5GP PEG_TXP8
RN17 A4 14 GMCH_DDCCLK C26 P36 1 2
2 PM_EXTTS#0 NC16 GMCH_DDCDATA CRT_DDC_CLK EXP_A_TXP_8 GTXP9 C621SCD1U10V2KX-5GP PEG_TXP9 2
1 4 NC17 A39 14 GMCH_DDCDATA C25 CRT_DDC_DATA EXP_A_TXP_9 R40 1 2
2 3 PM_EXTTS#1 A3 GMCH_HS G23 T36 GTXP10 1 2 C275SCD1U10V2KX-5GP PEG_TXP10
NC18 CRT_IREF CRT_HSYNC EXP_A_TXP_10 GTXP11 C624SCD1U10V2KX-5GP PEG_TXP11
J22 CRT_IREF EXP_A_TXP_11 V40 1 2
SRN10KJ-5-GP CALISTOGA KI.94501.006 R107 UMA GMCH_VS H23 W36 GTXP12 1 2 C279SCD1U10V2KX-5GP PEG_TXP12
1D8V_S3 3D3V_S0 0R2J-2-GP CRT_VSYNC EXP_A_TXP_12 GTXP13 C630SCD1U10V2KX-5GP PEG_TXP13
EXP_A_TXP_13 Y40 1 2
1 2 R163DUMMY-R2 CFG18 14 GMCH_HSYNC 1 2 GMCH_HS EXP_A_TXP_14 AA36 GTXP14 1 2 C283SCD1U10V2KX-5GP PEG_TXP14
1

R109 UMA AB40 GTXP15 1 2 C635SCD1U10V2KX-5GP PEG_TXP15


R216 CFG19 EXP_A_TXP_15
1 2 R161DUMMY-R2 0R2J-2-GP
80D6R2F-L-GP 1 2 GMCH_VS CALISTOGA KI.94501.006
14 GMCH_VSYNC
1 2 R162DUMMY-R2 CFG20
M_RCOMPN RN58 G72 RN18 UMA
2

1 2 R157DUMMY-R2 CFG3 SRN0J-6-GP SRN100KJ-6-GP


R152 GMCH_BLUE 2 3
M_RCOMPP 1 2 R178DUMMY-R2 CFG4 0R2J-2-GP G72 GMCH_GREEN 1 4 1D05V_S0 BL_ON 2 3 RN9 UMA
1

GMCH_RED# 1 2 GMCH_LCDVDD_ON 1 4 SRN10KJ-5-GP


R217 1 2 R187DUMMY-R2 CFG5 R408 G72 LCTLA_CLK 3 2
80D6R2F-L-GP R148 UMA R151 0R2J-2-GP LCTLB_DATA 4 1 3D3V_S0
1 2 R158DUMMY-R2 CFG6 150R2F-1-GP 0R2J-2-GP G72 GMCH_RED 1 2 R181 UMA
GMCH_BLUE 1 2 GMCH_GREEN# 1 2 1D05V_S0 R195 G72 1K5R2F-2-GP RN16 UMA
2

1 2 R156DUMMY-R2 CFG7 0R2J-2-GP LIBG 1 2 SRN10KJ-5-GP


R154 UMA R149 CRT_IREF 1 2 CLK_DDC_EDID 3 2
1 2 R166DUMMY-R2 CFG8 150R2F-1-GP 0R2J-2-GP G72 RN11 G72 DAT_DDC_EDID 4 1
GMCH_GREEN 1 2 GMCH_BLUE# 1 2 R409 G72 SRN0J-6-GP
1 2 R179DUMMY-R2 CFG9 0R2J-2-GP GMCH_VS 2 3
When High 1K Ohm R153 UMA R147 TV_DACC 1 2 GMCH_HS 1 4
1 2 R168DUMMY-R2 CFG10 150R2F-1-GP 0R2J-2-GP UMA
GMCH_RED 1 2 GMCH_RED# 1 2 RN59 G72
1 2 R167DUMMY-R2 CFG11 SRN0J-6-GP
1 CFG6: R413 UMA R155 TV_DACA 1 4 1D5V_S0 1
1 2 R193DUMMY-R2 CFG12 150R2F-1-GP 0R2J-2-GP UMA TV_DACB 2 3
0=Moby Dick ,1=Calistoga (default) TV_DACA 1 2 GMCH_GREEN# 1 2
2 R203DUMMY-R2 CFG13 RN49 G72
1
R400 UMA R150 SRN0J-6-GP Wistron Corporation
1 2 R165DUMMY-R2 CFG14 150R2F-1-GP 0R2J-2-GP UMA TV_IREF 1 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TV_DACB 1 2 GMCH_BLUE# 1 2 TV_IRTNA 2 3 Taipei Hsien 221, Taiwan, R.O.C.
When Low choice 1 2 R202DUMMY-R2 CFG15
lower than 3.5K R398 UMA R191 RN8 G72 Title
2 R159DUMMY-R2 CFG16 150R2F-1-GP 255R2F-L-GP UMA SRN0J-6-GP
Ohm 1
TV_DACC 1 2 CRT_IREF 1 2 TV_IRTNB 1 4 GMCH (2 of 5)
1 2 R197DUMMY-R2 CFG17 TV_IRTNC 2 3 Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 7 of 57

om
A B C D E

l.c
ai
tm
ho
f@
in
xa
he
A B C D E

4 4

M_B_DQ[63..0] U39E
11 M_B_DQ[63..0]
M_B_DQ0 AK39
M_B_DQ1 SB_DQ0
AJ37 SB_DQ1 SB_BS_0 AT24 M_B_BS#0 11,12
M_A_DQ[63..0] U39D M_B_DQ2 AP39 AV23
11 M_A_DQ[63..0] SB_DQ2 SB_BS_1 M_B_BS#1 11,12
M_A_DQ0 AJ35 AU12 M_A_BS#0 11,12 M_B_DQ3 AR41 AY28 M_B_BS#2 11,12
M_A_DQ1 SA_DQ0 SA_BS_0 M_B_DQ4 SB_DQ3 SB_BS_2
AJ34 SA_DQ1 SA_BS_1 AV14 M_A_BS#1 11,12 AJ38 SB_DQ4 M_B_CAS# 11,12
M_A_DQ2 AM31 BA20 M_B_DQ5 AK38 AR24 M_B_DM[7..0]
SA_DQ2 SA_BS_2 M_A_BS#2 11,12 SB_DQ5 SB_CAS# M_B_DM[7..0] 11
M_A_DQ3 AM33 M_A_CAS# 11,12 M_B_DQ6 AN41 AK36 M_B_DM0
M_A_DQ4 SA_DQ3 M_A_DM[7..0] M_B_DQ7 SB_DQ6 SB_DM_0 M_B_DM1
AJ36 SA_DQ4 SA_CAS# AY13 M_A_DM[7..0] 11 AP41 SB_DQ7 SB_DM_1 AR38
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ8 AT40 AT36 M_B_DM2
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM1 M_B_DQ9 SB_DQ8 SB_DM_2 M_B_DM3
AJ32 SA_DQ6 SA_DM_1 AM35 AV41 SB_DQ9 SB_DM_3 BA31
M_A_DQ7 AH31 AL26 M_A_DM2 M_B_DQ10 AU38 AL17 M_B_DM4
M_A_DQ8 SA_DQ7 SA_DM_2 M_A_DM3 M_B_DQ11 SB_DQ10 SB_DM_4 M_B_DM5
AN35 SA_DQ8 SA_DM_3 AN22 AV38 SB_DQ11 SB_DM_5 AH8
M_A_DQ9 AP33 AM14 M_A_DM4 M_B_DQ12 AP38 BA5 M_B_DM6
M_A_DQ10 SA_DQ9 SA_DM_4 M_A_DM5 M_B_DQ13 SB_DQ12 SB_DM_6 M_B_DM7
AR31 SA_DQ10 SA_DM_5 AL9 AR40 SB_DQ13 SB_DM_7 AN4
M_A_DQ11 AP31 AR3 M_A_DM6 M_B_DQ14 AW38 M_B_DQS[7..0]
SA_DQ11 SA_DM_6 SB_DQ14 M_B_DQS[7..0] 11
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ15 AY38 AM39 M_B_DQS0

B
M_A_DQ13 SA_DQ12 SA_DM_7 M_A_DQS[7..0] M_B_DQ16 SB_DQ15 SB_DQS_0 M_B_DQS1
AM36 SA_DQ13 M_A_DQS[7..0] 11 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ17 AV36 AU35 M_B_DQS2

A
M_A_DQ15 SA_DQ14 SA_DQS_0 M_A_DQS1 M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS3
AN33 SA_DQ15 SA_DQS_1 AT33 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ16 AK26 AN28 M_A_DQS2 M_B_DQ19 AP36 AR16 M_B_DQS4
M_A_DQ17 SA_DQ16 SA_DQS_2 M_A_DQS3 M_B_DQ20 SB_DQ19 SB_DQS_4 M_B_DQS5
AL27 AM22 BA36 AR10

MEMORY
3 M_A_DQ18 SA_DQ17 SA_DQS_3 M_A_DQS4 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6 3
AM26 SA_DQ18 SA_DQS_4 AN12 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ19 AN24
MEMORY AN8 M_A_DQS5 M_B_DQ22 AP35 AN5 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ19 SA_DQS_5 SB_DQ22 SB_DQS_7 M_B_DQS#[7..0] 11
M_A_DQ20 AK28 AP3 M_A_DQS6 M_B_DQ23 AP34 AM40 M_B_DQS#0
M_A_DQ21 SA_DQ20 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
AL28 SA_DQ21 SA_DQS_7 AG5 M_A_DQS#[7..0] 11 AY33 SB_DQ24 SB_DQS#_1 AU39
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ25 BA33 AT35 M_B_DQS#2
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 M_B_DQ26 SB_DQ25 SB_DQS#_2 M_B_DQS#3
AP26 SA_DQ23 SA_DQS#_1 AU33 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ27 AU29 AP16 M_B_DQS#4
M_A_DQ25 SA_DQ24 SA_DQS#_2 M_A_DQS#3 M_B_DQ28 SB_DQ27 SB_DQS#_4 M_B_DQS#5
AL22 SA_DQ25 SA_DQS#_3 AM21 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ29 AW31 AT7 M_B_DQS#6
M_A_DQ27 SA_DQ26 SA_DQS#_4 M_A_DQS#5 M_B_DQ30 SB_DQ29 SB_DQS#_6 M_B_DQS#7
AN20 SA_DQ27 SA_DQS#_5 AL8 AV29 SB_DQ30 SB_DQS#_7 AP5
M_A_DQ28 AL23 AN3 M_A_DQS#6 M_B_DQ31 AW29 M_B_A[13..0]
SA_DQ28 SA_DQS#_6 SB_DQ31 M_B_A[13..0] 11,12
M_A_DQ29 AP24 AH5 M_A_DQS#7 M_B_DQ32 AM19 AY23 M_B_A0
M_A_DQ30 SA_DQ29 SA_DQS#_7 M_A_A[13..0] M_B_DQ33 SB_DQ32 SB_MA_0 M_B_A1

SYSTEM
AP20 SA_DQ30 M_A_A[13..0] 11,12 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ34 AP14 AY24 M_B_A2
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ35 SB_DQ34 SB_MA_2 M_B_A3
SYSTEM

AR12 SA_DQ32 SA_MA_1 AU14 AN14 SB_DQ35 SB_MA_3 AR28


M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ36 AN17 AT27 M_B_A4
M_A_DQ34 SA_DQ33 SA_MA_2 M_A_A3 M_B_DQ37 SB_DQ36 SB_MA_4 M_B_A5
AP13 SA_DQ34 SA_MA_3 BA16 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ35 AP12 BA17 M_A_A4 M_B_DQ38 AP15 AU27 M_B_A6
M_A_DQ36 SA_DQ35 SA_MA_4 M_A_A5 M_B_DQ39 SB_DQ38 SB_MA_6 M_B_A7
AT13 SA_DQ36 SA_MA_5 AU16 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ40 AJ11 AV27 M_B_A8
M_A_DQ38 SA_DQ37 SA_MA_6 M_A_A7 M_B_DQ41 SB_DQ40 SB_MA_8 M_B_A9
AL14 SA_DQ38 SA_MA_7 AU17 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ39 AL12 AW17 M_A_A8 M_B_DQ42 AJ9 AV24 M_B_A10
M_A_DQ40 SA_DQ39 SA_MA_8 M_A_A9 M_B_DQ43 SB_DQ42 SB_MA_10 M_B_A11
AK9 SA_DQ40 SA_MA_9 AT16 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ44 AK13 AY27 M_B_A12
M_A_DQ42 SA_DQ41 SA_MA_10 M_A_A11 M_B_DQ45 SB_DQ44 SB_MA_12 M_B_A13
AK8 SA_DQ42 SA_MA_11 AT17 AH11 SB_DQ45 SB_MA_13 AR23

DDR
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ46 AK10
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ47 SB_DQ46
AP9 SA_DQ44 SA_MA_13 AV12 AJ8 SB_DQ47 SB_RAS# AU23 M_B_RAS# 11,12
DDR

M_A_DQ45 AN9 M_B_DQ48 BA10 AK16 SB_RCVENIN# TP52 TPAD30


M_A_DQ46 SA_DQ45 M_B_DQ49 SB_DQ48 SB_RCVENIN# SB_RCVENOUT# TP51 TPAD30
AT5 SA_DQ46 SA_RAS# AW14 M_A_RAS# 11,12 AW10 SB_DQ49 SB_RCVENOUT# AK18
2 M_A_DQ47 SA_RCVENIN# TP54 TPAD30 M_B_DQ50 2
AL5 SA_DQ47 SA_RCVENIN# AK23 BA4 SB_DQ50 SB_WE# AR27 M_B_WE# 11,12
M_A_DQ48 AY2 AK24 SA_RCVENOUT# TP53 TPAD30 M_B_DQ51 AW4
M_A_DQ49 SA_DQ48 SA_RCVENOUT# M_B_DQ52 SB_DQ51
AW2 SA_DQ49 SA_WE# AY14 M_A_WE# 11,12 AY10 SB_DQ52
M_A_DQ50 AP1 M_B_DQ53 AY9 Place Test PAD Near to Chip
M_A_DQ51 SA_DQ50 M_B_DQ54 SB_DQ53
AN2 SA_DQ51 AW5 SB_DQ54 ascould as possible
M_A_DQ52 AV2 Place Test PAD Near to Chip M_B_DQ55 AY5
M_A_DQ53 SA_DQ52 M_B_DQ56 SB_DQ55
AT3 SA_DQ53 as could as possible AV4 SB_DQ56
M_A_DQ54 AN1 M_B_DQ57 AR5
M_A_DQ55 SA_DQ54 M_B_DQ58 SB_DQ57
AL2 SA_DQ55 AK4 SB_DQ58
M_A_DQ56 AG7 M_B_DQ59 AK3
M_A_DQ57 SA_DQ56 M_B_DQ60 SB_DQ59
AF9 SA_DQ57 AT4 SB_DQ60
M_A_DQ58 AG4 M_B_DQ61 AK5
M_A_DQ59 SA_DQ58 M_B_DQ62 SB_DQ61
AF6 SA_DQ59 AJ5 SB_DQ62
M_A_DQ60 AG9 M_B_DQ63 AJ3
M_A_DQ61 SA_DQ60 SB_DQ63
AH6 SA_DQ61
M_A_DQ62 AF4 CALISTOGA KI.94501.006
M_A_DQ63 SA_DQ62
AF8 SA_DQ63
CALISTOGA KI.94501.006

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GMCH (3 of 5)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 8 of 57
A B C D E
A B C D E

2D5V_S0 2D5V_S0

1
1
VCC_TXLVD R402

1
C588 R414 0R3-0-U-GP
C591 0R3-0-U-GP UMA
SC4D7U6D3V3KX-GP SCD1U10V2KX-4GP R190G72 UMA

2
0R2J-2-GP

2
1 2 U39H
H22 1D05V_S0
VCCSYNC

1
C260 UMA AC14
2D5V_3GBG_S0 2D5V_S0 SCD1U10V2KX-4GP VTT_0
C30 VCC_TXLVDS0 VTT_1 AB14
R403G72 B30 W14

2
R410 0R0603-PAD VCC_TXLVDS1 VTT_2
4 1 0R3-0-U-GP
2 VCC_TXLVD A30 VCC_TXLVDS2 VTT_3 V14 4

1
2 1 1D5V_PCIE_S0 T14
R211 0R0805-PAD VTT_4 C280 C274 C288
1 AJ41 VCC3G0 VTT_5 R14
1 2 AB41 P14 SCD1U10V2KX-4GP SC2D2U6D3V3MX-1-GP SC4D7U10V5ZY-3GP
1D5V_S0

2
C592 C291 VCC3G1 VTT_6
Y41 VCC3G2 VTT_7 N14

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C297 C294 C289

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
V41 M14
2

VCC3G3 VTT_8
R41 VCC3G4 VTT_9 L14
R208 N41 AD13

2
0R0603-PAD 1D5V_3GPLL_S0 VCC3G5 VTT_10
L41 VCC3G6 VTT_11 AC13
1D5V_S0 2 1 AC33 VCCA_3GPLL VTT_12 AB13
2D5V_3GBG_S0 G41 AA13
VCCA_3GBG VTT_13

1
C285 H41 Y13
VSSA_3GBG VTT_14
VTT_15 W13
SC4D7U6D3V3KX-GP C284 VCCA_CRTDAC F21 V13

2
VCCA_CRTDAC0 VTT_16
E21 VCCA_CRTDAC1 VTT_17 U13
SCD1U10V2KX-4GP G21 T13
VSSA_CRTDAC VTT_18
VTT_19 R13
1D5V_DPLLA B26 N13
1D5V_DPLLB VCCA_DPLLA VTT_20
C39 VCCA_DPLLB VTT_21 M13
R613 UMA 1D5V_HPLL_S0 AF1 L13
0R3-0-U-GP VCCA_HPLL VTT_22
VTT_23 AB12
2D5V_S0 1 2 A38 VCCA_LVDS VTT_24 AA12
R182 2 1 0R2J-2-GP UMA B39 Y12
VSSA_LVDS VTT_25

1
1D5V_S0 C595UMA W12
R401 G72 SCD1U10V2KX-4GP R138G72 1D5V_MPLL_S0 AF2 VTT_26
VCCA_MPLL VTT_27 V12
0R2J-2-GP 0R2J-2-GP U12
L29

2
VTT_28
UMA 2 1 1 2 V_TVBG H20 VCCA_TVBG VTT_29 T12
1 2 1D5V_DPLLA G20 R12
HCB1608KF121T30-GP 1D5V_S0 VSSA_TVBG VTT_30
VTT_31 P12
1

3 68.00230.041 RN14 G72 N12 3


C596 C597 SRN0J-6-GP VTT_32
VTT_33 M12
SC10U10V5ZY-1GP SCD1U10V2KX-4GP 1 4 V_DACA E19 L12
2

VCCA_TVDACA0 VTT_34
L30 2 3 F19 VCCA_TVDACA1 VTT_35 R11
UMA V_DACB C20 P11
1D5V_DPLLB VCCA_TVDACB0 VTT_36
1 2 D20 VCCA_TVDACB1 VTT_37 N11
HCB1608KF121T30-GP R1341 2 0R2J-2-GP G72 V_DACC E20 M11
VCCA_TVDACC0
POWER VTT_38
1

68.00230.041 F20 R10


C599 C598 1D5V_S0 VCCA_TVDACC1 VTT_39
VTT_40 P10
SC10U10V5ZY-1GP SCD1U10V2KX-4GP AH1 N10
2

R404 G72 VCCD_HMPLL0 VTT_41


L38 AH2 VCCD_HMPLL1 VTT_42 M10
0R3-0-U-GP P9
1D5V_HPLL_S0 VTT_43
1 2 2 1 A28 VCCD_LVDS0 VTT_44 N9
HCB1608KF121T30-GP 2 1 R405 0R3-0-U-GP UMA B28 M9
VCCD_LVDS1 VTT_45
1

68.00230.041 C28 R8
C644 C643 R177 0R0603-PAD VCCD_LVDS2 VTT_46
VTT_47 P8
1D5V_S0 2 1 1D5V_TVDAC_S0 D21 N8
2

VCCD_TVDAC VTT_48
L34 VTT_49 M8

1
C247 A23 P7
1D5V_MPLL_S0 SCD1U10V2KX-4GP VCC_HV0 VTT_50
1 2 B23 VCC_HV1 VTT_51 N7
HCB1608KF121T30-GP B25 M7

2
VCC_HV2 VTT_52
1

68.00230.041 SC10U10V5ZY-1GP SCD1U10V2KX-4GP R406 0R0603-PAD R6


C641 C639 VTT_53
3D3V_S0 2 1 H19 VCCD_QTVDAC VTT_54 P6
SC10U10V5ZY-1GP SCD1U10V2KX-4GP M6
2

VTT_55 VCCP_GMCH_CAP3
AK31 VCCAUX0 VTT_56 A6

1
C587 C593 AF31 R5
VCCAUX1 VTT_57 C600
AE31 VCCAUX2 VTT_58 P5
SC10U10V5ZY-1GP SCD1U10V2KX-4GP AC31 N5 SCD47U10V3ZY-GP
2

2
VCCAUX3 VTT_59
AL30 VCCAUX4 VTT_60 M5
2 2
AK30 VCCAUX5 VTT_61 P4
D9 UMA AJ30 N4
BAT54-4-GP R194 0R0603-PAD VCCAUX6 VTT_62
AH30 VCCAUX7 VTT_63 M4
1D5V_S0 1 1D5V_S0 2 1 1D5V_QTVDAC_S0 AG30 R3
VCCAUX8 VTT_64
AF30 VCCAUX9 VTT_65 P3
1

3 C256 AE30 N3
VCCAUX10 VTT_66
1

AD30 VCCAUX11 VTT_67 M3


2 R118 SCD1U10V2KX-4GP AC30 R2
2

10R2J-2-GP VCCAUX12 VTT_68


AG29 VCCAUX13 VTT_69 P2
UMA AF29 VCCAUX14 VTT_70 M2
AE29 D2 VCCP_GMCH_CAP2
2

L14 UMA 2D5V_CRTDAC R133 UMA VCCA_CRTDAC R132 G72 VCCAUX15 VTT_71 VCCP_GMCH_CAP1
AD29 VCCAUX16 VTT_72 AB1

1
HCB1608KF121T30-GP 0R5J-6-GP 0R3-0-U-GP AC29 R1
VCCAUX17 VTT_73 C634 C250
2D5V_S0 1 2 2 1 1 2 1D5V_S0 AG28 VCCAUX18 VTT_74 P1
68.00230.041 AF28 N1 SCD47U10V3ZY-GP SCD22U16V3ZY-GP

2
VCCAUX19 VTT_75
1

C252 AE28 M1
VCCAUX20 VTT_76
AH22 VCCAUX21
SCD1U10V2KX-4GP AJ21
2

VCCAUX22
AH21 VCCAUX23
AJ20 VCCAUX24
D10 UMA R130 UMA AH20
BAT54-4-GP 0R3-0-U-GP VCCAUX25
AH19 VCCAUX26
1D5V_S0 1 2 1 V_DACA P19
1D5V_S0 VCCAUX27
P16 VCCAUX28
3 3D3V_TVDAC R131 UMA AH15 VCCAUX29
1

0R3-0-U-GP P15
R119 V_DACB VCCAUX30
2 2 1 AH14 VCCAUX31
10R2J-2-GP AG14 VCCAUX32
1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C228 C227 C290 C293 C296 C292

om
1 UMA AF14 VCCAUX33 1
AE14
2

l.c
L12 UMA R129 UMA SCD1U10V2KX-4GP SCD1U10V2KX-4GP VCCAUX34
Y14
2

VCCAUX35

ai
HCB1608KF121T30-GP 0R3-0-U-GP AF13
Wistron Corporation

tm
V_DACC VCCAUX36
3D3V_S0 1 2 2 1 AE13 VCCAUX37

ho
68.00230.041 AF12 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R128 0R3-0-U-GP UMA VCCAUX38 Taipei Hsien 221, Taiwan, R.O.C.

f@
AE12 VCCAUX39
1

2 1 V_TVBG C226 AD12

in
VCCAUX40
1

C214 Title

xa
1

C229 SCD1U10V2KX-4GP
GMCH (4 of 5)
2

he
SC10U10V5ZY-1GP CALISTOGA KI.94501.006
2

Divide by Trace (Layout Rule approve) UMA SCD1U10V2KX-4GP Size Document Number Rev
2

MYALL2 MP
Date: Friday, March 24, 2006 Sheet 9 of 57
A B C D E
A B C D E
U39G
1D05V_S0 AA33 U39I
VCC_0 1D05V_S0
W33 VCC_1 AC41 VSS_0 VSS_97 AK34
P33 VCC_2 AA41 VSS_1 VSS_98 AG34
N33 U39F W41 AF34
VCC_3 VSS_2 VSS_99 U39J
L33 VCC_4 VCC_SM_0 AU41 AD27
VCC_NCTF0 T41 VSS_3 VSS_100 AE34
J33 VCC_5 VCC_SM_1 AT41 AC27
VCC_NCTF1 VSS_NCTF0 AE27 P41 VSS_4 VSS_101 AC34 AT23 VSS_180 VSS_273 J11
AA32 VCC_6 VCC_SM_2 AM41 AB27
VCC_NCTF2 VSS_NCTF1 AE26 M41 VSS_5 VSS_102 C34 AN23 VSS_181 VSS_274 D11
Y32 VCC_7 VCC_SM_3 AU40 AA27
VCC_NCTF3 VSS_NCTF2 AE25 J41 VSS_6 VSS_103 AW33 AM23 VSS_182 VSS_275 B11
W32 VCC_8 VCC_SM_4 BA34 Y27
VCC_NCTF4 VSS_NCTF3 AE24 F41 VSS_7 VSS_104 AV33 AH23 VSS_183 VSS_276 AV10
V32 VCC_9 VCC_SM_5 AY34 W27
VCC_NCTF5 VSS_NCTF4 AE23 AV40 VSS_8 VSS_105 AR33 AC23 VSS_184 VSS_277 AP10
P32 VCC_10 VCC_SM_6 AW34 V27
VCC_NCTF6 VSS_NCTF5 AE22 AP40 VSS_9 VSS_106 AE33 W23 VSS_185 VSS_278 AL10
N32 VCC_11 VCC_SM_7 AV34 U27
VCC_NCTF7 VSS_NCTF6 AE21 AN40 VSS_10 VSS_107 AB33 K23 VSS_186 VSS_279 AJ10
M32 VCC_12 VCC_SM_8 AU34 T27
VCC_NCTF8 VSS_NCTF7 AE20 AK40 VSS_11 VSS_108 Y33 J23 VSS_187 VSS_280 AG10
4 L32 VCC_13 VCC_SM_9 AT34 R27
VCC_NCTF9 VSS_NCTF8 AE19 AJ40 VSS_12 VSS_109 V33 F23 VSS_188 VSS_281 AC10 4
J32 VCC_14 VCC_SM_10 AR34 AD26
VCC_NCTF10 VSS_NCTF9 AE18 AH40 VSS_13 VSS_110 T33 C23 VSS_189 VSS_282 W10
AA31 VCC_15 VCC_SM_11 BA30 AC26
VCC_NCTF11 VSS_NCTF10 AC17 AG40 VSS_14 VSS_111 R33 AA22 VSS_190 VSS_283 U10
W31 VCC_16 VCC_SM_12 AY30 AB26
VCC_NCTF12 VSS_NCTF11 Y17 AF40 VSS_15 VSS_112 M33 K22 VSS_191 VSS_284 BA9
V31 VCC_17 VCC_SM_13 AW30 AA26
VCC_NCTF13 VSS_NCTF12 U17 AE40 VSS_16 VSS_113 H33 G22 VSS_192 VSS_285 AW9
T31 VCC_18 VCC_SM_14 AV30 Y26
VCC_NCTF14 B40 VSS_17 VSS_114 G33 F22 VSS_193 VSS_286 AR9
R31 VCC_19 VCC_SM_15 AU30 W26
VCC_NCTF15 AY39 VSS_18 VSS_115 F33 E22 VSS_194 VSS_287 AH9
P31 VCC_20 VCC_SM_16 AT30 V26
VCC_NCTF16 AW39 VSS_19 VSS_116 D33 D22 VSS_195 VSS_288 AB9
N31 VCC_21 VCC_SM_17 AR30 U26
VCC_NCTF17 AV39 VSS_20 VSS_117 B33 A22 VSS_196 VSS_289 Y9
M31 VCC_22 VCC_SM_18 AP30 T26
VCC_NCTF18 AR39 VSS_21 VSS_118 AH32 BA21 VSS_197 VSS_290 R9
AA30 VCC_23 VCC_SM_19 AN30 R26
VCC_NCTF19 VCCAUX_NCTF0 AG27 AN39 VSS_22 VSS_119 AG32 AV21 VSS_198 VSS_291 G9
Y30 VCC_24 VCC_SM_20 AM30 AD25
VCC_NCTF20 VCCAUX_NCTF1 AF27 1D5V_S0 AJ39 VSS_23 VSS_120 AF32 AR21 VSS_199 VSS_292 E9
W30 VCC_25 VCC_SM_21 AM29 AC25
VCC_NCTF21 VCCAUX_NCTF2 AG26 AC39 VSS_24 VSS_121 AE32 AN21 VSS_200 VSS_293 A9
V30 VCC_26 VCC_SM_22 AL29 AB25
VCC_NCTF22 VCCAUX_NCTF3 AF26 AB39 VSS_25 VSS_122 AC32 AL21 VSS_201 VSS_294 AG8
U30 VCC_27 VCC_SM_23 AK29 AA25
VCC_NCTF23 VCCAUX_NCTF4 AG25 AA39 VSS_26 VSS_123 AB32 AB21 VSS_202 VSS_295 AD8
T30 VCC_28 VCC_SM_24 AJ29 Y25
VCC_NCTF24 VCCAUX_NCTF5 AF25 Y39 VSS_27 VSS_124 G32 Y21 VSS_203 VSS_296 AA8
R30 VCC_29 VCC_SM_25 AH29 W25
VCC_NCTF25 VCCAUX_NCTF6 AG24 W39 VSS_28 VSS_125 B32 P21 VSS_204 VSS_297 U8
P30 VCC_30 VCC_SM_26 AJ28 V25
VCC_NCTF26 VCCAUX_NCTF7 AF24 V39 VSS_29 VSS_126 AY31 K21 VSS_205 VSS_298 K8
N30 VCC_31 VCC_SM_27 AH28 U25
VCC_NCTF27 VCCAUX_NCTF8 AG23 T39 VSS_30 VSS_127 AV31 J21 VSS_206 VSS_299 C8
M30 VCC_32 VCC_SM_28 AJ27 T25
VCC_NCTF28 VCCAUX_NCTF9 AF23 R39 VSS_31 VSS_128 AN31 H21 VSS_207 VSS_300 BA7
L30 VCC_33 VCC_SM_29 AH27 R25
VCC_NCTF29 VCCAUX_NCTF10 AG22 P39 VSS_32 VSS_129 AJ31 C21 VSS_208 VSS_301 AV7
AA29 BA26 AD24 VCCAUX_NCTF11 AF22 N39 AG31 AW20 AP7
Y29
W29
VCC_34
VCC_35
VCC_36
VCC_SM_30
VCC_SM_31
VCC_SM_32
AY26
AW26
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
VCCAUX_NCTF12 AG21
VCCAUX_NCTF13 AF21
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
AR20
AM20
VSS_209
VSS_210
VSS_211 VSS
VSS_302
VSS_303
VSS_304
AL7
AJ7
V29 VCC_37 VCC_SM_33 AV26 AA24
VCC_NCTF33 VCCAUX_NCTF14 AG20 J39 VSS_36 VSS_133 AB30 AA20 VSS_212 VSS_305 AH7
U29 VCC_38 VCC_SM_34 AU26 Y24
VCC_NCTF34 VCCAUX_NCTF15 AF20 H39 VSS_37 VSS_134 E30 K20 VSS_213 VSS_306 AF7
R29 VCC_39 VCC_SM_35 AT26 W24
VCC_NCTF35 VCCAUX_NCTF16 AG19 G39 VSS_38 VSS_135 AT29 B20 VSS_214 VSS_307 AC7
P29 VCC_40 VCC_SM_36 AR26 V24
VCC_NCTF36 VCCAUX_NCTF17 AF19 F39 VSS_39 VSS_136 AN29 A20 VSS_215 VSS_308 R7
M29 VCC_41 VCC_SM_37 AJ26 U24
VCC_NCTF37 VCCAUX_NCTF18 R19 D39 VSS_40 VSS_137 AB29 AN19 VSS_216 VSS_309 G7
3 L29 AH26 T24 3
VCC_42 VCC_SM_38 VCC_NCTF38 VCCAUX_NCTF19 AG18 AT38 VSS_41 VSS_138 T29 AC19 VSS_217 VSS_310 D7
AB28 VCC_43 VCC_SM_39 AJ25 R24
VCC_NCTF39 VCCAUX_NCTF20 AF18 AM38 VSS_42 VSS_139 N29 W19 VSS_218 VSS_311 AG6
AA28 VCC_44 VCC_SM_40 AH25 AD23
VCC_NCTF40 VCCAUX_NCTF21 R18 AH38 VSS_43 VSS_140 K29 K19 VSS_219 VSS_312 AD6
Y28 VCC_45 VCC_SM_41 AJ24 V23
VCC_NCTF41 VCCAUX_NCTF22 AG17 AG38 VSS_44 VSS_141 G29 G19 VSS_220 VSS_313 AB6
V28 VCC_46 VCC_SM_42 AH24 U23
VCC_NCTF42 VCCAUX_NCTF23 AF17 AF38 VSS_45 VSS_142 E29 C19 VSS_221 VSS_314 Y6
U28 VCC_47 VCC_SM_43 BA23 T23
VCC_NCTF43 VCCAUX_NCTF24 AE17 AE38 VSS_46 VSS_143 C29 AH18 VSS_222 VSS_315 U6
T28 VCC_48 VCC_SM_44 AJ23 R23
VCC_NCTF44 VCCAUX_NCTF25 AD17 C38 VSS_47 VSS_144 B29 P18 VSS_223 VSS_316 N6
R28 VCC_49 VCC_SM_45 BA22 AD22
VCC_NCTF45 VCCAUX_NCTF26 AB17 AK37 VSS_48 VSS_145 A29 H18 VSS_224 VSS_317 K6
P28 VCC_50 VCC_SM_46 AY22 V22
VCC_NCTF46 VCCAUX_NCTF27 AA17 AH37 VSS_49 VSS_146 BA28 D18 VSS_225 VSS_318 H6
N28 VCC_51 VCC_SM_47 AW22 U22
VCC_NCTF47 VCCAUX_NCTF28 W17 AB37 VSS_50 VSS_147 AW28 A18 VSS_226 VSS_319 B6
M28 VCC_52 VCC_SM_48 AV22 T22
VCC_NCTF48 VCCAUX_NCTF29 V17 AA37 VSS_51 VSS_148 AU28 AY17 VSS_227 VSS_320 AV5
L28 VCC_53 VCC_SM_49 AU22 R22
VCC_NCTF49 VCCAUX_NCTF30 T17 Y37 VSS_52 VSS_149 AP28 AR17 VSS_228 VSS_321 AF5
P27 AT22 AD21 R17 W37 AM28 AP17 AD5
N27
M27
VCC_54
VCC_55
VCC_56
VCC_SM_50
VCC_SM_51
VCC_SM_52
AR22
AP22
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
VCCAUX_NCTF31
VCCAUX_NCTF32 AG16
VCCAUX_NCTF33 AF16
NCTF V37
T37
VSS_53
VSS_54
VSS_55
VSS_150
VSS_151
VSS_152
AD28
AC28
AM17
AK17
VSS_229
VSS_230
VSS_231
VSS_322
VSS_323
VSS_324
AY4
AR4
L27 VCC_57 VCC_SM_53 AK22 T21
VCC_NCTF53 VCCAUX_NCTF34 AE16 R37 VSS_56 VSS_153 W28 AV16 VSS_232 VSS_325 AP4
P26 VCC_58 VCC_SM_54 AJ22 R21
VCC_NCTF54 VCCAUX_NCTF35 AD16 P37 VSS_57 VSS_154 J28 AN16 VSS_233 VSS_326 AL4
N26 VCC_59 VCC_SM_55 AK21 AD20
VCC_NCTF55 VCCAUX_NCTF36 AC16 N37 VSS_58 VSS_155 E28 AL16 VSS_234 VSS_327 AJ4
L26 VCC_60 VCC_SM_56 AK20 V20
VCC_NCTF56 VCCAUX_NCTF37 AB16 M37 VSS_59 VSS_156 AP27 J16 VSS_235 VSS_328 Y4
N25 VCC_61 VCC_SM_57 BA19 U20
VCC_NCTF57 VCCAUX_NCTF38 AA16 L37 VSS_60 VSS_157 AM27 F16 VSS_236 VSS_329 U4
M25 VCC_62 VCC_SM_58 AY19 T20
VCC_NCTF58 VCCAUX_NCTF39 Y16 J37 VSS_61 VSS_158 AK27 C16 VSS_237 VSS_330 R4
L25 VCC_63 VCC_SM_59 AW19 R20
VCC_NCTF59 VCCAUX_NCTF40 W16 H37 VSS_62 VSS_159 J27 AN15 VSS_238 VSS_331 J4
P24 VCC_64 VCC_SM_60 AV19 AD19
VCC_NCTF60 VCCAUX_NCTF41 V16 G37 VSS_63 VSS_160 G27 AM15 VSS_239 VSS_332 F4
N24 VCC_65 VCC_SM_61 AU19 V19
VCC_NCTF61 VCCAUX_NCTF42 U16 F37 VSS_64 VSS_161 F27 AK15 VSS_240 VSS_333 C4
M24 VCC_66 VCC_SM_62 AT19 U19
VCC_NCTF62 VCCAUX_NCTF43 T16 D37 VSS_65 VSS_162 C27 N15 VSS_241 VSS_334 AY3
AB23 VCC_67 VCC_SM_63 AR19 T19
VCC_NCTF63 VCCAUX_NCTF44 R16 AY36 VSS_66 VSS_163 B27 M15 VSS_242 VSS_335 AW3
AA23 AP19 AD18 VCCAUX_NCTF45 AG15 AW36 AN26 L15 AV3

2
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
VCCAUX_NCTF46 AF15
VCCAUX_NCTF47 AE15
AN36
AH36
VSS_67
VSS_68
VSS_69
VSS_164
VSS_165
VSS_166
M26
K26
B15
A15
VSS_243
VSS_244
VSS_245
VSS_336
VSS_337
VSS_338
AL3
AH3
2
N23 VCC_71 VCC_SM_67 AJ18 AA18
VCC_NCTF67 VCCAUX_NCTF48 AD15 AG36 VSS_70 VSS_167 F26 BA14 VSS_246 VSS_339 AG3
M23 VCC_72 VCC_SM_68 AJ17 Y18
VCC_NCTF68 VCCAUX_NCTF49 AC15 AF36 VSS_71 VSS_168 D26 AT14 VSS_247 VSS_340 AF3
L23 VCC_73 VCC_SM_69 AH17 W18
VCC_NCTF69 VCCAUX_NCTF50 AB15 AE36 VSS_72 VSS_169 AK25 AK14 VSS_248 VSS_341 AD3
AC22 VCC_74 VCC_SM_70 AJ16 V18
VCC_NCTF70 VCCAUX_NCTF51 AA15 AC36 VSS_73 VSS_170 P25 AD14 VSS_249 VSS_342 AC3
AB22 VCC_75 VCC_SM_71 AH16 U18
VCC_NCTF71 VCCAUX_NCTF52 Y15 C36 VSS_74 VSS_171 K25 AA14 VSS_250 VSS_343 AA3
Y22 VCC_76 VCC_SM_72 BA15 T18
VCC_NCTF72 VCCAUX_NCTF53 W15 B36 VSS_75 VSS_172 H25 U14 VSS_251 VSS_344 G3
W22 VCC_77 VCC_SM_73 AY15 VCCAUX_NCTF54 V15 BA35 VSS_76 VSS_173 E25 K14 VSS_252 VSS_345 AT2
P22 VCC_78 VCC_SM_74 AW15 VCCAUX_NCTF55 U15 AV35 VSS_77 VSS_174 D25 H14 VSS_253 VSS_346 AR2
N22 VCC_79 VCC_SM_75 AV15 VCCAUX_NCTF56 T15 AR35 VSS_78 VSS_175 A25 E14 VSS_254 VSS_347 AP2
M22 VCC_80 VCC_SM_76 AU15 VCCAUX_NCTF57 R15 AH35 VSS_79 VSS_176 BA24 AV13 VSS_255 VSS_348 AK2
L22 VCC_81 VCC_SM_77 AT15 AB35 VSS_80 VSS_177 AU24 AR13 VSS_256 VSS_349 AJ2
AC21 AR15 CALISTOGA KI.94501.006 AA35 AL24 AN13 AD2
VCC_82 VCC_SM_78 VSS_81 VSS_178 VSS_257 VSS_350
AA21 VCC_83 VCC_SM_79 AJ15 Y35 VSS_82 VSS_179 AW23 AM13 VSS_258 VSS_351 AB2
W21 VCC_84 VCC_SM_80 AJ14 W35 VSS_83 AL13 VSS_259 VSS_352 Y2
N21 VCC_85 VCC_SM_81 AJ13 V35 VSS_84 AG13 VSS_260 VSS_353 U2
M21 VCC_86 VCC_SM_82 AH13 T35 VSS_85 P13 VSS_261 VSS_354 T2
L21 VCC_87 VCC_SM_83 AK12 R35 VSS_86 F13 VSS_262 VSS_355 N2
AC20 VCC_88 VCC_SM_84 AJ12 P35 VSS_87 D13 VSS_263 VSS_356 J2
1

AB20 VCC_89 VCC_SM_85 AH12 N35 VSS_88 B13 VSS_264 VSS_357 H2


Y20 AG12 C273 C276 C265 C287 C264 C270 C282 TC13 M35 AY12 F2
VCC_90 VCC_SM_86 SC10U10V5ZY-1GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP ST220U2VBM-3GP VSS_89 VSS_265 VSS_358
W20 AK11 L35 AC12 C2
2

VCC_91 VCC_SM_87 SC10U10V5ZY-1GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP SCD1U10V2KX-4GP VSS_90 VSS_266 VSS_359


P20 VCC_92 VCC_SM_88 BA8 J35 VSS_91 K12 VSS_267 VSS_360 AL1
N20 VCC_93 VCC_SM_89 AY8 H35 VSS_92 H12 VSS_268
M20 VCC_94 VCC_SM_90 AW8 Place these Caps close VCC_0 ~ VCC_110 G35 VSS_93 E12 VSS_269
L20 VCC_95 VCC_SM_91 AV8 F35 VSS_94 AD11 VSS_270
AB19 VCC_96 VCC_SM_92 AT8 D35 VSS_95 AA11 VSS_271
AA19 VCC_97 VCC_SM_93 AR8 AN34 VSS_96 Y11 VSS_272
Y19 AP8 1D8V_S3
VCC_98 VCC_SM_94 CALISTOGA KI.94501.006
1 N19 VCC_99 VCC_SM_95 BA6 1
M19 AY6 CALISTOGA KI.94501.006
VCC_100 VCC_SM_96
L19 VCC_101 VCC_SM_97 AW6
ST220U2VBM-3GP

Wistron Corporation
SC10U10V5ZY-1GP

N18 VCC_102 VCC_SM_98 AV6


1

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M18 AT6 C680 C299 C679 C302 C303 C301 C304 C677 C295
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
VCC_103 VCC_SM_99
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


SCD1U10V2KX-4GP

L18 AR6 TC5 DY C678


VCC_104 VCC_SM_100 Taipei Hsien 221, Taiwan, R.O.C.
P17 AP6 DY
2

2
VCC_105 VCC_SM_101
N17 AN6
2

VCC_106 VCC_SM_102 Title


M17 VCC_107 VCC_SM_103 AL6
N16
M16
VCC_108
VCC_109
VCC_SM_104
VCC_SM_105
AK6
AJ6 GMCH (5 of 5)
L16 AV1 CALISTOGA Size Document Number Rev
VCC_110 VCC_SM_106 KI.94501.006
VCC_SM_107 AJ1
MYALL2 MP
Date: Friday, March 24, 2006 Sheet 10 of 57
A B C D E
A B C D E

DM2 DM1
8,12 M_A_A[13..0]
M_A_A0 102 108 M_A_RAS# 8,12
8,12 M_B_A[13..0] A0 /RAS
M_B_A0 102 108 M_B_RAS# 8,12 M_A_A1 101 109 M_A_WE# 8,12
M_B_A1 A0 RAS# M_A_A2 A1 /WE
101 A1 WE# 109 M_B_WE# 8,12 100 A2 /CAS 113 M_A_CAS# 8,12
M_B_A2 100 113 M_B_CAS# 8,12 M_A_A3 99
M_B_A3 A2 CAS# M_A_A4 A3
99 A3 98 A4 /CS0 110 M_CS0# 7,12
M_B_A4 98 110 M_CS2# 7,12 M_A_A5 97 115 M_CS1# 7,12
M_B_A5 A4 CS0# M_A_A6 A5 /CS1
97 A5 CS1# 115 M_CS3# 7,12 94 A6
M_B_A6 94 M_A_A7 92 79 M_CKE0 7,12
M_B_A7 A6 M_A_A8 A7 CKE0
92 A7 CKE0 79 M_CKE2 7,12 93 A8 CKE1 80 M_CKE1 7,12
M_B_A8 93 80 M_CKE3 7,12 M_A_A9 91
M_B_A9 A8 CKE1 M_A_A10 A9
91 A9 105 A10/AP CK0 30 M_CLK_DDR0 7
4 M_B_A10 105 30 M_CLK_DDR3 7 M_A_A11 90 32 M_CLK_DDR#0 7 4
M_B_A11 A10/AP CK0 M_A_A12 A11 /CK0
90 A11 CK0# 32 M_CLK_DDR#3 7 89 A12
M_B_A12 89 M_A_A13 116 164 M_CLK_DDR1 7
M_B_A13 A12 A13 CK1
116 A13 CK1 164 M_CLK_DDR2 7 86 A14 /CK1 166 M_CLK_DDR#1 7
86 A14 CK1# 166 M_CLK_DDR#2 7 84 A15 M_A_DM[7..0] 8
84 8,12 M_A_BS#2 85 10 M_A_DM0
A15 M_B_DM[7..0] 8 A16/BA2 DM0
8,12 M_B_BS#2 85 10 M_B_DM0 26 M_A_DM1
A16/BA2 DM0 M_B_DM1 DM1 M_A_DM2
DM1 26 8,12 M_A_BS#0 107 BA0 DM2 52
8,12 M_B_BS#0 107 52 M_B_DM2 8,12 M_A_BS#1 106 67 M_A_DM3
BA0 DM2 M_B_DM3 BA1 DM3 M_A_DM4
8,12 M_B_BS#1 106 BA1 DM3 67 DM4 130
130 M_B_DM4 M_A_DQ0 5 147 M_A_DM5
DM4 M_B_DM5 M_A_DQ1 DQ0 DM5 M_A_DM6
DM5 147 8 M_A_DQ[63..0] 7 DQ1 DM6 170
M_B_DQ0 5 170 M_B_DM6 M_A_DQ2 17 185 M_A_DM7
M_B_DQ1 DQ0 DM6 M_B_DM7 M_A_DQ3 DQ2 DM7
8 M_B_DQ[63..0] 7 DQ1 DM7 185 19 DQ3
M_B_DQ2 17 SRN33J-5-GP-U M_A_DQ4 4 195 SMBD_ICH_1
M_B_DQ3 DQ2 RN20 M_A_DQ5 DQ4 SDA SMBC_ICH_1
19 DQ3 6 DQ5 SCL 197
M_B_DQ4 4 195 SMBD_ICH_1 1 4 SMBD_ICH 3,18 M_A_DQ6 14
M_B_DQ5 DQ4 SDA SMBC_ICH_1 M_A_DQ7 DQ6
6 DQ5 SCL 197 2 3 SMBC_ICH 3,18 16 DQ7 VDDSPD 199 3D3V_S0
M_B_DQ6 14 M_A_DQ8 23
M_B_DQ7 DQ6 M_A_DQ9 DQ8
16 DQ7 VDDSPD 199 3D3V_S0 25 DQ9 SA0 198
M_B_DQ8 23 R251 M_A_DQ10 35 200
M_B_DQ9 DQ8 10KR2J-3-GP M_A_DQ11 DQ10 SA1
25 DQ9 SA0 198 37 DQ11
M_B_DQ10 35 200 1 2 3D3V_S0 M_A_DQ12 20 50
M_B_DQ11 DQ10 SA1 M_A_DQ13 DQ12 NC#50
37 DQ11 22 DQ13 NC#69 69
M_B_DQ12 20 50 M_A_DQ14 36 83
M_B_DQ13 DQ12 NC#50 M_A_DQ15 DQ14 NC#83
22 DQ13 NC#69 69 38 DQ15 NC#120 120
M_B_DQ14 36 83 M_A_DQ16 43 163
M_B_DQ15 DQ14 NC#83 M_A_DQ17 DQ16 NC#163/TEST
38 DQ15 NC#120 120 45 DQ17
M_B_DQ16 43 163 M_A_DQ18 55
M_B_DQ17 DQ16 NC#163/TEST M_A_DQ19 DQ18
45 DQ17 57 DQ19 VDD 81
M_B_DQ18 55 M_A_DQ20 44 82
M_B_DQ19 DQ18 M_A_DQ21 DQ20 VDD
57 DQ19 VDD 81 46 DQ21 VDD 87
M_B_DQ20 44 82 M_A_DQ22 56 88
M_B_DQ21 DQ20 VDD M_A_DQ23 DQ22 VDD
46 DQ21 VDD 87 58 DQ23 VDD 95
M_B_DQ22 56 88 M_A_DQ24 61 96
M_B_DQ23 DQ22 VDD M_A_DQ25 DQ24 VDD
3 58 DQ23 VDD 95 63 DQ25 VDD 103 3
M_B_DQ24 61 96 M_A_DQ26 73 104
M_B_DQ25 DQ24 VDD M_A_DQ27 DQ26 VDD
63 DQ25 VDD 103 75 DQ27 VDD 111
M_B_DQ26 73 104 M_A_DQ28 62 112
M_B_DQ27 DQ26 VDD M_A_DQ29 DQ28 VDD
75 DQ27 VDD 111 64 DQ29 VDD 117
M_B_DQ28 62 112 M_A_DQ30 74 118
DQ28 VDD DQ30 VDD 1D8V_S3
M_B_DQ29 64 117 M_A_DQ31 76
M_B_DQ30 DQ29 VDD M_A_DQ32 DQ31
74 DQ30 VDD 118 1D8V_S3 123 DQ32 VSS 3
M_B_DQ31 76 M_A_DQ33 125 8
M_B_DQ32 DQ31 M_A_DQ34 DQ33 VSS
123 DQ32 VSS 3 135 DQ34 VSS 9
M_B_DQ33 125 8 M_A_DQ35 137 12
M_B_DQ34 DQ33 VSS M_A_DQ36 DQ35 VSS
135 DQ34 VSS 9 124 DQ36 VSS 15
M_B_DQ35 137 12 M_A_DQ37 126 18
M_B_DQ36 DQ35 VSS M_A_DQ38 DQ37 VSS
124 DQ36 VSS 15 134 DQ38 VSS 21
M_B_DQ37 126 18 M_A_DQ39 136 24
M_B_DQ38 DQ37 VSS M_A_DQ40 DQ39 VSS
134 DQ38 VSS 21 141 DQ40 VSS 27
M_B_DQ39 136 24 M_A_DQ41 143 28
M_B_DQ40 DQ39 VSS M_A_DQ42 DQ41 VSS
141 DQ40 VSS 27 151 DQ42 VSS 33
M_B_DQ41 143 28 M_A_DQ43 153 34
M_B_DQ42 DQ41 VSS M_A_DQ44 DQ43 VSS
151 DQ42 VSS 33 140 DQ44 VSS 39
M_B_DQ43 153 34 M_A_DQ45 142 40
M_B_DQ44 DQ43 VSS M_A_DQ46 DQ45 VSS
140 DQ44 VSS 39 152 DQ46 VSS 41
M_B_DQ45 142 40 M_A_DQ47 154 42
M_B_DQ46 DQ45 VSS M_A_DQ48 DQ47 VSS
152 DQ46 VSS 41 157 DQ48 VSS 47
M_B_DQ47 154 42 M_A_DQ49 159 48
M_B_DQ48 DQ47 VSS M_A_DQ50 DQ49 VSS
157 DQ48 VSS 47 173 DQ50 VSS 53
M_B_DQ49 159 48 M_A_DQ51 175 54
M_B_DQ50 DQ49 VSS M_A_DQ52 DQ51 VSS
173 DQ50 VSS 53 158 DQ52 VSS 59
M_B_DQ51 175 54 M_A_DQ53 160 60
M_B_DQ52 DQ51 VSS M_A_DQ54 DQ53 VSS
158 DQ52 VSS 59 174 DQ54 VSS 65
M_B_DQ53 160 60 M_A_DQ55 176 66
M_B_DQ54 DQ53 VSS M_A_DQ56 DQ55 VSS
174 DQ54 VSS 65 179 DQ56 VSS 71
M_B_DQ55 176 66 M_A_DQ57 181 72
M_B_DQ56 DQ55 VSS M_A_DQ58 DQ57 VSS
179 DQ56 VSS 71 189 DQ58 VSS 77
M_B_DQ57 181 72 M_A_DQ59 191 78
M_B_DQ58 DQ57 VSS M_A_DQ60 DQ59 VSS
2 189 DQ58 VSS 77 180 DQ60 VSS 121 2
M_B_DQ59 191 78 M_A_DQ61 182 122
M_B_DQ60 DQ59 VSS M_A_DQ62 DQ61 VSS
180 DQ60 VSS 121 192 DQ62 VSS 127
M_B_DQ61 182 122 M_A_DQ63 194 128
M_B_DQ62 DQ61 VSS DQ63 VSS
192 DQ62 VSS 127 VSS 132
M_B_DQ63 194 128 M_A_DQS#0 11 133
DQ63 VSS M_A_DQS#1 /DQS0 VSS
VSS 132 8 M_A_DQS[7..0] 29 /DQS1 VSS 138
M_B_DQS#0 11 133 M_A_DQS#2 49 139
M_B_DQS#1 DQS0# VSS M_A_DQS#3 /DQS2 VSS
8 M_B_DQS#[7..0] 29 DQS1# VSS 138 68 /DQS3 VSS 144
M_B_DQS#2 49 139 M_A_DQS#4 129 145
M_B_DQS#3 DQS2# VSS M_A_DQS#5 /DQS4 VSS
68 DQS3# VSS 144 146 /DQS5 VSS 149
M_B_DQS#4 129 145 M_A_DQS#6 167 150
M_B_DQS#5 DQS4# VSS M_A_DQS#7 /DQS6 VSS
146 DQS5# VSS 149 186 /DQS7 VSS 155
M_B_DQS#6 167 150 156
M_B_DQS#7 DQS6# VSS M_A_DQS0 VSS
186 DQS7# VSS 155 13 DQS0 VSS 161
156 M_A_DQS1 31 162
VSS 8 M_A_DQS#[7..0] DQS1 VSS
M_B_DQS0 13 161 M_A_DQS2 51 165
M_B_DQS1 DQS0 VSS M_A_DQS3 DQS2 VSS
8 M_B_DQS[7..0] 31 DQS1 VSS 162 70 DQS3 VSS 168
M_B_DQS2 51 165 M_A_DQS4 131 171
M_B_DQS3 DQS2 VSS M_A_DQS5 DQS4 VSS
70 DQS3 VSS 168 148 DQS5 VSS 172
M_B_DQS4 131 171 M_A_DQS6 169 177
M_B_DQS5 DQS4 VSS M_A_DQS7 DQS6 VSS
148 DQS5 VSS 172 188 DQS7 VSS 178
M_B_DQS6 169 177 183
M_B_DQS7 DQS6 VSS VSS
188 DQS7 VSS 178 7,12 M_ODT0 114 ODT0 VSS 184
VSS 183 7,12 M_ODT1 119 ODT1 VSS 187
7,12 M_ODT2 114 OTD0 VSS 184 VSS 190
7,12 M_ODT3 119 OTD1 VSS 187 DDR_VREF_S3 1 VREF VSS 193
VSS 190 2 VSS VSS 196
1

DDR_VREF_S3 1 VREF VSS 193


2 196 C321 202 201
VSS VSS GND GND
1

SC4D7U6D3V3KX-GP
2

C380 202 201 BC1 DDR2-200P-2-GP


SC4D7U6D3V3KX-GP GND GND
62.10017.691
2

BC2 MH1 MH2 SCD1U16V2ZY-2GP


MH1 MH2

om
1 SCD1U16V2ZY-2GP High 5.2mm 1

l.c
DDR2-200P-23-GP
62.10017.A71

ai
tm
High 9.2mm

ho
Wistron Corporation

f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
Taipei Hsien 221, Taiwan, R.O.C.

xa
he
Title

DDR2 Socket
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 11 of 57
A B C D E
A B C D E

PARALLEL TERMINATION Decoupling Capacitor


Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0
Put decap near power(0.9V)
RN30 DDR_VREF_S0
8 1 M_CKE2 7,11
and pull-up resistor
4 7 2 M_B_BS#2 8,11 4
6 3 M_B_A12
5 4 M_B_A9

1
C356 C397 C324 C379 C323 C325 C352 C326 C378 C392 C322

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-2-GP

2
1 2 M_ODT1 7,11
1 R235 2 56R2J-4-GP M_ODT3 7,11
1 R249 2 56R2J-4-GP M_A_A9
1 R234 2 56R2J-4-GP M_B_A8
R248 56R2J-4-GP

RN31
8 1 M_B_A5 M_A_A[13..0]
M_A_A[13..0] 8,11
7 2 M_B_A3
6 3 M_B_A1 M_B_A[13..0]
M_B_A[13..0] 8,11
5 4 M_B_A10

1
C393 C394 C396 C395 C351 C376 C375 C377 C353 C355 C354

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-2-GP
RN35

2
8 1 M_B_A13
7 2 M_ODT2 7,11
6 3 M_CS2# 7,11
5 4 M_B_RAS# 8,11
SRN56J-2-GP

RN34
8 1 M_B_BS#1 8,11
3 M_B_A0 3
7
6
2
3 M_B_A2 1D8V_S3 Place these Caps near DM1
5 4 M_B_A4

SRN56J-2-GP

1
C730 C731 C732 C733 C734

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
RN33
8 1 M_B_A6

2
7 2 M_B_A7
6 3 M_B_A11
5 4 M_CKE3 7,11
SRN56J-2-GP

RN32
8 1 M_B_BS#0 8,11
7 2 M_B_WE# 8,11
6 3 M_CS3# 7,11
5 4 M_B_CAS# 8,11

1
C385 C386 C387 C388

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-2-GP

2
RN28
8 1 M_A_A13
7 2 M_ODT0 7,11
6 3 M_CS0# 7,11
5 4 M_A_RAS# 8,11
SRN56J-2-GP
2 2

RN27
8 1 M_A_BS#1 8,11
7 2 M_A_A0
M_A_A2
6
5
3
4 M_A_A4 1D8V_S3 Place these Caps near DM2
SRN56J-2-GP

1
RN23 C768 C771 C769 C770 C767

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP
8 1 M_A_BS#0 8,11
7 2 M_A_WE# 8,11
2

2
6 3 M_A_CAS# 8,11
5 4 M_CS1# 7,11
SRN56J-2-GP

RN21
8 1 M_CKE0 7,11
7 2 M_A_BS#2 8,11
6 3 M_A_A12
1

5 4 M_A_A8 C337
1

1
SCD1U16V2ZY-2GP

C342 C338 C343


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SRN56J-2-GP
2

2
RN26
8 1 M_A_A6
7 2 M_A_A7
1 6 3 M_A_A11 1
5 4 M_CKE1 7,11
SRN56J-2-GP
Wistron Corporation
RN22 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
8 1 M_A_A5 Taipei Hsien 221, Taiwan, R.O.C.
7 2 M_A_A3
6 3 M_A_A1 Title
M_A_A10
5 4
DDR2 Termination Resistor
SRN56J-2-GP Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 12 of 57
A B C D E
LCDVDD
LED D19 DY
BAV99PT-GP-U
2
5V_S0

26,30 WLAN_LED#
WLAN_LED#
R290 120R2F-GP
1 2 K
LED5 LED-YO-3-GP-U
A
R289 330R2J-3-GP LED6 LED-B-77-GP-U
3D3V_S0

Layout 40 mil 3D3V_S0 WLAN_LED# 3 BLT_LED#_1 1 2 K A 5V_S0


U18 31 BLT_LED#_1
1
R320 UMA 1 6 R286 120R2F-GP LED4 LED-OG-17-GP
1KR2J-1-GP OUT IN CHARGE_LED# Orange
2 GND GND 5 31 CHARGE_LED# 1 2 3
7 GMCH_LCDVDD_ON 1 2 LCDVDD_ON_1 3 4 D20 DY
ON/OFF# IN BAV99PT-GP-U R287 120R2F-GP 1 5V_S5

1
2 DC_BATFULL# 1 2 2
3D3V_S0 C468 C470 31 DC_BATFULL# Green
SC1U10V3ZY-6GP AAT4280IGU-1-T1GP SC1U10V3ZY-6GP BLT_LED#_1 3

2
C467

1
SCD1U16V2ZY-2GP 1
R315 G72 R291 120R2F-GP LED3 LED-OG-17-GP
10KR2J-3-GP STDBY_LED# 1 2 3 Orange
R318 G72 RN55 31 STDBY_LED#
UMA
0R2J-2-GP LCD_TXAOUT2+ 1 8 R288 120R2F-GP 1
2
LCD_TXAOUT2- GMCH_TXAOUT2+ 7 FRONT_PWRLED#
1 2 2 7 GMCH_TXAOUT2- 7 31 FRONT_PWRLED# 1 2 2
LCD_TXACLK+ 3 6 Green
D LCD_TXACLK- GMCH_TXACLK+ 7
4 5 GMCH_TXACLK- 7
3

SRN0J-7-GP

2
Q21 G72 RN51 G72
2N7002PT-U R317 DY 1 8
0R2J-2-GP LVDS_TXACLK- 48
51 NV_LCDVDD_ON# 1 2 7
G
LCD/INVERTER CONN 3
4
6
5
LVDS_TXACLK+
LVDS_TXAOUT2-
48
48
2

1
LVDS_TXAOUT2+ 48
S SRN0J-7-GP
RN54 UMA
LCD_TXAOUT0+ 1 8
LCD_TXAOUT0- GMCH_TXAOUT0+ 7 3D3V_S0
2 7 GMCH_TXAOUT0- 7
LCD_TXAOUT1+ 3 6
LCD_TXAOUT1- 4 5
GMCH_TXAOUT1+
GMCH_TXAOUT1-
7
7
LED BD CONN

4
3
SRN0J-7-GP RN61
C232
RN50 G72 SC1U16V3KX-2GP SRN10KJ-5-GP
1 8 LVDS_TXAOUT1- 48 1 2

1
2 7 LVDS_TXAOUT1+ 48
3 6 LEDBD1 5V_S0 R424

1
2
LVDS_TXAOUT0- 48 10KR2J-3-GP
4 5 LVDS_TXAOUT0+ 48 13 EC15
1
3D3V_S0 5V_S0 SRN0J-7-GP SCD1U16V2ZY-2GP 1 2

2
BRIGHTNESS BRIGHTNESS 31 RN56 UMA R417 220R2J-L2-GP 2 1 2 MEDIA_LED#
FPBACK FPBACK 31 LCD_TXBOUT0- 1 8 R420 220R2J-L2-GP 3 1 2
GMCH_TXBOUT0- 7 CAP_LED# 31

1
LCD_TXBOUT0+ 2 7 R421 220R2J-L2-GP 4 1 2
R652 D36 LCD_TXBOUT1- GMCH_TXBOUT0+ 7 R422 220R2J-L2-GP NUM_LED# 31
3 6 GMCH_TXBOUT1- 7 5 1 2 WLAN_LED# 26,30
2

LCD1 C7 C6 0R2J-2-GP 1N4148W-7-F-GP LCD_TXBOUT1+ 4 5 R423 220R2J-L2-GP 6 1 2


GMCH_TXBOUT1+ 7 BLT_LED#_2 31
47 45 DY 7 WIRELESS_BTN# 31
MH1 SC100P50V2JN-U SC100P50V2JN-U SRN0J-7-GP 8 BLT_BTN# 31
1

2
1 RN52 G72 9
1 8 LVDS_TXBOUT1+ 48 10 INT_MIC 29
2 DCBATOUT U84 C846 2 7 11
LVDS_TXBOUT1- 48

1
1

1
1
1
1
1
48 3 SC4D7U10V5ZY-3GP 3 6 12 C604 DY
LVDS_TXBOUT0+ 48 SC1000P50V3JN-GP
4 1 OUT IN 5 1 2 4 5 LVDS_TXBOUT0- 48 14
5 2 C607 DY

2
2

2
2
2
2
2
GND
1

6 C462 C460 3 4 WEBCAM_PW_SW 31 SRN0J-7-GP SC1000P50V3JN-GP


USB_6- SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP NC#3 ON/OFF# RN57 UMA ACES-CON12-GP C616 DY
7
8 USB_6+ LCD_TXBOUT2- 1 8 20.K0174.012 SC1000P50V3JN-GP
2

AAT4250IGV-T1-GP LCD_TXBOUT2+ GMCH_TXBOUT2- 7 C613 DY


49 9 2 7 GMCH_TXBOUT2+ 7
10 BRIGHTNESS LCD_TXBCLK- 3 6 SC1000P50V3JN-GP
FPBACK LCD_TXBCLK+ GMCH_TXBCLK- 7 C609 DY
11 4 5 GMCH_TXBCLK+ 7
12 SC1000P50V3JN-GP
13 SRN0J-7-GP 3D3V_S0 C606 DY
LCDVDD
14 RN53 G72 SC1000P50V3JN-GP CAP_LED# /
1

50 15 C469 DY C465 C5 DY 1 8 C601 DY


16 EDID_CLK 2 7
LVDS_TXBCLK+ 48 SC1000P50V3JN-GP NUM_LED# /
LVDS_TXBCLK- 48

1
2
17 EDID_DAT SC10U10V5ZY-1GP SCD1U25V3ZY-3GP SCD1U25V3ZY-3GP 3 6 IDE_LED# DY
2

LVDS_TXBOUT2+ 48
18 4 5
19
LVDS_TXBOUT2- 48 2D5V_S0 1000p near
SRN0J-7-GP SRN2K2J-1-GP
20 3D3V_S0 RN46
LEDBD1 BY EMI
21
51 22 LCD_TXACLK- Q24 UMA REQUEST

4
3
23 LCD_TXACLK+ FDN337N-1-GP
24 R326 0R0603-PAD
25 LCD_TXAOUT2- S D 1 2 EDID_CLK
LCD_TXAOUT2+ 7 CLK_DDC_EDID R325 0R3-0-U-GP
26 G72
27 51 G72_LCD_EDID_CLK 1 2
28 LCD_TXAOUT1- EVEN CHANNEL

G
29 LCD_TXAOUT1+ Q25 UMA
52 30 FDN337N-1-GP R327 0R0603-PAD
31 LCD_TXAOUT0- S D 1 2 EDID_DAT
LCD_TXAOUT0+ 7 DAT_DDC_EDID
32
33 R328 0R3-0-U-GP G72

1
34 LCD_TXBOUT0- 1 2 EC27DY EC26 DY
LCD_TXBOUT0+ 51 G72_LCD_EDID_DAT SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
35
53 36

2
37 LCD_TXBOUT1-
38 LCD_TXBOUT1+ ODD CHANNEL
39
40 LCD_TXBOUT2-
41 LCD_TXBOUT2+
54 42 D30
43 LCD_TXBCLK- 6 1 IDE_LED#
44 LCD_TXBCLK+ IDE_LED# 20
RN88 R425 0R0402-PAD

om
MH2
55 46 USB_6- 3 2 USBPN6 16 MEDIA_LED# 5 2 SATA_LED# IDE_LED# 1 2 ODD_LED#

l.c
USB_6+ SATA_LED# 15
4 1 USBPP6 16
Wistron Corporation

ai
tm
JAE-CON44-3-GP SRN0J-6-GP 4 3 ODD_LED# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
ODD_LED# 20

ho
20.F0690.044 Taipei Hsien 221, Taiwan, R.O.C.
RB731U-1GP-U

f@
Title

in
LCD CONN & LED

xa
he
Size Document Number Rev

MYALL2 MP
Date: Tuesday, April 11, 2006 Sheet 13 of 57
A B C D E

Layout Note:
Place these resistors
CRT I/F & CONNECTOR
close to the CRT-out
connector
Ferrite bead impedance: 10 ohm@100MHz
L22

47 CRT_RED 1 G72 2 RED 1 2 CRT_R


R375 0R2J-2-GP FCB1608CF-GP
7 GMCH_RED 1 UMA 2
R376 0R2J-2-GP CRT1
L23
17
47 CRT_GREEN 1 G72 2 GREEN 1 2 CRT_G MH1
4 R373 0R2J-2-GP FCB1608CF-GP 6 4
7 GMCH_GREEN 1 UMA 2 11
R374 0R2J-2-GP CRT_R 1
L24
7
47 CRT_BLUE 1 G72 2 BLUE 1 2 CRT_B
R371 0R2J-2-GP FCB1608CF-GP DAT_DDC1_5

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
12

1
1 UMA 2 C457 C452 C453 2 CRT_G
7 GMCH_BLUE

1
R372 0R2J-2-GP R294 R295 R296 C446 C447 C448 C441 8

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP 13 CRT_HSYNC1

2
SC100P50V2JN-3GP CRT_B 3

1
DY DY DY 9 5V_CRT_S0 C438

2
CRT_VSYNC1 14
4 C440 SC18P50V2JN-1-GP

2
1
C439 10
15 CLK_DDC1_5 SCD01U16V2KX-3GP
SC18P50V2JN-1-GP 5
Layout Note:

1
MH2 C442
5V_S0
* Must be a ground return path between this ground and the ground on 16
SC100P50V2JN-3GP

2
the VGA connector.

1
VIDEO-15-21-U3-GP
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT R646
10KR2J-3-GP
20.20334.015
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
R648

2
0R2J-GP
1 2
31 CRT_DEC
5V_S0
3 3
Hsync & Vsync level shift

2
R647 DY
5V_S0 0R2J-GP D24
CH751H-40PT

2
2D5V_S0 3D3V_S0 2D5V_S0 3D3V_S0

1
1
5V_CRT_S0 5V_CRT_S0
C459

1
2 SCD1U16V2ZY-2GP

1
2

1
2

3
4
R306 UMA R298 R299
0R2J-2-GP RN43 UMA SRN2K2J-1-GP 0R2J-2-GP 0R2J-2-GP RN41
SRN2K2J-1-GP RN44 UMA G72 SRN10KJ-5-GP
14

7 GMCH_HSYNC 1 2
1

R308 G72 G72

2
0R2J-2-GP
1 2 HSYNC_4 2 3 CRT_HSYNC1

4
3

4
3

2
1
47 HSYNC R313 UMA

G
0R2J-2-GP U16A
TSAHCT125PW-GP
14

1 2
7

7 GMCH_VSYNC
4

R311 G72 R305 1 2 0R2J-2-GP UMA S D DAT_DDC1_5


7 GMCH_DDCDATA
0R2J-2-GP
47 VSYNC 1 2VSYNC_4 5 6 CRT_VSYNC1
47 G72_CRT_EDID_DAT
R297 1 2 0R2J-2-GP G72
U16B Q19

G
TSAHCT125PW-GP R303 1 2 0R2J-2-GP G72 FDN337N-1-GP
47 G72_CRT_EDID_CLK
7

R304 1 2 0R2J-2-GP UMA S D CLK_DDC1_5


7 GMCH_DDCCLK

2 2
DDC_CLK & DATA level shift Q20
FDN337N-1-GP

C449 SC33P50V3JN-GP TVOUT


TV CONN R379 G72
0R2J-2-GP
1 2
L19 TVOUT TVOUT1
1 2 DACB 1 2 LUMA_1 4 2 5V_S0 5V_S0
47 G72_TV_LUMA IND-1D2UH-5-GP LUMA NC#2 D1 TVOUT
6 CRMA
1

R380 UMA C454 C443 7 1 BAV99PT-GP-U


0R2J-2-GP R300 COMP GND D21
TVOUT TVOUT GND 3 2 2
1 2 150R2F-1-GP SC150P-GP SC270P50V2JN-2GP 8
2

7 TV_DACB GND DACB CRT_R 3


TVOUT 5 NC#5 GND 9 3
2

MINDIN7-19-GP-U2 1 1
C451 SC33P50V3JN-GP TVOUT 22.10021.H61 TVOUT
1 2 BAV99PT-GP-U
R382 G72 D3 TVOUT
0R2J-2-GP L21 TVOUT BAV99PT-GP-U
1 2 DACC 1 2 CRMA_1 2 D22 2
47 G72_TV_CRMA IND-1D2UH-5-GP
1

R383 UMA C456 C445 DACC 3 CRT_G 3


0R2J-2-GP R302 TVOUT TVOUT
1 2 150R2F-1-GP SC150P-GP SC270P50V2JN-2GP 1 1
2

7 TV_DACC
TVOUT
D2 TVOUT BAV99PT-GP-U
2

1
BAV99PT-GP-U 1
C450 SC33P50V3JN-GP TVOUT 2 D23 2
1 2
R377 G72 DACA CRT_B 3
0R2J-2-GP L20 TVOUT
3
Wistron Corporation
1 2 DACA 1 2 COMP_1 1 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
47 G72_TV_COMP IND-1D2UH-5-GP Taipei Hsien 221, Taiwan, R.O.C.
1

R378 UMA C455 C444 BAV99PT-GP-U


0R2J-2-GP R301 TVOUT TVOUT Title
1 2 150R2F-1-GP SC150P-GP SC270P50V2JN-2GP
CRT/TV Connector
2

7 TV_DACA
TVOUT
Size Document Number Rev
2

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 14 of 57
A B C D E
A B C D E

C722 SC4D7P50V2CN-1GP
1 2
4 4
1D05V_S0

1
3

4
R499 DY
X5 56R2J-4-GP

1
X-32D768KHZ-41GP
3D3V_AUX_S5 RTC_AUX_S5 82.30001.731 R520

2
D32 10MR2J-L-GP H_DPSLP#
2 1

1
1

2
C332
CH751H-40PT SC1U10V3ZY-6GP

2
C737 SC4D7P50V2CN-1GP LPC_LAD[3..0]
RTC circuitry 1 2
U65A LPC_LAD[3..0] 31,32,34
RCT_X1 AB1 AA6 LPC_LAD0
RTC1 RCT_X2AB2 RTXC1 LAD0 LPC_LAD1 Open R179 for Dothan A step
RTCX2 LAD1 AB5
4 D15 AC4 LPC_LAD2 Shunt for Dothan B step

LPC
RTC
BAT 1 LAD2 & all Yonah
1 2BAT_D2 1 R525 1 2 20KR2J-L2-GP RTC_RST# AA3 RTCRST# LAD3 Y6 LPC_LAD3
1KR2J-1-GP R233
2 R232 1 2 INTRUDER# Y5 AC3 LPC_LDRQ0# 32 10KR2J-3-GP
CH751H-40PT R526 1MR2J-1-GP INTVRMEN INTRUDER# LDRQ0#
3 W4 INTVRMEN LDRQ1#/GPIO23 AA5 1 2 3D3V_S0
2

1
5
C709 DY C739 W1 AB3 LPC_LFRAME# 31,32,34
ACES-CON3-GP SC1U10V3ZY-6GP 19 INTRUDER# EE_CS LFRAME# 1D05V_S0
SCD1U16V2ZY-2GP Y1
1

2
20.F0714.003 EE_SHCLK
Y2 EE_DOUT A20GATE AE22 KA20GATE_1 31
W3 AH28 H_A20M# 4 R502 DY
EE_DIN A20M#

1
2nd source: 20.D0198.103 0R2J-2-GP
3 V3 AG27 H_CPUSLP#_2 1 2 H_CPUSLP# 4,6 R500 3
LAN_CLK CPUSLP# 56R2J-4-GP
LAN_RSTYNC U3 AF24 H_DPRSLP#

LAN
CPU
LAN_RSTSYNC TP1/DPRSTP# H_DPRSLP# 4,37
AH25 H_DPSLP# 4

2
TP2/DPSLP#
U5 LAN_RXD0
V4 LAN_RXD1 FERR# AG26 H_FERR# 4
T5 LAN_RXD2
R527 AG24 H_PWRGD 4,19
22R2J-2-GP GPIO49/CPUPWRGD R498 DY 1D05V_S0
U7 LAN_TXD0
21 ACZ_BTCLK_MDC 2 1 V6 200R2F-L-GP
LAN_TXD1 H_PWRGD
V7 LAN_TXD2 IGNNE# AG22 H_IGNNE# 4 1 2
INIT3_3V# AG21 FWH_INIT# 34
28 ACZ_BITCLK 2 R528 1 ACZ_BIT_CLK U1 AF22 H_INIT# 4
ACZ_BIT_CLK INIT#

AC-97/AZALIA
21,28 ACZ_SYNC 22R2J-2-GP
1 2 ACZ_SYNC_R R6 AF25 H_INTR 4
LAN_RSTYNC R240 39R2J-L-GP ACZ_SYNC INTR 1D05V_S0
SATA2RXN 21,28 ACZ_RST# 1 2 ACZ_RST#_R R5 AG23 KBRCIN#_1 31
SATA2RXP R242 39R2J-L-GP ACZ_RST# RCIN#

1
28 ACZ_SDATAIN0 T2 ACZ_SDIN0 NMI AH24 H_NMI 4
1

21 ACZ_SDATAIN1 T3 AF23 H_SMI# 4 R501


R529 DY R495 R496 ACZ_SDIN1 SMI#
T1 ACZ_SDIN2 56R2J-4-GP
0R2J-2-GP 0R0402-PAD 0R0402-PAD TPAD30 TP83 AH22 H_STPCLK# 4
R241 ACZ_SDATAOUT_R STPCLK#
21,28 ACZ_SDATAOUT 1 2 T4

2
39R2J-L-GP ACZ_SDOUT H_THERMTRIP_R
AF26
2

THERMTRIP#
13 SATA_LED# AF18 SATALED#
AF3 AB15 Layout Note: R568 needs to placed
20 SATA_RXN0 SATA0RXN DD0 IDE_PDD0 20
AE3 AE14 within 2" of ICH7, R568 must be placed
20 SATA_RXP0 SATA0RXP DD1 IDE_PDD1 20
AG2 AG13 within 2" of R169 w/o stub.
20 SATA_TXN0 SATA0TXN DD2 IDE_PDD2 20
20 SATA_TXP0 AH2 SATA0TXP DD3 AF13 IDE_PDD3 20
2 2
DD4 AD14 IDE_PDD4 20
SATA2RXN AF7 AC13 IDE_PDD5 20
SATA2RXP AE7 SATA2RXN DD5
SATA2RXP DD6 AD12 IDE_PDD6 20
AG6 SATA2TXN DD7 AC12 IDE_PDD7 20
AH6 SATA2TXP DD8 AE12 IDE_PDD8 20
DD9 AF12 IDE_PDD9 20
AF1 AB13

SATA
3 CLK_PCIE_SATA# SATA_CLKN DD10 IDE_PDD10 20
3 CLK_PCIE_SATA AE1 SATA_CLKP DD11 AC14 IDE_PDD11 20
RTC_AUX_S5 Change to 24.9 1% ohm AF14
DD12 IDE_PDD12 20
when use SATA HD SATARBIAS AH10 AH13
SATARBIASN DD13 IDE_PDD13 20
1 R497
2 AG10 AH14 IDE_PDD14 20
SATARBIASP DD14
1

24D9R2F-L-GP AC15
DD15 IDE_PDD15 20
R238
300KR2J-GP
P.H. for internal VCCSUS1_05
20 IDE_PDIOR# AF15
AH15
DIOR# IDE DA0 AH17
AE17
IDE_PDA0 20
20 IDE_PDIOW# DIOW# DA1 IDE_PDA1 20
20 IDE_PDDACK# AF16 AF17 IDE_PDA2 20
2

DDACK# DA2
20 INT_IRQ14 AH16 IDEIRQ
INTVRMEN 20 IDE_PDIORDY AG16 AE16 IDE_PDCS1# 20
Place within 500 mils IORDY DCS1#
20 IDE_PDDREQ AE15 DDREQ DCS3# AD16 IDE_PDCS3# 20
of ICH7ball
1

ICH7-M-GP KI.80101.017
R239 DY
0R2J-2-GP INTVRMEN
2

Enable 1

Disable 0

om
1 1

l.c
ai
Wistron Corporation

tm
Placement Note:

ho
Diatance between the ICH-7 M and cap on the "P" signal 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
should be identical distance between the ICH-7 M and cap Taipei Hsien 221, Taiwan, R.O.C.

f@
on the "N" signal for same pair.

in
Title

xa
ICH7-M (1 of 4)

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 15 of 57
A B C D E
A B C D E

U65C RN84
24,25,30 PCI_AD[31..0]
U65B C22 AF19 SATA0_R0 SATA0_R2 1 8
18,26 SMB_CLK SMBCLK GPIO21/SATA0GP
PCI_AD0 E18 D7 PCI_REQ#0 B22 AH18 SATA0_R1 SATA0_R0 2 7

SMB
AD0 REQ0# PCI_REQ#0 25 18,26 SMB_DATA SMBDATA GPIO19/SATA1GP 3D3V_S0

SATA
PCI_AD1 PCI_GNT#0 SMB_LINK_ALERT# A26 SATA0_R2 SATA0_R3 3

GPIO
PCI_AD2
C18
A16
AD1 PCI GNT0# E7
C16 PCI_REQ#1
PCI_GNT#0 25
SMLINK0 B25
LINKALERT# GPIO36/SATA2GP AH19
AE19 SATA0_R3 SATA0_R1 4
6
5
AD2 REQ1# PCI_REQ#1 30 SMLINK0 GPIO37/SATA3GP
PCI_AD3 F18 D16 PCI_GNT#1 PCI_GNT#1 30 SMLINK1 A25 SRN10KJ-4-GP
PCI_AD4 AD3 GNT1# PCI_REQ#2 SMLINK1
E16 AD4 REQ2# C17 CLK14 AC1 CLK_ICH14 3

Clocks
PCI_AD5 A18 D17 PCI_GNT#2 TP58 TPAD30 PM_RI# A28 B2 CLK48_ICH 3
PCI_AD6 AD5 GNT2# PCI_REQ#3 RI# CLK48
E17 AD6 REQ3# E13
PCI_AD7 A17 F13 PCI_GNT#3 TP60 TPAD30 28 ACZ_SPKR A19 C20 PM_SUS_CLK 18
PCI_AD8 AD7 GNT3# PCI_REQ#4 SPKR SUSCLK
A15 AD8 REQ4#/GPIO22 A13 31,32 PM_SUS_STAT# A27 SUS_STAT#
4 PCI_AD9 C14 A14 PCI_GNT#4 TP90 TPAD30 DBRESET# A22 B24 PM_SLP_S3# 18,31,35,40,41,45,56 4
PCI_AD10 AD9 GNT4#/GPIO48 PCI_REQ#5 SYS_RST# SLP_S3#
E14 AD10 GPIO1/REQ5# C8 SLP_S4# D23 PM_SLP_S4# 31,41
PCI_AD11 D14 D8 PCI_GNT#5 TP59 TPAD30 7 PM_BMBUSY# AB18 F22
PCI_AD12 AD11 GPIO17/GNT5# GPIO0/BM_BUSY# SLP_S5# TP57 TPAD30
B12 AD12
PCI_AD13 C13 B15 PCI_C/BE#0 24,30 SMB_ALERT# B23 AA4 PWROK 7,19 R223
PCI_AD14 AD13 C/BE0# GPIO11/SMBALERT# PWROK 100R2J-2-GP
G15 C12 PCI_C/BE#1 24,30

Power MGT
PCI_AD15 AD14 C/BE1# PM_DPRSLPVR_R
G13 AD15 C/BE2# D12 PCI_C/BE#2 24,30 3 PM_STPPCI# AC20 GPIO18/STPPCI# GPIO16/DPRSLPVR AC22 2 1 PM_DPRSLPVR 37
PCI_AD16 E12 C15 PCI_C/BE#3 24,30 3 PM_STPCPU# AF21 1 2 R224 DY

GPIO
PCI_AD17 AD16 C/BE3# GPIO20/STPCPU# PM_BATLOW#_R 100KR2J-1-GP
C11 C21

SYS
PCI_AD18 AD17 TP0/BATLOW#
D11 A7 PCI_IRDY# 25,30 A21 D33
PCI_AD19 AD18 IRDY# GPIO26 PWRBTN#_ICH BAS16-1-GP
A11 AD19 PAR E10 PCI_PAR 24,30 PWRBTN# C23 1 PM_PWRBTN# 31
PCI_AD20 A10 B18 1 R544
2 PCIRST1# 25,27,30 B21 R547
PCI_AD21 AD20 PCIRST# 47R2J-2-GP PSW_CLR# GPIO27 10KR2J-3-GP
F11 AD21 DEVSEL# A12 PCI_DEVSEL# 25,30 34 PSW_CLR# E23 GPIO28 3
PCI_AD22 F10 C9 PCI_PERR# 25,30 C19 1 2
PCI_AD23 AD22 PERR# LAN_RST#
E9 AD23 PLOCK# E11 PCI_LOCK# 25,30,31,32 PM_CLKRUN# AG18 GPIO32/CLKRUN# 2
PCI_AD24 D9 B10 PCI_SERR# 25,30 Y4 RSMRST#_SB
PCI_AD25 AD24 SERR# RSMRST#
B9 AD25 STOP# F15 PCI_STOP# 25,30 AC19 GPIO33/AZ_DOCK_EN#
PCI_AD26 A8 F14 PCI_TRDY# 25,30 U2 E20 ECSWI# 31
PCI_AD27 AD26 TRDY# GPIO34/AZ_DOCK_RST# GPIO9
A6 AD27 FRAME# F16 PCI_FRAME# 25,30 GPIO10 A20
PCI_AD28 C7 ICH7_WAKE# F20 F19 ICH7_GPI12
PCI_AD29 AD28 WAKE# GPIO12
B6 AD29 PLTRST# C26 PLT_RST1# 7,18,22,26,31,32,34,46,51 25,30,31,32 INT_SERIRQ AH21 SERIRQ GPIO13 E19
PCI_AD30 E6 A9 CLK_ICHPCI 3 19 THRM# AF20 R4
PCI_AD31 AD30 PCICLK THRM# GPIO14
D6 AD31 PME# B19 ICH_PME#_1
1 2 ICH_PME# 22 GPIO15 E22
R545 0R0402-PAD 7,37 VGATE_PWRGD AD22 R3
VRMPWRGD GPIO24
INT_PIRQA# A3
Interrupt I/F G8 INT_PIRQE# AC21
GPIO25 D20
AD21
PIRQA# GPIO2/PIRQE# INT_PIRQE# 30 31 KBC_SLP_WAKE GPIO6 GPIO35
INT_PIRQB# INT_PIRQF#
25 INT_PIRQB#
INT_PIRQC#
B4
C5
PIRQB# GPIO3/PIRQF# F7
F8 INT_PIRQG#
INT_PIRQF# 25 31 ECSCI#_1 AC18
E21
GPIO7 GPIO GPIO38 AD20
AE20
PIRQC# GPIO4/PIRQG# INT_PIRQG# 25 31 ECSMI# GPIO8 GPIO39
INT_PIRQD# B5 G7 INT_PIRQH#
3 PIRQD# GPIO5/PIRQH# ICH7-M-GP KI.80101.017 3

AE5
MISC AE9 U65D
RSVD[1] RSVD[6]
AD5 RSVD[2] RSVD[7] AG8 22 PCIE_RXN1 F26 PERn1 DMI0RXN V26 DMI_RXN0 7
AG4 RSVD[3] RSVD[8] AH8 22 PCIE_RXP1 F25 PERp1 DMI0RXP V25 DMI_RXP0 7

Direct Media Interface


AH4 F21 C758 SCD1U10V2KX-5GP 2 1 E28 U28 Layout Note:
RSVD[4] RSVD[9] 22 PCIE_TXN1 PETn1 DMI0TXN DMI_TXN0 7
AD9 AH20 C759 SCD1U10V2KX-5GP 2 1 E27 U27 PCIE AC coupling caps
RSVD[5] MCH_SYNC# MCH_ICH_SYNC# 7 22 PCIE_TXP1 PETp1 DMI0TXP DMI_TXP0 7
need to be within 250 mils of the driver.
ICH7-M-GP KI.80101.017 H26 Y26 DMI_RXN1 7
PERn2 DMI1RXN
H25 PERp2 DMI1RXP Y25 DMI_RXP1 7
G28 PETn2 DMI1TXN W28 DMI_TXN1 7
G27 PETp2 DMI1TXP W27 DMI_TXP1 7

PCI-Express
RP2 26 PCIE_RXN3 K26 AB26 DMI_RXN2 7
INT_PIRQF# PERn3 DMI2RXN
1 10 3D3V_S0 26 PCIE_RXP3 K25 PERp3 DMI2RXP AB25 DMI_RXP2 7
INT_PIRQC# 2 9 PCI_REQ#0 26 PCIE_TXN3 C750 SCD1U10V2KX-5GP 2 1 J28 AA28 DMI_TXN2 7
PCI_PERR# INT_PIRQH# C755 SCD1U10V2KX-5GP 2 PETn3 DMI2TXN
3 8 RP4 3D3V_S5 26 PCIE_TXP3 1 J27 AA27 DMI_TXP2 7
INT_PIRQG# PCI_REQ#5 ICH7_GPI12 PETp3 DMI2TXP
4 7 1 10
5 6 PCI_IRDY# PM_BATLOW#_R 2 9 ICH7_WAKE# M26 AD25 DMI_RXN3 7
3D3V_S0 PERn4 DMI3RXN 1D5V_S0
DBRESET# 3 8 PSW_CLR# M25 AD24 DMI_RXP3 7
SMB_LINK_ALERT# 4 SMB_ALERT# PERp4 DMI3RXP
SRN8K2J-2-GP 7 L28 AC28 DMI_TXN3 7
PM_RI# PETn4 DMI3TXN Place within 500 mils of ICH
RP3 3D3V_S5 5 6 L27 AC27 DMI_TXP3 7
PETp4 DMI3TXP

1
MCH_ICH_SYNC# 1 10 3D3V_S0
PCI_REQ#4 2 9 PCI_STOP# SRN10KJ-L3-GP P26 AE28 CLK_PCIE_ICH# 3 R250
PCI_TRDY# PCI_REQ#1 PERn5 DMI_CLKN 24D9R2F-L-GP
3 8 RP1 3D3V_S5 P25 AE27 CLK_PCIE_ICH 3
INT_SERIRQ PCI_REQ#2 USB_OC#2 PERp5 DMI_CLKP
4 7 1 10 N28 PETn5
5 6 PCI_FRAME# USB_OC#6 2 9 USB_OC#4 N27 C25
3D3V_S0

2
USB_OC#7 USB_OC#0 PETp5 DMI_ZCOMP DMI_IRCOMP_R
3 8 DMI_IRCOMP D25
SRN8K2J-2-GP USB_OC#1 4 7 USB_OC#3 T25
2 USB_OC#5 PERn6 2
RP5 3D3V_S5 5 6 T24 F1 USBPN0 21
PCI_DEVSEL# PERp6 USBP0N
1 10 3D3V_S0 R28 PETn6 USBP0P F2 USBPP0 21
PCI_LOCK# 2 9 PCI_SERR# SRN10KJ-L3-GP R27 G4 USBPN1 26 USB
PCI_REQ#3 INT_PIRQD# PETp6 USBP1N
3 8 USBP1P G3 USBPP1 26
INT_PIRQE# 4 7 INT_PIRQB# R2 H1 USBPN2 21 Pair Device
INT_PIRQA# 3D3V_S5 SPI_CLK USBP2N
3D3V_S0 5 6 P6 SPI_CS# USBP2P H2 USBPP2 21
TPAD30 TP84 SPI_ARB P1 J4 0 USB2

SPI
SPI_ARB USBP3N USBPN3 21
SRN8K2J-2-GP J3 USBPP3 21
RN38 SRN100KJ-6-GP USBP3P
P5 SPI_MOSI USBP4N K1 1 MINIC1
ECSWI# 3 2 P2 K2

USB
ECSMI# SPI_MISO USBP4P
3D3V_S0
4 1 USBP5N L4 USBPN5 21 2 USB3
USB_OC#0 D3 L5 USBPP5 21
USB_OC#1 OC0# USBP5P
C4 OC1# USBP6N M1 USBPN6 13 3 USB4
PM_CLKRUN# 1 2 21 USB_OC#2 USB_OC#2 D5 M2 USBPP6 13
R222 8K2R2J-3-GP USB_OC#3 OC2# USBP6P
21 USB_OC#3 D4 OC3# USBP7N N4 USBPN7 21 4 NC
ACZ_SPKR 2 R546
1 RN86 USB_OC#4 E5 N3 USBPP7 21
1KR2J-1-GP SMLINK0 USB_OC#5 OC4# USBP7P
3 2 21 USB_OC#5 C3 OC5#/GPIO29 5 USB1
ECSCI#_1 1 R229
2 SMLINK1 4 1 USB_OC#6 A2 D2 USB_RBIAS_PN
10KR2J-3-GP USB_OC#7 OC6#/GPIO30 USBRBIAS#
B3 OC7#/GPIO31 USBRBIAS D1 6 CAMERA
R231 10KR2J-3-GP SRN10KJ-5-GP

1
PWROK 3D3V_S5 ICH7-M-GP KI.80101.017
2 1 7 BLUETOOTH
R542
22D6R2F-L1-GP
1

R227 DY D14

2
4K7R2J-2-GP BAT54PT-GP
1 RSMRST#_SB
Default:H
2

1 31 RSMRST#_KBC 3 1
GNT5# GNT4#
1

2
LPC H H R236
10KR2J-3-GP Wistron Corporation
PCI H L 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

SPI L H
Title

ICH7-M (2 of 4)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 16 of 57
A B C D E
A B C D E

Layout Note:
Place near pin AA19 1D05V_S0

U65F

1
G10 L11 C348 C339 C344 C346 C357 C340
V5REF[1] Vcc1_05[1]

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP
Vcc1_05[2] L12
4 V5REF_S0 AD17 L14 4

2
V5REF[2] Vcc1_05[3]
Vcc1_05[4] L16
1D5V_S0 V5REF_S5 F6 L17
R237 0R0603-PAD V5REF_Sus Vcc1_05[5]
Vcc1_05[6] L18
1 2 1D5V_ICH7 AA22 M11
Vcc1_5_B[1] Vcc1_05[7]
AA23 Vcc1_5_B[2] Vcc1_05[8] M18

1
C740 C335 C362 C347 C736 C365 C382 C341

CORE
AB22 Vcc1_5_B[3] Vcc1_05[9] P11

1
SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AB23 P18 C331 C330 C360
Vcc1_5_B[4] Vcc1_05[10]

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AC23 T11

2
Vcc1_5_B[5] Vcc1_05[11]

SCD1U10V2KX-4GP
AC24 T18

2
Vcc1_5_B[6] Vcc1_05[12]
AC25 Vcc1_5_B[7] Vcc1_05[13] U11 DY
AC26 Vcc1_5_B[8] Vcc1_05[14] U18
AD26 Vcc1_5_B[9] Vcc1_05[15] V11
AD27 Vcc1_5_B[10] Vcc1_05[16] V12
AD28 Vcc1_5_B[11] Vcc1_05[17] V14
*Within a given well, 5VREF needs to be up before the D26 Vcc1_5_B[12] Vcc1_05[18] V16
corresponding 3.3V rail D27 Vcc1_5_B[13] Vcc1_05[19] V17
D28 V18 3D3V_S5
Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
E24 Vcc1_5_B[15]
E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5
E26 Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] V1

1
3D3V_S0 5V_S0 F23 W2
Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] 3D3V_S0 C345 C333
F24 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] W7
G22 SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
Vcc1_5_B[20]
2

G23 U6 3D3V_S5
D16 R228 Vcc1_5_B[21] Vcc3_3/VccHDA
H22 Vcc1_5_B[22]
CH751H-40PT 100R2J-2-GP H23 R7
Vcc1_5_B[23] VccSus3_3/VccSusHDA 1D05V_S0
J22 Vcc1_5_B[24]
J23 AE23
1

3 V5REF_S0 Vcc1_5_B[25] V_CPU_IO[1] 3


K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
K23 AH26 3D3V_S0 C358 C314 C359

VCCA3GP
Vcc1_5_B[27] V_CPU_IO[3]
1

1
L22 Vcc1_5_B[28]

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U10V5ZY-3GP
C367 L23 AA7
Vcc1_5_B[29] Vcc3_3[3]

1
SCD1U16V2ZY-2GP M22 AB12 C327 C320
2

2
Vcc1_5_B[30] Vcc3_3[4]

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
M23 Vcc1_5_B[31] Vcc3_3[5] AB20
N22 AC16

2
Vcc1_5_B[32] Vcc3_3[6]
N23 Vcc1_5_B[33] Vcc3_3[7] AD13

IDE
Layout Note: 3D3V_S5 5V_S5 P22 AD18
Place near ICH7 Vcc1_5_B[34] Vcc3_3[8]
P23 Vcc1_5_B[35] Vcc3_3[9] AG12
R22 AG15 Layout Note:
Vcc1_5_B[36] Vcc3_3[10]
2

R23 AG19 PCI decoupling


D17 R244 Vcc1_5_B[37] Vcc3_3[11] 3D3V_S0
R24 Vcc1_5_B[38]
CH751H-40PT 100R2J-2-GP R25 A5 3D3V_S0
Vcc1_5_B[39] Vcc3_3[12]
R26 Vcc1_5_B[40] Vcc3_3[13] B13

1
T22 B16 C391 C389 C368
1

Vcc1_5_B[41] Vcc3_3[14]

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
V5REF_S5 T23 B7 C369
Vcc1_5_B[42] Vcc3_3[15]

SCD1U10V2KX-4GP
T26 C10 DY

2
Vcc1_5_B[43] Vcc3_3[16]
1

PCI
T27 Vcc1_5_B[44] Vcc3_3[17] D15
C372 3D3V_S0 T28 F9
SCD1U16V2ZY-2GP Vcc1_5_B[45] Vcc3_3[18]
U22 G11
2

Vcc1_5_B[46] Vcc3_3[19]
U23 Vcc1_5_B[47] Vcc3_3[20] G12
1

C390 V22 G16 RTC_AUX_S5 NO_STUFF


Vcc1_5_B[48] Vcc3_3[21]
SCD1U10V2KX-4GP

V23 Vcc1_5_B[49]
W22 W5 Layout Note:
2

1D5V_GPLL_ICH_S0 Vcc1_5_B[50] VccRTC Place near AB3


L41 W23 Vcc1_5_B[51]

1
1D5V_S0 Y22 P7 V3D3A_VCCPSUS R243 C334 Layout Note:
Vcc1_5_B[52] VccSus3_3[1] 0R0603-PAD 3D3V_S5

SCD1U10V2KX-4GP
1 2 Y23 IDE decoupling
IND-1D2UH-5-GP Vcc1_5_B[53]
A24 2 1

2
VccSus3_3[2]
1

2 C716 C720 2
B27 Vcc3_3[1] VccSus3_3[3] C24

1
SC10U10V5ZY-1GP

SCD01U16V2KX-3GP

D19 3D3V_S0
1D5V_S0 VccSus3_3[4] C350
AG28 D22
2

VccDMIPLL VccSus3_3[5]

1
3D3V_ICH_S5 3D3V_S5

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
G19 SCD1U10V2KX-4GP R245

2
VccSus3_3[6]

DY
C765

C336

C329

C715
AB7 0R0603-PAD
Vcc1_5_A[1]
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AC6 K3 1 2

2
Vcc1_5_A[2] VccSus3_3[7]
1

C366 C371 AC7 K4

2
Vcc1_5_A[3] VccSus3_3[8]

1
AD6 K5 C363 C381
Vcc1_5_A[4] VccSus3_3[9]
ARX

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1D5V_S0 R226 1D5V_ICH_S0 AE6 K6 C361
2

0R0603-PAD Vcc1_5_A[5] VccSus3_3[10]


AF5 L1 DY

2
Vcc1_5_A[6] VccSus3_3[11]
1 2 AF6 Vcc1_5_A[7] VccSus3_3[12] L2
USB

AG5 L3 SCD1U10V2KX-4GP
Vcc1_5_A[8] VccSus3_3[13]
1

3D3V_S0 AH5 L6
C316 Vcc1_5_A[9] VccSus3_3[14] NO_STUFF
VccSus3_3[15] L7
SCD1U10V2KX-4GP AD2 M6
2

VccSATAPLL VccSus3_3[16]
VccSus3_3[17] M7
1

1D5V_S0 AH11 N7
C383 Vcc3_3[2] VccSus3_3[18] 1D5V_S0
SCD1U10V2KX-4GP AB10 AB17
2

Vcc1_5_A[10] Vcc1_5_A[19]

1
AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17
1

NO_STUFF NO_STUFF AC10 C328 C315


Vcc1_5_A[12]

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C319 C318 AD10 T7

2
SCD1U10V2KX-4GPSCD1U10V2KX-4GP Vcc1_5_A[13] Vcc1_5_A[21]
AE10 F17
2

Vcc1_5_A[14] Vcc1_5_A[22]
ATX

3D3V_ICH_S5 DY AF10 Vcc1_5_A[15] Vcc1_5_A[23] G17


AF9 Vcc1_5_A[16]
AG9 Vcc1_5_A[17] Vcc1_5_A[24] AB8
AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
1D5V_S0 C349
1

1D5V_ICH_S0 TP55 TPAD28

om
1 E3 VccSus3_3[19] VccSus1_05[1] K7 1
1

NO_STUFF SCD1U10V2KX-4GP

l.c
C714 C1 C28 TP89 TPAD28
2

VccUSBPLL VccSus1_05[2]

ai
SCD1U10V2KX-4GP C384 TP56 TPAD28
G20
Wistron Corporation
2

tm
VccSus1_05[3]
1

1D5V_S0
SCD01U16V2KX-3GP

DY TPAD28 TP81 AA2 VccSus1_05/VccLAN1_05[1]

ho
Y7 A1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] Taipei Hsien 221, Taiwan, R.O.C.

f@
H6
2

Vcc1_5_A[27]
USB CORE

H7

in
Vcc1_5_A[28] Title
J6

xa
Vcc1_5_A[29]
J7
ICH7-M (3 of 4)

he
Vcc1_5_A[30]
ICH7-M-GP KI.80101.017 Size Document Number Rev

MYALL2 MP
Date: Friday, March 24, 2006 Sheet 17 of 57
A B C D E
A B C D E

U65E
A4 VSS[1] VSS[98] P28
A23 VSS[2] VSS[99] R1
B1 VSS[3] VSS[100] R11
B8 VSS[4] VSS[101] R12
B11 VSS[5] VSS[102] R13
B14 VSS[6] VSS[103] R14
B17 VSS[7] VSS[104] R15
4 B20 VSS[8] VSS[105] R16 4
B26 VSS[9] VSS[106] R17
B28 VSS[10] VSS[107] R18
C2 VSS[11] VSS[108] T6
C6 T12 32K suspend clock output 3D3V_S5
VSS[12] VSS[109]
C27 VSS[13] VSS[110] T13
D10 T14 U11 DY
VSS[14] VSS[111]
D13 VSS[15] VSS[112] T15
D18 T16 16,31,35,40,41,45,56 PM_SLP_S3# 1 5 R256
VSS[16] VSS[113] OE VCC 10R2J-2-GP
D21 VSS[17] VSS[114] T17 16 PM_SUS_CLK 2 A
D24 U4 3 4 32KHZ 1 2 G792_32K 19
VSS[18] VSS[115] GND Y
E1 VSS[19] VSS[116] U12

1
E2 VSS[20] VSS[117] U13
E4 U14 NC7SZ126P5X-GP R255
VSS[21] VSS[118] 240KR2J-1-GP
E8 VSS[22] VSS[119] U15
E15 VSS[23] VSS[120] U16
F3 U17 RUN_POWER_ON

2
VSS[24] VSS[121]
F4 VSS[25] VSS[122] U24
F5 VSS[26] VSS[123] U25

G
F12 VSS[27] VSS[124] U26
F27 VSS[28] VSS[125] V2

1
F28 VSS[29] VSS[126] V13
G1 VSS[30] VSS[127] V15
G2 V24 3 2

D
VSS[31] VSS[128]

S
G5 VSS[32] VSS[129] V27
G6 VSS[33] VSS[130] V28
G9 W6 2N7002W-7-GP
VSS[34] VSS[131]
G14 VSS[35] VSS[132] W24 Q17
G18 VSS[36] VSS[133] W25
3 G21 W26 3
VSS[37] VSS[134]
G24 VSS[38] VSS[135] Y3
G25 VSS[39] VSS[136] Y24
G26 VSS[40] VSS[137] Y27
H3 VSS[41] VSS[138] Y28
H4 VSS[42] VSS[139] AA1
H5 VSS[43] VSS[140] AA24
H24 VSS[44] VSS[141] AA25
H27 AA26
H28
VSS[45]
VSS[46]
VSS[142]
VSS[143] AB4 SMBUS 3D3V_S0
J1 VSS[47] VSS[144] AB6
J2 VSS[48] VSS[145] AB11
J5 AB14 3D3V_S5
VSS[49] VSS[146] 5V_S0
J24 VSS[50] VSS[147] AB16
J25 VSS[51] VSS[148] AB19

4
3
J26 VSS[52] VSS[149] AB21
K24 AB24 RN37
VSS[53] VSS[150]
K27 VSS[54] VSS[151] AB27 SRN4K7J-8-GP

4
3
K28 VSS[55] VSS[152] AB28
L13 AC2 RN36
VSS[56] VSS[153]
L15 AC5 SRN4K7J-8-GP

1
2
VSS[57] VSS[154]
L24 VSS[58] VSS[155] AC9
L25 VSS[59] VSS[156] AC11
L26 AD1

G
1
2
VSS[60] VSS[157]
M3 VSS[61] VSS[158] AD3
M4 AD4 Q16
VSS[62] VSS[159]
M5 VSS[63] VSS[160] AD7 16,26 SMB_CLK D S2N7002-7F-GP SMBC_ICH 3,11
M12 VSS[64] VSS[161] AD8
M13 VSS[65] VSS[162] AD11
2 2
M14 VSS[66] VSS[163] AD15
M15 VSS[67] VSS[164] AD19
M16 AD23

G
VSS[68] VSS[165]
M17 VSS[69] VSS[166] AE2
M24 AE4 Q15
VSS[70] VSS[167]
M27 VSS[71] VSS[168] AE8 16,26 SMB_DATA D S2N7002-7F-GP SMBD_ICH 3,11
M28 VSS[72] VSS[169] AE11
N1 VSS[73] VSS[170] AE13 Q13 & Q14 connect SMLINK and
N2 VSS[74] VSS[171] AE18 SMBUS in S) for SMBus 2.0
N5 VSS[75] VSS[172] AE21
N6 AE24 compliance
VSS[76] VSS[173]
N11 VSS[77] VSS[174] AE25
N12 VSS[78] VSS[175] AF2
N13 VSS[79] VSS[176] AF4
N14 VSS[80] VSS[177] AF8
N15 VSS[81] VSS[178] AF11
N16 VSS[82] VSS[179] AF27
N17 AF28 5V_S0
VSS[83] VSS[180]
N18 VSS[84] VSS[181] AG1
N24 VSS[85] VSS[182] AG3
U16C

14

10
N25 VSS[86] VSS[183] AG7
N26 AG11 R310 TSAHCT125PW-GP
VSS[87] VSS[184] 33R2J-2-GP
P3 VSS[88] VSS[185] AG14
P4 VSS[89] VSS[186] AG17 7,16,22,26,31,32,34,46,51 PLT_RST1# 1 2 9 8 RSTDRV#_5 20
P12 VSS[90] VSS[187] AG20

1
P13 AG25 C461
VSS[91] VSS[188] SC100P50V2JN-3GP R314
P14 AH1

7
VSS[92] VSS[189] 10KR2J-3-GP
P15 VSS[93] VSS[190] AH3 2
1 P16 VSS[94] VSS[191] AH7 1
P17 AH12

2
VSS[95] VSS[192]
P24 VSS[96] VSS[193] AH23
P27 VSS[97] VSS[194] AH27
Wistron Corporation
ICH7-M-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
KI.80101.017 Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH7-M (4 of 4)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 18 of 57
A B C D E
FAN1_VCC

*Layout* 15 mil

1
C36 DY C22 C38 DY

3
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SC2200P50V2KX-2GP 5V_S0

2
D5
BAT54-4-GP C206 put near

1
C31
SCD1U16V3KX-3GP R32 FAN1 / 5V_S0 add

2
C206 put 10KR2J-3-GP 0.1u near FAN by

2
FAN1
near FAN1 / EMI request 5

2
5V_S0 add
0.1u near 3
FAN by EMI FAN1_VCC 2
1
request

1
C30 *Layout* 15 mil
SC100P50V2JN-3GP 4

2
ACES-CON3-1-GP
20.F0735.003

5V_S0
5V_S0 U32 2nd source: 20.F0700.003
R390
*Layout* 30 mil
1 2 5V_G791_S0 6 1
VCC FAN1
20 DVCC FG1 4

1
200R2F-L-GP 14

SCD1U16V2ZY-2GP
CLK G792_32K 18

1
R388 C548 C549 16 SMB_DATA_W 31
SDA

4K99R2F-L-GP
C558 C550 SCD1U16V2ZY-2GP 7 18

SC4D7U10V5ZY-3GP
SMB_CLK_W 31

2
SCD1U16V2ZY-2GP DXP1 SCL
9 19

2
DXP2 NC#19 H_THERMDA
11 DXP3

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP
G792_DXP3 SC470P50V2KX-3GP

2
5 G792_DXP2 SC470P50V2KX-3GP
DGND

3
THRM# 15 17 Q30
ALERT# DGND

3
C551

C556
T8_HW_SHUT# 13 Q13 C589 1
V_DEGREE THERM# H_THERMDC C277
Setting T8 as 3 8 1

2
THERM_SET SGND1 G792_DXN2 PMBS3904-1-GP
2 10

2
RESET# SGND2
1
100 Degree 12 PMBS3904-1-GP

2
R386 SGND3 G792_DXN3
49K9R2F-L-GP G27

2
GAP-CLOSE

GAP-CLOSE
V_DEGREE G792SFUF-GP
=(((Degree-72)*0.02)+0.34)*VCC System Sensor
2

G26
3D3V_S0
Hardware shutdown

SC2200P50V2KX-2GP
1

7,16 PWROK 1 2 G792_RESET#


4K7R2J-2-GP DXP1:108 Degree H_THERMDA 4
1

C557
R368 C562 DY R387
10KR2J-3-GP DXP2:H/W Setting Place near chip as close
SC2200P50V2KX-2GP R395 DXP3:88 Degree as possible H_THERMDC 4
2

2
THRM# 16 10KR2J-3-GP

2 DCBATOUT
5V_AUX_S5

1
R105 DY

1
DY C172 1MR2J-1-GP
SCD1U16V2ZY-2GP
51 OVERT# U5 DY

2
T8_HW_SHUT#
5 1 HTH
VCC HTH
GND 2
LOW3_OFF 4 3
RESET#/RESET LTH R87 DY
0R2J-2-GP
2

1
G680LT1F-GP 2 1 INTRUDER# 15
D29 Output type: R104 DY
3D3V_AUX_S5 BAW56PT-U D7 DY 15KR2F-GP
Open-Drain RESET# RSMRST# 31
BAS16-7-F-GP
3

2
2

1
3

1
1

R103 DY
R95 D8 DY 2004/11/10 CHANGE 110KR2F-GP
10KR2J-3-GP BAT54-4-GP

2
2

(dummy, KBC already delay)


1

C155 DY
SCD1U16V2ZY-2GP
2

om
l.c
ai
tm
Wistron Corporation

ho
C

R100 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

f@
1 2 B Q8 Taipei Hsien 221, Taiwan, R.O.C.

in
4,15 H_PWRGD PMBT2222A-1GP

xa
1KR2J-1-GP Title
E

he
1

C174 Thermal/Fan Controllor


SCD1U16V2ZY-2GP Size Document Number Rev
2

PM_THRMTRIP-I# 4
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 19 of 57
5V_S0
3D3V_S0

CD-ROM Connector

8
7
6
5
RN39
SRN4K7J-6-GP

K
1

ST100U6D3VDM-5
C401 C403 C402 TC26

1
SC10U10V5ZY-1GP
D34
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SSM22LLPT-GP
2

1
2
3
4
ODD1

2
51

A
2 1

DY IDE_PDIORDY 4 3
IDE_PDDACK# IDE_PDD8 6 5 RSTDRV#_5
INT_IRQ14 IDE_PDD9 8 7 IDE_PDD7
IDE_PDD10 10 9 IDE_PDD6
IDE_PDD11 12 11 IDE_PDD5
HDD1 IDE_PDD12 14 13 IDE_PDD4
R252 IDE_PDD13 16 15 IDE_PDD3
42 20 470R2J-2-GP IDE_PDD14 18 17 IDE_PDD2 5V_S0
+5V_MOTOR KEY HDDCSEL IDE_PDD15 IDE_PDD1
41 +5V_LOGIC CSEL 28 2 1 20 19
34 PDIAG IDE_PDDREQ 22 21 IDE_PDD0
PDIAG# RSTDRV#_5 IDE_PDIOR#
1A V33 RESET# 1 RSTDRV#_5 18 24 23

1
TPAD30 TP86 2A 39 IDE_LED# 13 26 25 IDE_PDIOW#
5V_S0 V33 DASP# INT_IRQ14 R29 IDE_PDDACK# IDE_PDIORDY R30
3A V33 INTRQ 31 INT_IRQ14 15 28 27
27 IDE_PDIORDY 10KR2J-3-GP 30 29 INT_IRQ14 10KR2J-3-GP
IORDY IDE_PDIOR# IDE_PDIORDY 15 PDIAG IDE_PDA1
7A V5 DIOR# 25 IDE_PDIOR# 15 5V_S0 1 2 32 31
8A 23 IDE_PDIOW# IDE_PDA2 34 33 IDE_PDA0

2
V5 DIOW# IDE_PDDREQ IDE_PDIOW# 15 IDE_PDCS3# IDE_PDCS1#
9A V5 DMARQ 21 IDE_PDDREQ 15 36 35
29 IDE_PDDACK# 38 37 ODD_LED# 13
DMACK# IDE_PDDACK# 15
13A V12 40 39
TPAD30 TP91 14A 44 42 41
V12 RESERVED#44 5V_S0 5V_S0
15A V12 RESERVED#32 32 44 43
11A 46 45 R56 10KR2J-3-GP
RESERVED#11A CSEL
48 47 1 2

1
15 IDE_PDD15 IDE_PDD15 18 C34 C37 50 49
IDE_PDD14 DD15 SATA_RXP1 C45
15 IDE_PDD14 16 DD14 B+ S6 52
IDE_PDD13 SATA_RXN1 SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
15 IDE_PDD13 14 S5

2
DD13 B-

1
15 IDE_PDD12 IDE_PDD12 12
IDE_PDD11 DD12 SATA_TXN1 SPD-CONN50-4R-17GP-U R55
15 IDE_PDD11 10 DD11 A- S3 DY
15 IDE_PDD10 IDE_PDD10 8 S2 SATA_TXP1 20.80677.050 0R2J-2-GP
IDE_PDD9 DD10 A+
15 IDE_PDD9 6 DD9
15 IDE_PDD8 IDE_PDD8 4

2
IDE_PDD7 DD8
15 IDE_PDD7 3 DD7 GND 40
15 IDE_PDD6 IDE_PDD6 5 30
IDE_PDD5 DD6 GND
15 IDE_PDD5 7 DD5 GND 26
15 IDE_PDD4 IDE_PDD4 9 24
IDE_PDD3 DD4 GND
15 IDE_PDD3 11 DD3 GND 22
15 IDE_PDD2 IDE_PDD2 13 43
DD2 GND

HDD Connector
15 IDE_PDD1 IDE_PDD1 15 19
IDE_PDD0 DD1 GND
15 IDE_PDD0 17 DD0 GND 45
GND 46
GND 2
IDE_PDA0 35 S1
15 IDE_PDA0 IDE_PDA1 DA0 GND
15 IDE_PDA1 33 DA1 GND S4
IDE_PDA2
15 IDE_PDA2 IDE_PDCS1#
36
37
DA2 GND S7
4A
For HDD & SATA both
15 IDE_PDCS1# IDE_PDCS3# CS0# GND
15 IDE_PDCS3# 38 CS1# GND 5A
GND 6A
NP1 10A 5V_S0
NP1 GND
NP2 NP2 GND 12A

K
SATA Connector

1
CON44+15P+S7-GP
20.F0794.066 D35 TC27 C760
B240LA-13F-GP SCD1U25V3ZY-3GP

ST100U6D3VDM-5
SATA PN : 20.F0794.066

2
PATA PN : 20.E0021.222

A
SATA1 SATA1
FCI-CON11-GP-U
12 13 Put near SATA2 Connector
15 SATA_TXP0 1
15 SATA_TXN0 2
3
15 SATA_RXN0 4
3D3V_S0 5
15 SATA_RXP0
6
7
8
1

C374 SATA1 TC6 SATA1 5V_S0 9


10
SCD1U16V2ZY-2GP ST100U4VBM-10-GP 11
2

14 15

20.F0872.011

RN25
SATA_TXP0 2 3 SATA_TXP1
SATA_TXN0 1 4 SATA_TXN1
SATA2
SRN0J-6-GP
Dummy when use IDE
RN29
SATA_RXN0 SATA_RXN1
SATA_RXP0
2
1
3
4 SATA_RXP1 Wistron Corporation
SATA2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SRN0J-6-GP Taipei Hsien 221, Taiwan, R.O.C.
? 0 Ohms closae to SATA2 Connector Title

HDD and CDROM


ME : 20.F0777.022 Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 20 of 57
USB2
7
5V_USB0_S0 5
100 mil RN60
5V_USB0_S0 1

3 2 USB_0- 2
16 USBPN0
1

1
TC16 EC42 DY EC52 5V_USB2_S0 4 1 USB_0+ 3
16 USBPP0
SE150U6D3VDM-GP SCD1U16V2ZY-2GP SC1000P50V3JN-GP 4
5V_USB0_S0 SRN0J-6-GP 6
2

2
U7 8
5V_S5
1 GND OC1# 8 USB_OC#2 16
2 7 USB_OC#3 16 SKT-USB-105-GP-U
5V_USB1_S0 IN OUT1 22.10218.J11
3 EN1# OUT2 6
100 mil 31 USB_PWR_EN# 4 EN2# OC2# 5

1
C300 EC19 DY EC20 DY
1

1
TC1 EC1 DY EC3 SCD1U16V3KX-3GP TPS2062D-GP
SE150U6D3VDM-GP SCD1U16V2ZY-2GP SC1000P50V3JN-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
2

5V_USB2_S0 2 USB3
100 mil 7
5
5V_USB0_S0 1
1

TC4 EC56 DY EC57 RN70


SE150U6D3VDM-GP SCD1U16V2ZY-2GP SC1000P50V3JN-GP 3 2 USB_2- 2
16 USBPN2
4 1 USB_2+ 3
16 USBPP2
2

U1 5V_USB1_S0 4
SRN0J-6-GP 6
5V_S5 1 8 8
GND OUT
2 IN OUT 7
3 IN OUT 6
4 5 USB_OC#5 16 SKT-USB-105-GP-U
31 USB_PWR_EN# EN# OC# 22.10218.J11

1
C8 EC2 DY
SCD1U16V3KX-3GP TPS2061D-GP SCD1U16V2ZY-2GP

2
USB4
7
BLUETOOTH MODULE RN83
5V_USB2_S0 1
5

3D3V_BT_S0 3 2 USB_3- 2
3D3V_S0 16 USBPN3
U9 74.04250.A3F C364 4 1 USB_3+ 3
16 USBPP3
SC4D7U10V5ZY-3GP 4
3D3V_BT_S0 1 5 1 2 SRN0J-6-GP 6
OUT IN
2 GND 8
3 NC#3 ON/OFF# 4
1

EC21 DY BLUETOOTH_EN 31
SCD1U16V2ZY-2GP SKT-USB-105-GP-U
AAT4250IGV-T1-GP 22.10218.J11
2

EC21 put near


BLUE1 / all
6

USB put one


RN24
choke near 4 3 2 USBPN7 16
connector by BLUE1 3 4 1 USBPP7 16
ACES-CON4-1-GP 2
EMI request 20.D0197.104 SRN0J-6-GP USB1
1 3D3V_BT_S0 6
5V_USB1_S0 1
RN42
3 2 USB_5- 2
16 USBPN5
5

4 1 USB_5+ 3
16 USBPP5
4
1st source: 20.D0197.104 SRN0J-6-GP 5

SKT-USB-97-UGP

MDC 1.5 CONNECTOR CHANGE TO AZ


22.10218.H01

MDC1
13 15
MH1 14
R15 1 2 TP64 TPAD28
0R2J-2-GP
15,28 ACZ_SDATAOUT ACZ_SDATAOUT 1 2 3 4 TP65 TPAD28
5 6 3D3V_S5
15,28 ACZ_SYNC ACZ_SYNC 7 8
15 ACZ_SDATAIN1 1 2ACSDATAIN1_A 9 10
R16 39R2J-L-GP ACZ_RST# 11 12
15,28 ACZ_RST# ACZ_BTCLK_MDC 15

om
MH2 17
1

16 18

l.c
1

C21 C491
Wistron Corporation
1

ai
SC22P50V2JN-4GP
2

tm
AMP-CONN12A-GP R334 C490 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC4D7U10V5ZY-3GP
2

ho
100KR2J-1-GP

20.F0582.012 DUMMY-C2 Taipei Hsien 221, Taiwan, R.O.C.

f@
C23 DY R23 DY Title
2nd source: 20.F0604.012

in
2

SCD47U10V3ZY-GP 10R2J-2-GP
USB / MDC / BLUETOOTH

xa
2 1 2 1

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 21 of 57
A B C D E

3D3V_LAN_S5 EVDD18 AVDD33


R345 0R0603-PAD R333 0R0603-PAD
1 2 EVDD18 1 2 AVDD33
20 mils

1
Q29 B CTRL18 C525 C530 C528 C498 C486
2SB1188-U
SC4D7U6D3V3KX-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
C
AVDD18 DVDD33
R335 0R0603-PAD
4
40 mils AVDD18 3D3V_LAN_S5 1 2 DVDD33
4
1

1
C540 C506 C500 C527 C508 C503 C493 C489 C507 C499 C523

SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
3D3V_LAN_S5

20 mils
C
3

1
B
Q27 1 CTRL15 C504 C509 C487 C529
2SB1182-GP
C SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
G24
GAP-CLOSE-PWR-2U R52 0R0603-PAD
1 2 AGND 1 2
DVDD15 3D3V_S5 3D3V_LAN_S5

40 mils DVDD15 R51 0R0603-PAD


60 ~ 100 mils 1 2
1

1
C510 C524 C485 C488 C505 C501

SC22U6D3V5MX-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP


2

2
3 3

C483
SC15P50V3JN-GP
2 1

1
EEPROM LED OPTION USE '01'
X2
C484 XTAL-25MHZ-67GP (DEFINED IN SPEC)
SC15P50V3JN-GP 2 => LED0 : ACT
2 1
=> LED1 : LINK
(BOTH 10/100 AND GIGA CHIP)
ACT_LED# 23
1

C492 C482 1 2 R651 0R0402-PAD DVDD33


RTL_LED# 23
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

1
RTL_LED1#
R336 R338 DY

ACT_LED#
R337 3K6R3-GP 10KR2J-3-GP
DVDD15

DVDD33
DVDD15

DVDD15
AVDD33
CTRL15

LAN_X2
LAN_X1

2K49R2F-GP
1 2 U24 DVDD33

2
LAN_EECS 1 8
CS VCC

1
LAN_EESK 2 7 C511
U23 LAN_EEDI SK DC
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
3 DI ORG 6
LAN_EEDO 4 5 SCD1U16V2ZY-2GP

2
2 3D3V_S0 DO GND 2

TCLK
RSET
VCTRL15

CKTAL2
CKTAL1

LED1
LED2
LED3
GND

GVDD

AVDD33
VDD15
LED0

VDD33
VDD15
TD

VDD15
AT93C46-10SU-1GP

2
CTRL18 1 48 LAN_EESK
AVDD33 VCTRL18 EESK LAN_EEDI
2 AVDD33 EEDI 47
MDIP0 3 46 DVDD33 D28
23 MDIP0 MDIN0 MDIP0 VDD33 LAN_EEDO BAT54-4-GP
23 MDIN0 4 MDIN0 EEDO 45
AVDD18 5 44 LAN_EECS
MDIP1 AVDD18 EECS DVDD15
6 43

1 3
23 MDIP1 MDIN1 MDIP1 VDD15
23 MDIN1 7 MDIN1 SPICSB 42
AVDD18 8 41 DVDD15
AVDD18 VDD15
23 MDIP2
MDIP2 9 MDIP2 RTL8111B-GP-U1 SPISCK 40 R340
MDIN2 10 39 1KR2J-1-GP
23 MDIN2 AVDD18 MDIN2 TCS DVDD15
11 AVDD18 VDD15 38
MDIP3 12 37 DVDD33

2
23 MDIP3 MDIN3 MDIP3 VDD33 ISOLATE#
23 MDIN3 13 MDIN3 ISOLATEB 36
AVDD18 14 35
AVDD18 SPISI

1
DVDD15 15 34
LANWAKEB

REFCLK_N

VDD15 SPISO
REFCLK_P

DVDD33 16 33 DVDD15 R339


VDD33 VDD15
PERSTB

EVDD18

EVDD18

15KR2F-GP
VDD15

VDD15
NC#17
NC#18

EGND

HSON
EGND
HSOP
HSIN
HSIP

2
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

1 1
DVDD15

DVDD15
EVDD18

EVDD18
AGND

AGND

ICH_PME#
16 ICH_PME#
7,16,18,26,31,32,34,46,51 PLT_RST1# PLT_RST1# Wistron Corporation
PCIE_TXP1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
16 PCIE_TXP1
PCIE_TXN1 Taipei Hsien 221, Taiwan, R.O.C.
16 PCIE_TXN1
3 CLK_PCIE_LAN CLK_PCIE_LAN
CLK_PCIE_LAN# Title
3 CLK_PCIE_LAN#
PCIE_RXP1 C69 SCD1U10V2KX-5GP 2 1
16
16
PCIE_RXP1
PCIE_RXN1 PCIE_RXN1 C74 SCD1U10V2KX-5GP 2 1 RTL8111B
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 22 of 57
A B C D E
A B C D E

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
EVDD18
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.

2
4 7.Must not cross ground moat,except 4
R322
0R0402-PAD XF2 RJ-45 moat.
1 12 RJ45_7
1

22 MDIP3 RD+ RX+ RJ45_8 ACT_LED#


22 MDIN3 2 RD- RX- 11 22
ACT_LED#
TCT1 3 10 MCT4
RDCT RXCT C1
4 9 MCT3 SCD1U16V3KX-3GP
TDCT TXCT RJ45_4
22 MDIP2 5 TD+ TX+ 8 2 1
1

C473 C13 6 7 RJ45_5 R1


22 MDIN2 TD- TX-
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

3D3V_S5 2 1 CONN_PWR_B2
470R2J-2-GP
2

XFORM-208-GP LAN1
9
B1
MH1
10/100/1000Mbps Lan Transformer RJ45_1 RJ45_1 B2

RJ45_2 RJ45_2
XF1 RJ45_3 RJ45_3
3 RJ45_4 RJ45_4 3
1 12 RJ45_3 RJ45_5 RJ45_5
22 MDIP1 RD+ RX+ RJ45_6 RJ45_6
22 MDIN1 2 RD- RX- 11 RJ45_6
3 10 MCT2 RJ45_7 RJ45_7
RDCT RXCT MCT1 RJ45_8
4 TDCT TXCT 9 RJ45_8
5 8 RJ45_1 A1
22 MDIP0 TD+ TX+ RJ45_2
22 MDIN0 6 TD- TX- 7 A2
A3
1

C14 C472 RJ11_1


SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

XFORM-208-GP RING RJ11_2


TIP RJ11_3
2

RN45 C458 RJ11_4


MCT4 1 8 SC1KP2KV8KX-LGP MH2
MCT3 2 7 1 2 10
MCT2 3 6
MCT1 4 5 RJ45-75-GP
22.10245.A41
22 RTL_LED#
SRN75J-1-GP

2 2
R2
470R2J-2-GP
3D3V_S5 2 1 CONN_PWR

1
C2
B2:YELLOW
SCD1U16V3KX-3GP

2
A1:ORANGE
A3:GREEN

TIP1 3D3V_S5 add 0.1u near LAN1 by EMI request


3
1 TIP_MDC 1 L1 2 0R0603-PAD TIP

2 RING_MDC 1 L2 2 0R0603-PAD RING


4 Wistron Corporation

om
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 1

l.c
ACES-CON2-1-GP

ai
20.D0197.102 Taipei Hsien 221, Taiwan, R.O.C.

tm
ho
Title

f@
LAN CONN

in
xa
he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 23 of 57
A B C D E
A B C D E

C782 should close Pin-P15


and Pin-R17.

1394_AGND 3D3V_PLL_S0

VCC_ASKT_S0

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
4 4

3D3V_S0
C777
16,30 PCI_C/BE#0

2
2

2
16,30 PCI_C/BE#1 C782 1 2
16,30 PCI_C/BE#2
C766 C773 SCD1U25V3ZY-1GP SCD1U16V2ZY-2GP SD_D[3..0]
16,30 PCI_C/BE#3 SD_D[3..0] 26

1
1

1
CBB_D[15..0]

W10

U19

U15
CBB_D[15..0] 25,27

K19

P15

P14
P13

A15

P10

F14
F12
L14
J19

J14
W8
U5
1 OF 2

P2

V7

K2

K1

P1

P8
P6

F9
F6
L6

J6
U68A CBB_A[25..0]
CBB_A[25..0] 25,27

VCCCB

VCCP
VCCP

VCCCB
VR_PORT
VR_PORT
C/BE3#
C/BE2#
C/BE1#
C/BE0#

VR_EN#

VDDPLL_33
VDDPLL_15

AVDD_33
AVDD_33
AVDD_33

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PCI_AD[31..0]
16,25,30 PCI_AD[31..0]
PCI_AD0 R11 P19
AD0 CAD0/D3 CBB_D3 27
PCI_AD1 P11 N18 CBB_D4 27
PCI_AD2 AD1 CAD1/D4
U11 AD2 CAD2/D11 N17 CBB_D11 27
PCI_AD3 V11 M15 CBB_D5 27
PCI_AD4 AD3 CAD3/D5
W11 AD4 CAD4/D12 N19 CBB_D12 27
PCI_AD5 R10 M18 CBB_D6 27
PCI_AD6 AD5 CAD5/D6
U10 AD6 CAD6/D13 M17 CBB_D13 27
PCI_AD7 V10 L19 CBB_D7 27 * All 1394 signals must be routed on top side only
PCI_AD8 AD7 CAD7/D7 * Differential pairs of each ports should have equal trace length
R9 AD8 CAD8/D15 L18 CBB_D15 27
PCI_AD9 U9 L15 CBB_A10 27 * Stubs must be keep as short as possible
3 PCI_AD10 AD9 CAD9/A10 3
V9 AD10 CAD10/CE2# K18 CBB_CE2# 27
PCI_AD11 W9 K17 CBB_OE# 27
PCI_AD12 AD11 CAD11/OE#
V8 AD12 CAD12/A11 K15 CBB_A11 27
PCI_AD13 U8 J18 CBB_IORD# 27 Bypass/Decupoling Capacitors
PCI_AD14 AD13 CAD13/IORD#
R8 AD14 CAD14/A9 J15 CBB_A9 27
PCI_AD15 W7 J17 CBB_IOWR# 27 Should be places as close to
PCI_AD16 AD15 CAD15/IOWR#
W4 AD16 CAD16/A17 H19 CBB_A17 27
PCI_AD17 T2 F15 CBB_A24 27 PCI7412 as possible
PCI_AD18
PCI_AD19
PCI_AD20
T1
R3
P5
AD17
AD18
AD19
AD20
TI PCI7412 CAD17/A24
CAD18/A7
CAD19/A25
CAD20/A6
E17
D19
A16
CBB_A7 27
CBB_A25 27
CBB_A6 27
PCI_AD21 R2 E14 3D3V_S0
AD21 CAD21/A5 CBB_A5 27

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
PCI_AD22 R1 B15 CBB_A4 27
PCI_AD23 AD22 CAD22/A4
P3 AD23 CAD23/A3 B14 CBB_A3 27
PCI_AD24 N3 A14 CBB_A2 27
AD24 CAD24/A2

1
SC1KP16V2KX-GP

SC1KP16V2KX-GP
PCI_AD25 N2 C13 CBB_A1 27 C775 C762 C761 C781
PCI_AD26 AD25 CAD25/A1
N1 AD26 CAD26/A0 B13 CBB_A0 27
PCI_AD27 M5 C11 CBB_D0 27

2
PCI_AD28 AD27 CAD27/D0

MC_PWR_CTRL_1/SM_R/B#
M6 AD28 CAD28/D8 E11 CBB_D8 27
PCI_AD29 M3 F11 CBB_D1 27
PCI_AD30 AD29 CAD29/D1
M2 AD30 CAD30/D9 A10 CBB_D9 27
PCI_AD31 M1 C10 CBB_D10 27
AD31 CAD31/D10 3D3V_S0

MC_PWR_CTRL_0
SD_CMD/SM_ALE
SD_CLK/SM_RE#
SD_DAT3/SM_D7
SD_DAT2/SM_D6
SD_DAT1/SM_D5
SD_DAT0/SM_D4

SD_WP/SM_CE#
16,30 PCI_PAR U7 PAR CPAR/A13 H14 CBB_A13 27

CC/BE3#/REG#

CC/BE0#/CE1#
CC/BE2#/A12
CC/BE1#/A8

1
SC1KP16V2KX-GP
C772

SD_CD#
VSSPLL
AGND
AGND
AGND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

2
2 2
U14
U13
R14

P9
P7
N6
M14
K14
K6
H6
G14
F13
F10
F7

R17

E6
B5
A5
C6

E7
C5
A4
F8
C8
E9

E13
E18
H18
L17
71.07412.B0U PCI7412ZHK-GP

CBB_CE1# 27
CBB_A8 27
SD_D3
CBB_A12 27 3D3V_PLL_S0
SD_D2
CBB_REG# 27
1394_AGND SD_D1 SD_CD# SD_CD# 26 R560 0R0603-PAD
SD_D0 3D3V_S0 1 2
R558 0R0603-PAD 3D3V_S0

1
SC1KP16V2KX-GP
1 2 26 SD_WP SD_WP C779 C780 C784
26 SD_CMD SD_CMD
R559 0R0603-PAD 26 SD_CLK SD_CLK SC1U10V2ZY SC1U10V2ZY

2
4
1 2 26 SM_R# SM_R# 3
RN85 CardReader
SRN10KJ-5-GP
1394_AGND
1
2

MC_PWR_CTRL 26
C

MC_PWR_CTRL1_0 B Q34 CardReader


CHT2222APT-GP
E

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TI PCI7412 (1 of 2)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 24 of 57
A B C D E
A B C D E

4 4

TP88 TP93
TPAD28 TP94 TPAD28
TPAD28 TP92
TPAD28

1
1
1
G82

W12

U12
V12
E5
1 2
U68B PCI7412ZHK-GP

2 OF 2
GAP-CLOSE

NC#E5

PC2
PC1
PC0
1394_AGND

16,30 PCI_TRDY# W5 TRDY#


16,30 PCI_STOP# V6 STOP#
16,30 PCI_SERR# W6 SERR#
16 PCI_REQ#0 L3
16,30 PCI_PERR#
16,30 PCI_IRDY#
16,24,30 PCI_AD22 1 R552
2 7412_IDSEL
R7
V5
N5
REQ#
PERR#
IRDY#
IDSEL
TI PCI7412 CCLK/A16 F18
R538 33R2J-2-GP

1 2 CBB_A16 27
100R2F-L1-GP-U L2 A11
16 PCI_GNT#0 GNT# CCLKRUN#/WP/IOIS16# CBB_WP 27
3 R6 C15 3
16,30 PCI_FRAME# FRAME# CRST#/RESET CBB_RESET 27
16,30 PCI_DEVSEL# U6 DEVSEL#
MS_D[3..1] A3
26 MS_D[3..1] XD_CD#/SM_PHYS_WP# XD_CD# 26
MS_D3 B6 B4 SM_CLE 26
MS_D2 MS_DATA3/SD_DAT3/SM_D3 SM_CLE SM_CD# TP95 TPAD30
A6 MS_DATA2/SD_DAT2/SM_D2 SM_CD# B8
MS_D1 C7 MS_DATA1/SD_DAT1/SM_D1 3D3V_S0
26 MSCSDIO B7 MS_SDIO/DATA0/SD_DAT0/SM_D0 R550
26 MS_CLK A7
A8
MS_CLK/SD_CLK/SM_EL_WP# IDSEL:AD22 SUSPEND# J5
H3
1 2
10KR2J-3-GP
26 MS_CD# MS_CD# SPKROUT PCI_SPKR 28
26 MSCBS E8 MS_BS/SD_CMD/SM_WE# INTA-->:INT_PIRQG# SDA G3 1 R548 2
3D3V_PLL_S0
SCL G2
INTB-->:INT_PIRQB# RI_OUT#/PME# L5 47KR2J-2-GP
1 2 1394_TPBIAS1 W17 P17 1 R551
2
C783
26 1394_TPBIAS0
SCD1U25V3ZY-1GP R13
TPBIAS1
TPBIAS0
INTC-->:INT_PIRQF# PHY_TEST_MA 4K7R2J-2-GP
V15
W15
TPB1P INTD-->:INT_PIRQG# J3
RN87
PM_CLKRUN# 16,30,31,32
TPB1N MFUNC6
26 1394_TPB0P V13
W13
TPB0P GNT:PCI_GNT#0 MFUNC5 J2
J1 INTD#
3
4
2
1
3D3V_S0
INTA# CARBUS 1 (INT_PIRQG#)
26 1394_TPB0N TPB0N MFUNC4
1394_AGND
V16 TPA1P REQ:PCI_REQ#0 MFUNC3 H1
SRN4K7J-8-GP
INT_SERIRQ 16,30,31,32 INTB# 1394 (INT_PIRQB#)
W16 TPA1N MFUNC2 H2 INTC# INT_PIRQF# 16 INTC# Flash Media (INT_PIRQF#)
26 1394_TPA0P V14 TPA0P MFUNC1 H5 INTB# INT_PIRQB# 16
26 1394_TPA0N W14 G1 INTA# INT_PIRQG# 16 INTD# SD Host (INT_PIRQG#) share
TPA0N MFUNC0

CSTSCHG/BVD1/STSCHG#/RI#
1394_R1 T19 F1 CLK48_CARDBUS
R1 CLK_48 MFUNC4:3 use bit 19-16 Register define.
1 2 1394_R0T18 R0 A_USB_EN# E10
6K34R2F-GP R553 R12 H15
RSVD#C4/VD0/VCCD1#

CPS CBLOCK#/A19 CBB_A19 27

1
CAUDIO/BVD2/SPKR#

C776 SC15P50V2JN-2-GP P12


CLOCK/VD1/VCCD0#

CINT#/READY/IREQ#

1394_XO TEST0 R540 DY


LATCH/VD3/VPPD0

2 1 R18 XO
DATA/VD2/VPPD1

2 1394_XI CREQ#/INPACK# MC_PWR_CTRL-1 TP87 TPAD30 100R2J-2-GP 2


R19 G5
RSVD#M19/D14

XI CSERR#/WAIT# RSVD#G5
2

CDEVSEL#/A21
RSVD#H17/A18

CFRAME#/A23
RSVD#B10/D2

CCD1#/CD1#
CCD2#/CD2#
CPERR#/A14

CTRDY#/A22
CSTOP#/A20
CGNT#/WE#

X6
CIRDY#/A15

CLK48CARDBUS

CVS1/VS1#
CVS2/VS2#

1 2
C774
RSVD#G6
RSVD#D1
RSVD#E1
RSVD#E2
RSVD#E3

X-24D576MHZ-46GP
RSVD#F2
RSVD#F3
RSVD#F5

SC15P50V2JN-2-GP 82.30023.351 C764 DY

GRST#

PRST#
1

PCLK
2 1
SC10P50V2JN-4GP

2
B10
C4
D1
E1
E2
E3
F2
F3
F5
G6
H17
M19

C9
A9
B9

B12
F19
E19
G17
E12
F17
G19
C14
C12
G18
A12
G15

A13
B16

N15
B11

K5
L1
K3
PCIRST1# 16,27,30
PCLK_PCM 3
3D3V_S0
27 CBB_D2 CBB_CD2# 27
CBB_CD1# 27
1 R536 2 CBB_VS2# 27
43KR2J-GP CBB_VS1# 27
27 CBB_A18
27 CBB_D14 CBB_A22 27
27 CB_LATCH CBB_BVD1# 27
27 CB_CLOCK CBB_A20 27
27 CB_DATA CBB_WAIT# 27
27 CBB_BVD2# CBB_INPACK# 27
27 CBB_A21 CBB_A14 27
27 CBB_A23 CBB_A15 27
27 CBB_WE# CBB_RDY 27

om
1 1

l.c
ai
Wistron Corporation

tm
ho
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

f@
in
Title

xa
TI PCI7412 (2 of 2)

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 25 of 57
A B C D E
A B C D E

Mini Card Connector 1394 Connector


L17 1394
FILTER-79-GP
3D3V_S5 3D3V_S0 1D5V_S0 69.10084.071 CN2
MINIC1 4 3 7 8
25 1394_TPA0P
4 4
6 13 CLK_PCIE_MINI2 3 TPA0+ 4
1.5V REFCLK+ TPA0-
REFCLK- 11 CLK_PCIE_MINI2# 3 25 1394_TPA0N 1 2 3
2 3D3V_S0 1D5V_S0 3D3V_S5 4 3 TPB0+ 2
3.3V 25 1394_TPB0P
PERN0 23 PCIE_RXN3 16
28 25 PCIE_RXP3 16 TPB0- 1
+1.5V PERP0
48 +1.5V 25 1394_TPB0N 1 2
31 PCIE_TXN3 16 C684 L16 1394 5 6
PETN0

1
52 33 PCIE_TXP3 16 C707 FILTER-79-GP
+3.3V PETP0

1
C728 C723 C710 69.10084.071 SKT-1394-4P-2 1394

SCD1U16V2ZY-2GP

1
24 36 SC1U10V2ZY SC1U10V2ZY SCD1U16V2ZY-2GP R557 1394 62.10027.561

SCD1U16V2ZY-2GP
USBPN1 16

2
+3.3VAUX USB_D- R555 1394 R554 1394 56R2J-4-GP R556 1394
USB_D+ 38 USBPP1 16
56R2J-4-GP 56R2J-4-GP 56R2J-4-GP

2
3 30 SMB_CLK 16,18

2
RESERVED#3 SMB_CLK
5 RESERVED#5 SMB_DATA 32 SMB_DATA 16,18 25 1394_TPBIAS0
8 RESERVED#8

1
10 Place near MINIC2 C785 1394
RESERVED#10

1
12 1 TP80 TPAD30 C786 1394
RESERVED#12 WAKE# SC220P50V3JN-GP R561 1394
14 RESERVED#14 CLKREQ# 7
16 22 PLT_RST1# 7,16,18,22,31,32,34,46,51 SC1U10V3ZY-6GP 5K1R2-GP

2
RESERVED#16 PERST#
17

2
RESERVED#17
19 RESERVED#19
30,31 WIRELESS_EN 20 RESERVED#20 GND 4
37 RESERVED#37 GND 9
1

39 RESERVED#39 GND 15
R488 41 18
10KR2J-3-GP RESERVED#41 GND
43 RESERVED#43 GND 21
45 RESERVED#45 GND 26
3 47 27 3
2

RESERVED#47 GND
49 RESERVED#49 GND 29
51 RESERVED#51 GND 34
35 3D3V_CR_S0 3D3V_CR_S0 U67 3D3V_S0
GND
GND 40
TP79 TPAD28 1 LED_WPAN# 42 50 1 5
WLAN_LED# LED_WWAN# GND OUT IN
13,30 WLAN_LED# 44 LED_WLAN# GND 53 2 GND

1
1 LED_WWAN# 46 54 C752 CardReader C749 CardReader C778 CardReader 3 4 MC_PWR_CTRL 24
LED_WPAN# GND NC#3 ON/OFF#

1
TP78 TPAD28 R541 CardReader C748

1
100KR2J-1-GP SC1U10V3ZY-6GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C745 CardReader

2
NP1
NP2

1 2 MSCBS SCD1U16V2ZY-2GP AAT4250IGV-T1-GP

2
CardReader 74.04250.A3F SC1U10V3ZY-6GP

2
SKT-MINI52P-3-GP R549 CardReader CardReader
NP1
NP2

20.F0832.052 100KR2J-1-GP
1 2 SD_WP

R539 CardReader
100KR2J-1-GP
1 2 SD_CLK
R535 CardReader
22KR2J-GP SD_D[3..0]
SD_D[3..0] 24
1 2 SM_R# SD_D0
SD_D1
SD_D2
SD_D3
MS_D[3..1]
MS_D[3..1] 25
MS_D1
MS_D2
2 MS_D3 2
CARD1

25 XD_CD# XD_CD# 2 20
SM_R# XD_1P MS_1P MSCBS
24 SM_R# 3 XD_2P MS_2P 21
24 SD_CLK SD_CLK 4 22 MS_D1
SD_WP XD_3P MS_3P MSCSDIO
24 SD_WP 5 XD_4P MS_4P 23
25 SM_CLE SM_CLE 6 24 MS_D2
SD_CMD XD_5P MS_5P MS_CD#
24 SD_CMD 7 XD_6P MS_6P 25 MS_CD# 25
MSCBS 8 26 MS_D3 R532 0R0402-PAD
25 MSCBS XD_7P MS_7P
MS_CLK-R 9 27 MS_CLK-R 1 2
XD_8P MS_8P MS_CLK 25
10 XD_9P MS_9P 28 3D3V_CR_S0
MSCSDIO 11 29
25 MSCSDIO XD_10P MS_10P
MS_D1 12
MS_D2 XD_11P
13 XD_12P
MS_D3 14 30 MS_D3
SD_D0 XD_13P SD_1P MSCBS
15 XD_14P SD_2P 31
SD_D1 16 32 3D3V_CR_S0
SD_D2 XD_15P SD_3P
17 XD_16P SD_4P 33
SD_D3 18 34 MS_CLK-R
XD_17P SD_5P
3D3V_CR_S0 19 XD_18P SD_6P 35
36 MSCSDIO
SD_7P MS_D1
NP1 NP1 SD_8P 37
NP2 38 MS_D2
NP2 SD_9P
24 SD_CD# SD_CD# 40 SW
1 XD_SW GND 44
39 SD_SW#39 GND 43
1
SD_WP 41 42 1
SD_SW#41 GND

CARD-PUSH-41P-GP-U
XD 20.I0036.001 Wistron Corporation
CardReader 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
MS / MS PRO
Title
SD / SD IO / MMC
MINI CARD / 1394 / CARD READER
Size Document Number Rev

MYALL2 MP
Date: Friday, March 31, 2006 Sheet 26 of 57
A B C D E
5 4 3 2 1

PCMCIA Socket
Cardbus I/F
D CBB_D[15..0] D
CBB_D[15..0] 24,25
CBB_A[25..0]
CBB_A[25..0] 24,25

CBB_IORD# 24
NP1
1
35
CN1 CBB_IOWR# 24
CBB_OE# 24
CBB_WE# 25
Power switch
CBB_REG# 24
CBB_D3 2
CBB_CD1# CBB_RDY 25
36 CBB_WP 25
CBB_D4 3 CBB_RESET 25
CBB_D11 37
CBB_D5 CBB_WAIT# 25
4 CBB_INPACK# 25
CBB_D12 38 U66 VCC_ASKT_S0
CBB_D6 5 C751
CBB_D13 39 CBB_CE1# 24 3 9
CBB_D7 25 CB_DATA DATA AVCC
6 CBB_CE2# 24 25 CB_CLOCK 4 CLOCK AVCC 10 1 2
CBB_D14 40 5 SCD1U16V2ZY-2GP
CBB_CE1# CBB_BVD1# 25 25 CB_LATCH LATCH
7 CBB_BVD2# 25 16,25,30 PCIRST1# 12 RESET#
CBB_D15 41 1 R530
2 21 8
CBB_CD1# 25 5V_S0 10KR2J-3-GP SHDN# AVPP VPP_ASKT_S0
CBB_A10 8 CBB_CD2# 25

1
CBB_CE2# 42 CBB_VS1# 25

1
VCC_ASKT_S0 CBB_OE# 9 13 15 R531
CBB_VS2# 25 3D3V_S0 3.3V OC#
CBB_VS1# 43 5V_S0 C753 100KR2J-1-GP

1
CBB_A11 10 C742 SCD1U16V2ZY-2GP

2
CBB_IORD# 44 SC4D7U10V5ZY-3GP 1

2
CBB_A9 5V
11 2 24

2
CBB_IOWR# 5V NC#24
45 NC#23 23
C CBB_A8 12 TPAD28 22 C
NC#22
1

1
TP85
SC1KP16V2KX-GP

C763 C756 CBB_A17 46 C754 C746 7 19


C757 CBB_A13 TP82 12V NC#19
DY

SC1U10V3ZY-6GP
13 20 18

SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP SCD1U25V3ZY-1GPCBB_A18 TPAD28 12V NC#18
47 17
2

2
CBB_A14 NC#17
14 NC#16 16
CBB_A19 48 PC1 11 14
CBB_WE# GND NC#14
15 1 4 25 GND NC#6 6
CBB_A20 49
CBB_RDY 16
CBB_A21 50 TPS2220APWPRG-GP
17 2 3
VPP_ASKT_S0 51 74.02220.A7G
18 CARDBUS-SKT43-GP
52 21.H0056.011
CBB_A16 19
CBB_A22 53
1

C743 CBB_A15 20
C747 CBB_A23 54
SCD1U25V3ZY-1GP
SC4D7U10V5ZY-3GP CBB_A12 21
2

CBB_A24 55
CBB_A7 22
CBB_A25 56
CBB_A6 23
CBB_VS2# 57
CBB_A16 CBB_A5 24
CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59
CBB_A3 26
B CBB_INPACK# B
60
CBB_A2 27
CBB_REG# 61
Place close to pin 19. CBB_A1 28
1

CBB_BVD2# 62
C744 CBB_A0 29
DUMMY-C2 CBB_BVD1# 63
CBB_D0 30
CBB_D8 64
CBB_D1 31
2

CBB_D9 65
CBB_D2 32
CBB_D10 66
CBB_WP 33
Clock AC termination CBB_CD2# 67
34
33MHz clock for 32-bit 68
Cardbus card I/F NP2

CARDBUS68P-11-GP
62.10024.601
1

C741 DY
SCD01U16V2KX-3GP
2

om
A A

l.c
ai
Wistron Corporation

tm
ho
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

f@
in
Title

xa
PCMCIA

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 27 of 57
5 4 3 2 1
A B C D E

4 4

5VA_S0
5V_S0

1
1
C431 R281
SC22P50V2JN-4GP 28K7R2F-GP

2
U15

2
1 5 5VA_SET
SHDN# SET
2 5VA_S0
GND

1
3 IN OUT 4
R280

1
G923-330T1UF-GP 10KR2F-2-GP

1
C434
SC1U10V3KX-3GP C423

2
SC10U10V5ZY-1GP

2
1 2 C413 3D3V_S0 5VA_S0
25 PCI_SPKR
SCD47U10V3ZY-GP "VAUX" Pull high to enable standby mode
RN40
CB_SPKR_1 4 5

1
16 ACZ_SPKR 1 2 C404 3 6 C408 C422

1
SCD47U10V3ZY-GP KBC_BEEP_1 2 7 AUDIO_BEEP 1 2AUDIP_PC_BEEP C433
3 SPKR_SB_1 1 8 C411 C406 SCD1U10V2KX-4GP 3

2
SC1U10V3KX-3GP

2
SRN47KJ-1-GP

1
31 KBC_BEEP 1 2 C405 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
SCD47U10V3ZY-GP R257 C407 SCD1U10V2KX-4GP
1KR2J-1-GP SC100P50V3JN-2GP

2
ACZ_RST# 15,21
ACZ_SYNC 15,21

2
ACZ_BITCLK 15
2 1
R284 10KR2J-3-GP

25
38

12
11
10

33

44
43

34
13
1
9

6
U14

DVDD1
DVDD2
AVDD1
AVDD2

PCBEEP
RESET#

BIT-CLK
VAUX

SENSE_B
SENSE_A
SYNC

LFE-OUT
CEN-OUT
C430
C432
29 LINE_IN_L 2 1 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT 15,21
29 LINE_IN_R ALC861_LINE_IN_R LINE1-L SDATA-OUT AC97_DATIN
2 1 24 LINE1-R SDATA-IN 8 1 R258 2 ACZ_SDATAIN0 15
14 39R2J-L-GP
SC1U10V3ZY-6GP LINE2-L
29 AUD_MICIN_L SC1U10V3ZY-6GP 15 LINE2-R
SPDIFO 48 SPDIF 29
1

C418 SC1U10V3ZY-6GP 29 47 G1421_MUTE 29


R285 C420 SC1U10V3ZY-6GP LINE1-VREFO SPDIFI/EAPD
31 LINE2-VREFO
0R0402-PAD

1
45
2 1 ALC883_MIC1_L
21
ALC 883 SIDESURR-OUT-L
46 R262
2

ALC_883MIC1_R MIC1-L SIDESURR-OUT-R 4K7R2J-2-GP


29 AUD_MICIN_R 2 1 22 MIC1-R
16 MIC2-L
R283 17 39

2
2K2R2J-2-GP MIC2-R SURR-OUT-L
2
SURR-OUT-R 41 2
1 2 MIC1V_R 32
MIC1V_L MIC1-VREFO-R
1 2 28 MIC1-VREFO-L
30 MIC2-VREFO FRONT-OUT-L 35 AUD_LOL 29
R282 36 AUD_LOR 29
2K2R2J-2-GP FRONT-OUT-R

PIN37_VREFO
2

CD-GND
DVSS1
DVSS2

JDREF
AVSS1
AVSS2
1

GPIO0
GPIO1
VREF

CD-R
CD-L
ALC883-1-GP 71.00883.A0G
26
42
4
7

27

40
37

2
3

18
20
19
C791 C790
SC4D7U10V5ZY-3GP
SYS_LOUT_IN# 29
SC4D7U10V5ZY-3GP
TP61 TPAD30
TP63 TPAD30
2
1

C436 DY C435 R266


4K99R2F-L-GP
SC10U10V5ZY-1GP SCD47U10V3ZY-GP
2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
AZALIA CODEC - ALC883
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 28 of 57
A B C D E
A B C D E

AUDIO OP AMPLIFIER
I/P signal level
need +5V level
5V_S0
4 R279 4
1 2
0R0603-PAD AMP_SHUTDOWN 31

1
C409 C424 C412 C421

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY

1
2

2
TP62 R261
TPAD28 10KR2J-3-GP

2
U13

20

15

13
4

5
LVDD
RVDD

SHUTDOWN
VOL

IN1#/IN2
SC1U10V3ZY-6GP SC1U10V3ZY-6GP
C416 R259 10KR2J-3-GP R265 10KR2J-3-GP C417
28 AUD_LOL 1 2 SOUND_L2 1 2 SOUND_L_OP1 1 LIN1 RIN1 18 SOUND_R_OP1 2 1 SOUND_R2 2 1 AUD_LOR 28
R260 10KR2J-3-GP 2 17 R264 10KR2J-3-GP
SOUND_L_OP1 SPKR_L+ LIN2 RIN2 SPKR_R+ SOUND_R_OP1
1 2 24 LOUT+ ROUT+ 19 2 1
SPKR_L- 7 12 SPKR_R- 5VA_OP_S0
LOUT- ROUT-

LBYPASS 3

1
1 2 6 2 1
DY 8
NC#6
NC#8 RBYPBASS 16 R579
C415 23 C419 100KR2J-1-GP
SC1U10V3ZY-6GP NC#23 SC1U10V3ZY-6GP

LINE IN

GND/HS
GND/HS
GND/HS
GND/HS
R580 49K9R2F-L-GP

2
MUTE
1 2

GND
GND
LIN2

C
1

1
3 C410 Q35 3
B 2N3906-3-GP-U R581 NP2

11

9
10
21
22

14
25
G1432Q5U-GP SC2D2U16V5ZY-2GP 100KR2J-1-GP NP1

2
D18 5

E
5V_S0 5VA_OP_S0 4 3 5VA_OP_S0 4

2
31 KBC_MUTE R274 2 AUD_LINE_R
28 LINE_IN_R 1 3
G17 1KR2J-1-GP 6

1
1 2 5 2 MUTE_5 1 R271 2 AUD_LINE_L 2
28 G1421_MUTE R582 28 LINE_IN_L 1KR2J-1-GP 1

1
1

10KR2J-3-GP R272
10KR2J-3-GP R273
GAP-CLOSE-PWR 100KR2J-1-GP
1

1
SYS_LOUT_IN 6 1 EC66 EC67 PHONE-JK234-GP
C437 R263 R583 49K9R2F-L-GP SC1KP16V2KX-GP SC1KP16V2KX-GP 22.10133.B11

2
1

SC4D7U10V5ZY-3GP RB731U-1GP-U 100KR2J-1-GP 1 2


2

2
R269 R270

2
2
1

1
10KR2J-3-GP 10KR2J-3-GP C425 Q36
2

B 2N3906-3-GP-U R584
SC2D2U16V5ZY-2GP 100KR2J-1-GP
2

E
KBC_MUTE_GPIO8

2
LINE OUT 5VA_OP_S0

Internal Speaker

1
1

6
2 R268 2
R267 10KR2J-3-GP
10KR2J-3-GP U12 SPKR_L- 4
SPKR_L+ 3

2
SYS_LOUT_IN 4 3 SPKR_R- 2 SPKR1
2

Q18 ON/OFF# NC#3 ACES-CON4-1-GP


GND 2
3 OUT 5V_S0 5 IN OUT 1 SPKR_R+ 1 20.D0197.104
SYS_LOUT_IN# 2 R1

1
IN 1 GND EC70

1
R2 C414 AAT4250IGV-T1-GP

5
SCD1U16V2ZY-2GP

1
2
3
4
DTC114EUA-1-GP SCD1U16V2ZY-2GP

5V_SPDIF_S0
SRC100P50V-2-GP
ERC10

8
7
6
5
1st source: 20.D0197.104

LOUT1
9
MIC IN LIN1 28 SPDIF
8
7
16
GND
VCC
VIN
NP2 6
NP1 28 SYS_LOUT_IN# 5
R278 5 C844 SC10U6D3V6MX-2GP 4
1KR2J-1-GP 4 AUD_LOL 1 2 SPKR_L+1 1 2 R566 22R2J-2-GP SPKR_L_A1 2
1 2 AUD_MIC_R 3 3

om
1 28 AUD_MICIN_R AUD_LOR SPKR_R+1 1
13 INT_MIC 6 1 2 1 2 R565 22R2J-2-GP SPKR_R_A1 1

l.c
1 2 R275 1KR2J-1-GP AUD_MIC_L 2 NP1
28 AUD_MICIN_L
1

1 C845 SC10U6D3V6MX-2GP NP2

ai
1
1

10KR2J-3-GP R276
10KR2J-3-GP R277

R564 R563

tm
1

1
1KR2J-1-GP

1KR2J-1-GP

EC68 EC69 PHONE-JK233-GP C789 C788 EC64 EC63


Wistron Corporation

ho
SC1KP16V2KX-GP 22.10133.B01 PHONE-JK237-GP-U
SC680P50V2KX-2GP

SC680P50V2KX-2GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

f@
SC1KP16V2KX-GP 22.10205.251
2

2
Taipei Hsien 221, Taiwan, R.O.C.
2
2

in
xa
Title

he
AUDIO AMP AND JACK
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 29 of 57
A B C D E
A B C D E

PCI_AD[31..0]
16,24,25 PCI_AD[31..0] 3D3V_S0

MINI1
125

1
1 2 C162 C186 C187

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
3 4

2
4 5 6 4
7 8
9 10
80211_ACTIVE 11 12 PIN 3-16 : LAN RESERVE
26,31 WIRELESS_EN 13 14
15 16
INT_PIRQE# 17 18 5V_S0
3D3V_S0 19 20 INT_PIRQE# 16
S-VIDEO-C 21 22 S-VIDEO-Y
23 24
3 PCLK_MINI 25 26 PCIRST1# 16,25,27
27 28 3D3V_S0
16 PCI_REQ#1 29 30 3D3V_S0
PCI_GNT#1 16

1
31 32
PCI_AD31 33 34 PME#_MINI TPAD28 TP72 C161
PCI_AD29 35 36 BT_COEX1 SC22P50V2JN-4GP

2
37 38 PCI_AD30 TPAD28 TP71
PCI_AD27 39 40
PCI_AD25 41 42 PCI_AD28
TP77 TPAD28 BT_COEX2 43 44 PCI_AD26

1
PCI_C/BE#3 45 46 PCI_AD24
16,24 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD21 R117
49 50 R94 100KR2J-1-GP
PCI_AD21 51 52 PCI_AD22 100R2J-2-GP WLAN_LED# 13,26
PCI_AD19 53 54 PCI_AD20

2
55 56 PCI_PAR 16,24
PCI_AD17 57 58 PCI_AD18
PCI_C/BE#2 59 60 PCI_AD16 D
16,24 PCI_C/BE#2
16,25 PCI_IRDY# 61 62

3
3 63 64 3
PCI_FRAME# 16,25
16,25,31,32 PM_CLKRUN# 65 66 PCI_TRDY# 16,25
16,25 PCI_SERR# 67 68 PCI_STOP# 16,25 2N7002PT-U
69 70 80211_ACTIVE 1
71 72 Q10
16,25 PCI_PERR# PCI_DEVSEL# 16,25 G
PCI_C/BE#1 73 74
16,24 PCI_C/BE#1

2
PCI_AD14 75 76 PCI_AD15
77 78 PCI_AD13 S
PCI_AD12 79 80 PCI_AD11
PCI_AD10 81 82
83 84 PCI_AD9 D
PCI_AD8 85 86 PCI_C/BE#0
PCI_C/BE#0 16,24

3
PCI_AD7 87 88
89 90 PCI_AD6
PCI_AD5 91 92 PCI_AD4
CVBS PCI_AD2 WIRELESS_EN 2N7002PT-U
93 94 1
PCI_AD3 95 96 PCI_AD0 Q9
G
5V_S0 97 98

2
PCI_AD1 99 100 INT_SERIRQ 16,25,31,32
101 102 S
103 104
105 106
107 108
109 110
111 112 AUDIO-LEFT
113 114
115 116

OUT
117 118
119 120

3
2 AUDIO-RIGHT 2
121 122

R1
123 124
126

R2
Q26
PCISLT124-4-GP CHDTC124EU-1GP
62.10032.061

2
GND
IN
31 WLAN_TEST_LED

TVIN1 AVIN
8
S-VIDEO-Y 1
CN3 close to JK1
4
Layout 75 ohm CN3 AVIN CVBS 2
JK1 AVIN AUDIO-RIGHT 5
1 2 1 S-VIDEO-C 7
RF GND AUDIO-LEFT
5 2 IN 6
4 3 3 GND 3
9

1
YTH-CONN5-1-GP-U
20.90045.001
IPEX-CON3
20.G0005.001
AV-IN MINDIN7-15-GP-U
22.10021.F41
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI-PCI / AV-IN
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 30 of 57
A B C D E
A B C D E

3D3V_AUX_S5 5V_S0
C44
SC18P50V2JN-1-GP
1 2
KCOL[18..1] KBC_XO
KCOL[18..1] 33

8
7
6
5
3D3V_AUX_S5 KROW[8..1]
KROW[8..1] 33
RN6
3D3V_AUX_S5 X1
SRN10KJ-4-GP

2
RESO-32D768KHZ-GP 3D3V_S0
1

4 1 3 4 4
C16 C53 C73 1 L3 2 3D3V_KBC_AUX_S5

1
2
3
4

G
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

1
0R0603-PAD

KBC_SDA2
KBC_SCL2
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

1
BAT_SDA
BAT_SCL
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
C42

SCD1U16V2ZY-2GP
SC18P50V2JN-1-GP

1
C25 KBC_XI

G
1 2 3 2

S
1
C17

123
136
157
166

161

153
154

163
164
169
170

160
158
SCD1U16V2ZY-2GP Q6

16
34
45

95

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

71
72
73
74
77
78
79
80
U3 3 2 2N7002PT-U

D
KBC_SCL2

S
SMB_CLK_W 19

VCCA

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

SCL1
SDA1
SCL2
SDA2

XCLKO
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCBAT

XCLKI
KBC_SDA2 SMB_DATA_W 19
Q7
2N7002PT-U
LPC_LAD[3..0] 3D3V_AUX_S5
15,32,34 LPC_LAD[3..0] 3D3V_S0 3D3V_S5
LPC_LAD0 15 155 MATRIXID2# 34
LPC_LAD1 LAD0 GPIO29
14 149
LPC_LAD2 13
LAD1
LAD2
KB Matrix GPIO28
GPIO27 148
MATRIXID1# 34
PRE_CHG 42

1
LPC_LAD3 10 119
LAD3 LPC GPIO26
GPIO25 118
BLT_BTN# 13
CHG_ON# 42
R14 R57 R21 R654 R60
15,32,34 LPC_LFRAME# 9 109 100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP 10KR2J-3-GP 10KR2J-3-GP
LFRAME# GPIO24 AD_OFF 43
3 PCLK_KBC 18 LCLK GPIO23 108 WEBCAM_PW_SW 13
16,25,30,32 INT_SERIRQ 7 107 E51TXD TP1

2
SERIRQ GPIO22
GPIO21 106
105 E51CS#
KBCBIOS_RD# GPIO20 BAT_IN#
34 KBCBIOS_RD# 150 RD# GPIO19 86 STDBY_LED# 13
KBCBIOS_WE# 151 85 KBC_BB_ENABLE#
34 KBCBIOS_WE# KBCBIOS_CS# WR# GPIO18 WEBCAM_PW_SW
34 KBCBIOS_CS# 173 MEMCS# GPIO17 75 INTERNET# 33
152 70 MAIL# 33 PM_PWRBTN#
KBC_D[7..0] IOCS# GPIO16
34 KBC_D[7..0] GPIO15 69 PM_SLP_S4# 16,41
KBC_D0 138 63 CHG_3S_4S# 42
KBC_D1 D0 GPIO14
139 D1 GPIO13 62 PM_SUS_STAT# 16,32
KBC_D2 140 55 CRT_DEC 14
KBC_D3 D2 GPIO12
141 D3 GPIO11 54 CAP_LED# 13
3 KBC_D4 144 48 FRONT_PWRLED# 13 3
KBC_D5 D4 GPIO10
145 D5 GPIO09 22
KBC_D6 146 21 KBC_MUTE 29
KBC_D7 D6 GPIO08 3D3V_AUX_S5
147 D7 GPIO07 20 KEY5# 33
12 GPIO6_KBC
GPIO06
D6 124 11
34 A0 A0 X-bus GPIO05 GMODULE_RST# 46

15

15
KA20GATE_1

KBRCIN#_1
6

5
1

2
KA20GATE

KBRCIN#
34
34
34
34
A1
A2
A3
A4
125
126
127
128
131
A1
A2
A3
A4
ROM KB3910 GPIO04
GPIO03
GPIO02
GPIO01
8
6
5
4
3
KBRCIN#
KA20GATE
WIRELESS_BTN# 13

KEY4# 33
BAT_IN# 43
43
43
BAT_SCL
BAT_SDA
2
1
RN47
3
4
34 A5 A5 GPIO00 SRN8K2J-3-GP
34 A6 132 A6
34 A7 133 A7 GPIO0F 41 WLAN_TEST_LED 30
4 3 ECSCI# 143 28 ECSMI# ECSMI# 16 R53 DY
16 ECSCI#_1 34 A8 A8 GPIO0E 10KR2J-3-GP
34 A9 142 A9 GPIO0D 27 WIRELESS_EN 26,30
135 25 PM_CLKRUN# 16,25,30,32 KBC_SLP_WAKE 2 1
34 A10 A10 GPIO0C
CH731UPT-GP 34 A11 134 A11 GPIO0B 24 FPBACK 13 PLT_RST1# 7,16,18,22,26,32,34,46,51
34 A12 130 A12 GPIO0A 23 NUM_LED# 13
129 R34 DY
34 A13 A13 3D3V_S5 10KR2J-3-GP
34 A14 121 A14 GPIO1F 98 BLUETOOTH_EN 21
120 97 DC_BATFULL# 13 PRE_CHG 2 1
34 A15 A15 GPIO1E

1
34 A16 113 A16 GPIO1D 94 BLT_LED#_1 13
112 93 BLT_LED#_2 13 R50
34 A17 A17 GPIO1C 100KR2J-1-GP
34 A18 104 A18 GPIO1B 92 MAIL_LED# 33
34 A19 103 A19 GPIO1A 91 CHARGE_LED# 13

2
168 VCC3VSB
5V_S0 GPIOI2D
33 TDATA_5 117 PSDAT3 GPIO2F 175

1
RN4 116 171 AMP_SHUTDOWN 29 C57
33 TCLK_5 PSCLK3 GPIO2E KBC_PCIRST# SC1U10V3ZY-6GP
8 1 115 165 1 2
7 2 114
PSDAT2 PS/2 GPIO2C
162 KBC_BL_ON R49 0R0402-PAD

2
PSCLK2 GPIO2B
6 3 111 PSDAT1 GPIO2A 156

1
5 4 110 C51
PSCLK1 SC150P50V2JN-3GP

2
2 SRN10KJ-4-GP 2

BATGND
ECRST#
5V_S0
GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7

ECSCI#
PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0

AGND
RN3 R46 UMA

GND
GND
GND
GND
GND
GND
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
1 4 TCLK_5 0R2J-2-GP
2 3 TDATA_5 1 2 BL_ON 7
KB3910SF-2-GP
43
40
39
38
37
36
33
32

2
26
29
30
44
76
172
176

99
100
101
102
1
42
47
174

81
82
83
84
87
88
89
90

19
31

96
159

17
35
46
122
137
167
R47 0R2J-2-GP G72
SRN10KJ-5-GP 1 2 NV_BL_ON 51
KBC_BB_ENABLE#
RSMRST#_KBC

CIR_SENSE

EC_RST#
ECSCI#
28 KBC_BEEP
BRIGHTNESS

16 ECSWI#
A1 3D3V_AUX_S5

1
C29 SRN10KJ-5-GP

E
16 PM_PWRBTN#
1

G1 SC1U6D3V2KX-GP 2 3
2
16 RSMRST#_KBC GAP-OPEN
39 S5_ENABLE B 1 4 RSMRST# 19
13 BRIGHTNESS
1

CH3906PT-GP RN5 GMODULE_RST#

C
R13 Q2
2

10KR2J-3-GP GPIO6_KBC
16,18,35,40,41,45,56 PM_SLP_S3#
33 KBC_PWRBTN# S5_ENABLE
Place near K/B Connector (TOP side)
2

42 AC_IN#
33 KBC_LID#

1
KBC_SLP_WAKE
16 KBC_SLP_WAKE R59 R58 R141
8K2R2J-3-GP 8K2R2J-3-GP 8K2R2J-3-GP

2
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable

om
A4 for DMRP==>High=Disable,Low=Enable
1 A5 for EMWB==>High=Enable,Low=Disable 5V_AUX_S5 1

l.c
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended) 21 USB_PWR_EN#
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)

ai
1

tm
R36 DY

ho
10KR2J-3-GP
Wistron Corporation

f@
R35 0R0402-PAD
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
1 2 CIR_SENSE
32 CIR Taipei Hsien 221, Taiwan, R.O.C.

xa
he
Title

KBC ENE
Size Document Number Rev

MYALL2 MP
Date: Friday, March 31, 2006 Sheet 31 of 57
A B C D E
5 4 3 2 1

D D

LPC_LAD[3..0]
LPC_LAD[3..0] 15,31,34
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LPC_LDRQ0# 15
PLT_RST1# 7,16,18,22,26,31,34,46,51

INT_SERIRQ 16,25,30,31
3D3V_S0 LPC_LFRAME# 15,31,34

CLK14_SIO 3

1
C542 IR C547 IR C539 IR PCLK_SIO 3

1
C SC1U10V3ZY-6GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP C
2

2
R363 R355

24
35

32
36
38
40

16
27
28
30

43
25
8
U29 IR DUMMY-R2 DUMMY-R2

LCLK
LAD0
LAD1
LAD2
LAD3

LDRQ#/XOR_OUT
LRESET#
SERIRQ
LFRAME#
VDD
VDD
VDD

CLKIN
C546
DUMMY-C2

2
PCLK_SIO_RC
2 1
1 42 C537
CTS1# NC#42 DUMMY-C2
44 DCD1# NC#33 33
45 37 CLK14_SIO_RC 2 1
DSR1# NC#37
3 RI1# NC#39 39

VCORF
46
10
BADRR_STRAP 2
SIN1
VCORF SIO PC87381 NC#41
NC#4
41
4

IRRX2_IRSL0/GPIO17
DTR1#_BOUT1/BADDR NC#18 18
1

C543

RESERVED/GPO24
IR 47 26

CLKRUN#/GPIO22
RTS1#/TRIS# NC#26
1 48 29

GPIO21/LPCPD#
SCD1U16V2ZY-2GP R359 IR SOUT1/TEST# NC#29
31
2

10KR2J-3-GP NC#31

GPIO00
GPIO01
GPIO02
GPIO03
GPIO04
GPIO20

GPIO23
2

IRRX1

IRTX

VSS
VSS
VSS
PC87381-VBH-GP

11
12
13
14
15
17
21
19
22
20

5
7
6

9
23
34
Connecting a 10 K external pull-down resistor 71.87381.A0G
makes the base address sample low, setting the
Index-Data pair at 2Eh-2Fh.
B B

IRRX1
IRSL0
IRTX
R365 IR PM_CLKRUN# 16,25,30,31
10KR2J-3-GP
3D3V_S0 1 2 LPCPD# 1 2 PM_SUS_STAT# 16,31
R366
DUMMY-R2

Layout Guide:
VISHAY FIR/CIR Module (1) FIR_3D3V : 30 mils,
(2) C583, C581 close
R570 0R2J-2-GP IR to U32 Place C581
3D3V_S0 1 2
,C583 near Pin1
R569 DY U71
0R2J-2-GP
and Pin6
3D3V_AUX_S5 1 2 1 VCC2/IRED_ANODE
2 IRED_CATHODE
1

C795 IR C793 IR C794 IR IRTX 3


R568 IR IRRX1 TXD
4 RXD
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP 10KR2J-3-GP IRSL0 5
2

SD
6 VCC1
7
2

RC-RXD
A 8 GND A

FIR-TFDU7100-GPU IR
31 CIR
56.15001.091 Wistron Corporation
IR_GND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G25 Taipei Hsien 221, Taiwan, R.O.C.
GAP-CLOSE
1 2 Title

SIO 87381 / IR
IR_GND Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 32 of 57
5 4 3 2 1
A B C D E

Cover Up Switch 3D3V_AUX_S5

1
3D3V_S5
R4
10KR2J-3-GP
RN2
MAIL#_1 8 1

2
INTERNET#_1 7 2 LID1
Internet Button Mail Button KEY4#_1 6 3 3
R3
KEY5#_1 5 4 1 COVER_SW# 1 2 KBC_LID#
KBC_LID# 31

1
4 SW2 SRN10KJ-4-GP 2 100R2F-L1-GP-U 4
SW3 1 2 4 C3

1
1 2 MAIL_LED# EC4 1 2 SC100P50V2JN-3GP SCD22U16V3ZY-GP

2
1
C10 5 ACES-CON2-1-GP
5 C11 3D3V_AUX_S5 20.D0197.102

2
SCD1U16V2ZY-2GP 3 4

2
3 4 SCD1U16V2ZY-2GP

SW-TACT-45-U1-GP
TOUCH PAD

1
SW-TACT-45-U1-GP 62.40009.431
62.40009.431 5V_S0 5V_S0
R6
MAIL#_1 1 8 10KR2J-3-GP
INTERNET#_1 2 7 MAIL# 31

2
1

1
KEY4#_1 3 6 INTERNET# 31 EC14 DY
KEY5#_1 4 5 KEY4# 31 RN12 SCD1U16V2ZY-2GP C225
SW4 KEY5# 31 SRN10KJ-5-GP <2nd> SC1U10V3ZY-6GP TPAD1

2
1 2 PWRBTN# 2 1 KBC_PWRBTN# 31 13

1
SW5 SRN470J-3-GP 1
SCD1U16V2ZY-2GP

5 1 2 RN1 R7 C4

3
4
1

470R2J-2-GP SCD1U16V2ZY-2GP RN13 2

2
3 4 C12 5 31 TDATA_5 1 4 TP_DATA 3

4
3
2
1
31 TCLK_5 2 3 TP_CLK 4
2

3 4 SRC100P50V-2-GP 5
ERC9 SRN100J-3-GP EC12 EC13 6
SW-TACT-45-U1-GP SCRL1 TP_SCROLL_UP TP_RIGHT

SC47P50V2JN

SC47P50V2JN
Morar_SB 7

1
62.40009.431 SW-TACT-45-U1-GP 5V_S0 5V_S0 1 2 TP_SCROLL_RIGHT 8
5
6
7
8
62.40009.431 TP_SCROLL_UP 9
5 TP_SCROLL_LEFT 10
Power Button

2
1
3 TP_SCROLL_DOWN 11 3

2nd source: 20.K0185.012 LED2 LED1 3 4 TP_LEFT 12


LED-G-62-GP LED-Y-47-GP 14
SW-TACT-59-GP-U1
Program Button MAIL LED SCRL2 TP_SCROLL_LEFT 62.40009.431 SCRL3 TP_SCROLL_RIGHT
1 2 1 2 ACES-CON12-GP

1 K
1 2
POWER LED FOR 20.K0174.012
SW1 BUTTON 5 5
1 2 FOR BUTTON R9 R8
SIDE
1

SIDE 120R2F-GP 120R2F-GP 3 4 3 4


5 C9
SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
2

2
3 4 62.40009.431 62.40009.431
SCD1U16V2ZY-2GP MAIL_LED# 31 SCRL4 TP_SCROLL_DOWN LEFT1 TP_LEFT RIGHT1 TP_RIGHT
1 2 1 2 1 2
SW-TACT-45-U1-GP
62.40009.431 5 5 5
E-Button 3 4 3 4 3 4
2nd source: 62.40009.341 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1 SW-TACT-59-GP-U1
62.40009.431 62.40009.431 62.40009.431

EMI Bypass cap.


KROW[8..1] ERC7 DY
KROW[8..1] 31
SRC100P50V-2-GP
KCOL[18..1] ERC6 DY TP_DATA 1 8
2 KCOL[18..1] 31 2
KROW5 1 8 TP_CLK 2 7
KROW6 2 7 TP_RIGHT 3 6
KROW7 3 6 TP_SCROLL_RIGHT 4 5
KROW8 4 5
28

27

SRC100P50V-2-GP
KB1 ERC2 DY ERC8 DY
ETY-CON26-2-GP KCOL5 1 8 SRC100P50V-2-GP
20.K0127.026 KCOL6 2 7 TP_SCROLL_UP 1 8
KCOL7 3 6 TP_SCROLL_LEFT 2 7
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

KCOL8 4 5 TP_SCROLL_DOWN 3 6
TP_LEFT 4 5
SRC100P50V-2-GP
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

KROW8

ERC1 DY
KCOL1 1 8
KCOL2 2 7
KCOL3 3 6
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9

KCOL4 4 5
C76 SRC100P50V-2-GP
SC100P50V2JN-U ERC3 DY
KCOL17 1 2 KCOL9 1 8
KCOL10 2 7
C77 KCOL11 3 6
SC100P50V2JN-U KCOL12 4 5
KCOL18 1 2
SRC100P50V-2-GP
ERC5 DY
KROW1

om
1 1 8 1
KROW2 2 7

l.c
KROW3 3 6
Internal KeyBoard CONN

ai
KROW4 4 5
Wistron Corporation

tm
ho
SRC100P50V-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

f@
1 25 ERC4 DY
KCOL13 1 8

in
........ KCOL14 2 7 Title

xa
CHECK KB SPEC. AND PIN DEFINE KCOL15 3 6
BUTTONs / KB / TOUCHPAD

he
KCOL16 4 5
Size Document Number Rev
SRC100P50V-2-GP MP
MYALL2
Date: Thursday, March 30, 2006 Sheet 33 of 57
A B C D E
A B C D E

3D3V_AUX_S5

1
C787
SCD1U16V2ZY-2GP

2
U69
37 45 LPC_LAD[3..0]
VCC Q15/A-1 A0 31 15,31,32 LPC_LAD[3..0]
4 43 4

31 A19 16 A18
Q14
Q13 41 GOLDEN FINGER FOR DEBUG BOARD
31 A18 17 A17 Q12 39
31 A17 48 A16 Q11 36
31 A16 1 34 5V_S0 5V_S0
A15 Q10
31 A15 2 32 U70
A14 Q9 KBC_D[7..0]
31 A14 3 A13 Q8 30 KBC_D[7..0] 31
31 A13 4 44 KBC_D7 A1 B1
A12 Q7 KBC_D6 PLT_RST1# A1 B1 PLT_RST1#
31 A12 5 A11 Q6 42 7,16,18,22,26,31,32,46,51 PLT_RST1# A2 A2 B2 B2
31 A11 6 40 KBC_D5 15,31,32 LPC_LFRAME# LPC_LFRAME# A3 B3 LPC_LFRAME#
A10 Q5 KBC_D4 A3 B3
7 38 A4 B4
31
31
A10
A9 8
A9 Q4
35 KBC_D3 TOP VIEW PCLK_FWH A5
A4 B4
B5 PCLK_FWH
A8 Q3 KBC_D2 3 PCLK_FWH A5 B5
31 A8 18 A7 Q2 33 A6 A6 B6 B6

1
31 A7 19 31 KBC_D1 FWH_INIT# A7 B7 FWH_INIT#
A6 Q1 KBC_D0 R567 DY 15 FWH_INIT# A7 B7
31 A6 20 A5 Q0 29 A8 A8 B8 B8
31 A5 21 100R2J-2-GP LPC_LAD3 A9 B9 LPC_LAD3
A4 LPC_LAD2 A9 B9 LPC_LAD2
31 A4 22 A3 A15 (B1) LPC_LAD1
A10 A10 B10 B10
LPC_LAD1
31 A3 23 15 A11 B11

2
A2 RY/BY# LPC_LAD0 A11 B11 LPC_LAD0
31 A2 24 A1 A14 (B2) PCLKFWH EXT_FWH#
A12 A12 B12 B12
EXT_FWH# TP99 TPAD30
31 A1 25 A0 NC#14 14 A13 A13 B13 B13

1
13 C792 DY A14 B14
NC#13 A14 B14

....
10 A15 B15

....
NC#10 3D3V_S0 A15 B15 3D3V_S0
31 KBCBIOS_CS# 26 9 SC10P50V2JN-4GP

2
CE# NC#9
31 KBCBIOS_RD# 28 OE#
3 31 KBCBIOS_WE# 11 WE# A2 (B14) FOX-GF30 3
47 46 ZZ.GF030.XXX
BYTE# GND
R572
12 RESET# GND 27 A1 (B15)
10KR2J-3-GP MX29LV800CBTC-GP
1 2 72.29800.0F9

R571
10KR2J-3-GP
3D3V_AUX_S5 1 2
(BOTTOM VIEW)

72.29800.0F9 FOR LEAD FREE


ROM SIZE MAX. 1MB

2 3D3V_S0 2
2
1

SRN10KJ-5-GP
RN15
3
4

PH at ICH6M
SW6
16 PSW_CLR# 1 5
2 6
31 MATRIXID1# 3 7
31 MATRIXID2# 4 8
1

1 EC16 DY SW-DIP-4-2-U2-GP 1
SC1000P50V3JN-GP 62.40013.061 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

Title
BIOS
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 34 of 57
A B C D E
Run Power
5V_S0 5V_S5

DCBATOUT U37
C602
Q12 S D
1 2 1 8
TP0610K-T1-GP RUN_POWER_ON 2 S D 7
R124 S D
SCD1U16V2ZY-2GP 3 6
RUN_POWER1 RUN_POWER_ON G D

S
1 2 2 3 4 5

K
1

1
10KR2J-3-GP C234
R145 D11 AO4422-1-GP

1
3D3V_S0

330KR2J-L1-GP
3D3V_S5

MMGZ5242BPT-GP
SCD1U50V3ZY-GP
U36

2
G
1 S D 8

A
2
R125 2 S D 7
330KR2J-L1-GP 3 S D 6
1 2RUN_POWER2 4 G D 5

1
R653 R126 AO4422-1-GP
100R2F-L1-GP-U 1KR2J-1-GP
3D3V_S0 1 2

PM_SLP_S3 2
D D 1D8V_S0 1D8V_S3
U46
3

3
Q37 Q38 1 S D 8
2N7002PT-U 2N7002PT-U R144 G72 2 S D 7
1 1 0R2J-2-GP 3 S D 6
G G 1 2 4 G D 5
OUT
2

2
AO4422-1-GP
3
S S
R1

1
G72
R2

Q11 C230
CHDTC124EU-1GP DUMMY-C2

G72
1

2
GND
IN

16,18,31,40,41,45,56 PM_SLP_S3#

Aux Power
3D3V_AUX_S5

5V_AUX 5V_AUX_S5 3D3V_AUX 3D3V_AUX_S5 3D3V_AUX_S5

R649 0R0402-PAD R650 0R0402-PAD

SC22P50V2JN-4GP
1 2 1 2 Rx

1
1
C306 R218 DY
DY 16K5R2F-1-GP

2
U8 Output = 3.3V

2
1 5 3D3V_G913_SET output=1.25(1+(Rx/Ry))
SHDN# SET
2 GND
3 IN OUT 4

1
SC1U10V3ZY-6GP

SC1U10V3ZY-6GP
C309 R219 DY

1
5V_AUX_S5 C663 DY C312 C313 G913CF-GP DY C307 C308 10KR2F-2-GP
SCD1U16V2ZY-2GP DCBATOUT C305

DUMMY-C3
1 2 SC10U10V5ZY-1GP Ry

2
SC10U10V5ZY-1GP

SC1U10V3ZY-6GP
DY
2

U57
1

C671 DY C675 DY 1 8
SC1U10V3ZY-6GP OUTPUT INPUT
2 SENSE FEEDBACK 7
1

SCD1U16V2ZY-2GP C656 DY

om
3 6
2

SHUTDOWN VO TAP C661 SC1U50V5ZY-1-GP


4 100mA

l.c
GND
DUMMY-C5

5
2

ERROR# OUTPUT

ai
tm
Wistron Corporation

ho
LP2951CDR2G-GP DY
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

f@
Taipei Hsien 221, Taiwan, R.O.C.

in
xa
Title
RUN POWER and 3D3V_AUX_S5

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 35 of 57
5 4 3 2 1

Max8744 3D3V/5V
CPU_CORE
Intersil ISL6262 Input Power Output Signal
PGOOD1(OD / 5V)
VID Setting Output Signal DCBATOUT
H_VID0 VIN
VID0(I / 1.05V) 6262_PWRGOOD PGOOD2(OD / 5V)
D H_VID1 PGOOD(OD / 3.3V) D
VID1(I / 1.05V)
H_VID2 CLK_EN#
VID2(I / 1.05V) CLK_EN#(O)
H_VID3 Output Power
VID3(I / 1.05V)
H_VID4
VID4(I / 1.05V)
H_VID5 5V_DC_S5 (5A)
VID5(I / 1.05V) Output Power 5V(O)
H_VID6
VID6(I / 1.05V) VCC_CORE_S0(Imax=48A)
VCC_CORE_PWR(O)
Input Signal 3D3V_DC_S5 (5A)
PSI# Input Signal 3D3V(O)
PSI# (I / 3.3V)
CPUCORE_ON
PGD_IN (I / 3.3V) Max8744_ON3
PM_DPRSLPVR ON3
DPRSLPVR (I / 3.3V)
H_DPRSTP#
DPRSTP# (I / 3.3V) Max8744_ON5
ON5

Voltage Sense
VCC_SENSE
C
VSEN(I / Vcore) C
VSS_SENSE
RTN(I / Vcore)

Input Power
DCBATOUT_6262
VCC(I)
0D9V_S3
5V_S0 5V_S5
VCC(I) VIN
1D8V_S0
3D3V_S0 ISL6269_VGA_Core 1D0V VLDOIN VTT
VCC(I)
PM_SLP_S3#
S3
Input Power Output Power VTTREF
PM_SLP_S5#
5V_S5 S5
VCC
1D0V (O)
1D0V (7.2A)
Charger_ISL6255 DCBATOUT TPS51100
B
VIN B

Input Signal Output Signal


CHG_ON#/OFF AC_IN
EN (I / 3.3V) ACPRN (O / 3.3V)
Input Signal
BAT_IN#
THM (I / 3.3V) CHARGE_LED# PM_SLP_S3# Adapter
XTAL2/PB4 (O/5V) EN

Input Signal Output Signal


KBC_SCL0 Output Signal AD_OFF DC_IN+
SCL (IO / 5V) PGOOD (I) (O)
PG
KBC_SDA0
SDA (IO / 5V)
Output Power
DCBATOUT Input Power Output Power
CHG_I_PRE_SEL VCC (O)
CHLIM (IO / 5V) AD_JK AD+
VCC(I) VCC(O)
BT+
VCC (O) 5V_AUX_S5
AC_IN VCC(I)
PB0/MOSI/AIN0

A A
Input Power
AD+
DCIN (I) Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram


Size Document Number Rev

MYALL2 MP
Date: Friday, March 24, 2006 Sheet 36 of 57
5 4 3 2 1
5 4 3 2 1

DCBATOUT_6262 3D3V_S0
DCBATOUT DCBATOUT_6262 5V_S0

1
1
G9 R220

1
1 2 R221 10R3J-3-GP

SCD1U25V3ZY-1GP
10R3J-3-GP R518
GAP-CLOSE-PWR 1K91R3F-GP

2
G10

2 6262_5VS0_VCC
1 2

2
1
C310 R517 0R0402-PAD
GAP-CLOSE-PWR 6262_PWRGOOD 1 2 VGATE_PWRGD 7,16
G7

6262_VIN
D 1 2 D

6262_AGND
GAP-CLOSE-PWR

22

VIN 20

48
1

1
G8
1 2 C311

3V3
VCC

PGOOD
SC1U10V3ZY-6GP

2
GAP-CLOSE-PWR
G4
1 2 21 35 6262_UGATE1 38
GND UGATE1
GAP-CLOSE-PWR 49 GND_T BOOT1 36 6262_BOOT1 1 R471
2 6262_BOOT1_1

1
G5 0R3-0-U-GP
1 2 C702
6262_AGND SCD22U16V3ZY-GP

2
GAP-CLOSE-PWR
G6 R516 0R0402-PAD 34 6262_PHASE1 38
6262_PSI# PHASE1
1 2 4 PSI# 1 2 2 PSI#
R515 0R0402-PAD 32 6262_LGATE1 38
CPUCORE_ON 6262_PGD_IN3 LGATE1
GAP-CLOSE-PWR 1 2 PGD_IN 6262_VSUM 1
PGND1 33 2
6262_RBIAS 4 R464 3K65R3F-GP
Place close to phase 1 chocke 6262_AGND 1
R513
2
147KR2F-GP RBIAS
24 6262_ISEN1 1 2
ISEN1 6262_ISENP1 38

1
5 DY
4 CPU_PROCHOT# VR_TT#

1
C703 R483 R465 10KR3J-L1-GP
1 R524 2 6262_NTC_1 1 2 6262_NTC 6 NTC
5V_S0 0R3-0-U-GP

SCD22U16V3KX-1-GP
4K02R3F-GP R446 NTC-470K-1-GP

2
6262_AGND C735 1 2 6262_AGND 1 2 6262_SOFT7 1 2 6262_ISENN1 38

2
SCD01U16V2KX-3GP C726 SCD015U25V3KX-GP SOFT
R482 0R0402-PAD 31 1 2 R466
5 H_VID[6..0] PVCC 1R3F-GP
C H_VID0 1 2 6262_VID0 37 C701 SC4D7U10V5ZY-3GP C
R485 0R0402-PAD VID0
H_VID1 1 2 6262_VID1 38 27 6262_UGATE2 38
R486 0R0402-PAD VID1 UGATE2
H_VID2 1 2 6262_VID2 39 26 6262_BOOT2 1 R472
2 6262_BOOT2_1
VID2 BOOT2

1
R487 0R0402-PAD 0R3-0-U-GP
H_VID3 1 2 6262_VID3 40 C700
R491 0R0402-PAD VID3 SCD22U16V3ZY-GP

2
H_VID4 1 2 6262_VID4 41
R492 0R0402-PAD VID4 6262_PHASE2 38 R467
PHASE2 28
H_VID5 1 2 6262_VID5 42 3K65R3F-GP
R494 0R0402-PAD VID5 6262_LGATE2 38
LGATE2 30
H_VID6 1 2 6262_VID6 43 6262_VSUM 1 2
R506 0R0402-PAD VID6
PGND2 29
CPUCORE_ON 1 2 6262_CORE_ON 44 R474 10KR3J-L1-GP
40 CPUCORE_ON VR_ON
R508 0R0402-PAD 23 6262_ISEN2 1 2
ISEN2 6262_ISENP2 38

SCD22U16V3KX-1-GP
1 2 6262_DPRSLP 45
16 PM_DPRSLPVR DPRSLPVR

1
R510 0R0402-PAD DY

1
1 2 6262_DPRSTP# 46 R475
4,15 H_DPRSLP# DPRSTP# 0R3-0-U-GP
R511 0R0402-PAD C708
1 2 6262_CLKEN# 47 C727

2
3 CLK_EN# CLK_EN#
1 2 6262_ISENN2 38

2
NC 25 6262_AGND 1 2
SC1000P50V3JN-GP R484
1R3F-GP
1 R514 2 1K82R3F-GP
R512 8 6262_OCSET 1 2
6262_VDIFF OCSET R519 11K5R3F-GP
1 2 1 2 13 VDIFF
1K4R3F-1-GP C725 SC470P50V2KX-3GP
6262_VSUM
6262_FB2_1

VSUM 19

1
B B
R489
1 2 6262_FB212 2K61R3F-GP
DY R521 2KR2F-3-GP FB2

2
1
6262_FB

6262_VSUM_2
11 FB

1
1 2 6262_COMP_1 1 2 C712 C711 R490

SCD22U10V3KX-2GP
R522 61K9R2F-GP SCD033U25V3KX-GP 11KR2F-L-GP

SCD033U25V3KX-GP
C729

1
1 2 6262_COMP10 ISL6262CRZ-T-GPU R445
C724 R523 4K42R3F-GP COMP NTC-10K-9-GP
SC390P50V3JN-GP 1 2
18 6262_VO

2
C738 SC47P50V3JN-GP VO
DROOP

1 2 6262_VW 9
VW

1
VSEN

Place close to phase 1 chocke


RTN

DFB

R493
1KR3F-GP

1
U64
15

14

16

17

C717

2
1 R507
2 6262_RTN 6262_DFB SCD22U10V2KX-1GP
5 VSS_SENSE

2
1

0R3-0-U-GP R505
C719 3K24R3F-1-GP 6262_AGND
SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

6262_DROOP

SCD01U25V2KX-3GP 1 2
2

1 R509
2 6262_VSEN
5 VCC_SENSE 0R3-0-U-GP G11
1

C718 C721 1 2

om
A A
1 2 6262_VO GAP-CLOSE-PWR
2

l.c
C713 SC180P-GP 6262_AGND

ai
Wistron Corporation

tm
ho
6262_AGND 6262_AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

f@
in
R503 10R3J-3-GP Title
CPU Vcore Power_1

xa
1 2 CPU_CORE 38 If VCC_SENSE and VSS_SENSE pins have pulled

he
R504 10R3J-3-GP
1 2 resistors to VCC_CORE_S0 Size Document Number Rev
CPU_GND 38
When test without cpu,change to 0 ohms ==> Remove R44/R45/R46/R47. MP
MYALL2
Date: Thursday, March 30, 2006 Sheet 37 of 57
5 4 3 2 1
5 4 3 2 1

DCBATOUT_6262
DCBATOUT_6262

1
C691 DY C692 DY C689 DY C690 DY C670 TC45 TC46 TC47 TC48 DY
SC10U25V0KX-3GP SC10U25V0KX-3GP SC10U25V0KX-3GP SC10U25V0KX-3GP SCD1U50V3ZY-GP
ST15U25VDM-1-GP ST15U25VDM-1-GP ST15U25VDM-1-GP ST15U25VDM-1-GP

2
5
6
7
8

5
6
7
8
D D

D
D
D
D

D
D
D
D
U53 U54
FDS6690A-3-GP FDS6690A-3-GP

Id=9.3A
Qg=9.8, Rdson=19.6~24mohm Panasonic ETQP4LR36WFC

G
S
S
S

G
S
S
S
10*11.5*4mm

4
3
2
1

4
3
2
1
0.34uH / 24A Iomax=44A
VCC_CORE_S0
DCR=1.1mohm
37 6262_UGATE1
1 L36 2
37 6262_PHASE1 L-D36UH-1-GP
37 6262_LGATE1

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
1

1
TC9 TC21 TC19 C645
SCD1U50V3ZY-GP

2
5
6
7
8

5
6
7
8

2
D
D
D
D

D
D
D
D
U52 U51 G55 G53
FDS6676AS-GP FDS6676AS-GP GAP-CLOSE-PWR GAP-CLOSE-PWR DY

1
Id=15A
Qg=48nC, Rdson=6.2~7.5mohm
G
S
S
S

G
S
S
S
6262_ISENN1 37
4
3
2
1

4
3
2
1
C 6262_ISENP1 37 C
PANASONIC
330uF / 2V / V size
ESR=9mohm / Iripple=3.7A

DCBATOUT_6262

1
C685 DY C686 DY C688 DY C687 DY C669
5
6
7
8

5
6
7
8

SC10U25V0KX-3GP SC10U25V0KX-3GP SC10U25V0KX-3GP SC10U25V0KX-3GP SCD1U50V3ZY-GP


D
D
D
D

D
D
D
D

U47
2

2
FDS6690A-3-GP

Id=9.3A U48
G
S
S
S

G
S
S
S

FDS6690A-3-GP Panasonic ETQP4LR36WFC


Qg=9.8, Rdson=19.6~24mohm
4
3
2
1

4
3
2
1

10*11.5*4mm
0.34uH / 24A
DCR=1.1mohm
37 6262_UGATE2 L35
B B
37 6262_PHASE2 1 2

L-D36UH-1-GP
37 6262_LGATE2

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
1

1
TC10 TC20 TC18

2
5
6
7
8

5
6
7
8

2
D
D
D
D

D
D
D
D

U50 U49 G54 G52


FDS6676AS-GP FDS6676AS-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
1

Id=15A
Qg=48nC, Rdson=6.2~7.5mohm
G
S
S
S

G
S
S
S

G100
4
3
2
1

4
3
2
1

GAP-CLOSE-PWR
37 CPU_CORE 2 1

G101
GAP-CLOSE-PWR
37 CPU_GND 2 1
37 6262_ISENP2

37 6262_ISENN2
If VCC_SENSE and VSS_SENSE pins have pulled
A
resistors to VCC_CORE_S0 A
==> Remove R44/R45/R46/R47.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU Vcore Power_2
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 38 of 57
5 4 3 2 1
5 4 3 2 1

DCBATOUT_51120 G83
1 2
G61
1 2 GAP-CLOSE-PWR
G84

1
GAP-CLOSE-PWR TC49 5V_PWR 1 2 5V_S5

5
6
7
8
G62 51120_V5FILT C799

D
D
D
D
1 2 U72 ST15U25VM-1-GP SCD1U50V3ZY-GP GAP-CLOSE-PWR
DCBATOUT DCBATOUT_51120

2
FDS6612A-1-GP G85
GAP-CLOSE-PWR R585 1 2
G63
D 1 2 51120_VREG5 1 2 GAP-CLOSE-PWR D

SC1U10V3KX-3GP

G
S
S
S
5D1R3F-GP G86

1
GAP-CLOSE-PWR 1 2

4
3
2
1
G64 C800 L42 IND-4D7UH-104-GP 5V_PWR 5V Iomax=5A
1 2 51120_DRVH1 GAP-CLOSE-PWR

2
51120_GND 51120_LL1 1 2 OCP>10A G87
GAP-CLOSE-PWR C801 1 2
G65 DCBATOUT_51120

5
6
7
8

ST220U6D3VDM-13GP
1 2 51120_LL2 1 251120_LL2_1 1 251120_VBST2 GAP-CLOSE-PWR

D
D
D
D
R586 0R3J-3-GP U73 DY G88

1
GAP-CLOSE-PWR SCD1U50V3ZY-GP FDS6690DS-GP DY 1 2
DY

1
R588
C803

1
C804 C802 30KR2F-GP TC28 GAP-CLOSE-PWR
51120_LL1 1 251120_LL1_1 1 251120_VBST1 SCD1U50V3ZY-GP TC29 G89

2
SE220U6D3VM-4GP

G
S
S
S
R587 0R3J-3-GP SC33P50V3JN-GP 1 2

2
SCD1U50V3ZY-GP 51120_V5FILT

4
3
2
1
5V_AUX 51120_VREG5 51120_VFB1 GAP-CLOSE-PWR
R589 0R0603-PAD NIPPON 220uF ESR=15mohm G90

1
3D3V_AUX 51120_VREG3 51120_COMP2 1 2 1 2
R591 0R0603-PAD 51120_DRVL1 R590
1

1
C805 C806 51120_COMP1
1 2 7K5R2F-1-GP GAP-CLOSE-PWR
SC10U10V5KX-2GP SC10U10V5KX-2GP DY
2

2
19
21

28
13

20
22

7
2
G91
3D3V_S5 3D3V_S0 51120_GND 1 2

VREG3
VREG5

VBST1
VBST2

V5FILT

COMP2
COMP1
VIN
GAP-CLOSE-PWR

1
R593 0R0603-PAD G92
C 1 2 51120_EN1 29 15 51120_LL2 R594 R595 3D3V_PWR 1 2 3D3V_S5
C
31 S5_ENABLE EN1 LL2
1 2 51120_EN2 12 26 51120_LL1 100KR2J-1-GP 100KR2J-1-GP
TP97 TPAD30 R592 0R0603-PAD EN2 LL1
10 GAP-CLOSE-PWR
TP98 TPAD30 EN3
9 G93

2
R596 0R0603-PAD EN5 51120_PGD1
PGOOD1 30 1 2 8744_PG3 41 1 2
1 2 51120_VFB2 6 11 51120_PGD2 R5971 0R2J-GP
2
51120_VFB1 VFB2 PGOOD2 R599 0R2J-GP
51120_V5FILT 1 2 3 GAP-CLOSE-PWR
R598 0R0603-PAD VFB1 51120_DRVL1 DCBATOUT_51120
25 G94
5V_PWR DRVL1 51120_DRVL2
1 VO1 DRVL2 16 1 2
3D3V_PWR 8 VO2 51120_DRVH1
27 GAP-CLOSE-PWR
DRVH1

1
51120_VREF2 4 14 51120_DRVH2 TC50 G95
VREF2 DRVH2
1 2

SKIPSEL
1

5
6
7
8
TONSEL
ST15U25VM-1-GP
PGND1
PGND2

2
D
D
D
D
C807 U74 GAP-CLOSE-PWR
GND
GND

CS1
CS2
SC1000P50V3JN-GP

FDS6612A-1-GP G96
2

U60 1 2
24
17
5
33

23
18

151120_SKIPSEL 32
31
51120_GND TPS51120RHBR-GPU1 GAP-CLOSE-PWR

G
S
S
S
3D3V Iomax=5A G97
1 2

4
3
2
1
L43 IND-4D7UH-104-GP 3D3V_PWR OCP>10A
R600 0R0402-PAD 51120_DRVH2 GAP-CLOSE-PWR
51120_V5FILT 51120_TONSEL 1 251120_VREF2 51120_LL2 1 2 G98
51120_GND 1 2
1 2 51120_CS1

5
6
7
8

ST220U6D3VDM-13GP
R601 15KR2F-GP GAP-CLOSE-PWR

D
D
D
D

SC33P50V3JN-GP
R603 U75 NIPPON 220uF ESR=15mohm
1 2 51120_CS2 0R0603-PAD FDS6690DS-GP DY

1
B R602 15KR2F-GP B
DY

1
C810 TC30 TC31
2

R604 SE220U6D3VM-4GP
DY

2
30K9R3F-GP
G
S
S
S
51120_GND

4
3
2
1

2
51120_VFB2 G99
51120_DRVL2 1 2

1
R605 GAP-CLOSE-PWR
51120_COMP1 51120_COMP2 13KR2F-GP
1

DY
1

R606 51120_GND

2
DY 30KR2F-GP R607
DY DY 22KR2F-GP
1

GND VREF2 FLOAT V5FILT 51120_GND


2

C811 C812
51120_COMP1_PL

DY
2
SC390P50V3JN-GP

SC390P50V3JN-GP

51120_COMP2_PL

Vout=1V*(R1+R2)/R2
2

AUTOSKIP
SKIPSEL AUTOSKIP /FAULTS PWM PWM DY
OFF
1
SC1000P50V3JN-GP

SC680P50V3JN-GP
1

C814
COMP CURRENT D-Cap C813
N/A N/A
2

MODE MODE DY
2

TONSEL 380k/CH1 280k/CH1 220k/CH1 180k/CH1 51120_GND For TPS51120,


590k/CH2 330k/CH2 280k/CH2 51120_GND

om
A 430k/CH2 Vout=5V A

l.c
VFB1 5V 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.

ai
N/A not use ADJ. 2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm. Wistron Corporation

tm
Fixed Output

ho
VFB2 3.3V 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm. 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
not use Taipei Hsien 221, Taiwan, R.O.C.

f@
N/A ADJ. Fixed Output Vout=3.3V

in
1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Title

xa
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON 2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm. 3D3V_S5 & 5V_S5

he
3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. Size Document Number Rev
EN3,EN5 LDO OFF not use LDO ON VREG3 on MP
MYALL2
Date: Thursday, March 30, 2006 Sheet 39 of 57
5 4 3 2 1
5 4 3 2 1

5V_S5 1D8V_S3

D D

1
C815 C816 C817
3D3V_S0 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC4D7U10V5ZY-3GP

2
1
G78
R608 1 2
100KR2J-1-GP
GAP-CLOSE-PWR
U62

6
G79

2
1 2

VCNTL
37 CPUCORE_ON 7 POK VIN 5
9 Vo(cal.)=1.058V GAP-CLOSE-PWR
R609 10KR2J-3-GP VIN
G80
1 2 8 3 5912_VOUT_1D05V 1 2 1D05V_S0
16,18,31,35,41,45,56 PM_SLP_S3# EN VOUT
VOUT 4

1
GAP-CLOSE-PWR

1
C818 R610 TC32 G81
SCD1U16V 10KR2J-3-GP 2 R611 C819 1 2

GND
FB

SC330P50V3JN-GP
DY 2KR2F-3-GP

ST100U6D3VBML1GP
GAP-CLOSE-PWR

2
APL5912-KAC-GP

2
SO-8-P KEMET
100uF, 6V, B2 Size

1
Add 10K PL for R612 ESR=40mohm
solve EN pin issue
6K19R3F-1-GP
Vo=0.8*(1+(R1/R2))

2
C C

3D3V_S0 U4 2D5V_S0

VOUT 2
3 VIN
GND 1

1
C43 C41 C46 C47
APL5308-25AC-1GPU

SC1U10V3ZY-6GP
DY DY

2
SC2D2U16V5ZY-2GP

SC10U10V5ZY-1GP
SC10U10V5ZY-1GP

5V_S5 1D8V_S3

B B
1

1
C672 1D5V_LDO C667 1D5V_LDO C666 1D5V_LDO
3D3V_S0 SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC4D7U10V5ZY-3GP
2

2
1

G48
R457 DY 1 2
1KR2J-1-GP
U56 1D5V_LDO GAP-CLOSE-PWR
6

G49
2

1 2
VCNTL

7 POK VIN 5
9 GAP-CLOSE-PWR
R456 10KR2J-3-GP VIN
1D5V_LDO G50
1 2 8 3 5912_VOUT_1D5V 1 2 1D5V_S0
16,18,31,35,41,45,56 PM_SLP_S3# EN VOUT
VOUT 4
1

GAP-CLOSE-PWR
1

C668 R454 C646 TC22 1D5V_LDO G51


SC330P50V3JN-GP

SCD1U16V 10KR2J-3-GP 2 R449 ST100U6D3VBML1GP 1 2


GND

FB 2KR2F-3-GP
DY 1D5V_LDO
2

1D5V_LDO GAP-CLOSE-PWR
2

APL5912-KAC-GP
1

SO-8-P KEMET
100uF, 6V, B2 Size
1

1D5V_LDO
Add 10K PL for R447 ESR=40mohm
solve EN pin issue 2K26R3F-GP
1D5V_LDO Vo=0.8*(1+(R1/R2))
A A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D05V / 1D5V/2D5V
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 40 of 57
5 4 3 2 1
A B C D E

3D3V_S5
Ioc = 40uA*Roc/Rds G66
1 2
Roc close high side MOS Drain pin GAP-CLOSE-PWR

3D3V_S5 G69
1 2

GAP-CLOSE-PWR

4 G68 4

1
5V_S5 1 2

1
R480 C699
12KR2J-L-GP SC470P50V2KX-3GP GAP-CLOSE-PWR

1
2N7002TPT-GP
C676 G67

1
SC1U10V3ZY-6GP
3D3V_7057_S5 1 2
5V_S5

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SCD1U25V3ZY-3GP
D31

2
D BAT54PT-GP GAP-CLOSE-PWR

1
D
U61 C660 C659 C657 C658 C662
1 5 Q32

2
NC#1 VCC

5
6
7
8
39 8744_PG3 2 A DY DY

D
D
D
D
3 GND Y 4 G
G
NC7S14M5X-GP 1D8V_S3

7057_OCSET
S
7057_PHASE U55

SCD1U25V3ZY-3GP
S FDS6612A-1-GP G75

G
S
S
S
1 2
APW7057KC-TR-GP C681

4
3
2
1
GAP-CLOSE-PWR
8 1 7057_BOOT 1 2
R470 PHASE BOOT L40
7 2 7057_UGATE G76
R469 OCSET UGATE
1D8V_PWR 1 2 7057_FB 6 3 1 2 1D8V_PWR 1 2
7057_VCC FB GND 7057_LGATE
5V_S5 1 2 5 VCC LGATE 4

1
IND-3D3UH-57GP GAP-CLOSE-PWR
3KR2F-GP R479 G73
4D7R3J-L1-GP

1
C697 2K4R2F-GP U59 1 2

5
6
7
8

ST220U4VDM-L6-GP
1 2 C696

D
D
D
D
3 SC1U10V3ZY-6GP GAP-CLOSE-PWR 3
2

2
SCD1U25V3ZY-3GP G71

1
U58 TC23 TC24 1 2
DY
FDS6690DS-GP GAP-CLOSE-PWR

2
G
S
S
S
Vout = 0.8V(1+Rout/Rgnd) G70
1 2

4
3
2
1
SE330U4VM-1GP GAP-CLOSE-PWR
G72
NIPPON 1 2

330uF,4V, H=5.8mm GAP-CLOSE-PWR


G74
ESR=15mohm 1 2

GAP-CLOSE-PWR

5V_S5
0D9V
Iomax=1A 1D8V_S3
0D9V_PWR DDR_VREF_S0
1

2 2
C370
1

SC10U10V5ZY-1GP C398 G14


2

1 2
2

SC10U10V5ZY-1GP GAP-CLOSE-PWR
G13
U10
1 2
R246 0R0402-PAD 10 1 GAP-CLOSE-PWR
VIN VDDQSNS
16,31 PM_SLP_S4# 1 2 9 2 G12
R247 0R0402-PAD S5 VLDOIN
8 GND VTT 3 1 2
1 2 7 S3 PGND 4
16,18,31,35,40,45,56 PM_SLP_S3# 6 5 GAP-CLOSE-PWR
VTTREF VTTSNS
GND

DDR_VREF_S3
1

TPS51100DGQ-1-GP
11

C373
1

SCD1U16V
2

C400 C399
SC10U10V5ZY-1GP
2

SC10U10V5ZY-1GP

om
1 1

l.c
ai
Wistron Corporation

tm
ho
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

f@
in
Title

xa
APW7057 / 1D8V/0D9V

he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 41 of 57
A B C D E
DY D25
2 1

SSM34PT DCBATOUT
AD+ U17 R319
8 D S 1 U22
7 D S 2 AD+_TO_SYS 1 2 1 S D 8
D S S D BT+
6 3 2 7
5 D G 4 D02R3720F-2-GP 3 S D 6

1
G D
DY EC6 EC23
4 5
AO4411-1-GP

1
SCD1U50V3ZY-GP

SCD1U50V3ZY-GP
AO4407-1-GP

2
2

1
C463 EC32
G21 G20 SCD1U50V3ZY-GP
For EMI ID = 10A @

2
SC1U50V5ZY-1-GP GAP-CLOSE

2
GAP-CLOSE
VGS = 10V

1
C464
SCD015U50V3KX-GP

ISL6255_CSIN_1

1
18R3-GP
R26

ISL6255_BGATE

2
1
SCD1U50V3ZY-GP
R31 C27
2R3J-2-GP 1 2 DCBATOUT

BSS84LT1G-GP

SC10U35V0ZY-GP

SC10U35V0ZY-GP
SCD1U50V3ZY-GP
1 2

5
6
7
8

1
ISL6255_SGATE

C478

C477

C476
R11

6262_CSOP

D
D
D
D
ISL6255_CSIN

ISL6255_CSIP
5V_AUX_S5

AO4422-1-GP
C33 10KR2F-2-GP

1
ISL6255_VDD SC1U50V5ZY-1-GP C18 U21

2
SCD1U50V3ZY-GP
DY

2
ISL6255_UGATE

2
G Q4

G
S
S
S
U2

2
3
ISL6255HRZ G22
S

4
3
2
1
1
G23 GAP-CLOSE

21

20

19

18

17

16

15
1

R17 D4 GAP-CLOSE BT+


DY

1
R43 2D2R3J-2-GP L25

CSOP

CSIP

SGATE

BGATE

PHASE

UGATE
CSIN
100KR2J-1-GP SCD1U50V3ZY-GP BAT54-4-GP CHG_PWR-2 1 2 CHG_PWR-3 1 R329 2
C39 IND-15UH-41-GP
R45

1
1 2 22 14 D03R3720F-1-GP
2

CSON BOOT

1
1 2ISL6255_VDD R10
R42 0R0402-PAD 2R3J-2-GP DY

2D2R3J-L1-GP
AC_IN# 1 2 ISL6255_ACPRN# 23 13 C19
31 AC_IN# ACPRN VDDP ISL6255_VDDP 1 2 DY DY

1
24 12 ISL6255_LGATE SC1U10V3ZY-6GP C475 C480 C479 C481
DCPRN LGATE
Near ISL6255 Pin 13 DY

5
6
7
8

SC10U25V0KX-3GP

SC10U25V0KX-3GP

SC10U25V0KX-3GP
SCD1U50V3ZY-GP

2
D
D
D
D
AO4422-1-GP
25 11 ISL6255_VREF C15
DCIN PGND U20 SC1000P100V3KX-GP

2
1

1
AD+ ISL6255_VDD 26 VDD GND 10
R12
DY

G
S
S
S
R20 20KR3F-GP
1 R40 2ISL6255_ACSET 27 9 80K6R3F-1-GP

4
3
2
1
ACSET VADJ
SC1U10V3ZY-6GP

2
1

ACSET Threshold 1.27V typ. 200KR2F-L-GP


R38 28 8
ACSET > 1.29V Max. --> AC 15K4R2F-GP DCSET ACLIM
DETECT DY
1

29 DY VADJ Cell voltage


2

GND

1
C40
VCOMP

R18 C20
ICOMP
CELLS

CHLIM
2

VREF

Near ISL6255 R19 20KR3F-GP SC2700P50V3KX-1GP VREF 4.41V/cell

2
ICM

130KR3F-GP
EN

Pin 26

2
ICHG : 3S2P = 3.2A Float 4.20V/cell
1

SC680P50V2KX-2GP
ISL6255_VDD C35 IPRE_CHG = 200mA
R39 1 2 GND 3.99V/cell
100KR2J-1-GP
1 2 ISL6255_EN ISL6255_CHLIM
1
SC6800P25V2KX-1GP

C32
2

ISL6255_ICM ISL6255_VREF ISOURCE_MAX = (((ACLIM/VREF)*0.05+0.05)/Rsense)


R41
2

D
100KR2J-1-GP Adaptor is 65W/19V : I_LIMIT = 2.9A ( 85% )
1
ISL6255_VCOMP
3

ISL6255_VDD R28
1

2
Q5 10KR2J-3-GP R27 DY
100R2F-L1-GP-U R25
2N7002PT-U

1
2

31 CHG_ON# 24K3R2F-1-GP
G
2
1

3D3V_AUX_S5
SCD01U16V2KX-3GP
2

1
SC100P50V2JN-3GP

DY R44 R33 R657


R24
1

1
C26

C28

150KR2J-GPS 100KR2J-1-GP C24 124KR3F-GP


SCD1U16V2ZY-2GP

1 2 1 2
2

2
1

D
1K74R2F-GP
1

R37 D D

3
CELLS Operate Mode 100KR2J-1-GP R22
Wistron Corporation
3

Q39 499KR3F-GP Q1
Q3 2N7002PT-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2

2N7002PT-U

VDD 4S 1 Taipei Hsien 221, Taiwan, R.O.C.


PRE_CHG 31
2
2N7002PT-U

31 CHG_3S_4S# 1 31 CHG_3S_4S# 1 G
G G Title
2

GND 3S CHARGER ISL6225


2

S
S S Size Document Number Rev
Float 2S (Power Team) MP
MYALL2
Date: Thursday, March 30, 2006 Sheet 42 of 57
A B C D E

Adaptor in to generate DCBATOUT AD+


DC1
4
4 AD_JK 4
U19
1 1 S D 8

1
2 S D 7 C471

1
C466 3 S D 6 SCD1U50V3ZY-GP
2 AD+_2 4 G D 5

2
SC1U50V5ZY-1-GP
SCD01U50V3KX-4GP

2
AO4411-1-GP

1
3 R323

C474
100KR2J-1-GP
ID = -10A/70deg

1
5 Rds(ON) = 24mohm
6
MH1 SO-8

2
R2
E
DC-JACK116-GP B R1
22.10037.C61 C

1
OUT PDTA124EU-1-GP
Q22 R324
3
56KR3F-GP
3 3
R1

2
R2

Q23
CHDTC124EU-1GP
3D3V_AUX_S5
BATTERY CONNECTOR
1

2
GND
IN

31 AD_OFF

2
1

D26
R321 BAV99PT-GP-U D27
1KR2J-1-GP BAV99PT-GP-U BAT1
8
DY DY 1
2

3
2
1 2 BATA_SDA_1 3
31 BAT_SDA
1 2 R332 27R3F-GP BATA_SCL_1 4
31 BAT_SCL
31 BAT_IN# R331 27R3F-GP 5
2 6 2
BT+ 7
9
EC30 EC29

1
SC10P50V2JN-4GP

SC10P50V2JN-4GP
SYN-CON7-16-GP-U1
DY

1
20.80697.007
EC35 EC34 EC33 EC31

2
SC1000P50V3JN-GP

SC1000P50V3JN-GP
SCD1U50V3ZY-GP SCD1U50V3ZY-GP

2
DY

Wistron Corporation

om
1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, 1

l.c
ai
Taipei Hsien 221, Taiwan, R.O.C.

tm
ho
Title

f@
AD/BATT CONN

in
xa
he
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 43 of 57
A B C D E
5 4 3 2 1
H18 H24 H22 H1 H2 H4 H9 H6 H10 H13 H14 H15 H21 H17 H16 H19 H26 H11 H25 H20 H23 H27 H31 H41 H34
HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE <Geometry> HOLE HOLE HOLE HOLE HOLE <Geometry> HOLE <Geometry> HOLE HOLE HOLE HOLE HOLE HOLE HOLE <Geometry>

<CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE> <CHANGE>
1

1
34.4A908.001

34.4A903.001

34.4A904.001
34.4A905.001

34.4A906.001

34.4A905.001
34.4A902.001 34.4A902.001
34.4A908.001
D D
H28 H30 H32 H40 H36 H38 H39
HOLE <Geometry> <Geometry> HOLE HOLE HOLE HOLE
1

1
H37 H35 H7 H8 H5 H12 H29 H33 H3 H42
HOLE <Geometry> <Geometry> HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1

1
C C

DCBATOUT
1

1
EC38 EC40 EC54 EC28 EC17 EC11 EC9 EC36 EC5 EC18 EC25 EC24

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
3D3V_S0 NVVDD_S0
1

1
EC39 EC22 EC59 EC60 EC58 EC71 EC72 EC73 EC74 EC8 G72 EC7 EC43 EC37

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
5V_S5 GND1 GND2 GND3
B VCC_CORE_S0 SPRING-23-GP SPRING-23-GP SPRING-23-GP B
5V_S0 1D05V_S0
1

1
EC61 EC62 EC44 EC75 EC76 EC77 EC78

1
EC10 EC48 EC41 EC49
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

1
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

2
1D8V_S3 DDR_VREF_S0
1

1
EC79 EC80 EC81 EC82 EC83 EC84 EC85 EC86 EC87 EC88 EC89 EC90

SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
EMI

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

EMI
Size Document Number Rev

MYALL2 MP
Date: Friday, March 24, 2006 Sheet 44 of 57
5 4 3 2 1

DCBATOUT DCBATOUT_51124 1D2V_PWR 1D2V_S0

G60 DCBATOUT_51124 G132


1 2 G72 1 2 G72

SC10U35V0ZY-1GP

SC10U35V0ZY-1GP
GAP-CLOSE-PWR GAP-CLOSE-PWR

5
6
7
8

1
G58 C821 C820 G72 G133

D
D
D
D
1 2 G72 U76 G72 G72 1 2 G72
FDS6612A-1-GP

2
D GAP-CLOSE-PWR 1D2V Iomax=5A GAP-CLOSE-PWR D
G57 G134
1 2 G72 OCP>12A 1 2 G72

G
S
S
S
GAP-CLOSE-PWR 1D2V_PWR GAP-CLOSE-PWR

4
3
2
1
G56 L44 G72 Voutsetting=1.2V G135
1 2 G72 51124_DRVH1 IND-4D7UH-88-GP 1 2 G72
51124_LL1 1 2
GAP-CLOSE-PWR GAP-CLOSE-PWR
G59 G136

5
6
7
8
1 2 G72 1 2 G72

D
D
D
D

SC33P50V3JN-GP
U77 G72

1
GAP-CLOSE-PWR FDS6690DS-GP GAP-CLOSE-PWR

1
3D3V_S0 R617 G72 C822 DY G137

1
18KR3-GP TC40 G72 1 2 G72
SE220U6D3VM-4GP

2
1

G
S
S
S
GAP-CLOSE-PWR

2
R618 DY 51124_VFB1

4
3
2
1
5V_S5 1KR3F-GP

1
51124_DRVL1 NIPPON 220uF ESR=15mohm
R621 DY R619 G72

2
0R2J-2-GP 30K1R3F-GP
1 2
1

2
R620 R622 DY

51124_PGD1
51124_PGD2
SC4D7U10V5ZY-3GP

3D3R3J-L-GP 1D05V_PWR 0R2J-2-GP


C823

1D2V_PWR 1 2
1

51124_VFB2 51124_GND
2

51124_VFB1
C C
Vout=0.75V*(R1+R2)/R2
2

G72
G72 C824

24
2
5

1
6

7
SC1U10V3ZY-6GP U6 G72 TPS51124RGER-GPU1
2

VFB1
VFB2

VO1
VO2

PGOOD1
PGOOD2
51124_GND
G72 R625 DY
10KR2F-2-GP
51124_V5FILT 15 4 51124_TONSEL 1 2 51124_V5FILT
V5FILT TONSEL
16 V5IN

2
R623 0R0402-PAD 21 51124_DRVH1 DCBATOUT_51124
51124_EN1_1 DRVH1 51124_DRVH2 R624
16,18,31,35,40,41,56 PM_SLP_S3# 1 2 23 EN1 DRVH2 10
1 2 51124_EN2_1 8 0R0402-PAD
16,18,31,35,40,41,56 PM_SLP_S3# EN2

SC10U35V0ZY-1GP

SC10U35V0ZY-1GP
R626 0R0402-PAD 18
51124_LL1 PGND1 1D05V_PWR NVVDD_S0
20 13

1
LL1 PGND2

5
6
7
8

1
51124_LL2 11 25 C827 C828 G72 1D05V Iomax=7A
LL2 GND

D
D
D
D
3 U79 G72 G72 G40
GND OCP>14A
1

C825 DY C826 DY 51124_GND FDS6612A-1-GP 1 2 G72

DRVL1
DRVL2
VBST1
VBST2

2
TRIP1
TRIP2

SCD01U50V2KX-1GP SCD01U50V2KX-1GP
Voutsetting=1.051V GAP-CLOSE-PWR
2

G43

G
S
S
S
1 2 G72
17
14

22
9

19
12
51124_GND 51124_GND 51124_GND 1D05V_PWR

4
3
2
1
L45 G72 GAP-CLOSE-PWR
51124_TRIP1 51124_DRVL2 51124_DRVH2 IND-2D2UH-46-GP G46
51124_LL2 1 2 1 2 G72
1

51124_TRIP2
R627 G72 51124_DRVL1 GAP-CLOSE-PWR
1

5
6
7
8
20KR3F-GP G34

D
D
D
D
B R628 G72 U80 B
G72 1 2 G72

1
30K1R3F-GP
20KR3F-GP FDS6690DS-GP
2

1
C829 DY R629 TC41 TC42 G72 GAP-CLOSE-PWR
G72 DY SE330U2VDM-4-GP G31
2

SE330U2VDM-4-GP
51124_GND 51124_GND SC33P50V3JN-GP 1 2 G72

2
G
S
S
S
R630 G72 C830 G72

2
0R3J-3-GP SCD1U50V3ZY-GP 51124_VFB2 GAP-CLOSE-PWR

4
3
2
1
51124_LL1 1 251124_LL1_1 1 2 51124_VBST1 NIPPON 680uF 2.5V G28

1
51124_DRVL2 1 2 G72
R631 G72 ESR=13m
75KR3F-GP GAP-CLOSE-PWR
G37
R632 G72 C831 G72 1 2 G72

2
0R3J-3-GP SCD1U50V3ZY-GP
51124_LL2 1 251124_LL2_1 1 2 51124_VBST2 GAP-CLOSE-PWR
Vout=0.75V*(R1+R2)/R2 51124_GND
G120
1 2 G72
G121 G72 Panasonic V Size 330uF 2V GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2 ESR=9mohm, Iripple=3.0A

51124_GND
<Variant Name>

om
A A

l.c
Wistron Corporation

ai
tm
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

ho
Taipei Hsien 221, Taiwan, R.O.C.

f@
Title

in
GND OPEN V5FILT
TPS51124 / NVDD/1D2V

xa
he
Size Document Number Rev
230k/CH1 283k/CH1 346k/CH1 MYALL2 MP
TONSEL 283k/CH2 346k/CH2 423k/CH2 Date: Thursday, March 30, 2006 Sheet 45 of 57

5 4 3 2 1
5 4 3 2 1

1 OF 14
5V_S0 U30A PLACE NEAR BALLS PLACE NEAR GPU

14

13
PEX_IOVDD_0 AD23 1D2V_S0
R140 G72 R309 G72 AF23
0R2J-2-GP 5K1R2F-2-GP PEX_IOVDD_1
PEX_IOVDD_2 AF24

1
7,16,18,22,26,31,32,34,51 PLT_RST1# 1 2 12 11 1 2 AF25 C166 C156 C142 C143 C586 G72 TC34 G72
PEX_IOVDD_3 SC4D7U6D3V3KX-GP ST150U6D3VDML3GP
PEX_IOVDD_4 AG24

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SC1U16V3KX-2GP

SC1U16V3KX-2GP
U16D AG25

2
PEX_IOVDD_5

1
TSAHCT125PW-GP

7
R307 G72
D 10KR2J-3-GP AC16 D
PEX_IOVDDQ_0
PEX_IOVDDQ_1 AC17
AC21 G72 G72 G72 G72

2
PEX_IOVDDQ_2
PEX_IOVDDQ_3 AC22
PEX_IOVDDQ_4 AE18
PEX_IOVDDQ_5 AE21
PEX_IOVDDQ_6 AE22
R137 DY R312 DY AF12
0R2J-2-GP 0R2J-2-GP PEX_IOVDDQ_7 1D2V_S0
PEX_IOVDDQ_8 AF18 PLACE NEAR BALLS
31 GMODULE_RST# 1 2 1 2 PEX_RST# AH15 AF21
PEX_RST# PEX_IOVDDQ_9
PEX_IOVDDQ_10 AF22 L4 G72
C605 1 2
KBC GPIO5 1D2V_S0

1
TP12 TPAD30 1 AG12 K16 C163 C167 C159 C603
RFU0 VDD_0

SC10U10V6ZY-U
TP15 TPAD30 1 AH13 K17 C130
RFU1 VDD_1 BLM18BB221SN1D-GP

SC1U16V3KX-2GP

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP

SC4D7U6D3V3KX-GP
SCD47U25V5KX-2GP
N13 DY

2
VDD_2

1
N14 C115 C55
VDD_3
VDD_4 N16

SCD1U10V2MX-3GP

SC4D7U6D3V3KX-GP
N17

2
VDD_5
VDD_6 N19
TP18 TPAD30 1 AM12 N20 G72 G72 G72 G72
TP11 TPAD30 PEX_TSTCLK_OUT VDD_7
1 AM11 PEX_TSTCLK_OUT# VDD_8 P13 G72
VDD_9 P14
3 CLK_PCIE_PEG CLK_PCIE_PEG AH14 P16 G72 G72
CLK_PCIE_PEG# PEX_REFCLK VDD_10
3 CLK_PCIE_PEG# AJ14 PEX_REFCLK# VDD_11 P17
G72 VDD_12 P19
PEG_RXP0 1 2 C578 SCD1U10V2KX-5GPPEX_TX0 AJ15 R16
PEG_RXN0 1 PEX_TX0 VDD_13
2 C577 SCD1U10V2KX-5GPPEX_TX0# AK15 PEX_TX0# VDD_14 R17
PEG_TXN[15..0] G72 T13
7 PEG_TXN[15..0] VDD_15
PEG_TXP0 AK13 T14
PEG_TXP[15..0] PEG_TXN0 PEX_RX0 VDD_16
7 PEG_TXP[15..0] AK14 PEX_RX0# VDD_17 T15
G72 VDD_18 T18
PEG_RXN[15..0] PEG_RXP1 1 2 C208 SCD1U10V2KX-5GPPEX_TX1 AH16 T19
7 PEG_RXN[15..0] PEX_TX1 VDD_19 NVVDD_S0
PEG_RXN1 1 2 C207 SCD1U10V2KX-5GPPEX_TX1# AG16
PEG_RXP[15..0] PEX_TX1#
7 PEG_RXP[15..0] G72 VDD_20 U13 G72 G72

1
PEG_TXP1 AM14 U14 TC35 TC36
PEX_RX1 VDD_21

ST220U6D3VDM-13GP

ST220U6D3VDM-13GP
PEG_TXN1 AM15 U15 C133 C95 C117 C99 C112 C132
PEX_RX1# VDD_22
C G72 U18 C

2
PEG_RXP2 1 VDD_23
2 C576 SCD1U10V2KX-5GPPEX_TX2 AG17 PEX_TX2 VDD_24 U19 SC220P50V2KX-3GP SC220P50V2KX-3GP SC220P50V2KX-3GP
PEG_RXN2 1 2 C575 SCD1U10V2KX-5GPPEX_TX2# AH17 V16
PEX_TX2# VDD_25
PEG_TXP2
G72 VDD_26 V17 G72 G72SC220P50V2KX-3GP
G72 G72SC220P50V2KX-3GP
G72 G72SC220P50V2KX-3GP
AL15 PEX_RX2 VDD_27 W13
PEG_TXN2 AL16 W14
PEX_RX2# VDD_28
G72 VDD_29 W16
PEG_RXP3 1 2 C206 SCD1U10V2KX-5GPPEX_TX3 AG18 W17
PEX_TX3 VDD_30

1
PEG_RXN3 1 2 C205 SCD1U10V2KX-5GPPEX_TX3# AH18 W19 C123 C131 C101 C109 C107 C120
PEX_TX3# VDD_31
G72 VDD_32 Y13
PEG_TXP3 AK16 Y14 SC100P50V2JN-U SC100P50V2JN-U SC100P50V2JN-U SC100P50V2JN-U SC1U10V3ZY SC1U10V3ZY

2
PEG_TXN3 PEX_RX3 VDD_33
AK17 PEX_RX3# VDD_34 Y16
G72 VDD_35 Y17
PEG_RXP4 1 2 C573 SCD1U10V2KX-5GPPEX_TX4 AK18 Y19 G72 G72 G72 G72 G72 G72
PEG_RXN4 1 PEX_TX4 VDD_36
2 C574 SCD1U10V2KX-5GPPEX_TX4# AJ18 PEX_TX4# VDD_37 Y20
G72
PEG_TXP4 AL17 P20
PEX_RX4 VDD_LP_0

1
PEG_TXN4 AL18 T20 C611
PEX_RX4# VDD_LP_1

1
G72 VDD_LP_2 T23
PEG_RXP5 1 2 C204 SCD1U10V2KX-5GPPEX_TX5 AJ19 U20 SC1U10V3ZY C111 C118 C124 C106 C114

2
PEG_RXN5 1 PEX_TX5 VDD_LP_3 SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP
2 C203 SCD1U10V2KX-5GPPEX_TX5# AH19 U23

2
PEX_TX5# VDD_LP_4
G72 VDD_LP_5 W20
PEG_TXP5 AM18 G72 PLACE NEAR BALLS
PEG_TXN5 PEX_RX5
AM19 PEX_RX5# G72 G72 G72 G72 G72
G72
PEG_RXP6 1 2 C572 SCD1U10V2KX-5GPPEX_TX6 AG20
PEG_RXN6 1 PEX_TX6
2 C571 SCD1U10V2KX-5GPPEX_TX6# AH20 PEX_TX6#
G72 3D3V_S0
PEG_TXP6 AK19
PEG_TXN6 PEX_RX6
AK20 PEX_RX6# VDD33_0 AC11
G72 VDD33_1 AC12
PEG_RXP7 1 2 C202 SCD1U10V2KX-5GPPEX_TX7 AG21 AC24
PEX_TX7 VDD33_2

1
PEG_RXN7 1 2 C201 SCD1U10V2KX-5GPPEX_TX7# AH21 AD24 C141 C104 C138 G72
PEX_TX7# VDD33_3 C129 SCD022U16V2KX-3GP
G72 VDD33_4 AE11
PEG_TXP7 AL20 AE12 SCD1U10V2MX-3GP SC1U10V3ZY SC4700P50V3KX-1GP

2
PEG_TXN7 PEX_RX7 VDD33_5
AL21 PEX_RX7# VDD33_6 H7
G72 VDD33_7 J7
B PEG_RXP8 1 2 C570 SCD1U10V2KX-5GPPEX_TX8 AK21 K7 G72 G72 G72 PLACE NEAR GPU B
PEG_RXN8 1 PEX_TX8 VDD33_8 1D2V_S0
2 C569 SCD1U10V2KX-5GPPEX_TX8# AJ21 PEX_TX8# VDD33_9 L10
G72 VDD33_10 L7 L27
PEG_TXP8 AM21 L8
PEG_TXN8 PEX_RX8 VDD33_11 PEX_PLLAVDD
AM22 PEX_RX8# VDD33_12 M10 1 2
G72
PEG_RXP9 1 2 C199 SCD1U10V2KX-5GPPEX_TX9 AJ22 PEX_TX9 BLM18BB221SN1D-GP

1
PEG_RXN9 1 2 C200 SCD1U10V2KX-5GPPEX_TX9# AH22 AF15 C581 C582
PEX_TX9# PEX_PLLAVDD C579 C580
G72 PEX_PLLDVDD AE15
PEG_TXP9 AK22 AE16 SC1U10V3ZY SCD01U25V2KX-3GP SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP

2
PEG_TXN9 AK23
PEX_RX9 PEX_PLLGND G72
PEX_RX9#
G72
PEG_RXP10 1 2 C568 SCD1U10V2KX-5GPPEX_TX10 AG23 G72 G72 G72 G72
PEG_RXN10 1 PEX_TX10
2 C567 SCD1U10V2KX-5GPPEX_TX10# AH23 PEX_TX10#
G72
PEG_TXP10 AL23
PEG_TXN10 PEX_RX10 1D2V_S0
AL24 PEX_RX10# L9
G72
PEG_RXP11 1 2 C198 SCD1U10V2KX-5GPPEX_TX11 AK24 PEX_PLLDVDD 1 2
PEG_RXN11 1 PEX_TX11
2 C197 SCD1U10V2KX-5GPPEX_TX11# AJ24 PEX_TX11#
G72 BLM18BB221SN1D-GP
1

1
PEG_TXP11 AM24 C151 C140
PEG_TXN11 PEX_RX11 C158 C144
AM25 PEX_RX11#
G72 SC1U10V3ZY SCD01U25V2KX-3GP SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP
2

2
PEG_RXP12 1 2 C565 SCD1U10V2KX-5GPPEX_TX12 AJ25 G72
PEG_RXN12 1 PEX_TX12
2 C566 SCD1U10V2KX-5GPPEX_TX12# AH25 PEX_TX12#
G72 G72 G72 G72 G72
PEG_TXP12 AK25
PEG_TXN12 PEX_RX12
AK26 PEX_RX12# PLACE NEAR BALLS PLACE NEAR GPU
G72
PEG_RXP13 1 2 C196 SCD1U10V2KX-5GPPEX_TX13 AH26
PEG_RXN13 1 PEX_TX13
2 C195 SCD1U10V2KX-5GPPEX_TX13# AG26 PEX_TX13#
G72
PEG_TXP13 AL26 AM10
PEG_TXN13 PEX_RX13 NC#AM10
AL27 PEX_RX13# NC#AM8 AM8
G72 NC#AM9 AM9
PEG_RXP14 1 2 C564 SCD1U10V2KX-5GPPEX_TX14 AK27 B32
PEG_RXN14 1 PEX_TX14 NC#B32
A 2 C563 SCD1U10V2KX-5GPPEX_TX14# AJ27 PEX_TX14# NC#J6 J6 A
G72
PEG_TXP14 AM27
PEG_TXN14 PEX_RX14
AM28 PEX_RX14#
G72
PEG_RXP15 1 2 C194 SCD1U10V2KX-5GPPEX_TX15 AJ28
PEG_RXN15 1 PEX_TX15
2 C193 SCD1U10V2KX-5GPPEX_TX15# AH27 PEX_TX15#
PEG_TXP15
G72
AL28
Wistron Corporation
PEG_TXN15 PEX_RX15 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
AL29 PEX_RX15# Taipei Hsien 221, Taiwan, R.O.C.

Title
G72 G72M PCIE
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 46 of 57
5 4 3 2 1
5 4 3 2 1

3D3V_S0

2
L13
BLM18BB221SN1D-GP
G72 2004/11/10 ADD 220 Ohm at 100MHz 6 OF 14
U30F R67 33R2J-2-GP G72

1
DACA_VDD AD10 K2 I2CA_SCL 1 2 R64 33R2J-2-GP G72
DACA_VDD I2CA_SCL G72_CRT_EDID_CLK 14
J3 I2CA_SDA 1 2
I2CA_SDA G72_CRT_EDID_DAT 14
DACA_VREF AH10 DACA_VREF

1
C134 G72 C121 G72 C222 G72 C211
SC470P50V-GP DACA_RSET AH9 AF10 HSYNC 14
DACA_RSET DACA_HSYNC

SC4D7U6D3V3KX-GP

SCD01U25V2KX-3GP
SC4700P50V2KX
AK10 VSYNC 14

2
DACA_VSYNC
D D

1
R71 AH11 CRT_RED 14
124R2F-U-GP DACA_RED
G72
G72 DACA_GREEN AJ12 CRT_GREEN 14

2
DACA_BLUE AH12 CRT_BLUE 14

1
AG9 R115 G72 R111 G72 R114 G72
DACA_IDUMP 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
3D3V_S0 G72
50 ohm trace to filter

2
2
37.5 ohm trace to 150R resistor
L8 CLOSE TO G72
BLM18BB221SN1D-GP
8 OF 14
G72 2004/11/10 ADD 220 Ohm at 100MHz U30H
1

DACB_VDD V8 DACB_VDD
DACB_VREF R5 DACB_VREF
1

1
C223 G72 C157 G72 C135 G72 C105
SC470P50V-GP DACB_RSET R7 DACB_RSET
SC4D7U6D3V3KX-GP

SCD01U25V2KX-3GP
SC4700P50V2KX
2

1
R116 R6 G72_TV_CRMA 14
124R2F-U-GP DACB_RED
G72
G72 DACB_GREEN T5 G72_TV_LUMA 14

2
DACB_BLUE T6 G72_TV_COMP 14

2
C V7 R81 R82 R80 C
DACB_IDUMP 150R2F-1-GP 150R2F-1-GP 150R2F-1-GP
G72 G72 G72 G72

1
CLOSE TO G72

7 OF 14
R97 G72 U30G
10KR2F-2-GP
1 2 AD7 DACC_VDD I2CB_SCL H4
I2CB_SDA J4
AH4 DACC_VREF
AF5 DACC_RSET DACC_HSYNC AG7
DACC_VSYNC AG5

DACC_RED AF6

DACC_GREEN AG6

DACC_BLUE AE5

DACC_IDUMP AG4

G72
B B

2D5V_S0 13 OF 14
2004/11/10 ADD 220 Ohm at 100MHz U30M
L5
1 2 DISP_PLLVDD T9 PLLVDD
T10 DISP_PLLVDD Spread Specturm
1

C56 C116 C60 C62


BLM18BB221SN1D-GP C61 U10 PLLGND
SC4D7U6D3V3KX-GP

SC1U6D3V2KX-GP SC4700P50V2KX CLOSE TO GPU U28 3D3V_S0


2

SC1U6D3V2KX-GP SCD1U10V2MX-3GP ASM3P2872AF-060R-GP


G72
G72 G72 G72 R356 G72 1 6
REFOUT VSS
G72 22R2J-2-GP 2 XOUT MODOUT 5 SSFOUT_R
SSFOUT T1 T2 BXTALOUT 1 2 3 4
XTALSSIN XTALOUTBUFF XIN/CLKIN VDD
G72
1

1
R360 DY XTALIN U1 U2 XTALOUT R358 G72 G72
XTALIN XTALOUT

1
G72 10KR2J-3-GP 330R2J-3-GP C97 G72

1
L7 G72 C535 G72 R615 G72
BLM18BB221SN1D-GP 22R2J-2-GP SCD1U16V
2

2
2D5V_S0 1 2 SCD1U16V SSFOUT 1 2

2
1

C67 G72 C54 G72 C110 G72 X3 G72


SC4D7U6D3V3KX-GP SCD1U10V2MX-3GP SC4700P50V2KX 10MIL_G2G_20MIL CLOSE TO U28
2

1 4
1

C544 G72
10MIL_G2G_20MIL
SC18P50V2JN-1-GP 2 3
2

om
C541 G72
A XTAL-27MHZ-16-GP A

l.c
SC22P50V2JN-4GP
2

ai
tm
ho
Wistron Corporation

f@
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
Taipei Hsien 221, Taiwan, R.O.C.

xa
he
Title
G72M CRT & TV OUT
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 47 of 57
5 4 3 2 1
5 4 3 2 1

D D

9 OF 14
C561 G72 U30I
SCD01U16V2KX-3GP AJ9 LVDS_TXACLK- LVDS_TXACLK- 13
IFPA_TXC#
1 2 AM4 IFPAB_VPROBE
AK9 LVDS_TXACLK+ LVDS_TXACLK+ 13
IFPA_TXC
AL5 IFPAB_RSET
2D5V_S0 AJ6 LVDS_TXAOUT0-
IFPA_TXD0# LVDS_TXAOUT0- 13
2005/11/10 CHANGE TO 220 Ohms at 100MHz AH6 LVDS_TXAOUT0+
IFPA_TXD0 LVDS_TXAOUT0+ 13
L11
1 2 IFPABPLLVDD AC9 AH7 LVDS_TXAOUT1- LVDS_TXAOUT1- 13
IFPAB_PLLVDD IFPA_TXD1# LVDS_TXAOUT1+
IFPA_TXD1 AH8 LVDS_TXAOUT1+ 13

1
C173 BLM18BB221SN1D-GPC176
G72
1

1
C178 C177 R394
1KR2F-3-GP AK8 LVDS_TXAOUT2- LVDS_TXAOUT2- 13
SC4700P50V2KX SC470P50V2KX IFPA_TXD2# LVDS_TXAOUT2+
AJ8 LVDS_TXAOUT2+ 13
2

2
G72
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP IFPA_TXD2

2
AD9 IFPAB_PLLGND
G72 G72 IFPA_TXD3# AH5
G72 G72 IFPA_TXD3 AJ5

AL4 LVDS_TXBCLK- LVDS_TXBCLK- 13


1D8V_S0 IFPB_TXC# LVDS_TXBCLK+
IFPB_TXC AK4 LVDS_TXBCLK+ 13
L10
1 2 IFPAIOVDD AF9 AM5 LVDS_TXBOUT0- LVDS_TXBOUT0- 13
IFPA_IOVDD IFPB_TXD4# LVDS_TXBOUT0+
IFPB_TXD4 AM6 LVDS_TXBOUT0+ 13
BLM18BB221SN1D-GP AF8 IFPB_IOVDD
1

1
C165 C171 C169
C 2005/11/10 CHANGE TO 220 Ohms at 100MHz AL7 LVDS_TXBOUT1- C
IFPB_TXD5# LVDS_TXBOUT1- 13
SC4700P50V2KX SC470P50V2KX AM7 LVDS_TXBOUT1+
2

2
G72 SC4D7U6D3V3KX-GP IFPB_TXD5 LVDS_TXBOUT1+ 13

G72 G72 AK5 LVDS_TXBOUT2- LVDS_TXBOUT2- 13


IFPB_TXD6#
G72 IFPB_TXD6 AK6 LVDS_TXBOUT2+ LVDS_TXBOUT2+ 13

IFPB_TXD7# AL8
1

1
C164 C170 C168 AK7
IFPB_TXD7
SC4700P50V2KX SC470P50V2KX
G72
2

SC4D7U6D3V3KX-GP
SB
G72 G72
G72

10 OF 14

U30J
AK3 IFPCD_VPROBE IFPC_TXC# AM3
IFPC_TXC AM2

AH3 IFPCD_RSET
IFPC_TXD0# AE1
IFPC_TXD0 AE2

B B
G72_PLLVDD AA10 AF2
IFPCD_PLLVDD IFPC_TXD1#
IFPC_TXD1 AF1
8
7
6
5

RN7
2005/11/10 ADD SRN10KJ-4-GP AH1
IFPC_TXD2#
IFPC_TXD2 AG1
G72
AB10
1
2
3
4

IFPCD_PLLGND

IFPD_TXC# AH2
IFPD_TXC AG3

G72_IFPC_IOVDD AD6 AJ1


IFPC_IOVDD IFPD_TXD4#
IFPD_TXD4 AK1
G72_IFPD_IOVDD AE7 IFPD_IOVDD

IFPD_TXD5# AL1
IFPD_TXD5 AL2

IFPD_TXD6# AJ3
IFPD_TXD6 AJ2

G72

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
G72M LVDS & TMDS
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 48 of 57
5 4 3 2 1
5 4 3 2 1

D D

U25 FBAD[63..0]
FBAD[63..0] FBAD[63..0] 50,54
U27 FBA_BA0 L2 B9 FBAD31
FBAD[63..0] 50,54 50,54 FBA_BA0 BA0 DQ15
FBA_BA0 L2 B9 FBAD15 FBA_BA1 L3 B1 FBAD30
50,54 FBA_BA0 BA0 DQ15 FBA_A[12..0] 50,54 FBA_BA1 BA1 DQ14
FBA_BA1 L3 B1 FBAD14 D9 FBAD29
FBA_A[12..0] 50,54 FBA_BA1 BA1 DQ14 50,54 FBA_A[12..0] DQ13
D9 FBAD13 FBA_A12 R2 D1 FBAD28
50,54 FBA_A[12..0] DQ13 A12 DQ12
FBA_A12 R2 D1 FBAD12 FBA_A11 P7 D3 FBAD27
FBA_A11 A12 DQ12 FBAD11 FBA_A10 A11 DQ11 FBAD26
P7 A11 DQ11 D3 M2 A10/AP DQ10 D7
FBA_A10 M2 D7 FBAD10 FBA_A9 P3 C2 FBAD25
FBA_A9 A10/AP DQ10 FBAD9 FBA_A8 A9 DQ9 FBAD24
P3 A9 DQ9 C2 P8 A8 DQ8 C8
FBA_A8 P8 C8 FBAD8 FBA_A7 P2 F9 FBAD23
FBA_A7 A8 DQ8 FBAD7 FBA_A6 A7 DQ7 FBAD22
P2 A7 DQ7 F9 N7 A6 DQ6 F1
FBA_A6 N7 F1 FBAD6 FBA_A5 N3 H9 FBAD21
FBA_A5 A6 DQ6 FBAD5 FBA_A4 A5 DQ5 FBAD20
N3 A5 DQ5 H9 N8 A4 DQ4 H1
FBA_A4 N8 H1 FBAD4 FBA_A3 N2 H3 FBAD19
FBA_A3 A4 DQ4 FBAD3 FBA_A2 A3 DQ3 FBAD18
R48 N2 A3 DQ3 H3 M7 A2 DQ2 H7
FBA_A2 M7 H7 FBAD2 FBA_A1 M3 G2 FBAD17
FBACLK0 FBACLK0# FBA_A1 A2 DQ2 FBAD1 FBA_A0 A1 DQ1 FBAD16
1 2 M3 A1 DQ1 G2 M8 A0 DQ0 G8
FBA_A0 M8 G8 FBAD0 1D8V_S0
A0 DQ0 1D8V_S0
120R2F-GP FBACLK0#
54 FBACLK0# K8 CK VDDQ1 A9
* "Place the K8 A9 FBACLK0 J8 C1
54 FBACLK0# CK VDDQ1 54 FBACLK0 CK VDDQ2
54 FBACLK0 J8 C1 C3
differential G72_64MB CK VDDQ2
C3 FBA_CKE K2
VDDQ3
C7
VDDQ3 50,54 FBA_CKE CKE VDDQ4
termination FBA_CKE K2 C7 C9
50,54 FBA_CKE CKE VDDQ4 VDDQ5
R54 G72 C9 E9
resistor at the 2 1 10KR2J-3-GP VDDQ5
E9
VDDQ6
G1
VDDQ6 FBA_CS0# VDDQ7
end of the VDDQ7 G1 50,54 FBA_CS0# L8 CS VDDQ8 G3
C FBA_CS0# L8 G3 G7 C
transmission 50,54 FBA_CS0# CS VDDQ8 VDDQ9
G7 FBA_WE# K3 G9
VDDQ9 50,54 FBA_WE# WE VDDQ10
line" 50,54 FBA_WE#
FBA_WE# K3 WE VDDQ10 G9
FBA_RAS# K7 A1
50,54 FBA_RAS# RAS VDD1
FBA_RAS# K7 A1 E1
50,54 FBA_RAS# RAS VDD1 VDD2
E1 FBA_CAS# L7 J9
VDD2 50,54 FBA_CAS# CAS VDD3
FBA_CAS# L7 J9 M9
50,54 FBA_CAS# CAS VDD3 VDD4
VDD4 M9 54 FBADQM2 F3 LDM VDD5 R1
54 FBADQM0 F3 LDM VDD5 R1 54 FBADQM3 B3 UDM
54 FBADQM1 B3 UDM VDDL J1
VDDL J1 VSSDL J7
ODT VSSDL J7 G72 50,54 ODT
ODT K9 ODT
50,54 ODT K9 ODT

54 FBADQSP2 F7 LDQS
1D8V_S0 F7 E8 A7
54 FBADQSP0 LDQS 54 FBADQSN2 LDQS VSSQ1
54 FBADQSN0 E8 LDQS VSSQ1 A7 VSSQ2 B2
VSSQ2 B2 VSSQ3 B8
VSSQ3 B8 VSSQ4 D2
1

VSSQ4 D2 54 FBADQSP3 B7 UDQS VSSQ5 D8


R70 B7 D8 A8 E7
54 FBADQSP1 UDQS VSSQ5 54 FBADQSN3 UDQS VSSQ6
1KR2F-3-GP A8 E7 F2
54 FBADQSN1 UDQS VSSQ6 VSSQ7
G72_64MB VSSQ7 F2
FBAREF0 VSSQ8 F8
F8 J2 H2
2

FBAREF0 VSSQ8 VREF VSSQ9


J2 VREF VSSQ9 H2 VSSQ10 H8
VSSQ10 H8 G72 A2 NC#A2
1

1
G72_64MB A2 C100 G72_64MB E2 A3
NC#A2 NC#E2 VSS1
1

R72 C59 E2 A3 SCD047U16V3KX-GP L1 E3


1KR2F-3-GP SCD047U16V3KX-GP NC#E2 VSS1 NC#L1 VSS2
L1 E3 R3 J3

2
NC#L1 VSS2 NC#R3 VSS3
G72_64MB R3 J3 R7 N1
2

NC#R3 VSS3 NC#R7 VSS4


R7 N1 R8 P9
2

NC#R7 VSS4 NC#R8 VSS5


R8 NC#R8 VSS5 P9

HY5PS561621A-33GP
HY5PS561621A-33GP 72.55616.A0U
B 72.55616.A0U G72_64MB B
G72_64MB

Decoupling for left MEMORY


Place around the MEM Decoupling for right MEMORY
1D8V_S0
1D8V_S0 Place around the MEM
1

1
C91 C50 C48 C49 C66 C65 C58 C52
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

C154 C82 C79 C80 C90 C92 C93 C127


SC4D7U6D3V3KX-GP
2

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP
SC4D7U6D3V3KX-GP
2

G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB 2
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB
G72_64MB

om
A A

l.c
1

ai
1

C153 C185 C182 C181

tm
SC1KP16V2KX-GP
SC470P50V2KX-3GP

SC4700P50V2KX-1GP

C125 C126 C149 C152


SC100P50V2JN-3GP
2

ho
SC1KP16V2KX-GP
SC470P50V2KX-3GP

SC4700P50V2KX-1GP
SC100P50V2JN-3GP
2

Wistron Corporation

f@
G72_64MB
G72_64MB G72_64MB G72_64MB 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
G72_64MB G72_64MB G72_64MB G72_64MB Taipei Hsien 221, Taiwan, R.O.C.

xa
he
Title
G72M VRAM (1ST 1/2)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 49 of 57
5 4 3 2 1
5 4 3 2 1

FBA_A[12..0] FBA_A[12..0]
49,54 FBA_A[12..0] 49,54 FBA_A[12..0]
FBA_A12 FBA_A12
FBA_A11 FBA_A11
FBA_A10 FBA_A10
FBA_A9 FBA_A9
FBA_A8 FBA_A8
FBA_A7 FBA_A7
FBA_A6 FBA_A6
FBA_A1 FBA_A1
FBA_A0 FBA_A0

D D

U33 FBAD[63..0]
FBAD[63..0] FBAD[63..0] 49,54
U31 FBA_BA0 L2 B9 FBAD63
FBAD[63..0] 49,54 49,54 FBA_BA0 BA0 DQ15
FBA_BA0 L2 B9 FBAD55 FBA_BA1 L3 B1 FBAD62
49,54 FBA_BA0 BA0 DQ15 49,54 FBA_BA1 BA1 DQ14
FBA_BA1 L3 B1 FBAD54 D9 FBAD61
49,54 FBA_BA1 BA1 DQ14 DQ13
D9 FBAD53 FBA_A12 R2 D1 FBAD60
FBA_A12 DQ13 FBAD52 FBA_A11 A12 DQ12 FBAD59
R2 A12 DQ12 D1 P7 A11 DQ11 D3
FBA_A11 P7 D3 FBAD51 FBA_A10 M2 D7 FBAD58
FBA_A10 A11 DQ11 FBAD50 FBA_A9 A10/AP DQ10 FBAD57
M2 A10/AP DQ10 D7 P3 A9 DQ9 C2
FBA_A9 P3 C2 FBAD49 FBA_A8 P8 C8 FBAD56
FBA_A8 A9 DQ9 FBAD48 FBA_A7 A8 DQ8 FBAD47
P8 A8 DQ8 C8 P2 A7 DQ7 F9
FBA_A7 P2 F9 FBAD39 FBB_A[5..2] FBA_A6 N7 F1 FBAD46
FBB_A[5..2] A7 DQ7 54 FBB_A[5..2] A6 DQ6
FBA_A6 N7 F1 FBAD38 FBB_A5 N3 H9 FBAD45
54 FBB_A[5..2] A6 DQ6 A5 DQ5
FBB_A5 N3 H9 FBAD37 FBB_A4 N8 H1 FBAD44
FBB_A4 A5 DQ5 FBAD36 FBB_A3 A4 DQ4 FBAD43
N8 A4 DQ4 H1 N2 A3 DQ3 H3
FBB_A3 N2 H3 FBAD35 FBB_A2 M7 H7 FBAD42
FBB_A2 A3 DQ3 FBAD34 FBA_A1 A2 DQ2 FBAD41
M7 A2 DQ2 H7 M3 A1 DQ1 G2
R102 G72_128_256MB FBA_A1 M3 G2 FBAD33 FBA_A0 M8 G8 FBAD40
475R2F-L1-GP FBA_A0 A1 DQ1 FBAD32 A0 DQ0 1D8V_S0
M8 A0 DQ0 G8
FBACLK1 1 2 FBACLK1# 1D8V_S0
FBACLK1# K8 A9
54 FBACLK1# CK VDDQ1
FBACLK1# K8 A9 FBACLK1 J8 C1
54 FBACLK1# CK VDDQ1 54 FBACLK1 CK VDDQ2
FBACLK1 J8 C1 C3
54 FBACLK1 CK VDDQ2 VDDQ3
* "Place the C3 FBA_CKE K2 C7
VDDQ3 49,54 FBA_CKE CKE VDDQ4
FBA_CKE K2 C7 C9
differential 49,54 FBA_CKE CKE VDDQ4 VDDQ5
VDDQ5 C9 VDDQ6 E9
termination VDDQ6 E9 VDDQ7 G1
G1 FBA_CS0# L8 G3
resistor at the VDDQ7 49,54 FBA_CS0# CS VDDQ8
FBA_CS0# L8 G3 G7
49,54 FBA_CS0# CS VDDQ8 VDDQ9
end of the G7 FBA_WE# K3 G9
VDDQ9 49,54 FBA_WE# WE VDDQ10
FBA_WE# K3 G9
transmission 49,54 FBA_WE# WE VDDQ10 FBA_RAS# K7 A1
49,54 FBA_RAS# RAS VDD1
line" 49,54 FBA_RAS#
FBA_RAS# K7 RAS VDD1 A1 VDD2 E1
C E1 FBA_CAS# L7 J9 C
VDD2 49,54 FBA_CAS# CAS VDD3
FBA_CAS# L7 J9 M9
49,54 FBA_CAS# CAS VDD3 VDD4
VDD4 M9 54 FBADQM5 F3 LDM VDD5 R1
54 FBADQM4 F3 LDM VDD5 R1 54 FBADQM7 B3 UDM
54 FBADQM6 B3 UDM VDDL J1
VDDL J1 VSSDL J7
J7 ODT K9
VSSDL 49,54 ODT ODT
ODT K9
49,54 ODT ODT

54 FBADQSP5 F7 LDQS
1D8V_S0 F7 E8 A7
54 FBADQSP4 LDQS 54 FBADQSN5 LDQS VSSQ1
54 FBADQSN4 E8 LDQS VSSQ1 A7 VSSQ2 B2
VSSQ2 B2 VSSQ3 B8
VSSQ3 B8 VSSQ4 D2
1

VSSQ4 D2 54 FBADQSP7 B7 UDQS VSSQ5 D8


R135 B7 D8 A8 E7
54 FBADQSP6 UDQS VSSQ5 54 FBADQSN7 UDQS VSSQ6
1KR2F-3-GP A8 E7 F2
54 FBADQSN6 UDQS VSSQ6 VSSQ7
G72_128_256MB VSSQ7 F2
FBAREF1 VSSQ8 F8
F8 J2 H2
2

FBAREF1 VSSQ8 VREF VSSQ9


J2 VREF VSSQ9 H2 G72_128_256MB VSSQ10 H8

1
H8 C224 A2
VSSQ10 NC#A2
1

G72_128_256MB A2 SCD047U16V3KX-GP E2 A3
NC#A2 NC#E2 VSS1
1

R136 C150 E2 A3 L1 E3

2
1KR2F-3-GP SCD047U16V3KX-GP NC#E2 VSS1 NC#L1 VSS2
L1 NC#L1 VSS2 E3 R3 NC#R3 VSS3 J3
G72_128_256MB R3 J3 R7 N1
2

NC#R3 VSS3 NC#R7 VSS4


R7 N1 R8 P9
2

NC#R7 VSS4 NC#R8 VSS5


R8 NC#R8 VSS5 P9

HY5PS561621A-33GP
HY5PS561621A-33GP 72.55616.A0U
72.55616.A0U G72_128_256MB
G72_128_256MB

B B

Decoupling for left MEMORY


1D8V_S0 Place around the MEM
1

C212 G72_128_256MB C210 G72_128_256MB C71 G72_128_256MB C496 G72_128_256MB C532 G72_128_256MB C87 G72_128_256MB C86 G72_128_256MB C81 G72_128_256MB
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SC4D7U6D3V3KX-GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP SCD1U16V2KX-3GP
2

2
1

C179 G72_128_256MB C84 G72_128_256MB C583 G72_128_256MB C78 G72_128_256MB C526 G72_128_256MB C108 G72_128_256MB C128 G72_128_256MB C538 G72_128_256MB
SC100P50V2JN-3GP SC100P50V2JN-3GP SC470P50V2KX-3GP SC470P50V2KX-3GP SC1KP16V2KX-GP SC1KP16V2KX-GP SC4700P50V2KX-1GP SC4700P50V2KX-1GP
2

Decoupling for right MEMORY


1D8V_S0 Place around the MEM
1

C218 G72_128_256MB C180 G72_128_256MB C213 G72_128_256MB C221 G72_128_256MB C98 G72_128_256MB C94 G72_128_256MB C75 G72_128_256MB C122 G72_128_256MB C139 G72_128_256MB
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD01U25V2KX-3GP SCD01U25V2KX-3GP
2

A A
1

C88 G72_128_256MB C175 G72_128_256MB C545 G72_128_256MB C552 G72_128_256MB C494 G72_128_256MB C584 G72_128_256MB C495 G72_128_256MB C502 G72_128_256MB C497 G72_128_256MB C555 G72_128_256MB
SCD01U25V2KX-3GP SCD01U25V2KX-3GP SC100P50V2JN-3GP SC470P50V2KX-3GP SC1KP16V2KX-GP SC100P50V2JN-3GP SC470P50V2KX-3GP SC1KP16V2KX-GP SC4700P50V2KX-1GP SC4700P50V2KX-1GP
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
G72M VRAM (1ST 2/2)
Size Document Number Rev

MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 50 of 57
5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_S0
11 OF 14
U30K 14 OF 14
U30N
M7 P2 MIOA_D0 53 AA8 AC3 MIOB_D0
MIOA_VDDQ_0 MIOAD0 MIOB_VDDQ_0 MIOBD0 MIOB_D0 53
M8 N2 AB7 AC1 MIOB_D1
MIOA_VDDQ_1 MIOAD1 MIOA_D1 53 MIOB_VDDQ_1 MIOBD1 MIOB_D1 53
R8 MIOA_VDDQ_2 MIOAD2 N1 AB8 MIOB_VDDQ_2 MIOBD2 AC2

1
C137 T8 N3 C96 AC6 AB2 MIOB_D3
MIOA_VDDQ_3 MIOAD3 MIOB_VDDQ_3 MIOBD3 MIOB_D3 53

1
SC1U6D3V2KX-GP U9 M1 SC1U6D3V2KX-GP AC7 AB1 MIOB_D4
MIOA_VDDQ_4 MIOAD4 MIOB_VDDQ_4 MIOBD4 MIOB_D4 53
C102 M3 C113 AA1 MIOB_D5
2 MIOB_D5 53

2
SC1U6D3V2KX-GP MIOAD5 SC1U6D3V2KX-GP MIOBD5
P5 MIOA_D6 53 AB3

2
MIOAD6 MIOBD6 MIOB_D7
MIOAD7 N6 MIOBD7 AA3 MIOB_D7 53
N5 AC5 MIOB_D8
MIOAD8 MIOA_D8 53 MIOBD8 MIOB_D8 53
D M4 AB5 MIOB_D9 D
MIOAD9 MIOA_D9 53 MIOBD9 MIOB_D9 53
G72 G72 MIOAD10 L4 G72 G72 MIOBD10 AB4
MIOB_D11
L1 MIOACAL_PD_VDDQ MIOAD11 L5 Y1 MIOBCAL_PD_VDDQ MIOBD11 AA5 MIOB_D11 53
RFU13 W3
L3 MIOACAL_PU_GND Y3 MIOBCAL_PU_GND RFU14 V1
RFU15 Y5
RFU16 W1

L2 MIOA_VREF Y2 MIOB_VREF
RFU17 W4
RFU18 W5
RFU19 V5
RFU20 Y6

R3 1 TP9 TPAD30 G72 AE3


MIOA_HSYNC MIOB_VSYNC
MIOA_VSYNC R1 MIOB_HSYNC AF3
MIOA_DE P1 MIOB_DE AD1
MIOA_CTL3 P3 MIOB_CTL3 AD3

MIOA_CLKOUT R4 MIOB_CLKOUT AD4


MIOA_CLKOUT# P4 MIOB_CLKOUT# AD5
MIOA_CLKIN M5 MIOB_CLKIN AE4

1
R74 DY G72
10KR2J-3-GP R99 DY
G72 10KR2J-3-GP

2
C C

3D3V_S0
3D3V_S0 3D3V_S0

3D3V_S0

1
1

1
R342 DY
SBR113 DY R112 DY 10KR2J-3-GP

4
3

1
10KR2J-3-GP 10KR2J-3-GP
RN48 R343 G72

2
12 OF 14 SRN2K2J-1-GP 10KR2J-3-GP
2

Please close to the GPU U30L DY


F6
CHECK I2C FOR LCD

2
CLAMP

1
2
R348 33R2J-2-GP G72
THERMDN J1 G2 I2CC_SCL 1 2 R349 33R2J-2-GP G72
THERMDN I2CC_SCL I2CC_SDA G72_LCD_EDID_CLK 13
I2CC_SDA G1 1 2 G72_LCD_EDID_DAT 13
THERMDP K1 THERMDP
1

C536 K3
GPIO0
SC2200P50V2KX-2GP AJ11 H1
2

JTAG_TCK GPIO1
AK11 JTAG_TMS GPIO2 K5
AK12 JTAG_TDI GPIO3 G5 NV_LCDVDD_ON# 13
G72 G72 TP23 TPAD30 1 AL12 JTAG_TDO GPIO4 E2 NV_BL_ON 31
AL13 JTAG_TRST# GPIO5 J5

1
G6 R344 G72
GPIO6
1

K6 2K2R2J-2-GP R346 G72


R396 DY R391 G72 GPIO7 100KR2J-1-GP
GPIO8 E1 2 1 3D3V_S0
10KR2J-3-GP 10KR2J-3-GP D2 1
GPIO9 TP68 TPAD30
B H5 B

2
GPIO10
F4
2

GPIO11
GPIO12 E3

G72
3D3V_S0
1

R351 DY R352 DY
200R2J-L1-GP 10KR2J-L2-GP
2

U26

1 8 I2CC_SCL
VCC SMBCLK I2CC_SDA
2 DXP SMBDATA 7
1

C534 G72 3 6 G72_ALERT-


VGA_THERM_SHDN# DXN ALERT#
4 THERM# GND 5
SCD1U10V2MX-3GP
2

G781F-GP DY

om
A A

l.c
Q28

ai
2N7002PT-U R354 G72

tm
0R2J-2-GP

ho
3 2 1 2 VGA_THERM_SHDN#
S

19 OVERT#
Wistron Corporation
D

f@
G72 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
1

Taipei Hsien 221, Taiwan, R.O.C.

xa
G

he
Title

PLT_RST1# 7,16,18,22,26,31,32,34,46
G72M THERMAL
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 51 of 57
5 4 3 2 1
5 4 3 2 1

4 OF 14
U30D
AA12 GND_0 GND_100 K10
D AA2 GND_1 GND_101 K23 D
AA21 GND_2 GND_102 K29
AA31 GND_3 GND_103 K4
AB27 GND_4 GND_104 L27
AB6 GND_5 GND_105 L6
AC10 GND_6 GND_106 M12
AC23 GND_7 GND_107 M2
AC29 GND_8 GND_108 M21
AC4 GND_9 GND_109 M31
AD16 GND_10 GND_110 N15
AD17 GND_11 GND_111 N18
AD2 GND_12 GND_112 N29
AD31 GND_13 GND_113 N4
AE17 GND_14 GND_114 P15
AE27 GND_15 GND_115 P18
AE6 GND_16 GND_116 P27
AF11 GND_17 GND_117 P6
AF26 GND_18 GND_118 R13
AF29 GND_19 GND_119 R14

AF4 GND_20 GND_120 R15


AF7 GND_21 GND_121 R18
AG10 GND_22 GND_122 R19
AG11 GND_23 GND_123 R2
AG14 GND_24 GND_124 R20
AG15 GND_25 GND_125 R31
AG19 T16 U30E 5 OF 14
GND_26 GND_126
AG2 GND_27 GND_127 T17
AG22 GND_28 GND_128 T24 ROMCS# AA4
AG31 GND_29 GND_129 T29 F1 STRAP
AG8 GND_30 GND_130 T4 ROM_SO AA6
AH24 GND_31 GND_131 U16 AE26 MEMSTRAPSEL0 ROM_SI W2
AJ10 GND_32 GND_132 U17 AD26 MEMSTRAPSEL1 ROM_SCLK AA7
AJ13 GND_33 GND_133 U24 AH31 MEMSTRAPSEL2
AJ16 GND_34 GND_134 U29 AH32 MEMSTRAPSEL3
C AJ17 GND_35 GND_135 U8 I2CH_SCL G3 C
AJ20 GND_36 GND_136 V13 I2CH_SDA H3
AJ23 GND_37 GND_137 V14
AJ26 GND_38 GND_138 V15
AJ29 GND_39 GND_139 V18 U3 RFU6
V3 RFU7
AJ4 GND_40 GND_140 V19 U6 RFU8 BUFRST# F3
AJ7 GND_41 GND_141 V2 U5 RFU9
AK2 GND_42 GND_142 V20 U4 RFU10 STEREO T3
AK28 V31 V4 R73 10KR2J-3-GP G72
GND_43 GND_143 RFU11
AK31 GND_44 GND_144 W15 V6 RFU12 SWAPRDY_A M6 1 2 3D3V_S0
AL11 GND_45 GND_145 W18
AL14 W27 A26 G72_TESTMBMCLK
GND_46 GND_146 TESTMEMCLK TESTMODE
AL19 GND_47 GND_147 W6 TESTMODE H2
AL22 GND_48 GND_148 Y15 MCG0 AL10
AL25 GND_49 GND_149 Y18 MCG1 AG13

1
AL3 GND_50 GND_150 Y29
AL6 Y4 G72 R353 G72 R341 G72
GND_51 GND_151 10KR2J-3-GP 10KR2J-3-GP
AL9 GND_52
AM13 GND_53
AM16

2
GND_54
AM17 GND_55
AM20 GND_56
AM23 GND_57
AM26 GND_58
AM29 GND_59
B12 GND_60
B15 GND_61
B18 GND_62
B21 GND_63
B24 GND_64
B27 GND_65
B3 GND_66
B30 GND_67
B B6 GND_68
B
B9 GND_69
C2 GND_70
C31 GND_71
D10 GND_72
D13 GND_73
D16 GND_74
D17 GND_75
D20 GND_76
D23 GND_77
D26 GND_78
D29 GND_79
D4 GND_80
D7 GND_81
F11 GND_82
F14 GND_83
F19 GND_84
F2 GND_85
F22 GND_86
F25 GND_87
F31 GND_88
F8 GND_89
G26 GND_90
G29 GND_91
G4 GND_92
G7 GND_93
H27 GND_94
H6 GND_95
J16 GND_96
J17 GND_97
J2 GND_98
J31 GND_99
G72
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
G72M ROM & Spread Specturm
Size Document Number Rev
MYALL2 MP
Date: Friday, March 24, 2006 Sheet 52 of 57
5 4 3 2 1
5 4 3 2 1

D D

STRAPS, Mechanical Parts

3D3V_S0
Bit Signal Values
R357 2KR2-GP G72
1 2 MIOA_D1
MIOA_D1: SUB_VENDOR 0 NO_BIOS
Hynix256MB : R364_0 R93_1 R86_1 R91_1 1 READ FROM BIOS
Hynix128MB : R364_0 R370_0 R86_1 R91_1 R369 10KR2J-3-GP G72_INFINEON R91 10KR2J-3-GP G72_HYNIX
1 2 MIOB_D0 1 2 MIOB_D0: RAM_CFG_0 0000 RFU 1000 RFU
Hynix64MB : R85_1 R370_0 R86_1 R91_1 0001 8Mx32 BGA 1.8V 1001 RFU
R367 10KR2J-3-GP DY R86 10KR2J-3-GP G72 0010 RFU 1010 RFU
C 1 2 MIOB_D1 1 2 MIOB_D1: RAM_CFG_1 0011 RFU 1011 RFU C
0100 4Mx32 BGA 1.8V 1100 RFU
Infineon256MB : R364_0 R93_1 R86_1 R369_0 R370 10KR2J-3-GP G72_64_128MB_S R93 10KR2J-3-GP G72_256MB_S 0101 RFU 1101 RFU
1 2 MIOB_D8 1 2 MIOB_D8: RAM_CFG_2 0110 RFU 1110 RFU
Infineon128MB : R364_0 R370_0 R86_1 R369_0 0111 RFU 1111 RFU
R364 10KR2J-3-GP G72_128_256MB_S R85 10KR2J-3-GP G72_64MB_S 0011 16MX16
Infineon64MB : R85_1 R370_0 R86_1 R369_0 1 2 MIOB_D9 1 2 MIOB_D9: RAM_CFG_3

00 13.500 MHz
MIOB_D2: CRYSTAL_0 01 14.31818 MHz
10 27.000 MHz
MIOB_D6: CRYSTAL_1 11 UNKNOWN

MIOA_D7: TV_MODE_0 00 SECAM


01 NTSC
MIOA_D10: TV_MODE_1 10 PAL
R84 G72 11 CRT
2KR2-GP
MIOB_D4 1 2
51 MIOA_D0 MIOA_D0 R79 G72
51 MIOA_D1 MIOA_D1 2KR2-GP MIOB_D4: PCI_DEVID_0
MIOA_D6 MIOB_D5 1 2
51 MIOA_D6
51 MIOA_D8 MIOA_D8 R83 G72 MIOB_D5: PCI_DEVID_1 1000 (default 0x00FC)
51 MIOA_D9 MIOA_D9 2KR2-GP
MIOB_D3 1 2 MIOB_D3: PCI_DEVID_2
R76 DY
2KR2-GP MIOB_D11: PCI_DEVID_3 0111 G72MV
51 MIOB_D0 MIOB_D0 MIOB_D11 1 2
51 MIOB_D1 MIOB_D1
51 MIOB_D3 MIOB_D3
51 MIOB_D4 MIOB_D4
B 51 MIOB_D5 MIOB_D5 R614 DY B
51 MIOB_D7 MIOB_D7 2KR2-GP
51 MIOB_D8 MIOB_D8 MIOA_D0 1 2 0 ENABLED
51 MIOB_D9 MIOB_D9 MIOA_D0: PEX_PLL_EN_TERM100 1 DISABLED
51 MIOB_D11 MIOB_D11 R75 G72
2KR2-GP
MIOA_D6 1 2
R69 DY
2KR2-GP
MIOA_D8 1 2 MIOA_D6: 3GIO_PADCFG_LUT_ADDR[0] 0 DESKTOP
R65 DY 1 MOBILE
2KR2-GP MIOA_D8: 3GIO_PADCFG_LUT_ADDR[1]
MIOA_D9 1 2
MIOA_D9: 3GIO_PADCFG_LUT_ADDR[2]
010 DEFAULT

R77 DY
2KR2-GP 0 GPIO_PULLDN
MIOB_D7 1 2 MIOB_D7: MOBILE_GPIO 1 GPIO_FLOAT

For MEM strapping, Please use below table:


RAM_CFG[3:0] Config FB Bus Width Definitions
0000 16Mx16 DDR2 64-bit Elpida
0001 16Mx16 DDR2 64-bit Samsung

om
0010 16Mx16 DDR2 64-bit Infineon
A A
0011 16Mx16 DDR2 64-bit Hynix

l.c
0100 32Mx16 DDR2 64-bit Elpida

ai
tm
0101 32Mx16 DDR2 64-bit Samsung

ho
0110 32Mx16 DDR2 64-bit Infineon
Wistron Corporation

f@
0111 32Mx16 DDR2 64-bit Hynix
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
Taipei Hsien 221, Taiwan, R.O.C.

xa
he
Title
G72M STRAPPING
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 53 of 57
5 4 3 2 1
5 4 3 2 1

2 OF 14
FBAD[63..0] U30B
49,50 FBAD[63..0]
FBAD0 N27 A12
FBAD1 FBAD0 FBVDD_0
M27 FBAD1 FBVDD_1 A15
FBAD2 N28 A18
FBAD3 FBAD2 FBVDD_2
L29 FBAD3 FBVDD_3 A21
FBAD4 K27 A24
FBAD5 FBAD4 FBVDD_4
K28 FBAD5 FBVDD_5 A27
FBAD6 J29 A3
FBAD7 FBAD6 FBVDD_6
J28 FBAD7 FBVDD_7 A30
FBAD8 P30 A6
D FBAD9 FBAD8 FBVDD_8 D
N31 FBAD9 FBVDD_9 A9
FBAD10 N30 AA32
FBAD11 FBAD10 FBVDD_10
N32 FBAD11 FBVDD_11 AD32
FBAD12 L31 AG32
FBAD13 FBAD12 FBVDD_12
L30 FBAD13 FBVDD_13 AK32
FBAD14 J30 C32
FBAD15 FBAD14 FBVDD_14
L32 FBAD15 FBVDD_15 F32
FBAD16 H30 J32
FBAD17 FBAD16 FBVDD_16
K30 FBAD17 FBVDD_17 M32
FBAD18 H31 R32
FBAD19 FBAD18 FBVDD_18
F30 FBAD19 FBVDD_19 V32
FBAD20 H32 PLACE BELOW GPU 1D8V_S0
FBAD21 FBAD20
E31 FBAD21
FBAD22 D30 AA25
FBAD23 FBAD22 FBVDDQ_0
E30 FBAD23 FBVDDQ_1 AA26
FBAD24 H28 AB25
FBAD24 FBVDDQ_2

1
FBAD25 H29 AB26 C136 C103 TC37 TC38
FBAD26 FBAD25 FBVDDQ_3 C119 C522 C521

ST100U6D3VBM-7GP

ST100U6D3VBM-7GP
E29 FBAD26 FBVDDQ_4 G11
FBAD27 J27 G12 SCD1U10V2MX-3GP SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP

2
FBAD28 FBAD27 FBVDDQ_5 SCD1U10V2MX-3GP SC1U10V3ZY
F27 FBAD28 FBVDDQ_6 G15
FBAD29 E27 G18 G72 G72
FBAD30 FBAD29 FBVDDQ_7
E28 FBAD30 FBVDDQ_8 G21 G72 G72 G72
FBAD31 F28 FBAD31 FBVDDQ_9 G22 G72 G72
FBAD32 AD29 H11
FBAD33 FBAD32 FBVDDQ_10
AE29 FBAD33 FBVDDQ_11 H12
FBAD34 AD28 H15
FBAD34 FBVDDQ_12

1
FBAD35 AC28 H18 C520 G72 C519 G72 C89 C514
FBAD36 FBAD35 FBVDDQ_13 SCD022U16V2KX-3GP SCD022U16V2KX-3GP C518 C517
AB29 FBAD36 FBVDDQ_14 H21
FBAD37 AA30 H22 SCD1U10V2MX-3GP SC4D7U6D3V3KX-GP

2
FBAD38 FBAD37 FBVDDQ_15 SCD1U10V2MX-3GP SC1U10V3ZY
Y28 FBAD38 FBVDDQ_16 L25
FBAD39 AB30 L26
FBAD40 FBAD39 FBVDDQ_17
AM30 FBAD40 FBVDDQ_18 M25 G72 G72
FBAD41 AF30 FBAD41 FBVDDQ_19 M26 G72 G72
FBAD42 AJ31 R25
C FBAD43 FBAD42 FBVDDQ_20 C
AJ30 FBAD43 FBVDDQ_21 R26

1
FBAD44 AJ32 V25 C70
FBAD44 FBVDDQ_22

1
FBAD45 AK29 V26 C516 C515 G72
FBAD46 FBAD45 FBVDDQ_23 SCD1U10V2MX-3GP SCD022U16V2KX-3GP C72 C68 C513 C512 C85
AM31

2
FBAD47 FBAD46 SCD1U10V2MX-3GP
AL30

2
FBAD48 FBAD47
AE32 FBAD48
FBAD49 AE30 G72
FBAD50 FBAD49
FBAD51
AE31 FBAD50 G72 G72 G72 G72 G72
FBAD52
AD30 FBAD51 FBA_A3
G72
AC31 FBAD52 FBA_CMD0 P32
FBAD53 AC32 U27 FBA_A0 SCD1U10V2MX-3GP
FBAD54 FBAD53 FBA_CMD1 FBA_A2 SC4700P50V3KX-1GP SC4700P50V3KX-1GP
AB32 FBAD54 FBA_CMD2 P31
FBAD55 AB31 U30 FBA_A1 SC4700P50V3KX-1GP SC4700P50V3KX-1GP
FBAD56 FBAD55 FBA_CMD3 FBB_A3
AG27 FBAD56 FBA_CMD4 Y31
FBAD57 AF28 W32 FBB_A4
FBAD58 FBAD57 FBA_CMD5 FBB_A5
FBAD59
AH28 FBAD58 FBA_CMD6 W31
TPAD30 TP100
G72 FBA_A[12..0]
AG28 FBAD59 FBA_CMD7 T32 1 FBA_A[12..0] 49,50
FBAD60 AG29 V27 FBA_CS0# FBA_A0
FBAD61 FBAD60 FBA_CMD8 FBA_WE# FBA_CS0# 49,50 FBA_A1
AD27 FBAD61 FBA_CMD9 T28 FBA_WE# 49,50
FBAD62 AF27 T31 FBA_BA0 FBA_A2
FBAD63 FBAD62 FBA_CMD10 FBA_CKE FBA_BA0 49,50 FBA_A3
AE28 FBAD63 FBA_CMD11 U32 FBA_CKE 49,50
W29 ODT FBA_A4
FBA_CMD12 FBB_A2 ODT 49,50 FBA_A5
FBA_CMD13 W30
FBADQM0 M29 T27 FBA_A12 FBA_A6
49 FBADQM0 FBADQM0 FBA_CMD14

1
FBADQM1 M30 V28 FBA_RAS# FBA_A7
49 FBADQM1 FBADQM1 FBA_CMD15 FBA_RAS# 49,50
FBADQM2 G30 V30 FBA_A11 R78 FBA_A8
49 FBADQM2 FBADQM2 FBA_CMD16 10KR2J-3-GP
FBADQM3 F29 U31 FBA_A10 FBA_A9
49 FBADQM3 FBADQM3 FBA_CMD17
FBADQM4 AA29 R27 FBA_BA1 FBA_A10
50 FBADQM4 FBADQM4 FBA_CMD18 FBA_BA1 49,50
FBADQM5 AK30 V29 FBA_A8 FBA_A11
50 FBADQM5

2
FBADQM6 FBADQM5 FBA_CMD19 FBA_A9 FBA_A12
50 FBADQM6 AC30 FBADQM6 FBA_CMD20 T30
FBADQM7 AG30 W28 FBA_A6
50 FBADQM7 FBADQM7 FBA_CMD21
R29 FBA_A5
FBA_CMD22
R30 FBA_A7 G72
FBA_CMD23 FBB_A[5..2] 50
FBADQSP0 L28 P29 FBA_A4 FBB_A2
B 49 FBADQSP0 FBADQS_WP0 FBA_CMD24 B
FBADQSP1 K31 U28 FBA_CAS# FBB_A3
49 FBADQSP1 FBADQS_WP1 FBA_CMD25 FBA_CAS# 49,50
FBADQSP2 G32 Y32 FBB_A4
49 FBADQSP2 FBADQS_WP2 FBA_CMD26
FBADQSP3 G28 FBB_A5
49 FBADQSP3 FBADQS_WP3
FBADQSP4 AB28
50 FBADQSP4 FBADQS_WP4
FBADQSP5 AL32 P28 FBACLK0
50 FBADQSP5 FBADQS_WP5 FBA_CLK0 FBACLK0 49
FBADQSP6 AF32 R28 FBACLK0#
50 FBADQSP6 FBADQS_WP6 FBA_CLK0# FBACLK0# 49
FBADQSP7 AH30 Y27 FBACLK1
50 FBADQSP7 FBADQS_WP7 FBA_CLK1 FBACLK1 50
AA27 FBACLK1#
FBA_CLK1# FBACLK1# 50
FBADQSN0 M28
49 FBADQSN0 FBADQS_RN0
FBADQSN1 K32
49 FBADQSN1 FBADQS_RN1
FBADQSN2 G31
49 FBADQSN2 FBADQS_RN2
FBADQSN3 G27
49 FBADQSN3 FBADQS_RN3
FBADQSN4 AA28
50 FBADQSN4 FBADQS_RN4
FBADQSN5 AL31
50 FBADQSN5 FBADQS_RN5
FBADQSN6 AF31
50 FBADQSN6 FBADQS_RN6
FBADQSN7 AH29
50 FBADQSN7 FBADQS_RN7
RFU2 Y30
RFU3 AC26

AC27 1 TPAD30 TP8 G72


FBA_DEBUG

FBA_REFCLK D32
FBA_REFCLKN D31

SB
1D8V_S0
G23 1D2V_S0
FBA_PLLVDD L6

FBA_PLLAVDD G25 1 2
1

G24 C83 C64 C63


FBA_PLLGND BLM18BB221SN1D-GP
1

R347 G72
A SCD01U25V2KX-3GP SC4D7U6D3V3KX-GP A
C531 DY 1KR2F-3-GP SC1U10V3ZY G72
2

SCD1U10V2MX-3GP
2

FBVREF1 E32 G72 G72 G72


FB_VREF1
PLACE NEAR GPU
1

G72 Wistron Corporation


1

R350 G72
C533 G72 1KR2F-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U10V2MX-3GP Taipei Hsien 221, Taiwan, R.O.C.
2

Title
G72M MEMORY IF 1
Size Document Number Rev
MYALL2 MP
Date: Thursday, March 30, 2006 Sheet 54 of 57
5 4 3 2 1
5 4 3 2 1

3 OF 14

U30C
B7 AA23 R616 0R0603-PAD
FBCD0 FBVTT_0
A7 FBCD1 FBVTT_1 AB23 1 2 1D8V_S0
C7 FBCD2 FBVTT_2 H16
A2 FBCD3 FBVTT_3 H17
B2 FBCD4 FBVTT_4 J10
D C4 FBCD5 FBVTT_5 J23 D
A5 FBCD6 FBVTT_6 J24
B5 FBCD7 FBVTT_7 J9
F9 FBCD8 FBVTT_8 K11
F10 FBCD9 FBVTT_9 K12
D12 FBCD10 FBVTT_10 K21
D9 FBCD11 FBVTT_11 K22
E12 FBCD12 FBVTT_12 K24
D11 FBCD13 FBVTT_13 K9
E8 FBCD14 FBVTT_14 L23
D8 FBCD15 FBVTT_15 M23
E7 FBCD16 FBVTT_16 T25
F7 FBCD17 FBVTT_17 U25
D6 FBCD18
D5 FBCD19
D3 FBCD20
E4 FBCD21
C3 FBCD22
B4 FBCD23
C10 FBCD24
B10 FBCD25
C8 FBCD26
A10 FBCD27
C11 FBCD28
C12 FBCD29
A11 FBCD30
B11 FBCD31
B28 FBCD32
C27 FBCD33
C26 FBCD34
B26 FBCD35
C30 FBCD36
B31 FBCD37
C29 FBCD38
A31 FBCD39
C D28 FBCD40 C
D27 FBCD41
F26 FBCD42
D24 FBCD43
E23 FBCD44
E26 FBCD45
E24 FBCD46
F23 FBCD47
B23 FBCD48
A23 FBCD49
C25 FBCD50
C23 FBCD51
A22 FBCD52 FBC_CMD0 C13
C22 FBCD53 FBC_CMD1 A16
C21 FBCD54 FBC_CMD2 A13
B22 FBCD55 FBC_CMD3 B17
E22 FBCD56 FBC_CMD4 B20
D22 FBCD57 FBC_CMD5 A19
D21 FBCD58 FBC_CMD6 B19
E21 FBCD59 FBC_CMD7 B14
E18 FBCD60 FBC_CMD8 E16
D19 FBCD61 FBC_CMD9 A14
D18 FBCD62 FBC_CMD10 C15
E19 FBCD63 FBC_CMD11 B16
FBC_CMD12 F17
FBC_CMD13 C19
A4 FBCDQM0 FBC_CMD14 D15
E11 FBCDQM1 FBC_CMD15 C17
F5 FBCDQM2 FBC_CMD16 A17
C9 FBCDQM3 FBC_CMD17 C16
C28 FBCDQM4 FBC_CMD18 D14
F24 FBCDQM5 FBC_CMD19 F16
C24 FBCDQM6 FBC_CMD20 C14
E20 FBCDQM7 FBC_CMD21 C18
FBC_CMD22 E14
B
FBC_CMD23 B13 B
C5 FBCDQS_WP0 FBC_CMD24 E15
E10 FBCDQS_WP1 FBC_CMD25 F15
E5 FBCDQS_WP2 FBC_CMD26 A20
B8 FBCDQS_WP3
A29 FBCDQS_WP4
D25 FBCDQS_WP5 FBC_CLK0 E13
B25 FBCDQS_WP6 FBC_CLK0# F13
F20 FBCDQS_WP7 FBC_CLK1 F18
FBC_CLK1# E17

C6 FBCDQS_RN0
E9 FBCDQS_RN1
E6 FBCDQS_RN2
A8 FBCDQS_RN3
B29 FBCDQS_RN4
E25 FBCDQS_RN5
A25 FBCDQS_RN6
F21 FBCDQS_RN7
RFU4 C20
RFU5 D1

FBC_DEBUG F12

FBC_REFCLK B1
FBC_REFCLKN C1

FBC_PLLVDD G8

FBC_PLLAVDD G10

om
FBC_PLLGND G9
A A

l.c
R68 G72

ai
40D2R3F-GP

tm
A28 FB_VREF2 FBCAL_PD_VDDQ K26 1 2 1D8V_S0

ho
H26
Wistron Corporation

f@
FBCAL_PU_GND
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

in
FBCAL_TERM_GND J26
Taipei Hsien 221, Taiwan, R.O.C.

xa
1

G72

he
R63 R61 G72 Title
DY
60D4R3D-1-GP 30R3F-GP G72M MEMORY IF 2
Size Document Number Rev
MYALL2
2

MP
Date: Friday, March 24, 2006 Sheet 55 of 57
5 4 3 2 1
A B C D E

DCBATOUT DCBATOUT_6269 1D5V_PWR 1D5V_S0

G122 DCBATOUT_6269 G123


4 1 2 1D5V_SW DCBATOUT_6269 1 2 1D5V_SW 4

GAP-CLOSE-PWR R634 1D5V_SW GAP-CLOSE-PWR


G124 1D5V_SW 2D2R2J-GP G125
1 2 1D5V_SW C832 1 2 1D5V_SW

1
SCD1U25V3KX-GP 6269_PVCC 1 2 C834 1D5V_SW
GAP-CLOSE-PWR Close to pin1 SCD1U25V3ZY-3GP GAP-CLOSE-PWR

1
G126 C835 1D5V_SW G127

2
1 2 1D5V_SW SC2D2U16V3KX-GP 1 2 1D5V_SW
1D5V_SW

2
2

5
6
7
8
GAP-CLOSE-PWR C833 C836 GAP-CLOSE-PWR

D
D
D
D
G128 SC2D2U16V3KX-GP U81 SC10U35V0ZY-1GP C837 G129
1 2 1D5V_SW 1D5V_SW FDS6612A-1-GP 1D5V_SW SC10U35V0ZY-1GP 1 2 1D5V_SW

1
R636 6269_FSET 1D5V_SW 1D5V_SW
GAP-CLOSE-PWR 1KR3F-GP GAP-CLOSE-PWR
G130 6269_VCC G131

G
S
S
S
1 2 1D5V_SW 16,18,31,35,40,41,45 PM_SLP_S3# 1 2 6269_EN C838 1D5V_SW 1 2 1D5V_SW
R637 SCD01U50V2KX-1GP

4
3
2
1
2
GAP-CLOSE-PWR 73K2R2F-GP GAP-CLOSE-PWR

2
C839 1D5V_SW R638 1D5V_SW R635 1D5V_SW
SCD1U25V3KX-GP 2D2R2J-GP 0R2J-2-GP

12

2
1

7
4
U82 1D5V_SW
6269_PHASE 1 2 1 2

FSET
VIN

VCC

PVCC

EN

1
R639 1D5V_SW L46 1D5V_SW 1D5V_PWR
8K2R3F-GP 6269_BOOT 13 11 6269_LG IND-4D7UH-88-GP
BOOT LG 6269_UG
1 2 9 ISEN UG 14
1D5V_PWR 8 15 6269_PHASE 1 2
6269_FB VO PHASE
6 FB FCCM 3

PGOOD
3 3D3V_S0 3

COMP
1

2
PGND

GND
R641 R642
1

5
6
7
8
1K5R3F-GP 0R2J-2-GP

D
D
D
D
R640 DY 1D5V_SW ISL6269CRZ-GP U83 TC44 1D5V_SW
DY

16
5

10

17

1
1KR3F-GP 2 1D5V_SW FDS6690DS-GP SE220U6D3VM-4GP

1
R643 DY 1D5V_SW
0R2J-2-GP
2

2
1 2

G
S
S
S
SC15P50V3JN-GP
C840 NIPPON 220uF ESR=15mohm

4
3
2
1
1 2 6269_COMP
1D5V_SW
R645 1D5V_SW
C841 71K5R2F-1-GP
1

R644 1 2 1 2
1KR3F-GP
1D5V_SW SC2200P50V2KX-2GP Vref = 0.6V
1D5V_SW
Vo = (1+R8/R9)*0.6V =1.5V
2

2 2

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL6269/1D5V
Size Document Number Rev
A3 MP
MYALL2
Date: Thursday, March 30, 2006 Sheet 56 of 57

A B C D E
5 4 3 2 1

1. 5V_S5_G913 chnge to 5V_AUX_S5 ====> 1229 55. Change TC7 / TC8 to C844 / C845 from 22U/6.3V to 10U/6.3V for headphone system resume have "BO" sound ====> 0208-PD
2. Bluetooth USB change to port 7 ====> 1229 56. EMC change U1 and U7 materials from G528 / G546 to TPS2061 / TPS2062 ====> 0208-PD
3. Add CPU frequency selection resistor ====> 1229 57. Add R651 0 ohm for vendor test ====> 0208-PD
4. Change LVDS connector ====> 1229 58. Add R652 0 ohm for camera voltage ====> 0209-PD
5. Change C435 from 1uF to 0.47uF and for pop noise ====> 1230 59. Add R653 / Q37 / Q38 for quick discharge of 5V_S0 / 3D3V_S0 / 1D8V_S0 ====> 0209-PD
6. Change T7 and T8 from 68uF to 22uF for pop noise ====> 1230 60. Change DIMM connector from 62.10017.741(DM1)/62.10017.751(DM2) to 62.10017.691(DM1)/62.10017.A71(DM2) ====> 0209-PD
7. Add 579 ~ R584 / Q35 and Q36 for pop noise ====> 1230 61. Change G72 DACB net of DACA_VDD / DACA_VREF / DACA_RSET to DACB_VDD / DACB_VREF / DACB_RSET ====> 0209-PD
D D
8. Power change 1D05V_S0 and 1D5V_S0 power source ====> 0102 62. Delete R230 and C317 for non-delay RSMRST# ====> 0210-PD
9. Power change 5D_PWR and 3D3V_PWR power source ====> 0107 63. Stuff R285 for internal mic record issue ====> 0210-PD
10. R427 DY for PCIE bus clock ====> 0107 64. Change C541 and C544 from 27pF to 22pF with 18pF ====> 0210-PD
11. Delete Q14 / R543 / R254 for boot up ====> 0107 65. Change HDD1/ODD1/TVOUT1/TVIN1/LOUT1 symbol ====> 0210-PD
12. Power change R505 from 3.01K to 3.24K ====> 0107 66. Delete R330 for BAT_IN# double pull hi issue ====> 0213-PD
13. Power change R142 from 2.21K to 8.2K ====> 0107 67. EMI add EC79 ~ EC87 for 1D8V_S3 and EC88 ~ EC90 for DDR_VREF_S0 ====> 0213-PD
14. Power change R122 from 56.2K to 73.2K ====> 0107 68. Add U84/C846/R654/R655/R656/L47 for camera function ====> 0213-PD
15. Change R68 from 37ohm to 40.2ohm and R61 from 37ohm to 30ohm ====> 0107 69. EMI add spring GND1 ~ GND3 ====> 0213-PD
16. Delete R401 for UMA boot up short ====> 0107 70. Change TVOUT1 symbol for don't display TV issue ====> 0214-PD
17. ME change TVOUT1 material from 22.10021.F41 to 22.10021.H61 ====> 0107 71. Power change C805 and C806 from 51120_GND to GND ====> 0220-PD
18. R568 DY for CIR working ====> 0109 72. Change DC1material from 22.10037.C51( yellow power jack ) to 22.10037.C61( blue power jack ) ====> 0223-PD
19. Swap CARD1 pin18 and pin19 ====> 0110 73. Power change C466 from 0.1uF to 0.01uF for U19 burned issue ====> 0303-PD
20. Power change C699 from 510P/50V to 470P/50V ====> 0111 74. Power change material U47 / U48 / U53 / U54 from 84.07807.F37 to 84.06690.F37
21. Power change R397 and R399 from resister to gap-close ====> 0111 U49 / U50 / U51 / U52 from 84.07805.A37 to 84.06676.A37 for burned issue ====> 0306-PD
22. Remove R392 / R393 / C560 / R62 / R92 / R123 ====> 0111 75. Power change R523 / C738 from 3.57K / 5600pF to 4.42K / 47pF ====> 0306-MP
C C
23. Add R615 for G72 SS ====> 0111 76. Charger change R19 from 15.8K to 130K ====> 0307-MP
24. Dummy G72 external thermal sensor U26 / R351 / R352 / C534 ====> 0111 77. Charger change R22 from 100K to 499K and add R657 124K / Q39 2N7002 for 6 cell 3.2A with 8 cell 3.8A issue ====> 0309-MP
25. Add G72 strapping MIOA_D0 R614 with dummy ====> 0111 78. Acer suggestion change JK1 AV-IN connector from 62.10059.011 to 20.90045.001 and delete R292 / R293 ====> 0315-MP
26. EMI add capacitor EC66 ~ EC69 for 1000P/16V and EC70 ~ EC78 for 0.1U/16V ====> 0111 79. Change CRT1 / Q35 / Q36 footprint for SMT issue ====> 0317-MP
27. Power change R480 from 6.2K to 8.2K ====> 0112 80. Change LED5 driver voltage from 5V_S0 to 3D3V_S0 for light leak issue ====> 0317-MP
28. Delete R533 and R534 for cardreader detect ====> 0112 81. Delete dual layout of dummy of of L47 / L28 / L33 / L39 / L15 / L18 ====> 0317-MP
29. Delete R210 for 1D5V_S0 power rail ====> 0112 82. Short 0 ohm with pad ====> 0320-MP
30. Power delete R407 0 ohm ====> 0112 S : R89 / R418 / R225 / R537 / R316 / R5 / R52 / R51 / R333 / R345 / R335 / R651 / R558 / R559 / R532 / R285 / R649 / R650
31. Add TC34 ~ TC38 for U39_G72 ====> 0112 / R49 / R448 / R204 / R437 / R96 / R562 / R410 / R211 / R208 / R177 / R406 / R194 / R237 / R226 / R245 / R243 / R322 / R326
32. Remove R362 ====> 0112 / R327 / R425 / R444 / R495 / R496 / R560 / R616
33. Change R282 and R283 from 22 ohm to 2.2K for internal mic record function failure ====> 0112 P : R515 / R516 / R491 / R492 / R494 / R482 / R485 / R486 / R487 / R517 / R506 / R508 / R510 / R511 / R591 / R589 / R592
34. Change R306 / R308 / R313 / R311 from 47 ohm to 0 ohm for Hsync and Vsync input ====> 0112 / R593 / R596 / R598 / R603 / R600 / R246 / R247 / R623 / R626 / R624 / R42
35. Change R379 / R380 / R377 / R378 / R382 / R383 from 47 ohm to 0 ohm for TV input ====> 0112 83. Power change materials for high frequency noise issue ====> 0324-MP
36. Change CIR pull hi voltage from 5V to 3D3V ====> 0113 A. add TC45 ~ TC50
B 37. Delete G2 pad ====> 0113 B. dummy C691 / C692 / C689 /C685 / C686 / C688 B

38. Add GIGA LAN reset trace ====> 0113 C. delete C797 / C798 / C808 / C809
39. Power change 1D5V power source ====> 0117 84. Power change material TC23 from 79.3371T.30L to 80.22716.L08 and L42 / L43 from 68.4R750.10Z to 68.4R71A.10P ====> 0324-MP
40. Power change NVVDD power source ====> 0117 85. Change C29 material from 78.10491.4FL to 78.10520.5FL for hot plug don't boot up issue ====> 0328-MP
41. Power add 1D5V power switching ====> 0117 86. Change BOM level that add 1394 / TVIN / TVOUT / IR function ====> 0331-MP
42. Change C774 and C776 from 12pF to 15pF ====> 0119 87. ME change 1394 connector material from 62.10027.121 to 62.10027.561 for RoSH issue ====> 0331-MP
43. Change C640 and C648 from 20pF to 27pF ====> 0119
44. Change C722 and C737 from 4.7pF to 2.7pF ====> 0119
45. Change C42 and C44 from 22pF to 18pF ====> 0119
46. Power delete R633 and pull hi voltage ====> 0119
47. Power delete TC39, TC43 and change TC41, TC42 to 79.33719.20C ====> 0120
48. Add CRT detect circuit ====> 0119
49. Change R594 pull hi voltage from 3D3V_S0 to 3D3V_S5 for S3 wake up issue ====> 0123
50. Power change material L44 and L46 from 68.3R310.20A to 68.4R710.20D
L45 from 68.3R310.20A to 68.2R210.20B ====> 0123

om
A 51. Power change R480 from 8.2K to 12K ====> 0124 A

l.c
52. Power change capacitor material from 78.10699.42L to 78.10622.53L as C685 ~ C692 ====> 0125

ai
Wistron Corporation

tm
53. Delete U57 / C671 /C675 / C656 / C663 / U8 / D12 / D13 / C306 / R218 / R219 for don't boot up with battery only ====> 0205

ho
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
54. Change R59 from 100K to 8.2K and add R649 / R650 for don't boot up with battery only ====> 0205 Taipei Hsien 221, Taiwan, R.O.C.

f@
in
Title

xa
HISTORY

he
Size Document Number Rev
MYALL2 MP
Date: Friday, March 31, 2006 Sheet 57 of 57
5 4 3 2 1

Вам также может понравиться