LT1468

90MHz, 22V/s
16-Bit Accurate
Operational Amplifier
FEATURES DESCRIPTION
n 90MHz Gain Bandwidth, f = 100kHz The LT1468 is a precision high speed operational amplier
n 22V/s Slew Rate with 16-bit accuracy and 900ns settling to 150V for 10V
n Settling Time: 900ns (AV = 1, 150V, 10V Step) signals. This unique blend of precision and AC performance
n Low Distortion, 96.5dB for 100kHz, 10VP-P makes the LT1468 the optimum choice for high accuracy
n Maximum Input Offset Voltage: 75V applications such as DAC current-to-voltage conversion
n Maximum Input Offset Voltage Drift: 2V/C and ADC buffers. The initial accuracy and drift character-
n Maximum () Input Bias Current: 10nA istics of the input offset voltage and inverting input bias
n Minimum DC Gain: 1000V/mV current are tailored for inverting applications.
n Minimum Output Swing into 2k: 12.8V
n
The 90MHz gain bandwidth ensures high open-loop gain
Unity Gain Stable
n
at frequency for reducing distortion. In noninverting ap-
Input Noise Voltage: 5nV/Hz
n
plications such as an ADC buffer, the low distortion and
Input Noise Current: 0.6pA/Hz
n
DC accuracy allow full 16-bit AC and DC performance.
Total Input Noise Optimized for 1k < RS < 20k
n Specied at 5V and 15V The 22V/s slew rate of the LT1468 improves large-signal
performance in applications such as active lters and
APPLICATIONS instrumentation ampliers compared to other precision
op amps.
n 16-Bit DAC Current-to-Voltage Converter
n Precision Instrumentation The LT1468 is manufactured on a complementary bipolar
n ADC Buffer process. It is available in a space saving 3mm 3mm lead-
n Low Distortion Active Filters less package, as well as small outline and DIP packages.
n L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
High Accuracy Data Acquisition Systems Technology Corporation. All other trademarks are the property of their respective owners.
n Photodiode Ampliers

TYPICAL APPLICATION
Total Harmonic Distortion vs Frequency
16-Bit DAC I-to-V Converter 80
VS = 15V
AV = 2
TOTAL HARMONIC DISTORTION (dB)

RL = 2k
90
VOUT = 10VP-P
20pF

16 6k 100
DAC
INPUTS
2k
LT1468 VOUT
LTC1597 110
+ 50pF

120
OFFSET: VOS + IB (6k) < 1LSB OPTIONAL NOISE FILTER
SETTLING TIME TO 150V = 1.7s
SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE 130
1468 TA01
100 1k 10k 100k
FREQUENCY (Hz)
1468 TA02

1468fb

1
LT1468
ABSOLUTE MAXIMUM RATINGS (Note 1)

Total Supply Voltage (V+ to V ).................................36V Specied Temperature Range (Note 4) .... 40C to 85C
Maximum Input Current (Note 2) ...........................10mA Junction Temperature ........................................... 150C
Output Short-Circuit Duration (Note 3) ............ Indenite Storage Temperature Range................... 65C to 150C
Operating Temperature Range ................. 40C to 85C Lead Temperature (Soldering, 10 sec) .................. 300C

PIN CONFIGURATION
TOP VIEW TOP VIEW

NULL 1 8 DNC*
NULL 1 8 DNC* V+
IN 2 7
IN 2 7 V+ +
+IN 3
+ 6 OUT
+IN 3 6 OUT

V 4 5 NULL
V 4 5 NULL
N8 PACKAGE S8 PACKAGE
DD PACKAGE 8-LEAD PDIP 8-LEAD PLASTIC SO
8-LEAD (3mm 3mm) PLASTIC DFN *DO NOT CONNECT
TJMAX = 150C, JA = 43C/W TJMAX = 150C, JA = 130C/W (N8)
EXPOSED PAD IS INTERNALLY CONNECTED TO V TJMAX = 150C, JA = 190C/W (S8)

ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT1468CN8#PBF NA LT1468CN8 8-Lead PDIP 0C to 70C
LT1468IN8#PBF NA LT1468IN8 8-Lead PDIP 40C to 85C
LT1468CS8#PBF LT1468CS8#TRPBF 1468 8-Lead Plastic Small Outline 0C to 70C
LT1468IS8#PBF LT1468IS8#TRPBF 1468I 8-Lead Plastic Small Outline 40C to 85C
LT1468ACDD#PBF LT1468ACDD#TRPBF LDJX 8-Lead (3mm 3mm) Plastic DFN 0C to 70C
LT1468AIDD#PBF LT1468AIDD#TRPBF LDJX 8-Lead (3mm 3mm) Plastic DFN 40C to 85C
LT1468CDD#PBF LT1468CDD#TRPBF LDJX 8-Lead (3mm 3mm) Plastic DFN 0C to 70C
LT1468IDD#PBF LT1468IDD#TRPBF LDJX 8-Lead (3mm 3mm) Plastic DFN 40C to 85C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT1468CN8 NA LT1468CN8 8-Lead PDIP 0C to 70C
LT1468IN8 NA LT1468IN8 8-Lead PDIP 40C to 85C
LT1468CS8 LT1468CS8#TR 1468 8-Lead Plastic Small Outline 0C to 70C
LT1468IS8 LT1468IS8#TR 1468I 8-Lead Plastic Small Outline 40C to 85C
Consult LTC Marketing for parts specied with wider operating temperature ranges. *The temperature grade is identied by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specications, go to: http://www.linear.com/tapeandreel/

1468fb

2
 LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25C. VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS VSUPPLY MIN TYP MAX UNITS
VOS Input Offset Voltage N8, S8 15V 30 75 V
5V 50 175 V
LT1468A, DD Package 15V 30 75 V
5V 50 175 V
LT1468, DD Package 15V 100 200 V
5V 150 300 V
IOS Input Offset Current 5V to 15V 13 50 nA
IB Inverting Input Bias Current 5V to 15V 3 10 nA
IB + Noninverting Input Bias Current 5V to 15V 10 40 nA
Input Noise Voltage 0.1Hz to 10Hz 5V to 15V 0.3 VP-P
en Input Noise Voltage f = 10kHz 5V to 15V 5 nV/Hz
in Input Noise Voltage f = 10kHz 5V to 15V 0.6 pA/Hz
RIN Input Resistance VCM = 12.5V 15V 100 240 M
Differential 15V 50 150 k
CIN Input Capacitance 15V 4 pF
Input Voltage Range + 15V 12.5 13.5 V
5V 2.5 3.5 V
Input Voltage Range 15V 14.3 12.5 V
5V 4.3 2.5 V
CMRR Common Mode Rejection Ratio VCM = 12.5V 15V 96 110 dB
VCM = 2.5V 5V 96 112 dB
PSRR Power Supply Rejection Ratio VS = 4.5V to 15V 100 112 dB
AVOL Large-Signal Voltage Gain VOUT = 12.5V, RL = 10k 15V 1000 9000 V/mV
VOUT = 12.5V, RL = 2k 15V 500 5000 V/mV
VOUT = 2.5V, RL = 10k 5V 1000 6000 V/mV
VOUT = 2.5V, RL = 2k 5V 500 3000 V/mV
VOUT Output Swing RL = 10k 15V 13.0 13.6 V
RL = 2k 15V 12.8 13.5 V
RL = 10k 5V 3.0 3.6 V
RL = 2k 5V 2.8 3.5 V
IOUT Output Current VOUT = 12.5V 15V 15 22 mA
VOUT = 2.5V 5V 15 22 mA
ISC Short-Circuit Current VOUT = 0V, VIN = 0.2V 15V 25 40 mA
SR Slew Rate AV = 1, RL = 2k (Note 5) 15V 15 22 V/s
5V 11 17 V/s
Full-Power Bandwidth 10V Peak, (Note 6) 15V 350 kHz
3V Peak, (Note 6) 5V 900 kHz
GBW Gain Bandwidth f = 100kHz, RL = 2k 15V 60 90 MHz
5V 55 88 MHz
THD Total Harmonic Distortion AV = 2, VO = 10VP-P, f = 1kHz 15V 0.00007 %
AV = 2, VO = 10VP-P, f = 100kHz 15V 0.0015 %
tr, tf Rise Time, Fall Time AV = 1, 10% to 90%, 0.1V 15V 11 ns
5V 12 ns
Overshoot AV = 1, 0.1V 15V 30 %
5V 35 %
Propagation Delay AV = 1, 50% VIN to 50% VOUT, 15V 9 ns
0.1V 5V 10 ns

1468fb

3
LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25C. VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS VSUPPLY MIN TYP MAX UNITS
ts Settling Time 10V Step, 0.01%, AV = 1 15V 760 ns
10V Step, 150V, AV = 1 15V 900 ns
5V Step, 0.01%, AV = 1 5V 770 ns
RO Output Resistance AV = 1, f = 100kHz 15V 0.02
IS Supply Current 15V 3.9 5.2 mA
5V 3.6 5.0 mA

The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C.
0C TA 70C, VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS VSUPPLY MIN TYP MAX UNITS
VOS Input Offset Voltage N8, S8 15V 150 V
5V 250 V
LT1468A, DD Package 15V 150 V
5V 250 V
LT1468, DD Package 15V 300 V
5V 400 V
Input VOS Drift (Note 7) 5V to 15V 0.7 2.0 V/C
IOS Input Offset Current 5V to 15V 65 nA
Input Offset Current Drift 5V to 15V 60 pA/C
IB Inverting Input Bias Current 5V to 15V 15 nA
Negative Input Current Drift 5V to 15V 40 pA/C
IB + Noninverting Input Bias Current 50 nA
5V to 15V
CMRR Common Mode Rejection Ratio VCM = 12.5V 15V 94 dB
VCM = 2.5V 5V 94 dB
PSRR Power Supply Rejection Ratio VS = 4.5V to 15V 98 dB
AVOL Large-Signal Voltage Gain VOUT = 12.5V, RL = 10k 15V 500 V/mV
VOUT = 12.5V, RL = 2k 15V 250 V/mV
VOUT = 2.5V, RL = 10k 5V 500 V/mV
VOUT = 2.5V, RL = 2k 5V 250 V/mV
VOUT Output Swing RL = 10k 15V 12.9 V
RL = 2k 15V 12.7 V
RL = 10k 5V 2.9 V
RL = 2k 5V 2.7 V
IOUT Output Current VOUT = 12.5V 15V 12.5 mA
VOUT = 2.5V 5V 12.5 mA
ISC Short-Circuit Current VOUT = 0V, VIN = 0.2V 15V 17 mA
SR Slew Rate AV = 1, RL = 2k (Note 5) 15V 13 V/s
5V 9 V/s
GBW Gain Bandwidth f = 100kHz, RL = 2k 15V 55 MHz
5V 50 MHz
IS Supply Current 15V 6.5 mA
5V 6.3 mA

1468fb

4
 LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25C. 40C TA 85C, VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS VSUPPLY MIN TYP MAX UNITS
VOS Input Offset Voltage N8, S8 15V 230 V
5V 330 V
LT1468A, DD Package 15V 230 V
5V 330 V
LT1468, DD Package 15V 400 V
5V 500 V
Input VOS Drift (Note 7) 5V to 15V 0.7 2.5 V/C
IOS Input Offset Current 5V to 15V 80 nA
Input Offset Current Drift 5V to 15V 120 pA/C
IB Inverting Input Bias Current 5V to 15V 30 nA
Negative Input Current Drift 5V to 15V 80 pA/C
IB + Noninverting Input Bias Current 60 nA
5V to 15V
CMRR Common Mode Rejection Ratio VCM = 12.5V 15V 92 dB
VCM = 2.5V 5V 92 dB
PSRR Power Supply Rejection Ratio VS = 4.5V to 15V 96 dB
AVOL Large-Signal Voltage Gain VOUT = 12V, RL = 10k 15V 300 V/mV
VOUT = 10V, RL = 2k 15V 150 V/mV
VOUT = 2.5V, RL = 10k 5V 300 V/mV
VOUT = 2.5V, RL = 2k 5V 150 V/mV
VOUT Output Swing RL = 10k 15V 12.8 V
RL = 2k 15V 12.6 V
RL = 10k 5V 2.8 V
RL = 2k 5V 2.6 V
IOUT Output Current VOUT = 12.5V 15V 7 mA
VOUT = 2.5V 5V 7 mA
ISC Short-Circuit Current VOUT = 0V, VIN = 0.2V 15V 12 mA
SR Slew Rate AV = 1, RL = 2k (Note 5) 15V 9 V/s
5V 6 V/s
GBW Gain Bandwidth f = 100kHz, RL = 2k 15V 45 MHz
5V 40 MHz
IS Supply Current 15V 7.0 mA
5V 6.8 mA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by back-to-back diodes and two 100
series resistors. If the differential input voltage exceeds 0.7V, the input
current should be limited to 10mA. Input voltages outside the supplies will
be clamped by ESD protection devices and input currents should also be
limited to 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indenitely.
Note 4: The LT1468C is guaranteed to meet specied performance from
0C to 70C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at 40C and at 85C. The
LT1468I is guaranteed to meet the extended temperature limits.
Note 5: Slew rate is measured between 8V on the output with 12V input
for 15V supplies and 2V on the output with 3V input for 5V supplies.
Note 6: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2VP
Note 7: This parameter is not 100% tested.

1468fb

5
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage Input Common Mode Range Input Bias Current
and Temperature vs Supply Voltage vs Input Common Mode Voltage
7 V+ 80
TA = 25C VS = 15V
0.5 VOS < 100V 60 TA = 25C
6
1.0

COMMON MODE RANGE (V)

INPUT BIAS CURRENT (nA)

40
SUPPLY CURRENT (mA)

125C
1.5
5
20
2.0
IB
4 0
25C IB+
2.0 20
3
1.5
55C 40
1.0
2
0.5 60

1 V 80
0 5 10 15 20 0 3 6 9 12 15 18 15 10 5 0 5 10 15
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) INPUT COMMON MODE VOLTAGE (V)
1468 G01 1468 G02 1468 G03

Input Bias Current

vs Temperature Input Noise Spectral Density 0.1Hz to 10Hz Voltage Noise
30 1000 10
VS = 15V VS = 15V
VS = 15V
TA = 25C
20

INPUT CURRENT NOISE (pA/Hz)

INPUT VOLTAGE NOISE (nV/Hz)

AV = 101

VOLTAGE NOISE (100nV/DIV)

INPUT BIAS CURRENT (nA)

RS = 100k FOR in
10 in
100 1
IB
0

10 en
IB+ 10 0.1
20

30

40 1 0.01
50 25 0 25 50 75 100 125 1 10 100 1k 10k 100k TIME (1s/DIV)
TEMPERATURE (C) FREQUENCY (Hz) 1468 G06

1468 G04 1468 G05

Open-Loop Gain Open-Loop Gain

Warm-Up Drift vs Time vs Resistive Load vs Temperature
5 140 160
TA = 25C RL = 2k
0 VS = 15V
N8 5V 135 150
OFFSET VOLTAGE DRIFT (V)

5 VS = 15V
VS = 5V
OPEN-LOOP GAIN (dB)

OPEN-LOOP GAIN (dB)

S0-8 5V 140
10 130

15 130
N8 15V 125 VS = 5V
20 120
25 120
110
30 S0-8 15V
115 100
35

40 110 90
0 20 40 60 80 100 120 140 10 100 1k 10k 50 25 0 25 50 75 100 125
TIME AFTER POWER UP (s) LOAD RESISTANCE () TEMPERATURE (C)
1468 G07 1468 G08 1468 G09

1468fb

6
 LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing Output Voltage Swing Output Short-Circuit Current
vs Supply Voltage vs Load Current vs Temperature
V+ V+ 0.5 60
RL = 2k VS = 15V 85C VS = 15V
25C

OUTPUT SHORT-CIRCUIT CURRENT (mA)

1 1.0 55 VIN = 0.2V
RL = 10k 40C

OUTPUT VOLTAGE SWING (V)

1.5 50
OUTPUT VOLTAGE SWING (V)

2
2.0 45 SOURCE
3 SINK
2.5 40
4
35
4
2.5 30
3 40C
2.0 25
2 RL = 2k 1.5 25C 20
85C
1 RL = 10k 1.0 15
TA = 25C
V V 0.5 10
0 5 10 15 20 20 15 10 5 0 5 10 15 20 50 25 0 25 50 75 100 125
SUPPLY VOLTAGE (V) OUTPUT CURRENT (mA) TEMPERATURE (C)
1468 G10 1468 G11 1468 G12

Settling Time to 0.01% Settling Time to 0.01% Settling Time to 150V

vs Output Step, VS = 15V vs Output Step, VS = 5V vs Output Step
10 5 10
VS = 15V VS = 5V VS = 15V
8 RL = 1k 4 RL = 1k 8 AV = 1
AV = 1 AV = 1 AV = 1 AV = 1 RF = RG = 2k
6 3 6
CF = 8pF
4 2 4
OUTPUT STEP (V)

OUTPUT STEP (V)

OUTPUT STEP (V)

2 1 2
0 0 0
2 1 2
4 2 4
AV = 1 AV = 1
6 3 6
AV = 1 AV = 1
8 4 8
10 5 10
0 200 400 600 800 1000 300 400 500 600 700 800 0 200 400 600 800 1000
SETTLING TIME (ns) SETTLING TIME (ns) SETTLING TIME (ns)
1468 G13 1468 G14 1468 G15

Gain Bandwidth and Phase Gain Bandwidth and Phase

Margin vs Supply Voltage Margin vs Temperature Output Impedance vs Frequency
98 44 104 46 100
TA = 25C VS = 15V
AV = 1 102 44 TA = 25C
96 42 PHASE MARGIN
RF = RG = 5.1k PHASE MARGIN 100 VS = 15V 42 10
GAIN BANDWIDTH (MHz)

CF = 5pF
OUTPUT IMPEDANCE ()
GAIN BANDWIDTH (MHz)

94 40 AV = 100
PHASE MARGIN (DEG)
PHASE MARGIN (DEG)

RL = 2k 98 40
92 38 96 VS = 5V 38 1

90 36 94 36 AV = 10

92 VS = 15V 34 0.1
88 34 GAIN BANDWIDTH
GAIN BANDWIDTH 90 32
86 32 AV = 1
88 VS = 5V 30 0.01
84 30 86 28
82 28 84 26 0.001
0 5 10 15 20 55 25 0 25 50 75 100 125 10k 100k 1M 10M 100M
SUPPLY VOLTAGE (V) TEMPERATURE (C) FREQUENCY (Hz)
1468 G19
1468 G17 1468 G18

1468fb

7
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Power Supply Rejection Ratio Common Mode Rejection Ratio
Gain and Phase vs Frequency vs Frequency vs Frequency
70 100 160 120
VS = 15V VS = 15V

COMMON MODE REJECTION RATIO (dB)

POWER SUPPLY REJECTION RATIO (dB)
60 80 140 TA = 25C TA = 25C
100
PHASE
50 60 120 +PSRR
15V
80
100

PHASE (DEG)
40 40 PSRR
GAIN (dB)

5V
30 20 80 60
GAIN
20 0 60
15V 40
TA = 25C
10 AV = 1 20 40
RF = RG = 5.1k 5V 20
0 CF = 5pF 40 20
RL = 2k
10 60 0 0
10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
1468 G16 1468 G21
1468 G20

Frequency Response Frequency Response Frequency Response

vs Supply Voltage, AV = 1 vs Supply Voltage, AV = 1 vs Capacitive Load, AV = 1
5 5 14
TA = 25C VS = 15V
4 AV = 1 4 12 TA = 25C
RF = RG = 2k
RL = 2k 5V AV = 1
3 3 10
15V NO RL
RF = RG = 5.1k
2 2 8 100pF
5V 5V
1 1 15V 6 50pF
GAIN (dB)
GAIN (dB)

GAIN (dB)
15V
0 0 4 20pF
1 1 2 10pF
2 2 0
TA = 25C
3 3 AV = 1 2
4 4 RL = 2k 4
CF = 5pF
5 5 6
100k 1M 10M 100M 100k 1M 10M 100M 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
1468 G22 1468 G23 1468 G24

Frequency Response
vs Capacitive Load, AV = 1 Slew Rate vs Supply Voltage Slew Rate vs Temperature
14 30 45
VS = 15V TA = 25C VS = 15V
12 TA = 25C 28 AV = 1 40 AV = 1
AV = 1 RL = 2k SR RL = 2k
10
RF = RG = 5.1k 300pF 26 35
8 CF = 5pF
SLEW RATE (V/s)

SLEW RATE (V/s)

NO RL SR
6 24 30
GAIN (dB)

+SR
4 200pF 22 25
2 +SR
100pF 20 20
0
50pF 18 15
2
4 16 10

6 14 5
100k 1M 10M 100M 0 5 10 15 20 50 25 0 25 50 75 100 125
FREQUENCY (Hz) SUPPLY VOLTAGE (V) TEMPERATURE (C)
1468 G25 1468 G26 1468 G27

1468fb

8
 LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion + Noise Total Harmonic Distortion + Noise Undistorted Output Swing
vs Frequency vs Amplitude vs Frequency, 15V
0.010 50 30
VS = 15V
TA = 25C

OUTPUT VOLTAGE SWING (VP-P)

RL = 600 60 25
VO = 20VP-P AV = 1
5V 15V
NOISE BW = 80kHz

THD + NOISE (dB)

20
THD + NOISE (%)

70
AV = 1
AV = 10 80 15
0.001
AV = 1

MEASUREMENT 90 10
TA = 25C
LIMIT AV = 10
100 RL = 600 5
f = 10kHz VS = 15V
NOISE BW = 80kHz RL = 2k
0.0001 110 0
20 100 1k 10k 20k 0.01 0.1 1 10 1 10 100 1000
FREQUENCY (Hz) OUTPUT SIGNAL (VRMS) FREQUENCY (kHz)
1468 G28 1468 G29 1468 G30

Undistorted Output Swing

Small-Signal Transient, AV = 1 Small-Signal Transient, AV = 1 vs Frequency, 5V
10
VS = 5V
9 RL = 2k

OUTPUT VOLTAGE SWING (VP-P)

8
7 AV = 1

6 AV = 1
5
4
3
2
1468 G31 1468 G32
VS = 15V VS = 15V
1
0
1 10 100 1000
FREQUENCY (kHz)
1468 G33

Total Noise vs Unmatched

Large-Signal Transient, AV = 1 Large-Signal Transient, AV = 1 Source Resistance
100
VS = 15V
TA = 25C
f = 10kHz
TOTAL NOISE VOLTAGE (nV/Hz)

TOTAL
10 NOISE
RESISTOR
NOISE ONLY

1 RS
+

VS = 15V
1468 G34
VS = 15V
1468 G35

0.1
10 100 1k 10k 100k
SOURCE RESISTANCE, RS ()
1468 G36

1468fb

9
LT1468
APPLICATIONS INFORMATION
The LT1468 may be inserted directly into many operational
amplier applications improving both DC and AC perfor-
mance, provided that the nulling circuitry is removed.
The suggested nulling circuit for the LT1468 is shown
below.
Offset Nulling
V+
3
+ 0.1F
76
2
LT1468
4
5
1 0.1F
100k
V 1468 AI01
Layout and Passive Components
The LT1468 requires attention to detail in board layout
in order to maximize DC and AC performance. For best
AC results (for example fast settling time) use a ground
plane, short lead lengths, and RF-quality bypass capacitors
(0.01F to 0.1F) in parallel with low ESR bypass capaci-
tors (1F to 10F tantalum). For best DC performance, use
star grounding techniques, equalize input trace lengths
and minimize leakage (i.e., 1.5G of leakage between an
input and a 15V supply will generate 10nAequal to the
maximum IB specication.)
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close
to that of the inputs. For inverting congurations tie the
ring to ground, in noninverting connections tie the ring
to the inverting input (note the input capacitance will
increase which may require a compensating capacitor as
discussed below.)
Microvolt level error voltages can also be generated in
the external circuitry. Thermocouple effects caused by
temperature gradients across dissimilar metals at the
10
contacts to the inputs can exceed the inherent drift of
the amplier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Make no connection to Pin 8. This pin is used for factory
trim of the inverting input current.
The parallel combination of the feedback resistor and gain
2.2F
setting resistor on the inverting input can combine with the
input capacitance to form a pole that can cause peaking
or even oscillations. For feedback resistors greater than
2.2F 2k, a feedback capacitor of the value:
CF > (RG)(CIN/RF)
should be used to cancel the input pole and optimize dy-
namic performance. For applications where the DC noise
gain is one, and a large feedback resistor is used, CF should
be greater than or equal to CIN. An example would be a
DAC I-to-V converter as shown on the front page of this
data sheet where the DAC can have many tens of pF of
output capacitance. Another example would be a gain of 1
with 5k resistors; a 5pF to 10pF capacitor should be added
across the feedback resistor. The frequency response in a
gain of 1 is shown in the Typical Performance curves with
2k and 5.1k resistors with a 5pF feedback capacitor.
Nulling Input Capacitance
RF
CF
RG
CIN LT1468 VOUT
VIN +
1468 AI02
1468fb

APPLICATIONS INFORMATION
Input Considerations
Each input of the LT1468 is protected with a 100 series
resistor and back-to-back diodes across the bases of the
input devices. If the inputs can be pulled apart, the input
current should be limited to less than 10mA with an ex-
ternal series resistor. Each input also has two ESD clamp
diodesone to each supply. If an input is driven above
the supply, limit the current with an external resistor to
less than 10mA.
The LT1468 employs bias current cancellation at the inputs.
The inverting input current is trimmed at zero common
mode voltage to minimize errors in inverting applications
such as I-to-V converters. The noninverting input current
is not trimmed and has a wider variation and therefore a
larger maximum value. As the input offset current can be
greater than either input current, the use of balanced source
resistance is NOT recommended as it actually degrades
DC accuracy and also increases noise.
The input bias currents vary with common mode voltage
as shown in the Typical Performance Characteristics.
The cancellation circuitry was not designed to track this
common mode voltage because the settling time would
have been adversely affected.
The LT1468 inputs can be driven to the negative supply
and to within 0.5V of the positive supply without phase
reversal. As the input moves closer than 0.5V to the posi-
tive supply, the output reverses phase.
Input Stage Protection
R1 R2
100 100
+IN
Q1 Q2
IN
1468 AI03
LT1468
Total Input Noise
The curve of Total Noise vs Unmatched Source Resistance
in the Typical Performance Characteristics shows that
with source resistance below 1k, the voltage noise of the
amplier dominates. In the 1k to 20k region the increase
in noise is due to the source resistance. Above 20k the
input current noise component is larger than the resistor
noise.
Capacitive Loading
The LT1468 drives capacitive loads of up to 100pF in unity
gain and 300pF in a gain of 1. When there is a need to
drive a larger capacitive load, a small series resistor should
be inserted between the output and the load. In addition,
a capacitor should be added between the output and the
inverting input as shown in Driving Capacitive Loads.
Settling Time
The LT1468 is a single stage amplier with an optimal
thermal layout that leads to outstanding settling
performance. Measuring settling, even at the 12-bit level
is very challenging, and at the 16-bit level requires a great
deal of subtlety and expertise. Fortunately, there are two
excellent Linear Technology reference sources for settling
measurements, Application Notes 47 and 74. Appendix B
of AN47 is a vital primer on 12-bit settling measurements,
and AN74 extends the state of the art while concentrating
on settling time with a 16-bit current output DAC input.
Driving Capacitive Loads
RF
CF
RO (1 + RF/RG)/(2CL5MHz)
RF 10RO
RG CF = (2RO/RF)CL
RO
LT1468 VOUT
VIN + CL
1468 AI04
1468fb
11
LT1468
APPLICATIONS INFORMATION
The 150V settling curve in the Typical Performance
Characteristics is measured using the Differential Amplier
method of AN74 followed by a clamped, nonsaturating
gain of 100. The total gain of 500 allows a resolution of
100V/DIV with an oscilloscope setting of 0.05V/DIV
The settling of the DAC I-to-V converter on the front page
was measured using the exact methods of AN74. The
optimum nulling of the DAC output capacitance requires
20pF across the 6k feedback resistor. The theoretical limit
for 16-bit settling is 11.1 times this RC time constant or
1.33s. The actual settling time is 1.7s at the output of
the LT1468. The LT1468 is the fastest Linear Technology
amplier in this application.
The optional noise lter adds a slight delay of 100ns, but
reduces the noise bandwidth to 1.6MHz which increases
the output resolution for 16-bit accuracy.
Distortion
The LT1468 has outstanding distortion performance as
shown in the Typical Performance curves of Total Harmonic
Distortion + Noise vs Frequency and Amplitude. The high
open-loop gain and inherently balanced architecture reduce
errors to yield 16-bit accuracy to frequencies as high as
100kHz. An example of this performance is the Typical
Application titled 100kHz Low Distortion Bandpass Filter.
This circuit is useful for cleaning up the output of a high
performance signal generator such as the B & K type
1051 or HP3326A.
Another key application for LT1468 is buffering the input
to a 16-bit A/D converter. In a gain of 1 or 2 this straight-
forward circuit provides uncorrupted AC and DC levels
to the converter, while buffering the A/D input sample-
and-hold circuit from high source impedance which can
reduce the maximum sampling rate. The front page graph
shows better than 16-bit distortion for a gain of 2 with a
10VP-P output.

SIMPLIFIED SCHEMATIC
V+
I1 I2 I5

Q10
Q8
Q9 OUT
+IN Q1 Q2 IN Q5 Q6
Q7 Q11
Q4
Q3 BIAS C

I3 I4 I6

V
1468 SS

1468fb

12
 LT1468
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)

0.70 p0.05

3.5 p0.05 1.65 p0.05

2.10 p0.05 (2 SIDES)

PACKAGE
OUTLINE

0.25 p 0.05
0.50
BSC
2.38 p0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.125 0.40 p 0.10
TYP
5 8

3.00 p0.10 1.65 p 0.10

(4 SIDES) (2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD8) DFN 0509 REV C

4 1
0.200 REF 0.75 p0.05 0.25 p 0.05
0.50 BSC
2.38 p0.10
0.00 0.05 BOTTOM VIEWEXPOSED PAD

NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE

1468fb

13
LT1468
PACKAGE DESCRIPTION
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.400*
(10.160)
MAX

8 7 6 5

.255 .015*
(6.477 0.381)

1 2 3 4

.300 .325 .045 .065 .130 .005

(7.620 8.255) (1.143 1.651) (3.302 0.127)

.065
(1.651)
.008 .015 TYP
(0.203 0.381) .120
(3.048) .020
+.035 MIN (0.508)
.325 .015
.100 .018 .003 MIN

( 8.255
+0.889
0.381 ) (2.54)
BSC
(0.457 0.076)
N8 1002

NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)

.189 .197
.045 .005 (4.801 5.004)
.050 BSC NOTE 3
8 7 6 5

.245
MIN .160 .005
.150 .157
.228 .244
(3.810 3.988)
(5.791 6.197)
NOTE 3

.030 .005
TYP
1 2 3 4
RECOMMENDED SOLDER PAD LAYOUT

.010 .020
45 .053 .069
(0.254 0.508)
(1.346 1.752)
.004 .010
.008 .010
0 8 TYP (0.101 0.254)
(0.203 0.254)

.016 .050
.014 .019 .050
(0.406 1.270)
(0.355 0.483) (1.270)
NOTE: TYP BSC
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 0303

1468fb

14
 LT1468
REVISION HISTORY (Revision history begins at Rev B)

REV DATE DESCRIPTION PAGE NUMBER

B 10/09 Change to Both Packages in Pin Conguration 2

1468fb

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1468
TYPICAL APPLICATIONS
Instrumentation Amplier 16-Bit ADC Buffer
R5 R4 10pF
1.1k 50k
R2 C2
5k 2k
2pF
C1
R1 10pF 2k
50k 200 16 BITS
LT1468 LTC1605

R3 VIN + 1000pF
5k CAP
LT1468 33.2k 1468 TA04

+ LT1468 VOUT 2.2F

VIN + 1468 TA03

+
GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 480kHz

100kHz Low Distortion Bandpass Filter

1000pF
100kHz Distortion
SIGNAL LEVEL RL 2ND HARMONIC 3RD HARMONIC
22.1k
1VRMS 1M 106dB 103dB
1000pF 2VRMS 1M 105dB 105dB
11k
3.5VRMS 1M 106dB 104dB
VIN
1VRMS 2k 103dB 103dB
LT1468 VOUT
121 2VRMS 2k 99dB 103dB
+ RL 3.5VRMS 2k 96.5dB 102dB
1468 TA05

fO = 100kHz
Q=7
AV = 1

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1167 Precision Instrumentation Amplier Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain
Nonlinearity
LTC1595/LTC1596 16-Bit Serial Multiplying IOUT DACs 1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade
LTC1597 16-Bit Parallel Multiplying IOUT DAC 1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors
LTC1604 16-Bit, 333ksps Sampling ADC 2.5V Input, SINAD = 90dB, THD = 100dB
LTC1605 Single 5V, 16-Bit, 100ksps Sampling ADC Low Power, 10V Inputs, Parallel/Byte Interface
LT1469 Dual 90MHz 16-Bit Accurate Op Amp Dual Version of LT1468
LT1800 80MHz, 25V/s Low Power Rail-to-Rail Precision Op Amp VS 5V, ICC = 1.6mA, VOS 350V
LT6220 60MHz, 20V/s Low Power Rail-to-Rail Precision Op Amp VS 5V, ICC = 0.9mA, VOS 350V
LT1722 200MHz, 70V/s Low Noise Precision Op Amp VS 5V, en = 3.8nV/Hz, 85dBc at 1MHz
LTC6244HV Dual 50MHz, Low Noise, Precision CMOS Op Amp VS 5V, VOS 100V, IB 75pA

1468fb

LT 1009 REV B PRINTED IN USA

16 Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 1998