661
PERFORMANCE OF AVERAGE CURRENT MODE CONTROLLED PWM UPS INVERTER
WITH HIGH CREST FACTOR LOAD
M.E. Fraser and C.D. Manning
Loughborough University of Technology, England
ABSTRACT
This paper highlights h e problems encountered when
attempting to supply a high crest factor load ffom a ups
inverter. Inverter voltage control using an inner loop
consisting of an average current mode controller and an
outer loop is investigated. The choice of parameters, filter
components and compensators, will be discussed.
Simulation results will show the steady state and dynamic
performance of the inverter. The addition of load current
feedfonvard can cause the system to become unstable and
dbe explained with the aid of simplified control models.
The inverter under consideration is rated at 3OKVA with a
pwm switching frequency of 1SKHz
INTRODUCTION
Unintenuptablepower supplies (ups) are frequently used to
supply computers. Typically, a computer will use a standard
bndge rectifier with a large filter capacitor to provide the dc
voltage requirements. Thus,the ups inverter will 'see'a hgh
crest factor load. If the response of the inverter to the hgh
crest factor load is poor then the inverter output voltage will
be distorted.
There are many methods of inverter control. Only current
mode control schemes will be considered here. These
include hysteresis controllers, peak current mode controllers
and average current mode controllers. An average current
mode controller is used here in a buck derived (step-down)
converter arrangement. Among the advantages of average
current mode control over the hysteresis and peak current
mode controllers are constant switchmg frequency,
improved noise immunity and true average current mode
control afforded by sensing and controlling the average
inductor current, Dixon (I), Tang, Lee and Ridley (2).
THREE PHASE INVERTER
Inverter Topology
Commonly, a three phase ups requires a four-wire output
'Power Electronics and Variable-SpeedDrives: 26 - 28 October 1994, Conference PublicatfonNo 399,
which includes a neutral connection. Ths allows for
unbalanced loading. Three-phase, four-wire inverter
topologies are discussed in Divan (3). One of the most
common methods is the use of a centre-tapped dc supply. If
the dc supply is derived limn a rectifier then a centre-tapped
capacitor provides the neutral connection as in Figure 1.
The inverter consists of six switches and six diodes allowing
for bi-duectional power flow. An L-C filter is used in each
phase to reduce the high hquency switching components of
current and voltage. The neutral connection decouples the
three phases allowing easier analysis of the circuit. To this
effect only one phase need be considered.
Figure I : Three Phase Inverter with Neutral Connection
Inverter Control
The switches in one leg (one phase) of the inverter are
switched altematively, with the proviso that a deadband is
introduced when considering real switches to allow for the
tum-off tune of a switch. A sinusoidal voltage can be
achieved at the centre point of the leg with respect to
neutral with the use of a pulse width modulated (PWM)
control scheme
The average current mode control system is shown in Figure
2. In this scheme the current in the filter inductor (ILf)is
measured and compared to a reference winch f o m the
current error. The error is passed through a Proportional
and Integral (PI) compensator to form the modulating signal.
The PI compensator provides high gain at low frequencies,
but has a filtering effect on the switchmg component of the
measured current. The modulating signal is compared to a
triangular carrier signal to generate the required pwm signal
0IEE, 1994
 662
to control the switches
The average current mode control forms the inner current
loop. As it is the output voltage which requires regulation,
an outer voltage loop is used. The output voltage is
compared to a reference and the voltage error signal is
passed through another PI compensator. The signal then
forms the current reference for the inner current loop. The
proportional and integral constants in the PI compensators
are chosen to produce a stable systeim with good transient
response.
Figure 2: Closed Loop Control of Inverter Output Voltage
in One Phase
COMPONENT SELECTION
The magnitude of the ripple current and ripple voltage in
the output of the inverter are d e t e d e d by the size of the L-
C filters. Once the filter size has been chosen the PI
compensator constants are chosen. For this design example
a 30KW inverter is used (IOKW per phase) with an output
voltage of 240V,, 50Hi. The switching frequency is
1 SKHZ.
G C Filter Size
The inductor ripple current is dependant on the size of the
inductor and the switching frequency Figure 3 shows the
ripple waveform. It can be shown, Chryssis (4). that the
value of the inductance of the output lilter inductor is given
Vdc
Lr= -
4fA i
where V, is the dc bus voltage ;and f is the inverter
switching frequency.
The dc bus voltage must be at least twice the peak output
voltage, and V, is thus chosen as 800 volts allowing for
Figure3: Filter Inductor Ripple Current
variations in the input voltage. If the maximum inductor
ripple current is limited to 20% of the maximum peak-peak
output current (20% of 120 amps) and the switching
frequency is 15KHz then the filter inductance per phase (LJ
= 560pH.
The output filter capacitor size is determined by the
allowable output voltage ripple AV, and can be calculated
from (4)
Ifthe maximtun ripple voltage is limited to 2% of the peak-
peak output voltage (2% of 680 volts) then the required
filter capacitor (C,) 20uF.
'-
PI Compensator Constants Selection
The choice of parameters for the proportional and integral
controllers in the cw-rent and voltage loop not only depend
upon the Nyquist criieria, but also on the fact that the slope
of the measured current should be limited to no more than
that of the hiangular wave which form the inputs to the pwm
comparator, as described in Dixon (5) for a dc-dc buck
converter. Th~s prevenb subharmonic oscillations occurring
and also prevents multiple switching (converter switching
faster than specified by the frequency of the triangular
carrier wave).
Based upon the analysis of control loop design given in (5)
an approximate linearized control model of the inverter is
shown in Figure 3(a). The feedback signals of the inductor
current and output voltages obviously have to be scaled
down to low voltage control signals. For this example the
feedback signals are converted into per unit (pu) values of
full-load: I p.u. voltage feedback represents 340 volts
(d2*240 volts) and 1 p.u. current feedback represents 60
amps. The triangular waveform also has an amplitude of 1
p.u. and by approxunating the pulse width modulator to a
linear function this can be neglected from the model in
Figure 3(a).
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Current Loop PI Constants. The proportional constant
(KJ in the current loop PI controller is set to make sure the
slope of the measured current is less than the slope of the
triangular wave. The worst slope of the inductor current is
di. f-
when the maximum potential dlference is across the
inductor. With e being the inverter output voltage, the
m a x i " potential dlference is given by
f L = VdCl2+e (4)
For th~sdesign example the worse slope is :-
(400+340)/560.106 = 11321 Alms
In terms of per unit slope this is 1321/60 = 22 ms-'
The slope of the per unit triangular waveform is :-
4f = 4* 15.IO' = 60 ms-'
Setting $= 2 w ill guarantee the inductor current slope does
not exceed the triangular wave slope and leave extra margin
for the additional slope from the output voltage ripple.
Figure 4 shows a generalized straight line approximation of
the gaidfrequency responses in the current loop (ignoring
the feedfonuard) of the pudpower circuit and compensator
circuit. These were produced with the aid of the software
packages Matlab with Simulmk. The overall gain should
cross O B (at oc) with ample phase margin.
400
0 =-*K (5)
60L *
Figure 4: Straight Line Approximation of Current Loop
In th~sexample placing the pi compensator zero at w,/2 =
1 1,905 rads-' will give a phase margin of =63" (5).
K&,= 0,/2, p i n g &=23,810 rads-'.
Voltage Loop PI Constants. Figure 5 shows the
generalized straight line approximation of the voltage loop
gains, ignoring for the moment the effects of feedfonvard.
Gain d 0
I 1 ..T7r I I I I
Figure 5: Straight Line Approximation of Voltage Loop
The overall gain of the voltage loop should cross the 0 dB
(U,,)somewhere between 5 and 10 times lower than 0,.
Th~swdl make selectionof the voltage loop PI compensator
easier as the closed current loop will have a flat gain up to
U,, and prevents the current loop 'chasing' the voltage loop.
If U,, is chosen to be 2400 rads-' then, in h s case, the
compensator will have to cross over the power gain below
I/RC, (on the flat part of the gain).
To make 0,,=2400 rads-' the open-loop gain of the voltage
loop is set to 1. for full-load (R=5.76Q) &is chosen as 0.5
and& is 2033 rads? whch gives ample phase margin. As
ovis less than I R C , it should be noted that U,,will vary
with load. The amount of voltage ripple fed back to the
current loop is negligible and so will not cause any
problems.
SIMULATION RESULTS.
A time domain simulation of the performance of one phase
of the inverter was run using the SABER simulation
software. Figure 6 shows a step load change (1 00% - 10%
full-load) on the inverter at 2 5 m , giving per unit values of
the voltage refermce and output voltage. It can be seen that
the steady state (SO&) gain at 100% full-load (first 2Sms)
is not high enough and the output voltage does not track the
reference well. At 10% full-load (after 25ms) the steady
state gain is higher and the output voltage tracks the
 664
reference better. The output voltage rings at the load change
where the stability of the system is worsened due to the
reduced load.
'I..
Figure 6 : Step-Load Change on Inverter
LOAD CURRENT FEEDFORWARD
The dynamic and steady state perfbrmance of the inverter
may be improved with the we of filter capacitor current (no-
load cwent) and load current feedforward signals as shown
in (3) and Venkataramanan, Divan and Jahns (6). This
effectively by-passes the slow voltage loop. An outer loop
voltage PI compensator is used for trimming purposes and
compensates for any deviation in output voltage accuracy
due, for example, to component viiriations. Figure 7 shows
the control of one phase of the iriverter with the current
feedforward signals added. The load current feedforward
signal is measured straight from the load, the capacitor filter
current feedfmard signal canbe derived from the reference
voltage.
21 1
' load change and the dynamic response has also improved.
Figure 7: Control of One Phase ofthe Inverter with Filter
Capacitor Current and Load Current Feedforward Signals
Stability with Feedfonvard
Generally, if the system is stable without the feedforward
signals then it should be stable with the feedforward signals.
A new approximate equivalent linearized model of the
system with load current feedforward (ignoring the
negligible effect of the filter capacitor cunent feedforward)
is given in Figure 3(b) of the control system in Figure 7.
Accessing the effects of load current feedforward on the
stability of the system is not directly possible, but re-
arranging the system from two feedback signals and one
load current f d o r w a r d signal (ignoring the filter capacitor
current feedforward) to just two fL=dback signals allows
conventional feedback analysis to be performed on the
system. This is done by addmg the feedback signal I, to the
feedforward signal I,, which actually is the equivalent of
f&g back the filter capacitor current I,. This gives a new
inner current loop.
The effects of load current feedforward on the new inner
current loop and the outer voltage loop can be Seen in the
gaidfrequency plots in Figures 4 and 5 respectively. The
effect of the load current feedforward in the new inner
current loop does not alter where the new overall current
loop gain crosses 0 dF3 as, in this case, o,was set higher
than the resonant point (I/dL&). For systems designed
such that oL < IRC, without feedforward, the effect of
adding feedforward is to give a new higher O d B cross over
frequency in the voltage loop. Thls is due to the pole at
IRC,ofthe power gain now moving to the origin. The use
of the software &lackages Matlab with Simulink prove
invaluablefor m o d e h g the system in the frequency domain
to find out if the system is stable. In thls example there is
ample phase margin in the voltage loop. It is worth noticing
that with load c w e n t feedforward the new voltage and
current loops are independent of the load resistance.
Load Current Feedfonvard Simulation Results
Figure 8 shows a time domain simulation of one phase of the
inverter with a step load change of 100% - 10% full-load
with the addition of the current feedforward signals. The
graph shows the per unit values of the voltage reference and
the output voltage. If Figure 8 is compared to Figure 6 it
can be Seen that the feedforward signals have improved the
steady state response of the inverter before and after the step
Figure 8: Step-Load Change on Inverter with Feedforward
 665

HIGH CREST FACTOR LOAD reference well. The output voltage is clipped. The crest
factor of the inductor current is also much lower than
expected due to the output voltage being clipped.
A computer will typically load the inverter of a UPS with a
non-linear load consisting of a diode bridge rectifier with
smoothng capacitor. The current drawn from the inverter
will no longer be sinusoidal and will have a high crest
factor. The output voltage ideally should be sinusoidal, but
ifthe dynamics of the inverter are not 'good enough then the
sine wave will be distorted, typically the top of the sine wave
will be 'chopped off.

Effectively, during each1 half of the 5OHz cycle, the

combined R-C rectifier load is being switched on and off the
inverter by the rectifier. In terms of stability, the large
&er smoothmg capacitor needs to be taken into account.
The simplest method is lo create an equivalent circuit by
removing the diode bridge rectifier and moving the large Figure IO: Output of Inverter with Non-Linear Load
snoothmg capacitor and the dc load resistance to the ac side
ofthe load. Care should tie taken in the voltage loop as the
pole in the power gain is dependant on the total capacitance Feedfomard and Non-Linear Loads
of the filter and load in parallel.

The use of filter capacitor current feedforward and load

Simulation Results for High Crest Factor Load current feedforward has already demonstrated the
improvements to steady state and dynamic performance of
the inverter with a linear load, so it would be natural to use
Figure 9 shows one phase of the inverter with a non-linear feedforward with the non-linear load. A time domain
load consisting of a single-phase full-bridge diode rectitier simulation has been performed on such a system and it
with smoothmg capacitor, C. The rectifier, if connected to shows the system to be highly unstable.
atypically stlffsinusoidal voltage source, supplies a dc load
of IOKW at 290 volts dc with 2.5mF smoothing capacitor
giving 100 volts pk-pk lO0Hz ripple and a crest factor of
the input current of just above 3. This non-linear load is
supplied by the inverter. The voltage PI compensator is
adjusted to take into accoiunt the dc smoothing capacitor to
maintain stability and to give adequate phase margin.

Figure 1 1 : Straight Line Approximation of Current Loop

Gains with R-C 1 .oad

Figure 9 One Phase of Inverter with a Diode Bridge

Rectifier Load

Figure I O shows the per unit values of the output voltage

reference of the inverter, the output voltage of the inverter
and the inductor current from a time domain simulation A
number of observations can be made from the simulation. Figure 12: Straight Line Approximation of Voltage Loop
The output voltage from the inverter does not track the Gains with R-C Load
 666
Approximate Linearized Model To show why the system
becomes unstable an approximate equivalent linearized
model is used. This model lumps the rectifier load
resistance and smoothing capacitor together and moves them
to the inverter output, thereby enabling the diode bridge to
be removed from the model. The model is derived in a
similar way to that used to produce Figure 3(b) in that the
filter capacitor (C,) feedforward current is neglected and the
inductor current feedback and load current feedforward are
summed together resulting in a new feedback signal from
the filter capacitor (C,) current. This gives a new inner loop
as shown in Figure 3(c).
Figures 1 1 and 12 show the generalized straight line
power/pwm gadtkequency plot:; of the system for the new
current loop and voltage loop. The dc smoothing capacitor
is considerably larger than the inverter filter capacitor. Load
current feedforward has the e f i c t of separating the filter
capacitor (Cf) from the load capacitor (C) in the linearized
representation of the system model. This difference in size
can introduce instability as will be explained as follows. It
can he seen that the bandwidth of the new current loop is
drastically reduced with the load 'currentfeedforward due to
the zero of the filter capacitor ((2,)' alone passing through the
origin (Figure 3(c)). The voltage loop bandwidth has
increased due to the pole of the filter capacitor (C,) alone
passing through the origin. The result of this is that there is
a reduced phase margin in the boltage loop at 0dB (in this
case Matlab/Simulmk shows there is a negative phase
margin) due to the closed current loop gain rolling off at a
much lower frequency.
Stable Load Current Feedforward. The simplest solution
to stabilize the system with such a non-linear load is to
replace the inverter filter capacitor with one comparable in
size with the dc smoothing capacitor, thus increasing the
current loop bandwidth and reducing the voltage loop
bandwidth. Such an arrangement has been simulated using
an inverter filter capacitor the same size as thz dc smoothing
capacitor. The results of the simulation giving the per unit
output voltage reference, output voltage and output current
from the inverter are shown in Figure 13.
Figure 13: Inverter Output with Non-linear Load, Large
Filter Capacitor and Current Feedforward
It can be seen that the output voltage now tracks the
reference much better, and the crest factor is much larger
and is nearer that expected from a stiff voltage source.
Practical problems with this solution include the
requirement of a large per phase ac capacitor for the inverter
filter and the inverter switches have to he rated higher due
to the much larger reactive current flowing in the inverter
filter capacitor.
CONCLUSIONS
The use of average current mode control to control the
output of a three phase W S inverter has been presented in
this paper, backed up with time simulations using the
SABER simulation software. The choice of L-C filter
components has been discussed for a resistive load. The PI
compensator parameters are selected for optimum
performance by using an approximate linearized model of
the system, including an equivalent model with load current
feedforward with a resistive load.
High crest factor loads present a problem to the inverter
resulting in clipping of the output voltage waveform. The
use of full load current feedforward in an attempt to improve
the inverter performance can cause the system to become
unstable due to the presence of the large dc smoothing
capacitor, as was demonstrated with the aid of an equivalent
approximate linearized model. One solution to the problem
of instability is to use an inverter filter capacitor which is
comparable in size to the rectifier smoothing capacitor, but
at the expense of increased inverter cost.
REFERENCES
l.DixonL., 199l,UnitrodeSEM-800,Cl-l- Cl-14
2. Tang W., I,ec F.C., Ridley R.I3., 1992, APEC,747 - 755
3.DivanD.M..1991,APEC,81 - 8 7
4. Chryssis G., 1984, "High-Frequency Switching Power
Supplies",McGraw-MI Book Company, New York, U.S.A.
5. DixonL., 1991, UnitrodeSEM-800,7-1 - 7-10
6. Venkataranianan G., Divan D.M., Jahns T.M., 1989,
PESC REC., 2, 1013 - 1020
 667

v o l r n g c pi current p i

R
I+ I )
fsRC

(a): Inverter with Current and Voltage Loops with R Load

1-1

(b): Inverter with Load Current Feedforward with R Load

new inner loop

currenrpi I /ZfS)

fib

r --I

(c) Inverter with Load Current Feedforward and R-C Load

Figure 3: Per-Phase Approximate Lmeanzed Model of Inverter and Controller