R19

X1-2 ADC3
150 +3V3 +3V3
X1-1 +3V3
R21 GND L1
X2-2 ADC4 1mH
150 JP1 R39
C6 R14
X2-1 M20-9990245 1K IC9
100nF 10K
GND PC817
R23 C19 R1

1
2
3
4
5
R40 +3V3 +3V3 4 1
X3-2 ADC5 150pF DIGITALINPUT X17-1
150 10K GND 5K
X3-1 3 2
MCLR PGEC X17-2
C1 C2 +12V
R15 GND

MCLR
ADC7
ADC6

ADC5

ADC4
ADC3
PGED
X4-2 100nF 100nF GND
ADC6
150 +3V3 GND GND POWER_JACKPTH
X4-1
IC1 GND GND

22
21
20
19
18
17
16
15
14
13
12
R27 GND
PIC24F32KA304
X5-2 ADC7 J1
150

AVDD
MCLR

TCK
AVSS

TMS
RB1
RB0
RA1
RA0

RB15
RB14
X5-1 GND
+12V IC2
R29 GND
MC34063
X6-2 ADC8
D2 8 1
150 DRC SWC
X6-1 23 11 GF1
ADC8 RB2 RB13 ADC1
R3
24 10 7 2
+3V3 ADC9 RB3 RB12 ADC2 IPK SWE
GND 25 9 0R33
R31 ADC10 RC0 RB11
X7-2 26 8 6 3
ADC9 ADC11 RC1 RB10 C5 VCC TC
C22 27 7
150 ADC12 RC2 VDDCORE 10uF C17 L8 L6
X7-1 22pF 28 6 5 4 C9
Y2 VDD DISVREG
2uF 330uH C10
CII GND D1 330uH
29 5
GND VSS RC9 PGEC 1N5819 VCC
R33 GND 80MHz 30
RA2 RC8
4 PGED GND 10uF 150pF
X8-2 GND 31 3
ADC10 RA3 RC7 SDI R5 R4
32 2
150 CS TDO RC6 SDO
X8-1 GND C23 33 1
16K
RB4 RB9 SCK 10K
22pF C11
R35 GND GND GND 2uF
C21
X9-2 ADC11 +3V3
18pF
150
Y1 IC3

VDD
VSS
RC3
RC4
RC5
RA4

RB5
RB6
RB7
RB8
X9-1

TDI
GND 40MHz REG1117
R37 GND C20
X10-2 GND 18pF 3 2
ADC12 VIN VOUT

34
35
36
37
38
39
40
41
42
43
44

GND
150
X10-1 C18 T1+ X11-2
GND 10uF X11-1
R17 T1-

1
RESET
DIGITALINPUT

CS4
CS3
CS2
CS1
X15-2 ADC1
150
X15-1 T2+ X12-2
GND
R16 GND +3V3 T2- X12-1

LEDB
X16-2 ADC2 VCC VCC VCC VCC
150 VCC
GND VCC
X16-1 T3+ X13-2
GND C24 C25 C26 C27 R6 T3- X13-1
L7 200

TPOUT+

TPOUT-
100nF 100nF 100nF 100nF
+3V3 IC4 +3V3 IC5 R12 R13 VCC 200uH
9 10 T4+ X14-2
MAX6675 MAX6675 10k 10k GND
R10
4 3 4 3 GND GND GND GND 49R9 1 X14-1
VDD T+ T1+ VDD T+ T2+ T4-
T-
2 T1- T-
2 T2- IC8 R9 2
19
20
15
25
28

49R9 3
7 7 ENC28J60-SO 4
SDO MISO L4 SDO MISO L2
6 10uH 6 10uH 4 17 5
CS1 CS CS2 CS INT TPOUT+ TPOUT+
VDDRX

VDDOSC
VDD
VDDTX
VDDPLL

5 1 5 1 5 16 6
SCK SCK VSS SCK SCK VSS WOL TPOUT- TPOUT- R8 49R9
10 7 JP2
RESET RESET
13 8 CJCB88HF1Y0
TPIN+ TPIN+
GND GND 6 12 R7
SDO SO TPIN- TPIN- Shield
7 C13 C12

TPIN+
49R9

TPIN-
SDI SI
SCK
8
SCK LEDA
27 LEDA
100nF 100nF 11 12
9 26
IC7 CS CS LEDB LEDB
+3V3 IC6 +3V3
VSSOSC
VSSPLL

MAX6675 MAX6675 R2 GND

VSSRX

3 C14
VSSTX

CLKOUT GND
4 3 4 3 1 23 22pF L9 200
VSS

VDD T+ T3+ VDD T+ T4+ VCAP OSC1

2 2 14 24 200uH
T- T3- T- T4- RBIAS OSC2
Y3 22pF

LEDA
7 7 C16
SDO MISO L5 SDO MISO L3 10uF 25MHz
11
21

22
2
18

6 6 10uH C15
CS3 CS 10uH CS4 CS R11 GND
5 1 5 1 GND
SCK SCK VSS SCK SCK VSS 2K
GND
GND GND GND
GND
+3V3 +3V3 +3V3 +3V3

C3

10uF
C4

10uF
C7

10uF
C8

10uF
TIE 2015
GND GND GND GND Figure 1. Schematic diagram of the IOT system
 STUDENT PROFESSIONAL CONTEST, THE 24th EDITION, ORADEA, 22nd-25th APRIL 2015
Organizers: University of Oradea
Politehnica University of Bucharest Faculty of Electronics,
Telecommunications and Information Technology
Center for Technological Electronics and Interconnection Techniques

1 General description of the project

The project goal is to design and generate layout and fabrication files for the PCB of an IOT (Internet-of-Things) system.

The IOT system, presented in figure 1, consists of:

1. A microcontroller (IC1) for acquiring data from sensors, management of the TCP/IP stack and hosting an application
software;
2. An Ethernet interface circuit (IC8) for Internet connection through a RJ45 connector;
3. Four thermocouple measurement circuits (MAX6675) with serial interface;
4. A power supply;
5. Connectors (for power supply, I/O signals).
The IOT system, powered from a single 12V supply, can acquire 12 analog input signals, 4 thermocouple measurements and
one isolated discrete input. The application software hosted by the microcontroller can process these signals and can make
them available to worldwide access through the Ethernet connection.

The PCB of the system must be 120 x 80 mm in order to fit in a plastic enclosure. All I/O connectors must be placed as
specified in figure 2. The PCB must also provide 4 holes as specified below. All components must be placed on the top side.

Figure 2. Top view of the IOT system PCB.

Page | 1
2 General requirements
GEN-001 The design order is mandatory: libraries, schematic design, transfer procedure, layout design and post-
processing activities.
GEN-002 All dimensions must be considered in metric system.

3 Schematic design specifications (80 points)

SCH-001 The schematic project will be created using any CAD system accepted in the contest.
SCH-002 The components IC1, IC2 and IC8 will be created in a new library named with the last name
(surname/family name) of the contestant.
SCH-003 The schematic must be drawn in a clear manner, e.g.: all references and values must have proper size
and orientation, all references must be in accordance with table 1, un-necessary crossings must be
avoided.
Notes: the schematic diagram must be electrically correct, clean and readable. The main purpose is to generate a correct
netlist for PCB design, but it must also provide a clear representation of the functionality.

4 Mechanical design specifications (10 points)

MEC-001 The PCB geometry is specified in figure 2. Accepted tolerance is +0.1 mm.
MEC-002 The PCB must have 4 non-plated holes (3 mm diameter) for PCB fixing screws and must accommodate
all 4 screws in order to be fixed firmly. A clearance of 2 mm must be provided around holes.

5 Layout design specifications (145 points)

General rules: Critical signal traces must be kept as short as possible to decrease the likelihood of being affected by high
frequency noise from other signals, including noise carried on power and ground planes. Keeping the traces as short as
possible can also reduce capacitive loading. Since the transmission line environment extends onto the printed circuit board,
special attention must be paid to layout and routing of the differential signal pairs.

PCB-001 Components footprints and layout guidelines are specified in the attached datasheets.
PCB-002 The layout design must take into consideration the next stack up:
Layer 1 signal;
Layer 2 ground plane;
Layer 3 power plane;
Layer 4 signal.
Minimum trace width is 0.150 mm and minimum clearance is 0.150 mm.

PCB-003 Vias must be of 0.3mm drill diameter (except where otherwise stated), with a minimum annular ring of
0.15 mm. Only through hole vias are allowed.
PCB-004 Placement must follow the instructions given in figure 2.
PCB-005 All ICs must have a silkscreen marking for their reference pin (pin 1).
PCB-006 Minimum distance between 2 adjacent components is 0.5 mm, excepting connectors.
PCB-007 Minimum distance between components (including test pads) and outline of the PCB is 3 mm,
excepting connectors.
PCB-008 A 10 mm x 10 mm copper area, covered by solder mask, must be placed on the PCB (for data matrix
code).
PCB-009 IC3 must be provided with proper thermal pads/areas/clearance for cooling: 20 mm x 10 mm thermal
area (both sides) and 0.3 mm drills for thermal vias on a 1.27 mm grid. (
PCB-010 Differential pair routing rules:
TPOUT+, TPOUT-, TPIN+, TPIN- must be routed as two differential pairs using 0.2mm width
and 0.2mm spacing. The overall length of differential pairs must be less than 100 mm
measured from the Ethernet device to the magnetics. The differential traces (within each pair)
must be equal in total length to within 1.25 mm and as symmetrical as possible.
The two differential pairs are terminated with 49.9 resistors, placed near the Ethernet
controller. The C12 and C13 capacitors must be placed as close as possible (max. 3 mm) to the
49.9 ohm resistors, using a wide trace (0.5 mm width). No stubs are allowed on any
differential net.

Page | 2
PCB-011 Differential pair clearance rules:
Do not route a pair of differential traces closer than 2.5 mm to another differential pair;
Do not route any other signal traces parallel to the differential traces and closer than 2.5 mm
to the differential traces;
The reference plane for the differential pairs must be continuous (do not route differential
pairs over splits in the associated reference plane as it may cause discontinuity in
impedances).
PCB-012 Crystal routing rules:
Do not route traces and vias under crystals;
Traces between crystal and corresponding load capacitors must be as short as possible (max.
2.5 mm);
A local ground plane must be provided for each crystal circuitry.
PCB-013 Power and ground planes rules:
A dedicated area on the ground layer must be defined under JP2 connector, connected to the
Shield pins of the connector (max. 0.3 mm clearance to the ground plane);
The Shield pins must not use thermal-relief.
PCB-014 Traces between decoupling capacitors and IC pins must be as short (max. 2.5 mm) and as wide as the
width of the corresponding IC pad. Vias to the decoupling capacitors must be at least 0.6 mm in drill
diameter.
PCB-015 The width of the high current traces for IC3 must be sized for a maximum current of 1.5 A (T = 10C
and 35m copper thickness).

6 Test specifications (9 points)

TST-001 Test pads (having 1mm copper diameter) must be placed on the bottom layer of the PCB for the
following signals: SDI, SDO, SCK, GND. Test pads must be placed on a 2 mm grid.
TST-002 Global fiducial markers, having circular shape, must be introduced in a proper number, according to
IPC7351 standard.
TST-003 Local fiducial markers must be placed for component IC1, according to IPC7351.

7 Fabrication specifications (6 points)

FAB-001 The fabrication files for all electrical layers must be created.
FAB-002 Distinct files for non-plated and plated holes must be provided.
FAB-003 A list of testpoint coordinates must be created, as a text file.

Total: 250 points

Page | 3
Crt.
Part Value Package Description
No.

1 C1, C2, C6, C12, C13, C24-C27 100nF 0603 CAPACITOR

2 C3, C4, C5, C7, C8, C10, C16, C18 10uF 1206 CAPACITOR
3 C9, C19 150pF 0805 CAPACITOR
4 C11, C17 2uF see cap_pol datasheet POLARIZED CAPACITOR
5 C14, C15, C22, C23 22pF 0805 CAPACITOR
6 C20, C21 18pF 0805 CAPACITOR
7 D1 1N5819 DO35 DIODE
8 D2 GF1 DO214BA DIODE
9 IC8 ENC28J60-SO SO28 Microchip 10Mbit Et
10 IC1 PIC24F32KA304 TQFP44 microcontroller
11 IC2 MC34063 DIP-8 DC/DC converter
12 IC3 REG1117 SOT223 800mA and 1A LDO
see POWER_JACK_PTH
13 J1 POWER Power Jack
datasheet
see M20-9990245
14 JP1 M20-9990245 PIN HEADER
datasheet
15 L1 1mH 0603 SMD Multilayer Inductor
16 L2, L3, L4, L5 10uH 0603 SMD Multilayer Inductor
17 L6, L8 330uH see BS11 datasheet INDUCTOR
18 L7, L9 200uH 0603 SMD Multilayer Inductor
19 IC9 PC817 DIP-4 SHARP OPTO COUPLER
see
20 Y1 40MHz CX2520DBxxxxxD0GEJ CRYSTAL
datasheet
see
21 Y2 80MHz CX2520DBxxxxxD0GEJ CRYSTAL
datasheet
see
22 Y3 25MHz CX2520DBxxxxxD0GEJ CRYSTAL
datasheet
23 R1 5K 1206 RESISTOR
24 R2, R6 200 1206 RESISTOR
25 R3 0R33 1206 RESISTOR
26 R4 16K 1206 RESISTOR
27 R5, R12, R13, R14, R40 10K 1206 RESISTOR
28 R7, R8, R9, R10 49R9 1206 RESISTOR
29 R11 2K 1206 RESISTOR
R15, R16, R17, R19, R21, R23, R27,
30 150 1206 RESISTOR
R29, R31, R33, R35, R37
31 R39 1K 1206 RESISTOR
see CJCBA8HF1Y0
32 JP2 CJCBA8HF1Y0 RJ45 connector
datasheet
33 IC4 IC7 MAX6675 SO8 Thermocouple circuit
34 X1 ... X17 W237-102 see W237-102 datasheet WAGO SCREW CLAMP

Table 1. BOM for IOT system.

Page | 4