SkyPHY II DVB-S2 Transceiver ASIC (ECC4100)

High-Speed Satellite Communications Modem Chip

PRELIMINARY DATA SHEET

SkyPHY II AT-A-GLANCE
The SkyPHY II DVB-S2 transceiver chip by Efficient Channel Coding
DVB-S2 Compliant Transceiver-on-a-Chip
(ECC) is the worlds first DVB-S2 compliant satellite transceiver-
on-a-chip implemented in an Application Specific Integrated Circuit
Dual DVB-S2 Demodulators and Shared LDPC/
(ASIC). Integrating many of a broadband terminals components into
BCH Decoder
a single chip, it significantly reduces size, weight, power consumption
QPSK, 8PSK, 16APSK, and 32APSK
and manufacturing cost in contrast with solutions that require separate
Modulation
tuners, A/D converters, demodulators, modulators, encoders, decoders
Constant (CCM), Variable (VCM) and Adaptive
and various other discrete components.
(ACM) Coding and Modulation
The chip leverages the exceptional power and bandwidth efficiencies
Integrated L-Band Tuners and A/D Converters
of the DVB-S2 standard. ECCs unique design experience synthesizes
Demodulator Bypass, Decoder Bypass and
Adaptive Coding and Modulation (ACM), Forward Error Correction
Drop & Insert Features
(FEC), and Application Specific Integrated Circuit (ASIC) technology to
ASI, SPI and PCI-E Outputs
create the premier solution for next generation satellite communication
DiSEqC Interfaces
systems.
Built-in DVB-S2 Transmitter
The SkyPHY II DVB-S2 transceiver chip covers a wide range of symbol
Single DVB-S Compliant Receiver
rates and data formats, including MPEG transport streams, generic
Mobile Enhancements
data streams and GSE packets. It may be embedded in fixed and mobile
broadband via satellite equipment such as SCPC modems, VSATs,
TYPICAL APPLICATIONS
IRDs and hybrid terminals.
Next Generation Set Top Boxes for Satellite
Broadcast and Interactive TV
DVB-S2 Compliant SCPC Modems with
Adaptive Links
Broadband VSATs with ACM Capabilities
Mobile Terminals for COTM (Communications-
on-the-Move) Networks
Secure Ultra-High Bandwidth Video and/or
Data Links and Relays
SkyPHY II DVB-S2 Transceiver ASIC (ECC4100)

BLOCK DIAGRAM

TUNER DECODER DEMODULATOR

BYPASS BYPASS (DROP) BYPASS (INSERT)
JTAG I 2C PCI-E BERT
I
L-BAND DUAL A/D DVB-S2
Q
TUNER CONVERTER DEMODULATOR
ASI
TRANSPORT
MODE
STREAM
ADAPTER
PROCESSOR
DiSEqC

FRAME PL HEADER PL HEADER

SYNC DECODER DECODER, DECODER
DESCRAMBLER SPI
AND
CHANNEL
FRAME PL HEADER ARBITER PL HEADER
SYNC DECODER DECODER
TUNER
DiSEqC
BYPASS
TRANSPORT
MODE ASI
STREAM
ADAPTER
I PROCESSOR
L-BAND DUAL A/D DVB-S2
TUNER CONVERTER Q DEMODULATOR

DVB-S PLL PCR

RECEIVER
PROGRAMABLE
TRANSMITTER EXTERNAL SAMPLE
CLOCK CLOCK

The SkyPHY II DVB-S2 transceiver chip is compliant with The A/D converters operate at rates up to 200 MHz and
interactive services modes defined in the DVB-S2 stan- generate 8-bit digital I-Q samples. The maximum receive
dard that allow network operators to offer the benefits of symbol rate is equal to 0.5 times the sample clock rate (e.g.
ACM to their subscribers. Its distinctive architecture en- 100MSps for a 200MHz clock).
ables vendors of interactive, broadcast and mobile satel-
The SkyPHY II DVB-S2 transceiver chip reduces the time-
lite communications equipment to deliver cost-effective,
to-market for vendors who design and manufacture one-
high-performance products to the consumer, enterprise
way and two-way terminals. It is fabricated using the latest
and government markets.
65nm process technology and is delivered in a highly reli-
Modulation, demodulation, decoding and transport able BGA package.
stream processing functions are integrated into a single
The ratio of bits per symbol is equal to the total number
chip along with two L-band tuners and four A/D convert-
of bits, including DVB-S2 frame overhead, divided by
ers. The chip is a complete front-end product for Digital
the total number of modulated symbols. Required Es/
Video Recorder (DVR) equipped satellite receivers and
No measures the implementation losses for the DVB-S2
interactive Home Media Centers. It is also backwards
modulator, frequency upconverter and SkyPHY II DVB-
compatible such that one channel receives a DVB-S signal
S2 transceiver chip in L-band loopback.
while the other channel simultaneously receives a DVB-S2
waveform. The SkyPHY II DVB-S2 transceiver chip evaluation board
has an intuitive web based graphical user interface and
The chip processes MPEG transport streams, generic data
facilitates the integration and testing of the device in cus-
streams or encapsulated GSE packets. Data may be multi-
tomers platforms.
plexed and filtered according to a stream identifier in the
DVB-S2 baseband header or a set of PIDs. Extracted, fil-
tered and demultiplexed data are then output via ASI, SPI
or PCI-E interfaces.
 SkyPHY II DVB-S2 Transceiver ASIC (ECC4100)

KEY BENEFITS
Reduces Size, Weight, Power and Cost
High degree of integration
Reduction in size, weight and power consumption versus multi-component solutions
Significant savings in terms of bill-of-material costs

Improves Link Budget Performance

Low Implementation Loss Achieves Near Shannon-Limit Performance
Improved Link Performance (Relative to Legacy DVB-S Systems)
35% more throughput or equivalently 25% less bandwidth
Smaller receive antenna or lower downlink EIRP required
ACM doubles system capacity under typical conditions
2.8 dB more link margin on average

Boosts Link Availability

Dynamic SNR range greater than 14 dB
ACM counters rain fades with 28 modulation and coding choices
Maximum likelihood phase tracking provides excellent phase noise performance
Usable satellite transponder footprint extended to geographic edge-of-coverage

Reduces Time-to-Design and Time-to-Market

Complete System-on-a-Chip architecture facilitates rapid, low-cost terminal development
Flexible evaluation platform, easy-to-configure software and technical support
Significant savings on bill-of-material costs as compared to multi-component solutions

Targets Professional Satcom Applications

Interoperable with commercial-off-the-shelf DVB-S2 modulators
Open standard implementation suitable for multi-vendor environment

DVB-S2 PERFORMANCE CURVES

3.8
16APSK
3.6 THEORETICAL
3.4
K
PS
6A
3.2
1 M
-S2 QA
3 B 16
SPECTRAL EFFICIENCY (bits/symbol)

DV G 8PSK
SN
2.8
-D THEORETICAL
D VB
2.6

2.4
PS K
S 28
VB- K
2.2
D PS
SN G8
B-D
2
DV QPSK
1.8
THEORETICAL
1.6

1.4

PS K
1.2 -S Q
QPS
K DVB
-S2
1
DVB
0.8

0.6

0.4
-2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

SIGNAL TO NOISE RATIO (Es/No) (dB)

 SkyPHY II DVB-S2 Transceiver ASIC (ECC4100)

PRELIMINARY TECHNICAL SPECIFICATIONS

DVB-S2 Receivers
Input Frequency Range: 950 2150 MHz SkyPHY II DVB-S2 RECEIVER PERFORMANCE
L-band Tuners (2) (950 to 2150MHz) (64,800b Frames Measured at 30MSps)
A/D Converters (4) (200M samples per second) (8 bits per sample)
Receive Channel Rates: 100 kSps - 100 MSps LDPC CODE BW Es/No [dB] Eb/No [dB]
MOD
Code Rates: 1/4, 1/3 2/5, 1/2, 3/5, 2/3, 3/4, 5/6, 8/9, 9/10 IDENTIFIER EFFICIENCY (QEF) (QEF)

(28 MODCODES) QPSK 1/4 0.49 -1.60 1.50

Modes: CCM, VCM and ACM
ASI Outputs (2) / SPI Output (1) QPSK 1/3 0.66 -0.90 0.90

DiSEqC Interfaces (2)

QPSK 2/5 0.70 0.10 1.10

DVB-S2 Transmitter QPSK 1/2 0.99 1.30 1.30

Output Frequency Range: 950 1450 MHz (10 kHz steps)
D/A Converters (2) QPSK 3/5 1.19 2.70 2.00

Transmit Channel Rates: 100 kSps 100 MSps QPSK 2/3 1.32 3.30 2.10
Modulation Types: QPSK, 8PSK, 16APSK, 32APSK
Code Rates: 1/4, 1/3 2/5, 1/2, 3/5, 2/3, 3/4, 5/6, 8/9, 9/10 QPSK 3/4 1.49 4.20 2.50
(28 MODCODES)
QPSK 4/5 1.59 4.90 2.90
Modes: CCM, VCM and ACM
ASI Input (1) QPSK 5/6 1.65 5.40 3.20

DVB-S2 Configuration QPSK 8/9 1.77 6.40 3.90

Matched Filtering with 0.20, 0.25 or 0.35 Roll-off Factor
QPSK 9/10 1.79 6.60 4.10
Normal Frames (64,800 bits) or Short Frames (16,800 bits)
Pilot Tone Insertion 8PSK 3/5 1.78 5.90 3.40
PCR Reconstruction
Null Packet Insertion 8PSK 2/3 1.98 6.90 3.90

Fast Carrier Acquisition

8PSK 3/4 2.23 8.20 4.70
Automatic Carrier Search
Automatic Spectrum Inversion 8PSK 5/6 2.48 9.60 5.70
Power Conversation Modes
8PSK 8/9 2.65 10.90 6.70

Packet & Stream Processing 8PSK 9/10 2.68 11.20 6.90

MPEG Transport Streams, Generic Data Streams or GSE Packets
Transport Stream Multiplexing 16APSK 2/3 2.64 9.30 5.10
Stream Identifier Filtering of DVB-S2 Baseband Headers
16APSK 3/4 2.97 10.50 5.80
PID Filtering of MPEG Transport Streams
Transport Layer Bypass (Outputs Full Baseband Frames) 16APSK 4/5 3.17 11.40 6.40
GSE Packet Extraction
400 Mbps Maximum Transport Stream Rate 16APSK 5/6 3.30 11.90 6.70

16APSK 8/9 3.52 13.10 7.60

Diagnostic & Clock Interfaces
PCI Express 16APSK 9/10 3.57 13.30 7.80
I2C Interface
BERT Interface 32APSK 3/4 3.70 13.20 7.50

JTAG Boundary Scan

32APSK 4/5 3.95 14.10 8.10
External Clock Reference Input
PCR Reconstructed from DVB-S2 Carrier Signal 32APSK 5/6 4.12 14.70 8.60

32APSK 8/9 4.39 16.10 9.70

32APSK 9/10 4.45 16.40 10.00

Efficient Channel Coding Tel: 216.706.7800

4830 East 49th Street Fax: 216.706.7801
Cuyahoga Heights, OH 44125 Email: eccinfo@viasat.com
www.viasat.com/ecc
This data sheet is intended solely to provide advance information about products under development. ECC reserves the right to make changes and corrections to this data sheet and these
products at any time and without notice. ECC assumes no liability for these products in accordance with the standard terms and conditions of sale. Purchasers are solely responsible for the
selection and application of these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this data sheet.
Copyright 2009 ViaSat, Inc. All rights reserved. Printed in the USA. SkyPHY is a trademark of Efficient Channel Coding, Inc. All other trademarks mentioned are the sole property of their respective companies. Specifications and product
availability are subject to change without notice.