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Electronic and Information System Eng.

Laboratory Bachelor Course Seminar Published by: June 19, 2017

Title: Adiabatic Logic Design Using FinFET to verify Low Power and Logic
Speed

Presenter: Akito Franc de J Ximenes Lecture: Dr. Cancio MONTEIRO

I. SUPERVISING THESIS WRITING


a. CHAPTER I (Introduction )
1. Background
2. Objective of Research
3. Leakage power in CMOS
4. Structure of Thesis

References

[1] http://www.juliantrubin.com/encyclopedia/electronics/diode.html

[2] http://www.sjsu.edu/faculty/watkins/transist.htm

[3] E. Macii et al. (Eds.): PATMOS 2004, LNCS 3254, pp. 1735, 2004.

[4] https://homepage.cs.uri.edu/faculty/wolfe/book/Readings/Reading03.htm

[5] G.E. Moore, Cramming more components into integrated circuits, Electronics, vol. 38, no.
8, 1965.

[6] http://www.intel.co.uk/content/www/uk/en/history/museum-story-of-intel-4004.html

[7] http://www2.ee.washington.edu/faculty/hauck/publications/NanoSurvey.pdf

[8] https://en.wikipedia.org/wiki/CMOS#cite_note-1
Contents
CHAPTER I
1. INTRODUCTION
1.1 Background
1.2 Leakage Power in CMOS Circuit
1.3 Objective of this Thesis work
1.4 Structure of Thesis

CHAPTER II
2. BASIC THEORY
2.1 Conventional CMOS Logic Technique
2.2 Adiabatic Logic Technique
2.3 FinFET

CHAPTER III
3. RESEARCH METHODOLOGY
3.2 Project Workflow
3.4 Architecture Review

CHAPTER IV
4. DESIGN AND SIMULATION
4.1 Design and Simulation for 2N2N2P
4.1.1 Design and Simulation for 2N2N2P on CMOS
4.1.2 Design and Simulation for 2N2N2P on FinFET
4.2 Design and Simulation for IPAL
4.2.1 Design and Simulation for IPAL on CMOS
4.2.2 Design and Simulation for IPAL on FinFET
4.3 Design and Simulation for DCPAL
4.3.1 Design and Simulation for DCPAL on CMOS
4.3.2 Design and Simulation for DCPAL on FinFET
4.4 Discussion Review
CHAPTER V
5. CONCLUSION
5.1 Conclusion
5.2 Future Researches
REFERENCES
Chapter I

Introduction

1.1 Background

Through the process for very long time in evolution of create silicon semiconductor
technology, was the very first electronic component which named Diode by Frederick Guthrie in
1873 [1]. Before the transistor, engineers had to use vacuum tubes. Just like transistor, the
vacuum tube can switch electricity on or off, or amplify a current. Unfortunately there were
several reasons of vacuum tube itself and needed to has replacement due to its unreliable.

In 1946, the University of Pennsylvania in the US (United State) built a computer using
the vacuum tubes. The computer was so large that its vacuum tubes occupied the entire building,
and it consumed high power consumption and produced a lot of heat. Luckily transistor was
produced in Bells Laboratory by John Bardeen, Walter Brattain and William Shockley in
December 1947. The transistor was much more elegant solution to the needs of electronics. The
transistor is small and uses much, consume less power than the vacuum tube. Because it uses so
little power, there is little heat to dissipate and the transistor does not fail as quickly as does a
vacuum tube [2]. Between 1970 and 1980, the power consumption of a high-end processor rose
from 0.2W to 2W. In the early 1980s, the rst power-aware technology which named CMOS
technology was introduced. It was able to reduce the power requirements to lower levels that
much less complex systems some ten years ago consumed [3].

Based on my knowledge there are two types of semiconductor transistor which are BJT
(Bipolar Junction Transistor) and FET (Field Effect Transistor) with their own typical
characteristic. In 1958 Jack St Clair Kilby manufactured the first integrated Circuit or Chip
which is accumulating small transistors and they are connected together [4]. Currently the use of
BJT is reduced by CMOS technology in IC design, due to its application which preferred for low
current. However based on Moores law specifically stated that the number of transistors on an
affordable CPU (Central Processing Unit) would double about every 18 month's but more
transistors is more accurate. It is effectively said that approximately every two years personal
computer and other electronic devices can do twice as many new, innovative, unexpected thing
than before [5].
Process of scaling is fundamental to most of the benefits achieved by modern electronics.
For some applications, scaling allows for more devices to be integrated on a single die, and thus
provide greater functionality per chip. For example, increasing integration levels allow
microprocessor designers to include things such as larger caches to speed up memory accesses
and floating-point units to speed up floating point operations. Scaling also allows the same
circuit to be smaller, cheaper, faster, and consume less power, thus driving new applications such
as the cheap mobile electronics we now take for granted. Ultimately, the goal of scaling is to
build an individual transistor that is smaller, faster, cheaper, and consumes less power.
Unfortunately, the scaling down of lithographically patterned transistors cannot continue forever,
but nano-electronics may be able to continue the scaling when transistors attain unto their
limit[7]

Based on some study, it is investigated that the use of CMOS technology is coming to an
end. Although there are some candidates such as: nanowires, carbon nanotubes, grapheme
nanoribbons, resonant tunneling diodes, quantum cellular automata and etc. But there is found
that FinFET is the contender for replacing bulk MOSFET because of its double gate field-effect
as a technology of transistor innovation and it is easy in manufacture.

Fig.1 Power Crisis vs Frequency of CMOS Technology


1.2 CMOS and its Characteristic

Complementary metal-oxide-semiconductor, abbreviated as CMOS is a technology for


constructing integrated circuits. CMOS technology is used in microprocessors, microcontroller,
static RAM, and other digital logic circuits.

CMOS technology is also used for several analog circuits such as image sensors (CMOS
sensor), data converters, and highly integrated transceivers for many types of communication. In
1963, while working for Fairchild Semiconductor, Frank Wanlass patented CMOS (US patent
3,356,858).

CMOS is also sometimes referred to as complementary-symmetry metaloxide


semiconductor (or COS-MOS) [8]. The words "complementary-symmetry" refer to the fact that
the typical design style with CMOS uses complementary and symmetrical pairs of p-type and n-
type metal oxide semiconductor field effect transistors (MOSFETs) for logic functions.

Two important characteristics of CMOS devices are high noise immunity and low
static power consumption. Since one transistor of the pair is always off, the series combination
draws significant power only momentarily during switching between on and off states.
Consequently, CMOS devices do not produce as much waste heat as other forms of logic, for
example transistortransistor logic (TTL) or NMOS logic, which normally have some standing
current even when not changing state. CMOS also allows a high density of logic functions on a
chip. It was primarily for this reason that CMOS became the most used technology to be
implemented in VLSI chips.
1.3 Objective of this Thesis work
To study the work of conventional CMOS logic Technique
`To study the work of adiabatic logic technique
To study about FinFFET device
To do a comparison between CMOS and FinFET

1.4 Structure of this Thesis


This thesis is organized by grouping together from the evolution of semiconductor
component of electronic to new technology of downscaling in this twenty first century.
Chapter 1 introduces the history of developed semiconductor many years ago about their
manufacture as well as both advantages and disadvantages of each semiconductor
electronic component, and deal with the general theory of CMOS and its characteristic.
Chapter 2 specify deeply on conventional CMOS logic technique and deal with adiabatic
logic technique on the other hand concern more on FinFET device. Chapter 3 is about
methodology of my project workflow which I have to follow every steps in my final
thesis. Chapter 4 focus on design and simulation to see each result from each type of
adiabatic circuit for both CMOS and FinFET. Finally I conclude the result of all study
and simulation design in chapter 5.

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