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ST-1 UMA LOGIC SCHEMATICS ST-1


VER0.1
1.TITLE PAGE 36.BLANK 71.THINK ENGINE(1/2) June/19/2012
2.EC HISTORY 37.BLANK 72.THINK ENGINE(2/2)
D
3.CPU(1/16) : DDI/EDP 38.LCD CONNECTOR 73.DC-IN D

4.CPU(2/16) : MISC/JTAG 39.BLANK 74.BATTERY INPUT


5.CPU(3/16) : DDR3L CHANNEL-A 40.EXT CRT INTERFACE 75.BATTERY CHARGER(BQ24760)
6.CPU(4/16) : DDR3L CHANNEL-B 41.DISPLAY PORT CONNECTOR 76.CHARGER SELECTOR
7.CPU(5/16) : RTC/HDA/SATA/JTAG 42.BLANK 77.BATTERY MONITOR
8.CPU(6/16) : CLOCK SIGNALS 43.SATA HDD CONN 78.DC/DC VCC5M/VCC3M(TPS51220A)
9.CPU(7/16) : LPC/SPI/SMBUS/C-LINK 44.BLANK 79.DC/DC VCCCPUCORE(VT1320M)
10.CPU(8/16) : SYSTEM PM 45.USB POWER/CONN 80.DC/DC VCCCPUCORE(VT1334S)
11.CPU(9/16) : LCD/PCI/DDI CONTROL 46.GBE CLARKVILLE 81.BLANK
C
12.CPU(10/16) : GPIO/CPU/MISC/LPIO 47.GBE LAN SWITCH 82.VCCCPUCORE DECOUPLING C

13.CPU(11/16) : PCIE/USB 48.GBE MAGNETICS 83.BLANK


14.CPU(12/16) : POWER 49.RJ45 CONNECTOR 84.BLANK
15.CPU(13/16) : POWER 50.PCIE MINI CARD SLOT 85.DC/DC VCC1R05AMT(VT356)
16.CPU(14/16) : GND 51.MEDIA CARD CONTROLLER 86.DC/DC VCC1R35A(VT357)
17.CPU(15/16) : NCTF 52.MEDIA CARD ITERFACE 87.DC/DC VCC0R675B(TPS51200)
18.CPU(16/16) : CFG/RESERVED 53.SMART CARD I/F 88.BLANK
19.DDI-VGA CONVERTER 54.AUDIO ALC3232-GR 89.BLANK
20.BLANK 55.AUDIO CONNECTOR 90.BLANK
21.XDP CONNECTOR 56.AUDIO JACK SENSE 91.BLANK
B 22.RTC BATTERY 57.AUDIO EXT MIC I/F 92.DC/DC VCC1R5B(BD3551HFN) B

23.SPI FLASH 58.AUDIO SPEAKER 93.LOAD SW PCH SUS


24.DDR3L BASE MEMORY CH-A (1/2) 59.AUDIO BEEP 94.LOAD SW LAN
25.DDR3L BASE MEMORY CH-A (2/2) 60.DOCKING CONNECTOR 95.BLANK
26.DDR3L SO DIMM CHANNEL-B 61.MEC1633L(1/3) 96.LOAD SW B
27.BLANK 62.MEC1633L(2/3) 97.BLANK
28.BLANK 63.MEC1633L(3/3) 98.LOAD SW WWAN & WLAN
29.BLANK 64.KEYBOARD CONNECTOR 99.PTH FOR SCREW HOLES
30.BLANK 65.TOUCH PAD CONNECTOR 100.3rd USB
31.BLANK 66.BLANK
A
32.BLANK 67.FAN CONNECTOR A

33.BLANK 68.G-SNESOR
34.BLANK 69.TPM
35.BLANK 70.EEPROM/SMBUS SW Project Name :
STING UMA
Title :
TITLE PAGE

Size : Document Number : Rev :


C 0.1
Date: Thursday, May 02, 2013 Sheet : 1 of 100

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EC Modify History

Date EC version File name Date EC version File name

SIT
2012/07/24 ST-1_UMA_SDV_EC052-057 JV_ST-1_UMA_SDV_SCH_EC052-057_072401.pdf
2012/07/26 ST-1_UMA_SDV_EC058-066 JV_ST-1_UMA_SDV_SCH_EC058-066_072601.pdf
2013/03/14 ST-1_UMA_SIT-R2_EC001-009 JV_ST-1_UMA_SIT-R2_SCH_EC001-009_031401.PDF
2012/07/30 ST-1_UMA_SDV_EC067-082 JV_ST-1_UMA_SDV_SCH_EC067-082_073001.pdf
2013/03/15 ST-1_UMA_SIT-R2_EC010-011 JV_ST-1_UMA_SIT-R2_SCH_EC010-011_031501.PDF
2012/07/31 ST-1_UMA_SDV_EC083-091 JV_ST-1_UMA_SDV_SCH_EC083-094_073101.pdf

D
2012/07/31 ST-1_UMA_SDV_EC092-094 JV_ST-1_UMA_SDV_SCH_EC083-094_073101.pdf D

Date EC version File name


2012/08/01 ST-1_UMA_SDV_EC095 JV_ST-1_UMA_SDV_SCH_EC095_080101.pdf
2012/08/02 ST-1_UMA_SDV_EC096-099 JV_ST-1_UMA_SDV_SCH_EC096-099_080201.pdf SVT
2012/08/03 ST-1_UMA_SDV_EC100-102 JV_ST-1_UMA_SDV_SCH_EC100-102_080301.pdf
2013/04/19 ST-1_UMA_SVT_EC001-010 JV_ST-1_UMA_SVT_SCH_EC001-010_041901.PDF
2012/08/06 ST-1_UMA_SDV_EC103-109 JV_ST-1_UMA_SDV_SCH_EC103-109_080601.pdf
2013/04/24 ST-1_UMA_SVT_EC011-012 JV_ST-1_UMA_SVT_SCH_EC011-012_042401.PDF
2012/08/07 ST-1_UMA_SDV_EC110-120 JV_ST-1_UMA_SDV_SCH_EC110-120_080701.pdf
2013/04/30 ST-1_UMA_SVT_EC013-017 JV_ST-1_UMA_SVT_SCH_EC013-017_043001.PDF
2012/08/08 ST-1_UMA_SDV_EC121-132 JV_ST-1_UMA_SDV_SCH_EC121-132_080801.pdf
2012/08/09 ST-1_UMA_SDV_EC132-138 JV_ST-1_UMA_SDV_SCH_EC132-138_080901.pdf
2012/08/10 ST-1_UMA_SDV_EC139-142 JV_ST-1_UMA_SDV_SCH_EC139-142_081001.pdf
2012/08/13 ST-1_UMA_SDV_EC143-148 JV_ST-1_UMA_SDV_SCH_EC143-148_081301.pdf
2012/08/14 ST-1_UMA_SDV_EC149 JV_ST-1_UMA_SDV_SCH_EC149_081401.pdf
2012/08/15 ST-1_UMA_SDV_EC150-152 JV_ST-1_UMA_SDV_SCH_EC150-152_081501.pdf
2012/08/16 ST-1_UMA_SDV_EC153-154 JV_ST-1_UMA_SDV_SCH_EC153-154_081601.pdf
2012/08/17 ST-1_UMA_SDV_EC155-166 JV_ST-1_UMA_SDV_SCH_EC155-166_081701.pdf
2012/08/20 ST-1_UMA_SDV_EC167-180 JV_ST-1_UMA_SDV_SCH_EC167-180_082002.pdf
2012/08/21 ST-1_UMA_SDV_EC181-190 JV_ST-1_UMA_SDV_SCH_EC181-190_082101.pdf
2012/08/22 ST-1_UMA_SDV_EC191-193 JV_ST-1_UMA_SDV_SCH_EC191-193_082201.pdf
C 2012/08/23 ST-1_UMA_SDV_EC194-195 JV_ST-1_UMA_SDV_SCH_EC194-195_082301.pdf C

2012/08/24 ST-1_UMA_SDV_EC196 JV_ST-1_UMA_SDV_SCH_EC196_082401.pdf


2012/08/27 ST-1_UMA_SDV_EC197-199 JV_ST-1_UMA_SDV_SCH_EC197-199_082701.pdf
2012/08/28 ST-1_UMA_SDV_EC200-202 JV_ST-1_UMA_SDV_SCH_EC200-202_082801.pdf
2012/08/29 ST-1_UMA_SDV_EC203-209 JV_ST-1_UMA_SDV_SCH_EC203-209_082901.pdf
2012/09/10 ST-1_UMA_SDV_EC210-242 JV_ST-1_UMA_SDV_SCH_EC210-242_091001.pdf
2012/09/13 ST-1_UMA_SDV_EC243-244 JV_ST-1_UMA_SDV_SCH_EC243-244_091301.pdf
2012/09/20 ST-1_UMA_SDV_EC245 JV_ST-1_UMA_SDV_SCH_EC245_092001.pdf

SDV2

2012/09/25 ST-1_UMA_SDV2_EC001-010 JV_ST-1_UMA_SDV2_SCH_EC001-010_092501.pdf


2012/09/28 ST-1_UMA_SDV2_EC011-017 JV_ST-1_UMA_SDV2_SCH_EC011-017_092801.pdf
2012/10/05 ST-1_UMA_SDV2_EC019-023 JV_ST-1_UMA_SDV2_SCH_EC019-023_100501.pdf
2012/10/11 ST-1_UMA_SDV2_EC024-038 JV_ST-1_UMA_SDV2_SCH_EC024-038_101101.PDF
2012/10/12 ST-1_UMA_SDV2_EC039-043 JV_ST-1_UMA_SDV2_SCH_EC039-043_101201.PDF
2012/10/15 ST-1_UMA_SDV2_EC044-053 JV_ST-1_UMA_SDV2_SCH_EC044-053_101501.PDF

B
2012/10/15 ST-1_UMA_SDV2_EC054 JV_ST-1_UMA_SDV2_SCH_EC054-_101501.PDF B

2012/10/16 ST-1_UMA_SDV2_EC055-056 JV_ST-1_UMA_SDV2_SCH_EC055-056_101601.PDF

2012/10/17 ST-1_UMA_SDV2_EC057-059 JV_ST-1_UMA_SDV2_SCH_EC057-059_101701.PDF

2012/10/19 ST-1_UMA_SDV2_EC060-64 JV_ST-1_UMA_SDV2_SCH_EC060-064_101901.PDF

FVT

2012/10/29 ST-1_UMA_FVT_EC001-009 JV_ST-1_UMA_FVT_SCH_EC001-009_102901.PDF


2012/10/31 ST-1_UMA_FVT_EC010-012 JV_ST-1_UMA_FVT_SCH_EC010-018_103101.PDF
2012/10/31 ST-1_UMA_FVT_EC013-018 JV_ST-1_UMA_FVT_SCH_EC010-018_103101.PDF
2012/11/2 ST-1_UMA_FVT_EC019-026 JV_ST-1_UMA_FVT_SCH_EC019-026_110201.PDF
2012/11/6 ST-1_UMA_FVT_EC027-042 JV_ST-1_UMA_FVT_SCH_EC027-042_110601.PDF
2012/11/20 ST-1_UMA_FVT_EC043 JV_ST-1_UMA_FVT_BRD_112001.brd
2012/11/8 ST-1_UMA_FVT_EC044-047 JV_ST-1_UMA_FVT_SCH_EC044-47_110801.PDF
2012/11/22 ST-1_UMA_FVT_EC048-069 JV_ST-1_UMA_FVT_SCH_EC048-69_112201.PDF
2012/12/17 ST-1_UMA_FVT_EC070-078 JV_ST-1_UMA_FVT_SCH_EC070-080_121701.PDF

SIT

2013/01/14 ST-1_UMA_SIT_EC001-020 JV_ST-1_UMA_SIT_SCH_EC001-020_011401.PDF

2013/01/21 ST-1_UMA_SIT_EC021-027 JV_ST-1_UMA_SIT_SCH_EC021-021_012101.PDF


A A

2013/01/29 ST-1_UMA_SIT_EC028-036 JV_ST-1_UMA_SIT_SCH_EC028-036_012901.PDF

2013/01/31 ST-1_UMA_SIT_EC037-042 JV_ST-1_UMA_SIT_SCH_EC037-042_013101.PDF

2013/02/04 ST-1_UMA_SIT_EC043-044 JV_ST-1_UMA_SIT_SCH_EC043-044_020401.PDF


2013/02/07 ST-1_UMA_SIT_EC045-051 JV_ST-1_UMA_SIT_SCH_EC045-051_020701.PDF
2013/03/06 ST-1_UMA_SIT_EC052-057 JV_ST-1_UMA_SIT_SCH_EC052-057_030601.PDF
2013/03/07 ST-1_UMA_SIT_EC058 JV_ST-1_UMA_SIT_SCH_EC058_030701.PDF

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U58 QEVF@
U58 QEK1@ U58 QEK2@ U58 QEVE@

S IC CL8064701476302 QEVF C0 1.8G BGA


S IC CL8064701462800 QEK1 C0 1.7G BGA S IC CL8064701462901 QEK2 C0 1.5G BGA S IC CL8064701477702 QEVE C0 1.6G BGA SA00005XG00
SA00005X400 SA00005X200 SA00005X300

U58 QEK3@ U58 QEK4@ U58 QEVD@ U58 QEVG@


D D

S IC CL8064701463001 QEK3 C0 1.4G BGA S IC CL8064701463101 QEK4 C0 1.3G BGA S IC CL8064701477202 QEVD C0 1.8G BGA S IC CL8064701478202 QEVG C0 1.7G BGA VCCCPUIO_A
SA00005X000 SA00005VZ00 SA00005XH00 SA00005VY00

ZZZ

2
R5
HASWELL_MCP_E 24.9_0201_1%
U58A
PCB

1
DAA00004F00

DDIP1_0N C54 C45


<41> DDIP1_0N DDIP1_0P C55 DDI1_TXN0 EDP_TXN0 B46 EDP_TXN0 <38>
<41> DDIP1_0P DDIP1_1N B58 DDI1_TXP0 EDP_TXP0 A47 EDP_TXP0 <38>
<41> DDIP1_1N DDIP1_1P C58 DDI1_TXN1 EDP_TXN1 B47 EDP_TXN1 <38>
<41> DDIP1_1P DDIP1_2N B55 DDI1_TXP1 EDP_TXP1 EDP_TXP1 <38>
<41> DDIP1_2N DDIP1_2P A55 DDI1_TXN2 C47
<41> DDIP1_2P A57 DDI1_TXP2 EDP_TXN2 C46
DDIP1_3N
<41> DDIP1_3N DDIP1_3P B57 DDI1_TXN3 EDP_TXP2 A49
<41> DDIP1_3P DDI1_TXP3 DDI EDP EDP_TXN3 B49
DDIP2_0N C51 EDP_TXP3
DDIP2_0P C50 DDI2_TXN0 A45
C53 DDI2_TXP0 EDP_AUXN B45 EDP_AUXN <38>
DDIP2_1N
DDIP2_1P B54 DDI2_TXN1 EDP_AUXP EDP_AUXP <38>
C C49 DDI2_TXP1 D20 EDP_COMP C
<60> DDIP2_2N B50 DDI2_TXN2 EDP_RCOMP A43
<60> DDIP2_2P A53 DDI2_TXP2 EDP_DISP_UTIL
<60> DDIP2_3N B53 DDI2_TXN3
<60> DDIP2_3P DDI2_TXP3

1 OF 19 Rev0p7

HASWELL-MCP-E-ULT_BGA1168

2+3@

<19,60> -DOCK_ATTACHED_3B

VCC3B VCC3B U108

2 19 DOCK_DDIP2_1P <60>
9 XSD B0_P 18
SEL B0_N DOCK_DDIP2_1N <60>
B 17 B
B1_P DOCK_DDIP2_0P <60>
16 VCC3B VCC5B
B1_N DOCK_DDIP2_0N <60>
DDIP2_1P 3 15
DDIP2_1N 4 A0_P C0_P 14 DP2VGA_DDIP2_1P <19>
7 A0_N C0_N 13 DP2VGA_DDIP2_1N <19>
DDIP2_0P
1000P_0201_25V7K

1000P_0201_25V7K

DDIP2_0N 8 A1_P C1_P 12 DP2VGA_DDIP2_0P <19>


A1_N C1_N DP2VGA_DDIP2_0N <19>

2
2 1U_0201_6.3V6 2 2 5 2
1 GND 11 U_R957
U_C595 U_C597 6 VDD GND 20 U_C598
VDD GND 100K_0201_5%
10 21 0.1U_0201_6.3V6K
1 1 1 VDD THERMAL PAD 1

1
U_C596 CBTL02042ABQ_DHVQFN20_2P5X4P5 U_U2
16
4 Vcc
<11> DDIP2_AUXP 7 1A 2
<11> DDIP2_AUXN 9 2A 1B1 3 DOCK_DDIP2_AUXP <60>
12 3A 1B2 5 DP2VGA_DDIP2_AUXP <19>
<11> DDIP2_HPD 4A 2B1 DOCK_DDIP2_AUXN <60>
6
15 2B2 11 DP2VGA_DDIP2_AUXN <19>
-DOCK_ATTACHED_3B 1 OE 3B1 10
S 3B2 14
8 4B1 13 DOCK_DDIP2_HPD <60>
17 GND 4B2 DP2VGA_DDIP2_HPD <19>
T-PAD
CBT3257ABQ_DHVQFN16_2P5X3P5

2
U_R958
Vendor P/N 100K_0201_5%
Vendor P/N
A @ A

1
NXP CBT3257ABQ
Pericom PI3PCIE3212
On-semi74FST3257MNTWG
Security Classification LC Future Center Secret Data Title

NXP CBTL02042ABQ Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(1/16) : DDI/EDP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 3 of 100
5 4 3 2 1
5 4 3 2 1

D D

VCC1R05B_VCCST

2
R64
62_0201_5%
HASWELL_MCP_E
U58B

1
D61
K61 PROC_DETECT MISC
PECI N62 CATERR J62 0_0201_5%2 1 E_R1 -XDP_PRDY
<62> PECI PECI PRDY K62 -XDP_PRDY <21>
0_0201_5%2 1 E_R2 -XDP_PREQ
PREQ E60 -XDP_PREQ <21>
JTAG 0_0201_5%2 1 E_R3 XDP_TCK
PROC_TCK E61 XDP_TCK <21>
0_0201_5%2 1 E_R4 XDP_TMS
1 2 K63 PROC_TMS E59 XDP_TMS <21>
-PROCHOT R85 56_0201_5% 0_0201_5%2 1 E_R5 -XDP_TRST
<62,75,79> -PROCHOT PROCHOT PROC_TRST F63 -XDP_TRST <21>
THERMAL 0_0201_5%2 1 E_R6 XDP_TDI
PROC_TDI F62 XDP_TDI <21>
0_0201_5%2 1 E_R7 XDP_TDO
PROC_TDO XDP_TDO <21>
C CPUPWRGD C61 C
<21> CPUPWRGD PROCPWRGD PWR

2
J60
BPM#0 H60
BPM#1 H61 R2
BPM#2 H62 51_0201_5%
R7 1 2 200_0201_1% AU60 BPM#3 K59

1
R84 1 2 121_0201_1% AV60 SM_RCOMP0 DDR3 BPM#4 H63
R576 1 2 100_0201_1% AU61 SM_RCOMP1 BPM#5 K60
-DRAMRST AV15 SM_RCOMP2 BPM#6 J61
<24,26> -DRAMRST AV61 SM_DRAMRST BPM#7
SM_PG_CNTL1
2

2 OF 19 Rev0p7

R17 HASWELL-MCP-E-ULT_BGA1168
10K_0201_5%
1

VCC3M 2+3@

100K_0201_5%
R9223 1 2

VCC1R35A
B B

DDR_VTT_PG_CTRL
DDR_VTT_PG_CTRL <26,87>
1

2 Q162
DTC115TMT2L_VMT3
3
2

@ R9224
10K_0201_5%
1

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(2/16) : MISC/JTAG


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 4 of 100
5 4 3 2 1
5 4 3 2 1

HASWELL_MCP_E
U58C
D D
<24> M_A_DQ[63:0]
M_A_DQ0 AH63 AU37 -M_A_DDRCLK0_800M
AH62 SA_DQ0 SA_CLK#0 AV37 -M_A_DDRCLK0_800M <24,25>
M_A_DQ1 M_A_DDRCLK0_800M
M_A_DQ2 AK63 SA_DQ1 SA_CLK0 AW36 M_A_DDRCLK0_800M <24,25>
M_A_DQ3 AK62 SA_DQ2 SA_CLK#1 AY36
M_A_DQ4 AH61 SA_DQ3 SA_CLK1
M_A_DQ5 AH60 SA_DQ4 AU43 M_A_CKE0
M_A_DQ6 AK61 SA_DQ5 SA_CKE0 AW43 M_A_CKE1 M_A_CKE0 <24,25>
AK60 SA_DQ6 SA_CKE1 AY42 M_A_CKE1 <24,25>
M_A_DQ7
M_A_DQ8 AM63 SA_DQ7 SA_CKE2 AY43
M_A_DQ9 AM62 SA_DQ8 SA_CKE3
M_A_DQ10 AP63 SA_DQ9 AP33 -M_A_CS0
M_A_DQ11 AP62 SA_DQ10 SA_CS#0 AR32 -M_A_CS1 -M_A_CS0 <24,25>
M_A_DQ12 AM61 SA_DQ11 SA_CS#1 -M_A_CS1 <24,25>
M_A_DQ13 AM60 SA_DQ12 AP32
M_A_DQ14 AP61 SA_DQ13 SA_ODT0
M_A_DQ15 AP60 SA_DQ14 AY34 -M_A_RAS
AP58 SA_DQ15 SA_RAS AW34 -M_A_RAS <24,25>
M_A_DQ16 -M_A_WE
M_A_DQ17 AR58 SA_DQ16 SA_WE AU34 -M_A_CAS -M_A_WE <24,25>
M_A_DQ18 AM57 SA_DQ17 SA_CAS -M_A_CAS <24,25>
M_A_DQ19 AK57 SA_DQ18 AU35 M_A_BS0
M_A_DQ20 AL58 SA_DQ19 SA_BA0 AV35 M_A_BS1 M_A_BS0 <24,25>
M_A_DQ21 AK58 SA_DQ20 SA_BA1 AY41 M_A_BS2 M_A_BS1 <24,25>
M_A_DQ22 AR57 SA_DQ21 SA_BA2 M_A_BS2 <24,25> M_A_A[15:0] <24,25>
M_A_DQ23 AN57 SA_DQ22 AU36 M_A_A0
M_A_DQ24 AP55 SA_DQ23 SA_MA0 AY37 M_A_A1
M_A_DQ25 AR55 SA_DQ24 SA_MA1 AR38 M_A_A2
M_A_DQ26 AM54 SA_DQ25 SA_MA2 AP36 M_A_A3
M_A_DQ27 AK54 SA_DQ26 SA_MA3 AU39 M_A_A4
M_A_DQ28 AL55 SA_DQ27 SA_MA4 AR36 M_A_A5
M_A_DQ29 AK55 SA_DQ28 SA_MA5 AV40 M_A_A6
C M_A_DQ30 AR54 SA_DQ29 SA_MA6 AW39 M_A_A7 C
M_A_DQ31 AN54 SA_DQ30 SA_MA7 AY39 M_A_A8
M_A_DQ32 AY58 SA_DQ31 SA_MA8 AU40 M_A_A9
M_A_DQ33 AW58 SA_DQ32 SA_MA9 AP35 M_A_A10
M_A_DQ34 AY56 SA_DQ33 SA_MA10 AW41 M_A_A11
M_A_DQ35 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 M_A_A12
M_A_DQ36 AV58 SA_DQ35 SA_MA12 AR35 M_A_A13
M_A_DQ37 AU58 SA_DQ36 SA_MA13 AV42 M_A_A14
M_A_DQ38 AV56 SA_DQ37 SA_MA14 AU42 M_A_A15
M_A_DQ39 AU56 SA_DQ38 SA_MA15 -M_A_DQS[7:0] <24>
M_A_DQ40 AY54 SA_DQ39 AJ61 -M_A_DQS0
M_A_DQ41 AW54 SA_DQ40 SA_DQSN0 AN62 -M_A_DQS1
M_A_DQ42 AY52 SA_DQ41 SA_DQSN1 AM58 -M_A_DQS2
M_A_DQ43 AW52 SA_DQ42 SA_DQSN2 AM55 -M_A_DQS3
M_A_DQ44 AV54 SA_DQ43 SA_DQSN3 AV57 -M_A_DQS4
M_A_DQ45 AU54 SA_DQ44 SA_DQSN4 AV53 -M_A_DQS5
M_A_DQ46 AV52 SA_DQ45 SA_DQSN5 AL43 -M_A_DQS6
M_A_DQ47 AU52 SA_DQ46 SA_DQSN6 AL48 -M_A_DQS7
AK40 SA_DQ47 SA_DQSN7 M_A_DQS[7:0] <24>
M_A_DQ48
M_A_DQ49 AK42 SA_DQ48 AJ62 M_A_DQS0
M_A_DQ50 AM43 SA_DQ49 SA_DQSP0 AN61 M_A_DQS1
M_A_DQ51 AM45 SA_DQ50 SA_DQSP1 AN58 M_A_DQS2
M_A_DQ52 AK45 SA_DQ51 SA_DQSP2 AN55 M_A_DQS3
M_A_DQ53 AK43 SA_DQ52 SA_DQSP3 AW57 M_A_DQS4
M_A_DQ54 AM40 SA_DQ53 SA_DQSP4 AW53 M_A_DQS5
M_A_DQ55 AM42 SA_DQ54 SA_DQSP5 AL42 M_A_DQS6
M_A_DQ56 AM46 SA_DQ55 SA_DQSP6 AL49 M_A_DQS7
M_A_DQ57 AK46 SA_DQ56 SA_DQSP7
M_A_DQ58 AM49 SA_DQ57 AP49
M_A_DQ59 AK49 SA_DQ58 SM_VREF_CA AR51 DDR3_VREF_CA_M3 <25>
M_A_DQ60 AM48 SA_DQ59 SM_VREF_DQ0 AP51 DDR3_VREF_DQ_SA_M3 <25>
AK48 SA_DQ60 SM_VREF_DQ1 DDR3_VREF_DQ_SB_M3 <26>
M_A_DQ61
B M_A_DQ62 AM51 SA_DQ61 B
M_A_DQ63 AK51 SA_DQ62
SA_DQ63

3 OF 19 Rev0p7

HASWELL-MCP-E-ULT_BGA1168

2+3@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(3/16) : DDR3L CHANNEL-A


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 5 of 100
5 4 3 2 1
5 4 3 2 1

D D
HASWELL_MCP_E
U58D

<26> M_B_DQ[63:0]
M_B_DQ0 AY31 AM38 -M_B_DDRCLK0_800M
M_B_DQ1 AW31 SB_DQ0 SB_CK#0 AN38 M_B_DDRCLK0_800M -M_B_DDRCLK0_800M <26>
M_B_DQ2 AY29 SB_DQ1 SB_CK0 AK38 -M_B_DDRCLK1_800M M_B_DDRCLK0_800M <26>
M_B_DQ3 AW29 SB_DQ2 SB_CK#1 AL38 M_B_DDRCLK1_800M -M_B_DDRCLK1_800M <26>
AV31 SB_DQ3 SB_CK1 M_B_DDRCLK1_800M <26>
M_B_DQ4
M_B_DQ5 AU31 SB_DQ4 AY49 M_B_CKE0
M_B_DQ6 AV29 SB_DQ5 SB_CKE0 AU50 M_B_CKE1 M_B_CKE0 <26>
M_B_DQ7 AU29 SB_DQ6 SB_CKE1 AW49 M_B_CKE1 <26>
M_B_DQ8 AY27 SB_DQ7 SB_CKE2 AV50
M_B_DQ9 AW27 SB_DQ8 SB_CKE3
M_B_DQ10 AY25 SB_DQ9 AM32 -M_B_CS0
M_B_DQ11 AW25 SB_DQ10 SB_CS#0 AK32 -M_B_CS1 -M_B_CS0 <26>
M_B_DQ12 AV27 SB_DQ11 SB_CS#1 -M_B_CS1 <26>
M_B_DQ13 AU27 SB_DQ12 AL32
SB_DQ13 SB_ODT0 TP937 TESTPAD
M_B_DQ14 AV25
M_B_DQ15 AU25 SB_DQ14 AM35 -M_B_RAS
M_B_DQ16 AM29 SB_DQ15 SB_RAS AK35 -M_B_WE -M_B_RAS <26>
M_B_DQ17 AK29 SB_DQ16 SB_WE AM33 -M_B_CAS -M_B_WE <26>
M_B_DQ18 AL28 SB_DQ17 SB_CAS -M_B_CAS <26>
M_B_DQ19 AK28 SB_DQ18 AL35 M_B_BS0
AR29 SB_DQ19 SB_BA0 AM36 M_B_BS0 <26>
M_B_DQ20 M_B_BS1
M_B_DQ21 AN29 SB_DQ20 SB_BA1 AU49 M_B_BS2 M_B_BS1 <26>
M_B_DQ22 AR28 SB_DQ21 SB_BA2 M_B_BS2 <26> M_B_A[15:0] <26>
M_B_DQ23 AP28 SB_DQ22 AP40 M_B_A0
M_B_DQ24 AN26 SB_DQ23 SB_MA0 AR40 M_B_A1
M_B_DQ25 AR26 SB_DQ24 SB_MA1 AP42 M_B_A2
M_B_DQ26 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
C M_B_DQ27 AP25 SB_DQ26 SB_MA3 AR45 M_B_A4 C
M_B_DQ28 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
M_B_DQ29 AM26 SB_DQ28 SB_MA5 AW46 M_B_A6
M_B_DQ30 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
M_B_DQ31 AL25 SB_DQ30 SB_MA7 AY47 M_B_A8
M_B_DQ32 AY23 SB_DQ31 SB_MA8 AU46 M_B_A9
M_B_DQ33 AW23 SB_DQ32 SB_MA9 AK36 M_B_A10
M_B_DQ34 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 M_B_A11
M_B_DQ35 AW21 SB_DQ34 SB_MA11 AU47 M_B_A12
M_B_DQ36 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
M_B_DQ37 AU23 SB_DQ36 SB_MA13 AR46 M_B_A14
M_B_DQ38 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
AU21 SB_DQ38 SB_MA15 -M_B_DQS[7:0] <26>
M_B_DQ39
M_B_DQ40 AY19 SB_DQ39 AW30 -M_B_DQS0
M_B_DQ41 AW19 SB_DQ40 SB_DQSN0 AV26 -M_B_DQS1
M_B_DQ42 AY17 SB_DQ41 SB_DQSN1 AN28 -M_B_DQS2
M_B_DQ43 AW17 SB_DQ42 SB_DQSN2 AN25 -M_B_DQS3
M_B_DQ44 AV19 SB_DQ43 SB_DQSN3 AW22 -M_B_DQS4
M_B_DQ45 AU19 SB_DQ44 SB_DQSN4 AV18 -M_B_DQS5
M_B_DQ46 AV17 SB_DQ45 SB_DQSN5 AN21 -M_B_DQS6
M_B_DQ47 AU17 SB_DQ46 SB_DQSN6 AN18 -M_B_DQS7
AR21 SB_DQ47 SB_DQSN7 M_B_DQS[7:0] <26>
M_B_DQ48
M_B_DQ49 AR22 SB_DQ48 AV30 M_B_DQS0
M_B_DQ50 AL21 SB_DQ49 SB_DQSP0 AW26 M_B_DQS1
M_B_DQ51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQS2
M_B_DQ52 AN22 SB_DQ51 SB_DQSP2 AM25 M_B_DQS3
M_B_DQ53 AP21 SB_DQ52 SB_DQSP3 AV22 M_B_DQS4
M_B_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18 M_B_DQS5
M_B_DQ55 AK22 SB_DQ54 SB_DQSP5 AM21 M_B_DQS6
M_B_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQS7
M_B_DQ57 AR20 SB_DQ56 SB_DQSP7
M_B_DQ58 AK18 SB_DQ57
B M_B_DQ59 AL18 SB_DQ58 B
M_B_DQ60 AK20 SB_DQ59
M_B_DQ61 AM20 SB_DQ60
M_B_DQ62 AR18 SB_DQ61
M_B_DQ63 AP18 SB_DQ62
SB_DQ63

4 OF 19 Rev0p7

HASWELL-MCP-E-ULT_BGA1168

2+3@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(4/16) : DDR3L CHANNEL-B


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 6 of 100
5 4 3 2 1
5 4 3 2 1

D D

SATA Port Assignment

0 HDD Connector
TXC 9H03200033
VCC3_SUS RTCVCC RTCVCC VCC1R05B 1 NGFF WWAN Slot
KDS 1TJF090DP1A0004
EPSON Q13FC1350000300
2 NGFF Slot at Palmrest
C348 1 2 10P_0201_25V8D

2
@
R408 R646 R1011
R1009 330K_5% 1M_0201_5% 1K_0201_5%
2

2
1K_0201_5%
Y6 R351

1
32.768KHZ_9PF_1TJF090DP1A0004 10M_0201_5% R1010
HASWELL_MCP_E
1K_0201_5% U58E
1

RTCX1 AW5
C326 1 2 8P_0201_25V8D RTCX2 AY5 RTCX1
E_R20 1 2 0_0201_5% -INTRUDER AU6 RTCX2 J5
AV7 INTRUDER RTC SATA_RN0/PERN6_L3 H5 SATA0_RXN <43>
AV6 INTVRMEN SATA_RP0/PERP6_L3 B15 SATA0_RXP <43>
3 2
S3 <22> -SRTCRST AU7 SRTCRST SATA_TN0/PETN6_L3 A15 SATA0_TXN <43>
<16,22> -RTCRST RTCRST SATA_TP0/PETP6_L3 SATA0_TXP <43>
1
D54 J8
2 1 C23 SATA_RN1/PERN6_L2 H8 SATA1_RXN <50>
C <63> -INTRUDER_EC SATA_RP1/PERP6_L2 A17 SATA1_RXP <50> C
4 1 RB521CS-30GT2RA_VMN2-2 1000P_0201_25V7K
2 SATA_TN1/PETN6_L2 B17 SATA1_TXN <50>
SPVR310100_4P SATA_TP1/PETP6_L2 SATA1_TXP <50>
R60 1 2 33_0201_5% AW8 J6
<54> HDA_BCLK HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 SATA2_RXN <53>
R423 1 2 33_0201_5% AV11 H6
<54> HDA_SYNC HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 SATA2_RXP <53>
R425 1 2 33_0201_5% AU8 B14
<54> -HDA_RST AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15 SATA2_TXN <53>
<54> HDA_SDIN0 AU12 HDA_SDI0/I2S0_RXD AUDIO SATA SATA_TP2/PETP6_L1 SATA2_TXP <53>
VCC3_SUS AU11 HDA_SDI1/I2S1_RXD F5
AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5 PCIE5_RXN <51>
@ HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 PCIE5_RXP <51>
R846 1 2 1K_0201_5% R566 1 2 0_0603_5% AV10 C17 PCIE5_TXN_C C8337 1 2 0.1U_0201_6.3V6K
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17 PCIE5_TXN <51>
PCIE5_TXP_C C8336 1 2 0.1U_0201_6.3V6K
I2S1_SCLK SATA_TP3/PETP6_L0 PCIE5_TXP <51>
PLACE ON TOP SIDE
R74 1 2 33_0201_5%
<54> HDA_SDO V1 -TOUCH_PANEL_DTCT VCC1R05B_SATA3PLL VCC3B
VCC3_SUS SATA0GP/GPIO34 U1 -TOUCH_PANEL_INTR
SATA1GP/GPIO35 V6 GPIO36_SATA2GP
SATA2GP/GPIO36

2
AC1
TP901 TESTPAD TESTPAD TP900 SATA3GP/GPIO37 -EC_SCI <61>
TEST PAD AU62
E_R8 1 20_0201_5% AE62 PCH_TRST A12 R99
BOTTOM SIDE <21> PCH_TCK 1 20_0201_5% AD61 PCH_TCK SATA_IREF L11
E_R9 100K_0201_5%
<21> PCH_TDI 1 20_0201_5% AE61 PCH_TDI RSVD K10
DO NOT MOVE AFTER FIX E_R10 3.01K_0210_1%
<21> PCH_TDO

1
E_R11 1 20_0201_5% AD62 PCH_TDO JTAG RSVD C12 SATA_RCOMP 1 2
<21> PCH_TMS AL11 PCH_TMS SATA_RCOMP U3 R604
AC4 RSVD SATALED -DASPHDD <71>
AE63 RSVD
AV2 JTAGX
RSVD

5 OF 19 Rev0p7
B B

HASWELL-MCP-E-ULT_BGA1168

2+3@

VCC3B

2
10K_0201_5%

10K_0201_5%

10K_0201_5%
R9277

R9278

R9279
1

1
-TOUCH_PANEL_DTCT
<38> -TOUCH_PANEL_DTCT
-TOUCH_PANEL_INTR
<38> -TOUCH_PANEL_INTR GPIO36_SATA2GP

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(5/16) : RTC/HDA/SATA/JTAG


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 7 of 100
5 4 3 2 1
5 4 3 2 1

VCC1R05B_ACLKPLL

2
D D
R9127
3.01K_0201_1%
TXC 8Y24000011
KDS 1ZZCAA24000CC0C

2
R308
ESPON Q22FA1280021300
1M_0201_5%

1
Y5 24MHZ_10PF_8Y24000011

R133 1 2 0_0201_5% 1 3
VCC3B VCC3B 1 3
GND GND
2 2

2
2 4
2

HASWELL_MCP_E
U58F C205 C206
U_R956 12P_0201_25V8J 12P_0201_25V8J
R996 10K_0201_5% 1 1
10K_0201_5%

1
1

C43 A25
C42 CLKOUT_PCIE_N0 XTAL24_IN B25
-DISCRETE_PRESENCE U2 CLKOUT_PCIE_P0 XTAL24_OUT
PCIECLKRQ0/GPIO18 K21
B41 RSVD M21
<50> -PCIE1_CLK_100M CLKOUT_PCIE_N1 RSVD
A41 C26
<50> PCIE1_CLK_100M CLKOUT_PCIE_P1 DIFFCLK_BIASREF
2

@ <50> -CLKREQ_PCIE1 Y5
PCIECLKRQ1/GPIO19 C35
R2000 C41 CLOCK TESTLOW_C35 C34
C 10K_0201_5% <50> -PCIE2_CLK_100M B42 CLKOUT_PCIE_N2 TESTLOW_C34 AK8 C
<50> PCIE2_CLK_100M CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8
<50> -CLKREQ_PCIE2 AD1 AL8
1

PCIECLKRQ2/GPIO20 TESTLOW_AL8
B38 AN15 R9142 1 2 22_0201_5%
<46> -PCIE3_CLK_100M CLKOUT_PCIE_N3 CLKOUT_LPC_0 LPCCLK_EC_24M <37,61>
C37 AP15 R9143 1 2 22_0201_5%
<46> PCIE3_CLK_100M CLKOUT_PCIE_P3 CLKOUT_LPC_1 LPCCLK_CRYPT_24M <37,69>
<46> -CLKREQ_PCIE3 N1
PCIECLKRQ3/GPIO21 B35 R9062 1 2 0_0201_5% LPCCLK_DEBUG_24M
CLKOUT_ITPXDP LPCCLK_DEBUG_24M <70>
A39 A35
B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P @
-CLKREQ_PCIE4_PCH U5 CLKOUT_PCIE_P4
PCIECLKRQ4/GPIO22
B37
<51> -PCIE5_CLK_100M CLKOUT_PCIE_N5
A37

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
<51> PCIE5_CLK_100M CLKOUT_PCIE_P5
<51> -CLKREQ_PCIE5 T2
PCIECLKRQ5/GPIO23

6 OF 19 Rev0p7

HASWELL-MCP-E-ULT_BGA1168

2
2+3@

1
R9066

R9065

R9064

R9063
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(6/16) : CLOCK SIGNALS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
STING UMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 8 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

D D

VCC3_SUS

2
@
R359 R106 R107 R389 R394 R397 R272
10K_0201_5% 499_0201_1% 499_0201_1% 10K_0201_5% 4.7K_0201_5% 4.7K_0201_5% 10K_0201_5%

1
<61,69,70> LPC_AD[3:0] HASWELL_MCP_E
U58G

LPC_AD0 AU14 AN2


LPC_AD1 AW12 LAD0 SMBALERT/GPIO11 AP2 SMB_CLK NFC_INT <65>
LPC_AD2 AY12 LAD1 LPC SMBCLK AH1 SMB_DATA SMB_CLK <70>
LPC_AD3 AW11 LAD2 SMBDATA AL2 SMB_DATA <70>
AV12 LAD3 SMBUS SML0ALERT/GPIO60 AN1 SML0_CLK
<61,69,70> -LPC_FRAME LFRAME SML0CLK AK1 SML0_DATA SML0_CLK <46>
SML0DATA AU4 SML0_DATA <46>
SML1ALERT/PCHHOT/GPIO73 AU3 EC_SCL2
SML1CLK/GPIO75 AH3 EC_SDA2 EC_SCL2 <62>
SML1DATA/GPIO74 EC_SDA2 <62>
R_R221 2 0_0201_5% AA3
<23,37> SPI_CLK Y7 SPI_CLK AF2 CL_CLK_WLAN
<23> -SPI_CS0 Y4 SPI_CS0 CL_CLK AD2 CL_CLK_WLAN <50>
CL_DATA_WLAN
AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 -CL_RST_WLAN CL_DATA_WLAN <50>
C SPI_CS2 CL_RST -CL_RST_WLAN <50> C
AA2
<23> SPI_MOSI_IO0 AA4 SPI_MOSI
<23> SPI_MISO_IO1 Y6 SPI_MISO
<23> SPI_IO2

1
SPI_IO2

100K_0201_5%
AF1
<23> SPI_IO3 SPI_IO3 R233

2
7 OF 19 Rev0p7

HASWELL-MCP-E-ULT_BGA1168

2+3@

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(7/16) : LPC/SPI/SMBUS/C-LINK


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev

sualaptop365.edu.vn STING UMA


AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 9 of 100
5 4 3 2 1
5 4 3 2 1

RTCVCC VCC3B VCC3M VCC3M

10K_0201_5%
8.2K_0201_5%

1K_0201_5%
D D

2
330K_5%
@

1
R164
HASWELL_MCP_E
U58H

R28

R612

R614
SYSTEM POWER MANAGEMENT
-SUSWARN R9260 1 2 0_0201_5% AK2 AW7
AC3 SUSACK DSWVRMEN AV5 R203 1 2 0_0201_5% MPWRG
<16,21> -XDP_DBR SYS_RESET DPWROK MPWRG <72>
<14,19,21,62,70,72> BPWRG R21 1 2 0_0201_5% AG2 AJ5
SYS_PWROK WAKE -PCIE_WAKE <50,61,71>
<14,21,79> CPUCORE_PWRGD R617 1 2 0_0201_5% AY7
AB5 PCH_PWROK
<85> MEPWRG APWROK
AG7 V5
PLTRST CLKRUN/GPIO32 -CLKRUN <61,69,70>
AG4 -SUS_STAT <61,70>
SUS_STAT/GPIO61 AE6
SUSCLK/GPIO62 SUSCLK_32K <50,61,71>
AP5 -PCH_SLP_S5 <16,71>
AW6 SLP_S5/GPIO63
<21,71> -RSMRST RSMRST
-SUSWARN AV4
AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6
<62> -PWRSW_EC PWRBTN SLP_S4 -PCH_SLP_S4 <16,62,71>
AJ8 AT4
<71> AC_PRESENT ACPRESENT/GPIO31 SLP_S3 -PCH_SLP_S3 <16,62,65,71,78>
<71> -BATLOW AN4 AL5 -PCH_SLP_M <16,71>
AF3 BATLOW/GPIO72 SLP_A AP4
<16> -PCH_SLP_S0 SLP_S0 SLP_SUS -PCH_SLP_SUS <62>
AM5 AJ7 -PCH_SLP_LAN <71>
<62> -PCH_SLP_WLAN SLP_WLAN/GPIO29 SLP_LAN

C VCC3M C

8 OF 19 Rev0p7

R9068 1 2 33_0201_5% U73


<21,70> -PLTRST_NEAR HASWELL-MCP-E-ULT_BGA1168
5 1
VCC NC
2 2+3@
IN_A
R9067 1 2 33_0201_5% 4 3
<46,50,51,61,69,70,71> -PLTRST_FAR OUT_Y GND

TC7SG17FE_SON5

2 2
C8338 C8339
100P_0201_25V8J 100P_0201_25V8J
1 1

B B

TABLE

CFG2 : PEG Static Lane Reversal


1 : Normal Operation
0 : Lane Reversal
CFG4 : Display Port Presence
1 : Disabled
0 : Enabled
CFG[6:5] : PEG Bifurcation
11 : Func 1 Disabled, Func 2 Disabled (x16,---,---)
10 : Func 1 Enabled, Func 2 Disabled (x8,x8,---)
01 : Func 1 Disabled, Func 2 Enabled
00 : Func 1 Enabled, Func 2 Enabled (x8,x4,x4)
CFG7 : PEG Defer Training
A A
1 : PEG Train Immediately Following XXRESETB Deassertion
0 : PEG Wait for BIOS for Training

Security Classification LC Future Center Secret Data Title


Issued Date 2012/05/01 Deciphered Date 2012/12/01 CPU(8/16) : SYSTEM PM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
STING UMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 10 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

D D

VCC3B

R9072

R9073

R9074

R9069

R9070

R9071
1

1
10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
2

2
EDP_HPD <38>

1
100K_0201_5%
R8
C HASWELL_MCP_E C
U58I

2
B8 B9
<38> PANEL_BKLT_CTRL A9 EDP_BKLCTL DDPB_CTRLCLK C9 DDIP1_CTRLCLK <41>
<71> VGA_BLON EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA DDIP1_CTRLDATA <41>
C6 D9
<72> PANEL_POWER_ON EDP_VDDEN DDPC_CTRLCLK D11 DDIP2_CTRLCLK <60>
DDPC_CTRLDATA DDIP2_CTRLDATA <60>

U6
PIRQA/GPIO77
1

P4 C5
N4 PIRQB/GPIO78 DISPLAY DDPB_AUXN B6 DDIP1_AUXN <41>
R138 R433
PIRQC/GPIO79 DDPC_AUXN DDIP2_AUXN <3>
100K_0201_5% 100K_0201_5% N2 B5
PIRQD/GPIO80 DDPB_AUXP DDIP1_AUXP <41>
AD4 A6
PME GPIO DDPC_AUXP DDIP2_AUXP <3>
2

U7
L1 GPIO55
L3 GPIO52 C8
GPIO54 DDPB_HPD DDIP1_HPD <41>
R5 A8
<12> PLANARID3 L4 GPIO51 DDPC_HPD D6 DDIP2_HPD <3>
<13,53> -SC_DTCT GPIO53 EDP_HPD
10K_0201_5%

10K_0201_5%

1
100K_0201_5%
9 OF 19 Rev0p7
2

R2002

2+3@

2
1

1
R9076

R9075

B B

A A

Security Classification LC Future Center Secret Data Title


CPU(9/16) : LCD/PCI/DDI CONTROL
Issued Date 2012/05/02 Deciphered Date 2012/5/02

sualaptop365.edu.vn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 11 of 100
5 4 3 2 1
5 4 3 2 1

VCC3_SUS

VCC3M VCC3B

TABLE

4.7K_0201_5%
10K_0201_5%

2 10K_0201_5%
10K_0201_5%

2 10K_0201_5%
2 10K_0201_5%
2 10K_0201_5%
10K_0201_5%
D SPKR TCO TIMER SYSTEM REBOOT D

HIGH DISABLED (NO REBOOT) VCC3B


VCC3B
LOW ENABLED
2

2
10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
VCC1R05B

1K_0201_5%

1K_0201_5%
@

R9084

R9083

R9086

R9156

R9077

R9078

R9080

R9081

R9107

R9246

R9247

R9261

4.7K_0201_5%
4.7K_0201_5%
4.7K_0201_5%
R65

2
10K_0201_5%
4.7K_0201_5%
1

1
R91501

1
R91531
R91541
R91551

1
R9082

1 R9095 2

2
10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
R101
R9149

R9151

R9108
HASWELL_MCP_E
U58J R9055 R860

R9099

R9100

R9101

R9097

R9098
10K_0201_5%
1K_0201_5% 8.2K_0201_5%
@

1
1

1
R9102

R9103

R9104

R9248
P1 D60
AU2 BMBUSY/GPIO76 THRMTRIP V4
AM7 GPIO8 RCIN/GPIO82 T4 -KBRC <61>
<46> LANPHYPC LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ IRQSER <61,69,70>
AD6 AW15
Y1 GPIO15 MISC PCH_OPI_COMP AF20
T3 GPIO16 RSVD AB21
AD5 GPIO17 RSVD
AN5 GPIO24
<46> -LANWAKE GPIO27
AD7
AN3 GPIO28
GPIO26 R6 GPIO83_GPI0_CS
AG6 GSPI0_CS/GPIO83 L6 GPIO84_GPI0_CLK
AP1 GPIO56 GSPI0_CLK/GPIO84 N6
<70> SMB_3B_EN GPIO57 GSPI0_MISO/GPIO85
AL4 L8 GPIO86_GPI0_MOSI
AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 GPIO87_GPI1_CS
MEMORYID1 AK4 GPIO59 GSPI1_CS/GPIO87 L5 GPIO88_GPI1_CLK
MEMORYID4 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7
PLANARID0 U4 GPIO47 GSPI1_MISO/GPIO89 K2 GPIO90_GPI1_MOSI
PLANARID1 Y3 GPIO48 GSPI_MOSI/GPIO90 J1 GPIO91_UART0_RXD
PLANARID2 P3 GPIO49 UART0_RXD/GPIO91 K3 GPIO92_UART0_TXD
Y2 GPIO50 UART0_TXD/GPIO92 J2 GPIO93_UART0_RTS
<15> HSIOPC HSIOPC/GPIO71 LPIO UART0_RTS/GPIO93
C AT3 10 OF 19 G1 GPIO93_UART0_CTS C
<61> -EC_WAKE AH4 GPIO13 UART0_CTS/GPIO94 K4
GPIO14 UART1_RXD/GPIO0 DOCKID0 <60>
AM4 G2
AG5 GPIO25 UART1_TXD/GPIO1 J3 DOCKID1 <60>
MEMORYID2
GPIO45 UART1_RST/GPIO2 DOCKID2 <60>
MEMORYID3 AG3 J4
GPIO46 UART1_CTS/GPIO3 DOCKID3 <60>
F2
AM3 I2C0_SDA/GPIO4 F3
AM2 GPIO9 I2C0_SCL/GPIO5 G4 I2C1_SDA
P2 GPIO10 I2C1_SDA/GPIO6 F1 I2C1_SDA <13>
I2C1_CLK
<43> SATA0_DEVSLP DEVSLP0/GPIO33 I2C1_SCL/GPIO7 I2C1_CLK <13>
C4 E3
<50> -WWAN_DTCT SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 -NFC_DTCT <65>
L2 F4
<50> SATA1_DEVSLP N5 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 D3 NFC_ON <65>
<53> SATA2_DEVSLP DEVSLP2/GPIO39 SDIO_D0/GPIO66
V2 E4
<59> PCH_SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3 -NGFF_DTCT <53>
SDIO_D2/GPIO68 -INT_MIC_DTCT <38>
PLANAR ID TABLE E2 -MIC_HW_EN
SDIO_D3/GPIO69
Rev0p7
EC176 0820
LEVEL PLANARID[3..0] 2

2
10K_0201_5%
2
1K_0201_5%
2+3@

49.9_0201_1%
R9079

R9105
SDV 0000B

R9165
SDV2 0001B
VCC3B VCC3B
1

1
1
VCC3B VCC3B FVT(vPro SDV) 0010B
VCC3B VCC3B

2
0011B

10K_0201_5%
SIT(vPro FVT)

10K_0201_5%
R9186 R9187
2

2
10K_0201_5%

@
2

VCC3B VCC3B VCC3B VCC3B


10K_0201_5%

10K_0201_5%

R9087 R9088 SIT-R2 0100B


10K_0201_5%

R9089 R9090

1
@
SVT(vPro SIT) 0101B

2
10K_0201_5%
10K_0201_5%

10K_0201_5%
1

VCC3_SUS VCC3_SUS VCC3_SUS

10K_0201_5%
1

VCC3_SUS VCC3_SUS GPIO87_GPI1_CS R9182 R9183 R9184 R9185


PLANARID0 GPIO88_GPI1_CLK
PLANARID1 GPIO90_GPI1_MOSI
2

2
2

10K_0201_5%

PLANARID2
10K_0201_5%

1
2

2
10K_0201_5%

VCC3B VCC3B
10K_0201_5%

B PLANARID3 R9199 R9200 R9201 B

2
10K_0201_5%
PLANARID3 <11> R9202 R9203

10K_0201_5%
R9189
2

2
10K_0201_5%

10K_0201_5%

10K_0201_5%

2
10K_0201_5%
R9091 R9092 NA@ NA@ NA@ NA@ NA@
1

1
10K_0201_5%

10K_0201_5%
R9093 R9094
1

1
R9180 R9181
MEMORYID0 <13>

1
@ @
MEMORYID1 GPIO91_UART0_RXD
1

MEMORYID2 GPIO92_UART0_TXD

1
MEMORYID3 GPIO93_UART0_RTS
MEMORYID4 GPIO93_UART0_CTS
GPIO83_GPI0_CS
GPIO84_GPI0_CLK
2
2

GPIO86_GPI0_MOSI
2

2
10K_0201_5%

10K_0201_5%
10K_0201_5%

R9204 R9208
10K_0201_5%

10K_0201_5%

R9205 R9206
R9207

2
10K_0201_5%
R9188
1
1

X76_S2G@
X76_S2G@ X76_S2G@ X76_S2G@ X76_S2G@

1
A A
MemoryID0 MemoryID1 MemoryID2 MemoryID3 MemoryID4
Supplier Density P/N BOM
GPIO43# GPIO44 GPIO45 GPIO46 GPIO47 Structure
0 0 0 0 0 Samsung 4Gb K4B4G1646B-HYK0 S2G@
0 0 1 0 0 Hynix 4Gb H5TC4G63AFR-PBA H2G@
0 1 0 0 0 Micron 4Gb MT41K256M16HA-125:E M2G@
Security Classification LC Future Center Secret Data Title
1 0 0 0 0 Samsung 8Gb K4B8G1646B-MYK0 S4G@
Issued Date 2012/05/02 Deciphered Date 2012/5/02 CPU(10/16) : GPIO/CPU/MISC/LPIO
1 1 0 0 0 Micron 8Gb MT41K512M16TNA-125:E M4G@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL

sualaptop365.edu.vn
1 1 1 0 0 Elpida 8Gb EDJ8416E6MB-GN-F E4G@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
1 1 1 1 1 no on-board memory model N/A NA@
N/A MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Thursday, May 02, 2013
Date: Sheet 12 of 100
5 4 3 2 1
5 4 3 2 1

Flexible I/O Configuration

I/O High Speed Signals Configuration Net Name

Port 1 USB3 1 USB3 1 USB3P0


Port 2 USB3 2 USB3 2 USB3P1
D
Port 3 PCIE 1/USB3 3 USB3 3 USB3P2 D

Port 4 PCIE 2/USB3 4 PCIE 2 PCIE1


Port 5 PCIE 3 PCIE 3 PCIE2
Port 6 PCIE 4 PCIE 4 PCIE3 VCC3_SUS
PCIe Port Assignment
Port 7 PCIE 5 L0 PCIE 5 L0 PCIE4_0
Port 8 PCIE 5 L1 PCIE 5 L1 PCIE4_1 1 NGFF WLAN Slot Port1
Port 9 PCIE 5 L2 PCIE 5 L2 PCIE4_2 2 NGFF WLAN Slot Port0
Port 10 PCIE 5 L3 PCIE 5 L3 PCIE4_3 3 GbE PHY

10K_0201_5%

10K_0201_5%

10K_0201_5%
Port 11 PCIE 6 L0 PCIE 6 L0 PCIE5 4 (x4) Reserve
Port 12 SATA 2/PCIE 6 L1 SATA 2 SATA2 5 (x1) Media Card Controller

2
Port 13 SATA 1/PCIE 6 L2 SATA 1 SATA1
Port 14 SATA 0/PCIE 6 L3 SATA 0 SATA0

1
R648

R248

R254
HASWELL_MCP_E
U58K

F10 AN8
E10 PERN5_L0 USB2N0 AM8 USBP0- <45>
PERP5_L0 USB2P0 USBP0+ <45>
C23 AR7
C22 PETN5_L0 USB2N1 AT7
USBP1- <45> USB Port Assignment
PETP5_L0 USB2P1 USBP1+ <45>
F8 AR8 USBP2- 0 USB 3.0 System Port (AOU)
E8 PERN5_L1 USB2N2 AP8 USBP2+
PERP5_L1 USB2P2
B23 AR10
1 USB 3.0 System Port (Debug)
A23 PETN5_L1 USB2N3 AT10 USBP3- <50>
PETP5_L1 USB2P3 USBP3+ <50> 2 USB 3.0 Docking/3rd USB3.0 System Port
H10 AM15 USBP4- 3 NGFF WWAN Slot
G10 PERN5_L2 USB2N4 AL15 USBP4+
PERP5_L2 USB2P4
B21 AM13
4 Smart Card Slot / Touch Panel
C21 PETN5_L2 USB2N5 AN13 USBP5- <65>
PETP5_L2 USB2P5 USBP5+ <65> 5 Fingerprint Reader
E6 AP11
F6 PERN5_L3 USB2N6 AN11
USBP6- <50> 6 NGFF WLAN Slot
PERP5_L3 USB2P6 USBP6+ <50>
B22 AR13
7 USB Camera
C PETN5_L3 USB2N7 USBP7- <38> C
A21 AP13
PETP5_L3 USB2P7 USBP7+ <38>
11 OF 19
G11
<50> PCIE2_RXN PERN3
F11 G20
<50> PCIE2_RXP PERP3 USB3RN0 USB3P0_RXN <45>
H20
USB3RP0 USB3P0_RXP <45>
C601 1 2 0.1U_0201_6.3V6K PCIE2_TXN_C C29 USB 3.0 Port Assignment
<50> PCIE2_TXN PETN3
C569 1 2 0.1U_0201_6.3V6K PCIE2_TXP_C B30 PCIe USB C33
<50> PCIE2_TXP PETP3 USB3TN0 USB3P0_TXN <45>
B34
F13 USB3TP0 USB3P0_TXP <45>
<46> PCIE3_RXN
G13 PERN4 E18
0 USB 3.0 System Port (AOU)
<46> PCIE3_RXP PERP4 USB3RN1 USB3P1_RXN <45>
F18 1 USB 3.0 System Port (Debug)
USB3RP1 USB3P1_RXP <45>
C799 1 2 0.1U_0201_6.3V6K PCIE3_TXN_C B29
<46> PCIE3_TXN PETN4
C720 1 2 0.1U_0201_6.3V6K PCIE3_TXP_C A29 B33 2 USB 3.0 Docking/3rd USB3.0 System Port
<46> PCIE3_TXP PETP4 USB3TN1 A33 USB3P1_TXN <45>
G17 USB3TP1 USB3P1_TXP <45>
USB3P2_RXN
USB3P2_RXP F17 PERN1/USB3RN2 @
PERP1/USB3RP2 USBP4_D- 0_0201_5% 2 1 R18 USBP4_D0-
USB3P2_TXN C30
USB3P2_TXP C31 PETN1/USB3TN2 AJ10 USBCOMP 1 2 USBP4_D+ 0_0201_5% 2 1 R19 USBP4_D0+
PETP1/USB3TP2 USBRBIAS AJ11 R564 22.6_0201_1%
F15 USBRBIAS AN10 @
<50> PCIE1_RXN PERN2/USB3RN3 RSVD
G15 AM10 VCC3B
<50> PCIE1_RXP PERP2/USB3RP3 RSVD
C118 1 2 0.1U_0201_6.3V6K PCIE1_TXN_C B31
<50> PCIE1_TXN PETN2/USB3TN3
C365 1 2 0.1U_0201_6.3V6K PCIE1_TXP_C A31
<50> PCIE1_TXP PETP2/USB3TP3 AL3
OC0/GPIO40 AT1 -USB_PORT0_OC0 <45>
OC1/GPIO41 -USB_PORT1_OC1 <45> 2
VCC1R05B_USB3PLL AH2
E15 OC2/GPIO42 AV3 -USB_PORT2_OC2 <100>
C1122
E13 RSVD OC3/GPIO43 MEMORYID0 <12>
3.01K_0210_1% 0.1U_0201_6.3V6K
1 2 A27 RSVD 1
R8964 B27 PCIE_RCOMP
PCIE_IREF U_U5

9
USBP4- RJ113 1 2 0_0402_5% USBP4_D- 2 4

VDD
Rev0p7 Y- M- USBP4_D0- <53>
Device Selection
USBP4+ RJ114 1 2 0_0402_5% USBP4_D+ 1 5
Y+ M+ USBP4_D0+ <53>
2+3@
10 6
<11,53> -SC_DTCT SEL D- USBP4_D1- <38> 0 Smart Card Slot
8 7 1 Touch Panel

GND
OE D+ USBP4_D1+ <38>

PN Apply

3
VCC3M
CIS SYMBOL ONLY
@ @ @ @
PI3USB102ZMEX_UQFN10_1P4X1P8
0.1U_0603_6.3V7K

0.1U_0603_6.3V7K

0.22U_0603_6.3V6M
0.1U_0402_25

0.1U_0402_25
2

B B
C854

C215

C853

C852

C211
1

VCC3M @
I2C1_CLK 0_0201_5% 2 1 R14 USBP4_D1-
<12> I2C1_CLK
I2C1_SDA 0_0201_5% 2 1 R15 USBP4_D1+
<12> I2C1_SDA
@
2
U_U3
C1123
2 19 0.1U_0201_6.3V6K
9 XSD B0_P 18 USB3P2_TXP_DOCK <60> 1
<60,62> -DOCK_ATTACHED_3M SEL B0_N 17 USB3P2_TXN_DOCK <60>
B1_P USB3P2_RXP_DOCK <60>
16
B1_N USB3P2_RXN_DOCK <60>
USB3P2_TXP 3 15 C721 1 2 0.1U_0201_6.3V6K U_U4
A0_P C0_P USB3P2_TXP_SYS <100>

9
USB3P2_TXN 4 14 C723 1 2 0.1U_0201_6.3V6K
7 A0_N C0_N 13 USB3P2_TXN_SYS <100> 2 4
USB3P2_RXP USBP2- USBP2-_DOCK <60>

VDD
A1_P C1_P USB3P2_RXP_SYS <100> Y- M-
USB3P2_RXN 8 12
A1_N C1_N USB3P2_RXN_SYS <100>
5 USBP2+ 1 5 USBP2+_DOCK <60>
1 GND 11 Y+ M+
6 VDD
VDD
GND
GND
20 -DOCK_ATTACHED_3M 10
SEL D-
6 USBP2-_SYS <100>
Vendor P/N
10 21
VDD THERMAL PAD 8 7

GND
OE D+ USBP2+_SYS <100>
CBTL02042ABQ_DHVQFN20_2P5X4P5 Pericom PI3USB102ZME

3
CIS SYMBOL ONLY
NXP NX3DV42GU
PI3USB102ZMEX_UQFN10_1P4X1P8

Vendor P/N

Pericom PI3PCIE3212
NXP CBTL02043ABQ
A A

Security Classification LC Future Center Secret Data Title


CPU(11/16) : PCIE/USB
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 13 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

VCC1R35A

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
2 2 2 2

2
C8446

C8447

C8448

C8449

C838

C840

C430

C844

C846

C851
1

1
1 1 1 1

D D

VCC1R35A
VCCCPUCORE

HASWELL_MCP_E
U58L

L59 C36
J58 RSVD VCC C40
RSVD VCC C44
AH26 VCC C48
AJ31 VDDQ VCC C52
VCC1R05B_VCCST AJ33 VDDQ VCC C56
VCC1R05B_VCCST VCCCPUIO_A VCCCPUCORE VCCCPUCORE AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29
AY35 VDDQ VCC E31
AY40 VDDQ VCC E33
VDDQ VCC

2
AY44 E35

150_0201_5%
R374 R782 R9 AY50 VDDQ VCC E37

R9249
75_0201_1% 130_0201_5% VDDQ VCC E39
100_0201_1% VCC
F59 E41
N58 VCC VCC E43

1
AC58 RSVD VCC E45
RSVD VCC E47
VCCSENSE E63 VCC E49
<79> VCCSENSE VCC_SENSE VCC
AB23 E51
VCCIO_OUT A59 RSVD VCC E53
E20 VCCIO_OUT VCC E55
AD23 VCCIOA_OUT VCC E57
AA23 RSVD 12 OF 19 VCC F24
AE59 RSVD VCC F28
RSVD VCC F32
-SVID_ALERT 1 2 L62 VCC F36
<79> -SVID_ALERT N63 VIDALERT VCC F40
SVID_CLK R781 43_0201_5%
<79> SVID_CLK L63 VIDSCLK VCC F44
SVID_DATA
C <79> SVID_DATA VIDSOUT HSW ULT POWER VCC C
VCCST_PWRGD B59 F48
F60 VCCST_PWRGD VCC F52
VR_READY C59 VR_EN VCC F56
VR_READY VCC G23
D63 VCC G25
PW R_DEBUG H59 VSS VCC G27
<21> PW R_DEBUG P62 PWR_DEBUG VCC G29
P60 VSS VCC G31
P61 RSVD_TP VCC G33
N59 RSVD_TP VCC G35
N61 RSVD_TP VCC G37
TESTPAD TP1 RSVD_TP VCC
2@ T59 G39
VCC3B VCC1R05B_VCCST C8297 AD60 RSVD VCC G41
4.7U_0402_6.3V6M AD59 RSVD VCC G43
AA59 RSVD VCC G45
1 AE60 RSVD VCC G47
2

VCC1R05B_VCCST AC59 RSVD VCC G49


10K_0201_5%

10K_0201_5%

AG58 RSVD VCC G51


R9274

R9267

VCC3B VCC1R05B_VCCST U59 RSVD VCC G53


V59 RSVD VCC G55
RSVD VCC G57
1

VCCCPUCORE AC22 VCC H23


VCCST VCC
2

2
VCCST_PW RGD AE22 J23
10K_0201_5%

10K_0201_5%
AE23 VCCST VCC K23
R9276

R9266
VCCST VCC K57
AB57 VCC L22
AD57 VCC VCC M23
1

AG57 VCC VCC M57


1

D D VR_READY C24 VCC VCC P57


2 Q167 2 Q168 C28 VCC VCC U57
<10,19,21,62,70,72> BPW RG VCC VCC
G 2SK3541_VMT3 G 2SK3541_VMT3 C32 W57
VCC VCC
S S Rev0p7
3

D D 2+3@
2 Q169 2 Q170
<10,21,79> CPUCORE_PW RGD G G
2SK3541_VMT3 2SK3541_VMT3
VCC1R05B VCC1R05B_VCCST
S S
3

RJ107
SHORT10_20MIL

1 2

@ @

22U_0603_6.3V6M

1UF_0402_6.3V
2 2

C8469

C8468
B 1 1 B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/02 Deciphered Date 2012/5/02 CPU(12/16) : POWER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 14 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

VCC3B

VCC3B VCC3B_PCH

2
10K_0201_5%
RJ101
1 2
R9213 VCC1R05B_HSIO
SHORT10_30MIL VCC1R05B_PCHIO VCC3B

1
VCC1R05B VCC1R05B_PCHCORE
U104

RJ102 1 4
1 2 7 VDD S1 5
<12> HSIOPC ON S2
VCC1R05B SHORT10_30MIL VCC1R05B_PCHIO
D 2 D
3 D1 6
D2 GND

2
10K_0201_5%
RJ103
1 2
R9214
SHORT10_30MIL SLG59M1470VTR_FC-TDFN9_1P5X2
VCC1R05B VCC1R05B_CLKGEN

1
@

RJ104
1 2

SHORT10_30MIL

VCC1R05B_HSIO

VCC1R05B_USB3PLL
VCC1R05B_PCHIO

2.2uH LQM21PN2R2MC0D
1 2 VCC1R05B_HSIO
RTCVCC
FL59 VCC3_SUS

22U_0603_6.3V6M

22U_0603_6.3V6M
2 2 HASWELL_MCP_E
U58M VCC3LAN

0.1U_0201_6.3V6K

1UF_0402_6.3V
0.1U_0201_6.3V6K
C8403

C8404
VCC1R05B_HSIO K9 2 2
1 1 VCCHSIO 2
L10
VCCHSIO

C8408
VCC1R05B_SATA3PLL M9 C8407 C8409
N8 VCCHSIO mPHY AH11
VCCIO VCCSUS3_3 1 1
P9 RTC AG10 1
2.2uH LQM21PN2R2MC0D B18 VCCIO VCCRTC AE7 C8410
1 2 B11 VCCUSB3PLL DCPRTC
VCCSATA3PLL 1 2
FL60 VCC1R05B 0.1U_0201_6.3V6K
Y20 SPI Y8
22U_0603_6.3V6M

22U_0603_6.3V6M
AA21 VCCAPLL OPI VCCSPI
2 2 VCCAPLL
W21

0.1U_0201_6.3V6K
VCC1R05AMT

1UF_0402_6.3V
VCCAPLL
C8411

C8412
C
2 AG14 2 C
VCCASW AG13
1 1 VCCASW

C8413
VCC1R05B_PCHCORE C8414
VCC3_SUS J13 USB3 @
1 DCPSUS3 J11 1
VCC3M VCC1P05 H11
AH14 AXALIA/HDA VCC1P05 H15
VCCHDA VCC1P05 AE8
VCC1P05 AF22 C8415
VCC1P05

C8416
AH13 VRM/USB2/AZALIA AG19 2 1

1UF_0402_6.3V
DCPSUS2 CORE DCPSUSBYP AG20
2 DCPSUSBYP AE9
13 OF 19 VCCASW AF9 1UF_0402_6.3V
VCC1R05B_CLKGEN VCC3B_PCH AC9 VCCASW AG8
@ 1 AA9 VCCSUS3_3 VCCASW AD10
AH10 VCCSUS3_3 DCPSUS1 AD8 VCC1R5B
V8 VCCDSW3_3 GPIO/LCC DCPSUS1
W9 VCC3_3 VCC3B_PCH
2.2uH GLFR1608T2R2M-LR VCC3_3 J15
1 2 THERMAL SENSOR VCCTS1_5 K14
VCC3_3 K16
47UF_0805_6.3V

47UF_0805_6.3V

1UF_0402_6.3V
FL61 VCC1R05B_CLKGEN VCC3_3
2 2 2
C8417

C8418

C8419
J18
VCC1R05B_CLKGEN K19 VCC1P05 SDIO/PLSS U8
1 1 1 A20 VCC1P05 VCCSDIO T9
VCC1R05B_ACLKPLL J17 VCCACLKPLL VCCSDIO
R21 VCCCLK
T21 VCCCLK LPT LP POWER
2.2uH GLFR1608T2R2M-LR K18 VCCCLK SUS OSCILLATOR AB8
1 2 M20 VCCCLK DCPSUS4 VCC1R05B
V21 VCCCLK
1UF_0402_6.3V
47UF_0805_6.3V

47UF_0805_6.3V

FL62 AE20 VCCCLK AC20 RJ105


2 2 2 VCCSUS3_3 VCCAPLL
AE21 AG16 VCC1R05B_USB 1 2
VCCSUS3_3 USB2 VCCIO
C8420

C8421

C8422

AG17
VCCIO SHORT10_30MIL

1UF_0402_6.3V
1 1 1
2
Rev0p7
B C8423 B

@
1

VCC1R05B_HSIO VCC1R05B_PCHCORE VCC1R05AMT

NEAR K9 NEAR L10 NEAR M9 NEAR J11 NEAR J11 NEAR AE8 NEAR AE9 NEAR AE9
10U_0603_6.3V6M

22U_0603_6.3V6M
1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

4.7U_0402_6.3V6M

2 2 2 2 2 2 2
2

2
C8424

C8425

C8426

C8427

C8428

C8429

C8430

C8431

C4
1

1 1 @ 1 1 1 1 1
1
@ @

VCC1R05B_CLKGEN VCC3_SUS VCC3B_PCH

NEAR R21 NEAR J17 NEAR AC9 NEAR AH11 NEAR AH14 NEAR V8 NEAR U8 NEAR K14
4.7U_0402_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

1UF_0402_6.3V

0.1U_0201_6.3V6K
4.7U_0402_6.3V6M

2 2 2 2 2 2 2 2 2 2
C8432

C8433

C8434

C8435

C8436

C8437

C8438

C8439

C6 C7
1 1 1 1 1 1 1 1 1 1
@ @
A A

Security Classification LC Future Center Secret Data Title


CPU(13/16) : POWER
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 15 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

APS/PETS interface
VCC3_SUS VCC3M
FCI_10051922-1810ELF
18 20
17 NC1 PEG2 19
16 NC2 PEG1
15 NC3
<10> -PCH_SLP_S0 14 SLP_S0#
D 13 GND1 D
<10,21> -XDP_DBR 12 SYS_RESET#
11 GND2
<38,60,70,71> -PW RSWITCH 10 PWRBTN#
9 GND3
<22,7> -RTCRST RTCRST#
8
7 GND4
6 +V3.3DS
<10,71> -PCH_SLP_M 5 SLP_A#
<10,62,71> -PCH_SLP_S4 4 SLP_S4#
<10,71> -PCH_SLP_S5 SLP_S5#
3
2 VccDSW3_3
<10,62,65,71,78> -PCH_SLP_S3 SLP_S3#
1
VccSus3_3
J41 ME@

HASWELL_MCP_E HASWELL_MCP_E
U58N U58O U58P HASWELL_MCP_E
H17
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D47 VSS VSS L20
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
C AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63 C
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
VSS VSS VSS 15 OF 19 VSS VSS VSS
AE58 AL31 AT35 AY4 E17 16 OF 19 T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS 14 OF 19 VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62 VSSSENSE
AH24 VSS VSS AN23 AU33 VSS VSS C11 VSS VSS_SENSE AH16 VSSSENSE <79>
AH28 VSS VSS AN31 AU51 VSS VSS C14 Rev0p7 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20 1 2
VSS VSS VSS VSS 2+3@
AH34 AN36 AU57 C25 R70 100_0201_1%
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
AH57 VSS VSS AN52 AV39 VSS VSS D23
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
VSS VSS VSS Rev0p7 VSS

2+3@
Rev0p7

B B
2+3@

A A

Security Classification LC Future Center Secret Data Title


CPU(14/16) : GND
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 16 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

D D

HASWELL_MCP_E
U58Q
C C

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3


DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP939
TESTPAD
TP_DC_TEST_AY60 AY60
TESTPAD TP938 DAISY_CHAIN_NCTF_AY60
DC_TEST_AY61_AW61 AY61 A60 TP_DC_TEST_A60 TP940
TESTPAD
DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A61 DC_TEST_A61_B61
TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
TESTPAD TP941 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP942
TESTPAD
DC_TEST_A3_B3 B3 17 OF 19 AV1 TP_DC_TEST_AV1
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP943
TESTPAD
DC_TEST_A61_B61 B61 AW1 TP_DC_TEST_AW1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP944
TESTPAD
DC_TEST_A62_B63 B62 AW2 DC_TEST_AY2_AW2
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW63
DAISY_CHAIN_NCTF_AW63 TP945
TESTPAD
Rev0p7

2+3@

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/05/02 Deciphered Date 2012/5/02 CPU(15/16) : NCTF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 17 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

D D

C
TABLE C

CFG4: Display Port Presence

1: Disabled
0: Enabled U58R HASWELL_MCP_E

N23
RSVD R23
RSVD T23
AT2 RSVD
RSVD U10
AU44 RSVD
AV44 RSVD
U58S HASWELL_MCP_E D15 RSVD 18 OF 19
RSVD AL1
RSVD AM11
RSVD AP7
F22 RSVD
RSVD AU10
H22 RSVD
RSVD AU15
J21 RSVD
AC60 AV63 RSVD AW14
AC62 CFG0 RSVD_TP AU63 RSVD AY14
AC63 CFG1 RSVD_TP RSVD
R9110 AA63 CFG2
<21> CFG3 CFG3 Rev0p7
1 2 AA60 C63
Y62 CFG4 RSVD_TP C62
Y61 CFG5 RSVD_TP B43
1K_0201_5% CFG6 EDP_SPARE 2+3@
Y60
V62 CFG7 A51
V61 CFG8 RSVD_TP B51
TESTPAD TP946 CFG9 RSVD_TP
V60
CFG10
2

U60 L60
R9272 T63 CFG11 RESERVED RSVD_TP
T62 CFG12 N60
1K_0201_5% CFG13 RSVD
T61
@ T60 CFG14 W23
1

CFG15 RSVD Y22


AA62 RSVD AY15
U63 CFG16 PROC_OPI_COMP
AA61 CFG18 AV62
U62 CFG17 19 OF 19 RSVD D58
R9111 CFG19 RSVD
2

1 2 V63 P22 R9113


CFG_RCOMP VSS N21
VSS 49.9_0201_1%
B A5 B
RSVD P20
1

49.9_0201_1% E1 RSVD R20


D1 RSVD RSVD
J20 RSVD
R9112 RSVD
H18
1 2 B12 RSVD
TD_IREF
Rev0p7

8.25K_0201_1%
2+3@

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/05/02 Deciphered Date 2012/5/02 CPU(16/16) : CFG/RESERVED


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 18 of 100
5 4 3 2 1

sualaptop365.edu.vn
5 4 3 2 1

DVDD33
DVDD33

AVDD10 0.1U_0201_6.3V6K 2 0.01U_0201_6.3V7K

2
C8463 C300

0.01U_0201_6.3V7K

0.1U_0201_6.3V6K
1000P_0201_25V7K
2 2

1
2
1

C8464
C20

C301
TXC 8Y27000005

1
1 1
KDS 1ZZHAE27000CC0A
D ESPON Q22FA1280007000 AVDD33
D

0.01U_0201_6.3V7K

0.1U_0201_6.3V6K

0.1U_0201_6.3V6K

1000P_0201_25V7K
2 2

2
C8461

C8462
DVDD10
@

C19
C297
R32 1 2 0_0201_5%

0.1U_0201_6.3V6K
0.01U_0201_6.3V7K
1000P_0201_25V7K
<3,60> -DOCK_ATTACHED_3B

1
1 1
2 2

2
C8465
C21

C302
R33 1 2 0_0201_5%
<10,14,21,62,70,72> BPWRG

1
1 1
D20
1 2

1SS400CST2RA_VMN2-2

Y7
Crystal @ U102

16
37
39

12
27

18
33
45
46

29
6

7
4 3 2
GND OUT

AVDD10_1
AVDD10_2
AVDD10_3

DVDD10_1
DVDD10_2
DVDD10_3

AVDD33_1
AVDD33_2
AVDD33_3
AVDD33_4

DVDD33_1
DVDD33_2

2
2 1 2 C8345
IN GND

2
8P_0201_25V8J C41
1

C124
C8346 1UF_0402_6.3V

1
2

2
27MHZ_7PF_8Y27000005 R9115

1UF_0402_6.3V
10P_0201_25V8D

2
1 1M_0201_5% R246 R247
1 32 2.2K_0201_5% 2.2K_0201_5%

1
R9117 1 2 33_0201_5% 2 XTAL_IN LDO @ @

1
XTAL_OUT 15

1
VDDO_5V
26 23 RED
RESET_L RED 24 RED <40>
RED_L
RED_L
8 21 GREEN
<3> DP2VGA_DDIP2_HPD DP_RX_HPD GREEN 22 GREEN_L GREEN <40>
GREEN_L
1 2 DP2VGA_AUXN 34 19 BLUE
<3> DP2VGA_DDIP2_AUXN DP_RX_AUXN BLUE BLUE <40>
C8355 1 20.1U_0201_6.3V6K DP2VGA_AUXP 35 20 BLUE_L
<3> DP2VGA_DDIP2_AUXP DP_RX_AUXP BLUE_L
C8354 0.1U_0201_6.3V6K
C 10 C
1 2 40 HSYNC 9 HSYNC <40>
DP2VGA_DP0P
<3> DP2VGA_DDIP2_0P DP_RX_LN0P VSYNC VSYNC <40>
C8350 1 20.1U_0201_6.3V6K DP2VGA_DP0N 41
<3> DP2VGA_DDIP2_0N DP_RX_LN0N 28
C8351 0.1U_0201_6.3V6K
VGA_SCL 30 DDCCLK <40>
1 2 DP2VGA_DP1P 43 VGA_SDA DDCDATA <40>
<3> DP2VGA_DDIP2_1P DP_RX_LN1P
C8352 1 20.1U_0201_6.3V6K DP2VGA_DP1N 44
<3> DP2VGA_DDIP2_1N DP_RX_LN1N 36
C8353 0.1U_0201_6.3V6K R_BIAS
R_BIAS
VCC3B R9128 2 1 14 3
GPIO DC_TP

1
4.7K_0201_5% 4.7K_0201_5% DVDD33
TESTPAD TP902 1
2

R9129

2 1 4 13 2 1
4.7K_0201_5%

DVDD33 R9280 @ R9126


@ R9281 2 1 5 CFG_SCL MSDA 25 C8360 R9118 2 1 150_0201_1%
CFG_SDA MSCL 12.1K_0201_1%
4.7K_0201_5% 330P_0201_25V6 R9119 2 1 150_0201_1%
2 R9120 150_0201_1%

2
11
1

RSVL

THER_PAD
2

4.7K_0201_5%

4.7K_0201_5%
2

2
R9177

AVSS1

AVSS2

AVSS3

AVSS4

AVSS5
2

DVSS

R9132
@ 10K_0201_5%
R9178
10K_0201_5% R9136
1

RED_L

17

31

38

42

48

47

49

1
GREEN_L

1
BLUE_L
TP903 ANX6212GN-AC-R_QFN48_6X6
TESTPAD
CIS SYMBOL ONLY

2
R9123 R9124 R9125

Max 130mA 37.4_0201_1% 37.4_0201_1% 37.4_0201_1%

VCC3B
Max 130mA

1
VCC1R05B
1 2 AVDD33
2.2U_0402_6.3V6M

0.1U_0201_6.3V6K

1000P_0201_25V7K

L9 BLM18BB600SN1D_2P~D
1 2 AVDD10
2.2U_0402_6.3V6M

0.1U_0201_6.3V6K

2
1000P_0201_25V7K
2

2
C8362

C8363

L11 BLM18BB600SN1D_2P~D
B B
C14

2
2

2
C8384

C8376
1

1@
C17

@
1

@ 1@

1 2 DVDD33
L10 BLM18BB600SN1D_2P~D
1 2 DVDD10
2.2U_0402_6.3V6M

0.1U_0201_6.3V6K

1000P_0201_25V7K

L12 BLM18BB600SN1D_2P~D
2.2U_0402_6.3V6M

0.1U_0201_6.3V6K

2
1000P_0201_25V7K
2

2
C8364

C8375

C15

2
2

2
C8459

C8460
1

1@
C18

@
1

@ 1@

2.2uF, 0.1uF, 1000pF: Near filter

A A

Security Classification LC Future Center Secret Data Title


DDI-VGA CONVERTER
Issued Date 2012/06/21 Deciphered Date 2012/06/21 STING UMA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
RED_L Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom GREEN_L 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. BLUE_L
Date: Thursday, May 02, 2013 Sheet 19 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK
B B

A A

Security Classification LC Future Center Secret Data Title


BLANK
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 20 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

D D

VCC3_SUS

VCC1R05B VCC3_SUS

0.1U_0201_6.3V6K
VCC3B VCC1R05B VCC1R05B

220_0201_5%

220_0201_5%

220_0201_5%
51_0201_5%
1K_0201_5%

2
@

2
1

C8320
@ @ @ @

1
R491

R509

R515

R530
MOLEX_52435-2671 MOLEX_52435-2671

R475
XDP_TCK 26 PCH_TCK 26
<4> XDP_TCK 25 26 28 <7> PCH_TCK 25 26 28
24 25 GND 27 24 25 GND 27
XDP_TMS 23 24 GND PCH_TMS 23 24 GND
<4> XDP_TMS XDP_TDI 22 23 <7> PCH_TMS PCH_TDI 22 23
<4> XDP_TDI 21 22 <7> PCH_TDI 21 22
-XDP_TRST
<4> -XDP_TRST 20 21 20 21
<4> XDP_TDO XDP_TDO <7> PCH_TDO PCH_TDO
19 20 19 20
-XDP_DBR 18 19 -XDP_DBR 18 19
<10,16> -XDP_DBR -PLTRST_NEAR 1 2 17 18 1 2 17 18
<10,70> -PLTRST_NEAR 16 17 <10,14,79> CPUCORE_PWRGD 16 17
R588 @ 1K_0201_5% 15 16 R511 1K_0201_5% 15 16
14 15 14 15
BPWRG 13 14 13 14
C <10,14,19,62,70,72> BPWRG PWR_DEBUG 12 13 12 13 C
<14> PWR_DEBUG 11 12 11 12
CPUPWRGD 1 2 10 11 -RSMRST 1 2 10 11
<4> CPUPWRGD 9 10 <10,71> -RSMRST 9 10
R594 @ 1K_0201_5% 8 9 R514 1K_0201_5% 8 9
<18> CFG3 7 8 7 8
6 7 6 7
5 6 5 6
4 5 4 5
3 4 3 4
-XDP_PRDY 2 3 2 3
<4> -XDP_PRDY 1 2 1 2
-XDP_PREQ
<4> -XDP_PREQ 1 1
J8 J9

100_0201_5%

100_0201_5%

100_0201_5%

51_0201_5%
2

R471 @ @
51_0201_5%
1

2
@ @ @
TABLE NOTE: J9 "ASM" FOR PDV/SDV ONLY.

1
R943

R945

R946

R541
TABLE NOTE: J8 "ASM" FOR PDV/SDV ONLY. SIGNAL REF DES ENABLE DISABLE

R509 220 NO ASM


SIGNAL REF DES ENABLE DISABLE TDO
R943 100 NO ASM
R530 220 NO ASM
TDO R475 ASM NO ASM TMS
R946 100 NO ASM
R515 220 NO ASM
B TRST# R471 ASM ASM TDI B
R945 100 NO ASM

DBRST# R491 ASM ASM TCK R541 51 51

RESET# R588 ASM NO ASM CPUCORE_PWRGD R511 ASM NO ASM

-RSMRST R514 ASM NO ASM


PWRGD R594 ASM NO ASM
J9 ASM NO ASM
J8 ASM NO ASM

LOGIC
LOGIC

A A

Security Classification LC Future Center Secret Data Title


XDP CONNECTOR
Issued Date 2012/06/21 Deciphered Date 2012/06/21
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom STING UMA 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 21 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

D D

VCC3SW RTCVCC

2
D6
RB520CS-30GT2RA_VMN2-2 1

1
C287
1U_0402_10V6K
2

D3
2 1

RB520CS-30GT2RA_VMN2-2

2
R4
1K_0201_5%

1
C C

J12
1 R620
1 2 1 2 -RTCRST
2 -RTCRST <16,7>
20K_0201_5%
3
GND 4
GND
TYCO_2041180-2 1
C459
1U_0402_10V6K
2

R250
1 2 -SRTCRST
-SRTCRST <7>
20K_0201_5%

1
C285
1U_0402_10V6K
2

B B

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/07/01 Deciphered Date 2014/07/01 RTC BATTERY


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 22 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

D D

U49 VPRO@

VCC3LAN

2
S IC FL 128M W25Q128FVSIQ SOIC 8P
SA00005LW00 D12
RB520CS-30GT2RA_VMN2-2

1
VCC3LAN_SPI

C629
1 2

0.1u_0201_10V6K

3.3K_0201_5%

3.3K_0201_5%

0.1u_0201_10V6K
2

2
2

C429
1

R706

R703
1

1
C C

-SPI_CS0 R322 1 2 33_0201_5% -SPI_CS0_R U49


<9> -SPI_CS0 1 2 8 1
SPI_CLK R681 33_0201_5% SPI_CLK_R
<37,9> SPI_CLK 1 2 VCC /CS 1 2 33_0201_5%
SPI_MOSI_IO0 R674 33_0201_5% SPI_MOSI_IO0_R SPI_IO2_R R8980 SPI_IO2
<9> SPI_MOSI_IO0 SPI_MISO_IO1 1 2 SPI_MISO_IO1_R 7 2 SPI_IO3_R 1 2 33_0201_5% SPI_IO3 SPI_IO2 <9>
R694 33_0201_5% R8981
<9> SPI_MISO_IO1 /HOLD(IO3) DO(IO1) SPI_IO3 <9>
6 3
CLK /WP(IO2)
5 4
DI(IO0) GND

NVPRO@ W25Q64FVSSIQ_SO8

TABLE

SF100 PIN HEADER INTERFACE (TOP VIEW)

1 VCC D12.1 GND GND 2


3 CS# R322.2 R681.2 CLK 4
5 MISO R694.2 R674.2 MOSI 6
7 (KEY) N/A N/A (RESET) 8

B B
U49 SPI ROM

vPRO model(16MB) Non-vPRO model(8MB)

WINBOND W25Q128FVSIQ WINBOND W25Q64FVSSIQ


MACRONIX MX25L12875FM2I-10G MACRONIX MX25L6475EM2I-10G
MICRON N25Q128A13ESEC0F MICRON N25Q064A13ESEC0F

A A

Security Classification LC Future Center Secret Data Title

Issued Date 2012/07/01 Deciphered Date 2014/07/01 SPI FLASH


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 23 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

<5> M_A_DQ[63:0]

<5> -M_A_DQS[7:0]

<5> M_A_DQS[7:0]

<25,5> M_A_A[15:0]

D D

DDR3_VREF_CA DDR3_VREF_CA DDR3_VREF_CA


DDR3_VREF_CA

DDR3_VREF_DQ_SA DDR3_VREF_DQ_SA DDR3_VREF_DQ_SA


DDR3_VREF_DQ_SA
U75 U76 U77
U74
M8 E3 M_A_DQ21 M8 E3 M_A_DQ33 M8 E3 M_A_DQ58
M8 E3 M_A_DQ24 H1 VREFCA DQL0 F7 M_A_DQ23 H1 VREFCA DQL0 F7 M_A_DQ32 H1 VREFCA DQL0 F7 M_A_DQ60
H1 VREFCA DQL0 F7 M_A_DQ27 VREFDQ DQL1 F2 M_A_DQ18 VREFDQ DQL1 F2 M_A_DQ37 VREFDQ DQL1 F2 M_A_DQ63
VREFDQ DQL1 F2 M_A_DQ30 M_A_A0 N3 DQL2 F8 M_A_DQ22 M_A_A0 N3 DQL2 F8 M_A_DQ36 M_A_A0 N3 DQL2 F8 M_A_DQ56
M_A_A0 N3 DQL2 F8 M_A_DQ25 M_A_A1 P7 A0 DQL3 H3 M_A_DQ20 M_A_A1 P7 A0 DQL3 H3 M_A_DQ34 M_A_A1 P7 A0 DQL3 H3 M_A_DQ62
M_A_A1 P7 A0 DQL3 H3 M_A_DQ26 M_A_A2 P3 A1 DQL4 H8 M_A_DQ16 M_A_A2 P3 A1 DQL4 H8 M_A_DQ39 M_A_A2 P3 A1 DQL4 H8 M_A_DQ57
M_A_A2 P3 A1 DQL4 H8 M_A_DQ29 M_A_A3 N2 A2 DQL5 G2 M_A_DQ19 M_A_A3 N2 A2 DQL5 G2 M_A_DQ38 M_A_A3 N2 A2 DQL5 G2 M_A_DQ59
M_A_A3 N2 A2 DQL5 G2 M_A_DQ31 M_A_A4 P8 A3 DQL6 H7 M_A_DQ17 M_A_A4 P8 A3 DQL6 H7 M_A_DQ35 M_A_A4 P8 A3 DQL6 H7 M_A_DQ61
M_A_A4 P8 A3 DQL6 H7 M_A_DQ28 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7 M_A_A5 P2 A4 DQL7
M_A_A5 P2 A4 DQL7 M_A_A6 R8 A5 M_A_A6 R8 A5 M_A_A6 R8 A5
M_A_A6 R8 A5 M_A_A7 R2 A6 D7 M_A_DQ15 M_A_A7 R2 A6 D7 M_A_DQ40 M_A_A7 R2 A6 D7 M_A_DQ55
M_A_A7 R2 A6 D7 M_A_DQ6 M_A_A8 T8 A7 DQU0 C3 M_A_DQ12 M_A_A8 T8 A7 DQU0 C3 M_A_DQ46 M_A_A8 T8 A7 DQU0 C3 M_A_DQ53
M_A_A8 T8 A7 DQU0 C3 M_A_DQ5 M_A_A9 R3 A8 DQU1 C8 M_A_DQ14 M_A_A9 R3 A8 DQU1 C8 M_A_DQ41 M_A_A9 R3 A8 DQU1 C8 M_A_DQ54
M_A_A9 R3 A8 DQU1 C8 M_A_DQ2 M_A_A10 L7 A9 DQU2 C2 M_A_DQ13 M_A_A10 L7 A9 DQU2 C2 M_A_DQ42 M_A_A10 L7 A9 DQU2 C2 M_A_DQ51
M_A_A10 L7 A9 DQU2 C2 M_A_DQ0 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ11 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ44 M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ48
M_A_A11 R7 A10/AP DQU3 A7 M_A_DQ3 M_A_A12 N7 A11 DQU4 A2 M_A_DQ9 M_A_A12 N7 A11 DQU4 A2 M_A_DQ47 M_A_A12 N7 A11 DQU4 A2 M_A_DQ52
M_A_A12 N7 A11 DQU4 A2 M_A_DQ4 M_A_A13 T3 A12 DQU5 B8 M_A_DQ10 M_A_A13 T3 A12 DQU5 B8 M_A_DQ45 M_A_A13 T3 A12 DQU5 B8 M_A_DQ49
M_A_A13 T3 A12 DQU5 B8 M_A_DQ7 M_A_A14 T7 A13 DQU6 A3 M_A_DQ8 M_A_A14 T7 A13 DQU6 A3 M_A_DQ43 M_A_A14 T7 A13 DQU6 A3 M_A_DQ50
M_A_A14 T7 A13 DQU6 A3 M_A_DQ1 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7 M_A_A15 M7 A14 DQU7
M_A_A15 M7 A14 DQU7 A15/BA3 VCC1R35A A15/BA3 VCC1R35A A15/BA3 VCC1R35A
A15/BA3 VCC1R35A
M_A_BS0 M2 B2 M_A_BS0 M2 B2 M_A_BS0 M2 B2
M_A_BS0 M2 B2 M_A_BS1 N8 BA0 VDD D9 M_A_BS1 N8 BA0 VDD D9 M_A_BS1 N8 BA0 VDD D9
<25,5> M_A_BS0 M_A_BS1 N8 BA0 VDD D9 M_A_BS2 M3 BA1 VDD G7 M_A_BS2 M3 BA1 VDD G7 M_A_BS2 M3 BA1 VDD G7
<25,5> M_A_BS1 M3 BA1 VDD G7 BA2 VDD K2 BA2 VDD K2 BA2 VDD K2
M_A_BS2
<25,5> M_A_BS2 BA2 VDD K2 VDD K8 VDD K8 VDD K8
VDD K8 VDD N1 VDD N1 VDD N1
VDD N1 M_A_DDRCLK0_800M J7 VDD N9 M_A_DDRCLK0_800M J7 VDD N9 M_A_DDRCLK0_800M J7 VDD N9
C M_A_DDRCLK0_800M J7 VDD N9 -M_A_DDRCLK0_800M K7 CK VDD R1 -M_A_DDRCLK0_800M K7 CK VDD R1 -M_A_DDRCLK0_800M K7 CK VDD R1 C
<25,5> M_A_DDRCLK0_800M K7 CK VDD R1 K9 CK VDD R9 K9 CK VDD R9 K9 CK VDD R9
-M_A_DDRCLK0_800M M_A_CKE0 M_A_CKE0 M_A_CKE0
<25,5> -M_A_DDRCLK0_800M K9 CK VDD R9 CKE/CKE0 VDD CKE/CKE0 VDD CKE/CKE0 VDD
M_A_CKE0
<25,5> M_A_CKE0 CKE/CKE0 VDD
M_A_ODT K1 A1 M_A_ODT K1 A1 M_A_ODT K1 A1
M_A_ODT K1 A1 -M_A_CS0 L2 ODT/ODT0 VDDQ A8 -M_A_CS0 L2 ODT/ODT0 VDDQ A8 -M_A_CS0 L2 ODT/ODT0 VDDQ A8
-M_A_CS0 L2 ODT/ODT0 VDDQ A8 -M_A_RAS J3 CS/CS0 VDDQ C1 -M_A_RAS J3 CS/CS0 VDDQ C1 -M_A_RAS J3 CS/CS0 VDDQ C1
<25,5> -M_A_CS0 J3 CS/CS0 VDDQ C1 K3 RAS VDDQ C9 K3 RAS VDDQ C9 K3 RAS VDDQ C9
-M_A_RAS -M_A_CAS -M_A_CAS -M_A_CAS
<25,5> -M_A_RAS K3 RAS VDDQ C9 L3 CAS VDDQ D2 L3 CAS VDDQ D2 L3 CAS VDDQ D2
-M_A_CAS -M_A_WE -M_A_WE -M_A_WE
<25,5> -M_A_CAS L3 CAS VDDQ D2 WE VDDQ E9 WE VDDQ E9 WE VDDQ E9
-M_A_WE
<25,5> -M_A_WE WE VDDQ E9 VDDQ F1 VDDQ F1 VDDQ F1
VDDQ F1 M_A_DQS2 F3 VDDQ H2 M_A_DQS4 F3 VDDQ H2 M_A_DQS7 F3 VDDQ H2
M_A_DQS3 F3 VDDQ H2 M_A_DQS1 C7 DQSL VDDQ H9 M_A_DQS5 C7 DQSL VDDQ H9 M_A_DQS6 C7 DQSL VDDQ H9
M_A_DQS0 C7 DQSL VDDQ H9 DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQSU VDDQ
E7 A9 E7 A9 E7 A9
E7 A9 D3 DML VSS B3 D3 DML VSS B3 D3 DML VSS B3
D3 DML VSS B3 DMU VSS E1 DMU VSS E1 DMU VSS E1
DMU VSS E1 VSS G8 VSS G8 VSS G8
VSS G8 -M_A_DQS2 G3 VSS J2 -M_A_DQS4 G3 VSS J2 -M_A_DQS7 G3 VSS J2
-M_A_DQS3 G3 VSS J2 -M_A_DQS1 B7 DQSL VSS J8 -M_A_DQS5 B7 DQSL VSS J8 -M_A_DQS6 B7 DQSL VSS J8
-M_A_DQS0 B7 DQSL VSS J8 DQSU VSS M1 DQSU VSS M1 DQSU VSS M1
DQSU VSS M1 VSS M9 VSS M9 VSS M9
VSS M9 VSS P1 VSS P1 VSS P1
VSS P1 -DRAMRST T2 VSS P9 -DRAMRST T2 VSS P9 -DRAMRST T2 VSS P9
-DRAMRST T2 VSS P9 RESET VSS T1 RESET VSS T1 RESET VSS T1
RESET VSS T1 L8 VSS T9 L8 VSS T9 L8 VSS T9
L8 VSS T9 ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
ZQ/ZQ0 VSS
M_A_ODT J1 B1 M_A_ODT J1 B1 M_A_ODT J1 B1
M_A_ODT J1 B1 -M_A_CS1 L1 NC/ODT1 VSSQ B9 -M_A_CS1 L1 NC/ODT1 VSSQ B9 -M_A_CS1 L1 NC/ODT1 VSSQ B9
-M_A_CS1 L1 NC/ODT1 VSSQ B9 M_A_CKE1 J9 NC/CS1 VSSQ D1 M_A_CKE1 J9 NC/CS1 VSSQ D1 M_A_CKE1 J9 NC/CS1 VSSQ D1
<25,5> -M_A_CS1 J9 NC/CS1 VSSQ D1 L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8 L9 NC/CE1 VSSQ D8
M_A_CKE1
<25,5> M_A_CKE1 L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
NCZQ1 VSSQ E2 VSSQ E8 VSSQ E8 VSSQ E8
VSSQ VSSQ VSSQ VSSQ
2

2
E8 F9 F9 F9
240_0201_1%

240_0201_1%

240_0201_1%

240_0201_1%

240_0201_1%

240_0201_1%
VSSQ VSSQ VSSQ VSSQ
2

F9 G1 G1 G1
240_0201_1%

240_0201_1%

VSSQ G1 VSSQ G9 VSSQ G9 VSSQ G9


VSSQ G9 VSSQ VSSQ VSSQ
B VSSQ 96-BALL 96-BALL 96-BALL B
1

1
R9012

R9011

R9014

R9013

R9016

R9015
96-BALL SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
1

1
R9010

R9009

SDRAM DDR3 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96 K4B4G1646B-HYK0_FBGA96


K4B4G1646B-HYK0_FBGA96

VCC1R35A

2 1 M_A_ODT
30_0201_5% R9263

-DRAMRST
A <26,4> -DRAMRST A

Security Classification LC Future Center Secret Data Title


DDR3L BASE MEMORY CH-A (1/2)
Issued Date 2012/06/21 Deciphered Date 2012/06/21 STING UMA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Thursday, May 02, 2013 Sheet 24 of 100

sualaptop365.edu.vn
5 4 3 2 1
5 4 3 2 1

VCC1R35A

2
VCC0R675B C428 C242 C534 C537 C540 C583
<24,5> M_A_A[15:0]
10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M 10U_0603_6.3V6M

1
M_A_A15 1 2
R9025 36_0201_5%
D M_A_A14 1 2 D
R9026 36_0201_5%
M_A_A13 1 2
R9027 36_0201_5%
M_A_A12 1 2
R9028 36_0201_5%
M_A_A11 1 2
R9029 36_0201_5%
M_A_A10 1 2 VCC1R35A
R9030 36_0201_5%
M_A_A9 1 2
R9031 36_0201_5%
M_A_A8 1 2
R9032 36_0201_5%
M_A_A7 1 2