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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2624272, IEEE
Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs
L1 L2
I. INTRODUCTION L1 L2 ZL
Zs
1549-7747 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2624272, IEEE
Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs
system are listed in Table 1. Fig. 3 (a) Equivalent circuit of series-series 1.5 10topology
5
1.6884 101.875 5(b) simplified
102.063
5
10equivalent
5
2.25 10
5
vin 4
Gv f ,505 10 ,215 10
360 ,46
4
2 4
6n 6 3.5
6 6 3.5 Gv f ,505 10 ,215 10315 ,4.6 1.5 6 6 3.5
X cs + X Lks + R L 3
( )
@ 46 Load 6 n
X Lm
Gv f ,505 10 ,215 10 ,4.6 6 1 Gv f ,505 10 ,215 10 ,4.6 5
3 270 3
( ( ))
Im Z f ,505 10 , 215 10 ,4.6
n in
4.6 Load 6 2.5 n
4.5
n2
@ 6 0.5
6 6
2.5
G v6f ,505 10 6 ,215 225
10 ,46 20 6 6 2.5
4
( ) ( ( ))
Gv f ,505 10 ,215 10 ,46 2 Im Zin f ,505 10 ,215 10 n,46 180 Gv f ,505 10 ,215 10 ,46 2
1.5
X cs + X Lks + R L n
1.5 135 1.510
5
1.6510 G 1.8
5
10
5 6n
1.95 10
5 6
2.110
5
3.5
,4.6 1.5
2.2510
5
+ X Lm 1 v f ,505 10 ,215 10
@ 46 fLoad 3
n2 R 1 90 0.5 n 1
n L 0.5 45 450
0 3@ 4.6 Load 6
f ,505 10 ,215
Gv 10 10
63
10 ,46
2.5
0.5
X cs + X Lks + R L X cs + X +R 0 405 175 200 2
X Lm
0 5 5 5 5 50 5
Lks L 150 kHz 5 5 5 5 5 kHz 5 150 kHz 5360
225 1.5 10
5
1.65 10
5
1.8
5
10 n
1.95 10
5225 kHz 5
2.1 10
1.5 2.25 5
10
2 1.5 101.65 101.8 101.95 102.1 102.25 10 1.5 101.65 101.8 101.95 102.1 10f2.25 10 1.5 10 1.65
X Lkp + X cp n G
Fig.4. (a) v of proposed f
series-series
6 6 WPT
315
450 (b) Imagery f
part of input3
1
,4.6 270
3 0.5
X cs + X Lks + R L 450 n 3
Im Zin f ,505 10
3
,215 10
405 175 10 200 10 4500
+ X Lm impedance
405 of proposed series-series
175 10 200
10 6 WPT 6 225
360 405
n2 Im Zin f ,505 10 ,215 10 ,46 180
5
1.510 1.65
360 315 360
135
X Lm j2fL m
6 6
315 Im Zin f ,505 10 ,215 10 ,4.6 270
315
90 450
6
(8)
6
,4.6 270 III. D ESIGN CONSIDERATIONS 6 6
( ( ))
Im Zin f ,505 10 ,215 10
6 6 225 Im Zin f ,505 10 ,215 10 ,4.6 270
45 405
225 Im Zin f ,505 10 ,215 10 ,46 180
225
X Lkp j2fL kp
6 6 6 6
0 360
( ( (9) )) In a series-series resonant WPT system, in order to transfer
Im Zin f ,505 10 ,215 10 ,46 180 Im Zin f ,505 10 ,215 10 ,46 180
135 5 5 5 5 5 5
135 1.5 10 1.65 10 1.8 10 1.95 10 2.1 315
10 2.2510
90 6 6 135
X Lks j2fL ks power effectively at the presence of relatively large air gap and
90 Im Zin f ,505 10
f
,215 10 ,4.6 270
(10) 45
45
90
225
leakage inductance, capacitors at both sides are used to cancel
0
0
5
Im Zin f ,505 10
5 5
6
,215 10
6
5
,46 180
45
5 5
1 1.510 1.6510 1.810 1.9510 2.110 0 2.2510
X cp (11)
out leakage inductance and improve power transfer efficiency.
5 5 5
1.5 101.65 101.8 101.95 102.1 102.25 10
5 5 5
f
135 5
1.5
90 10 1.65
j2fC p f
It is desirable to operate at or close to resonant frequency, as 45
0
shown in (13), at which leakage inductance and compensation 1.510
5
1.65
capacitance cancel out each other completely, eliminating the
1549-7747 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2624272, IEEE
Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs
effect of leakage inductance and power transfer capability is of simplicity, low cost and high reliability, while synchronous
unrestricted by leakage inductance. In other words, (14) and (15) rectification technique can be used to significantly reduce
hold true if operate at resonant frequency [10-11, 15-17, conduction loss. The low output voltage and large output
20-21]. current (10.4 A at full load) of proposed WPT charging system
1 1 make synchronous rectification attractive. However,
(13)
L kp C p L ks C s implementing a full bridge synchronous rectifier is somehow
troublesome because the source of two high side MOSFET
1 switches are not grounded and requires more sophisticated
jL kp 0 (14)
jC p driving circuit. At first, the semi-SR is implemented which only
1 replaced two low side Schottky diode with MOSFE and does
jL ks 0 (15) not require floating gate driving circuit. Later the full-SR is also
jC s
The equivalent circuit of series-series compensation implemented, which replace all four diodes in the bridge
topology can be simplified to Fig. 3(b) if operates at resonant rectifier with MOSFET switches. The full-SR provides lower
frequency. Fig. 3(b) can be further simplified to Fig. 3(c) if load conduction loss and dissipation, but requires more complicated
is moved to primary side. In Fig. 3(c), both Lm and reflected gate driving circuit to drive the two high side MOSFETs. Figs.
R 6(a), 6(b) and 6(c) respectively show the Schottky diode bridge
load resistance 2L are fed by AC voltage source from primary rectifier, semi-SR and full-SR circuits. In the prototype WPT
n
switching circuit and will sink current. However, only reflected system, synchronous rectification controller TEA1791 by NXP
load resistance consumes real power and transfers power to Semiconductors is adopted to sense the drain-source voltage
load. Current flows into Lm contribute to reactive power, and drive the MOSFET switch. Two isolated DC to DC
increases the apparent power output of the AC source but does converter modules are used to provide floating DC voltage
not transfer power to load. This reactive power increases necessary to drive two high side MOSFET switches. The
conduction and copper loss because it causes excessive current, efficiency of these three rectifier configurations are test and
and should be minimized. The current flow from an AC voltage compared in this paper. In a conventional boost PFC, the power
source into an inductor is in reverse proportion with frequency. loss on input bridge rectifier reduces the overall efficiency. A
So in order to minimize reactive power caused by Lm, operation bridgeless PFC pre-regulator controlled by Texas Instruments
frequency should be as high as possible. However, as frequency UCC28070 controller is adopted for the proposed WPT system
increases, skin effect loss and core loss increase as well. The to achieve high power factor and low input current harmonic
operating frequency range selected by the prototype design of distortion. Gallium Nitride (GaN) FETs and Silicon Carbide
this paper is 175 kHz~200 kHz. The resonant frequency is (SiC) diodes are used in the PFC stage to reduce switching
designed at 182 kHz, with corresponding voltage gain equals to losses and achieve high efficiency.
G
turns ratio, or v equals to unity.
n
RF Tx
It is well known that resonant converters must operate in Battery
Current/Volatge ADC Module
(nRF24L01+)
inductive region to achieve ZVS. The imagery part of the input DSP
impedance of the proposed WPT resonant network shown in TMS320F28035
(a)
Fig. 4(b) is always positive, indicating that the proposed
resonant network is inductive in the designed frequency range RF Rx
Module PI ePWM To
and load range, thus guaranteeing ZVS. In practical design, (nRF24L01+) Controller Module Gate Drivers
1549-7747 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2624272, IEEE
Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs
under test. The primary and secondary PCBs are shown in Figs.
7(b) and 7(c). It can be observed that multi-layer ceramic Drain Source Voltage (200V/Div) v.s Drain Current (2A/Div) Output Voltage (Approximately 48V)
capacitors (MLCC) with low ESR features are used for the
resonant capacitors both at the primary and secondary sides of 2uS/Div 5uS/Div
the prototype system to reduce PCB size and achieve higher (a) (b)
Fig. 8 Simulation waveforms for (a) primary and (b) secondary circuits at full
power density. Simulation waveforms of primary and
output power
secondary side circuits at rated output power condition are
shown in Fig 8(a) and 8(b), respectively. It should be noted that Primary Voltage Primary Voltage
both voltage and current across primary resonant capacitor is
very large so capacitors with high voltage and current rating
must be used. Fig. 9 shows the measured waveforms of primary
and secondary voltage and current at full load and light load
conditions. The high-frequency ripple on the primary current is
likely to be caused by the parasitic resonance of coil. The Primary Current Primary Current
soft-switching waveforms on primary MOSFETs are verified
and shown in Fig. 10. Fig. 11(a) shows the measured efficiency (a) (b)
performance of the WPT DC-DC stage circuit with
Secondary Voltage Secondary Voltage
synchronous rectification (SR) design at 400Vdc input and
48Vdc output condition. The peak efficiencies of the WPT
DC-DC stage with secondary Schottky diode bridge rectifier,
semi-SR and full-SR are respectively 92%, 92.7% and 93.2% Secondary Current Secondary Current
under 15cm air gap. The wall to battery efficiency of the WPT
charging system under no misalignment and 10 cm
misalignment are measured and shown in Figs. 11(b) and 11(c).
The wall-to-battery efficiency can be up to 91.6% at 240Vac
input and 15cm gap between primary and secondary coils. The
(c) (d)
power consumed by the control system (e.g. DSP, RF Tx/RX) Fig. 9 Measured primary resonant tank input voltage and current at (a) 500 W
is included in these efficiency measurements. Fig. 12(a) shows and (b) 50 W and secondary voltage and current before rectifier at (a) 500 W
the measured input voltage and current waveforms. At low-line and (b) 50 W load conditions.
and rated power condition, the total harmonic distortion (THD)
Drain-Source Voltage Drain-Source Voltage
of AC input current can be lower than 4% as shown in Fig.
12(b).
Secondary Coil
Primary PCB Gate-Source Voltage Gate-Source Voltage
Secondary PCB
(a) (b)
Primary Coil
Fig. 10 Measured soft-switching waveforms on primary MOSFETs. (a) No
misalignment (b) 10 cm misalignment
(a)
93.2%
(b) (c)
Fig. 7(a) Experimental setup, (b) primary and (c) secondary PCBs of the WPT
charging system.
(a)
1549-7747 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2016.2624272, IEEE
Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs
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1549-7747 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.