ComputerSystems

Organization

http://jatinga.iitg.ernet.in/~cs110/

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 CentralProcessingUnit

Theorganizationofasimplecomputerwith
oneCPUandtwoI/Odevices
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 CPUOrganization

ThedatapathofatypicalVonNeumannmachine.
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 InstructionExecutionSteps
Fetchnextinstructionfrommemoryintoinstr.
register
Changeprogramcountertopointtonext
instruction
Determinetypeofinstructionjustfetched
Ifinstructionsuseswordinmemory,determine
whereFetchword,ifneeded,intoCPUregister
Executetheinstruction
Gotostep1tobeginexecutingfollowing
instruction
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 Interpreter(1)

...

Aninterpreterforasimplecomputer(writteninJava).
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 Interpreter(2)

Aninterpreterforasimplecomputer(writteninJava).
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 DesignPrinciplesforModernComputers

Allinstructionsdirectlyexecutedby
hardware
Maximizerateatwhichinstructionsare
issued
Instructionsshouldbeeasytodecode
Onlyloads,storesshouldreference
memory
Provideplentyofregisters
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 InstructionLevelParallelism

Afivestagepipeline
Thestateofeachstageasafunctionoftime.Nine
clockcyclesareillustrated
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 SuperscalarArchitectures(1)

Dualfivestagepipelineswithacommon
instructionfetchunit.

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 SuperscalarArchitectures(2)

Asuperscalarprocessorwithfivefunctionalunits.
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 ProcessorLevelParallelism(1)

AnarrayofprocessoroftheILLIACIVtype.
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 ProcessorLevelParallelism(2)

Asinglebusmultiprocessor.
Amulticomputerwithlocalmemories.
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 PrimaryMemory
MemoryAddresses(1)

Threewaysoforganizinga96bitmemory.
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 MemoryPackagingandTypes

Asingleinlinememorymodule(SIMM)holding256MB.Twoof
thechipscontroltheSIMM.

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 PrimaryMemory
MemoryAddresses(2)

Numberofbitspercell
forsomehistorically
interestingcommercial
computers

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 ByteOrdering(1)

(a)Bigendianmemory (b)Littleendianmemory
MSBinlowermemorylocation LSBinlowermemorylocation

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 ByteOrdering(2)

(a)Apersonalrecordforabigendianmachine.
(b)Thesamerecordforalittleendianmachine.
(c)Theresultoftransferringfrombigendiantolittleendian.
(d)Theresultofbyteswapping(c).

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 CacheMemory

ThecacheislogicallybetweentheCPUandmain
memory.Physically,thereareseveralpossibleplacesit
couldbelocated.

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 MemoryHierarchies

Afivelevelmemoryhierarchy.

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