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In the last flipped class you learned about transistor amplifiers and how to bias them as well as
learning about a bias curve and how RF oscillates around the quiescent point. You will find this
kind of amplifier is known as a class A amplifier and in this session you are going to learn about
class B and class C amplifiers which have a different bias point and amplify in a different way.
Furthermore you will learn about how to calculate the amplifier gain of an ideal transistor, while
also it will show consideration with regard to reducing the noise in a low noise amplifier.
1. That the DC biasing resistors and DC voltage source are set such that the voltage across
the collector to the emitter, vceQ, is halfway between the knee voltage and the maximum
possible voltage, equal to the DC supply voltage.
2. That the base current is set to achieve a bias collector current, icQ, which is half of the
maximum collector current.
3. That when RF current is applied to the input, the collector current oscillates up and down
the load line where Q is the midpoint. This is a current with a gain and so when it flows
through the load impedance as shown in Figure 2 (a), it will result in a voltage gain.
ic RF Load Line
ib
Q
icQ
vce
vk vce,Q Vcc
Figure 1 - Illustration of the bias curves for the bipolar junction transistor showing the quiescent point
1) The transistor is modelled as an ideal current source, which has an infinite input impedance
and from the base to emitter there is a small representative resistance, r.
2) Also in the equivalent circuit, every component that has no RF current going through it is
removed and likewise the DC source is consequently also removed.
3) Any component that has RF flowing through it but no DC becomes a short circuit as it has
no effect as far as RF is concerned.
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You should carefully examine Figure 2 and satisfy yourself that the only remaining two
components in the circuit are the load impedance and the base to emitter resistance as shown.
Vcc
vo
R1
vo iin
vin iin
vin = ZL
ZL
r
R2
Re Ce
(a) (b)
Figure 2 - Thevenin equivalent of the BJT transistor amplifier circuit at RF
Note in Figure 2 (b) that the ideal current source causes the output RF current, io to flow directly
though the load impedance and this will cause an output voltage vo = -ioZL will be output, which
will be a negative current if applied to a load impedance ZL. The input impedance, Zin, can be
determined as the ratio of input voltage vin to input current iin.
Taking this ideal amplifier case, you should therefore be able to deduce the following equation for
the voltage gain:
ZL
Gain =
Zin
For a lower input impedance equivalent to r in this case, the output impedance can be simply
increased as high as possible and theoretically the gain will increase in turn until the amplifier
reaches saturation. However, a real transistor has stray capacitances as illustrated in Figure 3.
See for yourself that when this is modelled into the equivalent AC circuit model that the ideal
voltage gain derived before will not hold and if anything it will reduce. Also note that at both the
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input and output, the amplifier would need to be matched to the usual transmission line
impedance, Z0, of 50. Impedance matching is performed at both the input and output of the
amplifier by use of matching circuits using L-networks, which you have already covered elsewhere
in the module. Note that when the input impedance is optimised, it will impact the output
impedance and in vice versa they both have a dependency on each other and the gain has a
dependency on both. This is something you will learn about and encounter in the laboratory class.
The resulting amplification from class B is illustrated in Figure 4 (b). The amplifier is now set to
only amplify the positive part of the incoming RF signal and stay zero when a negative signal is
going through the input. Obviously this only recovers and amplifies half of the carrier, though for
some digital communication systems this may not be an issue. It is still, however, possible to
apply amplification to both the positive and negative part using a push pull amplifier in Figure 4
(d). In this case the two sides of the signal are amplified.
Finally a hybrid of class A and B can be formed known as a class AB in Figure 4 (c). This aims to
take the benefits of both class A and B amplifiers.
(a) (c)
(b) (d)
Figure 4 - Illustration of (a) Class A amplifier, (b) Class B amplifier, (c) Class AB amplifier, (d) push pull
class B amplifier
Finally a class C amplifier is shown in Figure 5. Here it is noted that the half sine wave is part of a
Fourier series of harmonics. In this case the band pass filter (BPF) can simply filter out the
fundamental, which will be still significantly amplified. Obviously there will be some deliberate loss
due to the fact that non fundamental frequencies will be filtered out.
BPF
Now you have seen this video see for yourself why:
1) Biasing of a class B amplifier follows the same procedure as for class A, the only difference
now is that the quiescent current is about one tenth of ic|max rather than one half. This will
subsequently result in different resistor values for the same supply voltage.
2) Class A amplifiers have a better linearity than class B amplifiers.
3) How does current flow in a class B amplifier when not in use compared to a class A?
Therefore why is class B more efficient?
Now think given that we do not want RF current to flow down these two resistors should their
resistance be high or low? Justify your answer.
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Vcc
R1
vo
vin
ZL
R2
Re Ce
Therefore can it be ever possible to generate no noise at all if this resistance is present? What will
happen to the noise when it is representing extra noise current in the base to emitter? What will
it do to the collector current?
S in
N in
F=
S out
N out
Therefore satisfy yourself that it is always the case F > 1 based on the rules established above.
Obviously we dont want to add noise at the receiver so we want to keep F as near to 1 as
possible. This noise factor is also expressed as noise figure when converted to decibel terms. Note
that the noise factor is a power ratio, or a ratio of power ratios to be more precise, but this
nonetheless means that the following holds:
More will be studied regarding the noise factor and figure in the next class. It is just important for
now to understand its meaning. It should be noted though that when F is referred to as the noise
figure, it is the noise factor in decibels.
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Task 9 Noise circles and noise optimisation
Consider a circuit that has been impedance matched with L-networks such as in Figure 7. Note
the regulator capacitor was removed for clarity. It is possible that a simulator can perform an
analysis of many different matching solutions for these two networks and determine what are
known as gain circles and noise circles in a Smith chart. You will see this in the laboratory class
when you undertake the task.
Vcc
R1
vo
vin
ZL
R2
Re Ce
Figure 7 - Illustration of a low noise amplifier circuit with L-network matching circuits
Figure 8 gives an example of noise circles and gain circles. The noise circles join up all points on
the Smith chart where the input impedance may be different (as the corresponding s11 is likewise
in different points on the chart) but on the circle, the noise figure is the same. The bigger circles
have bigger noise figures, but the noise figure is minimum at Fmin in the smallest circle in the
middle with zero radius. It is desirable that the smallest noise circle is nearest the centre point of
the Smith chart, as ideally we want to be matched as best as possible but at the same time
maintain low noise figure. However, in this case it does show that the noise figure is minimum
when the circuit is not quite matched slightly to the right of the centre. This would still provide an
acceptable match but at the same time noise is reduced as best as possible due to the resistive
part formed in the input circuit.
Gain Circle
Gmax
Noise Circle
Fmin
Also in Figure 8 is shown some gain circles. Here the central zero radius circle has the maximum
gain and is marked by Gmax. It is a slight distance away from Fmin in but think: What if the input
impedance was optimised to be at the same point as Gmax would this be the best position if you
were not bothered about having an exceptionally low noise figure? Also think about what would
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happen if Gmax and Fmin were near to each other but further away from the centre of a Smith chart
would this be a bad design? Finally what about if they are very far apart from each other, would
that be a viable design? Think why and give yourself some reasoning.
Tim Brown
November 2016