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Vending Machine
Fall 2003
Project Report
December 5, 2003
Contents:
1. ABSTRACT.
2. INTRODUCTION.
3. SYSTEM REQUIREMENT.
4. PROJECT INPUT/OUTPUT.
5. ASIC REQUIREMENT.
6. ALTERA IMPLEMENTATION.
7. RESULTS.
8. CONCLUSION.
ABSTRACT:
For this project, a hardware description language, VHDL, was used to specify
portions of the design. This representation was synthesized and mapped into a
chosen technology. The resulting structural (logic) description was combined with
other components using a schematic editor. The design was then simulated for
functionality. Once verified, the structural representation was translated into a
physical representation that was placed and routed automatically. The design was
then re-simulated to verify proper operation and timing.
System requirement
Architectural
Specifications
Behavioral Structural
Description Description
Design synthesis
Simulation
Figure 1: Process for Design of a Microelectronic System
System Requirements:
1) Coins insertion simulation
2) Item selection
When one of the 7 dipswitches is selected and PB2 is pushed, the system
checks current total deposited coins with the price of specific items
selected by the dipswitch. If the deposited coins are equal or greater
than the price of candy, the system lights up the specific LED
representing the selected candy to indicate that the item was vended and
the 7-segment displays show the amount of coins returned. When the
dipswitch is returned to the initial condition, the coin return will be
initiated and then all registers reset. If more than one switch is selected
and PB2 is pushed, the system shows an error, and will return the
deposited coins and reset. If the total deposited coins are insufficient, the
system displays "LL" on the 7-segment displays until the dipswitch
returns to the initial position.
3) Availability of item
After the price of item is compared with the deposited coins and the, the
system will check the availability of the candy. If the specific item is
unavailable, the LED will not light but the 7-segment will display EE
until the dipswitch is reset. The deposited money is returned.
If no dipswitch is selected and PB2 is pushed, the system goes into coin
return mode.
DIP Switches
ASIC Requirements
The design consists of several modules, each performing a particular task.
Figure 3 shows the internal components and the I/O requirements of the ASIC.
Altera Implementation
The system was coded in IEEE-compliant VHDL and compiled
and simulated using Mentor Graphics. This provided an
opportunity to detect and correct errors early in the design
process. It also allowed each module to be individually
simulated to verify correct operation before the entire system
was tested. After verification of the simulation for the complete
system, the project file was downloaded to an Altera evaluation
board containing a FLEX10K20RC240-4. This is a 240-pin
FPGA which is required to be used to store the logic functions
for this project. 7 pins on the chip were wired to the 7 LEDs
using jumper wires. No other wiring was needed as the
pushbuttons, dipswitches and 7-segment LEDs were already
connected to the board. The pin numbers for each device were
available in the documentation for the board, and were
manually assigned in the Altera software prior to downloading.
Results
After successfully downloading the project to the Altera
evaluation board, the project was tested according to the
project specifications. The project worked satisfactorily . The
error detection that was coded into the main module worked
accordingly.
Conclusion
The objective of this project was to design and implement a
candy machine using an FPGA device. The project was
designed and implemented successfully. There are various
improvements that could be made to the project to increase it's
functionality Enable more than one type of coin to be deposited
(nickels, dimes, and quarters. Keep track of item sales,
including number of items sold and amount of cash received.
Keep track of change available.