2330 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO.
6, NOVEMBER/DECEMBER 2011
A Novel Method of Measuring Inherent Power
System Charging Current
Dev Paul, Senior Member, IEEE, Peter E. Sutherland, Fellow, IEEE, and
Sergio A. R. Panetta, Senior Member, IEEE
AbstractHigh-resistance grounded (HRG) power systems
have been used in many industries to minimize equipment damage,
including but not limited to mining, petrochemicals, shore-to-ship
power supplies, and many others. The system charging current
value should be known for designing an HRG power system. One
method of determining the system charging current is to perform
engineering calculations involving the inherent capacitance to
ground for each of the power system components. However, this
method may not provide accurate data as the sneak capacitance
to ground for power system components cannot be determined
due to their installation configuration. Therefore, it is essential to
have a reliable method of measuring the system charging current.
Before describing the proposed method of measuring the sys-
tem charging current, fundamental concepts of system charging
current and its mathematical analysis are provided. In addition,
power system arcing faults and the associated damage when a
fault remains lineground faulted, particularly in the case of a
medium-voltage power system, are included. Finally, a novel and
suitable method of measuring the inherent power system charging
current is presented.
Index TermsArc hazard, capacitance to ground, charging
current, current transformer (CT), grounded power system, high-
resistance grounded (HRG), ungrounded power system.
I. I NTRODUCTION
E LECTRICAL arc hazards and their associated effects on
equipment damage are unpredictable. An arc may occur
when equipment insulation between phase to phase and/or
phase to ground fails. The intensity of the arc damage is related
to the fault current magnitude at insulation failure location.
Power system fault statistics indicate that close to 75% of all
faults involve ground [1], [2]. Therefore, making the ground
fault current low by using the high-resistance grounded (HRG)
power system can minimize the damage at the fault location as
long as the fault is cleared by appropriate protection devices
before it becomes a three-phase fault, which may cause more
Manuscript received January 28, 2011; revised May 19, 2011; accepted
June 26, 2011. Date of publication September 19, 2011; date of current
version November 18, 2011. Paper 2010-PSEC-552.R1, presented at the 2011
IEEE/IAS Industrial and Commercial Power Systems Technical Conference,
Newport Beach, CA, May 15, and approved for publication in the IEEE
TRANSACTIONS ON INDUSTRY APPLICATIONS by the Power System Engi-
neering Committee of the IEEE Industry Applications Society.
D. Paul is with AECOM, Oakland, CA 94612 USA (e-mail: dev.paul@
aecom.com).
P. E. Sutherland is with GE Energy Services, Schenectady, NY 12306 USA
(e-mail: peter.sutherland@ge.com).
S. A. R. Panetta is with I-GARD Corporation, Mississauga, ON L5S 1A8
Canada (e-mail: spanetta@i-gard.com).
Digital Object Identifier 10.1109/TIA.2011.2168510
0093-9994/$26.00 2011 IEEE
damage. Before recent concerns of arc hazards in the indus-
try, HRG power systems have been used in many industries,
including but not limited to mining, petrochemicals, and shore-
to-ship power supplies, to minimize equipment damage. Upon
detection of a ground fault on the HRG low-voltage (LV) power
systems, with relatively low system charging currents, an alarm
or an orderly shutdown of the power system is commonly used.
This paper provides a discussion of the lineground arcing fault
and associated damage and supports the conclusion that, for
a medium-voltage (MV) HRG power system, the fault should
be cleared immediately upon occurrence of a line-to-ground
fault, particularly when the system charging current is 5.5 A
for system voltages of 4.16 kV and above [2]. Higher system
charging current may be due to an extended power system or
a relatively longer parallel feeder cable system, which may
result in additional damage if not tripped immediately upon
sensing the line-to-ground fault. A combination of modern mi-
croprocess relays with appropriate current transformers (CTs)
can provide adequate ground fault protection for an HRG power
system.
For designing an HRG power system, the system charging
current that affects the neutral resistor rating should be known.
This paper suggests using a neutral resistor sized based upon
the calculated system charging current [9] and then suggests
performing measurements so that the sneak (unknown) capaci-
tance to ground is included in the measurements. In the case of
cold-ironing projects [4][6], ship capacitance may be defined
as sneak capacitance as the ship authority will not provide such
data needed for designing an HRG system at MV.
First, this paper provides a discussion of system charging
current for an ungrounded and an HRG system. Then, an
analysis of arcing fault damage for an HRG system is included.
Last, this paper provides various methods of measuring system
charging current for both types of systems: 1) systems where a
neutral point is available, such as a wye-connected system, and
2) systems where a neutral point is not available, such as delta-
connected systems, where the neutral point is created by use of
the grounding equipment [2], [3].
II. U NGROUNDED P OWER S YSTEM
In an ungrounded power system, either there is no intentional
connection of neutral to ground or the neutral point is not avail-
able for grounding purposes. Such a power system is coupled
to ground by the uniformly distributed inherent capacitance
of each phase to ground. In general, this distributed inherent
capacitance (C) of each phase to ground is equal in magnitude,
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT
Fig. 1. (a) Ungrounded power system voltage and inherent capacitive current
vector diagramPower system phase sequence clockwise. (b) Power system
inherent capacitive current vector diagram.
and the corresponding reactance is generally represented as
XCO . Thus, for a 60-Hz power system, the value of XCO in
ohms will be (1/j260C), where C is in farads.
The system charging current of an ungrounded power system
without any ground fault is shown in Fig. 1(a). This system
charging current can be detected by a zero-sequence CT on
the main circuit breaker at the time of closing the breaker. This
CT should be a high-accuracy class or digital clamp on type CT
with a digital recorder. Once the system is energized, this CT
will not be able to measure the system charging current even if
a lineground fault occurs.
Under the normal power system condition, the system charg-
ing current from each phase to ground represented by (1)
is shown in Fig. 1(a), and their vector addition is shown in
Fig. 1(b). See [2, Fig. 3.5] for additional clarifications
IAC = IBC = ICC = ICO = j wCELN (in amperes)
where
ELN lineneutral system voltage, in volts;
C line-to-ground capacitance of each phase, in farads;
w 377 (2f ) in the case of 60-Hz frequency.
For a bolted line-to-ground fault on phase A, the vector
diagram of the power system phase voltages and currents is
shown in Fig. 2. A ground fault current equal to the total system
charging current will flow from the unfaulted phases to ground,
as their voltages with
respect to ground will become line-to-line
voltage, which is 3 times the normal line-to-neutral voltage,
and will return to the system by the faulted phase.
From Fig. 2, the total system charging current (IC ) flowing
through the faulted phase A back to the system can be repre-
sented by (2). See [2, Fig. 3.6] for additional clarifications
IC = 2 3j w C ELN cos(30) = 3 ICO
2331
where ICO is shown in (1) and can be written as follows:
ICO = ELN /XCO . (3)
A bolted line-to-ground fault current equal to the total system
charging current discussed here does not seem to pose any
damage to the system; however, such bolted lineground faults
on an ungrounded power system are susceptible to turn into
intermittent low-current arcing faults which have been proven
to be damaging to a power system as a result of transient over-
voltage ranging from 5 to 6 per unit (p.u.) of the system voltage
in short time. See [2, Fig. 317]. These transient overvoltages
are dangerous to equipment insulation, and for this reason,
ungrounded power systems are not used in industrial power
systems [18].
III. R ESISTANCE G ROUNDED P OWER S YSTEM
A zero-sequence equivalent circuit of a resistance grounded
power system with a neutral resistor RN is shown in Fig. 3. This
is based upon the assumption that all other impedance values
of the power system components are small compared to XCO ,
which is a valid assumption for industrial and commercial
power systems, particularly for a resistance grounded power
system.
From Fig. 3, zero-sequence current (IO ) is represented as
I0 = ELN / [1/ {(3RN XCO )/(3RN + XCO )}] .
Lineground bolted fault (IF ) is 3IO as represented in the
following:
3I0 = 3ELN [(1/XCO +1/3RN )] = 3(ICO +IRO ) = IC +IR .
Therefore, zero-sequence resistance of the system (RO ) can
be considered as 3RN . Vector addition of two fault current
components IR and IC at 90 phase angle will have ground
fault IF from faulted phase to ground represented by the
expression

2 2

IF = IC + IR .
(1)
Current IR will flow from faulted phase to ground and then to
system via (RN ), whereas current (IC ) will flow from the two
unfaulted phase capacitances to ground and then from ground
to system via faulted phase.
A line-to-ground fault on an ungrounded power system
shown in Fig. 2 can be considered a special case of the resis-
tance grounded power system shown in Fig. 3 where resistor
RN will be of infinite value. The fault current for ungrounded
power system will then simply be the total system charging
current IC (3ICO ) which matches the results indicated in (2)
from a vector diagram.
It is not the bolted lineground fault that is damaging but
a low-level intermittent arcing ground fault with variable arc
fault impedance which is difficult to detect but dangerous and
damaging in both LV and MV systems. We will discuss a
lineground arcing fault with fault impedance in the following
(2) section.
2332 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011
Fig. 2. Ungrounded power system voltages and currents during phase A to ground bolted fault.
Fig. 3. Zero-sequence circuit diagram for a bolted phase-to-ground fault on a
resistance grounded power system.
Fig. 4. HRG power systemBolted ground fault on phase A.
A. HRG Power System
Depending upon the value of RN which controls the resistive
component of the line-to-ground fault current, the system will
be considered an HRG power system when IR IC (the ratio
of IR /IC is between 1 and 1.25) or a low-resistance grounded
(LRG) power system where IR is much higher than IC and
there is very little effect of system charging current on the
line-to-ground fault current. For example, for a 400-A LRG
power system with a system charging current of 7 A, a bolted
lineground fault will be 400.06 A.
The lineground fault current (IF ) shown in Fig. 4 will have
two components: the resistive current (IR ) and capacitive cur-
rent (IC ) as the system neutral is connected to ground through
a resistor. For an HRG system, under a bolted phaseground
Fig. 5. Voltage vector diagram for arcing faults on phase A.
fault condition, the current flowing through the resistor IR can
be made equal to IC by sizing resistor RN based upon the
estimated value of IC . The current (IR ) will be in phase with
neutral-to-ground voltage, which will be at 90 to the current
IC that flows from the power system through the healthy phase
capacitances to ground. Thus, these two currents,
equal in mag-
nitude and 90 apart, will have the vector sum of 2 times IC .
B. HRG Power System20% Arcing Fault on Phase A
Fig. 5 shows the phase voltage vector diagram for the 20%
and 80% arcing faults on phase A on an HRG power system. It
is assumed that a 20% arcing fault on A phase shifts point A
away from the ground at point Y. During such an arcing fault,
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT 2333

Fig. 6. (a) Power system voltages during 20% resistive arcing fault. (b) Three-phase capacitive currents during 20% resistive arcing fault. (c) Fault current during
20% resistive arcing fault.

the voltage of phase A with respect to ground may change from
zero (bolted fault) to 20% of the line-to-neutral voltage, i.e.,
point A may jump between point Y and point G, as shown
in Fig. 5. Fig. 6(a) further clarifies the power system voltage
configuration changes during such an arcing fault.
Next, to determine the IR and IC components of the fault
current IF during arcing faults, Fig. 6(b) and (c) is included.
Fig. 6(b) shows all three-phase capacitive currents and resistive
currents, whereas Fig. 6(c) shows both the resistive and total
capacitive components of the fault current, including the total
2334 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011

fault current. This analysis is based upon the assumption that
this 20% resistive arcing fault is stationary and will not develop
dangerous transient overvoltage, considering that the condition
that IR is greater than or equal to IC is maintained. This
relationship of IR equal to IC is represented by (4) and (5) and
shown in Fig. 6(c).
This 20% arcing fault condition illustrates that the HRG
system criterion is maintained, i.e., IR IC , if we select the
resistor for a bolted fault condition with IR slightly higher than
IC . It is the authors opinion that many engineers have been
designing a neutral resistor for HRG power systems by using
IR to be 1.25IC as a rule of thumb to avoid dangerous over-
voltage during arcing faults. Equations (4) and (5) are derived
using vector diagrams shown in Figs. 5 and 6(a). From these
equations, it is concluded that the displacement of A and G with
respect to neutral for a 20% arcing fault will keep IR > IC and
thus will not lead to dangerous transient overvoltage conditions
IR = 0.8 p.u. = 0.8 3 ICO = 2.4 ICO (4)
where p.u. is the p.u. value 1 for IR under a bolted
lineground fault condition, which is 3ICO if the HRG system
is designed based upon the criterion of IR equal to IC . Using
the data shown in Fig. 6(a), the reduced value of IC in the case
of 20% arcing fault is as follows:
tan() = 0.866/(0.5 + 0.8) = 0.866/1.3 = 0.666
Length Y B = 0.8662 + 1.32 = 1.562
= tan (0.666) = 33.67
IC = [2 cos() 1.562 0.2] ICO = 2.4 ICO . (5)
prudent to set design criterion that fault current component
IR , which may be as high as 67%, is higher than IC during
bolted line-to-ground fault. Using this criterion, then during the
80% arcing fault, IR will become equal to ICO . This can be
illustrated by modifying (6) into (8) as follows:
IR = 0.2 p.u. = 1.67 0.6 ICO = 1.002 ICO . (8)
IV. HRG P OWER S YSTEM DAMAGE AT FAULT L OCATION
It has been proven that, if the HRG power system is grounded
through a resistor such that, during bolted line-to-ground fault,
IR IC , then a 60-Hz transient overvoltage on the power
system will not exceed more than 2.6 p.u.of the system voltage,
where the p.u. peak system voltage is 2/3 ELL ; see [15,
Fig. 2]. It should be noted that, during lineground fault tests
on an HRG generator rated at 27 kV, transient current up to
2.31 kA at 8.7 kHz was observed, indicating peaks of high
frequency transient currents at the fault location; however, p.u.
voltage on the healthy phases was close to 2.37 p.u. [16]. Many
HRG generators use a distribution transformer with a secondary
resistor or resonant grounded system instead of a resistance
grounded system [17]. A detailed discussion of such HRG
generator systems is beyond the scope of this paper [15][18].
It should be stated that, for an HRG power system, the damage
at the fault location is described by (9), which is used for the
heat produced by the flow of current through a resistor

Damage = IF2 (t)RF dt (in watt seconds or joules) (9)

In this 20% arcing fault, the fault current component IR
becomes 80% of the IR value for a bolted ground fault, and
the total capacitive component IC is also reduced to 80% of
the total system charging current during the bolted ground fault
condition.
where the current (IF ), fault resistance (RF ), and fault clearing
time (t) are in amperes, ohms, and seconds, respectively.
To avoid performing integration which has been used to
represent higher current at the instant of fault (t+) and then
decreasing magnitude over time t, we can rewrite (9) as follows:

Damage = IF2 RF t (in watt seconds or joules) (10)

C. HRG Power System80% Arcing Fault on Phase A
The phase voltage and current vector diagrams for an 80%
arcing fault to ground on phase A are shown in Fig. 7(a)(c).
The IR and IC components of the fault current for 80% arcing
fault condition are represented by (6) and (7). Both (6) and (7)
are derived using Figs. 5 and 7(a)
IR = 0.2 p.u. = 0.2 3 ICO = 0.6 ICO (6)
tan() = 0.866/(0.5 + 0.2) = 0.866/0.7 = 1.2371
Length XB = (0.8662 + 0.72 ) = 1.1136
= tan (1.2371) = 51.049
IC = [2 cos() 1.1136 0.8] ICO = 0.599 ICO .
(7)
From (6) and (7), for an 80% resistive arcing fault condition,
IR is equal to IC but reduced to 20% magnitude which is
the same as that during bolted lineground fault and will not
develop dangerous transient overvoltage on the system. The
aforementioned analysis proves that both IR and IC decrease
equally when we consider arcing faults varying from 20% to
80% arcing fault conditions. For an HRG power system, it is
where IF is now steady rms current in amperes instead of a
time-varying current.
Arc voltage drop (EARC ) will be IF RF . This is one concept
of understanding that the arc voltage has a linear relationship
between the arc current and arc resistance. Much research is un-
derway to understand the behavior of the arc, arc voltage drop,
and arc resistance. The purpose of this paper is to understand
the heat generated by the arcing fault at the fault location and
not to establish that this is the only way to represent the arcing
fault and arc voltage drop. The heat generated at the arc may be
represented by the modification of (10) to (11) using arc voltage
drop as follows:
Damage = EARC IF t (in watt seconds or joules). (11)
Therefore, for a theoretical bolted fault condition with a zero
fault resistance, (9)(11) represent practically zero damage at
fault location (although there may be a trace of discoloring on
the enclosure at the fault location). All of the energy of the fault
will dissipate as heat inside the neutral resistor. This conclusion
is based upon the theory that the fault remains a line-to-ground
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT 2335

Fig. 7. (a) Power system voltages during 80% resistive arcing fault. (b) Three-phase capacitive current during 80% resistive arcing fault. (c) Fault current during
80% resistive arcing fault.

fault. Under actual fault conditions, however, it is uncertain left grounded by a bolted grounding jumper. This suggests that
whether there are bolted line-to-ground faults. An exception there will be some fault impedance and some damage at the
to this occurs where the system is energized with one phase fault location under an actual bolted line-to-ground fault.
2336 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011
TABLE I
A RCING FAULT DAMAGE IN p.u. ON AN HRG P OWER S YSTEM D ESIGNED
U SING IR = 1.67IC C RITERION , I NSTEAD OF U SING IR = IC OR
IR = 1.25IC C RITERION
For analysis purposes on MV arcing lineground faults with
resistive arc, we will consider arc voltage drop from 20% to
80% of the system voltage [12], [13]. The resistive arcing faults
at both of these extremes, i.e., 20% and 80%, were discussed
at length earlier. It is uncertain whether only the resistive arc
is the actual arcing fault condition or if, instead, it may just
be one specific arcing fault condition. We discussed the HRG
power system to reduce line-to-ground fault current but are still
uncertain about the transient overvoltage due to power system
dynamics as well as the system charging current interacting
with certain system inductance during arcing ground faults.
For every ground fault condition, if we trip the power system
without any intentional time delay, then the risk of damage
due to arcing ground faults and faults involving other phases
is reduced.
For an HRG power system, under the arcing fault conditions
discussed, we noticed reduction in both components IR and IC
and the fault current IF . The total fault energy (damage at fault
location) may be estimated by any of (9)(11). Similarly, the
heat generated inside the neutral resistor can be estimated by
(9) or (10).
Using the criterion of IR equal to 1.67 IC during bolted line-
to-ground fault condition, the resistor RN value can be derived
as follows:
IR = 1.67 IC = ELN /RN (12)
RN = ELN /1.67 IC . (13)
Using RN derived by (13), Table I provides fault damage and
heat developed inside the neutral resistor in p.u. for varying re-
sistive arc voltage drop EARC . This EARC is shown in Table I,
column C1. The reduced current through RN during arcing
faults will become [(ELN EARC )/ELN ] (IR ), where IR
is the current under the bolted line-to-ground fault condition.
This reduced IR is shown in column C2. The corresponding
reduced IC is shown in column C3, and the fault current is
shown in column C4. Columns C5 and C6 indicate the heat
developed at the fault location and inside the RN , respectively.
The column C7 value is the sum of values indicated in columns
C5 and C6.
Assuming that we have an 11.0-kV power system with a
system charging current of 15 A and the ground fault clearing
time is 0.15 s, then the total heat generated may be calculated
using the following:
T otal Heat = (EARC ) (IF )(t) + (ELN EARC ) (IR )(t).
(14)
Using (14), for a bolted fault condition and for a 20% arcing
fault condition, the total heat will be 23.86 and 19.94 kJ,
respectively. The same results can be obtained by applying
a multiplication factor of 14.28975 (0.15 15 11/ 3) to
the p.u. values indicated in column C7 of Table I. The same
multiplication factor can provide results to any of the values in
columns C5 and C6. The damage at the fault location seems
to be the highest for a 50% arcing fault, as seen in Table I,
column C5. These theoretical data need validation by actual
test data.
The fault energy versus the fault damage at the fault location
in terms of such effects as spit marks, smoke marks, puncture
insulation, etc., is described in [14] and may be used with actual
calculated energy at the fault locations using Table I. It should
be stated that the results in Table I are based upon the stationary
faults (i.e., persistent arc fault current at the system frequency).
Some new insights on test results on intermittent line-to-
ground fault current in the generator stator windings seem to
contain some high frequency current [16]. Practical knowledge
of such intermittent arcing fault energy in the case of HRG
system requires further research and is beyond the scope of
this paper.
The following questions will aid in selecting the proper RN
value and setting the ground fault relay pickup in the case of an
HRG power system.
1) For the selected value of RN based upon the system
charging current IC , do we expect transient overvoltage
condition during the arcing ground fault condition? The
answer is no, if we select RN based upon the criterion
of designing HRG system where IR IC for a bolted
lineground fault condition.
2) For an HRG power system designed based upon the
criterion of IR = IC during bolted lineground fault and
having IC of 10 A, it is noted that the fault current may
vary anywhere from 14.2 to 2.84 A, whereas the neutral
ground relay will see the change of current from 10 A in
the case of a bolted fault to 2.0 A in the case of an 80%
arcing fault. This example indicates that the ground fault
relay should be sensitive and its pickup should be set at
20% of the maximum expected bolted phase-to-ground
fault current without any time delays for the MV power
system.
V. P OWER S YSTEM C HARGING
C URRENT M EASURING M ETHODS
Methods 1 and 2 have been described in the published
literature but may not be suitable as discussed hereinafter.
Method 1Use an Isolated Variable 120-V Power Source
at the Power System Transformer Neutral [1]: This method
is based upon the concept that, under an energized system,
the system charging current may be obtained if the system
neutral is offset from the ground by injecting LV from an
ungrounded power source, as shown in Fig. 8(a). Fig. 8(b)
shows an electrical equivalent circuit of the injected variable
voltage at the system neutral to facilitate recording of corre-
sponding variable current through the parallel capacitances of
the three phases. When a graph, as shown in Fig. 8(c), indicates
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT
Fig. 8. (a) Use isolated variable voltage at the power system neutral. (b) Equivalent electrical circuit of (a). (c) Derivation of (k) which is (XCO /3).
that the ratio k has become constant, then it represents that
the injected voltage has displaced system neutral away from
ground and current flow through the parallel capacitances has
reached its maximum value to represent the effect of parallel
capacitance to ground. This ratio k then represents the total
system capacitance reactance (XCO /3), which is one-third the
line-to-ground capacitance reactance XCO of each phase. This
capacitance reactance value then will be used to derive the
system charging current by using (15).
This method requires that the entire power system be ener-
gized by closing the secondary breaker and 120 V be injected
by an ungrounded power source. This method can be used for
2337
both the LV and MV as the injected voltage need not be high
but of sufficient magnitude to reach the level of developing
a linear relationship between voltage and current. Since the
phase angle relationship of this injected voltage to any of the
system phase-to-neutral voltage is not known, thus, to avoid
system overvoltage conditions, the injected voltage should not
exceed 25% of the lineneutral system voltage, particularly
in the case of LV systems [2]. This testing can be achieved
by keeping the fused load-interrupter switch in Fig. 8(a) in
an open position initially. There should be no voltage in the
measuring circuit when the fused load-interrupter switch is
closed, which can be achieved by keeping the autotransformer
2338 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011
Fig. 9. Ungrounded power system, use a variable resistor to ground one phase.
initially at zero secondary voltage. Then, the voltage can be
gradually increased by carefully moving the potentiometer and
keeping note of the applied voltage and current flow through the
circuit until the ratio of voltage to current becomes constant,
as shown in the graph in Fig. 8(c). The constant k deter-
mined from this graph then can provide the system charging
current by
IC = ELN /k = 3(ELN /XCO ) = 3ICO .
This method requires several recordings of both the voltages
and currents to determine the linear relationship between the
two, which may pose danger to the LV equipment in the
presence of MV system as the system is fully energized. This
method has been used in actual measurements [1], [2]; however,
why this test voltage must be less than exactly 25% system
lineneutral voltage indicated in [2] cannot be explained in
this paper. The authors were also able to contact Baldwin
Bridger [1] before the paper presentation at the conference.
Baldy reviewed the paper with great interest and indicated this
method as a scientific wild guess.
A similar method was used on a 13.8-kV power distribution
system with the addition of a single-phase transformer to the
autotransformer shown in Fig. 8(a) and a neutral grounding
resistor (NGR) to simulate an injected voltage of 8 kV to match
with system lineneutral voltage. Since the NGR was included
in the circuit, the precaution of injected voltage not to exceed
25% was not a concern; however, to avoid ferroresonance
conditions, a loading resistor on potential transformer (PT)
secondary was used [12], [13].
Method 2Use a Bolted Connection of One Phase to Ground
With a Variable Resistor: This method appears to work in
theory, as shown in Fig. 2 and (2), particularly for LV systems.
To simulate this condition, the equipment shown in Fig. 9 is
suggested. As the system is ungrounded, this method may pose
danger to both the equipment and the personnel involved in
testing, as the resistor needs to change gradually until there
(15)
is no resistance in the circuit. Dangerous transient overvoltage
may occur as the power system is ungrounded [3], particularly
in the case of MV systems with higher system charging current
and higher voltage. Perhaps, to minimize such transient over-
voltages, [2, Section 3.52] describes the total resistor rating to
be 2 (XCO /3) rated at 60 s for a 2.4-kV system. Additional
analysis is required to assure that testing is safe, particularly
when the effect of sequential reduction of resistors on arcing
during testing is not known. Although, in [10], this method was
used on 2.4 kV, the authors think that such a method should not
be used without further analysis of the complete power system
for higher voltage systems with high system charging cur-
rents such as on cold-ironing projects requiring 6.6- or 11-kV
voltages.
Method 3Bolted Connection of One Phase to Ground
With a Fixed Resistor and a Contactor to Short the Resistor
Remotely: This method has some improvements over Method
2, as the remote operation of the switching device, such as a
contactor rated for the line-to-line system voltage, can short-
circuit the resistor quickly to simulate bolted line-to-ground
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT
Fig. 10. Ungrounded power system with a fixed resistor and a contactor to short the resistor from remote.
fault to make a direct recording of the system charging current,
as shown in Fig. 10. Problems discussed for Method 2 still
apply to this method. The effects of the dynamic nature of the
power system and its voltage swings at the instant of performing
test are unclear and may pose danger during testing.
Method 4Use an NGR With Appropriate Taps and Equip-
ment for Making a Bolted Ground Fault on a Phase: This
method provides the assurance of not having dangerous tran-
sient overvoltage as measurements are conducted on a grounded
power system. Using high-accuracy current sensors, measure-
ments of the fault current IF through the grounded phase and
the fault current IR through the NGR circuit, as shown in
Fig. 11, are needed. The total system charging current IC then
can be obtained by using

2 
IC = IF IR
2
. (16)
Take three sets of readings by changing the resistor tap: Tap
1 (IF 1 , IR1 ), Tap 2 (IF 2 , IR2 ), and Tap 3 (IF 3 , IR3 ). For safety
reasons, the entire power system should be de-energized, the ca-
ble capacitance should be discharged after taking measurements
at the first tap, and then the system should be re-energized to
take measurements at different resistor taps. The average of the
three values will provide system charging current.
The resistor taps should provide IR greater than IC at each
tap to avoid the concern of transient overvoltage. If a particular
power system is expected to have unequal system capacitance
to ground due to its installation configuration, then tests may
be performed on each phase. This will provide a total of
either three or nine readings depending upon performing either
one or three measurements on each phase, and the average
2339
value of these readings will provide the total system charging
current.
Fig. 12 shows a system charging current recorder consisting
of a microprocessor unit to be developed based upon the
criteria of (16). This new smart portable unit will consist of
a minimum of two low-pass filters, analog-to-digital converter,
programmable logic controller, storage, dc power supplies, dig-
ital display, and an ON/OFF feature; see Fig. 13 for schematics
of these internal components.
Method 5Ungrounded Delta-Connected Power System
Without a Power System Neutral Requiring HRG Grounding
Equipment [7]: There are two alternative schemes to provide a
derived neutral for grounding purposes [2], [6], [8]. Method 5A
listed in Table II is to use three single-phase transformers rated
at lineline primary and 120-V secondary with connections
as shown in Fig. 14. The size of resistor R is based upon
an estimation of IC and using the criterion IR IC during
bolted lineground fault. The resistor R should have taps which
will meet the criterion of IR IC for a bolted lineground
fault. By using a variable voltage source on the secondary,
change the voltage, and when the voltage is close to 200 V
(3 times the rated secondary voltage of the single phase trans-
formers), and the resistor tap is set at IR = IC , then the
system charging current will be the measured primary current.
Power system dynamic swings at the instant of performing
measurements and coupling of variable voltage to the system
voltage are a concern. For safety reasons explained in Method 1,
in Method 5A, an injected voltage should not exceed 25%
of the lineneutral rated voltage of the equipment set that
makes driving neutral. Method 5B listed in Table II is to use
a zigzag transformer [8], [10] with a suitable tapped resistor
2340 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011

Fig. 11. NGR with appropriate taps and a fixed resistor and a contactor to short the resistor from remote.

upon the authors opinion that several readings of voltages and

currents are required to make the time duration of the test
longer, during which time the dynamic nature of the power
system may interfere with the test setup.

VI. C ONCLUSION AND R ECOMMENDATIONS

drawn for this paper.
Fig. 12. Power system charging current recorder.
at the neutral meeting the HRG criterion IR IC . Then, the
measurements can be performed similar to the one described for
Method 4.
Based upon the merits listed in Table II, Method 4 for the
wye-connected power systems, including derived neutral sys-
tems, and Method 5B (using a zigzag transformer) for the delta-
connected systems are recommended. Methods 2 and 3 may
endanger the power system itself due to transient overvoltages
and possible ferroresonance conditions unless proper analysis
is conducted in determining resistor values needed in the circuit
[2] to consider this a safe method for MV systems. Methods 1
and 5A may pose danger due to coupling of injected voltage
with power system voltages unless the injected voltage is kept
less than 25% of the lineneutral system voltage. It is based
The following conclusions and recommendations can be
1) Resistive arcing faults in an HRG power system and the
associated damage are discussed. Analysis indicates that
both IR and IC decrease equally in magnitude and the
design criterion of an HRG method, i.e., IR IC , is
maintained during arcing faults if NGR is selected based
upon the criterion of IR IC under a bolted line-to-
ground fault condition.
2) For a quick estimation of fault damage during arcing
faults, this paper includes a table for an HRG power
system designed using IR = 1.67IC criterion. This table
can be modified to suit any criteria such as IR = IC
or IR = 1.25IC for estimation of damage during arcing
fault.
3) MV HRG power systems [4][6] should use a combina-
tion of a sensitive microprocessor ground fault relay and a
high-accuracy low-ratio CT with a pickup setting of 20%
of IR without any time delay. This may lead to minimum
damage at a fault location based upon the assumption that
PAUL et al.: A NOVEL METHOD OF MEASURING INHERENT POWER SYSTEM CHARGING CURRENT 2341

Fig. 13. Internal components of a system charging current recorder.

TABLE II
C OMPARISON OF VARIOUS M ETHODS OF M EASURING
S YSTEM C HARGING C URRENT

the tripping of the power system occurred when the fault

remained line-to-ground fault.
4) From the arcing fault discussion of an HRG power sys-
tem, it is clear that the damage is directly proportional to
the system voltage (ELN ), the fault current (IF ), and
the fault clearing time (t). For a particular system, both
ELN and IC are fixed, and the IF also has a maximum
upper limit in the case of a bolted fault. Thus, the only
parameter to minimize damage is to reduce the fault clear-
ing time (t). Hence, to minimize damage, particularly for
the MV systems with higher system charging current and
Fig. 14. Delta-connected power system charging current.
higher system voltage, the fault clearing time should be
as low as practical.
5) Designing HRG power systems based upon the criterion
of IR 1.25IC will accommodate future changes to
a power system which may increase the total system
charging, and NGR need not be changed. This paper has
2342 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 47, NO. 6, NOVEMBER/DECEMBER 2011
presented an analysis indicating that the fault damage
may not necessarily increase with the slight increase of
NRG current rating which is higher than system charging
current, as it depends upon fault impedance. Maximum
fault damage occurs when the fault resistance is such
that voltage drop across the fault resistance is one-half
the system voltage, as shown in Table II. Probability
and sensitivity analysis of NGR rating which is higher
than the system charging current versus fault damage,
taking into consideration the ground fault relay tripping
time affected by fault impedance, should be performed to
optimize NGR current rating.
6) A new novel method of measuring system charging
without using variable voltage source while keeping the
power grounded is considered safer, particularly for MV
systems. Direct digital reading is possible with the de-
velopment of a device based upon the concept shown in
Fig. 13.
ACKNOWLEDGMENT
The authors would like to thank B. Chavdarian with the Port
of Long Beach, who requested to review the existing literature
for measuring the inherent system charging current of medium-
voltage power systems, which resulted in this paper.
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[3] D. D. Ship and F. J. Angelini, Characteristics of Different Power Systems
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Dev Paul (M73SM90) received the M.S. degree
in electrical engineering from Punjab University,
Chandigarh, India, in 1971.
In 1972, he joined Kaiser Engineers which went
through merging with other design engineering com-
panies, and it is currently AECOM, Oakland, CA. As
a Design Engineer, he worked on a variety of heavy
industrial, Department of Defense, and Department
of Energy facilities and commercial and electrified
rapid transit projects. He is currently the Senior
Project Director with the Transportation Division,
AECOM, where he is responsible for electrical work related to cold-ironing
projects, airport projects, and ac/dc rail transit projects. He is the author of 20
technical papers which have been published in American Public Transportation
Association (APTA) and IEEE conferences proceedings.
Mr. Paul was a recipient of the Ralph H. Lee Award from the IEEE for
his paper on dc power systems grounding in 2002. He is the Vice-Chair of
Draft IEEE/ISO/IEC Standard P1713 on shore power connections to ships
and the Chairperson of Draft IEEE Standard P1627, Standard for Grounding
Practices for DC Electrification OCS Including Application of Lightning Surge
Arresters. He is an active member of many IEEE committees responsible for
upgrading color book series into mother books. In the past, he served as a Vice-
Chair for the IEEE Industry Applications Society (IAS) Oakland Chapter.
Peter E. Sutherland (S77M79SM97F07) re-
ceived the A.S. degree in electrical engineering tech-
nology and the B.S. degree in electrical engineering
from The University of Maine, Orono, the M.Sc.E.
degree in electrical engineering from the University
of New Brunswick, Fredericton, NB, Canada, and
the Ph.D. degree in electric power engineering from
Rensselaer Polytechnic Institute, Troy, NY.
In 1987, he joined General Electric (GE) Com-
pany, Schenectady, NY, where he held a variety of
positions, such as Senior Engineer in the GE Power
Systems Energy Consulting Department. In 2001, he joined Super Power,
Inc., Schenectady, where he worked on applications of superconductivity to
electric power systems. In 2003, he joined EPRI, Schenectady, as a Consulting
Engineer. Since 2005, he has been a Lead Power Systems Engineer with GE
Energy Services, Schenectady. He is the author of numerous technical papers.
Dr. Sutherland is a member of Phi Kappa Phi, Eta Kappa Nu, and Tau Beta
Pi. He is a Registered Professional Engineer in Pennsylvania, New Jersey,
Maine, and New York and a Certified Energy Engineer. He is active in the IEEE
Industry Applications Society and in the IEEE Schenectady Section.
Sergio A. R. Panetta (SM04) received the B.Eng.
and M.Eng. degrees in electrical and electronics en-
gineering from McMaster University, Hamilton, ON,
Canada, in 1983 and 1996, respectively.
Since graduation, he has been employed in the
power and relay protection field. He is currently with
I-GARD Corporation, Mississauga, ON.
Mr. Panetta is a member of the Association of
Professional Engineers of Ontario. He is active in
several committees for Under Laborites, compliance
safety appliance, IEEE, and International Electro-
technical Commission (IEC).