Risks and Opportunities of Pb-free Solder Terminals

and Packaging for Processability at Elevated Temperatures

Dr.Friedrich-Wilhelm Wulfert
Freescale Halbleiter Deutschland GmbH
EMEA Quality Technologies & Standards
Schatzbogen 7, 81829 Mnchen, Germany
friedrich.w.wulfert@freescale.com
tel: *49-(0)89-92103-470, fax: *49-(0)89-92103-610

Introduction
The European Directives WEEE (1), RoHS (2) and ELV (3) challenge the whole industry into
major effort for environmental improvement actions. In meeting the directives the
semiconductor manufacturers will contribute their share to a sustainable world by adjusting
their materials and processes in their production lines. Obligations are to deliver products
compliant with legal regulations and to satisfy customers green expectations all along the
value chain. Development and implementation have to take advantage of state-of-the-art
materials and processes while carefully considering the related technical and commercial
aspects. As Pb-free soldering processes require higher temperatures than the conventional
SnPb soldering, tremendous work is put into components readiness for adequate processability
during board soldering. This is expressed by an improved Resistance against Soldering Heat
(RaSH) and superior Moisture Level Sensitivity (MSL) for real life Package Peak
Temperatures (PPT). Environmental goals and robust packages of integrated circuits are
achieved by development and introduction of new materials and processes.

Environmentally Preferred Products

Legislation is banning the use of Pb, Cd, Hg, Cr-VI and polybrominated biphenyle (PBB) as
well as diphenylether (PBDE) in production. Thus the semiconductor industry has to eliminate
Pb from terminal solder finishes, Br (and pro-actively also Sb) from mold compounds and
substrate boards where glycolether has to be removed out of the solder mask layer, too. New
materials are being introduced to cope with the elevated process temperatures.

Freescale Semiconductor formerly named Motorola, Inc.s Semiconductor Products Sector

(SPS) actively supports the need for environmentally safe products,
http://www.freescale.com/greenproducts . Freescale Semiconductor has an Environmentally
Preferred Product (EPP) program to help ensure to meet customer and legislative requirements.

The Freescale Semiconductor EPP development program includes:

Review of current product portfolio for compliance to high-temperature soldering
processes (245C260C) needed to facilitate the use of Pb (lead)-free solder.
Implementation of robust Pb-free plating finishes across multiple factories and
subcontractors
Qualification of Pb-free solder balls for area array packages
Implementation of Pb-free solder balls for flip-chip packages
Evaluation of Br-free encapsulants and organic substrates
Incorporation of Pb-free terminations and high-temperature reflow capability into
new product designs

Freescale Semiconductor GmbH EMEA Quality 1/17 FWW, September 2004

Processability of Integrated Circuits
The JEDEC/IPC Joint Standard J-STD-020 (4) is a free standard and with Pb-free
appearing on the horizon it belongs to the most frequently visited and downloaded documents
from http://www.jedec.org. This standard takes care of the reliable processing of moisture
sensitive surface mount components and has to be followed to maintain package integrity of
components during heat exposure of board soldering.

The relevant temperature is measured at the top of the parts and is defined as Package Peak
Temperature (PPT). This package temperature is often also named Peak Reflow Temperature
(PRT) which because of the reflow in the technical term can be (and has been) misleading
to take the temperature in the solderjoint where the material reflow happens. It is important to
note that the package temperature is the reference temperature for the parts Moisture
Sensitivity Level (MSL) and it must not be confused with the solder joint reflow
temperature. The MSL reflects the robustness of semiconductor components for board
soldering and tells how long the parts are allowed to be exposed to a controlled environment
before it is necessary to dry-bake them again before any soldering step. Absorption of water
has to be kept at a tolerable level so that no pop-corn effects compromise parts reliable
performance later on. Table 1 is a partial list of J-STD-020B MSL categories showing
simulation and processing rules for correct storage and handling prior to soldering. The
standard is important for double-sided reflow, i.e. for top- and bottom-side board assemblies
where it is mandatory to prevent excess moisture take-up of the plastic components during
storage before they will see a second exposure to soldering heat. This advice of best-practice is
also applicable for re-work, service and repair soldering.

Moisture Dry- Floor Lif e

Sensitivity Packing
Level (MSL) Required Time Conditions

1 NO unlimited </= 30C/85%RH

2 YES 1 year </= 30C/60%RH
2a YES 4 weeks </= 30C/60%RH
3 YES 168 hours </= 30C/60%RH
4 YES 72 hours </= 30C/60%RH
5 YES 48 hours </= 30C/60%RH
5a YES 24 hours </= 30C/60%RH
6 YES Time on Label </= 30C/60%RH
(TOL)
Table 1: Moisture Sensitivity Levels per J-STD-020C

As indicated above, the technical justification for this J-STD-020 standard and its importance
for the industry is based upon the inherent behaviour of components where plastics are used for
encapsulation, glue, seal or underfill which all absorb more or less water at slower or faster
speed. Existing voids and gaps fill with water, in addition the material properties change and
the adhesion at interfaces is weakened.

Freescale Semiconductor GmbH EMEA Quality 2/17 FWW, September 2004

During soldering the different thermal expansion coefficients of the package materials result in
thermo-mechanical stress that can exceed the adhesion and cohesion limits. These forces
together with the pressure of superboiling water steam can result in delamination and cracks. In
the best case scenario the failures occur directly after soldering and for example then are
found to be due to lifted 1st or 2nd wire bonds or due to sheared bond wires. However and more
annoying are latent or intermittent failures as result of the reduced package integrity.
Delamination at the top of the chip surface or at the bottom of the leadframe can cause chip
overheating as the thermal resistance is increased. Imperfect package integrity thus can lead to
ingress of moisture and contamination which together can cause corrosive attack with all of its
states from leakage to opens.

There is a conflict of interest between good solder joint formation of hot and fast soldering and
maintenance of good package integrity by keeping the package temperature low and also by
using slow temperature gradients. This basic problem is getting into the foreground again with
required minimum solder joint temperatures of 225C - 235C for Pb-free SnAgCu solders
which have liquidus between 221C - 227C. That is higher than the usual solder joint
temperatures of nearly eutectic SnPb solders with 205C - 220C whith the liquidus between
183C - 210C. Now it is paramount to take note of the fact that board assemblies use a mix of
package types of different materials and dimensions which results in a spread of thermal mass
and heat conduction on the boards. Uneven heat distribution plus oven and process tolerances
are reflected by a delta-T on the various boards ranging in size, component size, arrangement
and density. Detailed investigations were performed to characterize the thermal conditions at
components during reflow soldering where the process window is narrowed for Pb-free (5).
Figure 1 shows the relevant temperatures and where to measure them for a reliable board
production.

Package Peak Temperature (PPT)

as measured at the top package surface
PPT 2
PPT 1

SJT 1 Solder Joint Temperature (SJT) SJT 2

as measured in the solderjoint

Figure 1: Solder Joint Temperature and Package Peak Temperature have to be determined for
critical components on the boards. In production the minimum SJT has to be reached and the
maximum PPT must not be exceeded for any component on the printed circuit board.

A rule-of-thumb says Small components get hotter than large parts. However, looking into
this with more detail one recognizes that the component temperature is more ruled by its
materials effective thermal mass of leadframe and plastic volumes and also the thermal
conduction of the components to the board is more important than simply the parts outside
dimension. It is obvious that externally similar components can exhibit a totally different
thermal behaviour when heatsinks are embedded and/or exposed to the outside when compared
to standard surface mount devices.

Freescale Semiconductor GmbH EMEA Quality 3/17 FWW, September 2004

Table 2 outlines the changed thermal stress scenario on the package bodies during the
conventional SnPb process compared to Pb-free soldering. The shown temperature classes base
upon J-STD-020C and depend on package volumes and thicknesses giving guidelines for
product classification which, however, should be verified in the real board production
environment to prevent excess package temperatures can affect parts mechanical integrity.

SnPb Eutectic Process - Package Peak Temperature

Pb-free Process - Package Peak Temperature

Table 2: Package Peak Temperature (PPT) of surface mount devices.

MSL/PPT is a product characteristic. Freescale Semiconductor is determining the Moisture

Sensitivity Level of the components using the Package Peak Temperature Profile (Figure 2) as
measured with a thermo couple at the package top surface. This profile builds on JEDEC/IPC
J-STD-020C and reflects several customers requirements and their production processes
which were evaluated for standardization.
Time within 5C of Peak Target
20-40 sec. Pb-free, small 30 sec small Peak (large/small)
20 sec small& Pb
10-30 sec. Pb-free, large 245C/260C Pb-free
Target
2.2C/ sec. Minimum. 10-30 sec. SnPb 225C/245C SnPb
250 183C or 217C to peak

3C/sec. Max. Ramp

183C or 217C to peak
200
Temperature (C)

Target 75 sec

150
90 to 180 sec. 60-90 sec.
Target 2C/sec. 150C to 200C >217C Pb-free
>183C SnPb
100 Target 130 sec

3C/sec. Max. Ramp Thermal couple 6C/sec. Max.

50C to 120C on package body
50

0
25 50 75 100 125 150 175 200 225 250
Time (seconds)

Picture 2: Package Peak Temperature (PPT) profile for determination of components

Moisture Sensitivity Level (MSL) and the parts processability per J-STD-020
including customer board soldering requirements.

Freescale Semiconductor GmbH EMEA Quality 4/17 FWW, September 2004

Development towards Pb-free
There are 3 activities in the development process to reduce Pb from electronic components or
systems:
- Activity 1 is the evaluation of moisture performance in applications of Pb-free
solders requiring high temperature soldering for customer board assembly.
Evaluations are performed on existing Pb-bearing components to validate moisture
sensitivity levels at the higher reflow temperatures based on customer request.
- Activity 2 is the evaluation of Pb-free terminals and terminal plating finishes for
components. Evaluations are performed on Pb-free components to validate reliability
of Pb-free plating finishes for Peripheral Packages and Pb-free spheres for Area Array
Packages. Pb-free packages must also be compliant to the new high temperature reflow
moisture sensitivity levels (MSL) conditions.
- Activity 3 is the development of solutions to Pb reduction to the flip chip packages and
to evaluate high temperature die attach soldering solutions for power packages that
require high thermal conductivity heat sinks integral to the package.

Pb-free component terminals and MSL/PPT

Future plating finishes on the external pins of the leadframe or the solder balls of integrated
circuits will be Pb-free. The lead finish is dependent on product, assembly site and package
type. In order to be classified as Pb-free, the component will have a Pb-free finish and will
be high temperature reflow capable with a minimum processability of MSL3/245C for large
components respectively MSL3/260C for small units. For component size classifications
refer to J-STD-020 (latest version).

Freescale Semiconductor developed matte tin (Sn) and tin bismuth (SnBi) as Sn-based and Pb-
free plating finishes besides the already long existing and marketed option of nickel palladium
(NiPd) or nickel palladium gold (NiPdAu) for its leadframe product. The solderability of Pb-
free finishes is inferior to conventional SnPb, however, it satisfies standard requirements of
wettability and also of nowadays board production (8). Freescale will focus on matte Sn for
electroplating of Cu leadframe devices. Still required Alloy42 leadframe parts have to be
converted to Cu leadframes (6) and customers are asked to express their future needs of such
Alloy42 based legacy parts. In course of the necessary changes new mold compounds will be
evaluated and introduced for appropriate MSL/PPT performance of the product. The goal of
MSL1/260C for parts processability will not always be possible for older generation
components.

Area array packages will have Sn4.0Ag0.5Cu solder spheres (7) and will be manufactured with
a processability goal of at least MSL3/245C. They usually belong to the large component
category in J-STD-020. The directive allows high-Pb solders greater than 85% and is based
upon technical justification. This applies to high-Pb content solders for which there is no
technological or cost effective solution. Flip-chip BGA will be available with Pb-free solder
balls for external soldering, however, it will continue to have its high content Pb internal
bumps. Heat Sink Small Outline Packages (HSOP) or other thermally enhanced components
with exposed heat sinks (TEQFP, TEQFN) for better power dissipation will continue or even
change to high-Pb solder die attach now, in order to establish a hierarchy from inside to outside
solder melting points of internally high and externally lower liquidus temperatures or ranges.

Modern mold compounds do not use Br- or Sb-formulars anymore for flame retardents since
there are new halogen-free solutions. Other new additives are of aromatic nature and help to
become compliant with environmental and safety regulations. The new materials have to be

Freescale Semiconductor GmbH EMEA Quality 5/17 FWW, September 2004

evaluated for effectiveness in accident and also their chemical stability during normal
operation. No short-term or long-term reactions between package and chip materials are
allowed in production, assembly and use of the components in their field application. For
improved package integrity there are additional cleaning steps in evaluation where plasma or
UV-ozone are applied prior to wire bonding and/or molding. The intent is to create fresh and
clean surfaces, to reduce the contamination level of foreign or residual elements at the
interfaces where different materials are brought together and expected to adhere and connect
for a reliable life. Thus the extrinsic thermo-mechanical stress during components use is
addressed by an improved intrinsic robustness of the interfaces.

Board Soldering with Pb-free Components

During the change-over from conventional SnPb to the coming Pb-free board soldering not all
components will be available with the required solder finish. There will be conventional SnPb
parts on Pb-free boards and already converted Pb-free components will land on printed circuit
boards which are still run through traditional SnPb soldering processes.

Attention is required when soldering SnPb components under Pb-free conditions that the parts
MSL/PPT is adequate. Dry-baking prior to soldering might be necessary. SnPb solders melt
without problems in both air and nitrogen atmospheres of Pb-free solder ovens and at normal
Pb-free temperatures.

Pb-free leadframe parts can be put on boards with SnPb solders and no changes have to be
done to the SnPb process. The SnPb solder finish or paste on the board and/or from the wave
rule the solder system and are not influenced by the minute amount of Pb-free solder on the
leads. Good solder joints form, the component reliability is unaffected when its MSL/PPT was
followed during the board soldering and related handling.

The situation is different when soldering Pb-free solder balls of BGAs on to boards with SnPb
solder paste. Care to completely melt and mix of both solders has to be taken where now the
large volume of the solder balls determines the necessary temperatures and soldering kinetics.
The process is well set when the dual collapse of the BGA towards the board can be
observed, the BGA has to sink into the paste and further moves towards the board when the
solder balls melt. Then enough time has to be given to the molten solders to form a
homogeneous connection. Experience shows that solder joint temperatures of >225C yield
good and reliable solder joints between SnPb pastes and SnAgCu balls. That is higher than at
the upper end of the normally established 205C - 220C in the joints of SnPb soldering. The
conditional up- and downwards compatibility and related areas for required special attention
are sketched in Figure 3.

SnPb Terminal Conventional SnPb Solder Board

Component Attach Process
OK, must set up profile to be >225C OK, components require robustness for higher
for array package solderjoint temperature package temperature compliance (MSL/PPT)

Pb-free Terminal SnAgCu Pb-free Solder

Component Pb-free Board Attach Process
Inhibit Bi and Pb contamination
in HighTemperature applications!

Figure 3: Conditional up- and downward compatiblity of Pb-free in SnPb and vice versa.

Freescale Semiconductor GmbH EMEA Quality 6/17 FWW, September 2004

Soldering of the Pb-free terminal components will typically require extensive changes to the
board assembly reflow profile. SnAgCu based solders have a melt temperature that is
approximately 40C higher than eutectic SnPb based solders. It is preferable that Pb-free parts
be soldered with solder pastes employing fluxes formulated for the associated higher process
temperatures.

Open solder joints and incomplete formation of the BGA-to-board solder interconnects can be
a result of too low solder joint temperatures (Figures 4a-b). The thermal flow from the heated
package through the solder ball towards the solder paste reservoir and vice versa must not be
hindered by local separation or flux interlayer build-up. In this context it is advised to take care
in the right choice of temperature stable fluxes that fit the thermal profile of the board
soldering process. Possible incompatibilities of flux materials have to be excluded. This is an
area where solder material suppliers need to share their experience with the user community.

Figure 4a: Open solder joints and incomplete formation of the interconnect at 203C.

Figure 4b: Complete wetting and good formation and mix of the SnPb paste and
SnAgCu solder from board and BGA.at solder joint temperatures of 225C.

Shown solder joint cross-sections are made after extended temperature cycling exercises far
beyond the acceptance criteria. Visible crack formation is not of interest for this section where
the focus is on the solder joint formation in the first place.

Freescale Semiconductor GmbH EMEA Quality 7/17 FWW, September 2004

When solder joints are well formed, then there is equivalence between SnPbAg-to-SnPb and
SnCuAg-to-SnPb and SnCuAg-to-SnAgCu (see later section on solderjoint reliability) with a
tendency for superior performance of Pb-free joints.

Careful inspection of solder joint cross-sections from interconnects that formed at different
solder joint temperatures disclose the progress of homogenisation with increasing temperatures,
Figure 5a-c.

203C 210C 225C

Figure 5a-c:: Increase of solder joint temperature leads to better mix and distribution of
Pb from the SnPb paste into the originally Pb-free SnAgCu solder ball
and the final homogenous solder interconnect.

Package Warpage
Large area packages are exposed to a thermo-mechanical phenomenon of package deformation
known as warpage. It is a result of the more or less unbalanced construction and arrangement
of material layers with not matching coefficients of thermal expansion (CTE).

Directly after production the parts are not necessarily perfectly flat as built-in package stress
finds relief in the described deformation. Thus the coplanarity of external leads can suffer
from deformed packages. PBGAs substrates can lift the attached solder balls away from the
solder plane on the board. This makes solder joint formation difficult or even prevents it totally,
(Figure 6a-d).

6a

6b 6c 6d
Figure 6a-d: Package warpage causes insufficient solder joint formation.
Heat transfer from the package and board into the solderjoint is hindered.
Package warpage is dynamic and changes with temperature, (Figure 7).

Freescale Semiconductor GmbH EMEA Quality 8/17 FWW, September 2004

 dz = -130um (5.12 mils)

260 Example shown:

388 PBGA Nitto HC100X2
EMC Package Flatness Baseline Convex on customer board
Performance to Pass Solderability
T e m p e r a t u r e [C]

Solderjoint Temperature
213C - 235C
195 dz = 80um (3.14 mils) Measured Moir
Peak Reflow Temperature
View is dead bug with solder balls removed. up to 255C
Temperature Profile shown is a reference
curve for illustration purposes only.

130 Concave
Concaveon
oncustomer
customerboard
board

Sn36Pb2Ag Solder Paste is liquid at 179C.

Sn4.0Ag0.5Cu Solder paste is liquid at approx. 225C

dz = 100um (3.93 mils) dz = 100um (3.93 mils)

65
Package Warpage
Criteria: 200m or 8mils
Goal: 150m or 6mils
Concave on customer board Concave on customer board
0
Time

Figure 7: During board soldering the deformation of the package and substrate (warpage)
changes with the temperature and reaches from a concave to a convex
arrangement of the solder balls or vice versa.

It has to be pointed out that the printed circuit board also changes its curvature during soldering
as same physics work there, too. Stabilization measures are recommended to support a
continuous contact for ongoing heat transfer between the package solder balls and the printed
paste on the boards. The effort will pay in good solder joint formation and better board yields.

Reliability of typical solder joints

Temperature cycling addresses performance and robustness of board-level solder joints.
Various combinations of packages with different solder finishes are reflow soldered using
conventional SnPb or the new Pb-free processing. During the thermal cycling stress the ohmic
resistance of daisy-chained solder interconnects is watched. Example Weibull graphs show
gathered results for the 64LQFP and the 132PQFP (Figure 8a-b). The conclusion is that the
lifetime of matte Sn solder finish leadframe devices is at least as good as those with
conventional SnPb plated leads no matter if soldered with SnPb or SnAgCu solder pastes on
the printed circuit boards.

Freescale Semiconductor GmbH EMEA Quality 9/17 FWW, September 2004

 Peripheral Device: Board Level Solder Joint Reliability, 64LPQFP
Both combinations, Finish - Solder
Sn finish in SnPb solder
% and SnPb - SnPb 1
Sn finish in SnAgCu solder
Sn - SnPb 2
P perform equal to or better
a than SnPb finish in SnPb solder.
SnPb - SnAgCu 3
c
k Board assembly with SnPb
Sn - SnAgCu 4
solder paste was performed at
a
the standard SnPb profile.
g 1) Current
e 220C reflow
s
2) Backward
F compatible
a 220C reflow
i
l Sn SnAgCu 4 3) Forward
e has no fails compatible
d as of 13407 cycles, 240C reflow
dashed line represents
4) Pb-free,
worst case estimation.
240C reflow

Number of Temperature Cycles -40C/125 C

Figure 8a: Board-Level Solder Joint Reliability of 64LQFP

Peripheral Device: Board Level Solder Joint Reliability, 132PQFP

Both combinations, Finish - Solder

Sn finish in SnPb solder
and Sn - SnPb 1
Sn finish in SnAgCu solder
perform
SnPb - SnPb 2
equal to or better than
SnPb finish in SnPb solder.
SnPb - SnAgCu 3
Sn - SnAgCu 4
Board assembly with SnPb
solder paste was performed
at the standard SnPb profile. 1) Current
220C reflow
2) Backward
compatible
220C reflow

Sn SnAgCu 4 3) Forward
has no fails compatible
as of 6961 cycles, high-temp reflow
dashed line represents 4) Pb-free,
worst case estimation. high-temp reflow

Figure 8b: Board-Level Solder Joint Reliability of 132PQFP

Freescale Semiconductor GmbH EMEA Quality 10/17 FWW, September 2004

Same equivalence as identified for peripheral packages and all solder material and process
combinations is found also for the soldering of area array packages. Acceptance citeria of
>2000 temperature cycles are fulfilled for such ball grid arrays (Figure 9a-b) as well.

Area Array Device: Board Level Solder Joint Reliability, PBGA388

Ball - Solder
SnPbAg - SnPb 1
SnAgCu - SnPb 2
SnPbAg - SnAgCu 3
SnAgCu - SnAgCu 4

1) Current
215C reflow
Both combinations, 2) Backward
SnAgCu ball in SnPb solder compatible
and 215C reflow
SnAgCu ball in SnAgCu solder
perform equal to or better 3) Forward
than SnPbAg finish in SnPb solder. compatible
high-temp reflow
Board assembly with SnPb
solder paste was performed at 4) Pb-free,
the standard SnPb profile. high-temp reflow

Figure 9a: Board-Level Solderjoint Reliability of PBGA388

Area Array Device: Board Level solder Joint Reliability, TBGA480

Both combinations, Ball - Solder

SnAgCu ball in SnPb solder SnPbAg - SnPb 1
and
SnAgCu ball in SnAgCu solder SnAgCu - SnPb 2
perform equal to or better
than SnPbAg finish in SnPb solder. SnPbAg - SnAgCu 3

Board assembly with SnPb SnAgCu - SnAgCu 4

solder paste was performed at
the standard SnPb profile. 1) Current
220C reflow
2) Backward
compatible
220C reflow
3) Forward
compatible
high-temp reflow
4) Pb-free,
high-temp reflow

Figure 9b: Board-Level Solderjoint Reliability of TBGA480

Freescale Semiconductor GmbH EMEA Quality 11/17 FWW, September 2004

Whisker Growth
Spontaneous Sn whisker growth (11 - 13) from plated Sn based solder finishes (Figures 10a-b)
is considered a risk by the aircraft and space industry (14, 15) but needs carefull review and
investigations also for other critical applications. There is a strong indication that mechanical
stress is the main reason for the extrusion of these crystalline needles or other formations on Sn
surfaces. Copper/tin intermetallics along Sn grain boundaries and originating from the diffused
Cu of the leadframe base material are suspect to be responsible for the stress that drives
whiskers (9, 13) from surface grains. The situation is different for Alloy42 leadframe material
where the thermal mismatch between the steel and the Sn solder plating is identified to
promote whisker growth (16, 17) from stressed grains in the solder finish.

Figure 10a: Figure 10b:

Whisker on a Sn surface. Whisker grown from SnPb surface.

The mechanisms for Sn whisker growth are not fully understood, yet. Figure 11 shows a
fishbone diagram detailing key influencing factors for the formation of Sn whiskers. A
combination of environment, materials, methods and equipment interact. Our investigations
found whiskers on all Sn-based solder finishes and sooner or later all surfaces of Sn, SnBi,
SnCu and also SnPb plated finishes exhibited more or less whiskers (10).

Environment Materials
> 10 m
Plating thickness
50 - 70C < 0.5 m
Temperature (>2%) Alloying < 1 m
> 150C Plating grain size
Brass, Zn 1 - 8 m
Humidity Base metal
Cu Intermetallic formation (Cu6Sn5)
External mechanical stress Surface oxidation
Tin
TinWhisker
Whisker
Organic Brightening Prevention
Prevention
Electroplating
Plating Process High current density plating baths
Ni Underplating Hot Dip
Annealing Physical imperfections caused in assembly

Methods Equipment
red = promotes whisker growth
green = prevents whisker growth

Figure 11: Influencing factors for whisker growth

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Storage in 60C/95%RH created whiskers on SnCu after only 3 weeks, it took about 7 weeks
for SnPb and 13 weeks for Sn and SnBi. The shortest whiskers were found on SnPb, followed
by Sn, SnBi. SnCu grew the longest whiskers. SnPb shows the least amount of whiskers, there
are more on SnBi, SnCu and most whiskers are on plated Sn. Figure 12 summarizes the results
of a comprehensive 60C/95RH whisker study using QFP components.

Figure 12: Incubation time, maximum length and number of whiskers found
on a variety of plated solder finishes during a 60C/95RH storage.

NEMI (National Electronics Manufacturing Institute Inc, USA), SOLDERTEC (Tin

Technology Ltd., Europa) und JEITA (Japan Electronics and Information Technology
Association, Japan) formed a team to run a program (18) to study the nature of Sn whiskers,
their growth mechanisms and to develop and propose possible prevention and test measures. Ni
or Ag barrier layers seem to be effective diffusion barriers and buffer between the plated Sn
and the leadframe base materials. Infineon, STMicoelectronics, Philips and Freescale
Semiconductor form E4 (Environmental 4) and share their expertise and results for joint
progress in the field of EPP (19). An evenly grown SnCu intermetallic during a one hour
anneal @ 150C after plating acts as diffusion barrier and mitigates the Sn whisker growth
especially during storage of Cu leadframe components. Reflow soldered parts exhibit a very
low level of whiskering. NEMI proposed whisker tests of -55C/85C air-to-air temperature
cycling or extended storage at ambient or in 60C/93%RH did not show whiskers lengths
above 25m (20). Among others the above methods and tests strategies are being further
investigated. Manufacturers are invited to join the mentioned working groups to shed more
light into the possible impact of whisker growth for the electronic industry and in support of
successful use of Matte Sn as a viable and reliable Pb-free plated solder finish.

Freescale Semiconductor GmbH EMEA Quality 13/17 FWW, September 2004

Pb-free or Green Product Availability
The customer demand for volume shipment of Pb-free components or Green Product is not yet
widespread. While Pb-free parts dont have Pb in the solder terminations of leads or solder
balls and are processable at Pb-free temperatures, Green Products additional feature is the use
of halogen- and Sb-free moldcompounds. Besides SnPb-solderable NiPdAu parts, Freescale
Semiconductor repectively MOTOROLA SPS have been shipping Pb-free products since 2001,
based on specific customer requests. In a proactive manner, we will consider any new product
a Pb-free candidate after Q1, 2003. Our policy is to evaluate each Pb-free opportunity by
component type.

For manufacturing readiness by packaging type, see Table 3. For sample or product
availability please contact a Freescale sales office or the Freescale Technical Information
Center via http://www.freescale.com . Daisy-chain PBGAs are well suited to evaluate the
process capability of board assembly lines also with respect to minimum solder joint
temperature and maximum package peak temperature of the components on the boards.

Table 3: The demand triggers the production of Pb-free components.

Freescale Semiconductor GmbH EMEA Quality 14/17 FWW, September 2004

Pb-free Conversion Plan
At this time, conversions are taking place only on a customer request basis. Conversion of
existing SnPb finish products to Pb free products will be handled by our standard Product
Change Notification system. All customers are requested to report and list their needs for Pb-
free components in order to allow for proper production planning. Execution of the
Environmental Packaging Technology Roadmap (Figure 13) pends market needs. The graphic
below contains information about features and timing that are projections and subject to change
per market and business development.

Figure 13: Freescale Semiconductor Environmental Packaging Technology Roadmap

After completion of Pb-free termination development and selection for production start the key
effort has now turned towards finalizing the evaluation and the best choice of future mold
compounds in order to fulfill the obvious need for improved Resistance against Soldering Heat
(RaSH) and upcoming requirements of halogen- and Sb-free packages.

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Summary
The conversion to Pb-free demands special effort on the manufacturer and user side of
integrated circuits. Technical solutions are made available where matte Sn was chosen as the
mainstream Pb-free solder finish for leadframe devices besides the already introduced
NiPd(Au). Ball Grid Array packages receive SnAgCu solder balls. Sufficient to good
solderability is given for all Pb-free terminations in conventional SnPb and SnAgCu board
solders. MSL/PPT processability rules have to be followed per J-STD-020B.

Introduction of new moldcompounds is often necessary to comply with requirements for

halogen- and Sb-free materials and to achieve the necessary package robustness for the
elevated process temperatures. Biphenyle epoxy resins with metal-hydrates and -oxides or
multi-aromates as flame retardents have a good chance to replace present plastic materials.

Board-Level reliability with Pb-free terminations proves fully acceptable or even better when
compared to traditional solder joints. Application specific investigations are encouraged to
collect further supporting data.

Finally it has to be noted, however, that all along with the proactive and technically oriented
efforts by the manufacturers there is still reluctance for Pb-free conversion on the business side.
The customers have to let us know what they need, when which product is required Pb-free
and in what quantities. During the actual economic situation, some still not fully elaborated
legislative wording and also no finally defined material weight% limits, it is not justifiable to
proceed with the changes and to make further investments when the political and economic
situation dont trigger clear market signs. Customers might prefer or need a different solution
than so far prepared for. All along the value chain, customers and suppliers have to keep each
other informed about their Pb-free roadmaps and expectations from early on in the
development phase of new products, materials and processes. Joint effort and shared learnings
will result in successful product and business for all parties envolved together.

Literature

1) Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on
waste electrical and electronic equipment (WEEE)

2) Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on
the restriction of the use of certain hazardous substances in electrical and electronic equipment
(RoHS)

3) Commission Decision of 27 June 2002 amending Annex II of Directive 2000/53/EC of the

European Parliament and of the Council on end-of-life vehicles (ELV)

4) IPC/JEDEC J-STD-020B: Moisture/Reflow Sensitivity Classification for Nonhermetic

Solid State Surface Mount Devices, July 2002 and later versions

5) Klein, Ch. et al (2003): Qualification Temperature Profile of Electronic Devices for Lead-
free Reflow Soldering, ZVEI Workshop Lead-free Production in Automotive Business,
Frankfurt, Oct.23, 2003.

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 6) Wulfert, F.W. et al (2002): Assessment of Pb-free Finishes for Leadframe Packaging,
Electronics Circuits World Convention, ECWC 9, Cologne Trade Fair, Germany, October
2002
7) Wulfert, F.W. et al (2002): Development of Pb (lead) and Halogen Free Plastic Ball Grid
Array, PBGA, Components, Electronics Circuits World Convention, ECWC 9, Cologne Trade
Fair, Germany, October 2002

8) IEC 60068-2-58 Environmental testing Part 2-58: Test methods for solderability,
resistance for dissolution of metallization and to soldering heat of surface mounting devices
(SMD), 2nd. Edition 1999-2001

9) Dittes, M. (2002): Lead-free Post-Mold Plating for Semiconductor Devices, Electronics

Circuits World Convention, ECWC 9, Cologne Trade Fair, Germany, October 2002

10) Vo, N. et al (2001): Pb-free Plating for Peripheral Leadframe Packages, Second
International Symposium on Environmentally Conscious Design and Inverse Manufacturing
Proceedings, Tokyo, Japan, Dec. 11-15, 2001

11) Lee, B. et al (1998): Spontaneous Growth Mechanism of Tin Whiskers, Acta

Materiologica, Vol. 46, No. 10, 1998, pp. 3701-3714

12) http://www.nemi.org/projects/ese/tin_whisker.html

13) Zhang, Y. et al : "Understanding Whisker Phenomenon Driving Force for the Whisker
Formation", APEX 2002, San Diego, CA.

14) http://nepp.nasa.gov./whisker

15) http://www.space.com/businesstechnology/mexican_satellite_000830.html

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17) Dittes, M. et al (2003): The Effect of Temperature Cycling on Tin Whisker Formation,
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18) "NEMI Sn Whisker Project," Tin Whisker Joint Meeting: NEMI, JEITA & ITRI, May
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or ftp://nemi.org/webdownload/newsroom/Presentations/JEITA_presentation.pdf
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ftp://nemi.org/webdownload/newsroom/TW_biblio-July03.pdf

19) http://biz.yahoo.com/prnews/040603/nyth132_1.html

20) Su, P. (2004): Effects of 260C Reflow on Sn Whisker Growth, NEMI Tin Whisker
Workshop @ ECTC 2004, Las Vegas, June 2004

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