Академический Документы
Профессиональный Документы
Культура Документы
00)
MMEC M.M. ENGINEERING COLLEGE MULLANA LABORATORY MANUAL
DISTRIBUTION LIST
STATUS
PREPARED BY: Ms. GEETA KAUSHIK APPROVED BY: Dr. H.P. SINHA
STATUS
PREPARED BY: Ms. GEETA KAUSHIK APPROVED BY: Dr. H.P. SINHA
Apparatus : CRO, function generator, low pass filter kit, connecting probes.
Theory:
The mean of filter is an electrical circuit which has property to select some band of frequency or say
it is a frequency selective network. An active filter has some type of amplification involved to raise
the Q of the filter. It offers more flexibility to adjust the pass band gain, reduce loading upon the
source and economical since it does not have indicators. The filter has some specific characteristics
which is determined from the cut off rate or attenuation rate.
A low pass filter has property to pass out low frequency band which should be below the cut off
frequency fc. There are many types of electric circuits to construct these filters but butter worth filter
is common. In fig. 1(a)the basic low pass filter is shown, in which R-C has finite cut off
characteristics which can be realized as
Vo=Vin/1+j2fRC
The above expression is true if the o/p Vo is terminated In very high impedance. The use of op-amp
allows high input impedance termination and gain control by Rf/R1, that must be two within the
pass band. The filter cut off rate is 6db/octave.
The butter response for any order of filter is that where the transition from pass band to stop band is
as abrupt as possible without a resonance peak or ripple at the transition stage.The butter worth filter
is designed in two way symmetrical or asymmetrical. In any way an active filter is designed then the
Q of the filter must be less than 2. To design second order filter the first order filter can be converted
using additional passive components. The phase shift correction obtained by connecting C1 with
O/P.
1. For the single section low pass filter the cut off frequency = c
PROCEDURE:-
2. Switch on the power & connect CRO at the O/P. Connect Function generator at I/P 2 of LPF.
3. Adjust function generator for 100 Hz sine wave. Set its amplitude control to display 6 Vpp
sine wave at CRO. Note the O/P is A=6Vpp.
4. Increase frequency of the function generator in given steps as in table and note the O/P
voltage each time upto a frequency of 10Khz or more.
RESULT:- Second order low pass butter worth filter has been studied and verified.
THEORY:-
The mean of filter is an electrical circuit which has property to select some band of frequency or say
it is a frequency selective network. An active filter has some type of amplification involved to raise
the Q of the filter. It offers more flexibility to adjust the pass band gain, reduce loading upon the
source and economical since it does not have indicators. The filter has some specific characteristics
which is determined from the cut off rate or attenuation rate.
A high pass filter has property to pass out high frequency band which should be above the cut off
frequency fc.There are many types of electric circuits to construct these filters but butter worth filter
is common.
The butter response for any order of filter is that where the transition from pass band to stop band is
as abrupt as possible without a resonance peak or ripple at the transition at transition stage. The
butter worth filter is designed in two way asymmetrical or symmetrical. The design second order
filter the first order filter can be converted using additional passive components.
1. For the single section High pass filter the cut off frequency= c
Then Q=/2
C=1/CR
R1=R2, R2=R/2
2. For a single section low pass the cut off = c=1/2RC, where the R is predetermined and C=C1=C2Then
C= 1/2RC
PROCEDURE:-
2. Switch ON the power and connect CRO at the O/P.Connect function generator at I/P2 of HPF.
3. Adjust function generator for 10 Khz sine wave.Set its amplitude control to display 6Vpp sine wave
signal at CRO. Note the output is A=6Vpp.
4. Decrease frequency of the function generator in given steps as in table and note the output voltage
each time upto a frequency of 100Hz or less.
RESULT:- Second order High pass butter worth filter has been studied and verified.
Theory:
INTEGRATOR:
The given circuit produces an output voltage(Waveform) which is integral of the input voltage
(Waveform). The charging current of the capacitor is Ic. The voltage at output and input (across the
capacitor is zero) applying an input current through input resistance R from a voltage source Vin the
Vin/R= -c dV/dT
DIFFERENTIATOR:
As the name implies this ckt performs mathematical operation of differentiation. Its output voltage is
the derivative of input voltage.
In the circuit the charge current Ic is a function of input voltage(Vin) and feedback current(If). As
stated earlier If is a function of Vo and Rf, thus a relation may be written as:-
Cd Vin/dT= -Vo/Rf
Procedure:
FOR INTEGRATOR:
FOR DIFFERENTIATOR:-
APPARATUS: IC 741, d.c.supply source, connecting leads, resistance of 1kohm, bread board or op-
amp kit.
THEORY:
Adder Circuit: It is one of the most useful op-amp circuits that is capable of adding d.c as well as
signal. In this configuration, the output voltage is proportional to or equal to algebraic sum of two
or more input voltages each multiplied by a constant gain factor. The circuit is shown in figure.
Vout = -Rf(V1/R1+V2/R2)
Vout = -(V1+V2)
This circuit is also known as mixer or summing amplifier. The biggest advantage is that there is no
interaction between the inputs.
Subtractor Circuit: In this case, the input voltage are at different terminals, I.e. inverting and non
inverting terminals. Gain of the circuit is again kept at one by one using equal resistance in external
circuit.
Vout=Vo2+V03
Where,
Vo2=-Rf/R1Va=-Va if(Rf=R1)
Vo3=(1+Rf/R)Vins.
But, Vins=Vp(R2/(R2+R3))
PROCEDURE:
PRECAUTION:
1. Keep all resistances equal as the gain has to be for a normal adder and subtractor.
2. Proper supply should be given to IC terminals.
RESULT: The op-amp IC 741 has been studied as an adder and subtractor circuit.
Theory: Current to voltage converter is a special case of inverting amplifier with feedback in which
input current is converted into a proportional output voltage. To change current source into voltage
source, consider inverting configuration.
The ideal voltage-gain eqn of the inverting amplifier;
Vo/Vin=-Rf/R1
It means that if we replace the Vin andR1 combination by a current source Iin, the output voltage
becomes proportional to the input current Iin. Thus the circuit of figure above converts the input
current to a proportional output voltage.
Procedure:
Theory:
The voltage to current converter provides current proportional to input voltage. The input
voltage is applied at non inverting terminal & feedback voltage across R1 drives the inverting
terminal.
The terminal load is floated i.e. it is not grounded but connected to Rf path I.e.replace Rf by Rl.
Vo=Avid
Vid = V1-V2=0
Therefore,
V1=V2 (V1=V2=Vf=Vin)
Vin=Vid+Vf
Vin=Vf
Vin=R1.Io
Io= Vin /R1
This means that in the circuit of fig, above an input Vin is converted into an output current of
Vin/R1.
PREPARED BY : Ms GEETA KAUSHIK APPROVED BY :Dr. H.P.SINHA
Procedure:
It is used in industries to control and measure the physical quantities like temp. , humidity, and water
flow etc. These physical quantities are usually measured with the help of transducers. A transducer is
a device that converts one form of energy into another.
INPUT STAGE:
The input stage is composed of preamplifier and some sort of transducer depending upon the
physical quantity to be measured. Transducer converts physical input into electrical quantity. The
input signal is not so strong to drive the output stage , an intermediate stage is used. The input of
instrumentation amplifier is output of the transducer. To amplify the low level signal of transducer
so that it can drive the indicator (O/P stage) is the measure function of instrumentation amplifier.
INTERMEDIATE STAGE:-
This will amplify the signal obtained from the I/P stage and pass it to the O/P stage. In short the
instrumentation amplifier is intended for precise low level signal amplification where low noise, low
thermal and high I/P resistance and accurate close loop gain are require..
OUTPUT STAGE:-
The output stage may use devices such as indicators, oscilloscopes, displays or the magnetic
recorders.
One of the most useful application of an op-amp is differential input DC amplifier configuration.
But in this configuration, the input impedances are not similar. Thus a three op-amp configuration is
used which is called as Buffered differential I/P instrumentation amplifier. The loading effect of
such config. Is negligible in which the voltage gain might be set for very large. However this tends
to impair the common mode rejection ratio and input offset voltage unbalance.
In fig drawn such amplifier circuit employs three op-amps. Here the bridge balance is not disturbed
by the gain adjust control. Thus CMRR is quite constant at each gain settings. The offset voltage is
usually disturbed with alteration in gain, but it can be adjusted well.
PREPARED BY : Ms GEETA KAUSHIK APPROVED BY :Dr. H.P.SINHA
CIRCUIT DESCRIPTION:-
The op-amp IC1 and IC2 (CA3140) at front end act as buffer,
with voltage gain of G, approximately. The voltage gain is set by RF and RG1 as below
G={1+(2RF/RG)}
The third op-amp 3140 is differential amplifier having unity voltage gain, which depends upon the
loop around it. Since the feedback attenuation results in higher gain, which is achieved in varying
the RG, yields to exactly the condition needed to maintain good balance and high CMRR. The offset
adjustment is carried out by summing the DC voltages at the non inverting input of IC3.
Procedure:
1. Connect the circuit as shown in the diagram. Keep the DC voltage control to fully counter clock
direction.
2. Set the gain control to desired position. Connect the DVM across the desired sockets.
3. Adjust the offset control to bring the output voltage at zero volts.
THEORY:
Schmitt trigger or squaring circuit converts an irregular shaped waveform to a square wave or pulse.
The input voltage Vin triggers the output Vo every time it exceeds certain voltage levels called the
upper threshold voltage Vut and lower threshold voltage Vlt.
In circuit diagram, the threshold voltages are obtained by using the voltage divider R1-R2, where the
voltage across R1 is fed back to the (+) input. The voltage across R1 is a variable reference
threshold voltage that depends upon the value and polarity of the voltage Vo. When Vo=+Vsat, the
voltage across R1 is called as the upper threshold voltage Vut. The input voltage Vin must be
slightly more positive than Vut in order to cause the output Vo to switch from +Vsat to Vsat. As
long as Vin<Vut, Vo is at +Vsat.
Using the voltage divider rule,
Vut = (+Vsat). R1 / (R1+R2)
On the other hand, when Vo = -Vsat, the voltage across R1 is referred to as lower threshold voltage,
Vit. Vin must be slightly more negative than Vit in order to cause Vo to switch from Vsat to +Vsat.
Vit is given by the following equation:
Vit = (-Vsat). R1/(R1+R2)
Thus if the threshold voltages Vut and Vit are made larger than the input noise voltages, the positive
feedback will eliminate the false output transitions. Also, the positive feedback, because of its
regenerative action, will make Vo switch faster between +Vsat and Vsat. In figure, resistance Rom
approx. = R1 II R2 is used to minimize the offset problems.
Waveforms show that the output of the Schmitt trigger is a square wave when the input is a sine
wave. When the input is a triangular wave, the output of the Schmitt trigger is a square wave,
whereas if the input is a sawtooth wave, the output is a pulse waveform.
PROCEDURE:
2. Feed a sine wave signal of 200Hz 5Vpp at the input and observe the output at CRO. It should be
square wave.
3. Display the input and output signal on both channels and draw on it upon with their cross over
points and conclude the results.
APPARATUS: CRO, CRO probes, multimeter, 555 timer kit, function generator.
THEORY: The 555 is a monolithic timing circuit that can produce accurate and highly stable time delays
or oscillations. The timer mainly operates is one of the two modes- either as a monostable multivibrator
or as a astable multivibrator.
2. 555 timer is connected in astable mode as shown in fig. In this circuit the 555 timer operate in
free run mode. Initially the output of 555 is low after power on, means that its internally Q output is
high which discharges the C and also pull trigger pin to low level. The low trigger set the IC which
means its output is high at pin 3. The timing capacitor C starts charging through (R1+R) towards Vcc.
As the voltage level at pin 6 approaches just over than 2/3Vcc the TC goes to reset and C start
discharging through R. The effect of R1 is negligible due to the low impedance of discharge
transistor. As soon as the voltage across C just drops to 1/3Vcc the IC re-triggered again and the
cycle continues. There are two resistances involved in this charge discharge sequence. Thus the
period of generated wave is given below
T = (t1+t2)
T = 0.7R1+R(t)+0.7R2C
If the value of R is much greater (>>50)than R1, then a square wave obtained at
output with a time period of approx. is equal to 1.4R2C corresponding to
Frequency f = 0.7/ CR2.
PROCEDURE:-
Theory: the 555timer is a highly stable device for generating accurate time delay or oscillation.
The 555 timer can be used with supply voltage in the range of +5V to +18V and can drive load
up to 200mA. In fig. three resistor act as voltage divider, providing bias voltage of 2/3Vcc to the
upper comparator and 1/3Vcc to the lower comparator, where Vcc is supply voltage. In the
standby state the output Q of the control flip flop is high. This makes the output LOW because of
power amplifier which is basically an inverter. A negative going trigger pulse is applied to pin 2
and should have its dc level greater than the threshold level of the lower comparator. At the
negative going edge of the trigger, as the trigger passes through, the output of the lower
comparator goes HIGH and sets the FF(Q=1, QBAR=0). During the positive excursion, when
the threshold voltage at pin 6 passes through (2/3) Vcc the output of the upper comparator goes
HIGH and reset the FF(Q=0,QBAR=1).
Monostable Operation
Figure shows a functional diagram connected for monostable operation. In standby state, FF
holds transistor Q1on, thus clamping the external timing capacitor C to ground. The output
remains at low. As the trigger passes through Vcc/3, the FF is set i.e. Qbar =0. This make the
transistor Q1 of end the short circuit across the timing capacitor C is released. As Q is low,
output goes high Vcc. The timing cycle now begins since C is unclamped, voltage across it
arises exponentially through are toward Vcc with a time constant RC. After a time period T the
capacitor voltage is just greater than 2/3Vcc and the upper comparator reset the FF i.e. R=1,
S=0. This makes Q bar=1, transistor Q1 goes ON, there by discharging the capacitor C rapidly to
ground potential. The output returns to the stand by state.
The voltage across the capacitor is given by
It is evident from the equation that the timing interval is independent of the supply voltage. It
may also be noted that once triggered, the output remains in the HIGH state until time T elapses
which depend only upon R and C.
1. Connect the circuit as shown in fig. selecting C=100micro Farad, R= 100K, switch on the power.
3. Select lower value of C (0.01 micro farad). Connect CRO at the output of IC and connect a function
generator.
4. Raise the square wave (100Hz) amplitude till a waveform appears on the CRO screen.
5. Change the frequency of the square wave say 200Hz and trace the input waveform. Connect the CRO
back.
Theory:
IC 555:
Timer IC is designed to generate accurate and stable R-C defined periods, for use as monostable
and astable pulse generators. It contains two voltage comparators, one flip-flop, one inverter and
two transistors as reset and discharge device. The outputs of comparators are coupled with a R-S
FLIP-FLOP which set or reset by these voltages. The lower comparator is called as trigger
comparator and the upper as threshold comparator. The flip-flop output goes low as soon as the
voltage at inverting pin of trigger comparator crosses the 1/3 Vcc reference. The output available
from IC is in inverted form thus it goes high. This simple architecture of 555 is very useful for
many applications. One application of this device isto construct a voltage controlled oscillator.
VCO:
The basic action of it is such that in each operating cycle, timing capacitor C(.01uf) alternately
charge at a rate(2I), determined by RT1(3k9) until the voltage Vc reaches upper threshold level
(2/3Vcc), at which point IC555 toggles cause to saturate discharge transistor (pin7). The
charging current (2i), is blocked and C now discharge at constant rate(I), determined by
RT2(7k8) until the Vc reaches lower threshold level(1/3Vcc), where again IC555 toggles to high
state.
Since Q2 and Q3 are current sources which conducts continuously during charge cycle, hence
the charge current must be doubled equal to 2I.during discharge cycle Q2 is cut off hence C
discharge at rate equal to I.
Q1 acts as balanced voltage divider.
Procedure:
APPARATUS: Op-amp kit, function generator, CRO, CRO probes, connecting wires.
THEORY: A clipper is a circuit that removes a certain part of the input waveform
Clipping circuits used to select for transmission that part of an arbitrary waveform that lies above or
some reference level.
1. Positive clipper
2. Negative clipper
POSITIVE CLIPPER:
A positive clipper is a circuit that removes positive part of the input waveform. It can be formed by using
an op-amp with a rectifier diode. In this circuit the op-amp is basically used as a voltage follower with a
diode in feedback path.
The clipping path is determined by the reference voltage Vref, which should be less than the input
voltage range of op-amp.
During the positive half cycle of the input, the diode conducts only until Vin = Vref. This happens
because when Vin<Vref, the voltage(Vref) at the input is higher than that at the (+) input. As the value of
Vin is less than or equal to Vref the diode will be reverse biased and hence in the output waveform we
will not get the positive part of the input waveform i.e. the positive part is clipped off. Thus for Vin<Vref
the circuit will work as a positive clipper.
NEGATIVE CLIPPER:
A negative clipper is a circuit that removes the negative part of the input waveform. The negative clipper
can be obtained by reversing the polarity of the diode and changing the polarity of reference voltage.
The negative clipper clips the negative part of the input signal below the reference voltage. Diode
conducts when Vin>Vref and therefore during this period the output follows the input Vin. However the
negative portion is clipped off because diode is off for Vin<-Vref. Hence in the output waveform we will
not get the negative part of the input waveform i.e. the negative part is clipped off. Thus for Vin<-Vref
the circuit will work as a negative clipper.
EVALUATION CRITERIA
INTERNAL MARKS 60
Attendance 40% 24
Total 100 60
LAB MANUAL
COURSE : B. Tech.
DEPARTMENT : Electronics & Communication Engineering
SEMESTER : 5th