Term End Examination - November 2012

Course : ITE305 - Embedded Systems Slot: F1

Class NBR : 1128 / 1131

Time : Three Hours Max.Marks:100

PART A (8 X 5 = 40 Marks)
Answer ALL Questions

1. Describe about interrupt, interrupt handler and IE SFR.

2. Differentiate between Von Neumann and Harvard architecture.

3. Discuss the software tools used for designing an Embedded System.

4. Write about Priority Inversion.

5. List and describe five global power states available from APCI.

6. Categorize different layers in OSI reference model.

7. Outline the different types of instruction set available in ARM.

8. Differentiate between big-endian and little-endian format.

PART B (6 X 10 = 60 Marks)
Answer any SIX Questions

9. Describe 8051 pin description in detail.

10. Write about different modes of Timer/Counter and configure Timer 0 to generate
9600 Baud rate.

11. Describe the steps involved in page translation process.

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12. For the processes shown below, schedule the processes using an EDF policy.
Compute the CPU utilization in which time starts at t=0 and all the three processes
are in ready state and the hyperperiod is 20.

Process Execution Time Period

P1 1 3
P2 1 4
P3 2 5

13. Demonstrate different types of inter-process communication with suitable examples.

14. Devise the class diagram for an elevator controller.

15. Write ARM assembly code for the following MAC unit:
for (int i=0, f=0; i<N; i++)
f=f+c[i]*x[i];

16. Describe in detail, digital to analog conversion methodology with suitable examples.

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