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  • Term End Examination - November 2014 Course: ITE305 - Embedded Systems Slot: A1+TA1 Class NBR: 6169 Time: Three Hours Max - Marks:100 PART - A (8 X 5 40 Marks) Answer ALL Questions

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    Siddarth Nyati
    10 просмотров2 страницы
    1. This document is a term end examination for the course ITE305 - Embedded Systems. The exam has two parts: Part A consists of 8 short answer questions worth 5 marks each, and Part B consists of 6 long answer questions worth 10 marks each. 2. Part A questions cover topics like the timing diagram for a CPU read operation, SFR registers in 8051 microcontrollers, segmented address translation, shared memory communication models in RTOS, process state transition diagrams, Java applets, ARM addressing modes, and ARM assembly code. 3. Part B questions cover ARM instructions, I/O interrupt mechanisms, code optimization techniques, power states in APCI, context switching, Ethernet packet format and CSMA

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    embedded vit papaer

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    070C8E61878C423687EA9AD065E00EF1 (1)

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    1. This document is a term end examination for the course ITE305 - Embedded Systems. The exam has two parts: Part A consists of 8 short answer questions worth 5 marks each, and Part B consists of 6 long answer questions worth 10 marks each. 2. Part A questions cover topics like the timing diagram for a CPU read operation, SFR registers in 8051 microcontrollers, segmented address translation, shared memory communication models in RTOS, process state transition diagrams, Java applets, ARM addressing modes, and ARM assembly code. 3. Part B questions cover ARM instructions, I/O interrupt mechanisms, code optimization techniques, power states in APCI, context switching, Ethernet packet format and CSMA

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    © All Rights Reserved
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    10 просмотров2 страницы

    Term End Examination - November 2014 Course: ITE305 - Embedded Systems Slot: A1+TA1 Class NBR: 6169 Time: Three Hours Max - Marks:100 PART - A (8 X 5 40 Marks) Answer ALL Questions

    Загружено:

    Siddarth Nyati
    1. This document is a term end examination for the course ITE305 - Embedded Systems. The exam has two parts: Part A consists of 8 short answer questions worth 5 marks each, and Part B consists of 6 long answer questions worth 10 marks each. 2. Part A questions cover topics like the timing diagram for a CPU read operation, SFR registers in 8051 microcontrollers, segmented address translation, shared memory communication models in RTOS, process state transition diagrams, Java applets, ARM addressing modes, and ARM assembly code. 3. Part B questions cover ARM instructions, I/O interrupt mechanisms, code optimization techniques, power states in APCI, context switching, Ethernet packet format and CSMA

    Авторское право:

    © All Rights Reserved
    Скачайте в формате PDF, TXT или читайте онлайн в Scribd
    Отметить как неприемлемый контент
    из 2

    Term End Examination - November 2014

    Course : ITE305 - Embedded Systems Slot : A1+TA1


    Class NBR : 6169
    Time : Three Hours Max.Marks:100
    PART A (8 X 5 = 40 Marks)
    Answer ALL Questions

    1. Draw the timing diagram for a READ operation between the CPU and main memory.

    2. List all the SFR's available in 8051 microcontroller.

    3. Write a note on segmented address translation for memory access.

    4. Analyze in detail the shared memory communication model used in RTOS.

    5. Draw the state transition diagram of a process.

    6. Illustrate with suitable examples, the Internet appliance of Javacam operates with Java
    applet.

    7. Elaborate on the addressing modes available in ARM processor.

    8. Write the ARM assembly code for the following high-level language statement:
    x=(a-b)*c

    PART B (6 X 10 = 60 Marks)
    Answer any SIX Questions
    9. Write a note on the following instructions:
    (a) MOVX; (b) POP; (c) ADDC; (d) SWAP; (e) SJMP

    10. Describe in detail about the interrupt mechanism for I/O devices.

    11. Write a note on dead-code elimination, expression simplification and procedure in-
    lining.

    12. Discuss in detail about the five basic global power states of APCI.

    13. Write a note on context switching mechanism in embedded processor.

    Page 1 of 2
    14. Describe in detail about the packet format and explain the Ethernet CSMA/CD algorithm
    with exponential back off times.

    15. Discuss in detail the methodologies adopted for implementing control statements in
    ARM processor.

    16. Write a detailed note on Analog to Digital conversion.

    Page 2 of 2

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