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LC4.1E
AC
BELT
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Published by TY 0766 BG CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 17120
EN 2 1. LC4.1E AC Technical Specifications, Connections, and Chassis Overview
1.1.1 Vision
: 500:1 (15)
Response time (ms) : 25 (20) Figure 1-1 Rear and Side I/O connections
: 8 (23)
Viewing angle (HxV degrees) : 178x178 (20) 1.2.1 Rear Connections
: 160x160 (15)
Tuning system : PLL Aerial - TV In
TV Colour systems : PAL B/G, D/K, I - - IEC-type Coax, 75 ohm D
: SECAM B/G, D/K, L/L
Video playback : NTSC M/N 3.58, 4.43 Aerial - Radio In (optional)
: PAL B/G - - IEC-type Coax, 75 ohm D
: SECAM L/L
Supported computer formats : VGA (640x480)
Service Connector (ComPair)
: SVGA (800x600)*
1 - SDA-S I2C Data (0 - 5 V) jk
: XVGA (1024x768)*
2 - SCL-S I2C Clock (0 - 5 V) j
: WXGA (1280x768)*
3 - Ground Gnd H
: (*) 23 models only
Supported video formats : 720x576i - 1fH
: 720x576p - 2fH EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out
: 1920x1080i - 2fH * 20 2
: 1280x720p - 3fH *
: (*) 23 models only
Presets/channels : 100 presets
Tuner bands : U, V, S, H 21 1
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1.1.2 Sound
Figure 1-2 SCART connector
TOP CONTROL
PANEL E
AUDIO AMPLIFIER
MAIN SUPPLY UNIT PANEL I
SMALL SIGNAL
B BOARD IR & LED
PANEL J
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4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Notes:
4.2 Service Positions Figures below can deviate slightly from the actual situation,
4.3 Rear Cover Removal due to the different set executions. Photos are taken from
4.4 Assy/Panel Removal the 20 model.
4.5 Set Re-assembly Follow the disassemble instructions in described order.
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For easy servicing of this set, there are a few possibilities Warning: Disconnect the mains power cord before you remove
created: the rear cover.
The buffers from the packaging.
Foam bars (created for Service). Refer to next figure for details.
Aluminium service stands (created for Service). 1. Place the TV set upside down on a table top, using the
foam bars (see part "Service Position").
Note: the aluminium service stands can only be used when the 2. Remove all fixation screws [1] and the stand (if mounted).
set is equipped with so-called mushrooms. Otherwise use the 3. Release the two fixation clamps [2] by pushing them
original stand that comes with the set. inwards.
4. Pull the rear cover in backward direction to remove it. Make
sure that wires and flat foils are not damaged while lifting
4.2.1 Foam Bars
the rear cover.
1 1
1 1
1 1 1 1
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The foam bars (order code 3122 785 90580 for two pieces) can Figure 4-3 Rear cover removal (1/2)
be used for all types and sizes of Flat TVs. See figure Foam
bars for details.
Sets with a display of 42 and larger, require four foam bars [1].
Ensure that the foam bars are always supporting the cabinet
and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and 2 2
alignments. By placing a mirror under the TV, you can monitor
the screen.
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1
1
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Refer to next figure for details.
1. Release fixation clips [1] and remove the board.
2. Unplug connector [2].
Figure 4-5 Top keyboard control panel
When defective, replace the whole unit.
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4.4.5 Speakers
2
2
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1. Refer to next figure. The disassembly method for the LCD panel differs per panel
2. Unplug all cables. type, so the following description is generic (based on the 20
3. Remove the fixation screws [1]. model). The number and position of screws is panel-specific.
4. Take the board out (it hinges at the left side). Therefore, not all screws necessarily need to be present!
1 1
1
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This chassis also offers the option of using ComPair, a How to enter
hardware interface between a computer and the TV chassis. It To enter SDM, use one of the following methods:
offers the abilities of structured troubleshooting, error code Press the following key sequence on the remote control
reading, and software version read-out for all chassis. transmitter: 062596 directly followed by the MENU button
Minimum requirements for ComPair: a Pentium processor, a (do not allow the display to time out between entries while
Windows OS, and a CD-ROM drive (see also paragraph keying the sequence).
"ComPair"). Short Service jumpers on the small signal board during
cold start and apply mains (see Figure SDM Service
jumper). Then press the mains button (remove the short
5.2.1 Hotel Mode (for iTV sets)
after start-up).
Caution: Entering SDM by shorting Service jumpers will
Before access to any service menu is possible, the iTV set
override the +5V-protection. Do this only for a short period.
needs to be placed in MTV (Mainstream TV) mode. On the
When doing this, the service-technician must know exactly
RC1683803 remote control, enter 319753 directly followed what he is doing, as it could damage the television set.
by the [i+] key [1]. The TV set is now in MTV mode.
Or via ComPair.
SDM
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For Hotel TVs, after repair, place the TV set into Hotel (iTV)
mode again. Enter the same code on the remote control as
described above.
Service Modes, Error Codes, and Fault Finding LC4.1E AC 5. EN 11
After entering SDM, the following screen is visible, with SDM in Purpose
the upper right corner of the screen to indicate that the To change option settings.
television is in Service Default Mode. To display / clear the error code buffer.
To perform alignments.
00022 LC4CEP1 1.05/S4CEX1 1.06 SDM
Specifications
ERR 0 0 0 0 0 Operation hours counter (maximum five digits displayed).
OP 000 057 140 032 120 128 000 Software version, Error codes, and Option settings display.
Error buffer clearing.
Option settings.
AKB switching.
Software alignments (Tuner, White Tone, Geometry &
Audio).
NVM Editor.
ComPair Mode switching.
How to Enter
To enter SAM, use one of the following methods:
Press the following key sequence on the remote control
transmitter: 062596" directly followed by the OSD/
STATUS button (do not allow the display to time out
between entries while keying the sequence).
Or via ComPair.
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200605 After entering SAM, the following screen is visible, with SAM in
the upper right corner of the screen to indicate that the
television is in Service Alignment Mode.
Figure 5-3 SDM menu
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Menu Explanation
1. LLLLL. This represents the run timer. The run timer counts
normal operation hours, but does not count standby hours.
2. AAABCD-X.Y. This is the software identification of the
main microprocessor:
A= the project name (LC41).
B= the region: E= Europe, A= Asia Pacific, U= NAFTA,
L= LATAM.
C= the software diversity:
Europe: T= 1 page TXT, F= Full TXT, V= Voice
control.
LATAM and NAFTA: N= Stereo non-dBx, S=
Stereo dBx.
Asian Pacific: T= TXT, N= non-TXT, C= NTSC.
ALL regions: M= mono, D= DVD, Q= Mk2.
D= the language cluster number.
X= the main software version number (updated with a
major change that is incompatible with previous
versions).
EN 12 5. LC4.1E AC Service Modes, Error Codes, and Fault Finding
Y= the sub software version number (updated with a 5.2.4 Customer Service Mode (CSM)
minor change that is compatible with previous
versions). Purpose
EEEEEE= the scaler sw cluster The Customer Service Mode shows error codes and
F= the main sw version no. information on the TVs operation settings. The call centre can
GG= the sub-version no. instruct the customer (by telephone) to enter CSM in order to
3. SAM. Indication of the Service Alignment Mode. identify the status of the set. This helps the call centre to
4. Error Buffer. Shows all errors detected since the last time diagnose problems and failures in the TV set before making a
the buffer was erased. Five errors possible. service call.
5. Option Bytes. Used to set the option bytes. See Options The CSM is a read-only mode; therefore, modifications are not
in the Alignments section for a detailed description. Seven possible in this mode.
codes are possible.
6. Clear. Erases the contents of the error buffer. Select the
How to Enter
CLEAR menu item and press the MENU RIGHT key. The
To enter CSM, press the following key sequence on the remote
content of the error buffer is cleared. control transmitter: 123654 (do not allow the display to time
7. Options. Used to set the option bits. See Options in the
out between entries while keying the sequence).
Alignments section for a detailed description.
Upon entering the Customer Service Mode, the following
8. Tuner. Used to align the tuner. See Tuner in the screen will appear:
Alignments section for a detailed description.
9. White Tone. Used to align the white tone. See White
Tone in the Alignments section for a detailed description. 1 00022 LC4CEP1 1.05/S4CEX1 1.06 CSM
10. Audio. No audio alignment is necessary for this television
set. 2 CODES 0 0 0 0 0
11. NVM Editor. Can be used to change the NVM data in the 3 OP 000 057 140 032 120 128 000
television set. See table NVM data further on.
12. SC NVM Editor. Can be used to edit Scaler NVM.
4 20PF8846/12
13. ComPaIr. Can be used to switch on the television to In 5
System Programming (ISP) mode, for software uploading
6 NOT TUNED
via ComPair.
Caution: When this mode is selected without ComPair 7 PAL
connected, the TV will be blocked. Remove the AC power
8 STEREO
to reset the TV.
9 CO 50 CL 50 BR 50
How to Navigate 0 AVL Off
In SAM, select menu items with the MENU UP/DOWN keys
on the remote control transmitter. The selected item will be
highlighted. When not all menu items fit on the screen, use
the MENU UP/DOWN keys to display the next / previous
menu items.
With the MENU LEFT/RIGHT keys, it is possible to: F_15310_003.eps
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Activate the selected menu item.
Change the value of the selected menu item.
Activate the selected submenu. Figure 5-5 CSM menu
In SAM, when you press the MENU button twice, the set
will switch to the normal user menus (with the SAM mode Menu Explanation
still active in the background). To return to the SAM menu 1. Indication of the decimal value of the operation hours
press the MENU or STATUS/EXIT button. counter, Software identification of the main microprocessor
When you press the MENU key in while in a submenu, you (see "Service Default or Alignment Mode" for an
will return to the previous menu. explanation), and the service mode (CSM= Customer
Service Mode).
How to Store SAM settings 2. Displays the last five errors detected in the error code
To store the settings changed in SAM mode, leave the top level buffer.
SAM menu by using the POWER button on the remote control 3. Displays the option bytes.
transmitter or the television set. 4. Displays the type number version of the set.
5. Reserved item for P3C call centres (AKBS stands for
Advanced Knowledge Base System).
How to Exit
6. Indicates the television is receiving an "IDENT" signal on
Switch the set to STANDBY by pressing the mains button on
the selected source. If no "IDENT" signal is detected, the
the remote control transmitter or the television set.
display will read "NOT TUNED"
If you turn the television set off by removing the mains (i.e.,
7. Displays the detected Colour system (e.g. PAL/NTSC).
unplugging the television) without using the mains button, the
8. Displays the detected Audio (e.g. stereo/mono).
television set will remain in SAM when mains is re-applied, and
9. Displays the picture setting information.
the error buffer is not cleared.
10. Displays the sound setting information.
How to Exit
To exit CSM, use one of the following methods:
Press the MENU, STATUS/EXIT, or POWER button on the
remote control transmitter.
Press the POWER button on the television set.
Service Modes, Error Codes, and Fault Finding LC4.1E AC 5. EN 13
The error code buffer contains all errors detected since the last By using this procedure, you can make the contents of the error
time the buffer was erased. The buffer is written from left to buffer visible via the front LED. This is especially useful when
right. When an error occurs that is not yet in the error code there is no picture.
buffer, it is displayed at the left side and all other errors shift one
position to the right. When the SDM is entered, the front LED will blink the contents
of the error-buffer:
5.4.1 How to Read the Error Buffer The LED blinks with as many pulses as the error code
number, followed by a time period of 1.5 seconds, in which
You can read the error buffer in 3 ways: the LED is off.
Then this sequence starts is repeated.
On screen via the SAM (if you have a picture).
Any RC5 command terminates this sequence.
Examples:
ERROR: 0 0 0 0 0: No errors detected
Example of error buffer: 12 9 6 0 0
ERROR: 6 0 0 0 0: Error 6 is the last and only detected
After entering SDM, the following occurs:
error.
ERROR: 9 6 0 0 0: Error 6 was detected first and error 1 long blink of 5 seconds to start the sequence,
12 short blinks followed by a pause of 1.5 seconds,
9 is the last detected (newest) error.
9 short blinks followed by a pause of 1.5 seconds,
Via the blinking LED procedure (when you have no
picture). See The Blinking LED Procedure. 6 short blinks followed by a pause of 1.5 seconds,
1 long blink of 1.5 seconds to finish the sequence,
Via ComPair.
The sequence starts again at 12 short blinks.
2. If they are inserted correctly, check if the 3V3 is present. If the H-out (pin 67) has a signal (or has a signal for a very
short time), change IC7006 (NE555).
No Picture Display
1. Check the RGB signal. No TV but PC is Present
2. If it is present, check pin 3 of IC7006 (NE555). 1. Check if HSYNC and VSYNC are present at PIN 3 of 7007
3. If it has output, the problem is in SCALER part. and 7005.
4. Otherwise, check H-out on pin 2 of NE555. If the input 2. If they are present, check RGB output.
signal of pin2 is present, but no output, the IC is defect. 3. If there is no RGB output, the IC TDA120xx can be failed.
Min. [Vdc] Typ. [Vdc] Max. [Vdc] Ripple & Noise [mVpp] Min. [A] Nom. [A] Max. [A]
Typ. [Vdc] Max. [Vdc] Ripple & Noise [mVpp] Min. [A] Nom. [A] Max. [A]
Notes:
1. Nominal current consumption is determining the nominal
worst-case unit operating temperature. The nominal current
absorption defines the maximum allowed component
temperature for compliance according the safety requirements.
2. The tolerances include line and load regulations. The ripple
is a peak-to-peak valuemeasured in a bandwidth from 0 to 20
MHz. The noise is a pk-pk value measured above 20 MHz.
3. Tested under DC load in parallel to a 10F electrolytic
capacitor and a 0.1F ceramic capacitor.
EN 16 5. LC4.1E AC Service Modes, Error Codes, and Fault Finding
Personal Notes:
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 17
8751
X201
1. +Vaudio 5P
2. gnd_aud LVDS
I AUDIO
1706
40P
3. 3V3 Ferite
AMPLIFIER
4. 3V3 2P
1704
5. GND 1
Pin1-2
12P 5P 6P 3P 5P
1703
X364 X363 X365
X365
2P
X201
12P
40P
TO DISPLAY
8107
8. +12V
X361
4P
9. Power_OK
2P
1401
(Power down)
4P
8401
10. Stby OR
DISPLAY
11. NC SUPPLY
12. BL_ON + TUNER
D SIDE
1010
10P
PLATFORM 8010
I/O
SUPPLY PANEL
1105
4P
1107
5P
X360 X362 X361
2P
TO DISPLAY
X362
1108
10P
4P
2P
1111
4P
X360
2P
2P
OR X100
AC
INLET
8188
J IR & LED
1870
6P
RIGHT LEFT
SPEAKER SPEAKER
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 18
8910
8751
1704
LVDS 5P
20P 2P
X201 INVERTER 8910 Ferite 1703
1. +Vaudio I AUDIO
1 12P 5P 6P 3P AMPLIFIER
2. gnd_aud Pin1-2
1910 1751 1007 1684 1706
X201
5P
12P
3. 3V3
B SSB
8107
Pin3-12
4. 3V3 20P
5. GND DISPLAY 1404
6. GND SUPPLY
14P
1401
4P
8401
7. GND +
8. +12V PLATFORM
9. Power_OK SUPPLY TUNER
(Power down) D SIDE
1010
14P
10P
8010
10. Stby I/O
PANEL
11. NC
1105
4P
12. BL_ON
1107
5P
1108
10P
1111
4P
X100
AC
INLET
8188
J IR & LED
1870
6P
RIGHT LEFT
SPEAKER SPEAKER
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 19
G_SDTV 3 EG1
151
C1 C2
C3 C4
see 17 R_MUX R_MUX 21 LV_E1_TX0+ LV_E1_TX0+ 4
blockdiagram B_SDTV 7 ANALOG EG0
24 VIDEO 14 G_MUX G_MUX 147
RXCn B6 R_Pr_OC 25 INPUT LVDS
16
24
8
B6 17 LV_E5_TX2+ LV_E5_TX2+ 12
9 PC_HD_SEL 181
RX1n
B6 & ER4
DVI-I 182 PLL
CONNECTOR 8 VS_PC 18
7463 7403 14 LV_E8_TX3- LV_E6_TX3-
2 7510 F499 MX29LV040CQC ER1
RX2p H_CS_SDTV 13
B6 14 1 2 3 4 CS_HSYNC 13 LV_E9_TX3+ LV_E7_TX3+ 20
1 RX2n B2 V_SDTV 1
B6 DA TA ER0
HS_PC 12 FLASH
15 F503 ROM ROM
VS_PC 2 VSYNC 16 LV_E6_TXC- LV_E8_TXC- 14
5 6 9 8 512kx8 INTERFACE
TOP CONTROL HERCULES ADDRESS ER3
E B3 (FRONT CONTROL LOOP THROUGH)
B7
10,11
SD_PCHD_SEL
7516 B7
15 LV_E7_TXC+
ER2
LV_E9_TXC+ 16
MK1575-01
7510
CHANNEL + 12 FBIN FBIN 112
+3V3STBY +5VSW CLOCK 38 LV_O0 EB3 1402
CHANNEL- J1 1684 H_CS_SDTV 11 12 1
B2 RECOVERY 1
VOLUME+ 6x PLL 2 PLL_SEL VIDEO 37 LV_O1 EB2
VOLUME- KEYBOARD 2 2 KEYBOARD 3063 6060
POWER
7060 36 LV_O2 EB1 17
MENU PLL_SEL
B7 35 LV_O3 EB0 19
169
FRONT IR/LED
J 1403
34 LV_O4 EG7 21
B2 HERCULES (CONTROL)
7011
SDM PINS
4015 D SIDE AV (UART PART)
55 FSHCLK
u-Processor 67 PANEL_PWR_CTL
B9
15 SEL_IF 1111 1401 7402 LAMP_ON_OFF
B1 68
1 1 M24C32 B5
18 SOUND_ENABLE 1112 NC +3V3_DVDD 5 SDA_IO 93
B3 3123
KEYBOARD 9 1 JTAG_SDA_UART_TX 2 2 EEPROM 6 SCL_IO 92 TV_SC_COM
3 PC-TV- LED (NVM) 81
B2
UART 3124 4kx8 7 WC 84 TV_IRQ
CONN. 2 JTAG_SCL_UART_RX 3 3 82
IR 21 SCL SYSTEM B2
32 B1 FOR 83 FBIN
SERVICE 3 4 4 3430 B6 B8
HERCULES 20 SDA SDA 78
STATUS_1 B7
B8 13 IC 5 6 B2 3431 88 SD_PCHD_SEL
P50_LINE_ITV_IR_SW 6 7099 SCL 77 B8
B3 NVM_WP 7
25 NVM 90 POWER_DOWN
3442 B2 B3 B5
2k x 8
B5 TV-SUPPLY JTAG_SDA_UART_TX 72
98 BACK_LIGHT_ADJ1
3441 B5
27 EXT_MUTE JTAG_SCL_UART_RX 7
B3 3936
30 TV_SC_COM 3937
B5 101 PLL_SEL
+1V8_A 7936 B8
31 TV_IRQ 7930 1
B5 1910 F903 8
+1V8_B
7 STANDBY 1
AUD_SUP S Q
B3 B4 SUPPLY (SCALER)
NC
HERC_RESET 2 P1.4
6076
2
F905
R 2 B9 7955
F954
1 POWER_DOWN
B4 B5 3 7 3 3 2
OSC +1V8
2931
+3V3STBY
5931
7 F911
HERCULES (SUPPLY) F906 5910
B3 7001,7003 F014
FROM
SUPPLY 8
+12VSW
3910
6910
+VTUN
PANEL F907
+3V3STBY +1V8_A 9 7910
POWER_DOWN B2 B3 B4 6911
+1V8_B 10
STANDBY B2 7920
DECDIG F015 11 5920 1
BACK_LIGHT_ADJ1 B7 3 +8VSW_TV
12 F912
LAMP_ON_OFF B7 2921
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 20
R_OSD
G_OSD
Fast Blanking
B_OSD
99 Combfilter
2
COMPAIR
CVBS_SC1_AV1_IN 74
YUV IN/OUT
B10
A3 REAR IO SCART
AV3_CVBS_Y_IN 71 Sync Sep
HOUT 62 H_CS_SDTV
B8
10 CVBS_SC1_AV1_IN H-OSC
RGB/YPRPB Insert H-Shift
1101 + YUV Interface
H/V
H-Drive
FB/SC 66
21
CVBS/Y-X
20 CVBS-In 10
9 TER-Out
C-X
FBL-In AV3_C_IN 70
7 R-In VDRA 106
7101 Vertical & East-
6 G-In EF West Geometry
INSSW3
9 SC1 _CVBS_RF_OU
T SC1_CVBS_RF_OUT 86 VDRB V_SDTV
B/Pb-3
107
R/Pr-3
B8
UOUT
YOUT
VOUT
G/Y3
YSYNC
Status
UIN
VIN
YIN
5 B-In cvbs
L-In
2 L-Out 52 51 50 49 55 54 53 59 58 57 56
2 R-In SC1_FBL_IN
1 R-Out 1
7 SC1_R_V_IN
SCART 1 2057
6
2027
SC1_G_Y_ IN
5 SC1_B_U_IN 2056
B2 2055
LR_SC1_AV1_IN
2 L
SC1_LR_RF-OUT
1 R
SC1_LR
4 3 Y/CVBS 2 2 AV3_CVBS_Y_IN
SVHS
2 1 AV3_LR_IN
7101
5
CVBS
PC_AUDIO_LR
6 6
L
7 7
R
L 9 9
SVHS
R 10 10
AUDIO IN
7011 - SOUND
QSS/FM 7709
1751 1706 7703-1 TDA7297D
AD Conv I2S Proc STANDBY 1 1 STANDBY 9 1106
Std Stereo B2 HEADPHONE
SSIF(Tuner FM) 1704 1107
96 Decoder
B1 Audio 19 L+ 1 1
69 AUDOUTLSL AUDOUTLSL 2 2 L 7 1105
Control
BRIDGE 16 4
Vol/Treb/ 3 3 L- 2 2
L/R_SC1_AV1_IN 94,95 Bass AMPLIFIER 3 R
B10 4/2W
Features 68 AUDOUTLSR AUDOUTLSR 4 4 14 3 3 OR
R 2
AV3_LR_IN DACs 8/5V
B2 79,80 R+ 4 4
2 1 L
Audio Select 7751
ADC/DAC 74LVC08AD 5
7703-2 5 R- 5
SOUND_ENABLE 1
3 MUTE MUTE 5 5 MUTE 8
B2
PC_AUDIO_LR 75,76
POWER_DOWN 2 &
7752 1703
B2 12
AUD_SUP
SC1_LR_RF_OUT 11 OUT_MUTE
B10 92,93 EXT_MUTE 13 &
SC1_LR 7320
FROM 1,2-1200
OUT_MUTE INVERTER PANEL
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 21
F528 A4
F529 A4
F530 A4
F531 A4
F532 A4
F535 A4
F536 A4
F537 A4
F538 A4
F539 A4
I414 A4
I416 A4
I418 A4
I420 A4
I422 A4
H_17120_013.eps
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Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 22
I2C Overview
I2C BUS INTERCONNECTION DIAGRAM
B2 HERCULES +3V3STBY +3V3STBY
B1 TUNER + IF B7 SCALER
3355
3356
F303
7011 3353 SDA +3V3STBY +3V3STBY
TDA1502H1 20 SDA
SET
3354 SCL
PROCESSOR 21 SCL
PART OF F302
3302
3303
3431
3430
3414
3443
VIDEO- ERR
PROCESSER 6
(HERCULES)
+3V3STBY 5 6 5 4 78 77
93 SDA_IO
3097
3444
5 6
7402
M24C32
EEPROM
B8 SCALER IO 84 7
ERR
8
C1 C2
C3 C4
DDC_DVI_5V
16
24
8
3514
3495
1485
7 3497 SDA_DVI 80
6 3496 SCL_DV1 79
5 6
17
1
9
7490
DVI M24C02
CONNECTOR EEPROM
256x8 B6 SCALER
7403
ADDRESS MX29LV040
D SIDE I/O (UART PART)
ROM FLASH
+3V3_DVDD ROM
INTER
+3V3_DVDD FACE 512kx8
DATA
1111 1401 3401
3402
1 1 +3V3_DVDD
1112
JTAG_SDA_UART_TX 3123 3445 JTAG_SDA_UART_TX 3442 72
1 2 2
UART 3124 3446 3441
2 3 3 JTAG_SCL_UART_RX 71
FOR
SERVICE
3 JTAG_SCL_UART_RX 4 4
H_17120_029.eps
070607
Block Diagrams, Test Point Overviews, and Waveforms LC4.1E AC 6. 24
7 +3V3STBY
F906 B5 +3V3STBY
8 +12VSW +12VSW
B9
B9 SUPPLY
9 +8VSW_TV
B5 +8VSW_TV
POWER_DOWN A2 7955
10 3374 +3V3STBY +1V8
STANDBY A2 +3V3STBY +1V8
6005 TO 84 - 7011 B6
11 B5
+5VSW
BACK_LIGHT_ADJ1 A7 3936
B5 +5VSW
12 7954
LAMP_ON_OFF A7 +12VSW +12VSW 5955
S D
5959 5961 PAN_VCC PAN_VCC
B7
B5
+1V8_A
3937
+1V8_B PANEL_PWR_CTL G
7936
7930 B10 B7 CONTROL
B9
MC34063AD B8 7952
3935 F913 B7
8 SUPPLY 1 5931 5932 +5VSW B4
B3
IC B2
B3 HERCULES
6930
B1
5910 F911 B5 +3V3STBY 1007
+12VSW 5930 6 2 6910 +VTUN
B1
+3V3STBY
5
B10 REAR IO SCART
3910
7001 +5VSW
6911 +1V8_A +5VSW
7920 B5
7910
L78M08CDT
F912
+12VSW 5920 1 3 +8VSW_TV +8VSW_TV 7004
B2
CONTROL
J FRONT IR/LED
7003
+1V8_B
1870
5
+3V3STBY
7002
DECDIG
B2 CONTROL
+5VSW
B5 +5VSW
B5 AUD_SUP
AUD_SUP
RES
B5 +5VSW
+5VSW
B5 +3V3STBY
+3V3STBY
B5 +3V3STBY
+3V3STBY
5401 +3V3_AVDD +3V3_AVDD
5404 +3V3_DVDD +3V3_DVDD
B9 +1v8
+1V8
5402
+1V8_AVDD
5403
+1V8_DVDD
+3V3_DVDD
+3V3_AVDD
+3V3STBY
I AUDIO AMPLIFIER
B5 +3V3STBY LVDS 1404
+5VSW LCD 1703
B5 +5VSW CONN.
1 1
DISPLAY AUD_SUP
2 OR 2
B9 PAN_VCC PAN_VCC
1402
36
38
OR
TTL 42
CONN.
H_17120_030.eps
070607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 25
D101 D103
F109
5sec
X101 R101 C112
F119 F123 F124 PDZ30B BAS316 F115 F111 R111 F112
400V
R112 F108
F9 F113
C125
R125
100K
4K7
1000uF 25V
100uF 25V
33pF 50V
1
10nF
S10K420
J110
+
275V
C201
C222
F116 D105 D106
R102
C110
1M2
R109
275V
2 L110
F178
+
2
220nF
L111
1N4006 1N4006 C116
C111
L140
100uF 450V F35 F60
ST-02G-AAGBF 10
X100 D108 D107
220nF
CUR1712BD2 CUR1712BD2
F30
2KV
X120
gnd_aud
HER107
F117 1N4006 1N4006 HEATSINK
J111 gnd_aud
C126
D125
R113 F107 C114 F118
47pF
3
F120 F24
D202 D203
4K7 33pF 50V +155V
F18
HER107 HER107
450V
F12
F25
+
13
C203 C204
C205
D129 F176 R129
C102
1nF
47uF
T120
5sec
100pF 1KV
BAS316 47R 100pF 1KV 100pF 1KV
C120
R128 D128
F14
F125
R120
47K
1M5
R264
10K
1000uF 25V
100uF 25V
L130 D130
15nF 400V
F1 F127
.
+
HV
C206
C220
T121 F11 7
C145
2.2uH
F188 1N4006 BC327-25 F44
D206
R122 R123 R124
BAS316
R269
1R2 1R2 1R2
2K2
1% U130
R147
R265
1M5
TY72011AP2 R127
1K
C207 F173 2K2 F49
1 HV NC5 14
F133
330R
470pF 50V
F15
F128 F55 10nF 50V R272
2 13
C127
NC1 VCC
150K
R267
47K
F187
BAS316
F131
D136
5 CT GND 10
Demag
680pF 50V
100nF 50V
F105 4
6 9 +5VTR
R148
C137
150K
C136
OVP NC4
F135
1nF 50V
+5Vreg
R131
C130
22K
100K
SRA1060
5K6 1%
1000uF 25V
100uF 25V
FR106G
D134
+
5
R256
C208
C221
F78
R133
120K
25V
C142
C141
R143
PDZ22B
1M5
D133
F63
+
6 8
C134
F64
R132
100K
C132
F104 3K9
BC846U F84
10K 1%
R137
R259
1K5
F19
100nF 50V
C140
C227
F6 R130
R255
F83
3K9
Demag 2.2nF
2K2
+5Vreg Vreg
50V
R135 D132
820R 1%
F140 F141
C131
R260
F143 R295
68pF
F37
30K BAS316 U190-B U190-A
VCC 4 1
50V
100nF 50V
100pF 50V
1K
BAS316
1%
Vreg
D135
C133
C138
C135
R294
22nF
R297
2K7
4K7 F21
D201 F23
L202 F26 F28
3 2 3V3
R134
5K6
1000uF 25V
470uF 25V
22K
+
C209
C210
PDZ5.6B
U290 F40
D137
8K2 1%
TL431ACZ-AP
R298
F144 F159
R139
R291
4K7
220R
C139
R200
22nF
F42
SGND
3122 427 2471.0 ... dotted components are reserved items H_17120_015.eps
070607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 26
X201
CON BM V 12P M 2.00
1
+Vaudio
2
gnd_aud
3
3V3
4 VDD
6 4K7
R331
7
8
+12V F157 R334 D360
F76
D330 F67 R330 F70 C332
9
Power_OK 10K BAS316
BAS316 11K 1% 22nF 50V
BAS316
10
D361
R361
R362
R332 10M
R360
390R
390R
390R
Stby
100nF 16V
C334
11
R313
2KV
150K
2
C361
U300 C360 F71
UBA2070T SGND 1
F161
22pF
F81
7
F189 F181
220nF 100V
C303 1 16
CT CS- F53
470nF 25V 6
1R
R306
F57 SGND F166
C304 2 15 4
R312
2KV
CSW CS+ X305
150K
100nF 16V HEATSINK
C362
F58 F165 R301
22pF
C305 3 14 SGND
CF Vref F85 F90 F91
82pF 50V 5
F190 F59 1K
R300 4 13 SGND 2 3
FBA04HA900B-00
Iref LVS
36K 1%
L305
C301
5 12
R311 GND
150K
X203 ACM
330pF 500V SGND T305
CON BM V 5P M 2.00 6 F68
GL 11
SH CUF2125BD6 X362
+5V 1
SGND F56 7 10
F169 F168 R303 F163 61207
Vdd L365
2
VDD GH
8
F92 F93
1
F180 C302 100R STP5NK50ZFP
470nF 25V
8 9
22pF 2KV
NC FVdd R304 F164 D305 R305
PDZ15B
3 2
C300
C366
D300
100nF 50V
1
47R BAS316 47K
4 F61 7 3
F86 F87
R302
2R7
F155
5 C365 SGND 6 4
4 SGND SGND
2KV
SGND SGND T310
X361
1KV
C367
220nF 100V F72
61207
22pF
C310
F171 SGND R308 F170 F94 F95
5 1
68pF
2 3
100R STP5NK50ZFP F82
2
R309 F167
D310 R310
3
47R BAS316 47K
Vreg
Vreg Vreg Vreg Power_OK +12V X310 CUF2125BD6 4
HEATSINK
SGND L370
F96 F97
F147
8
T345
22pF 2KV
R345 F150 BC847B
C371
C370
1% F73
1
R348
R353
R354
R347
2K2
4K7
4K7
4K7
47R SGND 7
220nF 100V
BAS316
VDD
D345
F174 F156
6
F183
F149 D346 4
R343 PDZ2.7B T350
22pF 2KV
F186 F152 F172
C372
BC847B X365
10K F191
BC847B
SGND 61205
R357
T341
4K7
SGND 5 1
D341
R355
2 3
+5VTR
R344
1K2
BC847B
R346
2
10K
R342
10K
T343
T342
R352
D350
F154
30K
T344
SGND SGND BAS316
16V
10nF 50V
BAS316
C341
BC847B
R356
R358
C342
D342
4K7
820R
F51 F52
100nF
50V
50V
10K BAS316
R350
C351
C350
R351
C352
10K
560R
3.3nF
68nF
22nF
R370
4K7
T340
BC847B
F148
L365 L370
X360 L360 X365
C111
J002
R334
J015
J001
Type Plate
J016
C370
J003
L111
J111
J110
J006
R111
X310
D106 X305
U332
D107
L110
barcode label
D108 T310
C116 T305 area for UL marking
C112
C310
C360 C203 C204
-
D105 D130 C365 D202 L305 R306
C110 D203 C208
AGAINST RISK OF FIRE
C205
REPLACE ONLY WITH SAME TYPE
FOR CONTINUED
C125
+
D207
CAUTION:
+
PROTECTION
R109
X100 R122
D125
+
R125
AND RATING OF FUSE
R123 X207
D200 J022
J023 L205
1
C201
+
L130
R124
U130
2
5V
10
C120
R
L140
C126 GND
C221
+
C134
R258
D201 L202
C209
J020
J027
T3.15AH R127
X203
D131
C145 T120
250V C220
C210
X120 U190 L201
+
ATTENTION D205
C222
+
J021
C140 T213
D134
LIVE PARTS
+
C102 L204
R264
3122 423 32153 U290 X201 1
H5 H6 H2 H1 H4 H3
IC HV FT BT
BL_ON
GND
GND
GND
GND_aud
C206
3V3
3V3
12V
Pwr_ok
Vaudio
Stby
3122 423 32143 3122 423 32143
H_17120_017.eps
3122 427 2471.0 070607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 28
R352
T350
C351
D350 R351
C352
CAUTION:
R350
C350
HIGH VOLTAGE
C302
C301
R302
R301 U300
D351
D352
D353
D360
J005
J028
J011
R361
R362
R360
C304
R300
C303
C300
C305 D300
D305
D310
D341
J012
J018 D361
R370 R309
R308
T340 R304
R303
R310
R341
R340
R305
C113 C114
J013
C334 R332
T342
R346 R355
R311
T344
R356
T341
R330
R344
R312 R313
C341 R343 J014
R345
R342
R357
D345
-
R200
R349
D104
D103
T343 R348 R260
R353
4
6
R347 C342
T211
R354
D343
J017
J029 J019
C293
1
J026
D101
C227
D102
+
R250
1
R130
C131
R128
R120
D128
C136
J007
R129 D129
R131
C137
D136
J008 J010
R146
J004
C127
T135
R133
R137 C130
D132 R147
C132
C138
D133
R132
C142
R144
R294
R135
C133
R134
C135
R145
C141 R148
D135
C139
R139
D206 R295 R143
T101
R297
R270 D137
T215 R298
1 R271 R292 C292
R272
R267
R265
R291
D101 D103
F109
5sec
X101 R101 C112
F119 F123 F124 PDZ30B BAS316 F115 F111 R111 F112
400V
R112 F108
F9 F113
C125
R125
100K
4K7
1000uF 25V
100uF 25V
33pF 50V
1
10nF
S10K420
J110
+
275V
C201
C222
F116 D105 D106
R102
C110
1M2
R109
275V
2 L110
F178
+
2
220nF
L111
1N4006 1N4006 C116
C111
L140
100uF 450V F63 F35 F60
ST-02G-AAGBF 8
X100 D108 D107
220nF
CUR1712BD2 CUR1712BD2 F64
F30
2KV
X120
gnd_aud
HER107
F117 1N4006 1N4006 HEATSINK
J111
C126
D125
R113 F107 C114 F118 F104
47pF
3
F120
4K7 33pF 50V Vreg
F18
F12
F21
D201 F23
L202 F26 F28
D129 R129
7 3V3
F176
6.8uH
C102
1nF
T120
5sec SR304-21-F74
100pF 1KV
1000uF 25V
470uF 25V
BAS316 47R
C120
+
C209
C210
R128 D128
F14
F125
R120
47K
2M2
F1 F127
. HV T121 F11
C145
2.2uH
F188 1N4006 BC327-25
R122 R123 R124
1R2 1R2 1R2
U130
R147
2M2
TY72011AP2 R127
D202 D203 +155V
F24
1 14 13
450V
HV NC5 330R
F133
470pF 50V
+
F15
C205
F128 HER107 F25 HER107
2 13
C127
NC1 VCC
47uF
C203 C204
VCC F129
3 12
F137
R144
150K
5 CT GND 10 12
Demag 6.8uH
680pF 50V
100nF 50V
F105 4
SR309-03-F74
6 9 3V3
R148
C137
150K
C136
R264
OVP NC4
10K
1000uF 25V
100uF 25V
F135
1nF 50V
+
R131
C130
22K
C206
C220
7 NC2 NC3 8
F44
D206
F134
BAS316
+5VTR +5Vreg
R145
R269
2K2
68K
R265
D207
FR106G
1K
F47
D134
5 9
C207 F173 2K2 F49
SRA1060
R133
120K
100nF 50V
1000uF 25V
F136 VCC F55 R272
+
X207
C208
BC857B
HEATSINK
T101 F13 D131 F179 T215 F62 15K F50 15K
F132 BC847B
25V
25V
C142
C141
R143
PDZ22B
1M5
D133
22uF 50V
470nF
470nF
6 10
R267
C134
47K
100nF 25V
R132
100K
C132
gnd_aud
R137
1K5
F19
C140 L205 T210
F65 F66
STP16NF06FP +5V
F6 R130 6.8uH
Demag 1nF
5K6 1%
+5Vreg Vreg
100uF 25V
2K2
50V
+
R256
D132
C221
R135 F140 F141 F78
C131
F143 R295
68pF
F37
30K BAS316 U190-B U190-A C293 F69 10K
VCC 4 1
50V
100nF 50V
100pF 50V
1K
BAS316
D135
C133
C138
100nF 50V
C135
R294 R257
22nF
R297
4K7
2K7
3 2
C292 R292 T211-A T211-B +12V
R134
F39 F142
5K6
3K9
PDZ5.6B
10K
R259
100nF 50V
TL431ACZ-AP
C227
R298
8K2
R255
F83
3K9
X204
F54
50V
R291
R260
220R
820R
R139
4K7 R200
C139
22nF
F42
X201
B12B-PH
1
+Vaudio
2
gnd_aud
3
3V3
4 VDD
6 4K7
R331
7
8
+12V F157 R334 D360
F76
D330 F67 R330 F70 C332
9
Power_OK 10K BAS316
BAS316 11K 1% 22nF 50V
BAS316
10
D361
R361
R362
R332 10M
R360
390R
390R
390R
Stby
100nF 50V
C334
11
R313
2KV
150K
2
C361
U300 C360 F71
UBA2070T SGND 1
F161
22pF
F81
7
F189 F181
220nF 100V
C303 1 16
CT CS- F53
470nF 25V 6
1R
R306
F57 SGND F166
C304 2 15 4
R312
2KV
CSW CS+ X305
150K
100nF 50V HEATSINK X361
C362
F58 F165 R301
22pF
C305 3 14 SGND BHSS-61205
CF Vref F85 F90 F91
82pF 50V 5 1
F190 F59 1K
R300 4 13 SGND 2 3
FBA04HA900B-00
Iref LVS
2
36K 1%
L305
C301
5 12
R311 GND F86 F87
150K
X203 ACM
330pF 500V SGND T305
B05B-PH 6
GL SH
11 F68 SGND
+5V 1 CUF2125BD6 X362
SGND F56 7 10
F169 F168 R303 F163
BHSS-61205
Vdd L365
2
VDD GH
8
F92 F93
1
F180 C302 100R STP6NK60ZFP
470nF 25V
8 9
22pF 2KV
NC FVdd R304 F164 D305 R305
PDZ15B
3 2
C300
C366
D300
100nF 50V
1
47R BAS316 47K
4 F61 7
R302
2R7
F155
5 C365 SGND 6
4 SGND
2KV
SGND SGND T310
1KV
X363
C367
220nF 100V F72
22pF
BHSS-61205
C310
F171 SGND R308 F170 F94 F95
5 1
68pF
2 3
100R STP6NK60ZFP F82
2
R309 F167
D310 R310
22pF 2KV
R345 F150 BC847B 2
C371
C370
F73
1
R348
R353
R354
R347
2K2
4K7
4K7
4K7
47R SGND 7
220nF 100V
BAS316
VDD
D345
F174 F156
6
F183
F149 D346 4
R343 PDZ2.7B T350
22pF 2KV
F186 F152 F172
C372
BC847B X365
10K F191
BC847B
SGND BHSS-61205
R357
T341
4K7
SGND 5 1
D341
R355
2 3
+5VTR
R344
1K2
BC847B
R346
2
10K
R342
10K
T343
T342
R352
D350
F154
30K
T344
SGND SGND BAS316
16V
10nF 50V
BAS316
C341
BC847B
R356
R358
C342
D342
4K7
820R
F51 F52
100nF
50V
50V
10K BAS316
R350
C351
C350
R351
C352
10K
560R
3.3nF
68nF
22nF
4K7
T340
BC847B SGND SGND SGND
F148
10K
R341
3122 427 2474.0 SGND SGND ... dotted components are reserved items H_17120_020.eps
070607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 31
R334
L365
L360
J001
J015
HIGH VOLTAGE
Type Plate
J016
C370
J003
L111
J111
J110
J006
R111
X310
D106 X305
U332
D107
L110
barcode label
D108 T310
C116 T305 area for UL marking
C112
C310
C360 C203 C204
-
D105 D130 C365 D202 L305 R306
C110 D203 C208
AGAINST RISK OF FIRE
C205
REPLACE ONLY WITH SAME TYPE
FOR CONTINUED
C125
+
D207
CAUTION:
+
PROTECTION
R109
X100 R122
D125
+
R125
AND RATING OF FUSE
R123 X207
D200 J022
J023 L205
1
C201
+
L130
R124
U130
2
5V
10
C120
J009
+
T121 T210
L140
C126 GND
+
C134
R258
D201 L202
+
J020
C209
J027
T3.15AH R127
X203
D131
C145 T120
250V
+
C220
C210
X120 U190 L201
+
ATTENTION D205
C222
J021
C140 T213
D134
LIVE PARTS
+
C102 L204
R264
3122 423 32193 U290 X201 1
H5 H6 H2 H1 H4 H3
IC HV FT BT
BL_ON
GND
GND
GND
GND_aud
C206
3V3
3V3
12V
Pwr_ok
Vaudio
Stby
3122 423 32183 3122 423 32183
H_17120_021.eps
3122 427 2474.0 070607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 32
R352
T350
C351
D350 R351
C352
CAUTION:
R350
C350
HIGH VOLTAGE
C302
C301
R302
R301 U300
D351
D352
D353
D360
J005
J028
J011
R361
R362
R360
C304
R300
C303
C300
C305 D300
D305
D310
D341
J012
J018 D361
R370 R309
R308
R304
R303
R310
R341
R340
R305
T340
C113 C114
T341
J013
D345
R356
R330
R344
R312 R313
C341 R343 J014
R345
R342
R357
-
R200
D342
D346 T345 R256 R255
R257
R259
R349
D104
D103
T343 R348 R260
R353
4
6
R347 C342
T211
R354
J017
J029 J019
C293
1
D101
J026
D343
C227
D102
+
R250
1
R130
C131
R128
D128
R120
C136
J007
R129 D129
R131
C137
J008 J010 D136
R146
J004
C127
T135
R133
R137 C130
D132 R147
C132
C138
D133
R132
C142
R144
R294
R135
C133
R134
C135
R145
C141 R148
C139
R139
D206 R295 R143
R297
T101
R270 D137 D135
R298
T215
R271 R292 C292
R272
R267
R265
R291
C207
1 R269 J025
B1 TUNER + IF B1 1330 D9
1331 C1
1332 B1
2302 D2
1302 2303 D3
With FM *
UR1316 2307 D4
Without FM UV1318 2308 D4
A 1302
UR1316/A I H-3 A 2309 B6
2311 C5
GAIN 2313 E5
TRACK CTRL TRACK
PRE-FIL FILTER FILTER 2314 E5
PRE-AMP
2317 F6
2318 E6
RF MIX-OSC 2321 C7
IFOUT 11 0V
F306 IF_TER 2324 C8
TV IF AMP 3302 C1
I57 F305 3303 C2
ITV INTERFACE +3V3STBY FM_IFOUT 10 0V +5VSW
1332 3309 B6
3311 C6
5 6 RF AGC 3314 E6
4 DET 3315 F6
B 3
2
FM
F301 PLL
5309
12u +5VSW B 3316 E6
12 15 3309 3317 F6
1
MT MT 3319 D6
BM04B-SRSS-TBT 13 14
NC 10K 3320 E7
3321 C7
TU|FM
5324
AGC
VCC
ADC
SDA
3322 C7
SCL
2309
NC
AS
VT
330u 6.3V 6u8
3323 C7
2V9
2V6
2V6
3327 D4
FOR SERVICE
CONNECTION
2V3
5V3
5V3
32V5
NC
NC
COMPAI R
8
1 6310 5309 B6
F308 5321 C6
2
BAS316 2324
3 F312 5324 B8
S302
10n B2
S301
VIF2
3322 6310 C6
C S3B-PH-K
3311
2321 I307 6K8
1328
OFWK3953L C 6323 C7
7316 E6
4339
RES
2 7
F307
I303 40M4
0V6 2318 F311
SSIF B2
F F
FOR FM RADIO ONLY
H_17120_001.eps
3139 123 6019.2 060607
1 2 3 4 5 6 7 8 9 10
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 34
SSB: Hercules
1 2 3 4 5 6 7 8 9 10 11
1001 F2 3068 H3 I036 C6
1010 A2 3070 F7 I039 B10
B2 HERCULES B2
2004 B5
2006 G2
3073 E10
3075 E10
I040 B9
I041 B10
+5VSW 2007 G2 3077 D10 I043 B9
+5VSW 2008 F2 3078 F6 I044 C10
6005 BAS316 +5VSW 2009 E2 3079 F7 I046 H6
+8VSW_TV
+1V8_A 2010 F2 3080 F7 I047 G6
A A
5005
+3V3STBY
5071 +1V8_B
+1V8_A +1V8_A 3052
2011 E3 3081 F6 I048 H6
+3V3STBY
+5VSW
100R 2013 B6 3082 F7 I049 G3
I057
1010 2016 D3 3086 D10 I051 G3
5370
5008
5372
5002
5371
5060
5072
5004
5006
1 2017 D3 3087 D10 I052 G3
B2 AV3_CVBS_Y_IN F040 3374 2051
2 2018 D3 3091 D10 I053 E3
10R 10u 2023 2049
3
220n
2023 A7 3092 D10 I055 B5
100n
2004 220n
AV3_C_IN 16V 220n 10u 16V
FROM 1108 OF
B2 F041 4V4
220n
220n
2033
4
220n
220n
220n
I015
100n
2027 G3 3093 E8 I056 G1
SIDE AV BD
5 RES I040
2396 3012
B2 AV3_L_IN F042 2030 C2 3094 E8 I057 A10
6
F003
2394
2074
I055
AV3_R_IN 10u 16V
I070
B2 7012
I017
I019
F043 7 AUDIO PROCESSING 100R 1V9 B_SDTV 2031 C2 3097 F10 I058 E6
2395
100n
36 2V 2379
2378
2076
220n
7370-2 7370-1 B8
2V
BC847BW
2068
2013
8 2032 C2 3350 G9 I059 E6
2V
GND_COMB BC847BS BC847BS
2044
F044
3V3
9 RES 1V3
I008
I039 2033 B6 3351 B6 I060 E6
114 5V4
82 5V4
33 2V
125 3V3
3V3
OUT_MUTE
35 3V3
4 1
8V
F045 10 0V 4050
1262V
2035 C3 3352 D7 I061 E7
B 0V B4
B
560p
560p
12 11 7011
5V4
84
41
12
29
60
19
47
TDA12001H1/N1B50 2036 C3 3353 F10 I062 E6
F034
5V4
5
5 2
TDAXXXX1H NAFTA 2037 C3 3354 F10 I063 F6
VCC8V
VDDA1
VDDC1
VDDC2
VDDC3
VDDC4
VDDCOMB
VDDP_3.3
VP1
VP2
VP3
4V4
VDDA_1.8
VDDA2_3.3
VDDA3_3.3
VDDADC_1.8
3 6
B10
TO SIDE AV BD
PC_AUDIO_L TDAXXXX1H AP-NSTC / LATAM 3V9 3V9 SC1_L 2043 F1 3355 F10 I064 F6
3019 I043 7013
2397
2398
PC_AUDIO_R TDAXXXX1H EU / AP-PAL SC1_R B10 BC847BW 2044 B4 3356 F10 I067 F6
100R 1V9 G_SDTV
2u2 2V2 5V RF_AGC B1 I041 2049 A10 3359 E3 I068 F6
2355 83 98 3351 680R B8
AGC2SIF AGCOUT
2391 47p 50V 2V2 76 67 2359 10n 1V3 2050 H3 3371 C7 I069 C9
AUDIOIN2L AUDOUTHPL RES
2382 2u2 2V2 75 66 4051 2051 A6 3372 C7 I070 B5
2383 AUDIOIN2R AUDOUTHPR 3390 100R AUDOUTLSL B4
2u2 2376 100n 2V2 73 VIDEO 69 3V8 2052 D2 3374 A4 I071 G6
AUDIOIN3L AUDOUTLSL
2399 47p 2377 100n 2V2 72 68 3V8
2389 47p 2V2 80
AUDIOIN3R SIGNAL AUDOUTLSR
93 3V9 3391 100R AUDOUTLSR B4 4V4 2053 D3 3375 F7 I082 F6
B2 AV3_L_IN 2384 2u2 2V2 79
AUDIOIN4L PROCESSOR AUDOUTSL
92 3V8 2054 D3 3376 D6 I091 D10
AV3_R_IN AUDIOIN4R AUDOUTSR 3020 I069 7014
B2 2385 2u2 2V2 95 HERCULES 96 0V6 BC847BW 2055 G3 3389 E6 I093 E11
AUDIOIN5L AVL 3371 SC1_L_RF_OUT
C B10 L_SC1_AV1_IN
2390 47p 2036
2037
47p
47p
2V2
1V3
94
49
AUDIOIN5R
B
SWO
SSIF
100R B10 100R 1V9 I044 R_SDTV
B8 C 2056 G3
2057 G3
3390 C7
3391 C7
3372 100R SC1_R_RF_OUT B10 1V3
PBIN3 REFO RES 2058 E3 3394 F1
B10 R_SC1_AV1_IN 1V3 50 4052
SC1_B_U_IN G REFIN 2060 D2 4013 G2
B10 2032 100n 42 1V8
SC1_G_Y_IN YIN3 BO
B10 2031 100n 1V3 51 43 1V8 I035 2061 D2 4015 G10
SC1_R_V_IN R GO
B10 2030 100n 44 I034
1V9 I036 2063 F3 4050 B9
2035 4u7 PRIN3 RO
RES 3048 10K F029 2V4 46 65 SSIF 3352 680R 2068 B5 4051 C9
+3V3STBY 35V BCLIN CVBSO SSIF
2052 1n0 2V9 45 B1
BLKIN PIP 3376 2072 E2 4052 C9
RES 3054 10K 1V6 70 85 0V 100K
AV3_C_IN C2 DVBO 2073 G7 5002 A5
B2 2018 10n
C3 FMRO SC1_CVBS_RF_OUT B7
2054 100n 1V6 77 86 2V9 3058 100R B8/B10 3091 100R I091 TV_IRQ 2074 B5 5003 E1
C4 DVBO 3092 4K7
B10 CVBS_SC1_AV1_IN 2016 100n 1V4 74
CVBS2 IFVO +3V3STBY 2076 B5 5004 A6
+3V3STBY
Y2 FMRO 2078 E7 5005 A6
D B2 AV3_CVBS_Y_IN 2017 100n 1V4 71
CVBS3
Y3
EWD
AVL
108
0V1 F006 F013 3077 4K7
+3V3STBY
D 2099 F10 5006 A6
2060 100n 2053 100n I016 1V4 78 63 0V7 SANDCASTLE 3005 27K 3011 6073 BAT54 CO L 2355 B3 5008 A4
CVBS4 FBISO 4K7
CSY
2356 E3 5013 G3
2061 Y4 F007 H_CS_SDTV
2V3 109
DECBG HOUT
62 2V9 B8 2357 E2 5060 A5
B3 DECDIG 10u 16V 2V5 115 81 2V2 3009 100K 3086 2K2 +3V3STBY
DECDIG IFVO B3
2358 G6 5070 D2
2375 10u 16V 2V2 91 I011 3087 10K PC_TV_LED
5070 DECSDEM SVO 2359 B7 5071 A5
+1V8_B F021 1V9 11 CVBSI F004
2072 1n0 0V4 DECV1V8 2372 F1 5072 A5
220n 2058 97 23
EHTO I2SDI1
2374 100n I053 V0 52 2374 E2 5370 A4
SC1_FBL_IN INSSW3 O 0V
B10 3060 39K 1V9 102 24 2375 D2 5371 A5
IREF I2SDO1
2V3 112 25 3V3 NVM_WP RES 2376 C3 5372 A5
+5VSW PH1LF I2SDO2 +1V8_B
I020 0V 113 26
2357 100n 3359 390R 2V 88
PH2LF I2SCLK
27 3V3 3389 100R EXT_MUTE B4 7070 2377 C3 5375 F1
PLLIF I2SWS 3073 BC847BW 2378 B5 5376 G1
E 5003 2356 2u2
2011 220n 2V3
1V9
110
87
SECPLL
SIFAGC
INT0
P0<0:5>
32 3V3 I060
2078
3094
100p 3093
10R
4K7
+3V3STBY
IR B3
HERC_RESET 1K0 0V E 2379 B4 6005 A4
50V 31 3V3 I059
I093 2380 F2 6073 D10
F022 SIF1 DVBAGC INT1 100R I061 TV_SC_COM
B1 1V9 100 30 3V3 3016 B7 2381 F2 6076 F10
3008 2009 SIFIN1 T0 I058
3007 4K7 3 3V2
F002 47K
B1 SIF2 1V9 99
DVBIN1 INT2
22 2V8 I062 2382 C2 7011 B4
1u0 10V SIFIN2 T1 2383 C2 7012 B10
2 0V F020 HERC_RESET
DVBIN2 RX 4K7 +3V3STBY
2008 116 1 3V3 I009 3075 2384 C2 7013 B10
VGUARD TX POWER_DOWN B4,B5
2043 470n 10V 2010 6n8 21 2V8 I063 6076 BAT54 CO L 2385 C2 7014 C10
100n SWIO SCL I064
B1 VIF1 1V9 105 20 2V8 2386 G2 7070 E10
VIFIN1 SDA
3059 1K0 B1 VIF2 1V9 104 3355 3K3 +3V3STBY
VIFIN2 P1<0:7> 3375 100R
SCL B1,B7 2387 G1 7099 F10
121 18 3V3 I067 SOUND_ENABLE B4 3354 100R
+3V3STBY VREF_NEG_HPL+HPR TPWM 2388 F1 7370-1 B8
123 17
5375 3394 VREF_NEG_LSL+HPL PWM0 3082 100R
120 16 3V2 SC_RESET B7 3356 3K3 +3V3STBY 2389 C2 7370-2 B7
1m0 75R VREF_POS_HPR PWM1 B1,B7
F 2380 100u 16V
3V1 I018 124
122
VREF_POS_LSL
VREF_POS_LSR+HPR
PWM2
PWM3
15
7
0V I082
3V3 3070 100R
3353 100R SDA
F 2390 C2
2391 B2
F002 E1
F003 B5
1V6 38 6 3V3 3078 4K7 3079 2K2 +3V3STBY 3097 4K7
VREFAD PWM4 +3V3STBY +3V3STBY 2392 F1 F004 D10
2392 2393 2372 2388 2381 100n 40 P50_LINE_ITV_IR_SW B3
8 3V3
330u 100n 100n 470u VREFAD_NEG P2<0:5> 2099 7099 2393 F1 F005 G6
3V3 39 14 0V7 3013 100R LIGHT_SENSOR B3
6.3V 16V VREFAD_POS ADC0 1n0 M24C16-WMN6
2063 150n 2V5 103 13 0V I068 STATUS_1 B10 2394 B4 F006 D6
VSC ADC1
1001 24M576 1K0
1V6 119
XTALIN ADC2
10 0V 3064 10K 3080
+3V3STBY 2395 B4 F007 D6
1V5 118 9 3V2 3081 100R 1% KEYBOARD B3
100n XTALOU T ADC3 3V3 (2Kx8) 2396 B4 F013 D10
2056 I051 1V3 58 I071 2073 10n 7
UIN P3<0:3> RES WC 2397 B2 F020 E6
+3V3STBY 2057 100n I052 1V3 59 90 2V8 2358
VIN QSSO F026 2V4 EEPROM 2398 B2 F021 E3
RES RES 100n 2055 1V8 57 AMOUT 6 1
YIN SCL 0
2007 2006 4013 100n 2027 I049 1V9 56 AUDEEM
RES
F005 3061
2 2399 C2 F022 E1
I056 8p2 8p2 YSYNC 100K 2V4 ADR 1
64 2V 5 3 3005 D7 F023 H4
SVM SDA 2
3006 54 0V1 3006 G2 F026 G10
UOUT I047
G 3350 F099
G
4
5376 470R 106 4K7
VDRA I022 B8
+3V3STBY 3007 E2 F029 D3
107 V_SDTV SEL_IF B1
VDRB 3008 E1 F034 B2
53 3V5 4015
VOUT
5013 55 3010 FOR SERVICE SDM 3009 D6 F040 A2
YOUT
VSSCOMB
5V3
VSSADC
1V7
3067 4K7
VSSC2
VSSC3
VSSC4
VSSA1
VSSP2
GNDIF
2387
220n FOR ITV
330u 6.3V 3012 B9 F043 B2
2050 3013 F6 F044 B2
101
111
89
48
37
117
34
8
28
4
0V 127
GND_COMB 0V 61
0V 128
3062
3020 C9 I008 B6
0R
3048 D2 I009 E6
RES
3052 A10 I011 D6
H FOR SECAM ONLY
3065 0R H 3054 D2 I015 B5
Y_HERC 3058 D6 I016 D3
V_HERC 3059 F2 I017 B5
3068 0R U_HERC
3060 E3 I018 F3
3061 G6 I019 B5
H_17120_002.eps 3062 H3 I020 E3
3139 123 6019.2 060607 3064 F6 I022 G7
3065 H3 I034 C6
3067 G9 I035 C6
1 2 3 4 5 6 7 8 9 10 11
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 35
SSB: Hercules
1 2 3 4 Personal Notes:
1006 B2
B3 HERCULES B3
1007 B1
1008 A1
1684 A2
2001 E3
2012 D2
2024 E2
2067 B2
2082 D3
A TO 1308 OF TOP CNTL BD
A 2083 E4
+3V3STBY +5VSW 3001 C1
RES *EMC 3002 C1
1008 1684 5061 3003 C2
1 1u0 +3V3STBY
1 3004 C2
2 2 3063
6060
3024 E3
3 2K2
B2B-PH-K
BZX384-C2V7 3063 A3
LED_SEL 0V 3066 D3
*EMC I098 5061 A2
2067 7060 5062 B3
1n0
TO 1870 OF FRONT IR/LED BD
3001 3003
3002 3004
3R9 22K 3R9 22K
I005
7001 7003
3V1 BC807-25 3V1 BC807-25
2V5 3
D 3
1
2V5
1 2V5
D
7004 7002
BC847BW BC847BW 3066
2 I096 4K7 I094
2 DECDIG B2
+1V8_A F014 2V5
2082
2012 100n
10u 16V
+1V8_B
F015 3024
2024 4K7
2001 2083
E 1u0 50V 100n 10u
E
H_17120_003.eps
3139 123 6019.2 060607
1 2 3 4
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 36
B4 B4 2703 C4
2712 B4
2714 A7
2718 A4
2719 A6
AUD_SUP 2724 B5
11V1 2736 A7
2737 B7
2719 2714 2738 B8
A 100n 470u 16V
A 2739 B8
2741 B4
AUDIO AMP 2 X 2W
2742 B4
7712 P_GND P_GND
TDA1517ATW 15 16 3706 B4
VP1 VP2 3717 B3
5736 2736 1701 3719 C2
3744 I719 2718 I706 I710 2u2 470u 16V I721
B2 AUDOUTLSL 2V1 3
IN1+ OUT1A
8 OUT1
1 L TO 1110 OF SIDE AV 3722 C4
POWER OUT1B 9 5V3 4736
F707 8K2 1u0 2737 2 GND 3725 C3
*EMC 2V1 18 AMPLIFIER I711
3727 2742 IN2- OUT2 470u 16V 3R 3726 B4
12
3K9 470p OUT2A I722
13 5V3 5737 3727 B4
OUT2B 2u2 EMC EMC 3744 A2
2712 10V8 17 1 4737 2738 2739
I701 1u0 I707 MODE 3745 B2
B B2 AUDOUTLSR 3745
I709
5
2
6
1n0 1n0
B 3751 D3
F708 8K2 AUD_SUP SVRR 3752 D2
*EMC 5V3 7
NC
3726 2741 14 3753 E4
+3V3STBY 3K9 470p 19 3754 F3
3717 P_GND
20 3755 F4
10K 2724
I714 3706 I708 100u 10V 4736 B7
PGND
3719 SGND 1 2 HS 4737 B7
10K 11V2 +3V3STBY 3722 10K 4 10 11 21 4751 D2
8K2 F710
I720 2703 4752 F3
10u 16V
5736 A7
3V3 3725
10K 7703 I715 P_GND P_GND 5737 B7
BC847BW 11V2
C B2 STANDBY
7702
BC847BW
3V2
3V3
C 5751 E5
7702 C3
I705 Audio Amplifier 7703 C3
7712 A5
3V3
7751-1 D2
RES 7751-2 E2
4751 7751-3 E2
*+3V3STBY 7751-4 F2
7752 F4
F707 B1
1751 F708 B1
3751 B2 STANDBY 3V2 F710 C7
D 4X AND GATES
100R
I751
B2 AUDOUTLSL 3V7
1
2 TO 1706 OF AUD AMP 2X5W D F751 D2
F752 F4
7751-1 3
74LVC08AD B2 AUDOUTLSR 3V7
4 F753 F2
14
3V3
SOUND_ENABLE F751 5 I701 B2
B2 3V3 1 7 6
3 3V3 MUTE I705 C3
POWER_DOWN 3752 3V3 2 I706 A4
B2,B5,B7 100R 5751 I707 B4
7
I708 B4
I709 B5
7751-2 I710 A7
14
74LVC08AD I711 B7
4 I714 B3
E 5
6
+5VSW
E I715 C4
3V3
I719 A2
I720 C2
7
I721 A8
7751-3 3753 I722 B8
14
74LVC08AD 470R
9 OUT_MUTE
I751 D4
8 0V 3755 B2 I752 F3
10 I753 F3
470R F752
I752 3754 I753
7
7752
7751-4 0V7 BC847BW
1K0
14
74LVC08AD
F 12
11
F
F753
B2 EXT_MUTE 3V3 13 3V3
7
4752
* RES Audio Processing
H_17120_004.eps
3139 123 6019.2 060607
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 37
SSB: TV Supply
1 2 3 4 5 6 7 8 9
1910 A1
2910 E8
B5 TV-SUPPLY B5 2911 E9
2920 F3
2921 F4
2930 D3
2931 C6
2933 D6
A F903
A 2934 D4
AUD_SUP 2936 A2
*EMC
2936 2937 B1
1910 1n0 2938 B2
F904
1 2939 B2
P_GND
2 F905 2940 B2
(3V3) 3V3
3 +3V3STBY 2941 B2
(3V3) 3V3
FROM PSU
4 +3V3STBY 2942 B2
5 F914
2943 D8
6 3936
7 +12VSW
3910 C7
F906 (0V9) 14V5 1K0
8 3911 E7
(0V) 3V3 POWER_DOWN B2,B4,B7 14V4
B 9
10
F907
F908 (0V3) 3V2
B2
3937
150R
7936
B 3930 C3
3931 C3
F909 (3V3) 3V3 STANDBY 14V
11 BC636
F910 (0V) 3V3
I910
3932 D4
12 BACK_LIGHT_ADJ1 B7
13 14 3933 D4
*EMC *EMC *EMC *EMC *EMC *EMC 7930 0V5
2937 2938 2939 2940 2941 2942 LAMP_ON_OFF B7
3934 C4
MC34063AD
1n0 1n0 1n0 1n0 1n0 1n0 3935 C3
9V7 8 DCOL SWC 1 9V7 3936 B7
I901
DCOL SWC 3937 B6
S Q 5910 E7
I904 5930 C2
R 5931 C6
I911
14V4 7 IS 5932 D8
C IS
3910
C 6910 E8
RES 2 SUP_GND
SWE 6911 E9
3935 3930 3931 3934 IPK SWE 6930 C7
1R0 1R0 1R0 2K2
OSC TIMC 3 0V7
TIMC I905
7910 E7
2931 5931 6930 7920 F4
5930 I902 14V4 6 REFERENCE 470p 220u SS14 7930 B4
+12VSW VCC REGULATOR
10u VCC 7936 B7
F903 A2
2930 I912 SUP_GND
470u 16V 3932 1V2 5 CIN_NEG GND 4 SUP_GND 5932 F913 F904 A2
+5VSW F905 B2
GND 10u 5V4
1K0 1%
F906 B2
SUP_GND
F907 B2
D SUP_GND
SUP_GND 3933 I909 2943
470u 10V D F908 B2
3K3 1% F909 B2
2934 2933 F910 B2
470u 16V F911 E9
4n7
F912 F9
SUP_GND F913 D9
5910 F911 F914 B1
1m0 +VTUN
6910 33V5 I901 C4
BAV99 I902 C3
2911 6911 I904 C7
I906 I907 35V 22u BZX384-C33
I905 C6
5V3
E E I906 E7
I907 E7
0V3 7910
BC817-25 I908 F3
SUP_GND SUP_GND
I909 D7
I910 B7
3911 2910
1K0 470p I911 C4
I912 D4
7920
L78M08CDT
F 2920
16V 47u
COM 16V 47u
F
2
H_17120_005.eps
3139 123 6019.2 060607
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 38
SSB: Scaler
1 2 3 4 5 6 7 8 9 10 11
1403 G4 7401-9 F6
1407 D1 7403 C3
SCALER
B6 B6 2401 D8
2402 D10
2403 D10
2404 D10
F401 G3
F402 D8
F403 E3
F404 D9
+1V8_DVDD +3V3_AVDD
2405 D10 F405 E9
2406 D10 F406 F9
A A 2407 D9 F407 D9
164
141
145
150
154
7401-1 2408 D9 F408 E7
7401-7 GM5221 2409 D9 F414 D1
GM5221 VDD1_ADC_1.8 B G R ADC +3V3_DVDD +1V8_DVDD
2410 D9 F415 E1
B8 CS_HSYNC 0V2 181 AVDD_3.3
RMADDR0 202
ROM INTERFACE 4 RMDATA0
HSYNC ANA-IN 2411 D9 F416 C11
0 0 CSYNC 2412 D10 I401 E6
RMADDR1 201 3 RMDATA1 B8 VSYNC 0V 182
1 1 VSYNC
RMADDR2 200 2 RMDATA2 2413 D10 I402 F6
2 2
50
73
95
190
205
9
41
75
86
96
139
179
RMADDR3 199 1 RMDATA3 2521 10n 0V 146 7401-6 2414 D10 I403 D1
3 3 SOG
RMADDR4 198 DATA 208 RMDATA4 GM5221 2415 D10 I404 D1
4 4
RMADDR5 197 207 RMDATA5 B8 R_MUX 3522 22R 2522 10n 0V2 151
5 5 REDp RING VDD CORE VDD 2416 D10 I405 F6
RMADDR6 196 204 RMDATA6 0V 152
6 6 REDn 2417 D11 I406 F6
RMADDR7 195 203 RMDATA7 3523 22R 2523 10n SUPPLY
7 7
B RMADDR8
RMADDR9
194
193
8
9 ADDR
B8 G_MUX 3525 22R 2524 10n
0V2
0V
147
148
GREENp
GREENn
B 2418 D11
2419 D11
I407 F6
I408 F6
RMADDR10 192 5 2420 E8
10 OE 3524
RMADDR11 189 6 22R 2525 10n 0V2 142
188
11 WE
7 0V 143
BLUEp 2421 E9
RMADDR12 12 CS BLUEn
RMADDR13 187 B8 B_MUX 3526 22R 2526 10n AGND 2422 E9
13
RMADDR14 186 GND1_ADC B G R ADC 2423 E9
14
RMADDR15 185 3527 22R 2527 10n 2424 E9
163
144
149
153
156
15 SDI RING & CORE GND
RMADDR16 184 2425 E9
16 SDO
RMADDR17 183
2426 F10
140
180
191
206
17 SCLK
42
51
74
76
87
94
97
8
2427 F10
+3V3_DVDD 2429 F9
+1V8_AVDD +3V3_AVDD F416
2430 F9
+3V3_DVDD
C C 2431 F9
3417 10K
2432 F9
RMADDR1
2433 F9
126
121
116
137
113
130
125
120
134
3418 10K RMADDR2 7403 7401-2
32
3419 10K RMADDR3 MX29LV040QC 2445 GM5221 2434 F10
3420 100n
RX0
RX1
RX2
RXPLL
IMB
RX0
RX1
RX2
RXC
10K 2435 F10
3421
RMADDR5 ROM +3V3STBY
10K RMADDR6 RMADDR0 12 +3V3_AVDD 2436 F10
3429 10K RMADDR7 RMADDR1 11
0 512Kx8 AVDD-33
1 [FLASH] 5401 F404 2438 D9
3422 10K RMADDR8 RMADDR2 10
2
VDD-18 DVI 2439 D9
I403 RMADDR3 9
3
RMADDR4 8 B8 RXCp 132 2440 D9
4 RXCp 2401
RMADDR5 7 B8 RXCn 133 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2441 D9
5 RXCn 47u 6.3V 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 220p 220p
6
1
2
RXC
30 17
RX0
RX1
RX2
RMADDR17 RMDATA3 1% 1% 2526 B7
IMB
17
1 DQ 18 RMDATA4 GND_RXPLL 2527 C7
18
F403 19 RMDATA5
3403 E5
136
115
127
122
117
131
FOR TESTING +3V3_DVDD 20 RMDATA6
21 RMDATA7 3404 E2
7 F408
E 3404
3405
10K
10K
24
31
OE
WE
+1V8_AVDD E 3405 E2
3406 E2
22 +1V8
CE 3407-1 G2
+3V3_DVDD +3V3_DVDD 5402 F405 3407-2 G2
3406 3407-3 G2
16
10K 3407-4 G2
2420 2421 2422 2423 2424 2425 3416 E6
5
47u 6.3V 100n 100n 100n 100n 100n
3424-1 3424-2 3424-3 3424-4 +1V8_DVDD 3417 C1
3435 3418 C1
7401-9 10K 10K 10K 10K 10K
7401-5 GM5221 3419 C1
4
I402 5403 F406
GM5221 3420 C1
52 158
VIDEO 111 3421 C1
NC 0
F 53
54
159
160
1
110
109
DVI_DET B8
2429 2430 2431 2432 2433 2434 2435 2436 2427 2426
F 3422 D1
104 NC
NC
161 B7,B8 FBIN 112
2
108 I408 100n 100n 100n 100n 100n 100n 220p 220p 220p 220p 3423 D1
VCLK 3 3424-1 F6
105 162 VDATA 107 I407
4
157 106 I406 3424-2 F7
5 I405
58 103 3424-3 F7
6
10 59 102 3424-4 F7
+3V3_AVDD +3V3_AVDD 7
B7 PD20 43 60
B7 PD21 44 61
GPIO <23:16>
3425
1R0
* *
3426
1R0
*
3427
1R0
*
3428
1R0
3425 G6
3426 G7
B7 PD22 45 62
B7 PD23 46 RESERVED 63 3427 G7
B7 FED 33R 5 4 3407-4 DEN B6 47 65 2443 2444 3428 G7
RESERVED
B7 FHSYNC 33R 6 3 3407-3 DHS B6 48 70 5p6 5p6 X1
1403 3429 D1
B7 FVSYNC 33R 7 2 3407-2 DVS B6 49 135
14M31818 3433 D1
G B7 FSHCLK 33R 8 1 3407-1 DCLK B6 55
57
155
167
ADC_TEST
F401
*
3425
15"S1 17"S1
-- Y
20"S1 23"QDI_TN
-- --
G 3434 D1
+1V8_DVDD 3426 -- -- -- Y 3435 F6
169 XTAL
2V4
3427 -- Y Y -- 3522 B6
3428 Y -- Y 3523 B6
166
7401-3 3524 B6
GM5221
AVDD_RPLL_33 VDD_RPLL_18 3525 B6
+3V3_AVDD 3526 B6
CLK-SYN 3527 C6
171 170 4423 D1
TCLK XTAL
2V7
4434 E1
5401 D8
H AGND_RPLL GND_RPLL
H 5402 E8
5403 F8
168
165
5404 D8
7401-1 A8
7401-2 C7
7401-3 G4
H_17120_006.eps 7401-5 F3
3139 123 6019.2 060607 7401-6 B11
7401-7 A3
1 2 3 4 5 6 7 8 9 10 11
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 39
SSB: Scaler
1 2 3 4 5 6 7 8 9
1401 A1 I416 C6
1402 C6 I418 D6
172
7401-8 2450 B1
B2 SC_RESET GM5221
2451 B1
2
LBADC
1409 SYSTEM VDD33 3414 3443 3444 2448 2452 A3
F413 10K 10K 10K 100n
1
178
RESET
3401 A2
3V3
A 81 TV_SC_COM B2
A 3402 A2
1
2 2452 0 TV_IRQ
173 82 B2
+3V3_DVDD 10n F417 IN1 1 3408 E4
146280-2 174 83 FBIN B6,B8 7402
IN2 2 M24C32-WMN6 3409 E4
175 84
8
F409 IN3 LBADC 3
1401 4
85
3410 E4
TO 1111 OF SIDE AV
4
F411 99 B8 3412-3 D4
220p 220p F412 3441 1 12
PWM 100
100R 2 13 PLL_SEL 3412-4 D4
B JTAG_SCL_UART_RX
JTAG_SDA_UART_TX
71
72
SCL
SDA
HOST
3 14
15
101
69
B8
B 3413-1 D4
BACK_LIGHT_ADJ1 3413-2 D4
3442
100R
DI
DO
UART
3436
2K2
3439 4440
3440
* B5
3413-3 D4
I412 66
TDI
3V3 4K7
* 3440* ANALOG
4K7
PWM
N
3413-4 D4
3414 A7
I411 64
I410 56 TDO JTAG 3415 0V 7437
* 2449
10u
2449
4440
10u
N
N
Y 3415 B7
RESET BC847BW 3430 B3
PAN_VCC 47K 3432
GND 3431 A3
LBADC 47K
3432 C7
11V9
3436 B7
177
+3V3_DVDD RESERVED
3439 B7
3440 B8
C 3V3
RES
2446 1402 4409 C 3441 B3
+3V3_AVDD 47p
3442 B3
I413 42 41
FSHCLK I414 40 3443 A7
39 3444 A7
26
27
40
7401-4 FVSYNC 38
GM5221 I416 3445 A1
37
LV_E LV LV_O
36
3446 B1
FHSYNC I418
AVDD_3.3 AVDD_3.3 35 3451 E4
I419
LV_E1_TX0+ B6 33R EB4 FED I420 34
LV_E9_TX3+ F537 3452 E4
LVDS CH0p
21 PD20 3413-4 4 5
33 1404 3453 E4
LV_E0_TX0- 33R EB5
25
28
39
F538 D8
F539 D8
I410 B4
I411 B4
H_17120_007.eps I412 B4
3139 123 6019.2 060607
I413 C6
I414 C6
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 40
B8 SCALER IO B8
1463 A4
1485-1 E1
1485-2 D1
F481 C2
F484 F1
F485 E1
PROVISION FOR DVI-COMB1
1463 1485-3 C1 F487 B9
F474 1485-4 B1 F489 C8
1
2
F475 2463 E8 F497 E9
F476
A 3
4
F477 A 2471 C8
2472 C8
F498 E9
F499 F11
5 2473 C9 F501 E3
6 7 I57
ITV INTERFACE 2474 C9 F502 F3
F478 2485
BM05B-SRSS-TBT 1462 2475 C9 F503 F11
3481 B_Pb_PC SC1_CVBS_RF_OUT B2,B10
1 2476 E6 F504 F3
3482 1u0 22R 2 2477 D6 F505 F3
S485
H_CS_SDTV B2
75R 3 B2 2478 D6 F506 F2
V_SDTV
4 2479 E6 F507 F2
5
6 7 2483 E8 F519 F5
DVI-I CONNECTOR 2486 3483 2485 A3 F520 F4
F479 R_Pr_PC BM05B-SRSS-TBT
2486 B3 I462 D7
B 1485-4
3484 1u0 22R
B 2487 B3 I463 D7
S486
YKF45-7005
75R F487 PC_HD_SEL B7 2488 C3 I464 E7
F480
25 C1 C2 26 2489 F2 I483 E1
2490 G2 I484 E1
2487 3485 2510 E10 I485 E3
G_Y_PC +5VSW
27 C3 C4 28 2513 F6 I486 E2
1u0 22R
3486 2514 F3 I487 G2
S487
75R
31
32
5462
2515 G6 I488 E3
2516 G5 I492 F5
7461
29
30
5V4
SM5301BS-G 2517 F5 I493 G5
F481 3487 2518 F5 I494 G5
18
15
12
24
HS_PC
F489
C 1K0 VCC VCC
C
2519 F6 I496 G5
S488
B6
D 3489 E2
3490 E2
S496 E1
S497 E1
G_SDTV F472 I513 2V3 14 G_MUX
3503 I463 GOUT|UOUT 3491 E2 S498 E2
YKF45-7005 B2 2478 1u0 3 1V6
GINB|UINB 3492 E2
220R 0V
ROW_B 3504 6 11 B_MUX B6 3493 F1
220R GSB1 BOUT|VOUT
1485-2 1V7 3494 F2
RX1n B6 5
9 B6 BINA|VINA 3495 G2
RX1p B_SDTV F473 I514 2V3 I516
10 3505 I464 3478 F497 HD_FILTER B7 3496 F1
B2 2479 1u0 7
11 6485 BAS316 BINB|VINB 3497 F1
0V
12 NC 6486 +5VSW 220R 2483 100K F498 SD_PCHD_SEL B7
3506 20 3501 G7
13 NC I486 BAS316 I488 5485 I485 220R RFC 100n
I483 3489 100R 0V3 RES 4510 3502 D6
3471 820R
DDC_DVI_5V
33p
14 I484 3490 10K 21 ITV 4512
15
3491
VFC 3503 D5
F485 1K0 0V3
E 16 DVI_DET GND GND_HS 2510
E 3504 D6
2476
3492 1K0 B6 +3V3STBY
3505 E5
13
10
19
16
29
30
YKF45-7005
100n
S496
S497
S498
220R
RX2n B6 B2 SELECTION 2463 100n 0V2 0V2
1 220R
16
RX2p B6 7463 7 7 F499 3512 E10
2 V_SDTV F502
B2 74HC4053D VDD 3513 F10
3
4 NC F504
+3V3STBY 6
G4
MDX 3514 H2
PLL_SEL
3510
B7 I517 3V3
5 NC
3496 100R SCL_DVI B7
VDD 5520 0V2
3515 H2
F506 I492 13 14 7510-3 7510-4
6 B6,B7 FBIN F505 5514 1 3520 G5
3497 100R SDA_DVI B7 HS_PC 0V 12 0V2 74LVC14APW 74LVC14APW
7 2 3511 14 14 4463 G8
11
F 8 F507
2514
15p
7516
F519
2517
10n
2518
10n
2513
10u 2519
1n0
2520
100n
3V3
4X1
4X2
220R 5 6 3V3 9 8 3513 F503 VSYNC B6 F 4464 G8
YKF45-7005 MK1575-01G 0V 4510 E9
3
4
RES
RES
1K0 OE
S489
4463
4464
4520 5 5
1 FS I496
680p
I494 4520 G3
11 8 2516 9 7510-6
FOR EMC 2 CHGP 7510-5 74LVC14APW 5462 C8
3V3 14
DDC_DVI_5V
15
NC CHGR
9 3520 33K
I493
2515 10n 3501
10K
VEE VSS ** 74LVC14APW 14
10 13 12 5485 E3
5514 F4
8
GND 3V 11 0V3 3V
A D 7 7
G 2490
G 5520 F6
4519
4518
RES
6
7
6485 E3
7490 100n
M24C02-WMN6 8 6486 E2
I487
7461 C7
7463 F7
(256x8) 7 7490 G1
WC 3495
EEPROM 10K 7510-1 E9
1 6
0 SCL 7510-2 E10
2
1 ADR DDC_DVI_5V 7510-3 F9
3 5
2 SDA
7510-4 F10
3514
4
10K 7510-5 G9
3515 7510-6 G10
H 10K
H 7516 F4
F471 D5
F472 D5
F473 E5
F474 A5
F475 A5
H_17120_008.eps F476 A5
3139 123 6019.2 060607 F477 A5
F478 A2
1 2 3 4 5 6 7 8 9 10 11 F479 B2
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 41
1 2 3 4 5
B10 REAR IO SCART B10
2101 A3
2102 A4
2103 B3
S109 D2
S110 E2
S111 E2
2104 B4 S112 F2
B9 B9 A
SCART 1
1101 SC1_R B2
A
2106 B4
2107 C3
2108 C4
2109 B2
F101 3101 I101 2102 I112
SC1_R_RF_OUT 2110 B2
1 B2
RES 2111 B2
150R 10u 16V 2112 B2
1951
S101
2 2101 3102
330p 220K 2113 F2
A 7 6
5 A 3
4
F104 RES
*EMC
RES
*EMC
RES
*EMC
3101 A3
3102 A4
F102 I102 I113 R_SC1_AV1_IN 3103 B3
4 2109 2110 2111 3103 2104 B2
I957
3 5 470p 470p 470p 3104 B4
22K 2u2
3105 B3
S102
2 2103 3104
PAN_VCC_I N 6 330p 47K 3106 B4
1 RES
*EMC 3107 C3
RES
B 7 2112
470p
F103 3105 I103 2106 I114
SC1_L
SC1_L_RF_OUT
B2
B 3108 C4
8 B2 3109 C3
5958 3110 C4
* 7953 150R 10u 16V
S103
9 2105 3106 3111 D3
L4940D2T12 330p 220K
S106
2107 3108
F116 S105 330p 47K
3117 E3
100n 22n 47u 16V 100n 13
* 3118 E4
2
2998 RES 3119 F3
5960 1m0 6.3V 5955 5956 C 14
F106 I105 SC1_B_U_IN
C 3120 F3
RES 15 3110
* 100R * 3130 B2 3121 F3
3122 F4
14V4 0R
I953 5957
S107
3109
14V4
2
SS = 4V9
3
* 16
17
F114
75R
1102
1
*
3110
3114
ITV
680R
680R
3130 C5
3131 D5
FOR ITV
I952 2
3116 680R 3132 E5
7954 18
3
3118 750R 3133 E5
F107 I106
3955 2961 SI2301DS-T1 3111 4
3130 100R
10K 10n 5 7101 F4
19 3131 100R
1 27K 6 F101 A3
S108
3112 8 7 3132 100R
1V3 20 6K8 3133 100R F102 B3
I954 STATUS_1
F103 B3
C 15" S1 17" S1
C D 21 B2
D F104 B1
*
1951 Y --
20" S1 23" QDI_TN
-- --
F108 3114
* 100R
I107
* 3131 SC1_G_Y_IN
B2
F105 C3
F106 C3
2959 -- Y Y -- 0R F107 D3
S109
3113
*
3958
1K0
5956
5957
--
Y
Y
--
Y
--
Y
Y
75R F108 D3
F109 E3
F110 E3
5958 Y -- -- -- I108
F109 3116 SC1_R_V_IN F111 F3
I955
5959 -- Y Y -- * 100R * 3132 B2
F112 F3
7953 -- Y Y -- 0R F113 F4
S110
0V 3115
(0V) 75R
F114 C1
B7 PANEL_PWR_CT L 3V2 7952
PDTC114ET F115 B1
F952 E F110 3118 I109 SC1_FBL_IN
E F116 C1
* 100R +5VSW
* 3133 B2 I101 A4
I102 B4
0R
S111
3117 I103 B4
D D 75R
I111 2V5
SC1_CVBS_RF_OUT
B2
I104 C4
I105 C4
I110 1V5
I106 D4
F111 3119 1V9 I107 D4
SUPPLY FOR SCALER 68R
7101
BC847B
I108 E4
S112
3120 I109 E4
1K0
7955 I110 F4
LD1086D2T18 I111 E4
I956 F954
F F112 F113 CVBS_SC1_AV1_IN
F I112 A5
3122 B2
+3V3STBY 3 2 +1V8 I113 B4
IN OUT RES
3V3 1V8 100R I114 B5
S113
*EMC 3121
COM 2113 75R I115 C4
2995 2996 2997 10p I116 C1
2994 100n 100n 47u 6.3V S101 A2
1
H_17120_009.eps
3139 123 6019.2 070607
1 2 3 4 5
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 42
H_17120_011.eps
3139 123 6019.2 060607
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 43
S105
2105 2106
S106
1
I104 2103 E3 I116 F3
47K 470p 47K 470p
I106 3101 AV3_CVBS_Y_IN A2 G_VID G_AUD_IN 2104 F3 I117 B6
3
F109
2105 A7 I118 B6
I107 10R
4 RES EMC 2106 A7 I716 D8
2101
2116
47p 2107 D7 S101 F6
47p G_AUD_IN
S108 * HEADPHONE
6104
6106
2 RES 4104 2108 D7 S102 F7
RES
B B
S107
3104
75R
6105
RES
6
RES
2112 I118
3105 120R 3116 3 2113 C7 S107 B2
75R 10V 220u 5 2114 C8 S108 B2
2115 A3 S109 D2
G_VID * 4105
2116 B3
EMC EMC 2119 F1
I103 G_AUD_OUT
2113 2114 2120 F1
470p 470p
3101 B3
3103 A3
C C 3104 B2
G_AUD_OUT
3105 B3
4106
4107
4108
3106 D3
3121 0R
FROM 1704 OF AUD AMP 3107 E3
3122 0R * * * 3108 E3
(2 X 5W) 1105 3109 E3
3110 F3
8 OHMS @ 5W
4 OHMS @ 2W
1107 FOR ITV
1 F110 4 3111 A6
YELLOW
1102-1 1
L+
L- 2 F112 3
+
-
R 3112 A6
G_VID 3 F111 2 +
CVBS 2 I108
GND
F113
3113 A7
4 1
R+
5
- L 3114 A7
D RES
3106
R-
EMC
2107
EMC
2108
EMC
2109
EMC
2110
D 3115 B7
S109
6101 3116 B7
75R 1n0 1n0 1n0 1n0
4103
4102
3121 C6
* 2 x 2W 2 x 5W
3122 C6
RES FROM 1701 OF SSB * * 2107
2110
N
N
Y
Y 3123 F6
6102 I716 4102 Y N 3124 F6
(2 X 2W) G_AUD_OUT
RED 4103 Y N 4102 D8
1102-3 5 G_VID 1110 G_AUD_OUT
4104 Y N 4103 D8
G_AUD_IN 1 4105 Y N
R 6 AV3_R_IN A2 L
2 4106 N Y 4104 B6
GND 4105 C6
3 4107 N Y
3107 R
I110 4108 Y N 4106 C8
1K0 G_AUD_OUT
S103
BZX384-C4V7
I116
6111 F7
Screw Mounting Hole FOR SERVICE
S101
S102
6109
6111
EMC 6112 F7
F 1199
TYPE
EMC
2119
G_AUD_IN
UART 4109 F F101 A6
F102 A6
BZX384-C4V7
BZX384-C4V7
470p G_AUD_IN G_VID
G_AUD_IN
F105 F5
EMC
6110
6112
2120 F106 B8
F107 B8
470p F108 B8
G_AUD_OUT
G_UART F_15310_017.eps
F109 B5
3139 123 5831.2 300605 F110 D8
F111 D8
1 2 3 4 5 6 7 8 9
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 45
F_15310_018.eps
3139 123 5831.2 240605
F_15310_019.eps
3139 123 5831.2 240605
A
B
C
D
D1
E
GND
BZX384-C5V6
J5
I1
GND
S1
PHPCB0002841
CHANNEL+
5
5
R1
GND
Top Control Panel
150R
SKQNAAB010
D2
GND
BZX384-C5V6
J6
I2
GND
TOP CONTROL
S2
CHANNEL- J2 R2
GND
0R 390R
SKQNAAB010
D3
GND
BZX384-C5V6
4
4
Circuit Diagrams and PWB Layouts
J7
I3
GND
S3
MENU J3 R3
GND
0R 560R
SKQNAAB010
LC4.1E AC
D4
GND
BZX384-C5V6
J8
7.
I4
GND
S4
VOLUME- J4 R4
46
GND
0R 820R
SKQNAAB010
3
3
D5
GND
BZX384-C5V6
J9
I5
GND
S5
VOLUME+ R5
GND
1K8
SKQNAAB010
J11
I6
GND
S6
POWER
2
2
I7
GND
SKQNAAB010
D7 D6
GND
BZX384-C3V9 BZX384-C3V9
D8
GND
BZX384-C3V9
not used
C1
GND
470pF
L1
GND
BLM18EG221SN1D
1
1
not used
I9
J10
I8
GND
0R
3
2
1
S3B-PH-K-S
J1
E
150507
H_17170_011.eps
A
B
C
D
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 47
1482000BCPHP A
S5 S4 S3 S1 S2 S6 J1
bP
A A 1 3
A A
A A
1 2 1 2 1 2 1 2 1 2 1 2
A
1
XX
80-30-7002
H_17170_012.eps
PHPCB0002841 150507
J10 L1
D4
A PHPCB0002841
D3
S6 I1 S1 S4
1
2
D7 1
I9 S2 S3 S5
1
A A
Pb I6 A
1
A
1
1
I2
J9
2
J8
J6
J5
A 2 2 2
J7
2 2
J11
A
I4
2
A 1 1 1 1 1
1 1 1 2
2
2
I5
R5
D1
D5
2
C1
D8
2
D6 1
I3
2
XX
I7
D2
I8 R2 J2 R1 R3 J3 R4 J4 2007-03-08
H_17170_013.eps
PHPCB0002841 150507
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 48
Audio Amplifier
1 2 3 4 5 6 7 8
1703 A1
1704 C8
2742 C5
AUD_SUP
2746 D5
1703 2747 E1
I701
1 I702
2748 E1
2 3701 D3
P_GND
3702 D4
3706 C5
4710 2712
F702 3714 1u0 I712 3714 B4
R
AUD_SUP
3715 B4
P_GND I709 *EMC
8K2 2741 3726 B4
3715 470p 11V2 (10V) 3727 C4
B 1K8
2713 2719 2714 2715
B 3744 D5
3746 C4
100n 100n 470u 16V 470u 16V
3747 D3
3748 C3
F703 3726 I718 2718 I719 3749 D2
L 7709 P_GND P_GND P_GND P_GND
15
TDA7297D TO 1107 OF SIDE AV 3750 D4
6
8K2 1u0
3727
*EMC
2742 VCC 3751 D5
1K8 470p BRIDGE 5V7
4710 B1
3 1704
AMPLIFIER 4 I707 5709 D7
1 5710 D1
1V4 7 12 5V7 I708
AUD_SUP 1 NC 2
17 5V7 I710
3
7703-1 C4
18 5V7 I711 7703-2 D3
C 1V4 14
IN
2
5V7 I714
4
5 C 7709 B6
2 + F702 B2
FROM 1706 OF TV+SCALER BD
3746
AUD_SUP 10K OUT1 F703 B2
1706
F704 7703-1 4V5 3706 9
STBY -
5 P_GND F704 C2
STANDBY I704 4V5
1 BC847BS I713 F705 D1
I705 19
2 3748 10K + F706 E2
4V5 8
3 3750 MUTE
OUT2 I701 A1
4 10K 2V8
AUD_SUP 6K8 2703 16 5V7 I702 A1
5 10u 16V -
3702 3V2 I703 D3
3K3 SGND PW_GND I704 C4
13
1
10
11
20
AUD_SUP 3747
I705 C4
I706 D5
D 5710 10K
I706 3744
P_GND D I707 C8
4V5 5709
I708 C8
3749 I703 10K I728 I709 B4
7703-2
SCREW MOUNTING HOLE F705 BC847BS I710 C8
2V8 3751 2746
1710 10K 6K8 1u0 10V I711 C8
TYPE
3701 3V3 I712 B5
3K3 I713 C5
I714 C8
EMC I718 B4
2747 F706 MUTE I719 B5
I728 D5
E 470p
EMC E
2748
470p
P_GND
H_17120_023.eps
3139 123 5883.3 070607
1 2 3 4 5 6 7 8
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 49
H_17120_024.eps
3139 123 5883.3 070607
E_06532_012.eps
131004
Circuit Diagrams and PWB Layouts LC4.1E AC 7. 50
Front IR / LED Panel (ME5P) Layout Front IR / LED Panel (ME5P) (Top Side)
1870 B1 3802 A4 5802 B1 6802 C2 7801 A3 F801 B1 F805 B1 I805 A4 1870 A1 6801 A3 6805 A3 7802 A2
2801 C3 3803 C3 5803 C1 6803 C4 7802 C3 F802 B1 I802 B4 I806 B4
2802 C4 3805 A4 6801-1 B4 6804 C2 7803 B4 F803 B1 I803 B3 I807 A4
3801 B2 5801 B1 6801-2 B3 6805 A4 7804 C4 F804 B1 I804 C3
1 2 3 4
3805
220R
+3V3STBY
I807
A 3802 6805
A
330R TSAL4400-MS21
I805
7801
BC857B 7803
BC847B
F_15310_040.eps
3801 I802 3139 123 6153.2 170206
TO/FROM 1007 OF SSB
3K3 I803
1
6801-2 6801-1
B 1870 SPR-325MVW
GREEN I806
SPR-325MVW
RED
B
1 F803
2
2 5801
F804 IR
3 LED_SEL
F805
4
F802 +3V3STBY
BZX384-C4V7
5 5802 F801 PC-TV-LED
6 5803
6803
BZX384-C4V7
+3V3STBY 7804
6802
BC847B
OUT
6804
2
GND
TSOP34836
F_15310_038.eps
3139 123 6153.2 170206
1 2 3 4
F_15310_041.eps
3139 123 6153.2 170206
Alignments LC4.1E AC 8. EN 51
8. Alignments
Index of this chapter:
8.1 General Alignment Conditions
8.2 Hardware Alignments
8.3 Software Alignments
8.4 Hotel Mode (for iTV sets)
8.5 Hotel Mode Instructions (for iTV sets)
8.6 SAM Menu
8.4.4 Installing a TV with the Wireless Smart-Loader 8.4.6 Required Software Versions
Use a Wireless Smart-Loader programmed with the settings Be aware that the software used in these TV sets is NOT
from a master TV of the same type. similar to software used in the Mainstream LCD-TVs.
Be sure to use the same method of programming the Used software versions in this chassis are:
Wireless Smart-Loader. It means that if you program the LC4CHE1-1.xx (Hercules)
Wireless Smart-Loader using the wireless method, you S4CHEX1-1.xx (for Scaler 15 XGA resolution)
have to use the same method to install the TV. S4CHEV1-1.xx (for Scaler 20 VGA resolution)
1. Wireless method (for LCD and CRT TVs): Ensure that this software is used in these sets (available on the
Turn on the TV, press the "MENU" Key on the Wireless P4C service web site).
Smart-Loader.
2. Wired method (for CRT TVs only):
Turn on the TV set, connect the Wireless Smart- 8.5 Hotel Mode Instructions (for iTV sets)
Loader to the TV set using the accessory cable.
Press the Volume - and + buttons on the TV set For Installation Menu access, Remote Control (RC1683803)
simultaneously for 3 seconds. will be necessary.
HOTEL MODE
OFF: The Hotel Mode is disabled: (MTV Mode)
The TV set operates as a normal consumer TV.
The User Menu can be accessed.
All setting can be changed.
ON: The Hotel Mode is enabled:
The User Menu is blocked.
The volume level is limited (to the maximum volume
level entered in the Hotel Mode Setup).
All settings of the Hotel Mode Setup menu are in effect:
ON CHANNEL,
CHANNEL BLANK,
KEYBOARD LOCK,
ON VOLUME,
OSD DISPLAY.
ON CHANNEL
On user switch-on, the TV set tunes in on the specified
channel.
CHANNEL BLANK
OFF: The current channel is not blanked (normal visible;
DEFAULT value).
ON: The current channel is blanked.
CHANNEL BLANK can be set for every channel. Use [P+ / P-]
to go through all the channels and set the desired status per
channel. The channel number is visible in the top left corner.
KEYBOARD LOCK
OFF: The VOLUME +/-, PROGRAM +/- and MENU keys
of the TV set function normally.
ON: The VOLUME +/-, PROGRAM +/- and MENU keys
of the TV set are blocked.
MAX VOLUME
The volume will not exceed the specified volume level.
ON VOLUME
On user switch-on, the specified volume level is actual.
OSD DISPLAY
OFF: Screen information is suppressed (except for some
VGA input, if present).
ON: Normal screen information is displayed (e.g.
channel information).
EN 54 8. LC4.1E AC Alignments
SAM SAM
1 00022 LC4CEP1 1.05/S4CEX1 1.06 CSM
2 CODES 0 0 0 0 0
3 OP 000 057 140 032 120 128 000 . Cool . Delta Warm Red 2
4 20PF8846/12 . Normal . Delta Warm Green -3
5 . Warm . Delta Warm Blue -13
6 NOT TUNED
7 PAL
8 STEREO
9 CO 50 CL 50 BR 50
0 AVL Off
SAM
. QSS Off
. FMI On
. NICAM Alignment 63
. DBE Off
SAM
.ADR 0x0000 0
.VAL 0x0000 0
.Store Store ?
SAM
.ADR 0x0000 0
.VAL 0x0000 0
.Store Store ?
F_15310_004.eps
200605
8.6.2 White Tone alignment values are non-linear. The range is: -50 to +50, 0
represents the middle value, (no offset difference).
In the White Tone sub menu the colour values for the colour
temperature values can be changed. Input signal strength: >=10 mV_rms (80 dBV) terminal
The colour temperature mode (Normal, Delta Cool, Delta voltage.
Warm) or the colour (R, G, B) can be selected with the Right/ Input injection point: Aerial input.
Left cursor keys. The mode or value can be changed with the
Up/Down cursor keys.
First the values for the Normal colour temperature should be
selected. Range: 0-255, 128 represent the middle of the value
(no offset difference). Then the offset values for the Delta Cool
and Delta Warm mode can be selected. Note that the
Alignments LC4.1E AC 8. EN 55
8.6.4 Grey Scale Adjustment Options are used to control the presence/absence of certain
features and hardware. Some Hercules NVM settings can be
SDTV Grey Scale Adjustment changed group wise (via Option Bytes), as well as bit by bit via
the NVM Editor, see the text below.
Equipment and Setting
E.g. Fluke 54200 or Philips PM5580. How to Change an Option Byte
100% 8-step grey scale pattern. An Option Byte represents a number of different options.
Changing these bytes directly makes it possible to set all
options very fast. All options are controlled via seven option
Alignment Method
bytes. Select the option byte (OP1.. OP7) with the cursor UP/
Switch with the RC to TV mode,
DOWN keys, and enter the new value.
Press the MUTE button on RC,
Set SMART PICTURE to SOFT mode,
Leaving the OPTION sub menu saves the changes in the
Activate the auto colour function by pressing key-
Option Byte settings. Some changes will only take effect after
sequence:
the set has been switched off and on with the AC power
INFO - MUTE - MUTE - MUTE - INFO - MENU - INFO.
switch (cold start).
Expected Results
Visual check if the 8 Grey levels are correct.
EN 56 8. LC4.1E AC Alignments
Table 8-3 Option Bytes (set via Options Menu in SAM) Table 8-4 Hercules Default NVM Settings (set via NVM
editor)
Option Byte-Bit Option description
23PFL5322/01
23PFL5322/58
20PFL5122/01
20PFL5122/58
(decimal value)
Byte Nr Bit Feature/Mode Description All
models
Byte 0 QSS Mode of Quasi Split Sound 1
174(dec) 0
amplifier
1-7 (128) OP_PHILIPS_TUNER 1 1 1 1 FMI Connection of output of QSS
1 1
1-6 (64) OP_FM_RADIO 1 1 1 1 amplifier
2 HCO EHT tracking mode 0
1-5 (32) OP_LNA 0 0 0 0 3 HP2 Sync. of OSD/Text display 1
1-4 (16) OP_ATS 1 1 1 1 FSL Forced slicing level for vertical
4 1
1-3 (8) OP_ACI 1 1 1 1 sync
TFR DC transfer ratio of luminance
1-2 (4) OP_UK_PNP 0 0 0 0 5 1
signal
1-1 (2) OP_VIRGIN_MODE 0 0 0 0 OSVE Black current measuring in over-
6 0
1-0 (1) OP_CHINA 0 0 0 0 scan
MVK (MSB) (For Future Usage, as defined by
OP1 (total DEC value) 216 216 216 216 7 0
software)
2-7 (128) OP_SC 0 0 0 0 Total Dec Values 59
2-6 (64) OP_UI_GREEN 0 0 0 0 Byte 1 0 PSE 0
2-5 (32) OP_CHANNEL_NAMING 0 0 0 0 175(dec) 1 OPC 0
2 PRIS 0
2-4 (16) OP_LTI (Lum. Transient Impr.) 0 0 0 0
3 CONT. FACTORY Continuous factory mode 1
2-3 (8) OP_TILT 0 0 0 0 WHITE PATTERN ON Last colour pattern status in fac-
4 0
2-2 (4) OP_FINE_TUNING 1 1 1 1 tory mode
2-1 (2) OP_PIP_PHILIPS_TUNER 0 0 0 0 5 SDM MODE Service default mode on/off 0
6 SAM MODE Service Align mode on/off 0
2-0 (1) OP_HUE 0 0 0 0
7 SVMA Scavem On / Off 0
OP2 (total DEC value) 4 4 4 4 Total Dec Values 8
3-7 (128) OP_EW_FUNCTION 1 1 1 1 Byte 2 0 MUTE STATUS Mute status 0
176(dec) 1 TUNER AUTO MODE Auto mode 1
3-6 (64) OP_2TUNER_PIP 0 0 0 0
2 CABLE MODE Cable/Antenna mode 0
3-5 (32) OP_PIP_SPLITTER 0 0 0 0
3 LAST POWER MODE Last power status of the set 1
3-4 (16) OP_SPLITTER 0 0 0 0 4 CHILD LOCK MODE Child lock enabled 0
3-3 (8) OP_VIRTUAL_DOLBY 0 0 0 0 5 SURF MODE Surf mode on/off 0
3-2 (4) OP_WIDE_SCREEN 1 1 0 0 6 FACTORY MODE Factory mode on 1
PSNS For PAL colour enhancement in
3-1 (2) OP_WSSB 1 1 0 0 7 1
ES4
3-0 (1) OP_ECO_SUBWOOFER 0 0 0 0 Total Dec Values 202
OP3 (total DEC value) 134 134 128 128 Byte 3 0 RADIO/TV MODE Radio mode or TV mode 0
177(dec) 1 WAKE-UP MODE 0
4-7 (128) OP_PC_MODE 1 1 1 1
2 HOTEL MODE TV in Hotel mode 0
4-6 (64) OP_HD 1 1 1 1 3 HOTEL KBD LOCK Keyboard locked 0
4-5 (32) OP_ULTRA_BASS 0 0 0 0 4 HBL 0
4-4 (16) OP_DELTA_VOLUME 1 1 1 1 5 BLS Blue stretch mode 1
6 SL 0
4-3 (8) OP_TAIWAN_KOREA 0 0 0 0
7 CFA0 Comb filter On/Off 0
4-2 (4) OP_VOLUME_LIMITER 0 0 0 0 Total Dec Values 32
4-1 (2) OP_STEREO_DBX 0 0 0 0 Byte 4 0 Signal Strength Signal Strength Switch in MK2 0
4-0 (1) OP_STEREO_NICAM_2CS 1 1 1 1 178(dec) 1 LPG 0
2 DVD TRAY LOCK Lock/Unlock DVD tray 0
OP4 (total DEC value) 209 209 209 209
3 SCRSAVER MODE Screen saver mode 1
5-7 (128) OP_AV1 1 1 1 1 4 BKS Black Stretch Mode 1
5-6 (64) OP_AV2 0 0 0 0 5 BSD Black Stretch Depth 1
5-5 (32) OP_AV3 1 1 1 1 6 CRA0 Coring on SVM 0
7 PIP QSS PIP QSS 0
5-4 (16) OP_CVI 0 0 0 0
Total Dec Values 56
5-3 (8) OP_SVHS2 0 0 0 0 Byte 5 0 FFI Fast Filter 0
5-2 (4) OP_SVHS3 1 1 1 1 179(dec) NNR No red reduction during blue
1 1
5-1 (2) OP_HOTEL_MODE 0 0 0 0 stretch
2 MUS NTSC matrix 0
5-0 (1) OP_SIMPLY_FACTORY 0 0 0 0
3 GAM Gamma control 1
OP5 (total DEC value) 164 164 164 164 CBS Control sequence of beam cur-
4 0
6-7 (128) OP_PERSONAL_ZAPPING 0 0 0 0 rent limiting
5 LLB Low level of beam current limiter 0
6-6 (64) OP_SMART_SURF 0 0 0 0
6 DSA Dynamic skin tone angle 1
6-5 (32) OP_FMTRAP 0 0 0 0 7 DSK 0
6-4 (16) OP_COMBFILTER 1 1 1 1 Total Dec Values 74
6-3 (8) OP_ACTIVE_CONTROL 1 1 1 1 Byte 6 0 LTI status LTI last status 0
180(dec) 1 INC_LIFE_TIME 0
6-2 (4) OP_VIDEO_TEXT 0 0 0 0
2 PC_MODE 0
6-1 (2) OP_LIGHT_SENSOR 0 0 0 0 3 HD_MODE 0
6-0 (1) OP_TWIN_TEXT 0 0 0 0 4 TACT_SWITCH 0
OP6 (total DEC value) 24 24 24 24 5 SPECIAL_STBY 0
6 HOTEL_OSD DISP. 0
7-7 (128) OP_TIME_WIN1 0 0 0 0
7 HOTEL_MON. OUT 0
7-6 (64) OP_16:9_set 1 1 0 0 Total Dec Values 0
7-5 (32) OP_THAI 0 0 0 0 Byte 7 0 HOTEL_ICONNMODE 0
7-4 (16) OP_RC_Slim_Sofa 1 1 1 1 181(dec) 1 DBE DBE Status 1
2 PC_SLEEP_MODE 0
7-3 (8) OP_DUMMY6 0 0 0 0
3 Reserved Reserved 0
7-2 (4) OP_DUMMY7 0 0 0 0 4 Reserved Reserved 0
7-1 (2) OP_WEST_EU 1 0 1 0 5 Reserved Reserved 0
7-0 (1) OP_MULTI_STANDARD_EUR 1 1 1 1 6 Reserved Reserved 0
7 Reserved Reserved 0
OP7 (total DEC value) 83 81 19 17
Total Dec Values 2
Circuit Descriptions, Abbreviation List, and IC Data Sheets LC4.1E AC 9. EN 57
AC Mains Input
Power Supply
Main NVM
SOG, R_PR+, R_PR-,
G_Y+, G_Y-, B_PB+,
Board Low Pass
Filter Video Filter
B_PB- signal producing
circuits
with LSI
(SM5301BS-
Video Buffer G) FLASH
RGB Output NVM
HERCULES Memory
(VDP+STEREO) Jump
Tuner
TV/FM Embedded 555 PC_HD_SEL
Flash H/V trigger
Schmitt
Sync circuits Pin181,182 LCD
Switch Triggers
(74HC4053D) Panel
SD_PCHD_SEL GM5221 LVDS/TTL
Pin85
Audio (PC_DET) Pin 111
Amplifier(2x2
w)
PC
GND( Industrial
detect
mode)
circuit
+3V3STBY( normal
IIC VGA_5V operation)
RGB or YPbPr
H/V Sync
Compair
AV1 Compair
(Scart or Speakers VGA INPUT
(Service) and HP (UART)
Cinch)
Cinch_to_VGA
Adaptor
(YPbPr)
Audio amplifier(2x5w)
board for 20,23 inch
AUD_SUP AUDIO CONTROL Side AV Audio Output CVBS/YC Input PC Audio Input UART (Optional)
Panel and HP output
SINGALS
(Standby, Mute,) E_14520_046.eps
160904
The PLL tuner delivers the IF-signal, via audio and video SAW- 9.4 Tuner and IF
filters, to the Video Signal Processor and FLASH embedded
TEXT/Control/Graphics Micro Controller TDA120x1 (item On models with FM radio, a Philips UR13xx Tuner with second
7011, also called Hercules). This IC has the following functions:
input (for FM Radio) is used in the TV board. The SIF and FM
Analogue Video Processing
signals are decoded by the Hercules. Tuning is done via I2C.
Sound Demodulation
Audio Interfaces and switching
9.4.1 Video IF Amplifier
Volume and tone control for loudspeakers
Reflection and delay for loudspeaker channels
Micro Controller The IF-filter is integrated in a SAW (Surface Acoustic Wave)
Data Capture filter. One for filtering IF-video (1328) and one for IF-audio
Display (1330). The type of these filters is depending of the standard(s)
that has to be received.
The Hercules has one input for the internal CVBS signal and a
video switch with 3 external CVBS inputs and a CVBS output. The output of the tuner is controlled via an IF-amplifier with
All CVBS inputs can be used as Y-input for Y/C signals. AGC-control. This is a voltage feedback from pin 31 of the
However, only 2 Y/C sources can be selected because the Hercules to pin 1 of the tuner. The AGC-detector operates on
circuit has 2 chroma inputs. It is possible to add an additional top sync and top white level. AGC take-over point is adjusted
CVBS(Y)/C input (CVBS/YX and CX) when the YUV interface via the service alignment mode Tuner' - 'AGC. If there is too
and the RGB/YPRPB input are not needed. One SCART- much noise in the picture, then it could be that the AGC setting
connector is used (SCART1). This connector is fully equipped. is wrong. The AGC-setting could also be mis-aligned if the
The video part delivers the RGB signals to the Scaler IC. picture deforms with perfect signal; the IF-amplifier amplifies
too much.
The Genesis GM5221 Scaler IC receives either the SDTV
video input signals from the Hercules or the PC input signal
from an external computer. Switching between the two signals
is done via the SD/HD selection IC (7461).
After the video processing done by the Scaler, the digital data
is sent via a Low Voltage Differential Signalling bus to the LCD
panel. LVDS is used to improve data speed and to reduce EMI
significantly.
There are two I2C lines and two interrupt and communication
lines (TV_IRQ and TV_SC_COM) for the Scaler control. The
Scaler communicates with the Hercules as a slave device. To
avoid buffer overflow at the Scaler side, the TV_SC_COM line
provides the necessary hardware flow control. To allow bi-
directional communication, the Scaler can initiate a service
interrupt-request to the Hercules via the TV_IRQ line.
For Service, this supply panel is a black box. When defect (this
can be traced via the fault-finding tips, or by strange
phenomena), a new panel must be ordered (see table below for
ordering codes), and after receipt, the defective unit must be
sent for repair.
9.6 Video: Scaler Part (diagram B6, B7, and B8) The Display Output Port provides data and control signals that
permit the Scaler to connect to a variety of display devices
The Genesis GM5221 Scaler is an all-in-one graphics and using a TTL or LVDS interface. The output interface has four
video processing IC for LCD monitors and televisions with up channel 6/8-bit LVDS transmitters and is configurable for single
to XGA output resolutions. The Scaler controls the display or dual wide LVDS. All display data and timing signals are
processing in an LCD TV, e.g. like the deflection circuit in a synchronous with the DCLK output clock. The integrated LVDS
CRT-based TV. It controls all the view modes (e.g. like transmitter is programmable to allow the data and control
"zooming" and "shifting"). Features like PC (VGA) or HD inputs, signals to be mapped into any sequence depending on the
are also handled by this part. specified receiver format.
9.6.1 Features
or
Incredible Mono.
Headphone
Cinch 1 In (AV1) for
AP/LATAM/USA or Audio-IN5L(Pin 34) Amplifier 2x5w
(1) if HP is
used, the
3D Sound (not for AV Stereo).
SCART1 In Audio-IN5R(Pin 35) main
for Europe output
(TDA7297D) for
speakers
will be TruSurround (not for AV Stereo).
muted.
20,23 inch
Virtual Dolby Surround, VDS422 (not for AV Stereo).
Side AV In for all Audio-IN4L(Pin 49) AUDOUTSL(Pin 36)
region Audio-IN4R(Pin 50) AUDOUTSR(Pin 37)
SCART1 Out
Virtual Dolby Surround, VDS423 (not for AV Stereo).
only for Europe
Dolby Pro-Logic (not for AV Stereo).
PC Audio In
Audio-IN2L(Pin 53)
Audio-IN2R (Pin 54) Control Signals Bass Feature that includes:
E_14520_048.eps
160904
Dynamic Ultra-Bass.
Dynamic Bass Enhancement.
Figure 9-3 Block diagram audio processing BBE (not for AV Stereo).
Auto-Volume Leveller.
5 Band Equalizer.
The audio decoding is done entirely via the Hercules. The IF
Loudness Control.
output from the Tuner is fed directly to either the Video-IF or the
All the features stated are available for the Full Stereo versions
Sound-IF input depending on the type of concept chosen.
and limited features for the AV Stereo
There are mainly two types of decoder in the Hercules, an
analogue decoder that decodes only Mono, regardless of any
standards, and a digital decoder (or DEMDEC) that can decode 9.7.3 Audio Amplifier
both Mono as well as Stereo, again regardless of any
standards. The audio amplifier part is very straightforward. Amplification is
done via the integrated power amplifier TDA7297, and delivers
In this chassis, the analogue decoder is used in two cases: a maximum output of 2 x 5 W_rms. Normal operating supply is
It is used for AM Sound demodulation in the Europe from 6.5 V to 18 V.
SECAM LL transmission. Muting is done via the SOUND_ENABLE line connected to pin
It is used for all FM demodulation in AV-Stereo sets. 13 of the amplifier-IC and coming from the Hercules.
The diversity for the Audio decoding can be broken up into two The LC4.1E is not equipped with Lip Sync. This is not needed.
main concepts:
The Quasi Split Sound concept used in Europe and some
AP sets. 9.8 Control
The Inter Carrier concept, used in NAFTA and LATAM.
The UOC-III family makes no difference any more between 9.8.1 Hercules
QSS- and Intercarrier IF, nearly all types are software-
switchable between the two SAW-filter constructions. The System Board has two main micro-controllers on board.
These are:
Simple data settings are required for the set to determine On-chip x86 micro-controller (OCM) from Genesis LCD TV/
whether it is using the Inter Carrier or the QSS concept. These Monitor Controller.
settings are done via the QSS and FMI bit found in SAM On-chip 80C51 micro-controller from Philips
mode. Due to the diversity involved, the data for the 2 bits are Semiconductor UOCIII (Hercules) series.
being placed in the NVM location and it is required to write once Each micro-controller has it own I2C bus which host its own
during start-up. internal devices.
The Hercules is integrated with the Video and Audio Processor.
On top of that, it can be further broken down into various For dynamic data storage, such as SMART PICTURE and
systems depending on the region. The systems or region SMART SOUND settings, an external NVM IC is being used.
chosen, will in turn affect the type of sound standard that is/are Another feature includes an optional Teletext/Closed Caption
allowed to be decoded. decoder with the possibility of different page storage depending
For the case of Europe, the standard consists of BG/DK/I/ on the Hercules type number.
LL for a Multi-System set. There are also versions of
Eastern Europe and Western Europe set and the standard The Micro Controller ranges in ROM from 128 kB with no TXT-
for decoding will be BG/DK and I/DK respectively. FM decoder to 128 kB with a 10 page Teletext or with Closed
Radio is a feature diversity for the Europe sets. The same Caption.
version can have either FM Radio or not, independent of
the system (e.g. sets with BG/DK/I/LL can have or not
have FM radio).
For the case of NAFTA and LATAM, there is only one
transmission standard, which is the M standard. The
diversity then will be based on whether it has a dBx noise
reduction or a Non-dBx (no dBx noise reduction).
For the case of AP, the standard consists of BG/DK/I/M for
a Multi-System set. The diversity here will then depends on
the region. AP China can have a Multi-System and I/DK
version. For India, it might only be BG standard.
Circuit Descriptions, Abbreviation List, and IC Data Sheets LC4.1E AC 9. EN 61
The block diagram of the Micro Controller application is shown 0/6/12 SCART switch control signal on A/V
below. board. 0 = loop through (AUX to TV), 6
IIC BUS1
= play 16:9 format, 12 = play 4:3
Tuner
format
1080i 1080 visible lines, interlaced
ComPair IIC BUS 2
GPROBE for Debug
or ComPair(Scaler) 1080p 1080 visible lines, progressive scan
Sound NVM 1407
Amp
NVM 1406
1405
+3V3STBY 2CS 2 Carrier Stereo
Sound_Enable NVM_WP NVM_WP
ACI Automatic Channel Installation:
HREC 127 111 104 93 92 83 72 71 194 193 187
algorithm that installs TV channels
RST P1.4 P2.0 P0.2 NVRAM NVRAM GPIO2 PC_DET
116
SDA 109
77 DDC_SCL_VGA
89
(GPIO6)
PC_HD_SEL means of a predefined TXT page
ADC1
Status1
115
ADC0 HERCULES INT1 98
TV_IRQ
82 GPIO1
SCALER
68
(PBIAS)
LAMP_ON_OFF ADC Analogue to Digital Converter
Light
Sense P1.1 99
TV_SC_COM
81 GPIO0
67
(PPWR)
PANEL_PWR_CTL
AFC Automatic Frequency Control: control
HD_FILTER
ADC3 120
Keyboard
POWER_DOWN
99
(PWM1)
98 BACK_LIGHT_ADJ1
signal used to tune to the correct
frequency
123 90 GPIO7 (GPIO11/
P2.5 PWM0)
126 111 103 106 107 108 ROM_DATA0-7
97 102 122 128
INT0 P0.4 P2.4 P1.5 INT2 GPIO23 5 6 7 ROM_ADD0-17
P50_LINE_ITV_IR_SW
RC
AGC Automatic Gain Control: algorithm that
controls the video input of the feature
MUX +3V3STBY
Flash ROM
box
Standby
POWER
HIGH or
LOW
level input E_14490_062.eps
AM Amplitude Modulation
EXT_MUTE 160904
TV_IR DOWN
AP Asia Pacific
AR Aspect Ratio: 4 by 3 or 16 by 9
Figure 9-4 Micro Controller block diagram AV Audio Video
B/G Monochrome TV system. Sound
9.8.3 Basic Specification carrier distance is 5.5 MHz
CL Constant Level: audio output to
connect with an external amplifier
The Micro Controller operates at the following supply voltages:
ComPair Computer aided rePair
+3.3 V_dc at pins 4, 88, 94, and 109.
CSM Customer Service Mode
+1.8 V_dc at pins 93, 96, and 117.
CVBS Composite Video Blanking and
I2C pull up supply: +3.3V_dc.
Synchronisation
DAC Digital to Analogue Converter
9.8.4 Pin Configuration and Functionality DBE Dynamic Bass Enhancement: extra
low frequency amplification
The ports of the Micro Controller can be configured as follows: DFU Directions For Use: owner's manual
A normal input port. DNR Dynamic Noise Reduction
An input ADC port. DRAM Dynamic RAM
An output Open Drain port. DSP Digital Signal Processing
An output Push-Pull port. DTS Digital Theatre System (a sound
An output PWM port. system, similar to Dolby Digital)
Input/Output Port EEPROM Electrically Erasable and
Programmable Read Only Memory
EPLD Electrically Programmable Logic
Device
EU EUrope
EXT EXTernal (source), entering the set by
SCART or by cinches (jacks)
FBL Fast Blanking: DC signal
accompanying RGB signals
FLASH FLASH memory
FM Field Memory / Frequency Modulation
FRC Frame Rate Converter
H H_sync to the module
HD High Definition
HP HeadPhone
I Monochrome TV system. Sound
carrier distance is 6.0 MHz
I2C Integrated IC bus
I2S Integrated IC Sound bus
IC Integrated Circuit
IF Intermediate Frequency
IR Infra Red
ITV Institutional TV
IRQ Interrupt ReQuest
LATAM LATin AMerica
LC04 Philips chassis name for LCD TV 2004
project
LCD Liquid Crystal Display
LED Light Emitting Diode
L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LS LoudSpeaker
EN 62 9. LC4.1E AC Circuit Descriptions, Abbreviation List, and IC Data Sheets
LVDS Low Voltage Differential Signalling, RGB Red, Green, and Blue. The primary
data transmission system for high colour signals for TV. By mixing levels
speed and low EMI communication. of R, G, and B, all colours (Y/C) are
M/N Monochrome TV system. Sound reproduced.
carrier distance is 4.5 MHz RGBHV Red, Green, Blue, Horizontal sync,
MOSFET Metal Oxide Semiconductor Field and Vertical sync
Effect Transistor ROM Read Only Memory
MPEG Motion Pictures Experts Group SAM Service Alignment Mode
MSP Multi-standard Sound Processor: ITT SIF Sound Intermediate Frequency
sound decoder SC SandCastle: two-level pulse derived
MTV Mainstream TV from sync signals
NC Not Connected S/C Short Circuit
NICAM Near Instantaneous Compounded SCART Syndicat des Constructeurs
Audio Multiplexing. This is a digital d'Appareils Radiorecepteurs et
sound system, used mainly in Europe. Televiseurs
NTSC National Television Standard SCL CLock Signal on I2C bus
Committee. Colour system used SD Standard Definition
mainly in North America and Japan. SDA DAta Signal on I2C bus
Colour carrier NTSC M/N = 3.579545 SDRAM Synchronous DRAM
MHz, NTSC 4.43 = 4.433619 MHz SECAM Squence Couleur Avec Mmoire.
(this is a VCR norm, it is not Colour system used mainly in France
transmitted off-air) and Eastern Europe. Colour carriers =
NVM Non Volatile Memory: IC containing 4.406250 MHz and 4.250000 MHz
TV related data (for example, options) SIF Sound Intermediate Frequency
O/C Open Circuit SMPS Switch Mode Power Supply
OSD On Screen Display SOPS Self Oscillating Power Supply
P50 Project 50 communication: protocol S/PDIF Sony Philips Digital InterFace
between TV and peripherals SRAM Static RAM
PAL Phase Alternating Line. Colour system SSB Small Signal Board
used mainly in Western Europe STBY STandBY
(colour carrier = 4.433619 MHz) and SVHS Super Video Home System
South America (colour carrier PAL M = SW SubWoofer / SoftWare
3.575612 MHz and PAL N = 3.582056 THD Total Harmonic Distortion
MHz) TXT TeleteXT
PC Personal Computer uP Microprocessor
PCB Printed Circuit Board (or PWB) VGA Video Graphics Array
PIP Picture In Picture WYSIWYR What You See Is What You Record:
PLL Phase Locked Loop. Used, for record selection that follows main
example, in FST tuning systems. The picture and sound
customer can directly provide the XTAL Quartz crystal
desired frequency Y Luminance signal
PSU Power Supply Unit YPbPr Component video (Y= Luminance, Pb/
PWB Printed Wiring Board (or PCB) Pr= Colour difference signals)
RAM Random Access Memory Y/C Luminance (Y) and Chrominance (C)
RC Remote Control transmitter signal
RC5 or 6 Remote Control system 5 or 6, the Y-OUT Luminance-signal
signal from the remote control receiver YUV Component video
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
Circuit Descriptions, Abbreviation List, and IC Data Sheets LC4.1E AC 9. EN 63
DDC2Bi
Di g i t al Co l o r A d j u s t m en t s
Co l o r Sp ac e Co n v er s i o n
w i t h ed g e en h an c em en t
Co l o r L o o k -u p -Tab l e
Zo o m / Sh r i n k Fi l t er
ACM-II
Ultra- uv
I m a g e C ap t u r e /
Chroma
Meas u r em en t
Reliable Adjust
DVI DVI Rx Display 2X LVDS
Timing LVDS Panel I/F
HDCP
Y ACC Control Tx
DDC2Bi Luma
Shaping
422 to 444
BT 656 Conversion
Histogram
Test
Pattern
Generator High-light Window
E_14520_049.eps
011104
Block Diagram
Block diagram of the AV-stereo TV processor with audio DSP
SSIF
QSSO/AMOUT
SCART/CINCH IN/OUT LS-OUT HP-OUT
I2S
REFO L R L R
AGCOUT
VISION IF/AGC/AFC
PLL DEMOD. PAL/SECAM/NTSC BASE-BAND -PROCESSOR AND TELETEXT DECODER
VIFIN
SOUND TRAP
DECODER DELAY LINE DIGITAL SIGNAL PROCESSING FEATURES
GROUP DELAY
VIDEO AMP.
IFVO/SVO/ REF
CVBSI SCAVEM
YUV IN/OUT
YSYNC ON TEXT BL R G B CR
CVBS2/Y2 C RO
CON. RGB CONTROL
CVBS3/Y3 DIGITAL PEAKING GO
VIDEO SWITCH OSD/TEXT INSERT
C2/C3 2H/4H SCAN VELOCITY
VIDEO IDENT. CONTR/BRIGHTN BO
COMB FILTER
CVBS4/Y4 VIDEO FILTERS MODULATION BRI CCC
C4 Y DELAY ADJ. U/V DELAY BCLIN
WHITE-P. ADJ.
Y
CVBSO/ BLKIN
PIP
SVM
H/V SYNC SEP. H/V
RGB/YPRPB INSERT SKIN TONE RGB MATRIX
H-OSC. + PLL VERTICAL
U/V TINT BLUE STRETCH
2nd LOOP & EAST-WEST YUV INTERFACE
BLACK STRETCH
H-SHIFT SATURATION
H-DRIVE GEOMETRY GAMMA CONTROL
SAT
Vo Uo Yo Yi Vi Ui
V-DRIVE EHTO BL
G/Y
R/PR B/PB
HOUT EWD B/PB
SWO1 BL G/Y R/PR
(CVBSx/Yx) (Cx)
Pin Configuration
121 VREF_NEG_HPL+HPR
122 VREF_POS_LSR+HPL
123 VREF_NEG_LSL+LSR
120 VREF_POS_HPR
124 VREF_POS_LSL
99 DVBIN2/SIFIN2
116 VGUARD/SWIO
DVBIN1/SIFIN1
125 VDDA3(3.3V)
AVL/EWD
118 XTALOUT
98 AGCOUT
DECDIG
SECPLL
DECBG
119 XTALIN
127 VSSC4
117 VSSA1
126 VDDC4
128 VSSP2
PH1LF
PH2LF
GNDIF
VIFIN1
VIFIN2
107 VDRB
GND1
106 VDRA
97 EHTO
IREF
VSC
VP1
103
111
104
114
113
112
105
102
101
100
115
110
109
108
AVL/SWO/SSIF/
P1.5/TX 1 Pin configuration stereo and AV-stereo versions with Audio DSP 96 REFIN/REFOUT
P1.4/RX 2 95 AUDIOIN5L
P1.2/INT2 3 94 AUDIOIN5R
VSSC3 4 93 AUDOUTSL
VDDC3 5 92 AUDOUTSR
P2.5/PWM4 6 91 DECSDEM
P2.4/PWM3 7 90 AMOUT/QSSO/AUDEEM
VSSC1/P 8 89 GND2
P3.3/ADC3 9 88 PLLIF
P3.2/ADC2 10 87 SIFAGC/DVBAGC
DECV1V8 11 86 DVBO//IFVO/FMRO
VDDC1(1.8) 12 85 DVBO/FMRO
P3.1/ADC1 13 84 VCC8V
P3.0/ADC0 14 83 AGC2SIF
P2.3/PWM2 15 82 VP2
P2.2/PWM1 16 81 SVO/IFOUT/CVBSI
P2.1/PWM0 17 80 AUDIOIN4L
P2.0/PMW 18 79 AUDIOIN4R
VDDP(3.3V) 19 78 CVBS4/Y4
P1.7/SDA 20 77 C4
P1.6/SCL 21 76 AUDIOIN2L/SSIF
P1.3/T1 22 75 AUDIOIN2R
P0.0/I2SDI1 23 74 CVBS2/Y2
P0.1/I2SDO1 24 73 AUDIOIN3L
P0.2/I2SDO2 25 72 AUDIOIN3R
P0.3/I2SCLK 26 71 CVBS3/Y3
P0.4/I2SWS 27 70 C2/C3
VSSC2 28 69 AUDOUTLSL
VDDC2 29 68 AUDOUTLSR
P1.1/T0 30 67 AUDOUTHPL
P1.O/INT1 31 66 AUDOUTHPR
INT0/P0.5 32
QFP-128 0.8 mm pitch face down version 65 CVBSO/PIP
VREFAD_POS 39
VP3 47
VSScomb 61
VOUT(SWO1) 53
VSSadc 34
BO 42
UIN (B/PB-2) 58
G/Y-3 50
HOUT 62
VREFAD_NEG 40
GND3 48
GNDA 37
BLKIN 45
VDDcomb 60
SVM 64
YIN(G/Y-2/CVBS/Y-X) 57
VIN(R/PR-2/C-X) 59
UOUT(INSW-2) 54
VDDA2(3.3V) 35
GO 43
FBISO/CSY 63
VREFAD 38
BCLIN 46
INSSW3 52
YSYNC 56
VDDA(1.8V) 36
RO 44
B/PB-3 49
R/PR-3 51
YOUT 55
VDDadc(1.8) 33
VDDA1(3.3V.) 41
E_14490_063.eps
240505
Block Diagram
INT
RESET#
I2 C CSDA
Registers
DSDA I2C ---------------- Slave CSCL
Aux Data
Logic
HDCP HDCP Block
Keys Decryption MCLK MCLKOUT
EEPROM Engine Gen
R_EXT Audio MCLKIN
Data
SCK
Decode
XOR Mode WS
Mask Control
Logic
SD0
RXC Block
PanelLink SPDIF
RX0 TMDS TM
RX1
Digital control DE
Core signals Video HSYNC
RX2 control
signals
Color VSYNC
Space ODCK
Converter
24 Q[23:0]
Up/Down
Sampling AnGY
Video
30 AnRPr
DAC AnBPb
OMPC
SETR
Pin Configuration
MCLKOUT
MCLKIN
HSYNC
VSYNC
OGND
OGND
ODCK
SPDIF
OVCC
SDO
GND
VCC
SCK
Q14
Q15
Q16
Q17
Q18
Q19
Q23
Q20
Q21
Q22
WS
DE
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
Q13 51 25 N/C
Q12 52 24 PLLIN
Q11 53 23 PVCC2
Q10 54 22 PGND2
Q9 55 21 OVCC
OVCC 56 20 RSVDO
OGND 57 19 RSVDO
Q8 58 18 RSVDL
Q7 59 17 VCC
Q6 60 16 GND
Q5 61 15 AnBPb
Q4 62
SiI 9993 14 DACVCCB
Q3 63 100-Pin 13 DACGNDB
VCC 64 12 AnGY
65
TQFP 11 DACVCCG
GND
OGND 66 (Top View) 10 DACGNDG
OVCC 67 9 RSET
Q2 68 8 COMP
Q1 69 7 AnRPr
Q0 70 6 DACVCCR
INT 71 5 DACGNDR
RESET# 72 4 N/C
RSVDL 73 3 N/C
CSCL 74 2 DACGND
100
CSDA 75 1 DACVCC
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
AGND
AVCC
RX1-
DSDA
EXT_RES
OGND
AVCC
AGND
AGND
AVCC
AGND
AVCC
AGND
GND
VCC
RXC-
RXC+
RX0-
RX0+
RX1+
RX2-
RX2+
DSCL
PGND1
PVCC1
E_14620_149.eps
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