2.

CLASS-A AMPLIFIER
The simplest possible circuit of a class-A amplifier is shown in Figure-2.1 where
R L is the load resistance and R B is the biasing resistance.
V
CC

R
L
R
B i vO
i C
B +
v
IN v
CE
_

Figure 2.1: A Class-A Amplifier

iC
iC

2 ICQ ac and dc load lines

I
CQ
Q-Point
Time
0 vCE
0 VCEQ VCC
vCE

Time

Figure-2.2: Q-point and load lines

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We already know that for the maximum undistorted peak-to-peak output voltage
swing the Q-point should be selected on the basis of the following equation:
VCC
I CQ = (2.1)
R AC + R DC
In this equation, R D C is the dc resistance and R A C is the ac resistance in the
collector-emitter circuit. In Figure-2.1, there is only one resistance in the circuit.
Thus, R D C = R A C = R L . Therefore, from (2.1), we obtain
VCC
I CQ = (2.2)
2RL
The collector-to-emitter voltage at the operating point is
1
VCEQ = VCC − I CQ R L = VCC (2.3)
2
Since the ac load line is exactly the same as the dc load line, the ac point
of operation moves along the same line. When the input signal is zero, the
transistor is operating at its Q-point and the ac output voltage is zero. When the
ac input voltage goes positive, the collector current increases and the collector-
to-emitter voltage decreases.
When the collector current reaches its maximum value of 2 I C Q , the
collector-to-emitter voltage becomes zero. This is true only under the ideal
condition neglecting the saturation voltage drop across the transistor. Thus,
when the ac component of the input signal is positive, the ac component of the
collector current is also positive, and the ac component of the output voltage
across the load is negative. In other words, the input signal and the output
signal are 180° out of phase. The output voltage is also 180° out of phase with
the collector current.
When the input signal goes negative, it causes a decrease in the collector
current and a corresponding increase in the collector-to-emitter voltage. The ac
component of the output voltage is now positive. This situation continues until
the collector current reaches zero and the collector-to-emitter voltage becomes
equal to V C C . This is the maximum value of the collector-to-emitter voltage
ignoring the nonlinear operation in the cut-off region.

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 From the above discussion it should become clear that the output voltage
is zero when the input signal is zero and the collector voltage is ½ V C C . At that
time the collector current is I C Q . As the collector current becomes 2 I C Q , its ac
component has a maximum value of I C Q , and the collector-to-emitter voltage is
zero. Thus, the ac component of the output voltage has a minimum value of – ½
V C C . When the collector current becomes zero, the ac component of the
collector current has a minimum value of – I C Q , and the ac component of the
output voltage attains a maximum value of ½ V C C . With this understanding, we
can write the time-domain expressions for the total collector current and total
collector-to-emitter voltage as
i C = I CQ + I CQ sin(ωt ) (2.4)

1 1
v CE = VCC − VCC sin(ωt ) (2.5)
2 2

where ω is the frequency of the input signal, and the input signal has been
assumed to vary sinusoidally. During our discussion thus far, we have tacitly
assumed that the size of each capacitor is so large that it behaves as a short
circuit at the operating frequency ω .
The instantaneous power dissipated by the transistor (ignoring the
contribution due to the base current) is
1 1
pT = I CQ VCC − I CQ VCC sin 2 (ωt ) (2.6)
2 2
where the first term, ½ I C Q V C C , is the power dissipation at the Q-point when
there is no input signal. The second term, ½ I C Q V C C sin 2 (ωt), is due to the
input signal. Note the presence of the minus sign in the above equation. It
simply highlights the fact that the transistor dissipates maximum power when it
operates at its Q-point. Therefore, for class-A operation, we must select the
transistor on the basis of its dc power dissipation. At any other time when
the input signal is present, the transistor dissipates less power. In other words,
the transistor’s operation is safer from the power dissipation point of view when
the input signal is present. Figure-2.3 shows a plot of the instantaneous power
dissipation by the transistor.

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 Instaneous Power Dissipated by the Transistor

1 / 2 VCC I CQ

0 T/2 T Time

Figure 2.3: Instantaneous power dissipated by the transistor

Since the average value of a sin 2 ( ω t) function is ½, the average power

dissipated by the transistor, from (2.6), is
PT(AVG) = ¼ IC Q VCC (2.7)
The instantaneous power delivered to the load is
p L = I CQ
2
R L sin 2 (ωt ) (2.8)

Thus, the average power delivered to the load is

1 2
PL = I CQ R L (2.9)
2
We can substitute for I C Q R L = ½ V C C from (2.2), and obtain an expression for
the maximum value of the average power delivered to the load as
1
PL ( MAX ) = I CQ VCC (2.10)
4
Note that the ac component of the output collector current can be less than I C Q .
Since it cannot be greater than I C Q , the above equation yields the maximum
value of the output power. The subscript MAX is used to highlight this fact.
Neglecting the bias current, the power supplied by the source is
PS = I CQ VCC (2.11)

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 As we know the maximum value of the average power delivered to the
load and the power supplied by the source, we can determine the efficiency of
the class-A amplifier as

Average power delivered to the load P 1

η= = L = = 0.25 (2.12)
Power sup plied by the voltage source PS 4

Thus, the efficiency of the class-A amplifier is only 25%. This should be treated
as the maximum efficiency of the class-A amplifier owing to the following
reasons:
(1) The saturation voltage is not zero. Thus, the negative swing of the
collector-to-emitter voltage is less than ½ V C C .
(2) We would certainly like to avoid the nonlinear distortion in the cut-off
region. Thus, the maximum swing of the output voltage has to be less that
½ V C C as well.
(3) We have neglected the power dissipation in the base circuit. For high-
power applications, this power loss must also be taken into consideration.
The power loss in the base circuit increases the total power supplied by
the source.
(4) The maximum possible peak-to-peak swing in the collector current is 2
I C Q . The desired peak-to-peak swing can be less than that.
When we take the above points into consideration and design a class-A
amplifier, we find that the overall efficiency is considerably less than 25%.
Did you notice that the average power dissipated by the transistor at
its Q-point is twice as much as the average power output? For this reason,
class-A configuration should be used only when the power output is less than or
equal to 1 W. As ironic as it may be, the transistor dissipates 2 watts for each
watt of power output. You may have also realized that the circuit we have just
analyzed is nothing but a common-emitter amplifier. We now present the
design of a common-emitter class-A power amplifier.

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Example – 2.1: Common-Emitter Class-A Amplifier Design _______________
Design a common-emitter amplifier that delivers 0.5-W power to a 100- Ω
resistor. Use a transistor that has a maximum current rating of 500 mA,
collector-to-emitter saturation voltage of 0.5 V, breakdown voltage of 40 V, and
the common-emitter current gain of 100.

Solution:
Let us first design the common-emitter amplifier. We have selected a four-
resistor bias circuit as shown in Figure-2.4 because of its stable operation. The
emitter resistance is usually very small. It may or may not be bypassed by a
capacitor. In order to meet input resistance requirements, it may be necessary to
split R E into two resistors. During the ac operation, one part of R E remains in
the circuit while the other part is bypassed.

V
CC

R R
1 L
i i v
1 C O
+
v
IN v
CE
i _
B

R C
R E
2
i
i E
2

Figure-2.4: Common-emitter class-A amplifier

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The average power supplied to the 100- Ω load resistor is 0.5 W. From (2.9), we
obtain
2 PL 2 × 0 .5
I CQ = = = 0.1 A or 100 mA
RL 100

The collector current at the Q-point under ideal conditions is 100 mA. The
maximum current through the transistor is expected to be twice as much, i.e. 200
mA during the positive excursion of the collector current. Since the transistor
can supply a maximum current of 500 mA, it is safe to use this transistor. The
undistorted maximum output voltage swing is 10 V (100 mA × 100 Ω ).
Let us add a 10% safety factor to the current in order to keep the swing from
entering the saturation region on one hand and the cut-off region on the other.
This will help keep the distortion to its minimum.
Therefore, let us select, I C Q = 110 mA.
From (2.2), we can now determine the supply voltage as
VCC = 2 I CQ R L = 2 × 0.11 × 100 = 22 V

Since we are including a resistor in the emitter branch, we need some voltage
drop across it as well. Let us select a 10- Ω resistor for R E . Then the voltage
drop across it would be I E R E = I C Q R E / α = 0.11 × 10 ⁄ 0.99 = 1.11 V. (Note that
α = 0.99 when β = 100). The voltage drop across R L is 11 V for I C = 0.11 A.
Let us use a 24-V dc supply.
Then V C E Q is approximately equal to 11.89 V. Since the minimum voltage across
the transistor is given as V C E ( S A T ) = 0.5 V, the maximum negative swing of the
output voltage is 11.39 V (greater than 10 V) and is acceptable at this point.
The base voltage at the Q-point is 1.11+ 0.7 = 1.81 V. Here we have assumed
that the base-to-emitter voltage drop is 0.7 V.
At the Q-point, the base current is
I CQ 110 mA
I BQ = = = 1.1 mA
β 100

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In order to minimize the variations in the biasing current due to the variations in
the common-emitter current gain β , let us select a current in R 2 that is nearly
equal to 10 times the base current. This is the method I often use and it seems
to work well. If you have some other preference that you have found
satisfactory, be my guest and use it. This is the beauty of designing a circuit
that is expected to perform as well as predicted. When the actual constraints
are not known, we are at liberty to impose our own constraints.
Thus, we can now compute R 2 as
1.81 V
R2 = = 164.54 Ω
10 × 1.1 mA

The nearest value of the standard resistor in our crib is 150 Ω .

So, let us select R 2 = 150 Ω .
1.81 V
The current in R 2 : I2 = = 12.067 mA
150 Ω

Thus, the current through R 1 : I1 = I BQ + I 2 = 1.1 + 12.067 = 13.167 mA

(24 − 1.81) V
We can now compute R 1 : R1 = = 1.685 kΩ
13.167 mA

Let us use a 1-k Ω resistor in series with a 680- Ω resistor for R 1 .

In order to keep the input resistance high, let us not bypass R E . Therefore, we
don’t need the capacitor C for this design.
Verification of the Q-point: The analysis is no different than the dc circuit
analysis of a transistor.
24 × 150
VBB = = 1.967 V
150 + 1680
150 × 1680
RB = = 137.7 Ω
150 + 1680

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 1.967 − 0.7
Thus, the base current: IB = = 1.104 mA
137.7 + 101 × 10
Hence, at the Q-point current in the transistor, we have
I B Q = 1.104 mA,
I C Q = 100 I B Q = 110.4 mA,
and I E Q = 101 I B Q = 111.5 mA
The collector-to-emitter voltage is
V C E Q = 24 – 0.1104 × 100 – 0.1115 × 10 = 11.85 V.
Now the maximum value of the negative output voltage swing is 11.35 V (larger
than the required) and the design so far is acceptable.
Since RE is not bypassed, the dc and ac resistances in the collector-emitter
circuit are equal. Therefore, the dc load line is also the ac load line as shown in
Figure-2.5.

iC (mA)

IDCM = 218

ICQ = 110.4

0 v CE (V)
24
0 11.85
VCEQ VCC

Figure 2.5: The Q-point and the load lines

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The dc load line is given as
V C C = V C E + I C (R C + R E / α )
In the above equation, R D C = R C + R E / α = 100 + 10/0.99 = 110.1 Ω .
The dc load line intersects the x-axis at V D C M = V C C = 24 V, and the y-axis at
I D C M = 24/110.1 = 0.218 A.
Since I C Q is 110.4 mA, the maximum possible positive swing in the current is
107.6 mA (218 mA – 110.4 mA). The maximum possible negative swing of course
is 110.4 mA. Since we only need an undistorted symmetric swing of 100 mA, we
are hopeful to avoid the operation in the saturation as well as in the cut-off
regions of the transistor as well.
The emitter and base voltages are
VE = 10 × 0.1115 = 1.115 V
VB = VE + VBE = 1.115 + 0.7 = 1.815 V
24 − 1.815
Thus, the current through R 1 : I1 = = 13.21 mA
1.68
Total current supplied by the 24-V source is
I S = I CQ + I1 = 110.4 + 13.21 = 123.61 mA

The power supplied by the dc source, taking into account the power dissipated
by the biasing resistors, is
PS = (24 V)(123.61 mA) = 2.966 W
The circuit is going to deliver the require power output of 0.5 W. Hence,
the efficiency of the class-A, common-emitter amplifier is
0 .5
η= = 0.1686 or 16.86%
2.966
As expected, it is certainly less than the theoretical maximum of 25% predicted
under ideal conditions.

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The maximum power dissipated by the transistor at its Q-point is
PT ( MAX ) = (11.85 V)(110.4 mA) = 1.308 W .

The transistor must be selected on the basis of maximum power dissipated at

the operating temperature. At the end of this booklet, I will introduce you to the
thermal design of a transistor.

+ iin +
rπ ic
ib
vin RL vo
R
RE io

_ _

Figure 2.6: Equivalent circuit for ac analysis

AC Equivalent Circuit
In order to determine the voltage gain, current gain, power gain and input
resistance, we can represent the circuit in the mid-frequency range by its model
as shown in Figure 2.6. Since the base current is 1.104 mA, the equivalent
resistance in the base circuit is
25
rπ = = 22.64 Ω
1.104
The base current can now be computed as
v in v in
ib = = (2.13)
rπ + (β + 1) R E (β + 1)(re + R E )

rπ
where re = (2.14)
β +1
is the equivalent resistance in the emitter circuit.

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The collector current is
β v in
ic = β ib = (2.15)
(β + 1)(re + R E )
The output current is
β v in
io = − ic = − (2.16)
(β + 1)(re + R E )
Hence, the output voltage is
β R L v in
vo = R L io = − (2.17)
(β + 1)(re + R E )
Finally, the voltage gain is
vo β RL
AV = =− (2.18)
v in (β + 1)(re + R E )

For very large β , the above equation can be approximated as

vo RL
AV = ≅− (2.19)
v in (re + R E )
When r e is very small than R E , we can further approximate the voltage gain
equation as
vo R
AV = ≅− L (2.20)
v in RE
This equation can be used in the design of a class-A amplifier when the voltage
gain is specified. Note that r e cannot be ignored especially when R E is zero.
In out example, we have R L = 100 Ω , R E = 10 Ω , r π = 22.64 Ω , r e = 22.64/101 =
0.2264 Ω , and β = 100. Substituting these values in (2.18), we obtain the voltage
gain as - 9.68.
The input resistance is simply the parallel combination of R B and ( β +1)(r e +R E ).
That is,
R i n = R B || ( β +1)(r e +R E ) (2.21)
In our case, R i n = 137.7 Ω || (101)(10.2264) = 121.5 Ω

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The input current is
v in
i in = (2.22)
R in

io β R in
Thus, the current gain: AI = =− (2.23)
i in β + 1 re + R E

This expression can also be approximated when β is very large.

For our example, the current gain is
100 121.5
AI = − = − 11.76
101 10.2264
Finally, the power gain is
A P = A V A I = (− 9.68)(− 11.76) = 113.84
Using the peak-to-peak swing of 200 mA for the output current, the peak-to-peak
swing in the output voltage is (200 mA)(100 Ω ) = 20 V. Since the magnitude of
the voltage gain is 9.68, the peak-to-peak swing in the input voltage must be
20/9.68 = 2.066 V.
Note that the input resistance of the amplifier is low. Therefore, its driver circuit
must have low output resistance in order to avoid the loading effect. An emitter
follower as the driver is a very good candidate for this application.

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