5 4 3 2 1

D D

Redwood 11.6" Schematic Document

Bay Trail - M
C C

2013-12-17
REV : X01

DY : None Installed
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A Redwood SMB TouchPad A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 1 of 102
5 4 3 2 1
 5 4 3 2 1

CHARGER
BQ24715J 44
INPUTS OUTPUTS
Redwood 11.6" Board Block Diagram DCBATOUT BT+

SYSTEM DC/DC
Project code : 4PD00K010001 45
TPS51225
PCB P/N : 13270 INPUTS OUTPUTS
Revision : SB 5V_S5
DCBATOUT
3D3V_S5
D D

CPU DC/DC
ISL95833 46-47
4 INPUTS OUTPUTS
DCBATOUT VCC_CORE
DDR3L/ 1.35V
DDR3L 1333MHz Channel A
DDR3L-1333 SYSTEM DC/DC
Intel CPU SY8206 50
Slot 1 12
INPUTS OUTPUTS
Bay Trail-M IO Board
DCBATOUT 1D0V_S5
BGA1170 SYSTEM DC/DC
PCIe x 1 Port0
Package NGFF TPS51363 49
LCD 11.6" 25*27*1.4 WLAN & BT INPUTS OUTPUTS
eDP combo module
11.6 HD (1366 x 768) 52 USB 2.0 HUB2 USB2.0 x 1
USB 2.0 HUB1 DCBATOUT 1D35V_S3
2.0 ports(4)
2.0 ports(4)
USB2.0 USB2.0x1 AU6259B61 SYSTEM LDO
33 USB2.0 x 1
USB2.0 x 1 Card reader SD/SDHC/MMC
RealTek TLV70218 51
USB2.0 x 1 AU6259B61 RTS5176 INPUTS OUTPUTS
HDMI 1.4a 54 HDMI
3D3V_S5 1D8V_S5
USB2.0 x 1 USB2.0
USB3.0 SYSTEM LDO
C C
TLV70215 51
USB3.0 / Power share
INPUTS OUTPUTS
USB PowerShare G Sensor
34
USB2.0
TI
USB2.0 USB2.0 x 1 Touch Panel 52
3D3V_S5 1D5V_S0
TPS2544RTER 34 ST LNG3DMTR 67
Step Down Regulator
USB 3.0/2.0 ports (4) Sensor Hub SYW232 51
2CH HD Audio Codec ETHERNET (10/100/1000Mb) USB2.0 x 1 I2C Gyro INPUTS OUTPUTS
ST
SPEAKER HD Audio High Definition Audio 35 STM32L151CBU6 ST
RealTek 67 1D0V_S0_PG 1D05V_S0
ALC3234 SATA ports (2) L3GD20
27 LOAD SWITCH
PCIe ports (4)
LPC I/F
G + E-compass TPS22966 37
Combo Jack USB2.0 x 1 Camera / ALS 64 ST INPUTS OUTPUTS
LSM303D
1D8V_S5 1D8V_S0
SPI Flash HOME button BD on Panel side
W25Q64FWSSIG SPI LOAD SWITCH
TPS22965 37
8MB 25 SMBus
Free Fall Sensor INT2 INPUTS OUTPUTS
ST LNG3DMTR 68
1D0V_S5 1D0V_S0
SMBus

5,7,8,9,10,
I2C 11,15,16,18,19,21
SATA PORT0 HDD
B
56 B

LPC debug port PCB LAYER

LPC BUS
65

L1:Top L4:Signal
L2:VCC L5:GND
L3:Signal L6:Bottom
KBC

Touch PAD Thermal

NUVOTON SMBus
NUVOTON 26
PS2 NPCE285P NCT7718W
62

Charger
SMBus TI
BQ24715J 44
SPI Flash
PM25LD010C SPI DC FAN Controller DC FAN
128KB
25 24 ANPEC
APL5606AKI
Module
26 26
A A

Int.
KB
62
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Block Diagram
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 2 of 102
5 4 3 2 1
 5 4 3 2 1

USB Port Block Diagram

D D

Port0 USB2.0x1 USB3.0 CONN34

Intel CPU
Bay Trail-M
BGA1170 Port1 USB2.0x1 Left USB2.0 CONN [Debug] 33
Package
25*27*1.4

Port2 USB2.0x1 HD CAMERA 52

C C

25M Xtal Port3 USB2.0 x 1 USB 2.0 HUB1

32.768 Xtal Port1
2.0 ports(4)
AU6259B61

Port2 USB2.0 x 1 Sensor Hub IO Board

12M Xtal 67

USB 2.0 HUB2 Port1 USB2.0 x 1 SD Card reader

2.0 ports(4)
Port3 USB2.0 x 1 Touch Screen AU6259B61
52

Panel side Port2 USB2.0 x 1 Right USB2.0 CONN

B B
Port4 USB2.0 x 1

Port3 USB2.0 x 1
NGFF
12M Xtal 35 WLAN & BT
combo module

Port4
12M Xtal

A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Block Diagram

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 3 of 102
 5 4 3 2 1
SSID = CPU

D D

C C

Blanking

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (Reserved)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 4 of 102
 5 4 3 2 1

SSID = CPU

D D

CPU1A 1 OF 13 CPU1B 2 OF 13

M_A_A0 K45 BAY TRAIL-M/D SOC M36 M_A_DQ<0> AY45 BAY TRAIL-M/D SOC BG38
DRAM0_MA_0 DRAM0_DQ_0 M_A_DQ<0> (12) DRAM1_MA_0 DRAM1_DQ_0
M_A_A1 H47 J36 M_A_DQ<1> BB47 BC40
DRAM0_MA_1 DRAM0_DQ_1 M_A_DQ<1> (12) DRAM1_MA_1 DRAM1_DQ_1
M_A_A2 L41 P40 M_A_DQ<2> AW41 BA42
DRAM0_MA_2 DRAM0_DQ_2 M_A_DQ<2> (12) DRAM1_MA_2 DRAM1_DQ_2
M_A_A3 H44 M40 M_A_DQ<3> BB44 BD42
M_A_A4 DRAM0_MA_3 DRAM0_DQ_3 M_A_DQ<4> M_A_DQ<3> (12) DRAM1_MA_3 DRAM1_DQ_3
H50 P36 M_A_DQ<4> (12) BB50 BC38
M_A_A5 DRAM0_MA_4 DRAM0_DQ_4 M_A_DQ<5> DRAM1_MA_4 DRAM1_DQ_4
G53 N36 M_A_DQ<5> (12) BC53 BD36
M_A_A6 DRAM0_MA_5 DRAM0_DQ_5 M_A_DQ<6> DRAM1_MA_5 DRAM1_DQ_5
(12) M_A_A[15:0] H49 K40 M_A_DQ<6> (12) BB49 BF42
M_A_A7 DRAM0_MA_6 DRAM0_DQ_6 M_A_DQ<7> DRAM1_MA_6 DRAM1_DQ_6
D50 K42 M_A_DQ<7> (12) BF50 BC44
M_A_A8 DRAM0_MA_7 DRAM0_DQ_7 M_A_DQ<8> DRAM1_MA_7 DRAM1_DQ_7
G52 B32 M_A_DQ<8> (12) BC52 BH32
M_A_A9 DRAM0_MA_8 DRAM0_DQ_8 M_A_DQ<9> DRAM1_MA_8 DRAM1_DQ_8
E52 C32 M_A_DQ<9> (12) BE52 BG32
M_A_A10 DRAM0_MA_9 DRAM0_DQ9_C32 M_A_DQ<10> DRAM1_MA_9 DRAM1_DQ_9
K48 C36 M_A_DQ<10> (12) AY48 BG36
M_A_A11 DRAM0_MA_10 DRAM0_DQ_10 M_A_DQ<11> DRAM1_MA_10 DRAM1_DQ_10
E51 A37 M_A_DQ<11> (12) BE51 BJ37
M_A_A12 DRAM0_MA_11 DRAM0_DQ_11 M_A_DQ<12> DRAM1_MA_11 DRAM1_DQ_11
F47 C33 M_A_DQ<12> (12) BD47 BG33
M_A_A13 DRAM0_MA_12 DRAM0_DQ_12 M_A_DQ<13> DRAM1_MA_12 DRAM1_DQ_12
J51 A33 M_A_DQ<13> (12) BA51 BJ33
M_A_A14 DRAM0_MA_13 DRAM0_DQ_13 M_A_DQ<14> DRAM1_MA_13 DRAM1_DQ_13
B49 C37 M_A_DQ<14> (12) BH49 BG37
M_A_A15 DRAM0_MA_14 DRAM0_DQ_14 M_A_DQ<15> DRAM1_MA_14 DRAM1_DQ_14
B50 B38 M_A_DQ<15> (12) BH50 BH38
DRAM0_MA_15 DRAM0_DQ_15 M_A_DQ<16> DRAM1_MA_15 DRAM1_DQ_15
F36 M_A_DQ<16> (12) AU36
DRAMA_DM_0 DRAM0_DQ_16 M_A_DQ<17> DRAM1_DQ_16
(12) DRAMA_DM_0 G36 G38 M_A_DQ<17> (12) BD38 AT36
DRAMA_DM_1 DRAM0_DM_0 DRAM0_DQ_17 M_A_DQ<18> DRAM1_DM_0 DRAM1_DQ_17
(12) DRAMA_DM_1 B36 F42 M_A_DQ<18> (12) BH36 AV40
DRAMA_DM_2 DRAM0_DM_1 DRAM0_DQ_18 M_A_DQ<19> DRAM1_DM_1 DRAM1_DQ_18
(12) DRAMA_DM_2 F38 J42 M_A_DQ<19> (12) BC36 AT40
DRAMA_DM_3 DRAM0_DM_2 DRAM0_DQ_19 M_A_DQ<20> DRAM1_DM_2 DRAM1_DQ_19
(12) DRAMA_DM_3 B42 G40 M_A_DQ<20> (12) BH42 BA36
DRAMA_DM_4 DRAM0_DM_3 DRAM0_DQ_20 M_A_DQ<21> DRAM1_DM_3 DRAM1_DQ_20
(12) DRAMA_DM_4 P51 C38 M_A_DQ<21> (12) AT51 AV36
DRAMA_DM_5 DRAM0_DM_4 DRAM0_DQ_21 M_A_DQ<22> DRAM1_DM_4 DRAM1_DQ_21
(12) DRAMA_DM_5 V42 G44 M_A_DQ<22> (12) AM42 AY42
DRAMA_DM_6 DRAM0_DM_5 DRAM0_DQ_22 M_A_DQ<23> DRAM1_DM_5 DRAM1_DQ_22
(12) DRAMA_DM_6 Y50 D42 M_A_DQ<23> (12) AK50 AY40
DRAMA_DM_7 DRAM0_DM_6 DRAM0_DQ_23 M_A_DQ<24> DRAM1_DM_6 DRAM1_DQ_23
(12) DRAMA_DM_7 Y52 A41 M_A_DQ<24> (12) AK52 BJ41
DRAM0_DM_7 DRAM0_DQ_24 M_A_DQ<25> DRAM1_DM_7 DRAM1_DQ_24
C41 M_A_DQ<25> (12) BG41
DRAM0_DQ_25 M_A_DQ<26> DRAM1_DQ_25
(12) M_A_RAS# M45 A45 M_A_DQ<26> (12) AV45 BJ45
DRAM0_RAS DRAM0_DQ_26 M_A_DQ<27> DRAM1_RAS DRAM1_DQ_26
(12) M_A_CAS# M44 B46 M_A_DQ<27> (12) AV44 BH46
DRAM0_CAS DRAM0_DQ_27 M_A_DQ<28> DRAM1_CAS DRAM1_DQ_27
(12) M_A_WE# H51 C40 M_A_DQ<28> (12) BB51 BG40
DRAM0_WE DRAM0_DQ_28 M_A_DQ<29> DRAM1_WE DRAM1_DQ_28
B40 M_A_DQ<29> (12) BH40
DRAM0_DQ_29 M_A_DQ<30> DRAM1_DQ_29
K47 B48 M_A_DQ<30> (12) AY47 BH48
(12) M_A_BS0 DRAM0_BS_0 DRAM0_DQ_30 M_A_DQ<31> DRAM1_BS_0 DRAM1_DQ_30
K44 B47 M_A_DQ<31> (12) AY44 BH47
(12) M_A_BS1 DRAM0_BS_1 DRAM0_DQ_31 M_A_DQ<32> DRAM1_BS_1 DRAM1_DQ_31
D52 K52 M_A_DQ<32> (12) BF52 AY52
(12) M_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 M_A_DQ<33> DRAM1_BS_2 DRAM1_DQ_32
K51 M_A_DQ<33> (12) AY51
DRAM0_DQ_33 M_A_DQ<34> DRAM1_DQ_33
(12) M_A_DIM0_CS#0 P44 T52 M_A_DQ<34> (12) AT44 AP52
DRAM0_CS_0 DRAM0_DQ_34 M_A_DQ<35> DRAM1_CS_0 DRAM1_DQ_34
T51 M_A_DQ<35> (12) AP51
DRAM0_DQ_35 M_A_DQ<36> DRAM1_DQ_35
(12) M_A_DIM0_CS#1 P45 L51 M_A_DQ<36> (12) AT45 AW51
DRAM0_CS_2 DRAM0_DQ_36 M_A_DQ<37> DRAM1_CS_2 DRAM1_DQ_36
C L53 M_A_DQ<37> (12) AW53 C
DRAM0_DQ_37 M_A_DQ<38> DRAM1_DQ_37
R51 M_A_DQ<38> (12) AR51
DRAM0_DQ_38 M_A_DQ<39> DRAM1_DQ_38
(12) M_A_DIM0_CKE0 C47 R53 M_A_DQ<39> (12) BG47 AR53
DRAM0_CKE_0 DRAM0_DQ_39 M_A_DQ<40> DRAM1_CKE_0 DRAM1_DQ_39
D48 T47 M_A_DQ<40> (12) BE46 AP47
RESERVED_D48 DRAM0_DQ_40 M_A_DQ<41> RESERVED_BE46 DRAM1_DQ_40
(12) M_A_DIM0_CKE1 F44 T45 M_A_DQ<41> (12) BD44 AP45
DRAM0_CKE_2 DRAM0_DQ_41 M_A_DQ<42> DRAM1_CKE_2 DRAM1_DQ_41
E46 Y40 M_A_DQ<42> (12) BF48 AK40
RESERVED_E46 DRAM0_DQ_42 M_A_DQ<43> RESERVED_BF48 DRAM1_DQ_42
V41 M_A_DQ<43> (12) AM41
DRAM0_DQ_43 M_A_DQ<44> DRAM1_DQ_43
(12) M_A_DIM0_ODT0 T41 T48 M_A_DQ<44> (12) AP41 AP48
DRAM0_ODT_0 DRAM0_DQ_44 M_A_DQ<45> DRAM1_ODT_0 DRAM1_DQ_44
T50 M_A_DQ<45> (12) AP50
DRAM0_DQ_45 M_A_DQ<46> DRAM1_DQ_45
(12) M_A_DIM0_ODT1 P42 Y42 M_A_DQ<46> (12) AT42 AK42
DRAM0_ODT_2 DRAM0_DQ_46 M_A_DQ<47> DRAM1_ODT_2 DRAM1_DQ_46
AB40 M_A_DQ<47> (12) AH40
DRAM0_DQ_47 M_A_DQ<48> DRAM1_DQ_47
V45 M_A_DQ<48> (12) AM45
DRAM0_DQ_48 M_A_DQ<49> DRAM1_DQ_48
(12) M_A_DIM0_CLK_DDR0 M50 V47 M_A_DQ<49> (12) AV50 AM47
DRAM0_CKP_0 DRAM0_DQ_49 M_A_DQ<50> DRAM1_CKP_0 DRAM1_DQ_49
(12) M_A_DIM0_CLK_DDR#0 M48 AD48 M_A_DQ<50> (12) AV48 AF48
DRAM0_CKN_0 DRAM0_DQ_50 M_A_DQ<51> DRAM1_CKN_0 DRAM1_DQ_50
AD50 M_A_DQ<51> (12) AF50
DRAM0_DQ_51 M_A_DQ<52> DRAM1_DQ_51
V48 M_A_DQ<52> (12) AM48
DRAM0_DQ_52 M_A_DQ<53> DRAM1_DQ_52
(12) M_A_DIM0_CLK_DDR1 P50 V50 M_A_DQ<53> (12) AM50
DRAM0_CKP_2 DRAM0_DQ_53 M_A_DQ<54> DRAM1_DQ_53
(12) M_A_DIM0_CLK_DDR#1 P48 AB44 M_A_DQ<54> (12) AT50 AH44
DRAM0_CKN_2 DRAM0_DQ_54 M_A_DQ<55> DRAM1_CKP_2 DRAM1_DQ_54
Y45 M_A_DQ<55> (12) AT48 AK45
DRAM0_DQ_55 M_A_DQ<56> DRAM1_CKN_2 DRAM1_DQ_55
V52 M_A_DQ<56> (12) AM52
DRAM0_DQ_56 M_A_DQ<57> DRAM1_DQ_56
W51 M_A_DQ<57> (12) AL51
DRAMA_DRAMRST DRAM0_DQ_57 M_A_DQ<58> DRAM1_DQ_57
(12) DRAMA_DRAMRST P41 AC53 M_A_DQ<58> (12) AG53
DRAM0_DRAMRST DRAM0_DQ_58 M_A_DQ<59> DRAM1_DQ_58
AC51 M_A_DQ<59> (12) AT41 AG51
DRAM0_DQ_59 M_A_DQ<60> DRAM1_DRAMRST DRAM1_DQ_59
W53 M_A_DQ<60> (12) AL53
DRAM0_DQ_60 M_A_DQ<61> DRAM1_DQ_60
Y51 M_A_DQ<61> (12) AK51
DRAM_VREF DRAM0_DQ_61 M_A_DQ<62> DRAM1_DQ_61
AF44 AD52 M_A_DQ<62> (12) AF52
DRAM_VREF DRAM0_DQ_62 M_A_DQ<63> DRAM1_DQ_62
AD51 M_A_DQ<63> (12) AF51
DRAM0_DQ_63 DRAM1_DQ_63
J38 M_A_DQS_DP<0> BF40
DRAM0_DQSP_0 M_A_DQS_DP<0> (12) DRAM1_DQSP_0
ICLK_DRAM_TERMN AH42 K38 M_A_DQS_DN<0> BD40
ICLK_DRAM_TERMN DRAM0_DQSN_0 M_A_DQS_DN<0> (12) DRAM1_DQSN_0
ICLK_DRAM_TERMN_AF42 AF42 C35 M_A_DQS_DP<1> BG35
ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_1 M_A_DQS_DP<1> (12) DRAM1_DQSP_1
B34 M_A_DQS_DN<1> BH34
DRAM0_DQSN_1 M_A_DQS_DN<1> (12) DRAM1_DQSN_1
D40 M_A_DQS_DP<2> BA38
DDR3_DRAM_PWROK DRAM0_DQSP_2 M_A_DQS_DN<2> M_A_DQS_DP<2> (12) DRAM1_DQSP_2
AD42 F40 M_A_DQS_DN<2> (12) AY38
(36) DDR3_DRAM_PWROK DDR3_VCCA_PWRGD DRAM_VDD_S4_PWROK DRAM0_DQSN_2 M_A_DQS_DP<3> DRAM1_DQSN_2
AB42 B44 M_A_DQS_DP<3> (12) BH44
(36) DDR3_VCCA_PWRGD DRAM_CORE_PWROK DRAM0_DQSP_3 M_A_DQS_DN<3> DRAM1_DQSP_3
C43 M_A_DQS_DN<3> (12) BG43
DRAM0_DQSN_3 M_A_DQS_DP<4> DRAM1_DQSN_3
N53 M_A_DQS_DP<4> (12) AU53
DRAM_RCOMP_0 DRAM0_DQSP_4 M_A_DQS_DN<4> DRAM1_DQSP_4
AD44 M52 M_A_DQS_DN<4> (12) AV52
DRAM_RCOMP_1 DRAM_RCOMP_0 DRAM0_DQSN_4 M_A_DQS_DP<5> DRAM1_DQSN_4
AF45 T42 M_A_DQS_DP<5> (12) AP42
DRAM_RCOMP_2 DRAM_RCOMP_1 DRAM0_DQSP_5 M_A_DQS_DN<5> DRAM1_DQSP_5
AD45 T44 M_A_DQS_DN<5> (12) AP44
DRAM_RCOMP_2 DRAM0_DQSN_5 M_A_DQS_DP<6> DRAM1_DQSN_5
Y47 M_A_DQS_DP<6> (12) AK47
B DRAM0_DQSP_6 M_A_DQS_DN<6> DRAM1_DQSP_6 B
Y48 M_A_DQS_DN<6> (12) AK48
DRAM0_DQSN_6 M_A_DQS_DP<7> DRAM1_DQSN_6
AF40 AB52 M_A_DQS_DP<7> (12) AH52
RESERVED_AF40 DRAM0_DQSP_7 M_A_DQS_DN<7> DRAM1_DQSP_7
AF41 AA51 M_A_DQS_DN<7> (12) AJ51
RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD40
RESERVED_AD40
AD41
RESERVED_AD41

BAY-TRAIL-GP BAY-TRAIL-GP

1D35V_S3
1 2 ICLK_DRAM_TERMN reserve the 0402 0.1u caps on reset for EMI.
R503 100KR2F-L1-GP
1

R501
4K7R2F-GP 1 2 ICLK_DRAM_TERMN_AF42 DRAMA_DRAMRST DY 1 2 EC502
R504 100KR2F-L1-GP SCD1U25V2KX-GP
2

DRAM_VREF 1 2 DRAM_RCOMP_0 DDR3_DRAM_PWROK DY 1 2 EC503

R505 23D2R2F-GP SCD1U25V2KX-GP
1

R502 C501 1 2 DRAM_RCOMP_1 DDR3_VCCA_PWRGD DY 1 2 EC504

4K7R2F-GP R506 29D4R2F-GP SCD1U25V2KX-GP
SCD1U10V2KX-L-GP
2
2

1 2 DRAM_RCOMP_2
R507 162R2F-GP

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDR)
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 5 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

C C

Blanking

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (CFG)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 6 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

VCC_CORE GFX_CORE

1
D RN701 R703 D
VCC_SENSE 1 R1
4
(47) VCC_SENSE
VSS_SENSE 2 R2
3 100R2F-L3-GP
(47) VSS_SENSE

2
SRN100F-1-GP

2
VCC_AXG_SENSE
(48) VCC_AXG_SENSE
R701

0R2J-2-GP
1D35V_S3 VDDQ_CPU

1
PG701 VSS_AXG_SENSE
(48) VSS_AXG_SENSE
1 2

GAP-CLOSE-PW R-3-GP
PG702
1 2 VDDQ_CPU

GAP-CLOSE-PW R-3-GP CPU1G 7 OF 13

PG703 VCC_SENSE P28 BAY TRAIL-M/D SOC BD49 VDDQ_CPU

VCC_AXG_SENSE CORE_VCC_SENSE_P28 DRAM_VDD_S4_BD49
1 2 BB8 UNCORE_VNN_SENSE DRAM_VDD_S4_BD52 BD52
VSS_SENSE N28 BD53
VDDQ_CPU CORE_VSS_SENSE_N28 DRAM_VDD_S4_BD53
GAP-CLOSE-PW R-3-GP DRAM_VDD_S4_BF44 BF44
DRAM_VDD_S4_BG51 BG51
PG704 BJ48
C DRAM_VDD_S4_BJ48 C
1 2 AD38 DRAM_VDD_S4_AD38 DRAM_VDD_S4_C51 C51
AF38 DRAM_VDD_S4_AF38 DRAM_VDD_S4_D44 D44
GAP-CLOSE-PW R-3-GP A48 DRAM_VDD_S4 DRAM_VDD_S4_F49 F49
AK38 DRAM_VDD_S4_AK38 DRAM_VDD_S4_F52 F52
PG705 AM38 F53
DRAM_VDD_S4_AM38 DRAM_VDD_S4_F53
1 2 AV41 DRAM_VDD_S4_AV41 DRAM_VDD_S4_H46 H46
AV42 DRAM_VDD_S4_AV42 DRAM_VDD_S4_M41 M41
GAP-CLOSE-PW R-3-GP BB46 DRAM_VDD_S4_BB46 DRAM_VDD_S4_M42 M42
VCC_CORE V38
PG706 DRAM_VDD_S4_V38
DRAM_VDD_S4_Y38 Y38
1 2
AA27 GFX_CORE
CORE_VCC_S0IX_AA27
GAP-CLOSE-PW R-3-GP AA29 CORE_VCC_S0IX_AA29
AA30 CORE_VCC_S0IX_AA30
AC27 CORE_VCC_S0IX_AC27
AC29 CORE_VCC_S0IX_AC29 UNCORE_VNN_S3_AA24 AA24
AC30 CORE_VCC_S0IX_AC30 UNCORE_VNN_S3_AC22 AC22
AD27 CORE_VCC_S0IX_AD27 UNCORE_VNN_S3_AC24 AC24
AD29 CORE_VCC_S0IX_AD29 UNCORE_VNN_S3_AD22 AD22
AD30 CORE_VCC_S0IX_AD30 UNCORE_VNN_S3_AD24 AD24
AF27 CORE_VCC_S0IX_AF27 UNCORE_VNN_S3_AF22 AF22
AF29 CORE_VCC_S0IX_AF29 UNCORE_VNN_S3_AF24 AF24
AG27 CORE_VCC_S0IX_AG27 UNCORE_VNN_S3_AG22 AG22
AG29 CORE_VCC_S0IX_AG29 UNCORE_VNN_S3_AG24 AG24
AG30 CORE_VCC_S0IX_AG30 UNCORE_VNN_S3_AJ22 AJ22
P26 CORE_VCC_S0IX_P26 UNCORE_VNN_S3_AJ24 AJ24
P27 CORE_VCC_S0IX_P27 UNCORE_VNN_S3_AK22 AK22
U27 CORE_VCC_S0IX_U27 UNCORE_VNN_S3_AK24 AK24
U29 CORE_VCC_S0IX_U29 UNCORE_VNN_S3_AK25 AK25
B B
V27 CORE_VCC_S0IX_V27 UNCORE_VNN_S3_AK27 AK27
V29 CORE_VCC_S0IX_V29 UNCORE_VNN_S3_AK29 AK29
V30 CORE_VCC_S0IX_V30 UNCORE_VNN_S3_AK30 AK30
Y27 CORE_VCC_S0IX_Y27 UNCORE_VNN_S3_AK32 AK32
Y29 CORE_VCC_S0IX_Y29 UNCORE_VNN_S3_AM22 AM22
Y30 CORE_VCC_S0IX_Y30

AF30 AA22 TP2_CORE_VCC_S0IX 1 TP702

TP_CORE_V1P05_S4 TP2_CORE_VCC_S0IX TPAD14-OP-GP

BAY-TRAIL-GP

VCC_SENSE DY 1 2 EC701
SCD1U25V2KX-GP
VSS_SENSE DY 1 2 EC702
SCD1U25V2KX-GP
VSS_AXG_SENSE DY 1 2 EC703
SCD1U25V2KX-GP
VCC_AXG_SENSE DY 1 2 EC704
SCD1U25V2KX-GP
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A
reserve the 0402 0.1u caps on reset for EMI. Redwood SMB TouchPad A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 7 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

CPU1C 3 OF 13

D AV3 1.0V BAY TRAIL-M/D SOC 1.0V AG3 D

1D8V_S0 HDMI (54)
(54)
DDBP_DATA2
DDBP_DATA2# AV2
DDI0_TXP_0
DDI0_TXN_0
DDI1_TXP_0
DDI1_TXN_0 AG1
DP_TXP0_CPU (52)
DP_TXN0_CPU (52)
AT2 AF3
(54)
(54)
DDBP_DATA1
DDBP_DATA1# AT3
DDI0_TXP_1
DDI0_TXN_1
DDI1_TXP_1
DDI1_TXN_1 AF2 PANEL
(54) DDBP_DATA0 AR3 DDI0_TXP_2 DDI1_TXP_2 AD3
(54) DDBP_DATA0# AR1 DDI0_TXN_2 DDI1_TXN_2 AD2
(54) DDBP_DATA3 AP3 DDI0_TXP_3 DDI1_TXP_3 AC3

3
4
(54) DDBP_DATA3# AP2 DDI0_TXN_3 DDI1_TXN_3 AC1
RN801
SRN2K2J-5-GP AL3 DDI0_AUXP DDI1_AUXP AK3 DP_AUXP_CPU (52)
AL1 DDI0_AUXN DDI1_AUXN AK2 DP_AUXN_CPU (52)

(54) HDMI_PCH_DET D27 1.8V 1.8V K30 DP_HPD (52)

2
1
DDI0_HPD DDI1_HPD
C26 P30 DDI1_GEN_R_DAT
(15,54) PCH_HDMI_DATA DDI0_DDCDATA DDI1_DDCDATA DDI1_GEN_R_DAT (15)
(54) PCH_HDMI_CLK C28 DDI0_DDCCLK DDI1_DDCCLK G30

B28 DDI0_VDDEN DDI1_VDDEN N30 LVDS_VDD_EN_CPU (52)

C27 DDI0_BKLTEN DDI1_BKLTEN J30 L_BKLT_EN_CPU (24)
B26 DDI0_BKLTCTL DDI1_BKLTCTL M30 L_BKLT_CTRL_CPU (52)
R806
402R2F-GP
1 2 DDI0_RCOMP_N AK13 AH14
DDI0_RCOMP_P DDI0_RCOMP RESERVED_AH14
AK12 DDI0_RCOMP_P RESERVED_AH13 AH13
AM14 RESERVED_AM14 RESERVED_AF14 AF14
Close to CPU AM13 RESERVED_AM13 RESERVED_AF13 AF13
AM3 VSS_AM3 VSS_AH3 AH3
AM2 VSS_AM2 VSS_AH2 AH2
C BA3 C
VGA_RED
VGA_BLUE AY2 R813
0.7V VGA_GREEN BA1
AW1 L_BKLT_EN_CPU 2 1
VGA_IREF
VGA_IRTN AY3
1MR2J-L3-GP
VGA_HSYNC BD2
VGA_VSYNC BF2
3.3V
BC1 CRT_DDCCLK
VGA_DDCCLK CRT_DDCDATA
VGA_DDCDATA BC2

T2 RESERVED_T2 RESERVED_T7 T7
T3 RESERVED_T3 RESERVED_T9 T9
AB3 RESERVED_AB3 RESERVED_AB13 AB13
AB2 AB12 CRT_DDCCLK 1 4
RESERVED_AB2 RESERVED_AB12 CRT_DDCDATA
Y3 RESERVED_Y3 RESERVED_Y12 Y12 2 3
Y2 RESERVED_Y2 RESERVED_Y13 Y13
W3 V10 RN802
RESERVED_W3 RESERVED_V10 SRN0J-12-GP
W1 RESERVED_W1 RESERVED_V9 V9
V2 RESERVED_V2 RESERVED_T12 T12
V3 RESERVED_V3 RESERVED_T10 T10
R3 RESERVED_R3 RESERVED_V14 V14
R1 RESERVED_R1 RESERVED_V13 V13
AD6 RESERVED_AD6 RESERVED_T14 T14
AD4 RESERVED_AD4 RESERVED_T13 T13
AB9 RESERVED_AB9 RESERVED_T6 T6
AB7 RESERVED_AB7 RESERVED_T4 T4
Y4 RESERVED_Y4 RESERVED_P14 P14
B B
Y6 RESERVED_Y6
V4 RESERVED_V4
V6 RESERVED_V6 RESERVED_K34 K34
GPIO_S0_NC13 A29 D32
(15) GPIO_S0_NC13 GPIO_S0_NC13 GPIO_S0_NC26
TP801 1 GPIO_S0_NC14_C29 C29 N32
TPAD14-OP-GP GPIO_S0_NC14_C29 GPIO_S0_NC25
AB14 RESERVED_AB14 GPIO_S0_NC24 J34
TP802 1 GPIO_S0_NC12 B30 K28
TPAD14-OP-GP GPIO_S0_NC12 GPIO_S0_NC23
C30 RESERVED_C30 GPIO_S0_NC22 F28
GPIO_S0_NC21 F32
GPIO_S0_NC20 D34
GPIO_S0_NC18 J28
GPIO_S0_NC17 D28
GPIO_S0_NC16 M32
GPIO_S0_NC15 F34

BAY-TRAIL-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP/GPIO)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 8 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU

D D

CPU1I 9 OF 13 CPU1J 10 OF 13 CPU1K 11 OF 13 CPU1L 12 OF 13 CPU1M 13 OF 13

A11 BAY TRAIL-M/D SOC AC36 AG38 BAY TRAIL-M/D SOC AH47 AT24 BAY TRAIL-M/D SOC AY36 BF30 BAY TRAIL-M/D SOC E8 K9 BAY TRAIL-M/D SOC U3
VSS1 VSS36 VSS71 VSS106 VSS141 VSS176 VSS211 VSS246 VSS281 VSS316
A15 VSS2 VSS37 AC38 AH4 VSS72 VSS107 AH48 AT27 VSS142 VSS177 AY4 BF36 VSS212 VSS247 F19 L13 VSS282 VSS317 U30
A19 VSS3 VSS38 AD19 AH41 VSS73 VSS108 AH50 AT30 VSS143 VSS178 AY50 BF4 VSS213 VSS248 F2 L19 VSS283 VSS318 U32
A23 VSS4 VSS39 AD21 AH45 VSS74 VSS109 AH51 AT35 VSS144 VSS179 AY9 BG31 VSS214 VSS249 F24 L27 VSS284 VSS319 U40
A27 VSS5 VSS40 AD25 AH7 VSS75 VSS110 AH6 AT38 VSS145 VSS180 BA14 BG34 VSS215 VSS250 F27 L35 VSS285 VSS320 U42
A31 VSS6 VSS41 AD32 AH9 VSS76 VSS111 AM44 AT4 VSS146 VSS181 BA19 BG39 VSS216 VSS251 F30 M19 VSS286 VSS321 U43
C A35 AD33 AJ1 AM51 AT47 BA22 BG42 F35 M26 U45 C
VSS7 VSS42 VSS77 VSS112 VSS147 VSS182 VSS217 VSS252 VSS287 VSS322
A39 VSS8 VSS43 AD47 AJ16 VSS78 VSS113 AM7 AT52 VSS148 VSS183 BA27 BG45 VSS218 VSS253 F5 M27 VSS288 VSS323 U46
A43 VSS9 VSS44 AD7 AJ21 VSS79 VSS114 AN1 AU1 VSS149 VSS184 BA32 BG49 VSS219 VSS254 F7 M34 VSS289 VSS324 U48
A47 VSS10 VSS45 AE1 AJ25 VSS80 VSS115 AN11 AU24 VSS150 VSS185 BA35 BJ11 VSS220 VSS255 G10 M35 VSS290 VSS325 U49
AA1 VSS11 VSS46 AE11 AJ27 VSS81 VSS116 AN12 AU3 VSS151 VSS186 BA40 BJ15 VSS221 VSS256 G20 M38 VSS291 VSS326 U5
AA16 VSS12 VSS47 AE12 AJ29 VSS82 VSS117 AN14 AU30 VSS152 VSS187 BA53 BJ19 VSS222 VSS257 G22 M47 VSS292 VSS327 U51
AA19 VSS13 VSS48 AE14 AJ3 VSS83 VSS118 AN22 AU38 VSS153 VSS188 BB19 BJ23 VSS223 VSS258 G26 M51 VSS293 VSS328 U53
AA21 VSS14 VSS49 AE3 AJ30 VSS84 VSS119 AN3 AU51 VSS154 VSS189 BB27 BJ27 VSS224 VSS259 G28 N1 VSS294 VSS329 U6
AA3 VSS15 VSS50 AE4 AJ32 VSS85 VSS120 AN33 AV12 VSS155 VSS190 BB35 BJ31 VSS225 VSS260 G32 N16 VSS295 VSS330 U8
AA32 VSS16 VSS51 AE40 AJ33 VSS86 VSS121 AN35 AV13 VSS156 VSS191 BC20 BJ35 VSS226 VSS261 G34 N38 VSS296 VSS331 U9
AA35 VSS17 VSS52 AE42 AJ35 VSS87 VSS122 AN36 AV14 VSS157 VSS192 BC22 BJ39 VSS227 VSS262 G42 N51 VSS297 VSS332 V12
AA38 VSS18 VSS53 AE43 AJ38 VSS88 VSS123 AN38 AV18 VSS158 VSS193 BC26 BJ43 VSS228 VSS263 H19 P13 VSS298 VSS333 V16
AA53 VSS19 VSS54 AE45 AJ53 VSS89 VSS124 AN40 AV19 VSS159 VSS194 BC28 BJ47 VSS229 VSS264 H27 P16 VSS299 VSS334 V19
AB10 VSS20 VSS55 AE46 AK10 VSS90 VSS125 AN42 AV24 VSS160 VSS195 BC32 BJ7 VSS230 VSS265 H35 P19 VSS300 VSS335 V21
AB4 VSS21 VSS56 AE48 AK14 VSS91 VSS126 AN43 AV27 VSS161 VSS196 BC34 C14 VSS231 VSS266 J1 P20 VSS301 VSS336 V35
AB41 VSS22 VSS57 AE50 AK16 VSS92 VSS127 AN45 AV30 VSS162 VSS197 BC42 C31 VSS232 VSS267 J16 P24 VSS302 VSS337 V40
AB45 VSS23 VSS58 AE51 AK33 VSS93 VSS128 AN46 AV35 VSS163 VSS198 BD19 C34 VSS233 VSS268 J19 P32 VSS303 VSS338 V44
AB47 VSS24 VSS59 AE53 AK41 VSS94 VSS129 AN48 AV38 VSS164 VSS199 BD24 C39 VSS234 VSS269 J22 P35 VSS304 VSS339 V51
AB48 VSS25 VSS60 AE6 AK44 VSS95 VSS130 AN49 AV47 VSS165 VSS200 BD27 C42 VSS235 VSS270 J27 P38 VSS305 VSS340 V7
AB50 VSS26 VSS61 AE8 AM12 VSS96 VSS131 AN5 AV51 VSS166 VSS201 BD30 C45 VSS236 VSS271 J32 P4 VSS306 VSS341 Y10
AB51 VSS27 VSS62 AE9 AM19 VSS97 VSS132 AN51 AV7 VSS167 VSS202 BD35 C49 VSS237 VSS272 J35 P47 VSS307 VSS342 Y14
AB6 VSS28 VSS63 AF10 AM24 VSS98 VSS133 AN53 AW13 VSS168 VSS203 BE19 D12 VSS238 VSS273 J40 P52 VSS308 VSS343 Y16
AC16 VSS29 VSS64 AF12 AM25 VSS99 VSS134 AN6 AW19 VSS169 VSS204 BE2 D16 VSS239 VSS274 J53 P9 VSS309 VSS344 Y21
AC18 VSS30 VSS65 AF25 AM29 VSS100 VSS135 AN8 AW27 VSS170 VSS205 BE35 D24 VSS240 VSS275 K14 T40 VSS310 VSS345 Y25
AC19 VSS31 VSS66 AF32 AM33 VSS101 VSS136 AN9 AW3 VSS171 VSS206 BE8 D30 VSS241 VSS276 K22 U1 VSS311 VSS346 Y33
AC21 VSS32 VSS67 AF47 AM35 VSS102 VSS137 AP40 AW35 VSS172 VSS207 BF12 D36 VSS242 VSS277 K32 U11 VSS312 VSS347 Y41
AC25 VSS33 VSS68 AG16 AM36 VSS103 VSS138 AT12 AY10 VSS173 VSS208 BF16 D38 VSS243 VSS278 K36 U12 VSS313 VSS348 Y44
AC33 VSS34 VSS69 AG25 AM40 VSS104 VSS139 AT16 AY22 VSS174 VSS209 BF24 E19 VSS244 VSS279 K4 U14 VSS314 VSS349 Y7
AC35 VSS35 VSS70 AG36 M28 VSS105 VSS140 AT19 AY32 VSS175 VSS210 BF38 E35 VSS245 VSS280 K50 U21 VSS315 VSS350 Y9
B B

BAY-TRAIL-GP BAY-TRAIL-GP BAY-TRAIL-GP BAY-TRAIL-GP BAY-TRAIL-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 9 of 102
5 4 3 2 1
 5 4 3 2 1

reserve the 0402 0.1u caps on reset for EMI.

VCC_CORE
VCC_CORE VCC_CORE

D D
1

1
C1024 C1023 C1025 EC1026 EC1028

1
DY DY C1009 C1010 C1011 C1022 C1012 C1013

SCD1U25V2KX-GP

SCD1U25V2KX-GP
2

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V3MX-1-GP
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC2D2U6D3V2MX-GP
2

2
Modify 20130806

C VDDQ_CPU VDDQ_CPU VDDQ_CPU C

CRB 1uF
close to pin AD38 & AF38
1

1
C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1014 C1015 EC1029 EC1030 EC1031
SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
DY DY DY DY DY DY DY
2

2
B B

reserve the 0402 0.1u caps on reset for EMI.

GFX_CORE GFX_CORE GFX_CORE
1

C1016 C1017 C1018 C1019 C1020 C1021 EC1032 EC1033 EC1034

DY DY DY
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

Wistron Confidential document, Anyone can not

2

2
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

Duplicate, Modify, Forward or any other purpose

application without get Wistron permission
Redwood SMB TouchPad

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)

reserve the 0402 0.1u caps on reset for EMI. Size
A4
Document Number Rev

Redwood 11.6" X01

Date: Tuesday, December 17, 2013 Sheet 10 of 102
5 4 3 2 1
 5 4 3 2 1

3D3V_S5
3D3V_S0
close to pin AM27 & AN24
N18 & P18

1
N22 C1143

1
C1102

SC1U6D3V2KX-L-1-GP
C1101

SC1U6D3V2KX-L-1-GP

SCD1U10V2KX-L1-GP

2
2

2
D D

1D8V_S0
1D5V_S0
1D8V_S5 1D8V_S5 close to pin
AM30 & AN32 AM32

1
U24 & V25 & N20 & U25 close to pin C1135 C1136 C1137 C1138

1
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
C1134
1

U38

SC1U6D3V2KX-L-1-GP
C1139 C1140

2
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

2
2

close to pin
AA18 1D35V_S0
close to pin
1D35V_S0 1D35V_S0
close to pin AD36 AF19
AA25 & AG32 close to pin V36 AJ19 & AG18
C C
1 close to pin

1
C1103 C1104 C1105 C1106 C1107 C1108 C1126 C1127 C1141 C1142
AG19

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
close to pin U36
2

2
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
1D0V_S5
V18 1D05V_S0
AA33
1

C1120
SC1U6D3V2KX-L-1-GP

C1109 C1119
2

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
2

B B

close to pin
close to pin close to pin U18 & U19 close to pin AF36 close to pin AJ18
close to pin AF16 & AF18 AJ36 & AK35 & AK36
1D0V_S5 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0
Y19 & C3 close to pin BJ6
close to pin
1

1
C1121 C1122 C1123 C1124 C1125 C1110 C1111 C1112 AD35 & AF35 C1113 C1114 C1115 C1116 C1117 C1118
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SCD01U50V2KX-1GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SCD1U10V2KX-L1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP
close to pin
2

2
AA36 & Y35 & Y36

close to pin
close to pin close to pin close to pin close to pin AK18 & AM18
C5 B6 V22 U22 close to pin
close to pin close to pin V32
1D0V_S0
AN18 AN25 AN29 & AN30 & V24 & Y22 & Y24
1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0 1D0V_S0

A close to pin <Variant Name> A

close to pin
1

1
C1130 C1131 C1132 C1133 C1144 AF21 & AG21 C1128 C1129 C1146 C1147 C1148
AM16
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SCD01U50V2KX-1GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
Wistron Corporation
2

2
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
close to pin
Y18 & G1 CPU (Power CAP2)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 11 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = MEMORY

DIMM1
D D
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] (5) 96
M_A_A3 A2
95 110 M_A_RAS# (5)
M_A_A4 A3 RAS#
92 113 M_A_WE# (5)
M_A_A5 A4 WE#
M_A_A6
91
A5 CAS#
115 M_A_CAS# (5) Note:
90
M_A_A7 A6 If SA0 DIM0 = 0, SA1_DIM0 = 0
86 114 M_A_DIM0_CS#0 (5)
M_A_A8 A7 CS0#
89 121 M_A_DIM0_CS#1 (5) SO-DIMMA SPD Address is 0xA0
M_A_A9 A8 CS1#
85
A9
M_A_A10 107
A10/AP CKE0
73 M_A_DIM0_CKE0 (5) SO-DIMMA TS Address is 0x30
M_A_A11 84 74
A11 CKE1 M_A_DIM0_CKE1 (5)
M_A_A12 83
A12
M_A_A13 119
A13 CK0
101 M_A_DIM0_CLK_DDR0 (5) If SA0 DIM0 = 1, SA1_DIM0 = 0
M_A_A14 80 103
A14 CK0# M_A_DIM0_CLK_DDR#0 (5) SO-DIMMA SPD Address is 0xA2
M_A_A15 78
A15
(5) M_A_BS2
79
A16/BA2 CK1
102 M_A_DIM0_CLK_DDR1 (5) SO-DIMMA TS Address is 0x32
104 M_A_DIM0_CLK_DDR#1 (5)
CK1#
109
(5) M_A_BS0 BA0 DRAMA_DM_0 3D3V_S0 3D3V_S0
108 11 DRAMA_DM_0 (5)
(5) M_A_BS1 BA1 DM0 DRAMA_DM_1
28 DRAMA_DM_1 (5)
M_A_DQ<0> DM1 DRAMA_DM_2
(5) M_A_DQ<0> 5
DQ0 DM2
46 DRAMA_DM_2 (5) Thermal EVENT

2
M_A_DQ<1> 7 63 DRAMA_DM_3
(5) M_A_DQ<1> DQ1 DM3 DRAMA_DM_3 (5)
M_A_DQ<2> 15 136 DRAMA_DM_4 R1209 R1208
(5) M_A_DQ<2> DQ2 DM4 DRAMA_DM_4 (5) 3D3V_S0
M_A_DQ<3> DRAMA_DM_5
(5) M_A_DQ<3>
M_A_DQ<4>
17
DQ3 DM5
153
DRAMA_DM_6
DRAMA_DM_5 (5) DY 10KR2J-3-GP DY 10KR2J-3-GP
(5) M_A_DQ<4> 4 170 DRAMA_DM_6 (5)
M_A_DQ<5> DQ4 DM6 DRAMA_DM_7 TS#_DIMM0_1
(5) M_A_DQ<5> 6 187 DRAMA_DM_7 (5) 1 DY 2

1
M_A_DQ<6> DQ5 DM7 SA2_DIM1 SA2_DIM0
(5) M_A_DQ<6> 16
M_A_DQ<7> DQ6 R1201
(5) M_A_DQ<7> 18 200 PCU_SMB_DATA (16,62)

1
M_A_DQ<8> DQ7 SDA 10KR2J-3-GP
(5) M_A_DQ<8> 21 202 PCU_SMB_CLK (16,62)
M_A_DQ<9> DQ8 SCL
(5) M_A_DQ<9>
M_A_DQ<10>
23
33
DQ9
198 TS#_DIMM0_1 3D3V_S0 R1211 R1210
check list suggest 10K
(5) M_A_DQ<10> DQ10 EVENT#
M_A_DQ<11> 35 0R2J-2-GP 0R2J-2-GP
(5) M_A_DQ<11> DQ11
M_A_DQ<12> 22 199
(5) M_A_DQ<12>

2
M_A_DQ<13> DQ12 VDDSPD
(5) M_A_DQ<13> 24
M_A_DQ<14> DQ13 SA2_DIM0
(5) M_A_DQ<14> 34 197

1
M_A_DQ<15> DQ14 SA0 SA2_DIM1 C1202
(5) M_A_DQ<15> 36 201
DQ15 SA1

SCD1U10V2KX-L1-GP
M_A_DQ<16> 39
(5) M_A_DQ<16> M_A_DQ<17> DQ16
(5) M_A_DQ<17> 41 77

2
M_A_DQ<18> DQ17 NC#1
(5) M_A_DQ<18> 51 122
M_A_DQ<19> DQ18 NC#2 1D35V_S3
C
(5) M_A_DQ<19> 53 125 C
M_A_DQ<20> DQ19 NC#/TEST
(5) M_A_DQ<20> 40
M_A_DQ<21> DQ20
(5)
(5)
M_A_DQ<21>
M_A_DQ<22>
M_A_DQ<22>
42
50
DQ21
DQ22
VDD1
VDD2
75
76
For Intel Recommend Close to DIMM(Bay Trail)
M_A_DQ<23> 52 81
(5) M_A_DQ<23> M_A_DQ<24> DQ23 VDD3
(5) M_A_DQ<24> 57 82
M_A_DQ<25> DQ24 VDD4
(5) M_A_DQ<25> 59 87
M_A_DQ<26> DQ25 VDD5
(5) M_A_DQ<26> 67 88
M_A_DQ<27> DQ26 VDD6 1D35V_S3
(5) M_A_DQ<27> 69 93
M_A_DQ<28> DQ27 VDD7
(5) M_A_DQ<28> 56 94
M_A_DQ<29> DQ28 VDD8
(5) M_A_DQ<29> 58 99
M_A_DQ<30> DQ29 VDD9
(5) M_A_DQ<30> 68 100
DQ30 VDD10

1
M_A_DQ<31> 70 105
(5) M_A_DQ<31> DQ31 VDD11
M_A_DQ<32> 129 106 R1202
(5) M_A_DQ<32> DQ32 VDD12 4K7R2F-GP
M_A_DQ<33> 131 111
(5) M_A_DQ<33> DQ33 VDD13
M_A_DQ<34> 141 112
(5) M_A_DQ<34> M_A_DQ<35> DQ34 VDD14
(5) M_A_DQ<35> 143 117

2
M_A_DQ<36> DQ35 VDD15 R1203
(5) M_A_DQ<36> 130 118
M_A_DQ<37> DQ36 VDD16 VREF_DQ VREF_DQ_R1203
(5) M_A_DQ<37> 132 123 1 2
M_A_DQ<38> DQ37 VDD17 0R2J-2-GP
(5) M_A_DQ<38> 140 124
M_A_DQ<39> DQ38 VDD18
(5) M_A_DQ<39> 142 Layout Note:

1
M_A_DQ<40> DQ39
(5) M_A_DQ<40> 147 2
DQ40 VSS
(5) M_A_DQ<41>
M_A_DQ<41> 149 3 Place these Caps near C1213 R1204

1
DQ41 VSS

SCD1U10V2KX-L1-GP
M_A_DQ<42> 157 8 4K7R2F-GP
(5) M_A_DQ<42> DQ42 VSS SO-DIMMA.
M_A_DQ<43> 159 9
(5) M_A_DQ<43> M_A_DQ<44> DQ43 VSS 1D35V_S3
(5) M_A_DQ<44> 146 13

2
M_A_DQ<45> DQ44 VSS
(5) M_A_DQ<45> 148 14 SODIMM A DECOUPLING
M_A_DQ<46> DQ45 VSS
(5) M_A_DQ<46> 158 19
M_A_DQ<47> DQ46 VSS
(5) M_A_DQ<47> 160 20
M_A_DQ<48> DQ47 VSS
(5) M_A_DQ<48> 163 25
M_A_DQ<49> DQ48 VSS
(5) M_A_DQ<49> 165 26
M_A_DQ<50> DQ49 VSS
(5) M_A_DQ<50> 175 31
DQ50 VSS
1

1
M_A_DQ<51> 177 32 C1203 C1204 C1205 C1206 C1207 C1221 C1222 C1223
(5) M_A_DQ<51> DQ51 VSS
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
M_A_DQ<52>
(5) M_A_DQ<52> 164
DQ52 VSS
37 DY DY DY DY DY

SC10U10V3MX-GP

SC10U10V3MX-GP

SC10U10V3MX-GP
M_A_DQ<53> 166 38
(5) M_A_DQ<53>
2

2
M_A_DQ<54> DQ53 VSS
(5) M_A_DQ<54> 174 43
M_A_DQ<55> DQ54 VSS
(5) M_A_DQ<55> 176 44
M_A_DQ<56> DQ55 VSS
(5) M_A_DQ<56> 181 48
M_A_DQ<57> DQ56 VSS
(5) M_A_DQ<57> 183 49
M_A_DQ<58> DQ57 VSS
(5) M_A_DQ<58> 191 54
M_A_DQ<59> DQ58 VSS
(5) M_A_DQ<59> 193 55
B M_A_DQ<60> DQ59 VSS B
(5)
(5)
M_A_DQ<60>
M_A_DQ<61>
M_A_DQ<61>
180
182
DQ60
DQ61
VSS
VSS
60
61
For Intel Recommend Close to DIMM(Bay Trail)
M_A_DQ<62> 192 65
(5) M_A_DQ<62> DQ62 VSS
M_A_DQ<63>
(5) M_A_DQ<63> 194
DQ63 VSS
66
check list recommend stuff
1

71 C1209 C1210 C1211 C1212 1D35V_S3

VSS
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

M_A_DQS_DN<0> 10 72
(5)
(5)
M_A_DQS_DN<0>
M_A_DQS_DN<1>
M_A_DQS_DN<1> 27
DQS0# VSS
127 0.1uF * 8 & 330uF * 1
2

M_A_DQS_DN<2> DQS1# VSS

(5) M_A_DQS_DN<2> 45 128

1
M_A_DQS_DN<3> DQS2# VSS
(5) M_A_DQS_DN<3> 62 133
M_A_DQS_DN<4> DQS3# VSS R1205
(5) M_A_DQS_DN<4> 135 134
M_A_DQS_DN<5> DQS4# VSS 4K7R2F-GP
(5) M_A_DQS_DN<5> 152 138
M_A_DQS_DN<6> DQS5# VSS
(5) M_A_DQS_DN<6> 169 139
M_A_DQS_DN<7> DQS6# VSS
(5) M_A_DQS_DN<7> 186 144

2
DQS7# VSS R1207
145
M_A_DQS_DP<0> VSS VREF_CA VREF_CA_R1207
(5) M_A_DQS_DP<0> 12 150 1 2
M_A_DQS_DP<1> DQS0 VSS 0R2J-2-GP
(5) M_A_DQS_DP<1> 29 151
M_A_DQS_DP<2> DQS1 VSS
(5) M_A_DQS_DP<2> 47 155

1
M_A_DQS_DP<3> DQS2 VSS
(5) M_A_DQS_DP<3> 64 156

1
M_A_DQS_DP<4> DQS3 VSS C1201 R1206
(5) M_A_DQS_DP<4> 137
DQS4 VSS
161 Place these caps check list recommend stuff

SCD1U10V2KX-L1-GP
M_A_DQS_DP<5> 154 162 0D675V_S0 4K7R2F-GP
(5) M_A_DQS_DP<5> DQS5 VSS
(5) M_A_DQS_DP<6>
M_A_DQS_DP<6> 171 167 close to VTT1 and

2
M_A_DQS_DP<7> DQS6 VSS
(5) M_A_DQS_DP<7> 188 168

2
DQS7 VSS
172 VTT2.
M_A_DIM0_ODT0 VSS
116 173
(5) M_A_DIM0_ODT0 M_A_DIM0_ODT1 ODT0 VSS
120 178
1

(5) M_A_DIM0_ODT1 ODT1 VSS C1214 C1215 C1216 C1217 C1219 C1220
179
VSS
SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

SC1U6D3V2KX-L-1-GP

VREF_CA 126 184 DY DY

VREF_CA VSS
SC10U10V3MX-GP

SC10U10V3MX-GP

VREF_DQ 1 185
2

VREF_DQ VSS
189
VSS
30 190
(5) DRAMA_DRAMRST RESET# VSS
195
VSS
196
VSS
0D675V_S0 203 205
VTT1 VSS
204 206
VTT2 VSS
SKT_DDR 204P SMD
DDR3-204P-215-GP-U
62.10024.M31

A A

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<Core Design>

Wistron Corporation
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Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 12 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking

B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 13 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

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<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 14 of 102
5 4 3 2 1
 5 4 3 2 1

STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC

SSID = STRAP SHOULD BE PLACED OUTSIDE KOZ AREA

EDS_Rev1p5 define the strap removed for MDSI P.21

Security Flash
Description BIOS Boot Selection DDI0 Detect DDI1 Detect DDI1 Detect Top swap
Descriptors
D D

GPIO GPIO_S0_SC[063] GPIO_S0_SC[065] DDI0_DDCDATA DDI1_DDCDATA MDSI_DDCDATA GPIO_S0_SC [56]

1D8V_S0 1D8V_S0 1D8V_S0 1D8V_S0 1D8V_S0

1

1
R1509 R1511 R1502 R1501 R1505
PCH_HDMI_DATA (8,54)
10KR2F-2-GP 10KR2F-2-GP 2K2R2J-2-GP DY 10KR2F-2-GP DY 10KR2F-2-GP
Schematic
2

2
LPE_I2S2_FRM (19) LPE_I2S2_DATAOUT (19,24) DDI1_GEN_R_DAT (8) GPIO_S0_NC13 (8) GPIO_S0_SC_56 (16)
1

1
R1510 R1512 R1508 R1504 R1503 R1507

DY 10KR2F-2-GP DY 4K7R2F-GP DY 10KR2F-2-GP DY 10KR2F-2-GP 10KR2F-2-GP DY 10KR2F-2-GP

2

2
C C

High SPI Normal Operation DDI0 detected DDI1 detected DDI1 detected

LPC Override DDI0 not detected DDI1 not detected DDI1 not detected
Low

B B

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A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(STRAP)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 15 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
CPU1F 6 OF 13

G2 BAY TRAIL-M/D SOC M10

GPIO_S5_31 RESERVED_M10 Make sure the signal routing is as short as possible
M9
RESERVED_M9 and isolated from high speed data signal.
M3 P7 Parasitic resistance for the overall routing should be less than 100 .
GPIO_S5_32 RESERVED_P7
L1 P6
GPIO_S5_33 RESERVED_P6
K2
GPIO_S5_34
K3
GPIO_S5_35
M2 M7
GPIO_S5_36 RESERVED_M7 USB3_P1_REXT
N3 M12 1 2
GPIO_S5_37 USB3_REXT0
P2
GPIO_S5_38 R1602
L3 P10
GPIO_S5_39 RESERVED_P10 1K24R2F-GP
P12
D
RESERVED_P12

RESERVED_M4
M4
Level shift D

J3 M6
GPIO_S5_40 RESERVED_M6
P3
GPIO_S5_41
H3 D4 USB3_PRX_CTX_P0 (34)
GPIO_S5_42 USB3_RXP0
B12 E3 USB3_PRX_CTX_N0 (34)
GPIO_S5_43 USB3_RXN0
K6
USB3_TXP0 USB3_PTX_CRX_P0 (34) 3D3V_S0 1D8V_S0 1D8V_S0 3D3V_S0 1D8V_S0
M16 K7
USB 3.0 (34)
(34)
USB_PP0
USB_PN0 K16
USB_DP0 USB3_TXN0 USB3_PTX_CRX_N0 (34)
USB_DN0
J14
USB 2.0 (33) USB_PP1 USB_DP1

1
(33) USB_PN1 G14
USB_DN1 R1619 R1623 R1622
K12 2K2R2J-2-GP 2K2R2J-2-GP 2K2R2J-2-GP DY
Camera

G
(52) USB_PP2 USB_DP2
(52) USB_PN2 J12
USB_DN2

2
K10 H8
USB HUB (35)
(35)
USB_PP3
USB_PN3 H10
USB_DP3 RESERVED_H8
H7 (52,67) ALS_INT# D S ALS_INT_R
(67) SENSOR_HUB_RST# D DY S SENSOR_HUB_RST#_R
USB_DN3 RESERVED_H7

ICLK_USB_TERMN_0 D10 check module that if open drain

1D8V_S5 Close to CPU1 ICLK_USB_TERMN_1 F10 ICLK_USB_TERMN_D10
ICLK_USB_TERMN
RESERVED_H5
RESERVED_H4
H5
H4
Q1601 Q1604
DMN5L06K-7-GP DMN5L06K-7-GP
RN1607 84.05067.031 84.05067.031
1 4 USB_OC#1 C20
(63) USB_OC#0 USB_OC_0
2 3 USB_OC#0 B20
(33,34) USB_OC#1 USB_OC_1
SRN10KJ-5-GP

USB_RCOMP D6 BD12 ALS_INT_R

1D8V_S0 USB_RCOMPO GPIO_S0_SC_55 GPIO_S0_SC_56
C7 BC12 GPIO_S0_SC_56 (15)
USB_RCOMPI GPIO_S0_SC_56 UART1_TX_GPIO57
BD14
GPIO_S0_SC_57 FFS_INT2_C
RN1601 BC14
USB_PLL_MON GPIO_S0_SC_58
SMB_DATA
M13
USB_PLL_MON GPIO_S0_SC_59
BF14
DBC_EN_C
X01
2 3 BD16
SMB_CLK GPIO_S0_SC_60 UART1_RX_GPIO61
1 4 BC16
GPIO_S0_SC_61

SRN2K2J-5-GP
TP1604
TPAD14-OP-GP
TP1605
1USB_HSIC_0_DATA B4
1USB_HSIC_0_STROBE B5
USB_HSIC0_DATA
USB_HSIC0_STROBE
1.8V ILB_8254_SPKR
BH12 HDA_SPKR (27)
Level shift
C C
1D8V_S0 TPAD14-OP-GP
TP1606 1USB_HSIC_1_DATA E2 3D3V_S0 1D8V_S0 1D8V_S0
USB_HSIC1_DATA
TPAD14-OP-GP 1USB_HSIC_1_STROBE D2
PCU_SMB_ALERT# TP1607 USB_HSIC1_STROBE SIO_I2C0_DATA
1 DY 2
TPAD14-OP-GP SIO_I2C0_DATA
BH22
SIO_I2C0_CLK
BG23

1
USB_HSIC_RCOMP SIO_I2C0_CLK
R1612 A7
USB_HSIC_RCOMP X01
2K2R2J-2-GP R1627 R1630
BG24 2K2R2J-2-GP 2K2R2J-2-GP

G
SIO_I2C1_DATA
BH24
RCOMP_LPC_HVT SIO_I2C1_CLK
BF18 3.3V/1.8V

2
R1608 1 0R2J-2-GP LPC_AD0_R LPC_RCOMP 3D3V_S0 1D8V_S0 1D8V_S0
(24,65) LPC_AD0 2 BH16
R1611 1 0R2J-2-GP LPC_AD1_R ILB_LPC_AD_0 DBC_EN_C
(24,65) LPC_AD1 2 BJ17 BG25 (52) DBC_EN D S
R1614 1 0R2J-2-GP LPC_AD2_R ILB_LPC_AD_1 SIO_I2C2_DATA
(24,65) LPC_AD2 2 BJ13 BJ25
R1615 1 0R2J-2-GP LPC_AD3_R ILB_LPC_AD_2 SIO_I2C2_CLK
(24,65) LPC_AD3 2 BG14
ILB_LPC_AD_3

1
R1616 1 2 0R2J-2-GP LPC_FRAME#_R BG17
(24,65) LPC_FRAME# CLK_PCI_LPC_R ILB_LPC_FRAME Q1610
1 LPC 2 BG15 BG26 R1626 R1631
(65) CLK_PCI_LPC ILB_LPC_CLK_0 SIO_I2C3_DATA DMN5L06K-7-GP
R1609 1 LPC 2 12R2J-GP CLK_PCI_KBC_R BH14 BH26 100KR2J-1-GP DY 2K2R2J-2-GP

G
(24) CLK_PCI_KBC ILB_LPC_CLK_1 SIO_I2C3_CLK
R1610 12R2J-GP BG16 84.05067.031
X01 (24) PM_CLKRUN#_EC ILB_LPC_CLKRUN
(24) INT_SERIRQ_CPU BG13 1.8V X01

2
ILB_LPC_SERIRQ SIO_I2C4_DATA
BF27
SIO_I2C4_DATA SIO_I2C4_CLK FFS_INT2_C
BG27 (68) INT2_SELECT D S
SIO_I2C4_CLK 3D3V_S0 1D8V_S0 1D8V_S0

BH28
SMB_DATA SIO_I2C5_DATA Q1609
BG12 BG28

1
SMB_CLK PCU_SMB_DATA SIO_I2C5_CLK DMN5L06K-7-GP
BH10
PCU_SMB_CLK
1.8V
TP1603 1 PCU_SMB_ALERT# BG11 84.05067.031 R1628 R1632
TPAD14-OP-GP PCU_SMB_ALERT 2K2R2J-2-GP 2K2R2J-2-GP
BJ29

G
SIO_I2C6_DATA
BG29
SIO_I2C6_CLK

2
BH30 SENSOR_HUB_RST#_R D S CAMERA_DET#_C
GPIO_S0_SC_92 CAMERA_DET#_C (52) CAMERA_DET#
BG30
GPIO_S0_SC_93

BAY-TRAIL-GP Q1611
DMN5L06K-7-GP
84.05067.031
B B
2 R1601 1 ICLK_USB_TERMN_0
1KR2F-3-GP
1D8V_S0 1D8V_S0
2 R1603 1 ICLK_USB_TERMN_1
1KR2F-3-GP R6808 1 2 0R2J-2-GP PCU_SMB_DATA SIO_I2C0_CLK 1 4 SIO_I2C4_DATA 1 4
(68) PCU_SMB_DATA_FFS
SIO_I2C0_DATA 2 I2C 3 SIO_I2C4_CLK 2 DY 3
Avoid routing next to 1 2 USB_RCOMP (68) PCU_SMB_CLK_FFS
R6807 1 2 0R2J-2-GP PCU_SMB_CLK
clock/high speed signals. R1604 45D3R2F-L-GP RN1603 RN1605
X01 SRN2K2J-5-GP SRN2K2J-5-GP
1 2 USB_PLL_MON
DY 0R2J-2-GP X01
R1605

Connected to package ground. 1 2 USB_HSIC_RCOMP

R1606 45D3R2F-L-GP
Level shift
1 2 RCOMP_LPC_HVT
R1607 49D9R2F-L1-GP
3D3V_S0 1D8V_S0 3D3V_S0 1D8V_S0

5V_S5

5
DB2
1

1
R1621 R1625 1
2K2R2J-2-GP 2K2R2J-2-GP I2C
G

G
UART1_TX_GPIO57
UART1_RX_GPIO61
2 DY
3
2

2
SMB_CLK
I2C SIO_I2C0_CLK
4
(12,62) PCU_SMB_CLK D S (62) TP_I2C_CLK D S
X01

6
ACES-CON4-37-GP
Q1602 Q1605
DMN5L06K-7-GP DMN5L06K-7-GP 20.F1897.004
84.05067.031 84.05067.031
3D3V_S0 1D8V_S0 3D3V_S0 1D8V_S0
1

1
A R1624 R1629 A
2K2R2J-2-GP 2K2R2J-2-GP I2C
G

G
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SMB_DATA
I2C SIO_I2C0_DATA application without get Wistron permission
(12,62) PCU_SMB_DATA D S (62) TP_I2C_DATA D S
Redwood SMB TouchPad

Q1603
DMN5L06K-7-GP
Q1606
DMN5L06K-7-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
84.05067.031 84.05067.031 X01 Taipei Hsien 221, Taiwan, R.O.C.

Title

VGS(th) = 1V Size
CPU (USB/LPC/GPIO)
Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 16 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DMI/FDI/PM)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 17 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH
3D3V_AUX_S5

C1801
2 1 SC12P50V2JN-3GP XTAL25_IN
1 DY
R1822
2 Level shift

2
100KR2J-1-GP
XTAL-25MHZ-181-GP R1821 Q1802 R1823
10KR2J-3-GP 0R2J-2-GP
4 3 PM_RSMRST# 1 2 RSMRST#_KBC (24,65)
4 1

1
2
RSMRST#_KBC_G 5 2 1D8V_S5 1D8V_S5
1D8V_S5_PG (24,51)
R1801

2
1MR2J-L3-GP 6 1

2
3 2 R1825 1 2 3V_5V_POK (45,50)

1
10KR2J-3-GP
D DY C1808 R1840 R1839 D

SC22P50V2GN-GP
DMN601DWK-7-1-GP R1828 10KR2J-3-GP

2
C1802 X1801 75.00601.07C 0R2J-2-GP 20KR2J-L3-GP

1
2 1 XTAL25_OUT X01

1
SC12P50V2JN-3GP

2
PCIE0_WAKE#_CPU PMC_BATLOW#

82.30020.G71

1 R1802 2 ICLK_ICOMP
4K02R2F-GP CPU1E 5 OF 13

1 R1803 2 ICLK_RCOMP XTAL25_IN AH12 BAY TRAIL-M/D SOC AU34 UART1_RX 1 TP1802 TPAD14-OP-GP
47D5R2F-1-GP XTAL25_OUT ICLK_OSCIN SIO_UART1_RXD UART1_TX TP1803 TPAD14-OP-GP 3D3V_S5 3D3V_S0
AH10 AV34 1
ICLK_OSCOUT SIO_UART1_TXD UART1_RTS TP1804 TPAD14-OP-GP
BA34 1
SIO_UART1_RTS UART1_CTS TP1805 TPAD14-OP-GP
AD9 AY34 1
RESERVED_AD9 SIO_UART1_CTS

2
ICLK_ICOMP AD14 BF34

1
RTC_AUX_S5 ICLK_RCOMP ICLK_ICOMP SIO_UART2_RXD R1843
AD13 BD34
R1804 ICLK_RCOMP SIO_UART2_TXD 10KR2J-3-GP R1857
BD32
20KR2J-L2-GP SIO_UART2_RTS 1D8V_S5 1KR2J-1-GP
AD10 BF32
RESERVED_AD10 SIO_UART2_CTS
1 2 AD12

1
RESERVED_AD12
1 2 PCH_SUSCLK (24) X01

2
AF6
WLAN (63) CLK_PCIE_WLAN_N0 PCIE_CLKN_0
1

1
R1805 C1803
(63) CLK_PCIE_WLAN_P0 AF4
PCIE_CLKP_0
1.8V PMC_SUSPWRDNACK
D26 SUS_PWRDN_ACK_CPU PLT_RST#_D
PLT_RST# (24,35,63,65)
SC1U6D3V3KX-2GP

20KR2J-L2-GP G24 R1842

PCIE_CLKN1 PMC_SUSCLK0_G24 PMC_SLP_S0IX TP1801 2K2R2J-2-GP
TP1806 TPAD14-OP-GP 1 AF9 F18 1
2

PCIE_CLKP1 PCIE_CLKN_1 PMC_SLP_S0IX PM_SLP_S4#_CPU TPAD14-OP-GP

1 AF7 F22 DY

D
TP1807 TPAD14-OP-GP PCIE_CLKP_1 PMC_SLP_S4
1.0V D22 PM_SLP_S3#_CPU

2
PMC_SLP_S3 Q1809
J20
PCIE_CLKN2 GPIO_S514_J20
TP1808 TPAD14-OP-GP 1 AK4 D20 AC_PRESENT_CPU (24) 2N7002K-2-GP
PCIE_CLKP2 PCIE_CLKN_2 PMC_ACPRESENT PCIE0_WAKE#_CPU PLT_RST#_CPU1
1 AK6 F26 2PLT_RST#_CPU_G G Q1812
TP1809 TPAD14-OP-GP PCIE_CLKP_2 PMC_WAKE_PCIE_0 PMC_BATLOW# R1827 DMN5L06K-7-GP 84.2N702.J31
K26
PCIE_CLKN3 PMC_BATLOW 0R2J-2-GP 2ND = 84.2N702.031
TP1810 TPAD14-OP-GP 1
PCIE_CLKP3
AM4
PCIE_CLKN_3 PMC_PWRBTN
J26 PM_PWRBTN#_CPU (24) 84.05067.031
TP1811 TPAD14-OP-GP 1 AM6 BG9 PMC_RSTBTN# (65)

S
PCIE_CLKP_3 PMC_RSTBTN PLT_RST#_CPU
F20 PLT_RST#_CPU (65)

S
PMC_PLTRST
AM10 J24
RESERVED_AM10 GPIO_S517_J24 PM_SUS_STAT#_CPU
C AM9 G18 C
SRTC_RST# RESERVED_AM9 PMC_SUS_STAT

RTC_RST#
3.3V C11 SRTC_RST#
ILB_RTC_TEST SRTC_RST# (65)
BH7
PMC_PLT_CLK_0
BH5
PMC_PLT_CLK_1
2

BH4
1

C1805 G1801 PMC_PLT_CLK_2 PM_RSMRST# 1D8V_S5

BH8 B10
GAP-OPEN PMC_PLT_CLK_3 PMC_RSMRST COREPWROK
SC1U6D3V3KX-2GP BH6 B7 COREPWROK (36,65)
PMC_PLT_CLK_4 PMC_CORE_PWROK
BJ9 3.3V
2

2
RTC_RST# PMC_PLT_CLK_5
C12 3.3V
1

ILB_RTC_RST RTC_X1
X01 ILB_RTC_X1
C9 R1844
XDP_H_TCK D14 A9 RTC_X2 10KR2J-3-GP DY
(65) XDP_H_TCK TAP_TCK ILB_RTC_X2
XDP_H_TRST_N G12 1.8V B8 BVCCRTC_EXTPAD 1 2 RTC_X1
(65) XDP_H_TRST_N TAP_TRST ILB_RTC_EXTPAD
XDP_H_TMS F14
(65) XDP_H_TMS

1
XDP_H_TDI TAP_TMS C1804 R1807
(65) XDP_H_TDI F12
XDP_H_TDO TAP_TDI SCD1U10V2KX-L-GP RTC_X2
G16 2 1
RTC Reset (65) XDP_H_TDO
(65) TAP_PRDY#
TAP_PRDY# D18
TAP_TDO 10MR2J-L-GP
TAP_PREQ# TAP_PRDY
(65) TAP_PREQ# F16 1.0V_S B24 SVID_ALERT# 1 R1816 2 20R2F-GP VR_SVID_ALERT# (46)
PM_SUS_STAT#_CPU
TAP_PREQ SVID_ALERT
AT34 A25 SVID_DATA 1 R1817 2 16D9R2F-1-GP H_CPU_SVIDDAT (46)
RESERVED SVID_DATA
C25 SVID_CLK 1 R1818 2 0R2J-2-GP H_CPU_SVIDCLK (46)
X1802
PCH_SPI_CS0# SVID_CLK XTAL-32D768KHZ-6-GP
(25) PCH_SPI_CS0#_FLASH 1 2 C23
R1809 22R2F-1-GP PCU_SPI_CS_0 2nd = 82.30001.661
C21
PCU_SPI_CS_1
(25) PCH_SPI_SO B22
PCU_SPI_MISO 1.8V SIO_PWM_0
AU32
1 2 PCH_SPI_SI A21 AT32 4 1
(25) PCH_SPI_SI_FLASH PCU_SPI_MOSI SIO_PWM_1
1 R1806 2 XDP_H_TCK R1810 1 2 22R2F-1-GP PCH_SPI_CLK C22
(25) PCH_SPI_CLK_FLASH PCU_SPI_CLK
51R2J-L1-GP R1811 22R2F-1-GP

1
1 R1808 2 XDP_H_TRST_N B18 C1806 3 2 C1807 5V_S5
GPIO_S5_0

SC5P50V2CN-2GP
SC5P50V2CN-2GP
51R2J-L1-GP PMC_WAKE_PCIE_1# B16 K24 1D8V_S5

2
GPIO_S5_1 GPIO_S5_22 DBG0
C18 N24 DBG0 (65)
XDP_H_TMS GPIO_S5_2 GPIO_S5_23 DBG1
1D8V_S0 1 R1813 2 A17 M20 DBG1 (65) X01

2
51R2J-L1-GP GPIO_S5_3 GPIO_S5_24 DBG2
C17 J18 DBG2 (65)

2
GPIO_S5_4 GPIO_S5_25 DBG3 R1849
(24) EC_SWI# C16 M18 DBG3 (65)
XDP_H_TDI GPIO_S5_5 GPIO_S5_26
1D8V_S0 1 R1814 2 B14 K18 R1850 DY 10KR2J-3-GP
51R2J-L1-GP EC_SMI# GPIO_S5_6 GPIO_S5_27 10KR2J-3-GP
(24) EC_SMI# C15 K20
GPIO_S5_7 GPIO_S5_28
M22

1
XDP_H_TDO GPIO_S5_29 Close to SOC SUS_PWRDN_ACK_B
1D8V_S0 1 R1815 2 M24

1
51R2J-L1-GP GPIO_S5_30 SUS_PWRDN_ACK_CPU
C13
B GPIO_S5_8 R1824 1D0V_S0 B
A13

G
S
GPIO_S5_9 69D8R2F-GP 3D3V_S5
C19 AV32
GPIO_S5_10 SIO_SPI_CS VR_SVID_ALERT# R1853 1D8V_S5 Q1811
BA28 2 1

2
SIO_SPI_MISO 2K2R2J-2-GP
AY28 2N7002K-2-GP
SIO_SPI_MOSI
1 2GPIO_RCOMP18 N26 AY30 AC_PRESENT_CPU 1 2 R1826 DY 84.2N702.J31

2
R1812 GPIO_RCOMP SIO_SPI_CLK 0R2J-2-GPDY
49D9R2F-L1-GP 1D8V_S5 2ND = 84.2N702.031 R1858
BAY-TRAIL-GP does not have 73.2 1% 10KR2J-3-GP DY 10KR2J-3-GP

1
PM_PWRBTN#_CPU 1 R1854 2

1
1D8V_S5 2 1 PMC_WAKE_PCIE_1# SUS_PWRDN_ACK (24)
R1833 10KR2J-3-GP

If no PCI Express ports is implemented on the platform, pull-up to V1P8 Via a 10-k resistor.

3D3V_S5

3D3V_AUX_S5

2
R1829
Q1810 10KR2J-3-GP
2

2N7002KDW-GP
R1830 84.2N702.A3F (24) RTCRST_ON G

1
1D8V_S5 2 1 EC_SMI# 10KR2J-3-GP 2nd = 75.00601.07C PM_SLP_S4#
1D8V_S5 PM_SLP_S4# (24,36,49)
3rd = 84.2N702.F3F D SRTC_RST#
R1835
1

10KR2J-3-GP 1 6 S
3D3V_AUX_S5
1

2
2 1 EC_SWI# PM_SLP_S4#_CPU_D 2 5 Q1801 X01
1D8V_S5
R1845 R1819 2N7002K-2-GP
R1837 2K2R2J-2-GP 3 4 100KR2J-1-GP 84.2N702.J31

2
10KR2J-3-GP DY 2ND = 84.2N702.031
D

R1855
2

1
R1832 10KR2J-3-GP
0R2J-2-GP 1D8V_S5
PM_SLP_S4#_CPU 1 2PM_SLP_S4#_CPU_G G Q1808
1

DMN5L06K-7-GP PM_SLP_S3#_CPU_D

1
PLT_RST#_CPU DY 1 2 EC1808
S

SCD1U25V2KX-GP R1852
A A
3D3V_S5 DY 2K2R2J-2-GP
D

VR_SVID_ALERT# DY 1 2 EC1809 2 Wistron Confidential document, Anyone can not

SCD1U25V2KX-GP Duplicate, Modify, Forward or any other purpose
Q1816 G PM_SLP_S3#_CPU_G application without get Wistron permission
DMN5L06K-7-GP Redwood SMB TouchPad
2

COREPWROK DY 1 2 EC1810 R1856

Wistron Corporation
S

SCD1U25V2KX-GP 10KR2J-3-GP
PM_SLP_S3#_CPU 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R1836 Taipei Hsien 221, Taiwan, R.O.C.
1

PM_SLP_S3# 0R2J-2-GP
(24,36,37,46,49) PM_SLP_S3#
Title

reserve the 0402 0.1u caps on reset for EMI CPU (CLK/SPI/SIDEBAND/JTAG)
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 18 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

CPU1D 4 OF 13

BF6 BAY TRAIL-M/D SOC AY7 PCIE_TXP0_C SCD1U10V2KX-L1-GP 2 1 C1911

(56) SATA0_PTX_DRX_P0 SATA_TXP_0 PCIE_TXP_0 PCIE_PTX_WLANRX_P0_C (63)
BG7 1.0V AY6 PCIE_TXN0_C SCD1U10V2KX-L1-GP 2 1 C1912
(56) SATA0_PTX_DRX_N0 SATA_TXN_0 PCIE_TXN_0 PCIE_PTX_WLANRX_N0_C (63)
HDD (56) SATA0_PRX_DTX_P0 AU16 AT14 PCIE_PRX_WLANTX_P0 (63)
WLAN
SATA_RXP_0 PCIE_RXP_0
(56) SATA0_PRX_DTX_N0 AV16 AT13 PCIE_PRX_WLANTX_N0 (63)
SATA_RXN_0 PCIE_RXN_0
BD10 AV6 PCIE_TXP1 1
SATA_TXP_1 PCIE_TXP_1 TPAD14-OP-GP TP1902
BF10 AV4 PCIE_TXN1 1
SATA_TXN_1 PCIE_TXN_1 TPAD14-OP-GP TP1903
AY16 AT10 PCIE_RXP1 1
SATA_RXP_1 PCIE_RXP_1 TPAD14-OP-GP TP1904
BA16 AT9 PCIE_RXN1 1
SATA_RXN_1 PCIE_RXN_1 TPAD14-OP-GP TP1905
ICLK_SATA_TERMP BB10 AT7 PCIE_TXP2 1
ICLK_SATA_TERMN ICLK_SATA_TERMP PCIE_TXP_2 PCIE_TXN2 TPAD14-OP-GP TP1906
BC10 AT6 1 TPAD14-OP-GP TP1907
ICLK_SATA_TERMN PCIE_TXN_2
BA12 AP12 PCIE_RXP2 1
(24) SOC_RUNTIME_SCI# SATA_GP0 PCIE_RXP_2 TPAD14-OP-GP TP1908
AY14 AP10 PCIE_RXN2 1
SATA_GP1 PCIE_RXN_2 TPAD14-OP-GP TP1909
AY12
SATA_LED
1.8V
AP6 PCIE_TXP3 1
PCIE_TXP_3 TPAD14-OP-GP TP1910
SATA_RCOMP_DP PCIE_TXN3
1D8V_S0 1D8V_S0 2013/04/08 2 1 SATA_RCOMP_DN
AU18
AT18
SATA_RCOMP_P_AU18
SATA_RCOMP_N_AT18
PCIE_TXN_3
AP4 1 TPAD14-OP-GP TP1911
R1909 AP9 PCIE_RXP3 1
PCIE_RXP_3 PCIE_RXN3 TPAD14-OP-GP TP1912
402R2F-GP AP7 1
PCIE_RXN_3 TPAD14-OP-GP TP1913
AT22
MMC1_CLK
BB7
VSS_BB7
AV20 BB5
1

MMC1_D0 VSS_BB5
AU22
MMC1_D1
R1902 R1903 AV22
MMC1_D2
1.8V PCIE_CLKREQ_0
BG3 CLK_PCIE_WLAN_REQ#_CPU (63)
DY 10KR2J-3-GP DY 10KR2J-3-GP AT20
MMC1_D3 PCIE_CLKREQ_1
BD7
HDD_FALL_INT_C INT_TP# (62)
AY24 BG5
MMC1_D4 PCIE_CLKREQ_2 PCIE_CLKREQ#_3
AU26 BE3
2

MMC1_D5 PCIE_CLKREQ_3
AT26 BD5
MMC1_D6 SD3_WP_BD5
C AU20 C
OS_SELECT2 OS_SELECT1 MMC1_D7
AP14 PCIE_RCOMP_P_AP14_AP14 2 R1919 1 402R2F-GP
PCIE_RCOMP_P_AP14
AV26 AP13 PCIE_RCOMP_N_AP13_AP13
MMC1_CMD PCIE_RCOMP_N_AP13
BA24
MMC1_RST
BB4
RESERVED_BB4
1

1 2 MMC1_RCOMP AY18 BB3

R1904 R1905 MMC1_RCOMP RESERVED_BB3
AV10
R1912 RESERVED_AV10
10KR2J-3-GP 10KR2J-3-GP AV9
49D9R2F-L1-GP RESERVED_AV9
BA18
SD2_CLK
AY20
2

SD2_D0
BD20
SD2_D1
1.5V HDA_LPE_RCOMP
BF20 HDA_LPE_RCOMP 1 2
BA20 BG22 HDA_RST# R1914
SD2_D2 HDA_RST HDA_SYNC 49D9R2F-L1-GP
BD18 BH20
SD2_D3_CD HDA_SYNC HDA_BITCLK
BC18 BJ21
SD2_CMD HDA_CLK HDA_SDOUT
BG20 1 R1917 2 33R2J-L1-GP HDA_CODEC_SDOUT (27)
HDA_SDO
BG19
HDA_SDI0 HDA_SDI1
BG21
HDA_SDI1
AY26 BH18 HDA_SDIN0 (27)
SD3_CLK HDA_DOCKRST
AT28 BG18 1
SD3_D0 HDA_DOCKEN TP1901 TPAD14-OP-GP
= Default BD26
AU28
SD3_D1
BF28
SD3_D2 LPE_I2S2_CLK LPE_I2S2_FRM
BA26
SD3_D3
1.8V LPE_I2S2_FRM
BA30 LPE_I2S2_FRM (15)
LPE_I2S2_DATAOUT
BC24
AV28
SD3_CD# LPE_I2S2_DATAOUT
BC30
BD28
LPE_I2S2_DATAOUT (15,24)
OS_SELECT1 SD3_CMD LPE_I2S2_DATAIN Modify 20130702
Win8.1 Android Dual OS BF22
SD3_1P8EN
OS_SELECT2 BD22 P34 R1931 Follow Intel CHKLST V1.2
SD3_PWREN RESERVED_P34 71D5R2F-GP 70.7 5% pull-up to V1P0S
N34
SD3_RCOMP RESERVED_N34
OS_SELECT1 0 1 0 1 2 BF26
SD3_RCOMP
AK9 1 2 1D0V_S0
R1922 RESERVED_AK9
AK7
RESERVED_AK7
OS_SELECT2 0 0 1 49D9R2F-L1-GP
1.0V C24 H_PROCHOT#_R 2 1
PROCHOT H_PROCHOT# (24,44,46)
R1923 0R2J-2-GP

1
BAY-TRAIL-GP C1901
SC47P50V2JN-3GP DY

2
B B

1D8V_S0
R1924 RN1901
0R2J-2-GP 1 4 HDA_BITCLK
(27) HDA_CODEC_BITCLK
2 1 ICLK_SATA_TERMP (27,29) HDA_CODEC_RST# 2 3 HDA_RST# RN1902
CLK_PCIE_WLAN_REQ#_CPU 1 4
SRN33J-5-GP-U PCIE_CLKREQ#_3 2 3
2 1 ICLK_SATA_TERMN 3D3V_S0 1D8V_S0 1D8V_S0

R1925 SRN10KJ-5-GP
0R2J-2-GP

1
X01 R1906 R1907
2K2R2J-2-GP DY 2K2R2J-2-GP

G
5V_S0

2
G D S HDD_FALL_INT_C
(67,68) HDD_FALL_INT
HDA_SYNC 2 1 HDA_SYNC_R D
DY Q1901
R1926 S HDA_CODEC_SYNC (27) HDA_RST# DMN5L06K-7-GP
33R2J-L1-GP
Q1902 84.05067.031
2N7002K-2-GP
84.2N702.J31 X01

1
2 1 SOC_RUNTIME_SCI# 2ND = 84.2N702.031
1D8V_S0
C1910 DY
R1901 SC22P50V2JN-L-GP

2
10KR2J-3-GP
2 1
R1929 0R2J-2-GP

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (SATA/PCIE/IHDA)
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 19 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 20 of 102
5 4 3 2 1
 5 4 3 2 1

D D

1D0V_S0
CPU1H 8 OF 13 1D35V_S0
1D5V_S0
V32 BAY TRAIL-M/D SOC AD36 1D8V_S0
SVID_V1P0_S3_V32 DRAM_V1P35_S0IX_F1_AD36
BJ6 VGA_V1P0_S3_BJ6 HDA_LPE_V1P5V1P8_S3_AM32 AM32
AD35 AM30 3D3V_S0
DRAM_V1P0_S0IX_AD35 UNCORE_V1P8_S3_AM30 1D8V_S5
AF35 DRAM_V1P0_S0IX_AF35 UNCORE_V1P8_S3_AN32 AN32
AF36 DRAM_V1P0_S0IX_AF36 LPC_V1P8V3P3_S3_AM27 AM27
AA36 DRAM_V1P0_S0IX_AA36 UNCORE_V1P8_G3_U24 U24
AJ36 DRAM_V1P0_S0IX_AJ36 USB_V3P3_G3_N18 N18 3D3V_S5
AK35 P18 R2102
DRAM_V1P0_S0IX_AK35 USB_V3P3_G3_P18 1D8V_S5 0R2J-2-GP
AK36 DRAM_V1P0_S0IX_AK36 UNCORE_V1P8_S3_U38 U38 1D8V_S0
Y35 AN24 3D3V_S0 SD3_V1P8V3P3_S3_AN271 2 3D3V_S0
DRAM_V1P0_S0IX_Y35 VGA_V3P3_S3_AN24
Y36 DRAM_V1P0_S0IX_Y36 PCU_V1P8_G3_V25 V25
1D0V_S5
AK19 DDI_V1P0_S0IX_AK19 PCU_V3P3_G3_N22 N22 3D3V_S5 1 DY 2 1D8V_S0
AK21 DDI_V1P0_S0IX_AK21 SD3_V1P8V3P3_S3_AN27 AN27 SD3_V1P8V3P3_S3_AN27
AJ18 AD16 R2103
C DDI_V1P0_S0IX_AJ18 VSS_AD16 0R2J-2-GP C
AM16 DDI_V1P0_S0IX_AM16 VSS_AD18 AD18
U22 UNCORE_V1P0_G3_U22 USB_HSIC_V1P2_G3_V18 V18 USB_HSIC_V1P2_G3_V18
V22 AA18 1D8V_S5
UNCORE_V1P0_G3_V22 UNCORE_V1P8_G3_AA18
AN29 VIS_V1P0_S0IX_AN29 RTC_VCC_P22 P22 RTC_AUX_S5
AN30 VIS_V1P0_S0IX_AN30 USB_V1P8_G3_N20 N20
1D0V_S0 AF16 U25
UNCORE_V1P0_S3_AF16 PMU_V1P8_G3_U25 R2104
AF18 UNCORE_V1P0_S3_AF18 CORE_V1P05_S3_AF33 AF33
Y18 AG33 0R2J-2-GP
UNCORE_V1P0_S3_Y18 CORE_V1P05_S3_AG33 1D05V_S0 USB_HSIC_V1P2_G3_V181
G1 UNCORE_V1P0_S3_G1 CORE_V1P05_S3_AG35 AG35 2 1D0V_S5
AM21 PCIE_V1P0_S3_AM21 CORE_V1P05_S3_U33 U33
AN21 PCIE_V1P0_S3_AN21 CORE_V1P05_S3_U35 U35
CORE_V1P05_S3_V33 V33
1D05V_S0 AN18 A3
PCIE_GBE_SATA_V1P0_S3_AN18 VSS_A3
AN19 SATA_V1P0_S3_AN19 VSS_A49 A49
AA33 CORE_V1P05_S3_AA33 VSS_A5 A5
AF21 UNCORE_V1P0_S0IX_AF21 VSS_A51 A51
AG21 UNCORE_V1P0_S0IX_AG21 VSS_A52 A52
1D0V_S0 V24 A6
VIS_V1P0_S0IX_V24 VSS_A6

1.05V
Y22 VIS_V1P0_S0IX_Y22 VSS_B2 B2
Y24 VIS_V1P0_S0IX_Y24 VSS_B52 B52
M14 USB_V1P0_S3_M14 VSS_B53 B53
CRB 1D0V_S5
U18
U19
USB_V1P0_S3_U18
USB_V1P0_S3_U19
VSS_BE1
VSS_BE53
BE1
BE53
AN25 GPIO_V1P0_S3_AN25 VSS_BG1 BG1
Y19 USB3_V1P0_G3_Y19 VSS_BG53 BG53
1D05V_S0 C3 BH1
USB3_V1P0_G3_C3 VSS_BH1
C5 UNCORE_V1P0_G3_C5 VSS_BH2 BH2
B6 UNCORE_V1P0_G3_B6 VSS_BH52 BH52
AC32 CORE_V1P0_S3_AC32 VSS_BH53 BH53
B B
Y32 CORE_V1P0_S3_Y32 VSS_BJ2 BJ2
U36 UNCORE_V1P35_S0IX_F4_U36 VSS_BJ3 BJ3
1D35V_S0 AA25 BJ5
UNCORE_V1P35_S0IX_F5_AA25 VSS_BJ5
AG32 UNCORE_V1P35_S0IX_F2_AG32 VSS_BJ49 BJ49
V36 UNCORE_V1P35_S0IX_F3_V36 VSS_BJ51 BJ51
BD1 VGA_V1P35_S3_F1_BD1 VSS_BJ52 BJ52
AF19 UNCORE_V1P35_S0IX_F6 VSS_C1 C1
AG19 UNCORE_V1P35_S0IX_F1_AG19 VSS_C53 C53
AJ19 ICLK_V1P35_S3_F1_AJ19 VSS_E1 E1
VSS_E53 E53
RESERVED_F1 F1
AG18 ICLK_V1P35_S3_F2 PCIE_V1P0_S3_AK18 AK18
AN16 VSSA_AN16 PCIE_V1P0_S3_AM18 AM18 1D0V_S0
U16 USB_VSSA_U16
BAY-TRAIL-GP

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Variant Name> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 21 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

Reserved Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 22 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PCH

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 23 of 102
5 4 3 2 1
 SSID = KBC
5 4 3 2 1

AVCC 3D3V_AUX_KBC

R2405
1 2

0R3J-6-GP

2
CLK_PCI_KBC
R2404
2D2R3-1-U-GP

1
3D3V_AUX_KBC

1
1

1
C2425 C2412 DY C2436

SCD1U10V2KX-L1-GP

SC2D2U6D3V2MX-GP
KBC_VCC SC22P50V2GN-GP

2
1 2 RTC_DET#

2
D R2401
D

1
10KR2J-3-GP C2426 C2427 C2428 C2429 C2430 C2411 3D3V_S0
3D3V_S0

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SC2D2U6D3V2MX-GP
R2473 R2458
10KR2J-3-GP 100KR2J-1-GP

2
PM_CLKRUN#_EC 2 DY 1 VOL_UP# 1 2
1D05V_S0
VOL_DOWN# 1 2
EC_AGND H_RCIN# 2 1
R2454
1 2 EC_VTT R2469 100KR2J-1-GP
R2414 0R2J-2-GP 10KR2J-3-GP
1

C2437
SCD1U10V2KX-L1-GP
2

KBC24

19 54 KROW0 KROW[0..7] (62)

VCC KBSIN0/GPIOA0/N2TCK KROW1
46 55
VCC KBSIN1/GPIOA1/N2TMS KROW2
76 56
3D3V_AUX_KBC
88
115
VCC
VCC
VCC
KBSIN2/GPIOA2
KBSIN3/GPIOA3
KBSIN4/GPIOA4
57
58
KROW3
KROW4 3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5
Level shift 3D3V_S5 3D3V_S5
3D3V_S0 59 KROW5
KBSIN5/GPIOA5 KROW6
102 60
AVCC KBSIN6/GPIOA6

1
61 KROW7
KBSIN7/GPIOA7 R2451 R2445 R2443 R2438 R2444 R2446
4
VDD

4K7R2J-L-GP

4K7R2J-L-GP

4K7R2J-L-GP
DY DY 2K2R2J-2-GP DY DY 2K2R2J-2-GP DY DY 2K2R2J-2-GP
EC_VTT 12 53 KCOL0 KCOL[0..15] (62)
VTT KBSOUT0/GPOB0/SOUT_CR/JENK#

1
52 KCOL1
(44) AD_IA

B 2

B 2

B 2
R2442 C2432 C2433 KBSOUT1/GPIOB1/TCK KCOL2 EC_SWI#_B SOC_RUNTIME_SCI#_B EC_SMI#_B
DY KBSOUT2/GPIOB2/TMS
51

SC2D2U6D3V3MX-1-GP
1 100KR2J-1-GP
2 BAT_IN# SCD1U10V2KX-L1-GP EC_AGND C2438 1 2 SCD1U10V2KX-L1-GP 97 50 KCOL3 Q2413 Q2407 Q2408

2
PCB_VER_AD GPIO90/AD0 KBSOUT3/GPIOB3/TDI KCOL4 LMBT3904LT1G-GP LMBT3904LT1G-GP LMBT3904LT1G-GP
98 49
R2418 GPIO91/AD1 KBSOUT4/GPOB4 KCOL5 ECSWI#_KBC SOC_RUNTIME_SCI#_KBC ECSMI#_KBC
(42) PSID_EC 99
GPIO92/AD2 KBSOUT5/GPIOB5/TDO
48 E DY C EC_SWI# (18) E DY C SOC_RUNTIME_SCI# (19) E DY C EC_SMI# (18)
2 10KR2J-3-GP
1 ECRST#
(52) HOME_BTN# 100 47 KCOL6
GPIO93/AD3 KBSOUT6/GPIOB6/RDY# KCOL7
108 43
GPIO05/AD4 KBSOUT7/GPIOB7 KCOL8
(63) KB_CLOSE#_2 96
GPIO04/AD5 KBSOUT8/GPIOC0
42 84.T3904.H11 84.T3904.H11 84.T3904.H11
Modify 20130610 (34) USBCHARGER_CB0
MODEL_ID_AD
95
GPIO03/EXT_PURST#/AD6KBSOUT9/GPOC1/SDP_VIS#
41 KCOL9
KCOL10 R2434 R2460 R2461
94 40
GPIO07/AD7/VD_IN2 KBSOUT10/P80_CLK/GPIOC2 KCOL11 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
39
3D3V_S5 KBSOUT11/P80_DAT/GPIOC3 KCOL12
38 1 2 1 2 1 2
KBSOUT12/GPO64/TEST# KCOL13
(26) FAN1_DAC_1 101 37
GPIO94/DA0 KBSOUT13/GP(I)O63/TRIST# KCOL14
RN2401 (44) AD_IA_HW 105 36
GPIO95/DA1 KBSOUT14/GP(I)O62/XORTR# KCOL15
106 35
SML1_CLK GPIO96/DA2 KBSOUT15/GPIO61/XOR_OUT
1 4 (64) LID_CLOSE# 107 34
SML1_DATA GPIO97/DA3 GPIO60/KBSOUT16/DSR1#
2 3 33 TP_WAKE (62)
GPIO57/KBSOUT17/DCD1#

(43,44) BAT_SCL 70
SRN2K2J-5-GP GPIO17/SCL1/N2TCK
BATTERY / CHARGER ------> (43,44) BAT_SDA 69
67
GPIO22/SDA1/N2TMS LAD0/GPIOF1
126
127
LPC_AD0 (16,65)
(26,67) SML1_CLK GPIO73/SCL2/N2TCK LAD1/GPIOF2 LPC_AD1 (16,65)
2nd G-sensor / Thermal ------> (26,67) SML1_DATA
ECSMI#_KBC
68
119
GPIO74/SDA2/N2TMS LAD2/GPIOF3
128
1
LPC_AD2 (16,65)
GPIO23/SCL3/N2TCK LAD3/GPIOF4 LPC_AD3 (16,65)
(52) LCD_TST 1 2 (18) RTCRST_ON 120 2 CLK_PCI_KBC (16)
R2413 0R2J-2-GP PROCHOT_EC GPIO31/SDA3/N2TMS LCLK/GPIOF5
24 3 LPC_FRAME# (16,65)
GPIO47/SCL4A/N2TCK LFRAME#/GPIOF6
(52) LCD_TST_EN 28 7 PLT_RST# (18,35,63,65)
ECSWI#_KBC GPIO53/SDA4A/N2TMS LRESET#/GPIOF7
26
GPIO51/TA3/N2TCK 3D3V_S0 1D8V_S0 3D3V_S5 3D3V_S5 3D3V_S5 3D3V_S5
123
GPIO67/SOUT1/N2TMS

C C
90 EC_SPI_CS#1 1 R2412 2 33R2J-L1-GP
3D3V_S0 GPIOC6/F_CS0# EC_SPI_CS0#_FLASH (25)
92 EC_SPI_CLK 1 R2407 2 33R2J-L1-GP
GPIOC7/F_SCK EC_SPI_CLK_FLASH (25)

1
(62) TPCLK 72 109 CAP_LED# (62)
R2417 GPIO37/PSCLK1 GPIO30/F_WP#/RTS1# R2439 R2455 R2470 R2456 R2472 R2457
(62) TPDATA 71 80 BAT_IN# (43)
GPIO35/PSDAT1 GPIO41/F_WP#/PSL_GPIO41
2 10KR2F-2-GP
1 FAN_TACH1
(36) ALL_SYS_PWRGD 10 87 EC_SPI_SO 1 R2402 2 33R2J-L1-GP EC_SPI_SI_FLASH (25) DY DY 2K2R2J-2-GP 10KR2J-3-GP DY DY 2K2R2J-2-GP 10KR2J-3-GP DY DY 2K2R2J-2-GP
GPIO26/PSCLK2 GPIOC5/F_SDIO/F_SDIO0 EC_SPI_SI 10KR2J-3-GP
(42) PWR_CHG_AD_OFF 11 86 EC_SPI_SI (25)
SUS_PWR_ACK_R GPIO27/PSDAT2 GPIOC4/F_SDI/F_SDIO1 L_BKLT_EN_B PM_PWRBTN#_B AC_PRESENT_B
(18) SUS_PWRDN_ACK 1 2 25 91 KB_DISABLE (67)

B 2

B 2

B 2
GPIO50/PSCLK3 GPIO81/F_WP#/F_SDIO2
1 R2420 2 H_A20GATE
(52) BLON_OUT 27 77 PCH_SUSCLK_KBC
8K2R2J-L-2-GP R2411 GPIO52/PSDAT3 GPIO00/32KCLKIN/F_SDIO3 Q2410 Q2411 Q2412
0R2J-2-GP LMBT3904LT1G-GP LMBT3904LT1G-GP LMBT3904LT1G-GP
PSL_IN1# RTC_AUX_S5 L_BKLT_EN PM_PWRBTN# AC_PRESENT
(26) FAN_TACH1
PM_PWRBTN#
31
GPIO56/TA1 PSL_IN1#/GPI70
73
PSL_IN2#
C DY E L_BKLT_EN_CPU (8) E DY C PM_PWRBTN#_CPU (18) E DY C AC_PRESENT_CPU (18)
117 93
3D3V_S5 GPIO20/TA2/IOX_DIN_DIO
PSL_IN2#/GPI06/EXT_PURST# PSL_OUT#
(63) VOL_UP# 63 74
GPIO14/TB1 PSL_OUT#/GPIO71
(18,36,37,46,49) PM_SLP_S3# 64
GPIO01/TB2 84.T3904.H11 84.T3904.H11 84.T3904.H11

2
29 SOC_RUNTIME_SCI#_KBC 3D3V_AUX_S5 R2416 R2430 R2441 R2453
R2423 ECSCI#/GPIO54 ECRST# 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
(27) KBC_BEEP 32 85 0R2J-2-GP
GPIO15/A_PWM EXT_RST#
2 10KR2J-3-GP
1 KB_CLOSE#_2
X01 (63) PWRLED# 118 122 H_RCIN# 1 2 1 2 1 2
GPIO21/B_PWM KBRST#/GPIO86
(52) EC_BRIGHTNESS 62

1
GPIO13/C_PWM
(42) AC_IN_KBC# 65 75
L_BKLT_EN GPIO32/D_PWM VSBY KBC_VBKUP
22 114
GPIO45/E_PWM/DTR1#_BOUT1 VBKUP KBC_VCORF
(63) BATTLED# 16 44 1 2
GPIO40/F_PWM/1_WIRE/RI1# VCORF
81 13
3D3V_AUX_KBC R2408 GPIO66/G_PWM/PSL_GPIO66 PECI INT_SERIRQ C2431 SC1U10V2KX-1GP
66 125
Note : After 1D2V_S5_PWRGD alerting, >10us for RSMRST#_KBC 0R2J-2-GP GPO33/H_PWM/VD1_EN# SERIRQ/GPIOF0
6 RTC_DET# (25)
1D8V_S5_PG_KBC GPIO24
1 DY 2 104 15
R2406
2 10KR2J-3-GP
1 HOME_BTN#
(18,51) 1D8V_S5_PG

(33,63) USB_PWR_EN# 110

GPIO80/VD_IN1

GPIO82/IOX_LDSH/VD_OUT1
GPIO36/TB3/CTS1#

GPIO44/SCL4B
21
RSMRST#_KBC (18,65)

PM_SLP_S4# (18,36,49)
Level shift
112 20 USBDET_CON#
GPIO84/IOX_SCLK/VD_OUT2 PSL_IN4#/GPI43
17
3D3V_AUX_KBC PSL_IN3#/GPI42
23 USB_CHG_EN (34)
GPIO46/SDA4B/CIRRXM
(26,36) SYS_PWROK 84
GPIO77/SPI_MISO AC_PRESENT 3D3V_S0 1D8V_S0
(63) BLUETOOTH_EN 83 113
GPIO76/SPI_MOSI GPIO87/CIRRXM/SIN_CR
(63) WIFI_RF_EN 82 14 S5_ENABLE (36)
AC_IN_KBC# ME_UNLOCK# GPIO75/SPI_SCK GPIO34/SIN1/CIRRXL 1D8V_S0
1 2 79
R2459 100KR2J-1-GP GPIO02/SPI_CS# SCD1U10V2KX-L1-GP

1
5 C2435 C2434
GND

1
124 18 SCD1U10V2KX-L1-GP 3D3V_S5
(52) TOUCH_PANEL_EN GPIO10/LPCPD# GND
H_A20GATE 121 45 R2474

2
3D3V_S5 E51_TxD GPIO85/GA20 GND U2402
TPAD14-OP-GP TP2401 1 111 78 10KR2J-3-GP
GPIO83/SOUT_CR GND

1
9 89 3D3V_S5
(63) VOL_DOWN# GPIO65/SMI# GND
116 6 1 R2450

2
USB_DET# GND INT_SERIRQ_OE VCCB VCCA 4K7R2J-L-GP
1
R2452
2
100KR2J-1-GP
(16) PM_CLKRUN#_EC 8
GPIO11/CLKRUN# INT_SERIRQ
5
OE GND
2 DY
(27) AMP_MUTE# 30 103 4 3 INT_SERIRQ_CPU (16)
GPIO55/CLKOUT/IOX_DIN_DIO AGND B A

1
Q2409

2
2
R2447

1
NPCE285PA0DX-GP R2415 G2129TL1U-GP PCH_SUSCLK_KBC 3 4 DY 10KR2J-3-GP
R2475 VCCA should not exceed VCCB
071.00285.000G 0R2J-2-GP
1KR2J-1-GP DY 2 DY 5
73.02129.02J (18) PCH_SUSCLK

2
5V_S0

1
1 6 PCH_SUSCLK_D

2
1 2 TOUCH_PANEL_EN
DMN601DWK-7-1-GP
R2403 75.00601.07C
10KR2J-3-GP EC_AGND

B C2418
1 DY2 AD_IA

SCD1U10V2KX-L1-GP
B
RST Key
3D3V_AUX_S5 C2419 3D3V_AUX_S5
3D3V_AUX_S5 SCD1U10V2KX-5GP
2

3D3V_AUX_S5
R2433 1 2
2

330KR2J-L1-GP
1 2 ME_UNLOCK# R2425
(15,19) LPE_I2S2_DATAOUT
330KR2J-L1-GP 1KR2J-1-GP
1

1
R2467 R2422 R2440
0R2J-2-GP 0R2J-2-GP PSL_OUT# 1 2 KBC_ON#_GATE_L 1 2 KBC_ON#_GATE G R2421
1

PSL_IN2# 10KR2J-3-GP
G
(63) KBC_PWRBTN# 1 2
R2435 ECRST#
20KR2J-L2-GP Q2404 D

2
DMP2130L-7-GP
D

84.02130.031
R2419 2ND = 84.03413.A31

1
0R2J-2-GP C2415 RSTSW1
GPIO0 High Active

1
3D3V_AUX_KBC 3D3V_AUX_KBC

SC1U6D3V2KX-L-1-GP
(44) AC_IN# 1 2 PSL_IN1# DY SW-TACT-4P-71-GP
B Q2401
(26,36) PURE_HW_SHUTDOWN#

2
Q2402 MMBT3906-4-GP 6 5

1
PROCHOT_EC G 84.T3906.A11 62.40089.441

C
R2437 2nd = 84.03906.F11
D H_PROCHOT# (19,44,46) 10KR2J-3-GP 2nd = 62.40009.D71

2
1

3D3V_AUX_S5 Q2403
R2432 S G

2
DY 100KR2J-1-GP
2

2N7002K-2-GP D S5_ENABLE
84.2N702.J31 R2427
2

2ND = 84.2N702.031 330KR2J-L1-GP D2404 S

1 USB_DET#
2N7002K-2-GP
1

(34) USBDET_CON# 3 DY 84.2N702.J31

2ND = 84.2N702.031
2 KBC_ON#_GATE_L 3rd = 84.07002.I31
4th = 84.2N702.W31
BAT54CPT-2-GP
75.00054.K7D

R2431
SYS_PWROK DY 1 2 EC2440
SCD1U25V2KX-GP 3D3V_AUX_KBC
Reserved for SKU control
3D3V_AUX_KBC
1

BLUETOOTH_EN DY 1 2 EC2436 R2424

1

A A
SCD1U25V2KX-GP 20KR2J-L2-GP
SB R2431
10KR2J-3-GP
2

WIFI_RF_EN
UMA
DY 1 2 EC2437 PCB_VER_AD
2

SCD1U25V2KX-GP
MODEL_ID_AD
1

R2426
1

C2417
1
100KR2F-L1-GP

ALL_SYS_PWRGD DY 1 2 EC2438 DY
1
SCD1U10V2KX-L1-GP

SCD1U25V2KX-GP C2420 R2436

2

100KR2J-1-GP
DY
2

SCD1U10V2KX-L1-GP

S5_ENABLE DY 1 2 EC2439 Redwood SMB TouchPad

SCD1U25V2KX-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
For EMI request KBC_NPCE985PB
Size Document Number Rev
A1
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 24 of 102
 5 4 3 2 1

SSID = Flash.ROM
SPI FLASH ROM (8M byte) for PCH
RN2501
4 5
SPI_HOLD_0# 3 6 R2506
PCH_SPI_W P# 2 7 22R2F-1-GP
PCH_SPI_CS0#_FLASH 1 8 1D8V_SPI (18) PCH_SPI_SO 1 2 PCH_SPI_SO_FLASH
U2502
D (18) PCH_SPI_CLK_FLASH D
SRN4K7J-10-GP
1D8V_SPI 8 VCC CS# 1 PCH_SPI_CS0#_FLASH (18) (18) PCH_SPI_SI_FLASH
SPI_HOLD_0# 7 2 PCH_SPI_SO_FLASH
PCH_SPI_CLK_FLASH HOLD#/RESET#/IO3 DO/IO1 PCH_SPI_W P# EC2503 EC2502 EC2501
6 CLK WP#/IO2 3

1
PCH_SPI_SI_FLASH 5 4 DY DY DY
DI/IO0 GND

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
1D8V_SPI

2
W 25Q64FW SSIG-GP
1D8V_SPI 1D8V_S5
72.25Q64.S01

1
R2507
DY C2506
SC10U6D3V5KX-L-1-GP
C2507
SCD1U10V2KX-L1-GP

2
2 1
0R0402-PAD

SSID = RBAT +RTC_VCC

RTC_AUX_S5 Q2501
C 1 C

3
Width=20mils
2 3D3V_AUX_S5
2

C2505 BAS40C-2-GP
75.00040.07D
1
SC1U6D3V3KX-2GP

2nd = 75.00040.A7D
3rd = 75.00040.C7D Q2505
G

D RTC_DET# (24)

1
R2505 S
10MR2J-L-GP
2N7002K-2-GP
84.2N702.J31

2
2ND = 84.2N702.031
3rd = 84.07002.I31
4th = 84.2N702.W31

B B

SPI FLASH ROM (128k byte) for EC

3D3V_S5

SPI ROM Equal length need to less than 500mil

1

1
R2502 R2503 R2504
3D3V_S5 3K3R2F-2-GP 10KR2J-3-GP 3K3R2F-2-GP
2

2
1

C2502 C2501
3D3V_AUX_S5
SC10U6D3V3MX-L-GP
DY SCD1U10V2KX-L1-GP U2501
2

A (24) EC_SPI_CS0#_FLASH 1 CE# VCC 8 Redwood SMB TouchPad A

1 2 EC_SPI_SO_FLASH 2 7 EC_SPI0_HOLD_0
(24) EC_SPI_SI SO HOLD#
EC_SPI0_W P_0 3 6
WP# SCK EC_SPI_CLK_FLASH (24)
R2501
33R2J-L1-GP
4 GND SIO 5 EC_SPI_SI_FLASH (24) Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PM25LD010C-SCE-GP Taipei Hsien 221, Taiwan, R.O.C.

Title
72.25010.N01 Size
Flash(KBC+PCH)/RTC
Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 25 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Thermal
3D3V_S0

2
1
RN2601
SRN2K2J-5-GP
D
Thermal sensor NCT 7718W Q2604
*Layout* 15 mil D

3
4
NCT_CLK 1 6 SML1_CLK (24,67)
Fan controller1
2 5

3 4
5V_S0
NCT_DATA DMN601DW K-7-1-GP R2611 FAN261
3D3V_S0 0R2J-2-GP
75.00601.07C FON#
1 2 1 8
20120809
SML1_DATA (24,67)
5V_S0
DY 2
FSM# GND
7
FAN_VCC1 VIN GND C2607 C2611
3 VOUT GND 6

1
(24) FAN1_DAC_1 4 VSET GND 5

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
Layout notice : C2601 C2602

2
1

1
SCD1U10V2KX-L1-GP

SC10U6D3V3MX-L-GP
Both DXN and DXP routing 10 mil APL5606AKI-TRG-GP
trace width and 10 mil spacing. 74.05606.A71
2nd = 74.02113.0E1

2
Q2601 Layout Note:
LMBT3904LT1G-GP
Need 10 mil trace width.
84.T3904.H11
2nd = 84.03904.E11 P2800_DXP FAN1
U2601 5
1

(24) FAN_TACH1 1 2 FAN_TACH1_C 3

C

C R2604 1 8 NCT_CLK R2610 0R2J-2-GP 2 C

C2604 C2605 VDD SCL NCT_DATA
DY B 2 D+ SDA 7
SC2K2P50V2KX-L-GP
NTC-100K-8-GP

SC470P50V3JN-2GP 3 6 ALERT# FAN_VCC1 1

2

THERM_SYS_SHDN# D- ALERT#
4 5 4
2

P2800_DXN T_CRIT# GND

K
ACES-CON3-13-GP

1
2.System Sensor, Put on palm rest NCT7718W -GP
Layout Note: C2608 D2601 C2603

RB551V30-1-GP
SC4D7U6D3V3KX-GP
74.07718.0B9
Signal Routing Guideline: DY DY DY SC2200P50V2KX-2GP 20.F1295.003
2nd = 20.F1841.003

2
Trace width = 15mil

A
1.H/W T8 Shutdown
AFTP2603 1
083.55130.008F

FAN_TACH1_C 1 AFTP2601
3D3V_S0 FAN_VCC1 1 AFTP2602

3D3V_S0

1
B R2605 B
R5

1
18K7R2F-GP
R2606
2KR2F-3-GP
R7

2
ALERT#

2
Q2603
S THERM_SYS_SHDN#

(24,36) PURE_HW _SHUTDOW N# D

G SYS_PW ROK_G 1 DY 0R2J-2-GP

2 3D3V_S0
R2607

1
C2606 2N7002K-2-GP

SCD1U10V2KX-L1-GP
DY 84.2N702.J31
2ND = 84.2N702.031

2
3rd = 84.2N702.W31 1 2 SYS_PW ROK (24,36)
R2609 0R2J-2-GP

T8=85 degree

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal 7718/Fan Controllor P2793

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 26 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = AUDIO

D D

EC2707 1 SCD1U10V2KX-5GP
DY2
1D5V_S0 DVDD_1D5V
EC2706 1 SCD1U10V2KX-5GP
DY2
(29) LINE1_VREFO_R MIC2_VREFO (29)
1 2
R2701 0R2J-2-GP EC2705 1 SCD1U10V2KX-5GP
Close pin9 (29) LINE1_VREFO_L AUD_AGND DY2

SC2D2U6D3V2MX-GP

SC4D7U6D3V3KX-GP
3D3V_S0 EC2704 1 SCD1U10V2KX-5GP
DY2
2

2
C2714 C2721 (29) AUD_HP1_JACK_L
+5V_AVDD 5V_S0
1 DY 2

1
(29) AUD_HP1_JACK_R
SC10U6D3V3MX-L-GP

1 C2705

1 C2702
R2712 0R2J-2-GP EC2703 1 SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY2
1

C2704 R2704
SC1U10V2KX-L1-GP 100KR2J-1-GP 1 2

1 2 R2703 AUD_AGND

1
C2710 C2711 0R3J-6-GP

X01 Layout Note:

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
2

2
Place close to Pin 26

1
C2703 +3V_AVDD

AUD_VREF

LDO1_CAP
+5V_AVDD

CPVEE
SC1U10V2KX-L1-GP

CBN
AUD_AGND

2
3D3V_S0 +3V_AVDD
AUD_AGND

36

35

34

33

32

31

30

29

28

27

26

25
1 2 HDA27
R2713 0R2J-2-GP

CPVEE

HPOUT-L/PORT-I-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HPOUT-R/PORT-I-R

LINE1-VREFO-R

VREF
25mA for CPVDD & DVDD 1 2
C C
1

R2706
C2701 CBP 37 24 0R3J-6-GP
SC4D7U6D3V3KX-GP CBP LINE2_L/PORT-E-L
2

Close pin36 AUD_AGND 38

AVSS2 LINE2_R/PORT-E-R
23

1 2 LDO2_CAP 39 22
AUD_AGND LDO2-CAP LINE1_L/PORT-C-L LINE1_L (29) 3D3V_S5
C2712 SC10U6D3V3MX-L-GP
+3V_1D5V_AVDD 40 21 AUD_AGND Layout Note:
AVDD2 LINE1_R/PORT-C-R LINE1_R (29)
Tied at point only under
5V_S0 41 20 CPVREF 1 2
5V_S0 PVDD1 NC#20 R2711 0R2J-2-GP
Codec or near the Codec
1.5A (29) AUD_SPK_L+
AUD_SPK_L+ 42
SPK-OUT-L+ MIC-CAP
19 MIC_CAP 1 2 AUD_AGND
X01
71.03234.003 C2713 SC10U6D3V3MX-L-GP
AUD_SPK_L- 43 18
(29) AUD_SPK_L- SPK-OUT-L- MIC2_R/PORT-F-R/SLEEVE SLEEVE (29) Layout Note:
C2706 C2707 C2708 C2709 AUD_SPK_R- 44 17 Width>40mil, to improve
(29) AUD_SPK_R- SPK-OUT-R- MIC2_L/PORT-F-L/RING RING2 (29)
1

1
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Headpohone Crosstalk noise

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

AUD_SPK_R+ 45 16
(29) AUD_SPK_R+ SPK-OUT-R+ MONO-OUT
2

46 15 JDREF R2707 1 DY 2 20KR2F-L-GP

5V_S0 PVDD2 SPDIFO/FRONT_JD/JD3/GPIO3 AUD_AGND

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK
1 2 EAPD# 47 14 3D3V_S0
(24) AMP_MUTE# R2708 0R2J-2-GP PDB MIC2/LINE2_JD/JD2

SDATA-OUT
COMBO-GPI 48 13 AUD_SENSE_A 1 2 AUD_SENSE
SPDIF-OUT/GPIO2 HP/LINE1_JD/JD1 AUD_SENSE (29)

LDO3-CAP

SDATA-IN

DVDD-IO

PCBEEP
RESET#
49 R2709
GND

1
DVDD

SYNC
DVSS

BCLK
200KR2J-L1-GP
Layout Note: Layout Note: remove D2702 R2710 R2711 Add R2708_0R(PDB pin) R2702
Close pin41 Close pin46 100KR2J-1-GP
1 ALC3234-CG-GP
Layout Note: X01

10

11

12
TP2702

2
TPAD14-OP-GP 3D3V_S0 Place close to Pin 13
AUD_PC_BEEP

LDO3_CAP
DVDD_1D5V
AUD_SENSE_A

C2718
X01

1
C2716 C2717

C2719
3D3V_S0 1D5V_S0 +3V_1D5V_AVDD

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP

1
2

2
R2705 1 2 0R2J-2-GP
B B

2
1

R2710 1 DY 2 0R2J-2-GP

SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
C2715
Add R2710 DY(3D3V_S0) SC4D7U6D3V3KX-GP
2

Close pin40
AUD_AGND 1 2 DMIC_DATA_R
(52) DMIC_DATA R2714 0R2J-2-GP
1 2 DMIC_CLK_R
(52) DMIC_CLK R2716 0R2J-2-GP
2

(19) HDA_CODEC_SDOUT
C2723
SC22P50V2JN-4GP
DY (19) HDA_CODEC_BITCLK
1

1 2 HDA_CODEC_SDIN0
(19) HDA_SDIN0 R2718 0R2J-2-GP
Close pin3 HDA_CODEC_SYNC
(19) HDA_CODEC_SYNC

Azalia I/F EMI (19,29) HDA_CODEC_RST#

HDA_CODEC_RST#

D2701
RN2701 HDA_SPKR_R 1
HDA_CODEC_SDOUT (16) HDA_SPKR 2 3
1 4 3 AUD_PC_BEEP_C 1 2 AUD_PC_BEEP
(24) KBC_BEEP
HDA_CODEC_BITCLK C2720 SCD1U10V2KX-5GP
SRN0J-6-GP KBC_BEEP_R 2
EC2708 EC2709
1

1
BAT54C-7-F-3-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

75.00054.E7D R2717
DY DY 1KR2J-1-GP
2

2nd = 075.00054.0C7D
ALC3223 ALC3234

2
3rd = 75.00054.A7D

R2702 DY 100K
A R2704 DY 100K A

R2707 20K DY Wistron Confidential document, Anyone can not Duplicate, Modify,
Forward or any other purpose application without get Wistron
permission
R2709 39.2K 200K Redwood SMB TouchPad

R2711 DY DY Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec_ALC3225
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 27 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 28 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = AUDIO

Speaker
SPK1
5
R2904 1 2 0R3J-6-GP AUD_SPK_R+_C 1
(27) AUD_SPK_R+
D D
R2903 1 2 0R3J-6-GP AUD_SPK_R-_C 2
(27) AUD_SPK_R- R2902 1
(27) AUD_SPK_L+ 2 0R3J-6-GP AUD_SPK_L+_C 3
R2901 1 2 0R3J-6-GP AUD_SPK_L-_C 4 CONN Pin Net name
(27) AUD_SPK_L-
6
Pin1 SPK_R+
ACES-CON4-29-GP
20.F1639.004 Pin2 SPK_R-
2nd = 20.F1804.004 Pin3 SPK_L+

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP
1

1
Pin4 SPK_L_

EC2901

EC2902

EC2903

EC2904
DY DY DY DY

2
AUD_SPK_L-_C 1 AFTP2901
AUD_SPK_L+_C 1 AFTP2902
AUD_SPK_R-_C 1 AFTP2903
AUD_SPK_R+_C 1 AFTP2904

C Combo Jack C

JACK_POW ER

RN2901
(27) MIC2_VREFO 2 3

2
1 4
R2917
SRN2K2J-3-GP HPMIC1 10KR2J-3-GP AUD_PORTA_L_R_B 1 AFTP2906
(27) RING2 R2906 1 2 0R3J-6-GP RING2_R 3 Non-Delay AUD_PORTA_R_R_B 1 AFTP2907
R2908 1 2 10R2F-L-GP AUD_HP1_JACK_L1 R2907 1 2 0R3J-6-GP AUD_PORTA_L_R_B 1 AUD_AGND 1 AFTP2908

1
(27) AUD_HP1_JACK_L C2907 1
(27) LINE1_L 2 LINE1-L_C
R2922 1 2 1KR2J-1-GP AUD_SENSE 1 AFTP2909
SC4D7U6D3V3KX-GP R2912 1 2 2K2R2J-2-GP 3D3V_S0 R2916 1 Delay 210KR2J-3-GP JACK_POW ER 5
(27) LINE1_VREFO_L JACK_PLUG 6
R2910 1 2 10R2F-L-GP AUD_HP1_JACK_R1 R2909 1 2 0R3J-6-GP AUD_PORTA_R_R_B 2
(27) AUD_HP1_JACK_R C2908 1
(27) LINE1_R 2 LINE1-L_R
R2921 1 2 1KR2J-1-GP R2911 1 2 0R3J-6-GP SLEEVE_R 4 AUD_AGND
SC4D7U6D3V3KX-GP R2913 1 2 2K2R2J-2-GP MS
(27) LINE1_VREFO_R
SC100P50V2JN-3GP
EC2908

SC100P50V2JN-3GP
EC2907

SC100P50V2JN-3GP
EC2906

SC100P50V2JN-3GP
EC2905
Audio(IP/NK comb)
1

1
10KR2J-3-GP
R2920

10KR2J-3-GP
R2919

(27) SLEEVE AUDIO-JK443-GP

1

1
022.10002.0141 Delay circuit
DY DY DY DY
2

2
2

AUD_AGND

JACK_PLUG

B B

2
R2905 Delay C2902 Delay

SC10U6D3V3MX-L-GP
AUD_AGND AUD_AGND 100KR2J-1-GP AUD_AGND
Delay

G
1

S
Q2901

2
2N7002K-2-GP
84.2N702.J31
AUD_AGND AUD_AGND 2nd = 84.2N702.W31
AUD_PORTA_R_R_B
AUD_PORTA_L_R_B 3rd = 84.07002.I31
RING2_R

D
AUD_SENSE
SLEEVE_R
5V_PW R_2 3D3V_S0
1

1 DY 2 AUD_SENSE (27)
1

1
ED2901
AZ2025-01H-R7G-GP

ED2902
AZ2025-01H-R7G-GP

ED2903
AZ2025-01H-R7G-GP

ED2904
AZ2025-01H-R7G-GP

ED2905
AZ2025-01H-R7G-GP

R2915 R2918
470KR2J-2-GP 100KR2J-1-GPDY R2914
DY 0R3J-6-GP
DY DY DY DY DY
2

U2901
S D R2923 Wistron Confidential document, Anyone can not Duplicate, Modify,
AUD_AGND 4 3 SLEEVE (27) 0R3J-6-GP Forward or any other purpose application without get Wistron
G G
2

SLEEVE_CTRL HDA_CODEC_RST#_CTRL permission

A 5 DY 2 1 DY 2 HDA_CODEC_RST# (19,27) Redwood SMB TouchPad A
D S
6 1
1

C2901
2N7002KDW -GP DY SC1U6D3V2KX-L-1-GP Wistron Corporation
84.2N702.A3F 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2

Taipei Hsien 221, Taiwan, R.O.C.

2nd = 84.DM601.03F
3rd = 84.2N702.E3F Title
4th = 84.2N702.F3F
Audio Jack
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 29 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 30 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = LAN

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 31 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 32 of 102
5 4 3 2 1
 5 4 3 2 1

D D
+5V_USB_PW R_2

5V_S5 +5V_USB_PW R_2

U3302

5 IN OUT 1

1
GND 2

1
(24,63) USB_PW R_EN# 4 3 R3303 C3302 C3303 C3305 C3306
EN# OC# USB_OC#1 (16,34)

1
C3304 DY DY TC3301

SC1U10V2KX-L1-GP
100KR2J-1-GP

SCD1U16V2KX-3GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
ST100U6D3VAM-3-GP

2
SCD1U16V2KX-3GP
2 SY6288DAAC-GP

2
074.06288.009B 80.10715.B1L
2nd = 77.C1071.22L

C C
USB Power SW
+5V_USB_PW R_2
Vendor Vendor P/N Wistron P/N Priority Rate current

1
SILERGY SY6288DAAC 074.06288.009B 1ST 2A Low Active EC3301
SCD1U25V2KX-GP DY

2
GMT G524B2T11U 074.00524.0C9F 2ND 2.5A Low Active

EC3301 close to U3301

+5V_USB_PW R_2
1 2
B R3301 0R3J-6-GP B
USB2
5 7 EU3301
AFTP3302 1 1 +5V_USB_PW R_2
TR3301 USB_PN3_C 1 6 USB_PP3_C
USB_PN3_C I/O1 I/O4
(16) USB_PN1 1 2 2
DY USB_PP3_C 3 2 DYVDD 5
GND
(16) USB_PP1 4 3 4
AFTP3301 1 6 8 3 4
FILTER-4P-62-GP I/O2 I/O3
69.10080.021
2nd = 69.10103.061 SKT-USB-422-GP-U
AZC099-04S-1-GP
1 2 22.10254.721 75.09904.07C
R3302 0R3J-6-GP 2nd = 22.10321.N71
2nd = 75.02304.07C

A USB_PN3_C 1 AFTP3303 <Core Design> A

USB_PP3_C 1 AFTP3304

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB 2.0 Port

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 33 of 102
5 4 3 2 1
 5 4 3 2 1

USB Charger
5V_USB30
5V_S5 USB_OC#1 (16,33)

C3402 C3403 C3407

SCD1U10V2KX-5GP

SC1U6D3V2KX-L-1-GP

SC22U6D3V5MX-2GP
D D

1
C3401 C3404

SCD1U10V2KX-5GP
DY SC100U6D3V6MX-GP If MLCC is used as Main Source.

2
USB_PP0_R 1 2 USB20_DP0_C

2
Inform Layout team to remark Pin 1 as positive.
78.10710.52L R3401

13

12
In case MLCC shortage and other type of Cap With Polarity Is Used.

9
U3401 0R3J-6-GP

NC#9
FAULT#
IN

OUT
TR3401
4 3
(24) USB_CHG_EN 5 3 USB_PP0 (16)
EN DP_OUT
DM_OUT 2 USB_PN0 (16)
Device Control Pins 1 DY 2
5V_S5 R3403 1 2 0R2J-2-GP ILIM_SEL 4
R3404 1 ILIM_SEL
DY 2 20KR2F-L-GP ILIM_LO 15 10 USB_PP0_R
R3405 1 2 22K1R2F-L-GP ILIM_HI 16 ILIM_LO DP_IN
11 USB_PN0_R CTL1 FILTER-4P-62-GP
ILIM_HI DM_IN CTL2 CTL3 ILIM_SEL 69.10080.021
(EC control)

CTL1
CTL2
CTL3
2nd = 69.10103.061

GND
GND
USB_PN0_R 1 2 USB20_DN0_C
TPS2544RTER-GP
CDP 1 1 1 1

6
7
8

14
17
R3402
74.02544.073 0R3J-6-GP

(24) USBCHARGER_CB0 R3406 1 2 0R2J-2-GP CTL1 DCP Auto

5V_S5 R3407 1 2 0R2J-2-GP CTL2 0 1 1 X
R3408 1 2 0R2J-2-GP CTL3

C C

EU3401
USB30_RXDN0_C 1 10 USB30_RXDN0_C

USB30_RXDP0_C 2 9 USB30_RXDP0_C

USB30_TXDN0_C 4 DY 8
R3409 R3410
1 2 USB30_TXDN0_R 1 2 USB30_TXDN0_C (16) USB3_PRX_CTX_N0 1 2 USB30_RXDN0_C USB30_TXDP0_C 5 7 USB30_TXDN0_C
(16) USB3_PTX_CRX_N0
C3406 0R2J-2-GP 0R2J-2-GP 3 6 USB30_TXDP0_C
SCD1U10V2KX-5GP
DF10G7M1N-GP
1

4
75.00107.073
68.02002.021 68.02002.021 5V_USB30
DY DY EU3402
FILTER-4P-70-GP FILTER-4P-70-GP
TR3404 TR3405 USB20_DN0_C 1 6 USB20_DP0_C
I/O1 I/O4
2

3
2 GND DYVDD 5

3 I/O2 I/O3 4
R3412 R3411
1 2 USB30_TXDP0_R 1 2 USB30_TXDP0_C (16) USB3_PRX_CTX_P0 1 2 USB30_RXDP0_C
B (16) USB3_PTX_CRX_P0 B
C3405 0R2J-2-GP 0R2J-2-GP AZC099-04S-1-GP
SCD1U10V2KX-5GP 75.09904.07C
2nd = 75.02304.07C

Reserved for RF
5V_USB30
USB 3.0 Connector
USB1 Pin definition USB30_RXDN0_C

1 11 USB30_RXDP0_C 5V_USB30 1 AFTP3401

VBUS CHASSIS#11 USB20_DN0_C AFTP3402
CHASSIS#12 12 1 POWER 1
USB20_DN0_C 2 13 USB30_TXDN0_C USB20_DP0_C 1 AFTP3403
USB20_DP0_C D- CHASSIS#13
3 D+ CHASSIS#14 14 2 USB 2.0 D-
USB30_TXDP0_C
3 USB 2.0 D+
USB30_RXDN0_C 5 D1
SSRX- DET# USBDET_CON# (24)

1
USB30_RXDP0_C 6 4 GND C3408 C3409 C3410 C3411
SSRX+
GND 4 DY DY DY DY

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC1P50V2CN-1GP
USB30_TXDN0_C 8 5 StdA_SSRX- SuperSpeed RX

2
USB30_TXDP0_C SSTX- AFTP3404
9 SSTX+ GND_DRAIN 7 1
A USB3.0 6 StdA_SSRX+ <Core Design> A

SKT-USB14-5-GP 7 GND
022.10005.0441 Wistron Corporation
8 StdA_SSTX- SuperSpeed TX 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
9 StdA_SSTX+ Taipei Hsien 221, Taiwan, R.O.C.

Title

USB power share / 3.0 Port

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 34 of 102
5 4 3 2 1
 5 4 3 2 1

R3501
0R3J-6-GP

(16) USB_PP3 1 2 USB_DP3_R

3
D D
TR3501
FILTER-130-GP
3D3V_HUB1 1D8V_HUB1 3D3V_HUB1 69.10118.001
DY

1
R3510

4
1

1
C3503 C3504 C3505 C3506 C3509 C3513 C3515 0R2J-2-GP
USB_DN3_R
SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP

SCD1U10V2KX-L1-GP
(16) USB_PN3 1 2
2

2
R3502
0R3J-6-GP
BUS_PW REDN

R3503
'1' = Self Powered 0R3J-6-GP
'0' = Bus Powered
(63) USB_HUB1_HUB2_PP4 1 2 USB_HUB1_HUB2_PP4_C

Near the chip side.

3
TR3502
FILTER-130-GP
C 69.10118.001 C
DY
3D3V_HUB1

4
1

C3518 (63) USB_HUB1_HUB2_NP4 1 2 USB_HUB1_HUB2_NP4_C

SC4D7U6D3V2MX-GP-U
U3501 R3504
2

0R3J-6-GP
3D3V_HUB1 22 27
VDDH DP1_DM
DP1_DP 28
1D8V_HUB1 18 6 USB_HUB_PN2
VDD DP2_DM USB_HUB_PN2 (67)
1D8V_HUB1 20 7 USB_HUB_PP2
VDD DP2_DP USB_HUB_PN3
USB_HUB_PP2 (67) Sensor Hub
DP3_DM 9 USB_HUB_PN3 (52)
3 10 USB_HUB_PP3
PVDD DP3_DP USB_HUB1_HUB2_NP4_C
USB_HUB_PP3 (52) TOUCH PANEL
DP4_DM 11
1 12 USB_HUB1_HUB2_PP4_C 5V_S5
AVDD DP4_DP Hub2
8 AVDD
1D8V_HUB1 13 24 USB_DN3_R
3D3V_HUB1 AVDD UP_DM USB_DP3_R
26 AVDD UP_DP 25 From CPU

1
AVDD5V 15 2 UP_RREF 1 2 R3515
AVDD5V UP_RREF 47KR2J-2-GP
14 17 BUS_PW REDN R3508
3D3V_HUB1 V18 BUS_PWREDN 680R2F-GP
16

2
V33
1

SUSPEND 19
B
C3507 XSCO 4 CHIP_RESETN_R 1 2 ChipResetN B
SC1U6D3V2KX-L-1-GP XSCI XSCO
5
2

XSCI R3516
AVSS 23
10KR2J-3-GP

1
ChipResetN 21 29
CHIPRESET# GND

1
C3512 R3517
SC1U10V2KX-L1-GP 470KR2J-L1-GP
AU6259B61-JGF-GR-GP

2
071.06259.0003

2
C3510
SC18P50V2JN-1-GP 1 DY 2
(18,24,63,65) PLT_RST# R3511 0R2J-2-GP
1 2 XSCO 5V_S5 AVDD5V
USB Table
2 1 Pair Device
1

R3518 1 N/A
1

R3505 X3501 1R3J-L1-GP C3519

1MR2J-L3-GP XTAL-12MHZ-15GP-U 2
SC2D2U6D3V2MX-GP Sensor Hub
82.30006.221
2

3 TOUCH PANEL
2

Wistron Confidential document, Anyone can not

1

4 Duplicate, Modify, Forward or any other purpose

USB Hub2 application without get Wistron permission
A <Core Design> A
1 2 XSCI

C3511
SC18P50V2JN-1-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB HUB
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 35 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Reset.Suspend
Discharge circuit
1D5V_S0
Q3610
3D3V_S5
220R3F-1-GP 1 R3605 2 1D5V_DIS_Q 3 4
D D
2 5
(18,24,37,46,49) PM_SLP_S3#

ROSA Run Power Power Good 1 6

2N7002KDW-GP
1D5V_DIS 1 R3616 2
10KR2F-2-GP

3D3V_S5 84.2N702.A3F
2nd = 75.00601.07C
3rd = 84.2N702.F3F

1
R3601
1KR2J-1-GP

2
3D3V_S5 5V_S5
(37,51) 1D05V_S0_PG 1 2 ALL_SYS_PWRGD (24)
R3611 0R2J-2-GP

1D05V_S0
Q3611
3D3V_S5
1

C3633 C3606 C3632 C3607 220R3F-1-GP 1 R3606 2 1D05V_DIS_Q 3 4

DY DY
2 5
2

(18,24,37,46,49) PM_SLP_S3#
SC22U6D3V3MX-1-GP

SC22U6D3V3MX-1-GP
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

1 6 1D05V_DIS 1 R3617 2
10KR2F-2-GP
2N7002KDW-GP
D3602 84.2N702.A3F
BAS16-6-GP
2nd = 75.00601.07C
2
3rd = 84.2N702.F3F
3 PURE_HW_SHUTDOWN# (24,26)
5V_S5 5V_S5
(45) 3V_5V_EN 1

U3601 5V_S0 5V_S0 83.00016.K11

2ND = 83.00016.F11

1
1 2 S5_ENABLE (24)
1D8V_S0 15 5V_S0 Comsumption R3602
GND R3603 3D3V_S0
1
VIN1#1 VOUT1#14
14
Peak current 6A DY 2KR2F-3-GP

C3603
SC10U6D3V5KX-1GP
2 13 200KR2F-L-GP R3607
VIN1#2 VOUT1#13 Q3614

1
1 2 VTT_PWR 3 12 3V5V_CT1 220R3F-1-GP 3D3V_S5

2
R3612 10KR2J-3-GP ON1 CT1 3D3V_S0 3D3V_DIS_Q
1 DY
4
5
VBIAS GND 11
10 3V5V_CT2 3D3V_S0 2 3 4

2
C ON2 CT2 R3618 C
3D3V_S5 6
VIN2#6 VOUT2#9
9
(18,24,37,46,49) PM_SLP_S3#
2 DY 5

C3605
SC10U6D3V5KX-1GP
7 VIN2#7 VOUT2#8 8 3D3V_S0 Comsumption 10KR2F-2-GP

1
C3601
SC470P50V2KX-3GP

C3602
SC470P50V2KX-3GP
1 6 3D3V_DIS 1 DY 2
Peak current 2.5A
1

DY C3604 TPS22966DPUR-GP 1

2
SC22P50V2GN-GP 2N7002KDW-GP
74.22966.093
2

84.2N702.A3F
2nd = 75.00601.07C
3rd = 84.2N702.F3F

Power Sequence

B B

DDR3_VCCA_PWRGD DDR3_DRAM_PWROK
1D35V_S3
1D35V_S3
1

1
R3621
3D3V_S5 10KR2J-3-GP R3623 1 2 1D35V_S3_PWRGD (49)
Does not link to SOC!! 10KR2J-3-GP
R3614
2

0R2J-2-GP
Delay 110ms with ALL_SYS_PWRGO

2
1

DDR3_VCCA_PWRGD (5)
R3622
DDR3_DRAM_PWROK (5)
DY 10KR2J-3-GP
Q3612

From EC 3D3V_S5
2

3 4

1
20130507 3D3V_S5
1 2 DDR3_VCCA_PWRGD_3P3 2 5 R3619
(24,26) SYS_PWROK
KBC GPIO77
1

0R2J-2-GP
1

R3627 1 6 R3620
0R2J-2-GP R3604 10KR2J-3-GP
Q3613

1
delay ??? total 1MR2J-L3-GP
DMN601DWK-7-1-GP R3624
2

DDR3_DRAM_PWROK_D 10KR2J-3-GP
75.00601.07C 3 4
2

need KBC to modify!!! (18,24,49) PM_SLP_S4# 2 5 PM_SLP_S4#_D

2
DDR3_VCCA_PWRGD_G
1 6

1 2 COREPWROK (18,65)
DMN601DWK-7-1-GP
R3626 75.00601.07C
0R2J-2-GP

COREPWROK
A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable & SEQUENCE

Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 36 of 102
5 4 3 2 1
 5 4 3 2 1

D D

1D35V_S0
1D8V_S0

(36,51) 1D05V_S0_PG 1D05V_S0_PG 1 2 1D35V_S0_EN

R3703 0R2J-2-GP

1
DY C3716
SC22P50V2GN-GP

2
1D0V_S5

1D8V_S5

1
C3701 C3702 C3707 C3708
DY DY
SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

2
1D0V_S0
1D8V_S0
5V_S5 1D0V_S0
U3701
1D5V_S0 U3702
15
GND
C 1 14 9 C
VIN1#1 VOUT1#14 GND
2 13 1 8
1D8V_S0_EN VIN1#2 VOUT1#13 VTT_CT_1D8VC VIN#1 VOUT#8
2 1 3 12 2 7
R3701 ON1 CT1 IMVP_PWRGD VIN#2 VOUT#7 VTT_CT_1D0VC
5V_S5 4 11 (46,51) IMVP_PWRGD 3 6
10KR2J-3-GP 1D35V_S0_EN VBIAS GND VTT_CT_1D35VC ON CT
5 10 4 5
ON2 CT2 VBIAS GND
6 9
1

1
VIN2#6 VOUT2#9 C3703 C3704 C3710
7 8
C3715 VIN2#7 VOUT2#8 TPS22965DSGR-GP
DY 1D35V_S0 DY DY DY

SC330P50V2KX-3GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP
SC22P50V2GN-GP 74.22965.093
2

2
1D35V_S3 TPS22966DPUR-GP
74.22966.093 Hi:1.05V
Hi:1.05V Lo:0.6V
Lo:0.6V
1

C3705 C3706
DY
SC22U6D3V5MX-L3-GP
SC1U10V2KX-L1-GP

3D3V_S5
3D3V_S5
1D35V_S0
R3702
Q3703

1
220R3F-1-GP 3D3V_S5
1 DY 2 1D35V_DIS_Q 3 4 R3704

1
B B
R3708
DY 47KR2J-L2-GP R3705
(18,24,36,46,49) PM_SLP_S3#
2 DY 5
1D0V_S0
10KR2F-2-GP Q3701 DY 1KR2J-1-GP

2
1 6 1D35V_DIS 1 DY 2 2N7002K-2-GP
1D0V_PWROK# G

2
C
2N7002KDW-GP 1D0V_S0_PG
84.2N702.A3F 1D0V_PWROK 84.02222.V11 DY D
1D0V_S0_PG (51)
1 DY 2 B DY MMBT2222A-3-GP
2nd = 75.00601.07C S
R3706 Q3702

E
3rd = 84.2N702.F3F 1KR2J-1-GP 84.2N702.J31

1
2ND = 84.2N702.031
DY C3712
SC22P50V2GN-GP

2
1D8V_S0 X01
R3707
Q3704
220R3F-1-GP 3D3V_S5
1 DY 2 1D8V_DIS_Q 3 4

2 DY 5 R3709
(18,24,36,46,49) PM_SLP_S3# 10KR2F-2-GP
1 6 1D8V_DIS 1 DY 2

2N7002KDW-GP
84.2N702.A3F
2nd = 75.00601.07C
3rd = 84.2N702.F3F

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ADAPTER OCP / S3 reduction

Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 37 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 38 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number

Reserved Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 39 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 40 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 41 of 102
5 4 3 2 1
 5 4 3 2 1

5V_S5
SSID = PWR.Support
84.T3904.H11

2
PQ4202

1
PR4202 LMBT3904LT1G-GP 3D3V_S5
15KR2F-GP PR4203

E
10KR2J-3-GP

1
D PQ3802_1 B 3D3V_S5 D

1
2
2
PD4203

1
PR4211 PSID_DISABLE#_R_C DA3X101F0L-1-GP
100KR2J-1-GP PR4206
2K2R2J-2-GP

G
1

3
PQ4201
Layout Note:

2
FDV301N-NL-GP
PSID Layout width > 25mil PR4207
PS_ID_R D S PS_ID 1 2

D
PSID_EC (24)

84.00301.A31 33R2J-2-GP
2nd = 84.3K329.031
JGND 3rd = 84.27002.I31

EC4203 1 DY2SCD1U25V5KX-1GP

EL42051 2 0R5J-5-GP

DCIN1 EL42041 2 0R5J-5-GP

7

1 1 AFTP4203

C 2 C
3 +DC_IN AD+
4 PU4201
5 +DC_IN_C 1 EL4201 2 1 S D 8
0R5J-5-GP S D

PC4205

PC4203

PC4204

PC4206
6 2 7

SC1U25V5KX-1GP

SC10U25V5KX-GP
SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP
1
S D

PC4201

240KR3-GP
3 6

K
1

1
8 1 EL4203 2 PR4216 G D

PR4209
4 5
EC4201 DY EC4202 0R5J-5-GP PD4201 PC4202 DY DY
DY
SC1KP50V2KX-L-1-GP

3K3R6J-GP 1SMB22AT3G-GP-U1 SCD1U25V3KX-GP SI7121DN-T1-GE3-GP

2

2
SC10U25V5KX-GP

ACES-CON6-20-GP-U 83.22R03.03G

2
20.F1639.006 2nd = 83.P6SBM.DAG

A
X01 0601
2nd = 20.F1804.006 PQ4209_D
1

JGND JGND PQ4205

1
R2
PR4214 PQ4204 E
100KR2J-1-GP D C AD_OFF_L B R1
PR4210
PQ4209 B R1 C AD_OFF_R 47KR3J-L-GP
2N7002K-2-GP E

PWR_CHG_AD_OFF_R
2

R2 PDTA124EU-1-GP
3rd = 84.07002.I31

2
PDTC124EU-1-GP 84.00124.K1K
2nd = 84.2N702.W31 84.00124.H1K 2nd = 84.05124.A11
2nd = 84.05124.011
84.2N702.J31
G
S

AC_IN#_G

(24) PW R_CHG_AD_OFF 1 2
B PR4212 B
1KR2J-1-GP
G

PQ4210
2N7002K-2-GP

84.2N702.J31
1

2nd = 84.2N702.W31 PR4215

3rd = 84.07002.I31 100KR2J-1-GP
D

(24) AC_IN_KBC# AC_IN_KBC#

2

AFTP4201 1 +DC_IN
AFTP4202 1 PS_ID_R

A Redwood SMB TouchPad A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCIN JACK
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 42 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Support
BT+

K
1

1
D D
EC4304 DY
SCD1U25V3KX-GP
DY EC4303
SC2200P50V2KX-2GP DY PD4302 Batt Connecter PBAT_PRES1#
PBAT_SMBDAT1
1
1
AFTP4301
AFTP4302

2
SMF18AT1G-GP PBAT_SMBCLK1 1 AFTP4303
BT+ 1 AFTP4304

A
BATT1
9
1
RN4301
4 5 2
3 6 PBAT_SMBCLK1 3
(24,44) BAT_SCL
2 7 PBAT_SMBDAT1 4
(24,44) BAT_SDA
1 8 PBAT_PRES1# 5 1 DY 2 SYS_PRES1#
(24) BAT_IN#
SYS_PRES1# 6
SRN100J-4-GP 7 R4301
8 0R2J-2-GP
10

ALP-CON8-17-GP-U
C
20.81775.008 C

EC4301 EC4302 EC4305

2nd = 20.82003.008
1

2
SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
DY DY DY 1 AFTP3906
2

1 BATTSW1
5 4
1 SYS_PRES1#

NP1
Placement: Close to Batt Connector 2
NP2
3
7 6

BAT_SCL
SW-SLIDE77-GP
BAT_IN#

BAT_SDA

62.40068.021
B B
2nd = 62.40018.641
3

D4302 D4303 D4301

DY LBAV99LT1G-1-GP DY LBAV99LT1G-1-GP DY LBAV99LT1G-1-GP
1

Wistron Confidential document, Anyone can not

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application without get Wistron permission
3D3V_AUX_KBC
75.00099.O7D 75.00099.O7D 75.00099.O7D <Core Design>

2nd = 83.00099.K11 2nd = 83.00099.K11 2nd = 83.00099.K11

A 3rd = 83.00099.M11 3rd = 83.00099.M11 3rd = 83.00099.M11
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
X01 Title

BATT CONN
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 43 of 102
5 4 3 2 1
 5 4 3 2 1

AD+ +SDC_IN CHARGER_SRC

PU4405
D 8 D S 1 PR4426 1 2 D
7 D S 2 D01R3721F-GP-U
6 D S 3
5 D G 4

1
PG4406 PG4402
SI7121DN-T1-GE3-GP GAP-CLOSE-PWR-3-GP

PR4435
100KR2J-1-GP
84.06675.030
2nd = 84.07121.037 GAP-CLOSE-PWR-3-GP

2
2
1
PR4418 AD+_G_2
3KR5J-GP PR4421 2 1 0R2J-2-GP
DY

2
PC4428

10KR2F-2-GP
2
DC_IN_D
2 1

PR4423

PWR_CHG_ACP
SCD1U25V2KX-GP
PQ4407

1
AD+_G_1

SCD1U25V2KX-GP
3 4

SCD1U25V2KX-GP
PWR_CHG_ACN
PC4418

2
ACAV_IN 2 5

PC4416
AD+

1
1 6

1
1 2 PWR_CHG_VCC
PR4403 10R5J-GP 2N7002KDW-GP
PC4410 84.2N702.A3F BQ24717_AGND

1
SC1U25V3KX-1-GP 2nd = 84.DM601.03F BQ24717_AGND
3rd = 84.2N702.E3F
4th = 84.2N702.F3F

2
CHARGER_SRC
AD+
BQ24717_AGND

VacDET=2.4V
Acok setting=2.4*((PR4444+PR4411)/PR4411)

PC4425
SC10U25V5KX-GP

PC4411
SC10U25V5KX-GP

PC4427
SC10U25V5KX-GP

PC4407
SC10U25V5KX-GP

PC4413
SCD1U25V2KX-GP
1

1
Setting=17.055v
PR4444
287KR2F-GP PU4406

2
FDMS3600-02-RJK0215-COLAY-GP
2
2

3
BATDRV 1 4
10 DCBATOUT
PC4432 PWR_CHG_REGN 9
SCD01U50V2KX-1GP

1
C SC1U25V3KX-1-GP 7 C
1

PC4403
SC10U25V5KX-GP

PC4430
SC10U25V5KX-GP

PC4433
SC10U25V5KX-GP

PC4434
SC10U25V5KX-GP

PC4435
SC10U25V5KX-GP

PC4436
SC10U25V5KX-GP
PR4411

PWR_CHG_ACP
PWR_CHG_ACN
8 6

1
47KR2F-GP PC4422 1 2 5

2
DY DY DY
2

PR4409
4K02R2F-GP
SC1U25V3KX-1-GP
PC4402

2
1
+VCHGR
1st = 084.06970.0037
2

BQ24717_AGND PD4402
PL4401 1

A
COIL-2D2UH-11-GP
+SDC_IN PD4401
BQ24717_AGND BQ24717_AGND 1 2 1 2 3

SC1U25V3KX-1-GP
PU4404 RB751V-40-3-GP 68.2R210.20C

PC4431
SC10U25V5KX-GP

PC4437
SC10U25V5KX-GP
PWR_CHG_REGN PR4443 2
1

1
BT+

PR4427

2D2R5F-2-GP
1 20 83.R2004.C8F D01R2512F-4-GP

K
ACN VCC

1
3D3V_AUX_KBC

PC4420
PR4439 DY DY V8P10-5300M3-86A-GP
4K02R2F-GP 11 PWR_CHG_BATDRV 2nd = 83.R0304.D8F

2
BATDRV#
1

2
2 DY PG4407 PG4403
PR4408 ACP PWR_CHG_REGN PU4403
16
2

100KR2F-L1-GP PWR_CHG_CMSRC REGN PR4425 PC4421

3 1 S D 8

2
CMSRC
1

17 PWR_CHG_BTST 1 2PWR_CHG_BTST1 1 2 GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 2 S D 7

1
BTST
PR4432 PR4414 4 0R3J-6-GP DCBATOUT_SNUB 3 S D 6
2

3K3R2J-3-GP ACDRV PWR_CHG_HIDRV BATDRV

3K3R2J-3-GP 18 SCD047U25V3KX-3-GP 4 G D 5

SC330P50V3KX-GP
HIDRV

1
PWR_CHG_ACDET 6
ACDET DY

1
SI7121DN-T1-GE3-GP PC4424

PC4406
2

CHARGER_CELL_PIN 10 DY 84.06675.030

2
CELL

SCD01U25V2KX-3GP
19 PWR_CHG_PHASE 2nd = 84.07121.037

2
PHASE PC4429
15 PWR_CHG_LODRV 1 2
PG4401 2 LODRV
(24,43) BAT_SDA 1 GAP-CLOSE-PWR-3-GP PWR_SDA 8
SDA

1
14 PC4401 SCD1U25V2KX-GP PC4412
PG4408 2 GND
(24,43) BAT_SCL 1 GAP-CLOSE-PWR-3-GP PWR_SCL 9 SCD1U25V2KX-GP SCD1U25V2KX-GP
SCL PWR_CHG_SRP PR4438 1 PWR_CHG_SRP_R
ACAV_IN 13 2 0R2J-2-GP

2
ACAV_IN PR4430 2 SRP
H=ACIN 1 0R2J-2-GP PWR_CHG_ACOK 5 ACOK
12 PWR_CHG_SRN PR4417 1 2 0R2J-2-GP PWR_CHG_SRN_R
L=UNAC SRN
PR4413 2 1BQ24715_IOUT_1 7 BQ24717_AGND BQ24717_AGND
GND

(24) AD_IA 0R2J-2-GP IOUT

BQ24715RGRR-1-GP
21

PR4406 1 2 0R2J-2-GP
SC100P50V2JN-3GP
PC4423
1

BQ24717_AGND
BQ24717_AGND
3D3V_AUX_S5
PWR_CHG_REGN
2
100KR2F-L1-GP

3D3V_AUX_S5
1

102KR2F-GP
PR4412

PR4428
PR4410 5V_S5

1
100KR2F-L1-GP PR4457

1
B B
0R2J-2-GP
PQ4412 PR4422 1 DY 2
2

1
G PWR_CHG_ACOK 1M8R2J-L-GP PQ4413 H_PROCHOT# (19,24,46)
PR4437 2N7002KDW-GP

2
1

PR4402 100KR2J-1-GP PQ4413_3

PWR_CHG_CMPIN
D

2
(24) AC_IN# PR4404 1 2 4 3
S 120KR2J-GP PWR_CHG_CMPOUT PR4436

2
113KR2F-1-GP PWR_CHG_CMPOUT 1 2 PQ4413_5 5 2
5V_S5 AD_IA_HW (24)
2

SCD01U16V2KX-3GP
2N7002K-2-GP PWR_CHG_CMPIN
20KR2F-L-GP 2 1 PQ4413_D2 6 1

PC4419

2
BQ24715_IOUT_1

1
PC4405 PR4420
174KR2F-GP

PC4426
SCD01U16V2KX-3GP

1
SC100P50V2JN-3GP
84.2N702.A3F

2
2nd = 84.DM601.03F

5
6
7
8
3rd = 84.2N702.E3F

VCC
2IN+

2OUT
2IN-
LM393PWR-GP
PU4402 4th = 84.2N702.F3F

1OUT
GND
1IN+
1IN- 5V_S5
4
3
2
1 DIS_DTM_CELL

1
ADAPTER TYPE AD_IA_HW SETTING
PR4453
DY 10KR2F-2-GP
65W L 1.73V

2
45W H 1.32V

A A

Redwood SMB TouchPad

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CHARGER_BQ24715
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 44 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_5v3p3v

3D3V_AUX_S5

1
PR4501
0R2J-2-GP DY

2
PR4530 PR4504
D PWR_5V_EN1_R PWR_5V_EN1 D
2 1 1 2
DY
0R2J-2-GP

2
0R2J-2-GP
PR4515
0R2J-2-GP

PR4506

1
1 2 PWR_3D3V_EN2
(36) 3V_5V_EN

0R2J-2-GP

DCBATOUT

DCBATOUT

PC4525 PC4528 PC4509

PC4519 PC4531 DCBATOUT
1

1
SCD1U25V3KX-GP

SC4D7U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
1

SCD01U50V2KX-1GP
DY
Design Current=4A DY
2

6A<OCP>6.5A

2
PC4530 PC4529 PC4527

D 8
D 7
D 6
D 5

5
6
7
8

1
SIS412DN-T1-GE3-GP

SIS412DN-T1-GE3-GP

SCD1U25V3KX-GP

SC10U25V5KX-GP

SC4D7U25V5KX-GP
D
D
D
D
PU4104 PU4101 5V_PWR 5V_S5

12
PG4527

2
PU4503 2 1

VIN
PR4528
C PC4535 Design Current=6.7A GAP-CLOSE-PWR C

G
S
S
S
2 1PWR_3D3V_VBST2_11 2 PWR_3D3V_VBST2 SCD1U25V3KX-GP PG4519
S
S
S
G

3D3V_S5 3D3V_PWR 1D5R3-GP PR4524 PC4516 10.6A<OCP>12.5A 2 1

SCD1U25V3KX-GP
1
2
3
4

4
3
2
1
PG4526 9 17 PWR_5V_VBST1 1 2 PWR_5V_VBST1_1 1 2
VBST2 VBST1 GAP-CLOSE-PWR
2 1 1D5R3-GP
3D3V_PWR PWR_3D3V_DRVH2 10 16 PWR_5V_DRVH1 5V_PWR PG4538
GAP-CLOSE-PWR PL4503 DRVH2 DRVH1 PL4101 2 1
PG4517 1 2 PWR_3D3V_LL2 8 18 PWR_5V_LL1 1 2
COIL-4D7UH-33-GP SW2 SW1 IND-2D2UH-46-GP-U GAP-CLOSE-PWR
2 1
1

68.4R71A.20H PWR_3D3V_DRVL2 11 15 PWR_5V_DRVL1 68.2R210.20B PG4537

DRVL2 DRVL1

1
GAP-CLOSE-PWR 2 1

5
6
7
8
PG4528 PR4533 DY PU4102 PR4529
PC4518
D 8
D 7
D 6
D 5

D
D
D
D
SIS412DN-T1-GE3-GP

SIS780DN-T1-GE3-GP
PC4517 2D2R5F-2-GP PWR_5V_VO1 2D2R5F-2-GP GAP-CLOSE-PWR
2 1 14 DY
1

1
PT4102 PU4105 VO1 PT4101
PG4535 PG4532 PG4533
2
1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
GAP-CLOSE-PWR PWR_3D3V_FB2 4 2 PWR_5V_FB1 DY 2 1

2
VFB2 VFB1
ST220U6D3VBM-3-GP

ST220U6D3VBM-3-GP
PG4522 DY
1PWR_3D3V_SNUB
2

2
GAP-CLOSE-PWR

G
2 1 GAP-CLOSE-PWR-3-GP 4 GAP-CLOSE-PWR-3-GP
2

2
S
S
S
PG4523

1PWR_5V_SNUB
GAP-CLOSE-PWR PWR_3D3V_EN2 6 20 PWR_5V_EN1 2 1
S
S
S
G

3
2
1
EN2 EN1
PG4529
1
2
3
4

2 1 GAP-CLOSE-PWR
3V_FEEDBACK

PWR_3D3V_CS2 5 1 PWR_5V_CS1 PG4541

GAP-CLOSE-PWR CS2 CS1
R2 R1 2 1
1

1
PR4517 PWR_5V_VCLK PR4531 GAP-CLOSE-PWR
PC4520
DY 107KR2F-GP VCLK
19 1
100KR2F-L1-GP PC4536
DY PG4540
2

SC330P50V3KX-GP AFTP4501 SC560P50V-GP 2 1

2
7 21
2

2
PGOOD GND GAP-CLOSE-PWR

VREG3

VREG5
PG4545
2 1
1

1
TPS51225RUKR-GP GAP-CLOSE-PWR
R3

13
PR4535 3D3V_S5 5V_PWR_2 PR4525 PG4544

1
PR4512 3D3V_PWR_2
DY0R2J-2-GP DY PR4502 0R2J-2-GP DY 2 1
6K65R2F-GP 200R2J-L1-GP PR4527
1

15KR2F-GP GAP-CLOSE-PWR
2

1 2

1 2
PWR_3D3V_FB2_R PR4534 PWR_5V_FB1_R
PC4523 100KR2J-1-GP

2
1

DYSC18P50V2JN-1-GP 1 PC4524 PC4522 DY

PC4526 SC4D7U6D3V3KX-GP SC18P50V2JN-1-GP
2

2
B SC4D7U6D3V3KX-GP B
2

2
1

1
PR4523 (18,50) 3V_5V_POK PR4526
10KR2F-2-GP 9K76R2F-1-GP

Close to VFB Pin (pin2)

2

2
3D3V_PWR_2 3D3V_AUX_S5
PR4532
2 1
Close to VFB Pin (pin5)
0R2J-2-GP

TPS51225 & TPS51285 Co-lay

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor: CHIP CHOKE 4.7UH PCMB063T-4R7MS Cyntec 28mohm/33mohm Isat =6.5Arms 68.4R71A.20H Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P capCHIP CAP T 220U 6.3V M3528 PSL /NEC/ 25mOhm / 77.C2271.45L TPS51225 TPS51285 O/P capCHIP CAP T 220U 6.3V M3528 PSL /NEC/ 25mOhm / 77.C2271.45L
H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 H/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037
L/S:SIS412 / 24mOhm/30mOhm@4.5Vgs / 84.00412.037 R1 100K 20K L/S:SIS780 / 14.5mOhm/17.5mOhm@4.5Vgs / 84.00780.037

R2 107K 21.5K
R3 DY 200

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51225_5V/3D3V
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 45 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = CPU.Regulator

5V_S5 5V_S5

2
PR4602
PR4603
1D0V_S0 PR4624 0R2J-2-GP 1R2F-GP
69D8R2F-GP
D D
2 1 H_CPU_SVIDCLK

1
PWR_VCORE_VCCP PWR_VCORE_VDD
1D0V_S0 PR4625
69D8R2F-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP
1

1
2 1 H_CPU_SVIDDAT PC4602 PC4603

2
1D0V_S0

22

21
PU4601

VDD
VCCP
1

PC4601
SC1U6D3V3KX-2GP

DY PR4606
(18,24,36,37,49) PM_SLP_S3# 2 1 PWR_VCORE_VR_O_P 2 20
2

0R2J-2-GP VR_ON PWM2

1

(18) H_CPU_SVIDCLK 2 PR4608 1 20R2F-GP PWR_VCORE_SCLK 3

PR4609 SCLK
PR4607
499R2F-2-GP 1 2 PWR_VCORE_ALERT# 4
DY (18) VR_SVID_ALERT#
0R2J-2-GP ALERT#
16 PWR_VCORE_BOOT1 (47)
PR4610 2 16D9R2F-1-GP PWR_VCORE_SDA BOOT1
(18) H_CPU_SVIDDAT 1 5
2

SDA

(19,24,44) H_PROCHOT# 6 19 PWR_VCORE_LGATE1 (47)

VR_HOT# LGATE1

18 PWR_VCORE_PHASE1 (47)
PWR_VCORE_NTCG PHASE1
(48) PWR_VCORE_NTCG 1
NTCG
(47) PWR_VCORE_NTC PWR_VCORE_NTC 7
NTC
17 PWR_VCORE_UGATE1 (47)
5V_S5 UGATE1
9
PR4611 ISEN1
2 1PWR_VCORE_ISEN2 8
0R2J-2-GP ISEN2
C C
14 PWR_VCORE_COMP (47)
COMP
10
ISUMP
13 PWR_VCORE_FB (47)
PWR_VCORE_ISUMN FB
11
ISUMN
(47) PWR_VCORE_VSUM+
12 PWR_VCORE_RTN (47)
RTN
2K61R2F-1-GP
1

PR4612
PWR_VCORE_ISUMNG 31

SCD068U16V2KX-GP
SCD022U16V2JX-GP
ISUMNG
1

PC4604
11KR2F-L-GP

1
Place near choke of Phase1 PR4613 PC4605 32
2

ISUMPG
VSUM_R
DY
2 26 PWR_VCORE_BOOTG (48)

2
BOOTG
2
1

15
PR4614 PGOOD
25 PWR_VCORE_UGATEG (48)
UGATEG
NTC-10K-26-GP-U
27
PGOODG
2nd = 69.60013.131 PHASEG
24 PWR_VCORE_PHASEG (48)

COMPG
2

RTNG
PR4615 23

GND
PWR_VCORE_LGATEG (48)

FBG
LGATEG
1 2
(47) PWR_VCORE_VSUM-
590R2F-GP ISL95833HRTZ-GP

33

28

29

30
1

PC4606 PR4616 PC4607

SCD1U10V2KX-L1-GP 2 1 ISUMN_RC 2 1
2

649R2F-GP PWR_VCORE_RTNG (48)

SC4700P25V2KX-3-GP

(48) PWR_VCORE_VSUMG+
B PWR_VCORE_FBG (48) B
2K61R2F-1-GP
1

PR4617
SCD068U16V2KX-GP
SCD022U16V2JX-GP
1

PC4608
11KR2F-L-GP

Place near choke of AXG Phase1 PWR_VCORE_COMPG (48)

1

PR4618 PC4609
2

VSUMG_R
DY
2

3D3V_S5 3D3V_S0
2
1

PR4619
NTC-10K-26-GP-U 1

1
2nd = 69.60013.131
PR4620

PR4621
1K91R2F-1-GP

1K91R2F-1-GP
DY
2

PR4622
1 2
2

2
(48) PWR_VCORE_VSUMG-
590R2F-GP
1

PC4610
SCD1U10V2KX-L1-GP
2

PR4623 PC4611 PR4627

ISUMNG_RC PWR_VCORE_GOODG
2 1 2 1 1 2
0R2J-2-GP
For GFX
649R2F-GP
SC4700P25V2KX-3-GP

IMVP_PWRGD (37,51) For VCCCORE

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Redwood SMB TouchPad

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_CPUCORE(1/3)
Size Document Number Rev
C
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 46 of 102
5 4 3 2 1
 5 4 3 2 1

DCBATOUT

D D

SC10U25V5KX-GP

SC10U25V5KX-GP
SC4D7U25V5KX-GP
PT4701

1
PC4702 PC4703 PC4704

ST33U25VDM-3-GP
DY

2
PU4701 2
3
1 4
10
9

8
7
6 For Acoustic noise
5

FDMS3600-02-RJK0215-COLAY-GP
1st = 84.00920.037

PR4701
2D2R3-1-U-GP
PC4701
Mag . 7 x 7 x 3
Iccmax=12A
SCD22U25V3KX-GP
1 2 BOOT1_RC 1 2 DCR 3 mOhm+-5%
(46) PWR_VCORE_BOOT1
TDC 20A , Isat : 25A
VCC_CORE
(46) PWR_VCORE_UGATE1
PL4701
1 2
(46) PWR_VCORE_PHASE1
C IND-D36UH-26-GP-U C
PT4702

1
(46) PWR_VCORE_LGATE1

ST470U2VDM-7-GP-U
2

3
1

1
PG4701 PG4708
PR4702 PR4703
2 1 NTC_RC 1 2 PWR_VCORE_NTC (46)
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP 79.47719.9BL

2
1KR2F-3-GP 27K4R2F-GP

1 2

PR4704
2nd = 69.60013.141
NTC Place near high side MOSFET of Phase1 NTC-470K-8-GP-U

PR4705
3K65R2F-1-GP
(46) PWR_VCORE_VSUM+ 1 2 PWR_VCORE_VSUM+_GAP

PR4706 Parallel
1R2F-GP
1 2 PWR_VCORE_VSUM-_GAP
(46) PWR_VCORE_VSUM-

PR4707
1 2
(46) PWR_VCORE_COMP
64K9R2F-1-GP

(46) PWR_VCORE_FB
PR4708 PC4705
499R2F-2-GP PC4706
1 2 FB_RC 1 2 1 2
B B
SC470P50V2KX-3GP SC120P50V2JN-1GP
PC4707
PR4709 PR4710 SC1KP25V2JX-GP
1 2 1 2COMP_RC 1 2

1K87R2F-GP 137KR2F-1-GP
PC4708
PR4711 SC680P50V2KX-2GP
1 2COMP_R 1 2

2KR2F-3-GP

PC4709
SC330P50V2JC-2-GP
1
DY 2
VCC_SENSE (7)

VSS_SENSE (7)

1 2 Parallel
PC4710
SCD01U16V2KX-3GP PR4712
2 1
(46) PWR_VCORE_RTN 0R2J-2-GP

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
Redwood SMB TouchPad without get Wistron permission
application

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_CPUCORE(2/3)
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 47 of 102
5 4 3 2 1
 5 4 3 2 1

D
DCBATOUT D

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
SC4D7U25V5KX-GP
1

1
PC4802 PC4803 PC4804 PC4805
DY

2
PU4801 2
3
1 4
10
9
7
8 6
5

PR4801 PC4801
2D2R3-1-U-GP SCD22U25V3KX-GP
FDMS3600-02-RJK0215-COLAY-GP
Iccmax=14A
1 2 BOOTG_RC 1 2
(46) PWR_VCORE_BOOTG
1st = 84.00920.037
Mag . 7 x 7 x 3
DCR 3 mOhm+-5%
TDC 20A , Isat : 25A GFX_CORE
(46) PWR_VCORE_UGATEG GFX_CORE
PL4801
1 2
(46) PWR_VCORE_PHASEG
IND-D36UH-26-GP-U
(46) PWR_VCORE_LGATEG PT4802

1
PC4812 PC4813 PC4814 PC4815 PC4816

ST470U2VDM-7-GP-U

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2 DY DY

2
3
C PR4802 PR4803 C

1
2 1 NTCG_RC 1 2 PWR_VCORE_NTCG PG4801 PG4802
PWR_VCORE_NTCG (46)
79.47719.9BL
1KR2F-3-GP 27K4R2F-GP -SB 20121113-2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP

2
1 2
2nd = 69.60013.141 X01
PR4804
NTC place near high side MOSFET of AXG Phase1 NTC-470K-8-GP-U

PR4805
3K65R2F-1-GP

2 1 PWR_VCORE_VSUMG+_GAP
(46) PWR_VCORE_VSUMG+
PR4806
1R2F-GP Parallel
2 1 PWR_VCORE_VSUMG-_GAP
(46) PWR_VCORE_VSUMG-

PR4807
1 2
(46) PWR_VCORE_COMPG
21KR2F-GP

(46) PWR_VCORE_FBG
PR4808
PC4806
499R2F-2-GP PC4807
2 1FBG_RC 1 2 1 2

SC470P50V2KX-3GP SC120P50V2JN-1GP
B B
PC4808
PR4809 PR4810 SC1KP25V2JX-GP
1 2 2 1COMPG_RC
1 2

1K87R2F-GP 137KR2F-1-GP

PR4811 PC4809
2KR2F-3-GP SC330P50V2KX-3GP
1 2COMPG_R 1 2

PC4810
SC330P50V2JC-2-GP
1
DY 2
VCC_AXG_SENSE (7)

VSS_AXG_SENSE (7)
1 2
(46) PWR_VCORE_RTNG Parallel
PC4811
SCD01U16V2KX-3GP PR4812
2 1
0R2J-2-GP

A A

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Redwood SMB TouchPad

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95833_AGX_CORE(3/3)
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 48 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p35v0p675v

D 1D35V_PWR 1D35V_S3 D
PG4902
1 2
PR4903
(18,24,36) PM_SLP_S4# 2 1 PWR_1D35V_EN GAP-CLOSE-PWR
PG4904
0R2J-2-GP
3D3V_S5

PC4902
SCD1U10V2KX-5GP
1 2

1
DY GAP-CLOSE-PWR

1
PG4905

2
PR4905
DY 1KR2J-1-GP 1 2
PWR_1D35V_VREF PU4901 GAP-CLOSE-PWR

2
PR4907
PG4907
PWR_1D35V_VREF_L 2 1 28 1 PWR_1D35V_PGOOD 2 1
PR4912 0R2J-2-GP EN PGOOD 1D35V_S3_PWRGD (36)
1 2
0R2J-2-GP
PC4903
SCD22U6D3V2KX-1GP

PWR_1D35V_LP# GAP-CLOSE-PWR
27
NU#27 NU#2
2 1
DY 210KR2F-2-GP
1

PR4908 PR4910
49K9R2F-L-GP PG4909
3 PWR_1D35V_MODE 2 DY 1
PWR_1D35V_VREF MODE PR4911 0R2J-2-GP
26 1 2
2

VREF
2

GAP-CLOSE-PWR
PWR_1D35V_REFIN_1 2 1 PWR_1D35V_REFIN 25 4
PR4913 0R2J-2-GP REFIN NC#4
PR4916
1

24 5 PWR_1D35V_BOOT 1 2PWR_1D35V_BOOT_RC
PR4921 REFIN2 BST
105KR2F-1-GP 0R3J-6-GP
2 DY 1 PWR_1D35V_GSNS 23 6
PC4904 SC10P50V2JN-4GP GSNS SW#6
CYNTEC PCMB053T Design Current = 4A
2

1
2 DY 1 PWR_1D35V_VSNS 22 7 PC4906 5x5x3. OCP=8A
PC4905 SC10P50V2JN-4GP VSNS SW#7 SCD1U25V3KX-GP Idc:7A , Isat:11 A , DCR 13~14 mOhm

2
C 1 2 PWR_1D35V_SLEW 21 8 1D35V_PWR C
SLEW SW#8 PL4901
PC4907 SC2700P50V2KX-1-GP

2 1 1 2 PWR_1D35V_TRIP 20 9 PWR_1D35V_SW 1 2
PR4923 PR4919 0R2J-2-GP TRIP SW#9
0R2J-2-GP 19
PWR_1D35V_TRIP_R

GND COIL-1UH-73-GP

1
10
PGND
DY 1PWR_1D35V_TRIP 68.1R010.20R DY PC4921 PC4922 PC4923 PC4908

1
2

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U10V2KX-5GP
5V_S5

1
PR4915 0R2J-2-GP

2
PR4920 PG4919
5V_S5 18 11 DY
Reserve PR4915 for OCP setting. V5 PGND 2D2R5F-2-GP

GAP-CLOSE-PWR-3-GP

2
17 12

1PWR_1D35V_SUNB 2
VIN PGND
TPS51363RVER-GP
16 13
VIN PGND
Pin19 direct connect
1

to thermal pad PC4909 15 14

VIN PGND
SC2D2U6D3V3MX-1-GP

PWR_1D35V_VSNS
GND
2

74.51363.043 PG4916
29

PC4910 PWR_1D35V_GSNS 1 2
SC330P50V3KX-GP DY 0D675V_PWR 0D675V_S0
PG4917

2
GAP-CLOSE-PWR-3-GP
1 2
DCBATOUT +PWR_SRC_1D35V
PG4903
GAP-CLOSE-PWR
1 2 +PWR_SRC_1D35V
PG4918
GAP-CLOSE-PWR 1 2
PG4901 PC4911 PC4917 0D675V_VTTREF
PC4912 GAP-CLOSE-PWR
1 2
SC10U25V5KX-GP

SC10U25V5KX-GP
2

1
SCD1U25V3KX-GP

GAP-CLOSE-PWR

1
PG4906
1

B B
PC4916
1 2 SCD1U10V2KX-5GP

2
3D3V_S0 1D35V_S3
GAP-CLOSE-PWR
PR4909
10KR2J-3-GP Peak Current = 0.5A
2 1
PC4915
SC10U6D3V3MX-L-GP

1
(18,24,36,37,46) PM_SLP_S3# 0R2J-2-GP 2 DY 1 PR4925 VTT_EN PC4918
0326 SCD1U10V2KX-5GP

2
11
PU4902
0R2J-2-GP 1 2 PR4914 PU4902_S5 0D675V_PWR

GND
(18,24,36) PM_SLP_S4#
0326 6 5
PR4917 VTTREF VTTSEN
7 4
S3 PGND
5V_S5 2 1 8 3
GND VTT

1
9 2
0R2J-2-GP PU4902_VCNTL S5 VIN PC4914
10 1
VCNTL VREF SC22U6D3V5MX-L3-GP

2
1
PR4918 PC4901
3D3V_S5 2 DY 1 SC1U10V2KX-L1-GP APL5338XAI-TRG-GP
74.05338.079

2
0R2J-2-GP

If use 74.02997.B79, Stuff PR4918 and Dummy PR4917.

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L
Inductor:CHIP CHOKE 1UH PCMB053T-1R0MS / CYNTEC/ 13~14mOhm / Isat =11Arms/ 68.1R010.20R
2nd source:
O/P cap:CHIP CAP C 22U 6.3V M0805 X5R /78.22610.51L
74.02997.B79

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SY8208DQNC(1.35V_S3/0.675V_S0)
Size Document Number Rev
C
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 49 of 102
5 4 3 2 1
 5 4 3 2 1

SY8206D for 1D0V

D D

DCBATOUT PW R_DCBATOUT_1D0V PW R_1D0V 1D0V_S5

PG5001
1 2
PG5004
GAP-CLOSE-PW R 1 2
PG5007
1 2 GAP-CLOSE-PW R
PG5006
GAP-CLOSE-PW R 1 2
PG5010
1 2 GAP-CLOSE-PW R
PG5009
GAP-CLOSE-PW R 1 2
PG5012
1 2 GAP-CLOSE-PW R

GAP-CLOSE-PW R

PW R_DCBATOUT_1D0V
1

PC5001 PC5002 PC5003

SC10U25V5KX-GP

SC10U25V5KX-GP

SCD01U50V2KX-1GP

DY
2

C C

PU5001
Freq=800KHz CYNTEC 1uH 5*5*3 Design Current=2.2A
PC5004 DCR:13 ~ 14 mOhm OCP=6A
PR5002 SCD1U25V3KX-GP
2D2R3F-L-GP Idc : 7 A , Isat : 11A
3D3V_S5 1 2 8 6 PW R_1D0V_BOOT 1 2 PW R_1D0V_BOOT_R 1 2
IN BS PW R_1D0V
PR5001 PL5001
1KR2J-1-GP
10 PW R_1D0V_PHASE 1 2
(51) 1D0V_S5_PW RGD LX
COIL-1UH-73-GP
2 4 PW R_1D0V_VFB PR5004 68.1R010.20R
PG FB

1
0R2J-2-GP 0R2J-2-GP
PR5003 1 2 PW R_1D0V_IMAX 3 7 PW R_1D0V_BYP 1 2 3D3V_S0 PC5011 PC5005DY PC5006 PC5007 PC5008 PC5009
ILMT BYP

SC22P50V2JN-4GP

SCD1U16V3KX-3GP
2

2
1 2 PW R_1D0V_EN 1

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
(18,45) 3V_5V_POK EN

1
PR5005 9 5 PW R_1D0V_LDO_P5
0R2J-2-GP GND LDO

2
1

PC5010 SY8206DQNC-GP-U PW R_1D0V_C_R

B B
SC1KP50V2KX-L-1-GP

74.08206.C73

1
2

PR5006 PR5008
1

1
68K1R2F-1-GP 1KR2F-3-GP
OCP setting PC5012 PC5013 R1
SC1U6D3V2KX-L-1-GP SC1U6D3V2KX-L-1-GP
High 12A
2

2
Float 8A PWR_1D0V_VFB
Low 6A

1
100KR2F-L1-GP PR5007
R2 Vo=0.6x(1+R1/R2)
=0.6x(1+68.1/100)
=1.008V

2
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DC to DC_1D05V(SY8208D)
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 50 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = PWR.Plane.Regulator_1p8v
TLV70218 for 1D8V_S5
3D3V_S5

1
PC5126
SC1U6D3V2KX-L-1-GP Design Current =86mA confirm with EC, make sure that do set to GPO only

2
3D3V_S5
PU5105 1D8V_PWR 1D8V_S5 3D3V_S5
D PG5111 D
1 5 1 2
IN OUT

1
2 PR5104
PWR_1D8V_EN GND GAP-CLOSE-PWR
3 4
EN NC#4

2
PG5112 DY 47KR2J-L2-GP
1 2 PR5106

1
PC5127 1D8V_S5 PQ5102
TLV70218DBVR-GP DY 1KR2J-1-GP

2
GAP-CLOSE-PWR 2N7002K-2-GP

SC1U6D3V2KX-L-1-GP
1P8A_PWROK# G

1
C
1P8A_PWROK 84.02222.V11 DY D 1D8V_S5_PG (18,24)
1 DY 2 B DY MMBT2222A-3-GP S
PR5103 PQ5101

E
1KR2J-1-GP 84.2N702.J31

1
2ND = 84.2N702.031
DY PC5103
SC22P50V2GN-GP
PR5115

2
(50) 1D0V_S5_PWRGD 1 2 PWR_1D8V_EN

0R2J-2-GP

1
X01
PC5128
SCD1U10V2KX-L1-GP

2
C C

3D3V_S5
TLV70215 for 1D5V_S0
PR5101
1D35V_S0 2K2R2J-2-GP

1 2
1
1

PC5101
PC5111 SC1U6D3V2KX-L-1-GP Design Current =18mA
DY
2

SCD1U10V2KX-L1-GP
2

PU5101 1D5V_LDO 1D5V_S0

PG5101
1 5 1 2
IN OUT
2
PWR_1D5V_EN GND GAP-CLOSE-PWR
3 4
EN NC#4 PG5102
1 2
TLV70215DBVR-GP 1 PC5106

SC1U6D3V2KX-L-1-GP
GAP-CLOSE-PWR
2

B B

SYW232 for 1D05V_S0

PWR_1D05V_PVDD 3D3V_S5
PG5107
2 1

1
GAP-CLOSE-PWR
PC5119 DY PC5120 PC5121 PG5108

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC1U6D3V2KX-L-1-GP
2 1
2

2
GAP-CLOSE-PWR
Design Current =0.7A
PU5104

5 3
NC#5 IN
PWR_1D05V 1D05V_S0
8 1 PWR_1D05V_FB
SGND FB PL5101
2 1D05V_S0_PG PG5109
PG PWR_1D05V_PHASE
4 6 1 2 1 2
PGND LX PWR_1D05V_S0_EN IND-1UH-145-GP
9 7
PGND EN GAP-CLOSE-PWR
68.1R050.10H

1
PG5110

1
SYW232DFC-GP PR5111 1 2
75KR2F-GP PC5122
74.00232.033 R1

SC22P50V2JN-4GP
GAP-CLOSE-PWR

2
PR5102

2
1KR2J-1-GP
(37,46) IMVP_PWRGD 1 2

1
PWR_1D05V_FB
PC5123 PC5124

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
(37) 1D0V_S0_PG 1 DY 2

2
1
PR5112 PR5113
1

0R2J-2-GP 100KR2F-L1-GP
PC5125 R2
SCD01U16V2KX-3GP
2

A A

Close Pin1
X01
Vo=0.6x(1+R1/R2)
=0.6x(1+75/100)
3D3V_S0
=1.05 <Core Design>
1

PR5114
100KR2J-1-GP
Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2

Title

LDO_1D8V&1D5V(RT9025)
1D05V_S0_PG 1D05V_S0_PG (36,37) Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 51 of 102
5 4 3 2 1
SSID = VIDEO
Hi:2.0V 3D3V_S0
Lo:0.8V
CAMERA POWER
Panel Conn. LVDS_VDD_EN 1
D5201
U5201

LVDS_VDD_EN_R
Layout 40 mil 3D3V_S0 3D3V_CAMERA_S0
3 1 5
EN VIN#5
2
LCD1 LCDVDD GND
(24) LCD_TST_EN 2 3 4
DCBATOUT_LCD VOUT VIN#4
41 F5202
1 BAT54C-7-F-3-GP 1 2

1
42 75.00054.E7D RT9724GB-GP C5212

SC4D7U6D3V3KX-L-GP
2 74.09724.09F POLYSW-D5A6V-1-GP

1
3 2nd = 075.00054.0C7D 2ND = 74.03514.07F 69.50007.921

2
1
4 C5211 EC5210 DY C5214
SC4D7U6D3V3KX-L-GP SC33P50V2JN-3GP SC4D7U6D3V3KX-GP
5 3rd = 75.00054.A7D

2
6

2
7
8
9 DP_TXN0_CPU_C C5207 1 2SCD1U10V2KX-L1-GP
DP_TXP0_CPU_C DP_TXN0_CPU (8)
10 C5206 1 2SCD1U10V2KX-L1-GP DP_TXP0_CPU (8)
11
12 DP_AUXP_CPU_C C5201 1 2SC1U10V2KX-L1-GP DP_AUXP_CPU (8) LCDVDD
13 DP_AUXN_CPU_C C5205 1 2SC1U10V2KX-L1-GP DP_AUXN_CPU (8)
14
15 USB_CAMERA_P
16 USB_CAMERA_N
17
18 DMIC_CLK_C
43 19 DMIC_DATA_C R5224
20 MIC_GND 0R2J-2-GP

2
21 C5208 C5209 1 DY 2

SCD1U10V2KX-L1-GP
22 DBC_EN_R R5201 1 2 0R2J-2-GP SC1U6D3V2KX-L-1-GP
LCD_TST_C DBC_EN (16)
23

1
24 DP_HPD0_C D5202
25 BLON_OUT_C 1 L_BKLT_CTRL
26 LCD_BRIGHTNESS
27 CAMERA_DET# (16) BKLT_CTRL 3
28
29 2 EC_BRIGHTNESS (24) DCBATOUT_LCD
INVERTER POWER DCBATOUT
30 SENSOR_I2C_SDA (67)
31 BAT54C-7-F-3-GP F5201
SENSOR_I2C_SCL (67)
32 75.00054.E7D 2 1
33 ALS_INT# (16,67)
34 2nd = 075.00054.0C7D POLYSW-1D1A24V-2-GP

1
35 C5202 C5203 C5204 69.60040.001

SC4D7U25V5KX-L2-GP

SC1KP50V2KX-L-1-GP

SCD1U25V3KX-GP
36 3rd = 75.00054.A7D
37 LCDVDD 2nd = 69.50007.A31

2
38
44 39
LCD_BRIGHTNESS
3rd = 69.50007.D31
40 3D3V_CAMERA_S0
45

1
EC5207 RN5201
ACES-CON40-11-GP LCD_TST_C
20.F2037.040 Power Pin Count : 7 DY SC6D8P50V2DN-GP LCD_BRIGHTNESS
1
2
8
7 BKLT_CTRL LCD_TST (24)

2
BLON_OUT_C 3 6
GND Pin Count : 9 4 5
BLON_OUT (24)

SRN100J-4-GP

RN5203
1 8 BKLT_CTRL
2 7 BLON_OUT_C
3
4
6
5
DP_HPD0_C
LVDS_VDD_EN_R
Level shift
SRN100KJ-5-GP
3D3V_S0 1D8V_S0 1D8V_S0

1
1 2
R5202 0R2J-2-GP R5216 R5221 R5222
2K2R2J-2-GP 2K2R2J-2-GP
DY 100KR2J-1-GP

2
MIC_GND R5236
0R3J-6-GP LVDS_VDD_EN_B

B
1D8V_S0
USB_CAMERA_N 2 1 USB_PN2 (16)
LVDS_VDD_EN C E LVDS_VDD_EN_CPU (8)

1
R5217
Q5201 10KR2J-3-GP
TR5208 LMBT3904LT1G-GP
3 4 84.T3904.H11

2
DY 2nd = 84.T3904.K11 DP_HPD (8)
2 1 3rd = 84.T3904.C11
FILTER-4P-6-GP
69.10103.041 3D3V_S0 1D8V_S0

D
RN5202 USB_CAMERA_P 2 1 USB_PP2 (16) DP_HPD0_C 1 2 DP_HPD0_G Q5406

1
DMIC_CLK_C 2 3 R5218 0R2J-2-GP 2N7002K-2-GP
DMIC_CLK (27)
DMIC_DATA_C 1 4 R5237 R5227 R5226
DMIC_DATA (27) 84.2N702.J31
0R3J-6-GP 2K2R2J-2-GP 2K2R2J-2-GP
SRN33J-5-GP-U 2ND = 84.2N702.031
1

EC5205 EC5206

2
DY DY

S
L_BKLT_CTRL_B
SC6D8P50V2DN-GP

SC6D8P50V2DN-GP

B
2

L_BKLT_CTRL C E L_BKLT_CTRL_CPU (8)

Q5203
LMBT3904LT1G-GP
84.T3904.H11
2nd = 84.T3904.K11
3rd = 84.T3904.C11

R5230
0R3J-6-GP
HOMBD1 TOUCH PANEL POWER
17 USB_PN2_TPNL 2 1 USB_HUB_PN3 (35)
1 3D3V_S0 5V_S0 TPAN_VDD
2 TPAN_VDD
3 69.60040.001
1

4 TOUCH_PANEL_EN (24) TR5209

5 2 1 R5232 2nd = 69.50007.A31
SENSOR_I2C_SDA (67)
6 0R3J-6-GP
7
SENSOR_I2C_SCL (67)
3 DY 4 3rd = 69.50007.D31
HOME_BTN# (24)
8 GSEN_INT1 (67)
2

9 GSEN_INT2 (67) FILTER-4P-6-GP F5203

10 GYRO_INT (67) 69.10103.041 POLYSW-1D1A24V-2-GP
11 TPAN_VDD_F 2 1
GYRO_DRDY (67)
12
13 USB_PP2_TPNL 2 1 USB_HUB_PP3 (35)
USB_PP2_TPNL Redwood SMB TouchPad
14
USB_PN2_TPNL R5223
2
R5233
DY 1
0R3J-6-GP
15
16 0R3J-6-GP
18 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PSC-CON16-GP
020.K0028.0016 Title

LCD Connector
Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 52 of 102
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 53 of 102
5 4 3 2 1
 5 4 3 2 1

HDMI CONN
SSID = VIDEO HDMI Level Shifter & CONNECTOR HDMI1
22
20
1 HDMI_DATA2_R

2
3 HDMI_DATA2_R#
4 HDMI_DATA1_R
D 5 D
6 HDMI_DATA1_R#
7 HDMI_DATA0_R
8
9 HDMI_DATA0_R#
10 HDMI_CLK_R
11
12 HDMI_CLK_R#
13
14
15 DDC_CLK_HDMI 5V_HDMI 5V_S0
16 DDC_DATA_HDMI F5401
17 POLYSW-1D1A6V-9-GP-U
18 5V_HDMI 1 2 1 AFTP5402
19 1 TP5401 TPAD14-OP-GP
21
23 69.48001.081

SKT-HDMI23-15-GP-U
2nd = 69.50011.081
22.10296.431
1D8V_S0
2nd = 22.10296.211
DY

1
HDMI_CLK_R# 1 R5417 2 150R2F-4-L-GP HDMI_CLK_R
DY R5405

HPD_HDMI_CON
HDMI_DATA0_R# 1 R5414 2 150R2F-4-L-GP HDMI_DATA0_R 10KR2J-3-GP
DY Low active
C
HDMI_DATA1_R# 1 R5415 2 150R2F-4-L-GP HDMI_DATA1_R C

2
DY HDMI_PCH_DET (8)
HDMI_DATA2_R# 1 R5416 2 150R2F-4-L-GP HDMI_DATA2_R

D
Q5404
Reseve 150 ohm bridge resistance 1 2 HDMI_HPD_G G FDN337N-1-GP
R5402 0R2J-2-GP 84.00337.A31
on the HDMI trace as circle for EMI

S
2
close to connector
R5403
100KR2J-1-GP

1
C5401 1 2 SCD1U10V2KX-L1-GP HDMI_CLK_R#
(8) DDBP_DATA3#
C5402 1 2 SCD1U10V2KX-L1-GP HDMI_CLK_R
(8) DDBP_DATA3
C5403 1 2 SCD1U10V2KX-L1-GP HDMI_DATA0_R#
(8) DDBP_DATA0#
C5404 1 2 SCD1U10V2KX-L1-GP HDMI_DATA0_R
(8) DDBP_DATA0

D5401
5V_S0 BAW56-5-GP
C5405 1 2 SCD1U10V2KX-L1-GP HDMI_DATA1_R# 1 5V_DDC_HDMI1
(8) DDBP_DATA1#
C5406 1 2 SCD1U10V2KX-L1-GP HDMI_DATA1_R
(8) DDBP_DATA1
B 3 B
C5407 1 2 SCD1U10V2KX-L1-GP HDMI_DATA2_R#
(8) DDBP_DATA2#
C5408 1 2 SCD1U10V2KX-L1-GP HDMI_DATA2_R 2 5V_DDC_HDMI2
(8) DDBP_DATA2
Level shift

2013/04/10 83.00056.Q11 1D8V_S0
2nd = 83.00056.G11
Close to HDMI Connector follow CRB,619

3
4
RN5401
1 R5406 2 619R2F-L1-GP 1 R5407 2 619R2F-L1-GP SRN1KJ-7-GP
1 R5408 2 619R2F-L1-GP 1 R5409 2 619R2F-L1-GP

G
1 R5410 2 619R2F-L1-GP 1 R5411 2 619R2F-L1-GP
1 R5412 2 619R2F-L1-GP 1 R5413 2 619R2F-L1-GP

2
1
DDC_DATA_HDMI D S PCH_HDMI_DATA (8,15)

Q5405
DMN5L06K-7-GP

HDMI_PLL_GND
84.05067.031
Close to Level Shift
1D8V_S0
D

5V_S0
Q5402 Wistron Confidential document, Anyone can not
2N7002K-2-GP Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

G
A 84.2N702.J31 <Core Design> A

2ND = 84.2N702.031
DDC_CLK_HDMI D S PCH_HDMI_CLK (8)
Wistron Corporation
G

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Q5403
Title
DMN5L06K-7-GP
84.05067.031 HDMI Level Shifter/Connector
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 54 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Display Port

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
<Core Design> application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 55 of 102
5 4 3 2 1
SSID = SATA

SATA HDD Connector

HDD1
22 21
1 2 FFS_INT2_Q_R 1 NP1
(68) FFS_INT2_Q
R5601 0R2J-2-GP
2
3
4
5
6
7
8
5V_S0 9
10
11
12
13
14
(19) SATA0_PTX_DRX_P0 SCD01U50V2KX-1GP 1 2 C5601 SATA_TXP0_C 15
(19) SATA0_PTX_DRX_N0 SCD01U50V2KX-1GP 1 2 C5602 SATA_TXN0_C 16
17
(19) SATA0_PRX_DTX_N0 SCD01U50V2KX-1GP 1 2 C5603 SATA_RXN0_C 18
(19) SATA0_PRX_DTX_P0 SCD01U50V2KX-1GP 1 2 C5604 SATA_RXP0_C 19
20 NP2
24 23

FOX-CON20-1-GP-U1
Layout Note : 20.F1546.020
AC coupling Cap;
place near CONN(<100mils)
2nd = 20.F1473.020
3rd = 20.F2307.020

5V_S0

EU5601

2
SATA_TXP0_C 1 10 SATA_TXP0_C C5605 C5606
LINE_1 NC#10

SC10U10V3MX-GP

SCD1U10V2KX-L1-GP
SATA_TXN0_C 2 9 SATA_TXN0_C
LINE_2 NC#9
3 GND DY GND 8

1
SATA_RXN0_C 4 7 SATA_RXN0_C
SATA_RXP0_C LINE_3 NC#7 SATA_RXP0_C
5 LINE_4 NC#6 6

AZ1045-04F-R7G-GP
75.01045.073

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD Connector
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 56 of 102
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 57 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Wireless

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 58 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = 3G

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN CONN
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 59 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = mSATA

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 60 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 61 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = KB / TOUCH PAD TP_VDD

CAP LED Control TOUCH PAD

1
TP_VDD EC6202
LOW actived from KBC GPIO DY SC56P50V2JN-2GP
D D

2
5V_S0 CAP_LED
Q6201

1
2
R2
E
1 2 CAP_LED_R# B R6203 RN6203
(24) CAP_LED# R1
CAP_LED_Q CAP_LED TP1
C 1 2 SRN10KJ-5-GP
R6202 10
0R2J-2-GP DRA2144V0L-GP 1KR2J-1-GP 8
84.02144.011 TP_DAT 7

4
3
TP_CLK 6
2nd = 84.DT144.A11 INT_TP#_CONN
5
4
TP_W AKE_D 3
RN6202 2
1 4 TP_DATA_C
(24) TPDATA
2 3 TP_CLK_C 1
(24) TPCLK
9

SRN33J-5-GP-U ACES-CON8-40-GP

1
KB1 EC6201 EC6203 20.K0667.008
28
DY DY

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
AFTP6206 1 KROW 1 26 2nd = 20.K0665.008

2
AFTP6201 1 KROW 7 25
AFTP6202 1 KROW 6 24
(24) KROW [0..7] AFTP6223 1 KCOL9 23
AFTP6203 1 KROW 4 22
AFTP6205 1 KROW 5 21
(24) KCOL[0..15] AFTP6217 1 KCOL0 20
AFTP6204 1 KROW 2 19
C AFTP6207 1 KROW 3 18 C
AFTP6209 1 KCOL5 17
AFTP6215 1 KCOL1 16
AFTP6208 1 KROW 0 15 R6208
AFTP6216 1 KCOL2 14 0R2J-2-GP
AFTP6210 1 KCOL4 13 1 I2C 2
(16) TP_I2C_DATA
AFTP6211 1 KCOL7 12 1 I2C 2 3D3V_S0 TP_VDD
(16) TP_I2C_CLK
AFTP6213 1 KCOL8 11 Non-WAKE
AFTP6212 1 KCOL6 10 R6209
AFTP6214 1 KCOL3 9 0R2J-2-GP 1 2
AFTP6218 1 KCOL12 8
AFTP6221 1 KCOL13 7 R6201
AFTP6222 1 KCOL14 6 R6206 0R2J-2-GP
AFTP6224 1 KCOL11 5 0R2J-2-GP 3D3V_S5
AFTP6225 1 KCOL10 4 1 SMB 2 TP_DAT
(12,16) PCU_SMB_DATA
AFTP6220 1 KCOL15 3 1 SMB 2 TP_CLK WAKE
(12,16) PCU_SMB_CLK
CAP_LED CAP_LED 2 1 2
1 R6207
AFTP6233 1 0R2J-2-GP R6205
27 0R2J-2-GP

1
EC6204 EC6205 EC6206 EC6207
ACES-CON26-13-GP-U
DY DY DY DY

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
20.K0615.026

2
AFTP6226
2nd = 20.K0449.026
1 WAKE TP_W AKE_D
(24) TP_W AKE 1 2

R6204
B 0R2J-2-GP B

TP_VDD 1D8V_S0 1D8V_S0

1
R6212 R6211
TP_VDD 1 AFTP6228

G
2K2R2J-2-GP 2K2R2J-2-GP TP_CLK_C 1 AFTP6229
TP_DATA_C 1 AFTP6230
2

2
TP_DAT 1 AFTP6231
INT_TP#_CONN D S TP_CLK 1 AFTP6232
INT_TP# (19)
Q6202
DMN5L06K-7-GP
84.05067.031
Wistron Confidential document, Anyone can not
R6210 2 0R2J-2-GP Duplicate, Modify, Forward or any other purpose
1 DY application without get Wistron permission
A Redwood SMB TouchPad A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 62 of 102
5 4 3 2 1
 5 4 3 2 1

D D

IOBD1
41
1
42
2
(35) USB_HUB1_HUB2_PP4 3
(35) USB_HUB1_HUB2_NP4 4
5
(18) CLK_PCIE_WLAN_P0 6
(18) CLK_PCIE_WLAN_N0 7
8
(19) PCIE_PTX_WLANRX_P0_C 9
(19) PCIE_PTX_WLANRX_N0_C 10
11
(19) PCIE_PRX_WLANTX_P0 12
(19) PCIE_PRX_WLANTX_N0 13
14
C 15 C
BATTLED#_R 16
PWRLED#_R 17
(24) VOL_DOWN# 18
(24) VOL_UP# 19 43
(19) CLK_PCIE_WLAN_REQ#_CPU 20
(18,24,35,65) PLT_RST# 21
(24) WIFI_RF_EN 22
(24) KBC_PWRBTN# 23
(24) BLUETOOTH_EN 24
(24) KB_CLOSE#_2 25
(24,33) USB_PWR_EN# 26
(16) USB_OC#0 27
28
29
30
+RTC_VCC 31
3D3V_S0 32
33
34
35
3D3V_S5 36
5V_S5 37
B
38 B
39 44
40
45

STAR-CON40-GP
20.F2248.040
2nd = 20.F2051.040
3rd = 20.F2037.040
1 2 PWRLED#_R
(24) PWRLED# R6301 0R2J-2-GP
Power Pin Count : 10
1 2 BATTLED#_R
(24) BATTLED# R6302 0R2J-2-GP GND Pin Count : 9
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 63 of 102
5 4 3 2 1
 5 4 3 2 1

D D

3D3V_S5

C 3D3V_S5 C

1
C6402
R6401

SCD1U10V2KX-5GP
DY 100KR2J-1-GP LIDSW1

2
1

1
VSS
2 VDD
(24) LID_CLOSE# LID_CLOSE# 3 OUT

S-5712ACDL1-M3T1U-GP
1

C6401
74.05712.0BB
DY SCD047U16V2KX-1-GP
2

B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
EV application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Hall Sensor
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 64 of 102
5 4 3 2 1
 5 4 3 2 1

2 1 RSMRST#_XDP
(18,24) RSMRST#_KBC
1D8V_S5 (18) TAP_PREQ# TAP_PREQ# 1 TP6501 TPAD14-OP-GP
R6506
1KR2J-1-GP TAP_PRDY# 1 TP6502 TPAD14-OP-GP
(18) TAP_PRDY#

2
R6501 DBG0 1 TP6503 TPAD14-OP-GP
(18) DBG0
D R6505 1KR2J-1-GP DBG1 1 TP6504 TPAD14-OP-GP D
(18) DBG1
DY 1KR2J-1-GP 2 1 COREPWROK_XDP
(18,36) COREPWROK
DBG2 1 TP6505 TPAD14-OP-GP
(18) DBG2
DBG3 1 TP6506 TPAD14-OP-GP
(18) DBG3

1
2 1 PLT_RST#_XDP
(18) PLT_RST#_CPU
PMC_RSTBTN# RSMRST#_XDP 1 TP6507 TPAD14-OP-GP
R6504
1KR2J-1-GP COREPWROK_XDP 1 TP6508 TPAD14-OP-GP

1
C6503 SRTC_RST#_XDP 1 TP6509 TPAD14-OP-GP
DY SCD1U10V2KX-L1-GP 1D8V_S5
2
1 TP6510 TPAD14-OP-GP
PLT_RST#_XDP 1 TP6511 TPAD14-OP-GP
(18) PMC_RSTBTN# PMC_RSTBTN# 1 TP6512 TPAD14-OP-GP

1
C6502

SCD1U10V2KX-L1-GP
XDP_H_TDO 1 TP6513 TPAD14-OP-GP
(18) XDP_H_TDO
(18) XDP_H_TRST_N XDP_H_TRST_N 1 TP6514 TPAD14-OP-GP

2
(18) XDP_H_TDI XDP_H_TDI 1 TP6515 TPAD14-OP-GP
(18) XDP_H_TMS XDP_H_TMS 1 TP6516 TPAD14-OP-GP
3D3V_S0
C DB1 C
11 (18) XDP_H_TCK XDP_H_TCK 1 TP6517 TPAD14-OP-GP
1

(16,24) LPC_AD0 2
(16,24) LPC_AD1 3
(16,24) LPC_AD2 4
(16,24) LPC_AD3 5 LPC
(16,24) LPC_FRAME# 6
7 3D3V_S5 3D3V_S5
(18,24,35,63) PLT_RST#
8
(16) CLK_PCI_LPC 9
10

2
12
R6503 R6502
ACES-CON10-1-GP-U1 100KR2J-1-GP 1KR2J-1-GP
Q6501
20.F0714.010

1
3 4

B SRTC_RST#_XDP_D 2 5 SRTC_RST#_XDP B

1 6

1
C6501
SCD1U10V2KX-L1-GP
DMN601DWK-7-1-GP

2
75.00601.07C

SRTC_RST# (18)

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Debug connector
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 65 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 66 of 102
5 4 3 2 1
 5 4 3 2 1

X01
SSID = User.Interface X01
(68) GYRO_INT_P11 1 DY 2 GYRO_INT (52)
R6715 3D3V_MCU From APU
R6734 100KR2J-1-GP
0R2J-2-GP MCU_RST# 1 2

Sensor Hub GYRO_INT_C 1 2 1 DY 2 SENSOR_HUB_RST# (16)

1
R6735 C6719 R6716
0R2J-2-GP 0R2J-2-GP
3D3V_S0 3D3V_MCU SCD1U10V2KX-5GP

2
D R6705 150mA D
1 2
U6703

C6716
SC1U10V2KX-L1-GP

C6711
SCD01U16V2KX-3GP

C6712
SCD01U16V2KX-3GP

C6713
SCD01U16V2KX-3GP

C6714
SCD1U10V2KX-5GP

C6715
SCD1U10V2KX-5GP
0R3J-6-GP

1
1 VLCD PB0 18 GSEN_INT1 (52)
PB1 19 GSEN_INT2 (52)
2 9 20 GYRO_INT_C

2
VDDA PB2
PB3 39 GYRO_DRDY (52)
24 VDD_1 PB4 40 X6701
36 VDD_2 PB5 41
48 42 SENSOR_I2C_SCL
VDD_3 PB6 SENSOR_I2C_SDA MCU_OSCO
PB7 43 3 2
PB8 45
10 PA0_WKUP1 PB9 46
HUB_PA1 11 21
PA1 PB10

1
HUB_PA2 12 22 C6709 4 1 MCU_OSCI
HUB_PA3 PA2 PB11
13 PA3 PB12 25

1
HUB_PA4 14 26 SC15P50V2JN-2-GP

2
HUB_PA5 PA4 PB13 C6710
15 PA5 PB14 27 XTAL-12MHZ-67-GP
HUB_PA6 16 28 ALS_INT# (16,52)

2
GSEN2_INT1_C PA6 PB15 SC15P50V2JN-2-GP
17 PA7 MCU_OSCI
82.30006.641
29 PA8 PH0_OSC_IN 5
R6712 30 6 MCU_OSCO
1K5R2F-2-GP USBDISABLE PA9 PH1_OSC_OUT
1 2 31 PA10
R6713 1 2 0R2J-2-GP USB_2- 32 7 MCU_RST#
(35) USB_HUB_PN2 PA11 RST#
R6714 1 2 0R2J-2-GP USB_2+ 33 44 MCU_BOOT0
(35) USB_HUB_PP2 PA12 BOOT0
SW DIO 34 PA13

1
SW CLK 37
GSEN2_INT2_C PA14 R6717
38 PA15 VSSA 8
C 20KR2J-L2-GP C

(24) KB_DISABLE 2 PC13_WKUP2 VSS_1 23

3 35
X01

2
PC14_OSC32_IN VSS_2
4 PC15_OSC32_OUT VSS_3 47

GND 49
3D3V_GSEN2 3D3V_S0

STM32L151CBU6TR-GP
071.32151.000U
G sensor 11uA
2
R6701
1

0R2J-2-GP

1
C6702 C6701

SCD1U10V2KX-5GP

SC10U6D3V3MX-L-GP
For Sensor Orientation Setting

2
3D3V_MCU 3D3V_MCU
U6701
RN6701
R6718 1 DY 2 10KR2J-3-GP R6719 1 2 10KR2J-3-GP 4 1 10 1
(52) SENSOR_I2C_SCL RES#10 VDD_IO
(52) SENSOR_I2C_SDA 3 2 13 RES#13
R6720 1 DY 2 10KR2J-3-GP R6721 1 2 10KR2J-3-GP 15 14
SRN2K2J-5-GP RES#15 VDD near pin14
16 RES#16
R6722 1 DY 2 10KR2J-3-GP R6723 1 2 10KR2J-3-GP
SENSOR_I2C_SCL_2G 4 11 GSEN2_INT1
R6724 SCL/SPC INT1
1 DY 2 10KR2J-3-GP R6725 1 2 10KR2J-3-GP SENSOR_I2C_SDA_2G 6 SDA/SDI/SDO INT2 9 GSEN2_INT2

R6726 1 2 10KR2J-3-GP R6727 1 DY 2 10KR2J-3-GP 3D3V_GSEN2 1 2 7 8 GSENSOR_CS 2 1 3D3V_GSEN2

R6702 10KR2J-3-GP SDO/SA0 CS R6704 10KR2J-3-GP
R6728 1 DY 2 10KR2J-3-GP R6729 1 2 10KR2J-3-GP 1 DY 2 GSENSOR_SDO FFS
B B
For MCU debug port R6703 0R2J-2-GP 5 GND NC#2 2
HUB_PA1 12 3
HUB_PA2 GND NC#3
HUB_PA3 3D3V_MCU
HUB_PA4 LNG3DMTR-GP
HUB_PA5 SW DIO 1
HUB_PA6 SW CLK 1
TP6701
TP6702
TPAD14-OP-GP
TPAD14-OP-GP
74.LNG3D.0BZ
1 TP6704 TPAD14-OP-GP
1 TP6703 TPAD14-OP-GP

3D3V_GSEN2
GSEN2_INT1_C R6731 1 2 0R2J-2-GP GSEN2_INT1

GSEN2_INT2_C R6730 1 2 0R2J-2-GP GSEN2_INT2

2
1

KBC RN6705
SRN2K2J-5-GP GSENSOR_I2C_SCL
RN6703
(19,68) HDD_FALL_INT
R6733 1 DY 2 0R2J-2-GP
2 3
GSENSOR_I2C_SDA 1 KBC 4 R6732 1 DY 2 0R2J-2-GP
(68) FFS_INT2
Q6701
3
4

SRN0J-12-GP
GSENSOR_I2C_SCL 1 6 SML1_CLK (24,26)

A 2 KBC 5
RN6702
<Core Design> A

3 4 SENSOR_I2C_SCL 4 1 SENSOR_I2C_SCL_2G
SENSOR_I2C_SDA Non-KBC SENSOR_I2C_SDA_2G
3 2
Wistron Corporation
GSENSOR_I2C_SDA DMN601DW K-7-1-GP SRN0J-12-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
75.00601.07C
SML1_DATA (24,26) Close to each other Title
Gyro / G sensor / E-compass
Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 67 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = User.Interface

D D6801 D
(67) GYRO_INT_P11 1

DY 3 INT2_SELECT (16)

(67) FFS_INT2 2

BAT54A-1-GP
75.00054.X7D
2nd = 75.00054.R7D
3rd = 75.BAT54.07D

R6805 1 2 0R2J-2-GP
X01

Note:
3D3V_S0 - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
C
Free Fall Sensor 3D3V_RUN_FFS 1 FFS 2
-
-
design PCB pad based on our sensor LGA pad size (add 0.1mm)
solder stencil opening to 90% of the PCB pad size
C

R6801 - mount the sensor near the center of mass of the NB as possible as you can

C6803
SCD1U10V2KX-L1-GP

C6804
SCD1U10V2KX-L1-GP
0R3J-6-GP

1
FFS FFS DY C6809
SC10U6D3V3MX-L-GP

2
U6801

10
13
RES#10
RES#13
VDD_IO 1
Please help to close with U6701
15 RES#15 VDD 14
16 RES#16 3D3V_S0
4 11 FFS_INT1_D R6803 1 2 0R2J-2-GP
(16) PCU_SMB_CLK_FFS SCL/SPC INT1 HDD_FALL_INT (19,67)
6 9 FFS_INT2_D R6804 1 2 0R2J-2-GP FFS_INT2
(16) PCU_SMB_DATA_FFS SDA/SDI/SDO INT2

1
3D3V_RUN_FFS 7 8 R6802
SDO/SA0 CS 100KR2J-1-GP
FFS
FFS
5 2

2
GND NC#2 FALL_INT2
12 GND NC#3 3

LNG3DMTR-GP
Q6801
74.LNG3D.0BZ

1
2N7002KDW -GP
B B

FFS 84.2N702.A3F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F

6
4th = 84.2N702.F3F
X01

INT2_SELECT
FFS_INT2_Q (56)

Note:
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Free Fall Sensor

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 68 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

Wistron Confidential document, Anyone can not

Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thunderbolt (2/5)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 69 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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Title

Thunderbolt (3/5)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 70 of 102
5 4 3 2 1
 5 4 3 2 1

D D

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Blanking
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Wistron Corporation A
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Title

Thunderbolt (4/5)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 71 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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Title

Thunderbolt (5/5)
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 72 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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Title

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Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 73 of 102
5 4 3 2 1
 5 4 3 2 1

D D

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Title

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Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 74 of 102
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 5 4 3 2 1

D D

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Title

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Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 75 of 102
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 5 4 3 2 1

D D

C C

Blanking
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Wistron Corporation A
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Title

Reserved
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Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 76 of 102
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 5 4 3 2 1

D D

C C

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Wistron Corporation A
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Title

Reserved
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A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 77 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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Title

Reserved
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Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 78 of 102
5 4 3 2 1
 5 4 3 2 1

D D

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Title

Reserved
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A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 79 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Title

Reserved
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A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 80 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Wistron Corporation A
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Title

Reserved
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A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 81 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

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Wistron Corporation A
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Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
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A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 82 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Wistron Corporation A
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Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 83 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Wistron Corporation A
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Title

Switchable GFX LCD(1/2)

Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 84 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title

Switchable GFX LCD(2/2)

Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 85 of 102
5 4 3 2 1
 5 4 3 2 1

ZZ.00PAD.7F1 ZZ.00PAD.7F1 ZZ.00PAD.7F1

H1 H5 H6
D HOLE335R178-GP HOLE335R178-GP HOLE335R178-GP D

1
ZZ.00PAD.7G1 ZZ.00PAD.7L1 ZZ.00PAD.7G1
H2 H3 H4
C HOLE335R229-GP HOLE335R197-GP HOLE335R229-GP C
1

1
34.4UV01.101 34.4UV01.101 34.4UV01.101 34.4UV01.101
HS1 HS2 HS3 HS4
B
STF237R128H42-5-GP STF237R128H42-5-GP STF237R128H42-5-GP STF237R128H42-5-GP B
1

1
34.4UV28.101 34.4UV28.101 34.4UV28.101 34.4UV28.101
<Core Design>

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Wistron Corporation A
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Title

UNUSED PARTS/EMI Capacitors

Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 86 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 87 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 88 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Finger Print

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 89 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Express Card

D D

C C

Blanking
B B

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title
Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 90 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Smart Card

D D

C C

Blanking
B B

<Core Design>

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Wistron Corporation A
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Title

Size Document Number

Reserved Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 91 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
B B

<Core Design>

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Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 92 of 102
5 4 3 2 1
 5 4 3 2 1

SSID = Docking

D D

C C

Blanking
B B

<Core Design>

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Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title

Size Document Number

Reserved Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 93 of 102
5 4 3 2 1
 A B C D E

SSID = Intel LAN

4 4

3 3

Blanking
2 2

<Core Design>

1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
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Title

Size Document Number

Reserved Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 94 of 102
A B C D E
 5 4 3 2 1

Port0 USB2.0x1 USB3.0 34

Intel CPU
Bay Trail-M
BGA1170 Port1 USB2.0x1 USB2.0 33
Package
25*27*1.4

Port2 USB2.0x1 CAMERA 52

D D

Port3 USB2.0 x 1 USB 2.0 HUB1 Port1

Sensor Hub
Port2 USB2.0 x 1

67

Port3 USB2.0 x 1 Touch Panel 52

Port4 USB2.0 x 1

35 IO Board

USB 2.0 HUB2 Port1 USB2.0 x 1 Card reader

2.0 ports(4) RealTek
RTS5176
AU6259B61

Port2 USB2.0 x 1 USB2.0

C C

Port3 USB2.0 x 1
Mini-Card
WLAN & BT
combo module

Port4

B B

A A

<Core Design>

Wistron Corporation
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Title

LAN Switch
Size Document Number Rev
A1
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 95 of 102
5 4 3 2 1
 5 4 3 2 1

D D

C C

Blanking
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<Core Design>

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Wistron Corporation A
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Title

PCH_XDP
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013Sheet 96 of 102
5 4 3 2 1
 A B C D E

4 4

3 3

Blanking
2 2

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Title

table of content
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 97 of 102
 5 4 3 2 1

D D

C C

B B

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Wistron Corporation A
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Title

Change History
Size Document Number Rev
A4
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 98 of 102
5 4 3 2 1
 5 4 3 2 1

Bay Trail - M POWER UP SEQUENCE DIAGRAM

Intel-Power Up Sequence with non-S0ix

D RTC_AUX_S5 D

RTC_RST#
/ RTC_TEST#
3D3V_AUX/5V_AUX

ECRST#

S5_ENABLE
DCBATOUT
5V_S5/3D3V_S5 -4
1D0V_S5
VIN 1D0V_S5
1D0V_S5_PWRGD
-10 -5 VOUT

SY8206D 1D0V_S5_PWRGD
AC AD+ 3V_5V_POK PGOOD
1D8V_S5 EN
Adapter in 50
1D8V_S5_PG
42 -3
RSMRST#_KBC 3D3V_S5

AD_OFF SWITCH
T1 = 10 us -7 VIN -2
42
3D3V_S5 -6 -3
3V_5V_EN EN (3D3V_S5) TLV70218D
1D0V_S5_PWRGD VOUT 1D8V_S5
EN
3D3V_AUX
3D3V_AUX -8 51

TPS51225
PM_SLP_S4# 3V_5V_POK -5 -1
PGOOD 1D8V_S5_PG
1D35V_S3 DCBATOUT
AD+ SWITCH VIN
DDR3_DRAM_PWROK 44 5V_AUX -8
5V_AUX
PM_SLP_S3#
-7
5V_S5 -2 PQ5102
C
3V_5V_EN C
VCC_CORE & GFX_CORE EN (5V_S5)
45 -6 1D8V_S5
IMVP_PWRGD
PQ5101
1D0V_S0
-10
1D0V_S0_PG
-10_AC
3D3V_DSW
DC 3V_5V_EN -7
1D05V_S0 BT+ BQ24715J
Battery
43
-9
1D05V_S0_PG (ALL_SYS_PWRGD to EC)
Charger
AC_IN
44 GPIO70 GPIO87
1D35V_S0 & 1D35V_CRT_S0

1D5V_S0
KBC_PWRBTN# 1b
1D8V_S0
1 GPI16 NPCE285P
2 GPIO14
PM_RSMRST#
RSMRST#
3D3V_S0 & 5V_S0
PM_SLP_S4# PM_PWRBTN#
GPIO01 GPIO23 PWRBTN# Bay Trail - M
0D675V_S0
PM_SLP_S3#
SYS_PWROK (Base on ALL_SYS_PWRGD to delay 110ms)
GPIO07 1c
GPIO02 Delay110ms GPIO77 24
3.3V Level COREPWROK
5 DDR3_VCCA_PWRGD 15
PMC_CORE_PWROK
SYS_PWROK PLTRST#
1.35V Level DDR3_VCCA_PWRGD
ALL_SYS_PWRGD
14 DRAM_VDD_S4_PWROK
PLT_RST#

DDR3_DRAM_PWROK
8a
PM_SLP_S4#
T1 = 110ms
2 4
1D35V_S3_PWRGD
3a
DCBATOUT

B 12 DCBATOUT B

VIN
3D3V_S0 0D675V_S0
S3 VTT 13
VIN
6
TPS51363 VCC_CORE
PM_SLP_S4# 1D35V_S3 OUTPUT
S5 VOUT 3 VR
ISL95833 6a
2 VDDQ_VREF
VTTREF 5 PM_SLP_S3#
VR_ON PGOOD IMVP_PWRGD
1D35V_S3_PWRGD
49 PGOOD 3a 46

3D3V_S5
8
1D0V_S5
VIN 1D05V_S0
6a 7 7a VOUT

SYW232 1D05V_S0_PG
IMVP_PWRGD TPS22965 1D0V_S0 PWRGD 1D0V_S0_PG PGOOD
EN
SWITCH 37 Circuit 37 51
8a

5V_S5
12
1D35V_S3 3D3V_S5 1D8V_S5
8a 9 10 11 TPS22966 5V_S0
SWITCH 36
1D05V_S0_PG TPS22965 1D35V_S0 TLV70215 1D5V_S0 TPS22966 1D8V_S0
A SWITCH 37 LDO 51 SWITCH 37 3D3V_S5 A
12
TPS22965 3D3V_S0
SWITCH 36

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<Core Design>

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Title

Power Sequence
Size Document Number Rev
A1
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 99 of 102
5 4 3 2 1
 5 4 3 2 1

Power Shape
Regulator LDO Switch
Adapter
DCBATOUT

+AD
D D

TPCC8131 ISL95833HRTZ
SY8208DQNC RT8207MZQW

TPCC8131
Charger VCC_CORE 1D0V_S5 1D35V_S3 0D675V_S0
BQ24727RGRR

Battery

TPS22966DPUR TPS22965DSGR
TPS51225CRUKR

1D0V_S0 1D35V_S0
C 5V_S5 3D3V_S5 C

TPS2544RTER SY6288DCAC TPS22966DPUR TPS22965DPUR SYW232DFC RT9025

B 5V_USB30 +5V_USB_PWR_2 1D8V_S5 B

5V_S0 3D3V_S0 1D05V_S0

RT9724GB TPS22966DPUR

LCDVDD 1D8V_S0

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Title

Power Block Diagram

Size Document Number Rev
A3
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 100 of 102
5 4 3 2 1
 A B C D E

PCH SMBus Block Diagram KBC SMBus Block Diagram 3D3V_GSEN2

3D3V_GSEN2
2.2KR
.
LIS3DHTR-GP
1
. GSENSOR_I2C_SCL
SCL
1

. GSENSOR_I2C_SDA
SDA

SMBus address:30
2N7002SPT

1D8V_S0 3D3V_S0 3D3V_S5 3D3V_S0

1D8V_S0 3D3V_S0
2.2KR 2.2KR 2.2KR 2.2KR
. DIMM SLOT1 .
NCT7718W
SMBCLK
SMB_CLK
. . PCU_SMB_CLK
SCL SMCLK1 . SML1_CLK
. . NCT_CLK
SCL
SMBDATA
SMB_DATA
. . PCU_SMB_DATA
SDA SMDAT1 . SML1_DATA
. . NCT_DATA
SDA

SMBus address:A0 SMBus address:98

2N7002SPT 2N7002SPT

Free Fall Sensor

. PCU_SMB_CLK
SCL
2
CPU . PCU_SMB_DATA
SDA
KBC
3D3V_AUX_S5 2

Bay Trail M SMBus address:32 NPCE285P

3.3KR

TouchPad Conn. Battery Conn.

PCU_SMB_CLK BAT_SCL 33R PBAT_SMBCLK1
PCU_SMB_DATA
SCL SMCLK0
BAT_SDA
. . PBAT_SMBDAT1
CLK_SMB
SDA SMDAT0 . . DAT_SMB
SMBus address:16
SMBus address:58 3D3V_AUX_KBC

1D8VV_S0 5V_S0 3.3KR

BQ24715J
. SCL
2.2KR 2.2KR . SDA

SMBus address:12
DDPB_CTRLCLK . PCH_HDMI_CLK
Level
DDC_CLK_HDMI
.
3

DDPB_CTRLDATA . PCH_HDMI_DATA
Shift
DDC_DATA_HDMI
. HDMI CONN
3

3D3V_MCU

Sensor Hub I2C Block Diagram

2.2KR

LSM303DTR
SCL . SCL
SDA . SDA

I2C address:3A

ST
STM32F103CBU6 L3GD20TR
. SCL
. SDA

I2C address:D2
4 4

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Wistron Corporation
SDA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

I2C address:30 Title

SMBUS BLOCK DIAGRAM

Size Document Number Rev
A2
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 101 of 102
A B C D E
 A B C D E

Thermal Block Diagram Audio Block Diagram

1 1

SPK-OUT-L-
SML1_CLK P2800_DXP SPK-OUT-L+
SPEAKER
SCL1 LEVEL D+
SML1_DATA SHIFT
SDA1
SPK-OUT-R-
NCT_DATA
NCT_CLK

System D-
P2800_DXN SPK-OUT-R+
SPEAKER
KBC Place near CPU
Thermal PWM CORE Codec
NPCE985P
NCT7718W 3D3V_S0 ALC3223
GPIO51
SDA HPOUT-L/PORT-T-L
PH
FAN_TACH1

SCL ALERT# HPOUT-R/PORT-T-R

5V
MIC2-L/PORT-F-L
HP
THERM_SYS_SHDN# PURE_HW_SHUTDOWN# 3V/5V
T_CRIT#
EN MIC2-R/PORT-F-R OUT
SENSE_A
2 2
VIN Put under CPU(T8 HW shutdown) 2N7002
FAN Conn.
3D3V_S0 MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
MIC
SENSE_A IN

LINE2-L/PORT-E-L
LINE2-R/PORT-E-R
AMIC

3 3

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EV

Wistron Corporation
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Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
Redwood 11.6" X01
Date: Tuesday, December 17, 2013 Sheet 102 of 102
A B C D E