DL05 User Manual PDF

DL05 User Manual
1
Manual Revisions
If you contact us in reference to this manual, remember to include the revision number.
Title: DL05 Micro PLC User Manual

Manual Number: D0USERM
Edition/Rev Date Description of Changes

Original 12/98 original issue
2nd Edition 2/00 added pid chapter, analog module chapter, and
memory cartridge chapter
2nd Edition, 7/00 added DC power
Rev. A
3rd Edition 11/01 removed MC and analog module chapters, corrected drum in-
struction, several minor corrections, added PLC weights, EU di-
rective additions
3rd Edition, 7/02 Added new discrete option modules
Rev. A
1 i
Table of Contents
Chapter 1: Getting Started
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
The Purpose of this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Where to Begin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Supplemental Manuals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Conventions Used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Key Topics for Each Chapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
DL05 Micro PLC Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
The DL05 Micro PLC Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Programming Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DirectSOFT Programming for Windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Handheld Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
I/O Selection Quick Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Quick Start for PLC Checkout and Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Step 1: Unpack the DL05 Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Step 2: Connect Switches to Input Terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Step 3: Connect the Power Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Step 4: Connect the Programming Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Step 5: Switch on the System Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Step 6: Initialize Scratchpad Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Step 7: Enter a Ladder Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Steps to Designing a Successful System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 1 :Review the Installation Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 2: Understand the PLC Setup Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 3: Review the I/O Selection Criteria . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 4: Choose a System Wiring Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 5: Understand the System Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Step 6: Review the Programming Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Step 7: Choose the Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Step 8: Understand the Maintenance and Troubleshooting Procedures . . . . . . . . . . . . . . . . . . . . 112
Questions and Answers about DL05 Micro PLCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Chapter 2: Installation, Wiring, and Specifications

Safety Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Plan for Safety . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Three Levels of Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Orderly System Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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System Power Disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Emergency Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Orientation to DL05 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Connector Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mounting Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Unit Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Enclosures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Panel Layout & Clearances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Using Mounting Rails . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Environmental Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Agency Approvals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Wiring Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
Fuse Protection for Input Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
External Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
Planning the Wiring Routes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 211
Fuse Protection for Input and Output Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
I/O Point Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
System Wiring Strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
PLC Isolation Boundaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Connecting Operator Interface Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Connecting Programming Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Sinking / Sourcing Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
I/O Common Terminal Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
Connecting DC I/O to Solid State Field Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Solid State Input Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Solid State Output Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Relay Output Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Surge Suppresion For Inductive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
Prolonging Relay Contact Life . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
DC Input Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
DC Output Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
High-Speed I/O Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Glossary of Specification Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Wiring Diagrams and Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
D005AR I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
D005AR General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
AC Input Specifications X0 X7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
Relay Output Specifications Y0 Y5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
D005DR I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
D005DR General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
DC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Relay Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
D005AD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
D005AD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
AC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
DC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
D005DD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
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D005DD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233

D005AA I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
D005AA General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
AC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
AC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
D005DA I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
D005DA General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
AC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237
D005DRD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
D005DRD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Relay Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
D005DDD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
D005DDD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
D016ND3 DC Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
D010TD1 DC Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
D016TD1 DC Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
D010TD2 DC Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
D016TD2 DC Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 247
D007CDR DC Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
D008TR Relay Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
D008CDD1 DC Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
I/O Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
Module I/O Points and Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
Chapter 3: High-Speed Input and Pulse Output Features

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Built-in Motion Control Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Availability of HSIO Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Dedicated High-Speed I/O Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Wiring Diagrams for Each HSIO Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Choosing the HSIO Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Understanding the Six Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Default Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Configuring the HSIO Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Configuring Inputs X0 X2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Mode 10: High-Speed Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Interfacing to Counter Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Setup for Mode 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Presets and Special Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Preset Data Starting Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Using Fewer than 24 Presets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Equal Relay Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Calculating Your Preset Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
X Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
Writing Your Control Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
Program Example: Counter Without Preset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
Counter With Presets Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
Counter With Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
Troubleshooting Guide for Mode 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
Mode 20: Quadrature Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
Quadrature Encoder Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318
Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Interfacing to Encoder Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Setup for Mode 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Writing Your Control Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Quadrature Counter w/Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Counter Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Mode 30: Pulse Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324
Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Interfacing to Drive Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
Motion Profile Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Physical I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Logical I/O Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
Setup for Mode 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328
Profile / Velocity Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328
Profile Parameter Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Trapezoidal Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Registration Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Velocity Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 329
Choosing the Profile Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Trapezoidal Profile Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Registration and Home Search Profiles Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Velocity Profile Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330
Trapezoidal Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331
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Trapezoidal Profile Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331

Trapezoidal Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
Preload Position Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333
Registration Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
Registration Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
Registration Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
Home Search Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 337
Velocity Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Velocity Profile Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Velocity Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340
Pulse Output Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
Mode 40: High-Speed Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
Setup for Mode 40 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
Interrupts and the Ladder Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
External Interrupt Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Timed Interrupt Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
X Input / Timed INT Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
Independent Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346
External Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
Timed Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 348
Mode 50: Pulse Catch Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Pulse Catch Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 349
Setup for Mode 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
Pulse Catch Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
Mode 60: Discrete Inputs with Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Input Filter Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 352
Setup for Mode 60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Filtered Inputs Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 354
Chapter 4: CPU Specifications and Operation

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
DL05 CPU Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
CPU Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
CPU Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
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Communication Port Pinout Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Connecting the Programming Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
CPU Setup Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Mode Switch Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Changing Modes in the DL05 PLC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Mode of Operation at Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Clearing an Existing Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Initializing System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Setting Retentive Memory Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Using a Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 410
CPU Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411
CPU Operating System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 411
Program Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
Run Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412
Read Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413
Service Peripherals and Force I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413
Update Special Relays and Special Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414
Solve Application Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 414
Write Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
I/O Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Is Timing Important for Your Application? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Normal Minimum I/O Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
Normal Maximum I/O Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416
Improving Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
CPU Scan Time Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
Reading Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
Writing Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418
Application Program Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 419
PLC Numbering Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
PLC Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
VMemory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Binary-Coded Decimal Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Hexadecimal Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Octal Numbering System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Discrete and Word Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
V Memory Locations for Discrete Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Input Points (X Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
Output Points (Y Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
Control Relays (C Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
Timers and Timer Status Bits (T Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
Timer Current Values (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
Counters and Counter Status Bits (CT Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
Counter Current Values (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
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Word Memory (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425

Stages (S Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
Special Relays (SP Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
DL05 System V-memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
System Parameters and Default Data Locations (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
DL05 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
X Input Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
Y Output Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
Stage Control / Status Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
Control Relay Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
Timer Status Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
Counter Status Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
Network Configuration and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
Configuring the DL05s Comm Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
Networking DL05 to DL05 RS232C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
Networking PC to DL05s RS422 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
Networking DL05 Master to Other PLCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
MODBUS Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434
DirectNET Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435
Network Slave Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436
MODBUS Function Codes Supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436
Determining the MODBUS Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 436
If Your Host Software Requires the Data Type and Address... . . . . . . . . . . . . . . . . . . . . . . . . . . . . 437
Example 1: V2100 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
Example 2: Y20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
Example 3: T10 Current Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
Example 4: C54 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
If Your MODBUS Host Software Requires an Address ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 439
Example 1: V2100 584/984 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Example 2: Y20 584/984 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Example 3: T10 Current Value 484 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Example 4: C54 584/984 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Determining the DirectNET Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 440
Network Master Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 441
Step 1: Identify Master Port # and Slave # . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442
Step 2: Load Number of Bytes to Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 442
Step 3: Specify Master Memory Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
Step 4: Specify Slave Memory Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443
Communications from a Ladder Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
Multiple Read and Write Interlocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
Chapter 5: Standard RLL Instructions

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
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Using Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

END Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Simple Rungs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Normally Closed Contact . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Contacts in Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Midline Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Parallel Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Joining Series Branches in Parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Joining Parallel Branches in Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Combination Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Comparative Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Boolean Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Immediate Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Store (STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Store Not (STRN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
Or Not (ORN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
And Not (ANDN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 511
And Store (AND STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512
Or Store (OR STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 512
Out (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
Or Out (OR OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
Not (NOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
Positive Differential (PD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514
Store Positive Differential (STRPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515
Store Negative Differential (STRND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515
Or Positive Differential (ORPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
Or Negative Differential (ORND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 516
And Positive Differential (ANDPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 517
And Negative Differential (ANDND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 517
Set (SET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
Reset (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 518
Pause (PAUSE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 519
Comparative Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
Store If Equal (STRE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
Store If Not Equal (STRNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 520
Or If Equal (ORE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
Or If Not Equal (ORNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521
And If Equal (ANDE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
And If Not Equal (ANDNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Store (STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
Store Not (STRN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 523
Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524
Or Not (ORN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525
And Not (ANDN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525
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Immediate Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526

Store Immediate (STRI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
Store Not Immediate (STRNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
Or Immediate (ORI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
Or Not Immediate (ORNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526
OR Immediate Instructions Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
And Immediate (ANDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
And Not Immediate (ANDNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527
Out Immediate (OUTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528
Or Out Immediate (OROUTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528
Set Immediate (SETI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 529
Reset Immediate (RSTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 529
Timer, Counter and Shift Register Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 530
Using Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 530
Timer (TMR) and Timer Fast (TMRF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
Timer Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 532
Timer Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 532
Accumulating Timer (TMRA) Accumulating Fast Timer (TMRAF) . . . . . . . . . . . . . . . . . . . . . . . . . 533
Accumulating Timer Example using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534
Accumulator Timer Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534
Using Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 535
Counter (CNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 536
Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 537
Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 537
Stage Counter (SGCNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 538
Stage Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 539
Stage Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 539
Up Down Counter (UDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 540
Up / Down Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541
Up / Down Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541
Shift Register (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 542
Accumulator / Stack Load and Output Data Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 543
Using the Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 543
Copying Data to the Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 543
Changing the Accumulator Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 544
Using the Accumulator Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545
Using Pointers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 546
Load (LD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 548
Load Double (LDD ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 549
Load Formatted (LDF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 550
Load Address (LDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 551
Out (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552
Out Double (OUTD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 552
Out Formatted (OUTF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553
Pop (POP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553
Pop Instruction Continued . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 554
Logical Instructions (Accumulator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555
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And Double (ANDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556

Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557
Or Double (ORD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 558
Exclusive Or (XOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 559
Exclusive Or Double (XORD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 560
Compare (CMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 561
Compare Double (CMPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 562
Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563
Add (ADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563
Add Double (ADDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 564
Subtract (SUB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565
Subtract Double (SUBD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 566
Multiply (MUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567
Multiply Double (MULD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 568
Divide (DIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 569
Divide Double (DIVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 570
Increment (INC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 571
Decrement (DEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 571
Increment Binary (INCB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572
Decrement Binary (DECB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 572
Add Binary (ADDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 573
Subtract Binary (SUBB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 574
Multiply Binary (MULB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575
Divide Binary (DIVB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 576
Bit Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577
Sum (SUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577
Shift Left (SHFL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577
Shift Right (SHFR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 579
Encode (ENCO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 580
Decode (DECO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581
Number Conversion Instructions (Accumulator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 582
Binary (BIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 582
Binary Coded Decimal (BCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 583
Invert (INV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 584
ASCII to HEX (ATH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585
HEX to ASCII (HTA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 586
Gray Code (GRAY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 588
Shuffle Digits (SFLDGT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 589
Shuffle Digits Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 589
Table Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 591
Move (MOV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 591
Move Memory Cartridge / Load Label (MOVMC), (LDLBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 592
Copy Data From a Data Label Area to V Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 593
CPU Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594
No Operation (NOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594
End (END) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594
Stop (STOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594
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Reset Watch Dog Timer (RSTWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 595

Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 596
For / Next (FOR) (NEXT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 596
Goto Subroutine (GTS) (SBR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 598
Subroutine Return (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 598
Subroutine Return Conditional (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 598
Master Line Set (MLS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5101
Master Line Reset (MLR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5101
Understanding Master Control Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5101
MLS/MLR Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5102
Interrupt Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5103
Interrupt (INT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5103
Interrupt Return (IRT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5103
Interrupt Return Conditional (IRTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5103
Enable Interrupts (ENI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5103
Disable Interrupts (DISI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5104
External Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5104
Timed Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5105
Independent Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5105
Message Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5106
Fault (FAULT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5106
Fault Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5106
Data Label (DLBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5107
ASCII Constant (ACON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5107
Numerical Constant (NCON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5107
Data Label Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5108
Print Message (PRINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5109
Network Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5113
Read from Network (RX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5113
Write to Network (WX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5115
Chapter 6: Drum Instruction Programming

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Drum Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Drum Chart Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Output Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Step Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Drum Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Timer-Only Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Timer and Event Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Event-Only Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Counter Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Last Step Completion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Overview of Drum Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
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Drum Instruction Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Powerup State of Drum Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Drum Control Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 610
Drum Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 610
Self-Resetting Drum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611
Initializing Drum Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611
Using Complex Event Step Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 611
Drum Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 612
Timed Drum with Discrete Outputs (DRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 612
Event Drum (EDRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 614
Handheld Programmer Drum Mnemonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 616
Chapter 7: RLLPLUS Stage Programming

Introduction to Stage Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Overcoming Stage Fright . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Learning to Draw State Transition Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Introduction to Process States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
The Need for State Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
A 2State Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
RLL Equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Stage Equivalent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Lets Compare . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Initial Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
What Stage Bits Do . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Stage Instruction Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Using the Stage Jump Instruction for State Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Stage Jump, Set, and Reset Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Stage Program Example: Toggle On/Off Lamp Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
A 4State Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Four Steps to Writing a Stage Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Stage Program Example: A Garage Door Opener . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710
Garage Door Opener Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710
Draw the Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710
Draw the State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 711
Add Safety Light Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 712
Modify the Block Diagram and State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 712
Using a Timer Inside a Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 713
Add Emergency Stop Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 714
Exclusive Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 714
Stage Program Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 715
Stage Program Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 715
How Instructions Work Inside Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 716
Using a Stage as a Supervisory Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 717
Stage Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 717
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Power Flow Transition Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 718

Stage View in DirectSOFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 718
Parallel Processing Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 719
Parallel Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 719
Converging Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 719
Convergence Stages (CV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 719
Convergence Jump (CVJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 720
Convergence Stage Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 720
RLLPLUS (Stage) Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 721
Staget (SG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 721
Initial Staget (ISG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 722
JUMP (JMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 722
Not Jump (NJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 722
Converge Stage (CV) and Converge Jump (CVJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 723
Questions and Answers about Stage Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725
Chapter 8: PID Loop Operation

DL05 PID Loop Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
The Basics of PID Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Loop Setup Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Loop Table and Number of Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
PID Error Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Establishing the Loop Table Size and Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Loop Table Word Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
PID Mode Setting 1 Bit Descriptions (Addr + 00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
PID Mode Setting 2 Bit Descriptions (Addr + 01) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 810
Mode / Alarm Monitoring Word (Addr + 06) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 811
Ramp / Soak Table Flags (Addr + 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 811
Ramp/Soak Table Location (Addr + 34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 812
Ramp/Soak Table Programming Error Flags (Addr + 35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 812
Loop Sample Rate and Scheduling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813
Loop Sample Rates Addr + 07 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813
Choosing the Best Sample Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 813
Programming the Sample Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 814
PID Loop Effect on CPU Scan Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 815
Ten Steps to Successful Process Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817
Step 1: Know the Recipe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817
Step 2: Plan Loop Control Strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817
Step 3: Size and Scale Loop Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817
Step 4: Select I/O Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 817
Step 5: Wiring and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
Step 6: Loop Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
Step 7: Check Open Loop Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
Step 8: Loop Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
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Step 9: Run Process Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818

Step 10: Save Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818
Basic Loop Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 819
Data Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 819
Data Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 819
Direct Access to Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 820
Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 821
CPU Modes and Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 822
How to Change Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 823
Operator Panel Control of PID Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 824
PLC Modes Effect on Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 824
Loop Mode Override . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 824
Bumpless Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825
PID Loop Data Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 826
Loop Parameter Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 826
Choosing Unipolar or Bipolar Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 826
Handling Data Offsets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 827
Setpoint (SP) Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 827
Remote Setpoint (SP) Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 828
Process Variable (PV) Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 828
Control Output Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 829
Error Term Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 830
PID Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 831
Position Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 831
Velocity Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 832
Direct-Acting and Reverse-Acting Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 833
P-I-D Loop Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 834
Using a Subset of PID Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835
Derivative Gain Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 836
Bias Term . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 836
Bias Freeze . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 837
Loop Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 838
Open-Loop Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 838
Manual Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 839
Auto Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 840
Tuning Cascaded Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 844
PV Analog Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 845
The DL05 Built-in Analog Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 845
Creating an Analog Filter in Ladder Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 846
Feedforward Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 847
Feedforward Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 848
Time-Proportioning Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 849
On/Off Control Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 850
Cascade Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 851
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 851
Cascaded Loops in the DL05 CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 852
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Process Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 853

PV Absolute Value Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 854
PV Deviation Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 854
PV Rate-of-Change Alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 855
PV Alarm Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 856
Alarm Programing Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 856
Ramp/Soak Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 857
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 857
Ramp/Soak Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 858
Ramp/Soak Table Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 860
Ramp/Soak Generator Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 860
Ramp/Soak Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 860
Ramp/Soak Profile Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 861
Ramp/Soak Programming Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 861
Testing Your Ramp/Soak Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 861
Troubleshooting Tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 862
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 863
Glossary of PID Loop Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 864
Chapter 9: Maintenance and Troubleshooting

Hardware System Maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
CPU Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Communications Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
I/O Point Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Noise Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 910
Machine Startup and Program Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 911
Appendix A: Auxiliary Functions

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A2
Purpose of Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A2
Accessing AUX Functions via DirectSOFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A3
Accessing AUX Functions via the Handheld Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A3
AUX 2* RLL Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 21 Check Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 22 Change Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 23 Clear Ladder Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 24 Clear Ladders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 3* V-memory Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 31 Clear V Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 4* I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
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AUX 41 Show I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4

AUX 5* CPU Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 51 Modify Program Name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 53 Display Scan Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 54 Initialize Scratchpad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 55 Set Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 56 CPU Network Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 57 Set Retentive Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 58 Test Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 59 Bit Override . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 5B Counter Interface Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7
AUX 5D Select PLC Scan Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7
AUX 6* Handheld Programmer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 61 Show Revision Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 62 Beeper On/Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 65 Run Self Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 7* EEPROM Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
Transferrable Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 71 CPU to HPP EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 72 HPP EEPROM to CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 73 Compare HPP EEPROM to CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 74 HPP EEPROM Blank Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 75 Erase HPP EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 76 Show EEPROM Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 8* Password Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 81 Modify Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 82 Unlock CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A10
AUX 83 Lock CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A10
Appendix B: DL05 Error Codes
Appendix C: Instruction Execution Times

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C2
V-Memory Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C2
V-Memory Bit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C2
How to Read the Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C2
Instruction Execution Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C3
Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C3
Comparative Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C4
Immediate Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C10
Timer, Counter, and Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C10
Accumulator Data Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C11
Logical Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C12
Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C12
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Bit Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C14

Number Conversion Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C14
Table Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C14
CPU Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C15
Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C15
Interrupt Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C15
Network Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C15
Message Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C16
RLLPLUS Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C16
Drum Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C16
Appendix D: Special Relays

DL05 PLC Special Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D2
Startup and Real-Time Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D2
CPU Status Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D2
System Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D3
Accumulator Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D3
HSIO Pulse Output Relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D4
Communication Monitoring Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D4
Equal Relays for HSIO Mode 10 Counter Presets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D4
Appendix E: DL05 Product Weights

Product Weight Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E2
Appendix F: European Union Directives (CE)

European Union (EU) Directives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F2
Member Countries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F2
Special Installation Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F3
Other Sources of Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F4
Basic EMC Installation Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F4
Enclosures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F4
Suppression and Fusing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F5
Internal Enclosure Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F5
Equipotential Grounding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F6
Communications and Shielded Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F6
Analog and RS232 Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7
Multidrop Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7
Shielded Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7
within Enclosures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7
Network Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F7
DC Powered Versions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F8
Items Specific to the DL 05 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F9
11
Getting Started
In This Chapter. . . .
Introduction
Conventions Used
DL05 Micro PLC Components
Programming Methods
I/O Selection Quick Chart
Quick Start for PLC Checkout and Programming
Steps to Designing a Successful System
Questions and Answers about DL05 Micro PLCs
12
Getting Started
Introduction
Getting Started
The Purpose of Thank you for purchasing a DL05 Micro PLC. This manual shows you how to install,
this Manual program, and maintain all the Micro PLCs in the DL05 family. It also helps you
understand how to interface them to other devices in a control system.This manual
contains important information for personnel who will install DL05 PLCs, and for the
PLC programmer. If you understand PLC systems our manuals will provide all the
information you need to get and keep your system up and running.
Where to Begin If you already understand the DL05 Micro PLC please read Chapter 2, Installation,
Wiring, and Specifications, and proceed on to other chapters as needed. Be sure to
keep this manual handy for reference when you run into questions. If you are a new
DL05 customer, we suggest you read this manual completely so you can understand
the wide variety of features in the DL05 family of products. We believe you will be
pleasantly surprised with how much you can accomplish with our products
Supplemental The D0OPTIONSM manual will be most helpful to select and use any of the
Manuals optional modules that are available for the DL05 PLC which includes the analog I/O
modules. If you have purchased operator interfaces or DirectSOFT, you will need
to supplement this manual with the manuals that are written for these products.
Technical Support We realize that even though we strive to be the best, we may have arranged our
information in such a way you cannot find what you are looking for. First, check these
resources for help in locating the information:
S Table of Contents chapter and section listing of contents, in the front
of this manual
S Appendices reference material for key topics, near the end of this
manual
You can also check our online resources for the latest product support information:
S Internet the address of our website is:
In Brazil: http://www.soliton.com.br
If you still need assistance, please call us at 7708444200. Our technical support
team will be available to work with you in answering your questions. They are
available Monday through Friday from 9:00 A.M. to 6:00 P.M. Eastern Standard
Time. If you have a comment or question about any of our products, services, or
manuals, please fill out and return the Suggestions card that was shipped with this
manual.
13
Getting Started
Conventions Used
Getting Started
When you see the light bulb icon in the left-hand margin, the paragraph to its
immediate right will give you a special tip.
The word TIP: in boldface will mark the beginning of the text.
When you see the notepad icon in the left-hand margin, the paragraph to its
immediate right will be a special note.
The word NOTE: in boldface will mark the beginning of the text.
When you see the exclamation mark icon in the left-hand margin, the paragraph to
its immediate right will be a warning. This information could prevent injury, loss of
property, or even death (in extreme cases).
The word WARNING: in boldface will mark the beginning of the text.
Key Topics for The beginning of each chapter will list the
Each Chapter key topics that can be found in that 1
chapter.
14
Getting Started
DL05 Micro PLC Components

Getting Started
The DL05 Micro PLC family is a versatile

product line that provides a wide variety of
features in a very compact footprint. The
PLCs are small, yet offer many features
usually found in larger, more expensive
systems. These include a removeable
connector, and two RS-232C
communication ports.
The DL05 The DL05 Micro PLC family includes eight different versions. All have the same
Micro PLC Family appearance and CPU performance. The CPU offers the same instruction set as our
popular DL240 CPU, plus several more instructions specifically designed for
machine control applications. All DL05 PLCs have two RS232C communications
ports. Units with DC inputs have selectable high-speed input features on three input
points. Units with DC outputs offer selectable pulse output capability on the first and
second output points. All DL05 Micro PLCs offer a large amount of program memory,
a substantial instruction set and advanced diagnostics. Details of these features and
more are covered in Chapter 4, CPU Specifications and Operation. The eight types
of DL05 Micro PLCs provide a variety of Input/Output choices, listed in the following
table.
DL05 Discrete Discrete External High-Speed Pulse

Part Number Input Type Output Type Power Input Output
D005AR AC Relay 95240 VAC No No
D005DR DC Relay 95240 VAC Yes No
D005AD AC DC 95240 VAC No Yes
D005DD DC DC 95240 VAC Yes Yes
D005AA AC AC 95240 VAC No No
D005DA DC AC 95240 VAC Yes No
D005DRD DC Relay 1224 VDC Yes No
D005DDD DC DC 1224 VDC Yes Yes
Programming Methods
Two programming methods are available: RLL (Relay Ladder Logic) and RLL PLUS.
RLL PLUS combines the added feature of flow chart programming (Staget) to the
standard RLL language. Both the DirectSOFT programming package and the
handheld programmer support RLL PLUS as well as standard RLL instructions.
DirectSOFT The DL05 Micro PLC can be programmed with one of the most advanced
Programming for programming packages in the industry DirectSOFT, a Windows-based software
Windows package that supports familiar features such as cut-and-paste between
applications, point-and-click editing, viewing and editing multiple application
programs at the same time, etc.
15
Getting Started
DirectSOFT universally supports the DirectLOGIC CPU families. This means you
can use the full version of DirectSOFT to program DL05, DL105, DL205, DL305,
Getting Started
DL405 or any new CPUs we may add to our product line. (Upgrade software may be
required for new CPUs as they become available.). A separate manual discusses
DirectSOFT programming software. DirectSOFT version 2.4 or later is needed to
program the DL05.
Handheld All DL05 Micro PLCs have built-in programming ports for use with the handheld
Programmer programmer (D2HPP), the same programmer used with the DL105 and DL205
families. The handheld programmer can be used to create, modify and debug your
application program. A separate manual discusses the Handheld Programmer. Only
D2HPPs with firmware version 1.09 or later will program the DL05.
I/O Selection Quick Chart

The eight versions of the DL05 have Input/Output circuits which can interface to a
wide variety of field devices. In several instances a particular Input or Output circuit
can interface to either DC or AC voltages, or both sinking and sourcing circuit
arrangements. Check this chart carefully to find the proper DL05 Micro PLC to
interface to the field devices in your application.
DL05 INPUTS OUTPUTS

Partt Number
P N b I/O type / I/O type / Sink /
Sink / Voltage Ranges Voltage / Current
commons Source commons Source Ratings
D005AR AC / 2 90 120 VAC Relay / 2 Sink or 6 27 VDC, 2A *
Source 6 240 VAC, 2A *
D005DR DC / 2 Sink or 12 24 VDC Relay / 2 Sink or 6 27 VDC, 2A *
Source Source 6 240 VAC, 2A *
D005AD AC / 2 90 120 VAC DC / 1 Sink 6 27 VDC, 0.5A (Y0Y2)
6 27 VDC, 1.0A (Y3Y5)
D005DD DC / 2 Sink or 12 24 VDC DC / 1 Sink 6 27 VDC, 0.5A (Y0Y2)
Source 6 27 VDC, 1.0A (Y3Y5)
D005AA AC / 2 90 120 VAC AC / 2 17 240 VAC, 47 63 Hz
0.5A *
D005DA DC / 2 Sink or 12 24 VDC AC / 2 17 240 VAC, 47 63 Hz
Source 0.5A *
D005DRD DC / 2 Sink or 12 24 VDC Relay / 2 Sink or 6 27 VDC, 2A *
Source Source 6 240 VAC, 2A *
D005DDD DC / 2 Sink or 12 24 VDC DC / 1 Sink 6 27 VDC, 0.5A (Y0Y2)
Source 6 27 VDC, 1.0A (Y3Y5)
* See Chapter 2 Specifications for your particular DL05 version.
16
Getting Started
Quick Start for PLC Checkout and Programming

Getting Started
If you have experience with PLCs, or if you just want to setup a quick example, this
example is for you! This example is not intended to tell you everything you need to
start-up your system, warnings and helpful tips are in the rest of the manual. It is only
intended to give you a general picture of what you will need to do to get your system
powered-up.
Step 1: Unpack the DL05 Equipment

Unpack the DL05 and gather the parts necessary to build this demonstration
system. The recommended components are:
S DL05 Micro PLC

S AC power cord or DC power supply
S Toggle switches (see Step 2 on next page).
S Hook-up wire, 16-22 AWG
S DL05 User Manual (this manual)
S A small screwdriver, 5/8 flat or #1 Philips type
You will need at least one of the following programming options:
S DirectSOFT Programming Software, DirectSOFT Manual, and a
programming cable (connects the DL05 to a personal computer),or
S D2HPP Handheld Programmer (comes with programming cable), and
the Handheld Programmer Manual
17
Getting Started
Step 2: Connect Switches to Input Terminals
Getting Started
To finish this quick-start exercise or study other examples in this manual, youll need
to connect some input switches as shown below. If you have DC inputs you will need
to use the FA24PS (24VDC) or another external 12-24VDC power supply. Be sure
to follow the instructions in the accompanying WARNING note.
D005DR, D005DD, D005DA
D005DRD, D005DDD
(DC input versions, 1224VDC)
1224VDC
Power Supply Toggle Switches, UL Listed
D005AR, D005AD, D005AA

(AC input versions, 120VAC only)
WARNING: DO NOT wire the

toggle switches as shown to
240VAC-powered units. The
discrete inputs will only accept
120VAC nominal. Also, remove
power and unplug the DL05 when
wiring the switches. Only use
UL-approved switches rated for at
least 250VAC, 1A for AC inputs.
Toggle Switches, UL Listed Firmly mount the switches before
using.
18
Getting Started
Step 3: Connect the Power Wiring

Getting Started
Connect the power input wiring for the DL05. Observe all precautions stated earlier
in this manual. For more details on wiring, see Chapter 2 on Installation, Wiring, and
Specifications. When the wiring is complete, close the connector covers. Do not
apply power at this time.
110/220 VAC Power Input 12/24 VDC Power Input
LG N +G
95 240 VAC 12 24 VDC
Step 4: Connect the Programming Device

Most programmers will use DirectSOFT programming software, installed on a
personal computer. Or, you may need the portability of the Handheld Programmer.
Both devices will connect to COM port 1 of the DL05 via the appropriate cable.
Use cable part #

D2DSCBL
(cable comes with HPP)
For replacement
cable, use part #
DV1000CBL
19
Getting Started
Step 5: Switch on the System Power
Getting Started
Apply power to the system and ensure the PWR indicator on the DL05 is on. If not,
remove power from the system and check all wiring and refer to the troubleshooting
section in Chapter 9 for assistance.
Step 6: Initialize Scratchpad Memory

Its a good precaution to always clear the system memory (scratchpad memory) on a
new DL05. There are two ways to clear the system memory:
S In DirectSOFT, select the PLC menu, then Setup, then Initialize
Scratchpad. For additional information, see the DirectSOFT Manual.
S For the Handheld Programmer, use the AUX key and execute AUX 54.
See the Handheld Programmer Manual for additional information.
Step 7: Enter a Ladder Program

At this point, DirectSOFT programmers need to refer to the Quick Start Tutorial in
the DirectSOFT Manual. There you will learn how to establish a communications link
with the DL05 PLC, change CPU modes to Run or Program, and enter a program.
If you are learning how to program with the Handheld Programmer, make sure the
CPU is in Program Mode (the RUN LED on the front of the DL05 should be off). If the
RUN LED is on, use the MODE key on the Handheld Programmer to put the PLC in
Program Mode. Enter the following keystrokes on the Handheld Programmer.
Clear the Program
Equivalent DirectSOFT display CLR CLR
C E AUX ENT ENT CLR

X0 Y0 2 4
OUT
$ A Move to the first
NEXT ENT
STR 0 address and enter
X0 contact
END
GX A Enter output Y0
ENT
OUT 0
E N D Enter the END

SHFT ENT
4 TMR 3 statement
After entering the simple example program put the PLC in Run mode by using the
Mode key on the Handheld Programmer.
The RUN indicator on the PLC will illuminate indicating the CPU has entered the Run
mode. If not, repeat this step, ensuring the program is entered properly or refer to the
troubleshooting guide in chapter 8.
After the CPU enters the run mode, the output status indicator for Y0 should follow
the switch status on input channel X0. When the switch is on, the output will be on.
110
Getting Started
Steps to Designing a Successful System

Getting Started
Step 1: Always make safety the first priority in any

Review the system design. Chapter 2 provides
Installation several guidelines that will help you
Guidelines design a safer, more reliable system. This
chapter also includes wiring guidelines for
the various versions of the DL05 PLC.
Step 2: The PLC is the heart of your automation

Understand the system. Make sure you take time to
PLC Setup understand the various features and setup
Procedures requirements.
Step 3: There are many considerations involved PLC

Input
Review the I/O when you select your I/O type and field
Selection Criteria devices. Take time to understand how the
various types of sensors and loads can +
Input
affect your choice of I/O type. Sensing

Common
Step 4: It is important to understand the various AC

Power
Choose a System system design options that are available Loads
Wiring Strategy before wiring field devices and field-side
power supplies to the Micro PLC. DL05 Power Input 6 Outputs Commons
PLC
8 Inputs Commons
+24 VDC
Step 5: Before you begin to enter a program, it is

Understand the very helpful to understand how the DL05
Power up
System Operation system processes information. This
involves not only program execution
Initialize hardware
steps, but also involves the various modes
of operation and memory layout
characteristics.
111
Getting Started
Step 6: The DL05 PLC instruction set provides for three main approaches to solving the
Review the application program, depicted in the figure below.
Getting Started
Programming
Concepts S RLL diagram-style programming is the best tool for solving boolean logic
and general CPU register/accumulator manipulation. It includes dozens
of instructions, which will also be needed to augment drums and stages.
S The Timer/Event Drum Sequencer features up to 16 steps and offers
both time and/or event-based step transitions. The DRUM instruction is
best for a repetitive process based on a single series of steps.
S Stage programming (also called RLL Plus) is based on state-transition
diagrams. Stages divide the ladder program into sections which
correspond to the states in a flow chart you draw for your process.
Standard RLL Programming Timer/Event Drum Sequencer Stage Programming

(see Chapter 5) (see Chapter 6) (see Chapter 7)
PushUP RAISE
X0
LDD
V1076
DOWN LIGHT UP
CMPD
K309482
SP62 Y0
LOWER Push
OUT DOWN
After reviewing the programming concepts above, youll be equipped with a variety
of tools to write your application program.
Step 7: Once you have installed the Micro PLC TMR T1

Choose the and understand the main programming K30
Instructions concepts, you can begin writing your CNT CT3
application program. At that time you will K10
begin to use one of the most powerful
instruction sets available in a small PLC.
Step 8: Sometimes equipment failures occur

Understand the when we least expect it. Switches fail,
Maintenance and loads short and need to be replaced, etc.
Troubleshooting In most cases, the majority of the
Procedures troubleshooting and maintenance time is
spent trying to locate the problem. The
DL05 Micro PLC has many built-in
features such as error codes that can help
you quickly identify problems.
112
Getting Started
Questions and Answers about DL05 Micro PLCs

Getting Started
Q. What is the instruction set like?

A. The instruction set is very close to our popular DL240 CPU. However, there are
significant additions, such as the drum instruction, networking, and High-Speed I/O
capabilities.
Q. Do I have to buy the full DirectSOFT programming package to program the DL05?
A. No. We offer a DL05-specific version of DirectSOFT thats very affordable.
Q. Is the DL05 expandable?

A. No, the DL05 series are stand-alone PLCs. However, our DL205 system is
expandable, yet very compact and affordable.
Q. Does the DL05 have motion control capability?

A. Yes. The High-Speed I/O features offer either encoder inputs with high-speed
counting and presets with interrupt, or a pulse/direction output for stepper control.
Three types of motion profiles are available, which are explained in Chapter 3.
Q. Are the ladder programs stored in a removable EEPROM?

A. The DL05 contains a non-removable FLASH memory for program storage, which
may be written and erased thousands of times. You may transfer programs to/from
DirectSOFT on a PC, or the HPP (which does support a removable EEPROM).
Q. Does the DL05 contain fuses for its outputs?

A. There are no output circuit fuses. Therefore, we recommend fusing each channel,
or fusing each common. See Chapter 2 for I/O wiring guidelines.
Q. Is the DL05 Micro PLC U.L.R approved?

A. The Micro PLC has met the requirements of UL (Underwriters Laboratories, Inc.),
and CUL (Canadian Underwriters Laboratories, Inc.).
Q. Does the DL05 Micro PLC comply with European Union (EU) Directives?
A. The Micro PLC has met the requirements of the European Union Directives (CE).
113
Getting Started
Q. Which devices can I connect to the communication ports of the DL05?

A. Port 1: The port is RS-232C, fixed at 9600 baud, and uses the proprietary
Getting Started
K-sequence protocol. The DL05 can also connect to MODBUS and DirectNET
networks as a slave device through port 1. The port communicates with the following
devices:
S DV-1000 Data Access Unit or Optimation Operator interface panels
S DirectSOFT (running on a personal computer)
S D2-HPP handheld programmer
S Other devices which communicate via K-sequence protocol should work
with the DL05 Micro PLC. Contact the vendor for details.
A. Port 2: The port is RS-232C, with selective baud rates (300-38,400bps), address
and parity.It also supports the proprietary K-sequence protocol as well as DirectNet
and Modbus and non-sequence/print protocols.
Q. Can the DL05 accept 5VDC inputs?

A. No, 5 volts is lower than the DC input ON threshold. However, many TTL logic
circuits can drive the inputs if they are wired as open collector (sinking) inputs. See
Chapter 2 for I/O wiring guidelines.
12
Installation, Wiring,
and Specifications
Safety Guidelines
Orientation to DL05 Front Panel
Mounting Guidelines
Wiring Guidelines
System Wiring Strategies
Glossary of Specification Terms
Wiring Diagrams and Specifications
D0-10ND3 DC Input
D0-16ND3 DC Input
D0-10TD1 DC Output
D0-16TD1 DC Output
D0-10TD2 DC Output
D0-16TD2 DC Output
D0-07CDR DC Input and Output
D0-08TR Relay Output
D0-08CDD1 DC Input and Output
22
Installation, Wiring, and Specifications
Safety Guidelines
NOTE: Products with CE marks perform their required functions safely and adhere
to relevant standards as specified by CE directives provided they are used
according to their intended purpose and that the instructions in this manual are
adhered to. The protection provided by the equipment may be impaired if this
equipment is used in a manner not specified in this manual.
WARNING: Providing a safe operating environment for personnel and equipment is

and Specifications
your responsibility and should be your primary goal during system planning and
installation. Automation systems can fail and may result in situations that can cause
serious injury to personnel or damage to equipment. Do not rely on the automation
system alone to provide a safe operating environment. You should use external
electromechanical devices, such as relays or limit switches, that are independent of
the PLC application to provide protection for any part of the system that may cause
personal injury or damage.
Every automation application is different, so there may be special requirements for
your particular application. Make sure you follow all national, state, and local
government requirements for the proper installation and use of your equipment.
Plan for Safety The best way to provide a safe operating environment is to make personnel and
equipment safety part of the planning process. You should examine every aspect of
the system to determine which areas are critical to operator or machine safety. If you
are not familiar with PLC system installation practices, or your company does not
have established installation guidelines, you should obtain additional information
from the following sources.
S NEMA The National Electrical Manufacturers Association, located in
Washington, D.C., publishes many different documents that discuss
standards for industrial control systems. You can order these
publications directly from NEMA. Some of these include:
ICS 1, General Standards for Industrial Control and Systems
ICS 3, Industrial Systems
ICS 6, Enclosures for Industrial Control Systems
S NEC The National Electrical Code provides regulations concerning
the installation and use of various types of electrical equipment. Copies
of the NEC Handbook can often be obtained from your local electrical
equipment distributor or your local library.
S Local and State Agencies many local governments and state
governments have additional requirements above and beyond those
described in the NEC Handbook. Check with your local Electrical
Inspector or Fire Marshall office for information.
Three Levels of The publications mentioned provide many ideas and requirements for system
Protection safety. At a minimum, you should follow these regulations. Also, you should use the
following techniques, which provide three levels of system control.
S Orderly system shutdown sequence in the PLC control program
S Mechanical disconnect for output module power
S Emergency stop switch for disconnecting system power
23
Orderly System The first level of fault detection is ideally

Shutdown the PLC control program, which can
identify machine problems. You must
analyze your application and identify any
shutdown sequences that must be
performed. These types of problems are
usually things such as jammed parts, etc.
that do not pose a risk of personal injury
or equipment damage. Turn off
Jam Saw
Detect
WARNING: The control program must RST
not be the only form of protection for any
and Specifications
problems that may result in a risk of
personal injury or equipment damage. RST
Retract
Arm
System Power You should also use electromechanical devices, such as master control relays
Disconnect and/or limit switches, to prevent accidental equipment startup at an unexpected
time. These devices should be installed in such a manner to prevent any machine
operations from occurring.
For example, if the machine has a jammed part the PLC control program can turn off
the saw blade and retract the arbor. However, since the operator must open the
guard to remove the part, you should also include a bypass switch that disconnects
all system power any time the guard is opened.
Emergency Stop The machinery must provide a quick manual method of disconnecting all system
power. The disconnect device or switch must be clearly labeled Emergency Stop.
Use EStop and Master Relay
Power On Guard Master

Guard Limit Switch E STOP Relay
Emergency Limit
Stop
Master Relay Contacts
To disconnect To disconnect PLC Saw

PLC Power output circuitry Arbor
Master Relay Contacts
After an Emergency shutdown or any other type of power interruption, there may be
requirements that must be met before the PLC control program can be restarted. For
example, there may be specific register values that must be established (or
maintained from the state prior to the shutdown) before operations can resume. In
this case, you may want to use retentive memory locations, or include constants in
the control program to ensure a known starting point.
24
Orientation to DL05 Front Panel

Most connections, indicators, and labels on the DL05 Micro PLCs are located on its
front panel. The communication ports are located on the top side of the PLC. Please
refer to the drawing below.
Mode Switch
Mounting tab
Communication Ports
Output Status Indicators

and Specifications
Input Status Indicators
Status
Indicators
Mounting tab
External Power Discrete Input Discrete Output Output Circuit Power Input
Inputs Terminals Terminals (for DC output versions only)
The upper section of the connector accepts external power connections on the two
left-most terminals. From left to right, the next five terminals are one of the input
commons (C0) and input connections X1, X3, X4, and X6. The remaining four
connections are an output common (C2) and output terminals Y1, Y3, and Y5.
The lower section of the connector has the chassis ground (G) and the logic ground
(LG) on the two left-most terminals. The next two terminals are for the inputs X0 and
X2. Next is the other input common (C1) followed by inputs X5 and X7. The last four
terminals are for outputs Y0, Y2, Y4, and the second output common (C3). On DC
output units, the end terminal on the right accepts power for the output stage.
WARNING: For some applications, field device power may still be present on the
terminal block even though the Micro PLC is turned off. To minimize the risk of
electrical shock, check all field device power before you expose or remove either
connector
25
Connector All of the terminals for the DL05 are contained on one connector block. In some
Removal instances, it may be desireable to remove the connector block for easy wiring. The
connector is designed for easy removal with just a small screwdriver. The drawing
below shows the procedure for removal at one end.
Connector Removal
1. Loosen the retention screws on each end of the connector block.
and Specifications
2. From the center of the connector block, pry upward with the screwdriver
until the connector is loose.
The terminal block connector on DL05 PLCs have regular screw terminals, which
will accept either standard or #1 Philips screwdriver tips. You can insert one 16 AWG
wire under a terminal, or two 18 AWG wires (one on each side of the screw). Be
careful not to overtighten; maximum torque is 6 inch/ounces.
Spare terminal block connectors and connector covers may be ordered by individual
part numbers:
Part Number Qty Per Package Description

D0IOCON 2 DL05 I/O Terminal Block
D0IOCVR 2 DL05 I/O Terminal Cover
26
Mounting Guidelines
In addition to the panel layout guidelines, other specifications can affect the
definition and installation of a PLC system. Always consider the following:
S Environmental Specifications
S Power Requirements
S Agency Approvals
S Enclosure Selection and Component Dimensions
Unit Dimensions The following diagram shows the outside dimensions and mounting hole locations
for all versions of the DL05. Make sure you follow the installation guidelines to allow
and Specifications
proper spacing from other components.

4.8 2.6
120mm 65mm
3.8
95mm
0.40 0.24 mounting tab

10mm 6mm
2.72
4.0 68mm
100mm (DIN Rail)
2 holes, 0.150 dia, 0.20
clearance for #6 screw 5mm
3.4
85mm
Enclosures Your selection of a proper enclosure is important to ensure safe and proper
operation of your DL05 system. Applications of DL05 systems vary and may require
additional features. The minimum considerations for enclosures include:
S Conformance to electrical standards
S Protection from the elements in an industrial environment
S Common ground reference
S Maintenance of specified ambient temperature
S Access to equipment
S Security or restricted access
S Sufficient space for proper installation and maintenance of equipment
27
Panel Layout & There are many things to consider when designing the panel layout. The following items
Clearances correspond to the diagram shown. Note: there may be additional requirements,
depending on your application and use of other components in the cabinet.
1. Mount the PLCs horizontally as shown below to provide proper ventilation.
You cannot mount the DL05 units vertically, upside down, or on a flat
horizontal surface. If you place more than one unit in a cabinet, there must
be a minimum of 7.2 (183mm) between the units.

OK

and Specifications
Airflow
2. Provide a minimum clearance of 2 (50mm) between the unit and all sides of
the cabinet. Note, remember to allow for any operator panels or other items
mounted in the door.
3. There should also be at least 3 (78mm) of clearance between the unit and
any wiring ducts that run parallel to the terminals.
Temperature
Probe
2"
DL05 50mm
min.
Micro PLC
2"
Power 50mm
Source min.

2"
50mm
BUS Bar min.
Panel Ground Braid

Copper Lugs Panel Ground
Earth Ground Terminal
Panel or Note: there is a minimum of 2 (30mm)

Single Point clearance between the panel door
Ground or any devices mounted in the panel door
Star Washers Star Washers and the nearest DL05 component. Not to Scale
4. The ground terminal on the DL05 base must be connected to a single point
ground. Use copper stranded wire to achieve a low impedance. Copper
eye lugs should be crimped and soldered to the ends of the stranded wire to
ensure good surface contact.
5. There must be a single point ground (i.e. copper bus bar) for all devices in
the panel requiring an earth ground return. The single point of ground must
be connected to the panel ground termination. The panel ground
termination must be connected to earth ground. Minimum wire sizes, color
coding, and general safety practices should comply with appropriate
electrical codes and standards for your area.
28
6. A good common ground reference (Earth ground) is essential for proper

operation of the DL05. One side of all control and power circuits and the
ground lead on flexible shielded cable must be properly connected to Earth
ground. There are several methods of providing an adequate common
ground reference, including:
a) Installing a ground rod as close to the panel as possible.
b) Connection to incoming power system ground.
7. Evaluate any installations where the ambient temperature may approach
the lower or upper limits of the specifications. If you suspect the ambient
temperature will not be within the operating specification for the DL05
system, measures such as installing a cooling/heating source must be
taken to get the ambient temperature within the range of specifications.
and Specifications
8. The DL05 systems are designed to be powered by 95-240 VAC or 1224

VDC normally available throughout an industrial environment. Electrical
power in some areas where the PLCs are installed is not always stable and
storms can cause power surges. Due to this, powerline filters are
recommended for protecting the DL05 PLCs from power surges and
EMI/RFI noise. The Automation Powerline Filter, for use with 120 VAC and
240 VAC, 15 Amps, is an exellent choice
However, you can use a filter of your choice.
These units install easily between the power source and the PLC.
NOTE: If you are using other components in your system, make sure you refer to the
appropriate manual to determine how those units can affect mounting dimensions.
Using Mounting DL05 Micro PLCs can be secured to a panel by using mounting rails. We
Rails recommend rails that conform to DIN EN standard 50 022. They are approximately
35mm high, with a depth of 7mm. If you mount the Micro PLC on a rail, do consider
using end brackets on each side of the PLC. The end bracket helps keep the PLC
from sliding horizontally along the rail, reducing the possibility of accidentally pulling
the wiring loose.
On the bottom of the PLC is a small retaining clip. To secure the PLC to a DIN rail,
place it onto the rail and gently push up on the clip to lock it onto the rail.
To remove the PLC, pull down on the retaining clip, lift up on the PLC slightly, then
pulling it away from the rail.
29
DIN Rail Dimensions DIN Rail slot.

Use 35mm x 7mm rail conforming to
DIN EN 50022.
7mm
35 mm
and Specifications
Retaining Clip
NOTE: Refer to our catalog for a complete listing of DINnector connection systems.
Environmental The following table lists the environmental specifications that generally apply to
Specifications DL05 Micro PLCs. The ranges that vary for the Handheld Programmer are noted at
the bottom of this chart. Certain output circuit types may have derating curves,
depending on the ambient temperature and the number of outputs ON. Please refer
to the appropriate section in this chapter pertaining to your particular DL05 PLC.
Specification Rating
Storage temperature 4 F to 158 F (20 C to 70 C)
Ambient operating temperature* 32 F to 131 F (0 C to 55 C)
Ambient humidity** 5% 95% relative humidity (noncondensing)
Vibration resistance MIL STD 810C, Method 514.2
Shock resistance MIL STD 810C, Method 516.2
Noise immunity NEMA (ICS3304)
Atmosphere No corrosive gases
Agency approvals UL, CE, FCC class A
* Operating temperature for the Handheld Programmer and the DV1000 is 32 to 122 F (0 to 50 C)
Storage temperature for the Handheld Programmer and the DV1000 is 4 to 158 F (20 to70 C).
**Equipment will operate down to 5% relative humidity. However, static electricity problems occur much
more frequently at low humidity levels (below 30%). Make sure you take adequate precautions when
you touch the equipment. Consider using ground straps, anti-static floor coverings, etc. if you use the
equipment in low-humidity environments.
Agency Approvals Some applications require agency approvals for particular components. The DL05
Micro PLC agency approvals are listed below:
S UL (Underwriters Laboratories, Inc.)
S CUL (Canadian Underwriters Laboratories, Inc.)
S CE (European Economic Union)
210
Wiring Guidelines
Connect the power input wiring for the DL05. Observe all precautions stated earlier
in this manual. For more details on wiring, see Chapter 2 on Installation, Wiring, and
Specifications. When the wiring is complete, close the connector covers. Do not
apply power at this time.
110/220 VAC Power Input 12/24 VDC Power Input

and Specifications
LG N +G
95 240 VAC 12 24 VDC
WARNING: Once the power wiring is connected, secure the terminal block cover in
the closed position. When the cover is open there is a risk of electrical shock if you
accidentally touch the connection terminals or power wiring.
Fuse Protection There are no internal fuses for the input power circuits, so external circuit protection
for Input Power is needed to ensure the safety of service personnel and the safe operation of the
equipment itself. To meet UL/CUL specifications, the input power must be fused.
Depending on the type of input power being used, follow these fuse protection
recommendations:
208/240 VAC Operation

When operating the unit from 208/240 VAC, whether the voltage source is a
step-down transformer or from two phases, fuse both the line (L) and neutral (N)
leads. The recommended fuse size is 0.375A.
110/125 VAC Operation

When operating the unit from 110/125 VAC, it is only necessary to fuse the line (L)
lead; it is not necessary to fuse the neutral (N) lead. The recommended fuse size is
0.5A.
211
12/24 VDC Operation

When operating at these lower DC voltages, wire gauge size is just as important as
proper fusing techniques. Using large conductors minimizes the voltage drop in the
conductor. Each DL05 input power terminal can accommodate one 16 AWG wire or
two 18 AWG wires. A DC failure can maintain an arc for much longer time and
distance than AC failures. Typically, the main bus is fused at a higher level than the
branch device, which in this case is the DL05. The recommended fuse size for the
branch circuit to the DL05 is 1A (for example, a Littlefuse 312.001 or equivalent).
External The power source must be capable of suppling voltage and current complying with
Power Source individual Micro PLC specifications, according to the following specifications:
and Specifications
Item DL05 VAC Powered Units DL05 VDC Powered Units
Input Voltage Range 110/220 VAC (95240 VAC) 1224 VDC (10.826.4 VDC)
Maximum Inrush Current 13 A, 1ms (95240 VAC) 10A
15 A, 1ms (240264 VAC)
Maximum Power 30 VA 20 W
Voltage Withstand (dielectric) 1 minute @ 1500 VAC between primary, secondary, field
ground
Insulation Resistance > 10 M at 500 VDC
NOTE:The rating between all internal circuits is BASIC INSULATION ONLY.
Planning the The following guidelines provide general information on how to wire the I/O
Wiring Routes connections to DL05 Micro PLCs. For specific information on wiring a particular PLC
refer to the corresponding specification sheet further in this chapter.
1. Each terminal connection of the DL05 PLC can accept one 16 AWG wire or
two 18 AWG size wires. Do not exceed this recommended capacity.
2. Always use a continuous length of wire. Do not splice wires to attain a
needed length.
3. Use the shortest possible wire length.
4. Use wire trays for routing where possible.
5. Avoid running wires near high energy wiring.
6. Avoid running input wiring close to output wiring where possible.
7. To minimize voltage drops when wires must run a long distance , consider
using multiple wires for the return line.
8. Avoid running DC wiring in close proximity to AC wiring where possible.
9. Avoid creating sharp bends in the wires.
10. Install the recommended powerline filter to reduce power surges and
EMI/RFI noise.
212
Fuse Protection Input and Output circuits on DL05 Micro PLCs do not have internal fuses. In order to
for Input and protect your Micro PLC, we suggest you add external fuses to your I/O wiring. A
Output Circuits fast-blow fuse, with a lower current rating than the I/O banks common current rating
can be wired to each common. Or, a fuse with a rating of slightly less than the
maximum current per output point can be added to each output. Refer to the Micro
PLC specification sheets further in this chapter to find the maximum current per
output point or per output common. Adding the external fuse does not guarantee the
prevention of Micro PLC damage, but it will provide added protection.
External Fuses
(shown with DIN Rail, Fuse Blocks)
and Specifications
I/O Point All DL05 Micro PLCs have a fixed I/O configuration. It follows the same octal
Numbering numbering system used on other DirectLogic family PLCs, starting at X0 and Y0. The
letter X is always used to indicate inputs and the letter Y is always used for outputs.
The I/O numbering always starts at zero and does not include the digits 8 or 9. The
addresses are typically assigned in groups of 8 or 16, depending on the number of
points in an I/O group. For the DL05 the eight inputs use reference numbers X0 X7.
The six output points use references Y0 Y5.
213
System Wiring Strategies

The DL05 Micro PLC is very flexible and will work in many different wiring
configurations. By studying this section before actual installation, you can probably
find the best wiring strategy for your application . This will help to lower system cost,
wiring errors, and avoid safety problems.
PLC Isolation PLC circuitry is divided into three main regions separated by isolation boundaries,
Boundaries shown in the drawing below. Electrical isolation provides safety, so that a fault in one
area does not damage another. A powerline filter will provide isolation between the
power source and the power supply. A transformer in the power supply provides
magnetic isolation between the primary and secondary sides. Opto-couplers
and Specifications
provide optical isolation in Input and Output circuits. This isolates logic circuitry from
the field side, where factory machinery connects. Note that the discrete inputs are
isolated from the discrete outputs, because each is isolated from the logic side.
Isolation boundaries protect the operator interface (and the operator) from power
input faults or field wiring faults. When wiring a PLC, it is extremely important to avoid
making external connections that connect logic side circuits to any other.
Primary Side Secondary, or Field Side

Logic side
Power PLC
Input Discrete Inputs
Input
Main Circuit
Filter Power CPU
Supply Output
Discrete Outputs
Circuit
Isolation Programming Device or Isolation

Boundary Operator Interface Boundary
The next figure shows the internal layout of DL05 PLCs, as viewed from the front
panel.
To Programming Device
or Operator Interface
DL05
PLC
2 Comm.
CPU Ports
Main
Power
Supply
Input Circuit Output Circuit
Power 8 Discrete Commons 6 Discrete Outputs Commons

Input Filter Inputs
214
Connecting Operator interfaces require data and power connections. Operator interfaces with a
Operator Interface large CRT usually require separate AC power. However, small operator interface
Devices devices like the popular DV-1000 Data Access Unit and the Optimation panels may
be powered directly from the DL05 Micro PLC.
Connect the DV-1000 to either communication port on the DL05 Micro PLC using the
cable shown below. A single cable contains transmit/receive data wires and +5V
power.
DL05 Micro PLC DV-1000
RJ12 RJ12
phone style phone style
and Specifications
Use cable part no.

DV1000CBL
Optimation operator interface panels require separate power and communications

connections. Connect the DL05 to the proper D-shell connector on the rear of the
Optimation panel using the cable shown below. Optimation panels require 830VDC
power.
DL05 Micro PLC Optimation Panel
RJ12 15-pin D-shell
phone style male
Use cable part no.

OP2CBL
Connecting DL05 Micro PLCs can be programmed with either a handheld programmer or with
Programming DirectSOFT on a PC. Connect the DL05 to a PC using the cable shown below.
Devices
DL05 Micro PLC RJ12 9-pin D-shell
phone style female
Use cable part no.

D2DSCBL
The D2-HPP Handheld Programmer comes with a communications cable. For a

replacement part, use the cable shown below.
DL05 Micro PLC RJ12 RJ12 D2HPP

phone style phone style
(cable comes with HPP)

For replacement
cable, use part no.
DV1000CBL
215
Sinking / Sourcing Before going further in our study of wiring strategies, we must have a solid
Concepts understanding of sinking and sourcing concepts. Use of these terms occurs
frequently in input or output circuit discussions. It is the goal of this section to make
these concepts easy to understand, further ensuring your success in installation.
First we give the following short definitions, followed by practical applications.
Sinking = Path to supply ground ()
Sourcing = Path to supply source (+)
First you will notice that these are only associated with DC circuits and not AC,
because of the reference to (+) and () polarities. Therefore, sinking and sourcing
terminology only applies to DC input and output circuits. Input and output points that
and Specifications
are either sinking or sourcing can conduct current in only one direction. This means it
is possible to connect the external supply and field device to the I/O point with current
trying to flow in the wrong direction, and the circuit will not operate. However, we can
successfully connect the supply and field device every time by understanding
sourcing and sinking.
For example, the figure to the right depicts
a sinking input. To properly connect the PLC
Input
external supply, we just have to connect it
(sinking)
so the the input provides a path to ground
(). So, we start at the PLC input terminal, +
Input
follow through the input sensing circuit, Sensing
exit at the common terminal, and connect
Common
the supply () to the common terminal. By
adding the switch, between the supply (+)
and the input, we have completed the
circuit. Current flows in the direction of the
arrow when the switch is closed.
By applying the circuit principle above to the four possible combinations of

input/output sinking/sourcing types, we have the four circuits as shown below. DL05
Micro PLCs provide all except the sourcing output I/O circuit types.
Sinking Input Sinking Output

PLC PLC
Input Output
Load
+ Input Output +
Sensing Switch
Common Common
Sourcing Input Sourcing Output

PLC PLC
Common Common
+ Input Output +
Sensing Switch
Input Output
Load
216
I/O Common In order for a PLC I/O circuit to operate, PLC

Terminal Concepts current must enter at one terminal and exit Field Main Path
at another. This means at least two Device (I/O Point) I/O
Circuit
terminals are associated with every I/O +
point. In the figure to the right, the Input or
Output terminal is the main path for the
current. One additional terminal must Return Path
provide the return path to the power
supply.
If we had unlimited space and budget for PLC

I/O terminals, then every I/O point could
and Specifications
Input
have two dedicated terminals just as the Sensing
figure above shows. However, providing Input 1
this level of flexibility is not practical or
Input 2
even necessary for most applications. So,
most Input or Output point groups on
Input 3
PLCs share the return path among two or
more I/O points. The figure to the right Input 4
shows a group (or bank) of 4 input points
which share a common return path. In this +
way, the four inputs require only five
terminals instead of eight.
Common
Note: In the circuit above, the current in the common path is 4 times any channels
input current when all inputs are energized. This is especially important in output
circuits, where heavier gauge wire is sometimes necessary on commons.
Most DL05 input and output circuits are
grouped into banks that share a common
return path. The best indication of I/O
common grouping is on the wiring label.
The I/O common grouping bar, labeled at
the right, occurs in the section of wiring
label below it. It indicates X0, X1, X2, and
X3 share the common terminal located to
the left of X1.
The following complete label shows two banks of four inputs and two banks of three
outputs. One common is provided for each bank.
The following label is for DC output versions. One common is provided for all of the
outputs and the terminal on the bottom right accepts power for the output stage.
217
Connecting DC I/O In the previous section on Sourcing and Sinking concepts, we explained that DC I/O
to Solid State circuits sometimes will only allow current to flow one way. This is also true for many of
Field Devices the field devices which have solid-state (transistor) interfaces. In other words, field
devices can also be sourcing or sinking. When connecting two devices in a series
DC circuit, one must be wired as sourcing and the other as sinking.
Solid State The DL05s DC inputs are flexible in that they detect current flow in either direction,
Input Sensors so they can be wired as either sourcing or sinking. In the following circuit, a field
device has an open-collector NPN transistor output. It sinks current from the PLC
input point, which sources current. The power supply can be the FA-24PS +24 VDC
power supply or another supply (+12 VDC or +24VDC), as long as the input
specifications are met.
and Specifications
Field Device PLC DC Input
Output Input
(sinking) (sourcing)
Supply
Ground + Common
In the next circuit, a field device has an open-emitter PNP transistor output. It
sources current to the PLC input point, which sinks the current back to ground. Since
the field device is sourcing current, no additional power supply is required.
Field Device
+V PLC DC Input
Input
(sinking)
Output (sourcing)
Ground Common
Solid State Sometimes an application requires connecting a PLC output point to a solid state
Output Loads input on a device. This type of connection is usually made to carry a low-level signal,
not to send DC power to an actuator.
The DL05s DC outputs are sinking-only. This means that each DC output provides a
path to ground when it is energized. Also, remember that all six outputs have the
same electrical common, even though there are two common terminal screws.
Finally, recall that the DC output circuit requires power (20 28 VDC) from an
external power source.
In the following circuit, the PLC output point sinks current to the output common
when energized. It is connected to a sourcing input of a field device input.
PLC DC Output Field Device

Power
+DC pwr +V
Output Input
(sinking) + (sourcing)
20-28 VDC
Common Ground
218
In the next example we connect a PLC DC output point to the sinking input of a field
device. This is a bit tricky, because both the PLC output and field device input are
sinking type. Since the circuit must have one sourcing and one sinking device, we
add sourcing capability to the PLC output by using a pull-up resistor. In the circuit
below, we connect Rpull-up from the output to the DC output circuit power input.
PLC DC Output
Power
+DC pwr
Field Device
R pull-up
(sourcing)
(sinking) Output Input R input
and Specifications
+ (sinking)
Supply
Common Ground
NOTE: DO NOT attempt to drive a heavy load (>25 mA) with this pull-up method.
NOTE 2: Using the pull-up resistor to implement a sourcing output has the effect of
inverting the output point logic. In other words, the field device input is energized
when the PLC output is OFF, from a ladder logic point-of-view. Your ladder program
must comprehend this and generate an inverted output. Or, you may choose to
cancel the effect of the inversion elsewhere, such as in the field device.
It is important to choose the correct value of R pull-up. In order to do so, we need to
know the nominal input current to the field device (I input) when the input is energized.
If this value is not known, it can be calculated as shown (a typical value is 15 mA).
Then use I input and the voltage of the external supply to compute R pull-up. Then
calculate the power Ppull-up (in watts), in order to size R pull-up properly.
V input (turnon)
I input =
R input
2
V supply 0.7 V supply
R pull-up = R input P pull-up =
I input R pullup
The drawing below shows the actual wiring of the DL05 Micro PLC to the supply and
pull-up resistor.
Common
Output
Supply +
219
Relay Output The D005AR and the D005DR models feature relay outputs. Relays are best for
Wiring Methods the following applications:
S Loads that require higher currents than the solid-state DL05 outputs can
deliver
S Cost-sensitive applications
S Some output channels need isolation from other outputs (such as when
some loads require AC while others require DC)
Some applications in which NOT to use relays:
S Loads that require currents under 10 mA
S Loads which must be switched at high speed and duty cycle
and Specifications
Assuming relays are right for your application, were now ready to explore various
ways to wire relay outputs to the loads. Note that there are six normally-open SPST
relays available. They are organized with three relays per common. The figure below
shows the relays and the internal wiring of the PLC. Note that each group is isolated
from the other group of outputs.
Y0 Com Y1 Y2 Y3 Y4 Com Y5
In the circuit below, all loads use the same AC power supply which powers the DL05
PLC. In this example, all commons are connected together.
Line
Fuse or Ground
Circuit
Breaker Neutral
Output Point Wiring
In the circuit on the following page, loads for Y0 Y2 use the same AC power supply
which powers the DL05 PLC. Loads for Y3 Y5 use a separate DC supply. In this
example, the commons are separated according to which supply powers the
associated load.
220
Fuse or Line
+
Circuit Ground
Breaker Neutral
and Specifications
Output Point Wiring
Surge Suppresion Inductive load devices (devices with a coil) generate transient voltages when
For Inductive de-energized with a relay contact. When a relay contact is closed it bounces, which
Loads energizes and de-energizes the coil until the bouncing stops. The transient
voltages generated are much larger in amplitude than the supply voltage, especially
with a DC supply voltage.
When switching a DC-supplied inductive load the full supply voltage is always
present when the relay contact opens (or bounces). When switching an
AC-supplied inductive load there is one chance in 60 (60 Hz) or 50 (50 Hz) that the
relay contact will open (or bounce) when the AC sine wave is zero crossing. If the
voltage is not zero when the relay contact opens there is energy stored in the
inductor that is released when the voltage to the inductor is suddenly removed. This
release of energy is the cause of the transient voltages.
When inductive load devices (motors, motor starters, interposing relays, solenoids,
valves, etc.) are controlled with relay contacts, it is recommended that a surge
suppression device be connected directly across the coil of the field device. If the
inductive device has plug-type connectors, the suppression device can be installed
on the terminal block of the relay output.
Transient Voltage Suppressors (TVS or transorb) provide the best surge and
transient suppression of AC and DC powered coils, providing the fastest response
with the smallest overshoot.
Metal Oxide Varistors (MOV) provide the next best surge and transient
suppression of AC and DC powered coils.
For example, the waveform in the figure below shows the energy released when
opening a contact switching a 24 VDC solenoid. Notice the large voltage spike.
+24 VDC
+24 VDC 24 VDC
Module Relay Contact
324 VDC
221
This figure shows the same circuit with a transorb (TVS) across the coil. Notice that
the voltage spike is significantly reduced.
+24 VDC
+24 VDC 24 VDC

42 VDC
Module Relay Contact
Use the following table to help select a TVS or MOV suppressor for your application
and Specifications
based on the inductive load voltage.
hhVendor / Catalog Type (TVS, MOV, Diode) Inductive Load Voltage Part Number
General Instrument TVS 110/120 VAC P6KE180CAGICTND
Transient Voltage TVS 220/240 VAC P6KE350CA
Suppressors, LiteOn
Diodes; from DigiKey TVS 12/24 VDC or VAC P6K30CAGICTND
Catalog; Phone: Diode 12/24 VDC or VAC 1N4004CTND
1-800-344-4539
Harris Metal Oxide MOV 110/120 VAC V150LA20C
Varistors; from Newark MOV 220/240 VAC V250LA20C
Catalog; Phone:
1-800-463-9275
Prolonging Relay Relay contacts wear according to the amount of relay switching, amount of spark
Contact Life created at the time of open or closure, and presence of airborne contaminants.
There are some steps you can take to help prolong the life of relay contacts, such as
switching the relay on or off only when it is necessary, and if possible, switching the
load on or off at a time when it will draw the least current. Also, take measures to
suppress inductive voltage spikes from inductive DC loads such as contactors and
solenoids.
For inductive loads in DC circuits we recommend using a suppression diode as
shown in the following diagram (DO NOT use this circuit with an AC power supply).
When the load is energized the diode is reverse-biased (high impedance). When the
load is turned off, energy stored in its coil is released in the form of a negative-going
voltage spike. At this moment the diode is forward-biased (low impedance) and
shunts the energy to ground. This protects the relay contacts from the high voltage
arc that would occur just as the contacts are opening.
Place the diode as close to the inductive field device as possible. Use a diode with a
peak inverse voltage rating (PIV) at least 100 PIV, 3A forward current or larger. Use a
fast-recovery type (such as Schottky type). DO NOT use a small-signal diode such
as 1N914, 1N941, etc. Be sure the diode is in the circuit correctly before operation. If
installed backwards, it short-circuits the supply when the relay energizes.
PLC Relay Output Inductive Field Device
Output Input
Supply
Common + Common
222
DC Input Wiring DL05 Micro PLCs with DC inputs are particularly PLC DC Input
Methods flexible because they can be either sinking or Input
sourcing. The dual diodes (shown to the right) allow
current to flow in either direction. The inputs accept
10.8 26.4 VDC. The target applications are +12 Common
VDC and +24 VDC. You can actually wire half of the
inputs as DC sinking and the other half as DC
sourcing. Inputs grouped by a common must be all
sinking or all sourcing.
In the first and simplest example below, all commons are connected together and all
and Specifications
inputs are sinking.

+24 VDC
+
In the next example, the first four inputs are sinking, and the last four are sourcing.
+
+24 VDC +12 VDC
+
223
DC Output DL05 DC output circuits are high-performance transistor switches with low
Wiring Methods on-resistance and fast switching times. Please note the following characteristics
which are unique to the DC output type:
S There is only one electrical common for all six outputs. All six outputs
belong to one bank.
S The output switches are current-sinking only. However, you can still use
different DC voltages from one load to another.
S The output circuit inside the PLC requires external power. The supply
() must be connected to a common terminal, and the supply (+)
connects the the right-most terminal on the upper connector.
In the example below, all six outputs share a common supply.
and Specifications

+24 VDC
+
Output Point Wiring
In the next example below, the outputs have split supplies. The first three outputs
are using a +12 VDC supply, and the last three are using a +24 VDC supply.
However, you can split the outputs among any number of supplies, as long as:
S all supply voltages are within the specified range
S all output points are wired as sinking
S all source () terminals are connected together

+12 VDC +24 VDC
+ +
Output Point Wiring
224
High-Speed I/O DL05 versions with DC type input or output points contain a dedicated High-Speed
Wiring Methods I/O circuit (HSIO). The circuit configuration is programmable, and it processes select
I/O points independently from the CPU scan. Chapter 3 discusses the programming
options for HSIO. While the HSIO circuit has six modes, we show wiring diagrams for
two of the most popular modes in this chapter. The high-speed input interfaces to
points X0 X2. Properly configured, the DL05 can count quadrature pulses at up to
5 kHz from an incremental encoder as shown below.
and Specifications
Signal Common
Phase B
+
12 24 VDC
Phase A
Encoder Input Wiring

Encoder
DL05 versions with DC type output points can use the High Speed I/O Pulse Output
feature. It can generate high-speed pulses for specialized control such as stepper
motor / intelligent drive systems. Output Y0 and Y1 can generate pulse and direction
signals, or it can generate CCW and CW pulse signals respectively. See Chapter 3
on high-speed input and pulse output options.
+
Signal Common +24 VDC

Motor Amplifier
Pulse
Direction
Pulse Output Wiring

Power Input
225
Glossary of Specification Terms
Discrete Input One of eight input connections to the PLC which converts an electrical
signal from a field device to a binary status (off or on), which is read by the
internal CPU each PLC scan.
Discrete Output One of six output connections from the PLC which converts an internal
ladder program result (0 or 1) to turn On or Off an output switching device.
This enables the program to turn on and off large field loads.
I/O Common A connection in the input or output terminals which is shared by multiple
and Specifications
I/O circuits. It usually is in the return path to the power supply of the I/O
circuit.
Input Voltage Range The operating voltage range of the input circuit.
Maximum Voltage Maximum voltage allowed for the input circuit.
ON Voltage Level The minimum voltage level at which the input point will turn ON.
OFF Voltage Level The maximum voltage level at which the input point will turn OFF
Input Impedance Input impedance can be used to calculate input current for a particular
operating voltage.
Input Current Typical operating current for an active (ON) input.
Minimum ON Current The minimum current for the input circuit to operate reliably in the ON
state.
Maximum OFF Current The maximum current for the input circuit to operate reliably in the OFF
state.
OFF to ON Response The time the module requires to process an OFF to ON state transition.
ON to OFF Response The time the module requires to process an ON to OFF state transition.
Status Indicators The LEDs that indicate the ON/OFF status of an input or output point. All
LEDs on DL05 Micro PLCs are electrically located on the logic side of the
input or output circuit.
226
Wiring Diagrams and Specifications

The remainder of this chapter dedicates two pages to each of the eight versions of
DL05 Micro PLCs. Each section contains a basic wiring diagram, equivalent I/O
circuits, and specification tables. Please refer to the section which describes the
particular DL05 version used in your application.
D005AR The D005AR Micro PLC features eight AC inputs and six relay contact outputs. The
I/O Wiring Diagram following diagram shows a typical field wiring example. The AC external power
connection uses four terminals at the left as shown.
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power
Input Wiring AC AC or DC
Supply Supply
Input Point Wiring Output Point Wiring
Equivalent Input Circuit Derating Chart for Relay Outputs Equivalent Output Circuit
+V +V Points
Internal module circuitry
Input
Optical 6 2A OUTPUT
Isolator
Y0 Y5 L
+V
To LED 4
2
Common
0 COM
To LED
To other circuits in bank 0 10 20 30 40 50 55 C Line
32 50 68 86 104 122 131F 627 VDC
Ambient Temperature (C/F) 6240 VAC
The eight AC input channels use terminals in the middle of the connector. Inputs are
organized into two banks of four. Each bank has a common terminal. The wiring
example above shows all commons connected together, but separate supplies and
common circuits may be used. The equivalent input circuit shows one channel of a
typical bank.
227
The six relay output channels use terminals on the right side of the connector.
Outputs are organized into two banks of three normally-open relay contacts. Each
bank has a common terminal. The wiring example on the last page shows all
commons connected together, but separate supplies and common circuits may be
used. The equivalent output circuit shows one channel of a typical bank. The relay
contacts can switch AC or DC voltages.
D005AR External Power Requirements 95 240 VAC, 30 VA maximum,
General Communication Port 1 KSequence (Slave)
Specifications 9600 baud (Fixed), 8 data bits, 1 stop bit, DirectNET (Slave)
odd parity MODBUS (Slave)
Communication Port 2 KSequence (Slave)
9600 baud (default), 8 data bits, 1 stop bit, DirectNET (Master/Slave)
and Specifications
odd parity MODBUS (Master/Slave)
Non-sequence / print
Programming cable type D2DSCBL
Operating Temperature 32 to 131 F (0 to 55_ C)
Storage Temperature 4 to 158 F (20 to 70_ C)
Relative Humidity 5 to 95% (non-condensing)
Environmental air No corrosive gases permitted
Vibration MIL STD 810C 514.2
Shock MIL STD 810C 516.2
Noise Immunity NEMA ICS3304
Terminal Type Removable
Wire Gauge One AWG16 or two AWG18, AWG24 minimum
AC Input Input Voltage Range (Min. - Max.) 80 132 VAC, 47 - 63 Hz
Specifications Operating Voltage Range 90 120 VAC, 47 -63 Hz
X0 X7 Input Current 8 mA @ 100 VAC at 50 Hz
10 mA @ 100 VAC at 60 Hz
Max. Input Current 12 mA @ 132 VAC at 50 Hz
15 mA @ 132 VAC at 60 Hz
Input Impedance 14K @50 Hz, 12K @60 Hz
ON Current/Voltage >6 mA @ 75 VAC
OFF Current/Voltage <2 mA @ 20 VAC
OFF to ON Response < 40 mS
ON to OFF Response < 40 mS
Status Indicators Logic Side
Commons 4 channels / common x 2 banks
Relay Output Output Voltage Range (Min. Max.) 5 264 VAC (47 -63 Hz), 5 30 VDC
Specifications Operating Voltage Range 6 240 VAC (47 -63 Hz), 6 27 VDC
Y0 Y5 Output Current 2A / point, 6A / common
Max. leakage current 0.1 mA @264VAC
Smallest Recommended Load 5 mA @5 VDC
Fuses None (external recommended)
228
D005DR These micro PLCs feature eight DC inputs and six relay contact outputs. The
I/O Wiring Diagram following diagram shows a typical field wiring example. The AC external power
connection uses four terminals at the left as shown.
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power
DC AC or DC
Input Wiring Supply Supply
Equivalent Circuit, Derating Chart for Relay Outputs Equivalent Output Circuit
Standard Inputs (X3 X7) Points
+V +V
6 2A OUTPUT
Input Y0 Y5 L
+V
Optical
Isolator 4
To LED
+
2

0 COM
Common To LED
0 10 20 30 40 50 55 C Line
32 50 68 86 104 122 131F 627 VDC
Equivalent Circuit, High-

Speed Inputs (X0 X2)
The eight DC input channels use terminals in the middle of
the connector. Inputs are organized into two banks of four.
+V
Input Optical
Each bank has an isolated common terminal, and may be
Isolator wired as either sinking or sourcing inputs. The wiring
+
To LED
example above shows all commons connected together,
but separate supplies and common circuits may be used.
Common
The equivalent circuit for standard inputs is shown above,
To all other output circuits
and the high-speed input circuit is shown to the left.
The six output channels use terminals on the right side of the connector. Outputs are
organized into two banks of three normally-open relay contacts. Each bank has a
common terminal. The wiring example above shows all commons connected
together, but separate supplies and common circuits may be used. The equivalent
output circuit shows one channel of a typical bank. The relay contacts can switch AC
or DC voltages.
229
D005DR External Power Requirements 95 240 VAC, 30 VA maximum,

and Specifications
DC Input Parameter HighSpeed Inputs, X0 X2 Standard DC Inputs X3 X7

Specifications Min. - Max. Voltage Range 10.8 26.4 VDC 10.8 26.4 VDC
Operating Voltage Range 12 -24 VDC 12 -24 VDC
Peak Voltage 30 VDC (5 kHz maximum frequency) 30 VDC
Minimum Pulse Width 100 s N/A
ON Voltage Level > 10 VDC > 10 VDC
OFF Voltage Level < 2.0 VDC < 2.0 VDC
Input Impedance 1.8 k @ 12 24 VDC 2.8 k @ 12 24 VDC
Max. Input Current 6mA @12VDC 4mA @12VDC
13mA @24VDC 8.5mA @24VDC
Minimum ON Current >5 mA >4 mA
Maximum OFF Current < 0.5 mA <0.5 mA
OFF to ON Response <100 s 2 8 mS, 4 mS typical
ON to OFF Response < 100 s 2 8 mS, 4 mS typical
Status Indicators Logic side Logic side
Commons 4 channels / common x 2 bank
Relay Output Output Voltage Range (Min. - Max.) 5 -264 VAC (47 -63 Hz), 5 - 30 VDC
Specifications Operating Voltage 6 -240 VAC (47 -63 Hz), 6 - 27 VDC
Output Current 2A / point
6A / common
Maximum Voltage 264 VAC, 30 VDC
Max leakage current 0.1 mA @264 VAC
Smallest Recommended Load 5 mA
230
D005AD The D005AD Micro PLC features eight AC inputs and six DC outputs. The following
I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection
uses four terminals at the left as shown.
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power

Input Wiring AC or DC +24 VDC
Supply
+
Equivalent Input Circuit Derating Chart for DC Outputs Equivalent Output Circuit
+V +V Points
+V Internal module circuitry +V
Input
Optical 6 1A +
Isolator
Y0 Y5
24VDC Optical
Isolator
To LED 4 OUTPUT
L
2 + 627
Common VDC
To LED
0
COM
To other circuits in bank 0 10 20 30 40 50 55 C
32 50 68 86 104 122 131F
Ambient Temperature (C/F)
organized into two banks of four. Each bank has an isolated common terminal. The
wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent input circuit shows one
channel of a typical bank.
The six current sinking DC output channels use terminals on the right side of the
connector. All outputs actually share the same electrical common. Note the
requirement for external power on the end (right-most) terminal. The equivalent
output circuit shows one channel of the bank of six.
231
D005AD External Power Requirements 95 240 VAC, 30 VA maximum,

and Specifications

Specifications Operating Voltage Range 90 120 VAC, 47 - 63 Hz
Input Current 8 mA @ 100 VAC (50Hz)
10 mA @ 100 VAC (60Hz)
Max. Input Current 12 mA @ 132 VAC (50Hz)
15 mA @ 132 VAC (60Hz)
Input Impedance 14K @50 Hz, 12K @60 Hz
ON Current/Voltage >6 mA @ 75 VAC
OFF Current/Voltage <2 mA @ 20 VAC
DC Output Parameter Pulse Outputs, Y0 Y1 Standard Outputs, Y2 Y5

Specifications Min. - Max. Voltage Range 5 30 VDC 5 30 VDC
Operating Voltage 6 27 VDC 6 27 VDC
Peak Voltage < 50 VDC (7 kHz max. frequency) < 50 VDC
On Voltage Drop 0.3 VDC @ 1A 0.3 VDC @ 1A
Max Current (resistive) 0.5 A / pt. (1A / point for standard pt.) 1.0 A / point
Max leakage current 15 A @ 30 VDC 15 A @ 30 VDC
Max inrush current 2 A for 100 mS 2 A for 100 mS
Extenal DC power required 20 - 28 VDC max 150mA 20 - 28 VDC max 150mA
OFF to ON Response <10 S < 10 S
ON to OFF Response <30 S < 60 S
Status Indicators Logic Side Logic Side
Fuses None None
232
D005DD These micro PLCs feature eight DC inputs and six DC outputs. The following
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power
Input Wiring

DC +24 VDC
Supply
+
Equivalent Circuit, Derating Chart for DC Outputs Equivalent Output Circuit

+V +V
+V +V
6 1A +
Input Y0 Y5
Optical 24VDC Optical
Isolator
Isolator 4 OUTPUT
L
To LED
+
2 + 627
VDC
To LED
Common 0
COM
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131F
Equivalent Circuit, High- The eight DC input channels use terminals in the middle of
Input
+V Each bank has an isolated common terminal, and may be
Optical
+ example above shows all commons connected together,
To LED
Common The equivalent circuit for standard inputs is shown above,
233
D005DD External Power Requirements 95 240 VAC, 30 VA maximum,

and Specifications
Operating Voltage Range 12 24 VDC 12 24 VDC
ON Voltage Level > 9.0 VDC > 9.0 VDC
Max. Input Current 6mA @12VDC, 13mA @24VDC 4mA @12VDC, 8.5mA @24VDC
OFF to ON Response <100 S 2 8 mS, 4 mS typical
ON to OFF Response < 100 S 2 8 mS, 4 mS typical
On Voltage Drop 0.3 VDC @ 1 A 0.3 VDC @ 1 A
Max Current (resistive) 0.5 A / pt., 1A / pt. as standard pt. 1.0 A / point
External DC power required 20 - 28 VDC Max 150mA 20 - 28 VDC Max 150mA
OFF to ON Response < 10 s < 10 s
ON to OFF Response < 30 s < 60 s
234
D005AA The D005AA Micro PLC features eight AC inputs and six AC outputs. The following
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power
Input Wiring AC AC
Supply Supply
Equivalent Input Circuit Derating Chart for AC Outputs Equivalent Output Circuit
+V +V Points
Input +V
Optical 6 0.5 A
Isolator
Y0 Y5 OUTPUT Optical
L Isolator
To LED 4
2
Common COM
0 Line
17240
To other circuits in bank 0 10 20 30 40 50 55 C VAC COM To LED
32 50 68 86 104 122 131F
organized into two banks of four. Each bank has an isolated common terminal. The
wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent input circuit shows one
organized into two banks of three triac switches. Each bank has a common terminal.
The wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent output circuit shows one
235
D005AA External Power Requirements 95 240 VAC, 30 VA maximum,

and Specifications

Specifications Operating Voltage Range 90 120 VAC, 47 - 63 Hz
Input Current 8 mA @100 VAC at 50 Hz
10 mA @100 VAC at 60 Hz
Max. Input Current 12 mA @132 VAC at 50 Hz
15 mA @132 VAC at 60 Hz
Input Impedance 14K @50 Hz, 12K @60Hz
ON Current/Voltage > 6 mA @ 75 VAC
OFF Current/Voltage < 2 mA @ 20 VAC
AC Output Output Voltage Range (Min. - Max.) 15 264 VAC, 47 63 Hz

Specifications Operating Voltage 17 240 VAC, 47 63 Hz
On Voltage Drop 1.5 VAC (>50mA)
4.0 VAC (<50mA)
Max Current 0.5 A / point, 1.5 A / common
Max leakage current <4 mA @ 264 VAC
Max inrush current 10 A for 10 mS
Minimum Load 10 mA
OFF to ON Response 1 mS
ON to OFF Response 1 mS +1/2 cycle
236
D005DA The D005DA Micro PLC features eight DC inputs and six AC outputs. The following
and Specifications
Fuse
Line
or
C.B.
Neutral
Ground
Power
Input Wiring DC AC
Supply Supply
Equivalent Circuit, Derating Chart for AC Outputs Equivalent Output Circuit

+V +V
0.5 A +V
Input 6 Y0 Y5 OUTPUT Optical
Optical L Isolator
Isolator 4
To LED
+
2
COM

Common 0 Line
17240
0 10 20 30 40 50 55 C VAC To LED
32 50 68 86 104 122 131F
Equivalent Circuit, High- The eight DC input channels use terminals in the middle
of the connector. Inputs are organized into two banks of
Input Optical
+V
four. Each bank has an isolated common terminal, and
Isolator may be wired as sinking or sourcing inputs. The wiring
+
To LED
Common
The equivalent circuit for standard inputs is shown
above, and the high-speed input circuit is shown to the
left.
organized into two banks of three triac switches. Each bank has a common terminal.
The wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent output circuit shows one
237
D005DA External Power Requirements 95 240 VAC, 30 VA maximum,

Non-sequence/print
and Specifications

Specifications Input Voltage Range 10.8 26.4 VDC 10.8 26.4 VDC
Maximum Voltage 30 VDC (5 kHz maximum frequency) 30 VDC
Minimum Pulse Width 100 S N/A
Output Voltage Range (Min. - Max.) 15 264 VAC, 47 63 Hz

AC Output Operating Voltage 17 240 VAC, 47 63 Hz
Specifications On Voltage Drop 1.5 VAC @> 50mA, 4 VAC @< 50mA
Max Current 0.5 A / point, 1.5 A / common
Max leakage current < 4 mA @ 264 VAC, 60Hz
Max inrush current 10 A for 10 mS
Minimum Load 10 mA
OFF to ON Response 1 mS
ON to OFF Response 1 mS +1/2 cycle
238
D005DRD These micro PLCs feature eight DC inputs and six relay contact outputs. The
I/O Wiring Diagram following diagram shows a typical field wiring example. The DC external power
connection uses three terminals at the left as shown.
1224 V

20 W max.
+
and Specifications
Fuse
+
1224 VDC

Ground
Power
DC AC or DC
Input Wiring Supply Supply
Equivalent Circuit, Derating Chart for Relay Outputs Equivalent Output Circuit
+V +V
6 2A OUTPUT
Input Y0 Y5 L
+V
Optical
Isolator 4
To LED
+
2

0 COM
Common To LED
0 10 20 30 40 50 55 C Line
32 50 68 86 104 122 131F 627 VDC
Equivalent Circuit, High-

The eight DC input channels use terminals in the middle of
+V
Input Optical
Each bank has an isolated common terminal, and may be
+
To LED
Common
The equivalent circuit for standard inputs is shown above,
organized into two banks of three normally-open relay contacts. Each bank has a
common terminal. The wiring example above shows all commons connected
together, but separate supplies and common circuits may be used. The equivalent
output circuit shows one channel of a typical bank. The relay contacts can switch AC
or DC voltages.
239
D005DRD External Power Requirements 12 24 VDC, 20 W maximum,

and Specifications

Operating Voltage Range 12 -24 VDC 12 -24 VDC
Max. Input Current 6mA @12VDC 4mA @12VDC
13mA @24VDC 8.5mA @24VDC
OFF to ON Response <100 s 2 8 mS, 4 mS typical
ON to OFF Response < 100 s 2 8 mS, 4 mS typical
Relay Output Output Voltage Range (Min. - Max.) 5 -264 VAC (47 -63 Hz), 5 - 30 VDC
Specifications Operating Voltage 6 -240 VAC (47 -63 Hz), 6 - 27 VDC
Output Current 2A / point
6A / common
Maximum Voltage 264 VAC, 30 VDC
Max leakage current 0.1 mA @264 VAC
Smallest Recommended Load 5 mA
240
D005DDD These micro PLCs feature eight DC inputs and six DC outputs. The following
I/O Wiring Diagram diagram shows a typical field wiring example. The DC external power connection
1224 V

20 W max.
+
and Specifications
Fuse
+
1224 VDC

Ground
Power
Input Wiring

DC +24 VDC
Supply
+
Equivalent Circuit, Derating Chart for DC Outputs Equivalent Output Circuit

+V +V
+V +V
6 1A +
Input Y0 Y5
Optical 24VDC Optical
Isolator
Isolator 4 OUTPUT
L
To LED
+
2 + 627
VDC
To LED
Common 0
COM
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131F
Equivalent Circuit, High- The eight DC input channels use terminals in the middle of
Input
+V Each bank has an isolated common terminal, and may be
Optical
+ example above shows all commons connected together,
To LED
Common The equivalent circuit for standard inputs is shown above,
241
D005DDD External Power Requirements 12 24 VDC, 20 W maximum,

and Specifications
ON Voltage Level > 9.0 VDC > 9.0 VDC
Max. Input Current 6mA @12VDC, 13mA @24VDC 4mA @12VDC, 8.5mA @24VDC
On Voltage Drop 0.3 VDC @ 1 A 0.3 VDC @ 1 A
Max Current (resistive) 0.5 A / pt., 1A / pt. as standard pt. 1.0 A / point
External DC power required 20 - 28 VDC Max 150mA 20 - 28 VDC Max 150mA
OFF to ON Response < 10 s < 10 s
ON to OFF Response < 30 s < 60 s
242
D010ND3 DC Input
Inputs per module 10 (sink/source)
Input voltage range 10.826.4 VDC
Operating voltage range 1224 VDC
Peak voltage 30.0 VDC
Input current Typical:
4.0 mA @ 12 VDC
8.5 mA @ 24 VDC
Maximum input current 11 mA @ 26.4 VDC
Input impedance 2.8k @ 1224 VDC
ON voltage level > 10.0 VDC
Installation, Wiring
and Specifications
OFF voltage level < 2.0 VDC

Minimum ON current 3.5 mA
Maximum OFF current 0.5 mA
OFF to ON response 28 ms, typical 4 ms
ON to OFF response 28 ms, typical 4 ms
Status indicators Module activity:
one green LED
Commons per module 2 nonisolated
Fuse N/A
Base power required (5V) Typical 35 mA (all pts. ON)
Derating Chart
Safety Guidelines
Installation and
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F
Equivalent circuit

V+
INPUT
To LED
Optical
COM Isolator
+
1224VDC
COM
Configuration shown is current sinking
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
243
D016ND3 DC Input
Inputs per module 16 (sink/source)
Input voltage range 2028 VDC
Input current Typical:
4.0 mA @ 24 VDC
Maximum input current 6 mA @ 28 VDC
and Specifications
ON to OFF response 28 ms, typical 4 ms
one green LED
Fuse N/A
Base power required Typical 35 mA (all pts. ON)
Wiring for ZLCM056

Derating Chart
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F Configuration shown is
Ambient Temperature (C/F) for current sinking
Safety Guidelines
Installation and
Equivalent input circuit
Configuration shown is for current sinking
Note: The DL05 must have firmware version V4.10 Use Ziplink ZLCBL056 cable and ZLCM056 connector
module or build your own cables using 24pin Molex Micro
(or later) for this module to function properly. Fit 3.0 receptacle, part number 43025, or compatible.
244
D010TD1 DC Output
Outputs per module 10 (sinking)
Output voltage range 530 VDC
Maximum output current 0.3 A/point, 1.5 A/common
Minimum output current 0.5 mA
Maximum leakage current 15 A @ 30.0 VDC
ON voltage drop 0.5 VDC @ 0.3 A
Maximum inrush current 1 A for 10 ms
and Specifications
OFF to ON response < 10 s

ON to OFF response < 60 s
one green LED
(5 points/common)
Fuse N/A
External DC power required 2028 VDC max.
200 mA (all pts. on)
Base power required (5V) Max. 150 mA (all pts. ON)
Derating Chart
Safety Guidelines
0 10 20 30 40 50 55 C
Installation and
32 50 68 86 104 122 131 F

Equivalent circuit
245
D016TD1 DC Output
Outputs per module 16 (sinking)
Output voltage range 530 VDC
Peak Voltage 50.0 VDC
Maximum leakage current 15 A @ 30.0 VDC
On voltage drop 0.5 VDC @ 0.1 A
and Specifications
OFF to ON response < 0.5 ms
ON to OFF response < 0.5 ms
one green LED
Commons per module 2 isolated (8 points/common)
Fuse N/A
External DC power required 2028 VDC max. 70 mA
(all pts. on)
Wiring for ZLCM056

Derating Chart
24 VDC
627
627 VDC VDC
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F
Safety Guidelines
Installation and
module or build your own cables using 24pin Molex Micro
(or later) for this module to function properly. Fit 3.0 receptacle, part number 43025, or compatible.
246
D010TD2 DC Output
Outputs per module 10 (sourcing)
Output voltage range 10.826.4 VDC
Maximum leakage current 1.5 A @ 30.0 VDC
and Specifications

one green LED
(5 points/common)
Fuse N/A
Derating Chart
Safety Guidelines
Installation and
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F
Equivalent circuit
247
D016TD2 DC Output
Outputs per module 16 (sourcing)
Output voltage range 10.826.4 VDC
Peak Voltage 50.0 VDC
and Specifications
OFF to ON response < 0.5 ms
ON to OFF response < 0.5 ms
one green LED
(8 points/common)
Fuse N/A
Wiring for ZLCM056

Derating Chart
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F
Safety Guidelines
Installation and
(or later) for this module to function properly. module or build your own cables using 24pin Molex Micro
Fit 3.0 receptacle, part number 43025, or compatible.
248
D007CDR DC Input and Output

Input Specification Output Specification
Inputs per module 4 (sink/source) Outputs per module 3
Operating voltage range 1224 VDC Operating voltage range 627 VDC / 6240 VAC
Input voltage range 10.826.4 VDC Output type Relay, form A, SPST
Peak voltage 30.0 VDC Peak voltage 30.0 VDC/264 VAC
Maximum input current 11 mA @ 26.4 VDC Maximum current (resistive) 1 A/point, 4 A/common
Input current Typical: 4 mA @ 12 VDC Minimum load current 5 mA @ 5 VDC
8.5 mA @ 24 VDC
Maximum leakage current 0.1 mA @ 264 VAC
and Specifications
ON voltage drop N/A

Maximum inrush current Output: 3 A for 10 ms
OFF voltage level < 2.0 VDC Common: 10 A for 10 ms
Minimum ON current 3.5 mA OFF to ON response < 15 ms
Maximum OFF current 0.5 mA ON to OFF response < 10 ms
ON to OFF response 28 ms, typical 4 ms Status indicators Module activity:
one green LED
Commons 1 (3 points/common)
Commons 1 (4 points / common)
Fuse N/A
Base power required (5 V) Max. 200 mA (all points ON)
Input Derating Chart Output Derating Chart
0 10 20 30 40 50 55 C
0 10 20 30 40 50 55 C
Safety Guidelines
32 50 68 86 104 122 131 F

32 50 68 86 104 122 131 F
Installation and

Equivalent output circuit
249
D008TR Relay Output

Outputs per module 8
Operating voltage range 627 VDC/6240 VAC
Output type Relay, form A, SPST
Peak voltage 30.0 VDC/264 VAC
Maximum current (resistive) 1 A/point, 4 A/common
Minimum load current 0.5 mA
Maximum leakage current 0.1 mA @ 264 VAC
ON voltage drop N/A
Maximum inrush current Output: 3 A for 10 ms
and Specifications
Common: 10 A for 10 ms
OFF to ON response < 15 ms
ON to OFF response < 10 ms
one green LED
Commons per module 2 isolated
(4 points/common)
Fuse N/A
Base power required (5 V) Maximum 280 mA (all pts. ON)
Derating Chart
Safety Guidelines
0 10 20 30 40 50 55 C
Installation and
32 50 68 86 104 122 131 F
Equivalent circuit
250
D008CDD1 DC Input and Output

Input Specification Output Specification
Inputs per module 4 (sink/source) Outputs per module 4 (sinking)
Operating voltage range 10.826.4 VDC Operating voltage range 627 VDC
Input voltage range 1224 VDC Output voltage range 530 VDC
Peak voltage 30.0 VDC Peak voltage 50.0 VDC
Maximum input current 11 mA @ 26.4 VDC Maximum output current 0.3 A/point, 1.2 A/common
Input current Typical: 4 mA @ 12 VDC Minimum output current 0.5 mA
8.5 mA @ 24 VDC
and Specifications

ON to OFF response 28 ms, typical 4 ms one green LED
OFF to ON response 28 ms, typical 4 ms Commons 2 nonisolated (4 pts./common)
Commons 2 nonisolated (4 pts./common) Fuse N/A
Base power required (5 V) Max. 200 mA (all points ON)
External DC power required 2028 VDC, maximum 80 mA
(24V) (all pts. ON)
Input Derating Chart

Output Derating Chart
0 10 20 30 40 50 55 C
32 50 68 86 104 122 131 F 0 10 20 30 40 50 55 C
Safety Guidelines
Ambient Temperature (C/F) 32 50 68 86 104 122 131 F

Installation and
Equivalent output circuit
251
I/O Addressing
Module I/O Points Each option module has a set number of I/O points. This holds true for both the
and Addressing discrete modules and the analog modules. The following chart shows the number of
I/O points per module when used in the DL05 PLC.
DC Input Modules I/O Points Slot 1 I/O Address

D010ND3 10 Input X100 X107 and X110 X111
D016ND 16 Input X100 X107 and X110 X117
DC Output Modules I/O Points Slot 1 I/O Address
and Specifications
D010TD1 10 Output Y100 Y107 and Y110 Y111
Relay Output Modules I/O Points Slot 1 I/O Address

D008TR 8 Output Y100 X107
Combination Modules I/O Points Slot 1 I/O Address

D007CDR 4 Input, 3 Output X100 X103 and Y100 Y102
D008CDD1 4 Input, 4 Output X100 X103 and Y100 Y103
Safety Guidelines
Installation and
13
High-Speed Input and
Pulse Output Features
Introduction
Choosing the HSIO Operating Mode
Mode 10: HighSpeed Counter
Mode 20: Quadrature Counter
Mode 30: Pulse Output
Mode 40: HighSpeed Interrupt
Mode 50: Pulse Catch Input
Mode 60: Filtered Inputs
32
High-speed Input and Pulse Output Features
Introduction
Built-in Motion Many machine control applications

Control Solution require various types of simple
high-speed monitoring and control. These
applications usually involve some type of
motion control, or high-speed interrupts
for time-critical events. The DL05 Micro
PLC solves this traditionally expensive
problem with built-in CPU enhancements.
Lets take a closer look at the available
high-speed I/O features.
The available high-speed input features are:

S High Speed Counter (5 kHz max.) with up to 24 counter presets and
built-in interrupt subroutine, counts up only, with reset
S Quadrature encoder inputs to measure counts and clockwise or counter
clockwise direction (5 kHz max.), counts up or down, with reset
S High-speed interrupt input for immediate response to critical or
time-sensitive tasks
S Pulse catch feature to monitor one input point, having a pulse width as
small as 100mS (0.1ms)
S Programmable discrete filtering (both on and off delay up to 99ms) to
ensure input signal integrity (this is the default mode for inputs X0X2)
The available pulse output features are:
S Single-axis programmable pulse output (7 kHz max.) with three profile
types, including trapezoidal moves, registration, and velocity control
Availability of IMPORTANT: Please note the following restrictions on availability of features:
HSIO Features S High-speed input options are available only on DL05s with DC inputs.
S Pulse output options are available only on DL05s with DC outputs.
S Only one HSIO feature may be in use at one time. You cannot use a
highspeed input feature and the pulse output at the same time.
DL05 Discrete Discrete High-Speed Pulse

Part Number Input Type Output Type Input Output
D005AR AC Relay No No
D005DR DC Relay Yes No
D005AD AC DC No Yes
D005DD DC DC Yes Yes
D005AA AC AC No No
D005DA DC AC Yes No
D005DRD DC Relay Yes No
D005DDD DC DC Yes Yes
33
High-Speed Input and Pulse Output Features
Dedicated High- The internal CPUs main task is to execute the ladder program and read/write all I/O
Speed I/O Circuit points during each scan. In order to service high-speed I/O events, the DL05
includes a special circuit which is dedicated to a portion of the I/O points. Refer to the
DL05 block diagram in the figure below.
6 Discrete Outputs
DL05
PLC Output Circuit
Y0, Y1 Y2 - Y5
High-Speed CPU
I/O Circuit
X0 - X2 X3- X7
Input Circuit
8 Discrete Inputs

The high-speed I/O circuit (HSIO) is dedicated to the first three inputs (X0 X2) and

the first two outputs (Y0 Y1). We might think of this as a CPU helper. In the default
operation (called Mode 60) the HSIO circuit just passes through the I/O signals to
or from the CPU, so that all eight inputs behave equally and all six outputs behave
equally. When the CPU is configured in any other HSIO Mode, the HSIO circuit
imposes a specialized function on the portion of inputs and outputs shown. The
HSIO circuit operates independently of the CPU program scan. This provides
accurate measurement and capturing of high-speed I/O activity while the CPU is
busy with ladder program execution.
Wiring Diagrams After choosing the appropriate HSIO mode for your application, youll need to refer to
for Each HSIO the section in this chapter for that specific mode. Each section includes wiring
Mode diagram(s) to help you connect the High-Speed I/O points correctly to field devices.
An example of the quadrature counter mode diagram is shown below.
Signal Common
Phase B
+
12 24 VDC
Phase A

Encoder
34
Choosing the HSIO Operating Mode

Understanding the The High-Speed I/O circuit operates in one of 6 basic modes as listed in the table
Six Modes below. The number in the left column is the mode number (later, well use these
numbers to configure the PLC). Choose one of the following modes according to the
primary function you want from the dedicated High-Speed I/O circuit. You can simply
use all eight inputs and six outputs as regular I/O points with Mode 60.
Mode Mode Name Mode Features

Number
10 High-Speed 5 kHz counter with 24 presets and reset input,
Counter counts up only, causes interrupt on preset
20 Quadrature Channel A / Channel B 5 kHz quadrature input,
Counter counts up and down
30 Pulse Output Stepper control pulse and direction signals,
programmable motion profile (7kHz max.)
40 High-Speed Generates an interrupt based on input transition
Interrupt or time
50 Pulse Catch Captures narrow pulses on a selected input
60 Discrete/Filtered Rejects narrow pulses on selected inputs

Input
In choosing one of the six high-speed I/O modes, the I/O points listed in the table
below operate only as the function listed. If an input point is not specifically used to
support a particular mode, it usually operates as a filtered input by default. Similarly,
output points operate normally unless Pulse Output mode is selected.
Physical I/O Point Usage

DC Input Points DC Output Points
Mode X0 X1 X2 Y0 Y1
High-Speed Counter clock Filtered Input Filtered Input Regular Output Regular Output
Counter or Reset Cnt
Quadrature Phase A Input Phase B Input Filtered Input Regular Output Regular Output
Counter or Reset Cnt
High-Speed Interrupt Input Filtered Input Filtered Input Regular Output Regular Output
Interrupt
Pulse Catch Pulse Input Filtered Input Filtered Input Regular Output Regular Output
Pulse Output Filtered Input Filtered Input Filtered Input, Pulse Direction
or or
CW Pulse CCW Pulse
Filtered Input Filtered Input Filtered Input Filtered Input Regular Output Regular Output
Default Mode Mode 60 (Filtered Inputs) is the default mode. The DL05 is initialized to this mode at
the factory, and any time you reset V-memory scratchpad. In the default condition,
X0X2 are filtered inputs (10 mS delay) and Y0Y1 are standard outputs.
35
Configuring the If you have chosen a mode suited to the high-speed I/O needs of your application,
HSIO Mode were ready to proceed to configure the PLC to operate accordingly. In the block
diagram below, notice the V-memory detail in the expanded CPU block. V-memory
location V7633 determines the functional mode of the high-speed I/O circuit. This is
the most important V-memory configuration value for HSIO functions!
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
CPU
HighSpeed I/O data
Vmemory
I/O Circuit Mode Select
V7633 xxxx
X0 - X2 X3- X7
Input Circuit

The contents of V7633 is a 16-bit word, to be entered in binarycoded decimal. The
figure below defines what each 4-bit BCD digit of the word represents.
Memory Location V7633
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0
0 0 5 0
Bits 8 - 15 are not used HSIO Mode Setup (BCD)

in V7633. 00 = Not Used
10 = High-Speed Counting Mode
20 = Quadrature Counting Mode
30 = Pulse Output Train
40 = High-Speed Interrupts
50 = Pulse Catching
60 = Discrete Filtered Inputs (default)
Bits 0 7 define the mode number 00, 10.. 60 previously referenced in this chapter.
The example data 2050 shown selects Mode 50 Pulse Catch (BCD = 50). The
DL05 PLC ignores bits 8 - 15 in V7633.
Configuring In addition to configuring V7633 for the
Inputs X0 X2 HSIO mode, youll need to program the Vmemory
next three locations in certain modes Mode V7633 xxxx
according to the desired function of input
points X0 X2. Other memory locations X0 V7634 xxxx
may require configuring, depending on the X1 V7635 xxxx
HSIO mode (see the corresponding X2 V7636 xxxx
section for particular HSIO modes).
36
Mode 10: High-Speed Counter

Purpose The HSIO circuit contains one high-speed counter. A single pulse train from an
external source (X0) clocks the counter on each signal leading edge. The counter
counts only upwards, from 0 to 99999999. The counter compares the current count
with up to 24 preset values, which you define. The purpose of the presets is to quickly
cause an action upon arrival at specific counts, making it ideal for such applications
as cut-to-length. It uses counter registers CT76 and CT77 in the CPU.
Functional Block Refer to the block diagram below. When the lower byte of HSIO Mode register V7633
Diagram contains a BCD 10, the high-speed up counter in the HSIO circuit is enabled. X0
automatically becomes the clock input for the high-speed counter, incrementing it
upon each off-to-on transition. The external reset input on X2 is the default
configuration for Mode 10. Input X1 is the filtered input, available to the ladder
program.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
CPU
HSIO
I/O data
COUNTER Vmemory
FILTER Mode Select
CLK Reset V7633 0010
X0 X2 X1 X3- X7
Input Circuit
Instead of using X2 as a dedicated reset input, you can configure X2 as a normal

filtered input. In this way, the counter reset must be generated in ladder logic.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO I/O data CPU
COUNTER Vmemory
Mode Select
CLK Reset FILTER V7633 0010
X0 X1, X2 X3- X7
Input Circuit
Next, we will discuss how to program the high-speed counter and its presets.
37
Wiring Diagram A general wiring diagram for counters/encoders to the DL05 in HSIO Mode 10 is
shown below. Many types of pulse-generating devices may be used, such as
proximity switches, single-channel encoders, magnetic or optical sensors, etc.
Devices with sinking outputs (NPN open collector) are probably the best choice for
interfacing. If the counter sources to the inputs, it must output 12 to 24 VDC. Note
that devices with 5V sourcing outputs will not work with DL05 inputs.
Signal
Counter Input Wiring
+ Signal Common
1224 VDC Supply

Interfacing to The DL05s DC inputs are flexible in that they detect current flow in either direction,
Counter Outputs so they can be wired to a counter with either sourcing or sinking outputs. In the
following circuit, a counter has open-collector NPN transistor outputs. It sinks
current from the PLC input point, which sources current. The power supply can be
the FA24PS or another supply (+12VDC or +24VDC), as long as the input
specifications are met.
Counter Output
X0 Input
Output Input
1224 VDC Supply
Ground + Common
In the next circuit, an encoder has open-emitter PNP transistor outputs. It sources
current to the PLC input point, which sinks the current back to ground. Since the
encoder sources current, no additional power supply is required. However, note that
the encoder output must be 12 to 24 volts (5V encoder outputs will not work).
Counter Output
+12 to 24VDC X0 Input

Input
(sinking)
Output (sourcing)
Ground Common
38
Setup for Mode 10 Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 10 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
0 0 1 0

in V7633.
10 = High-Speed Counter
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor or Data View
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.

Presets and The goal of counting is to do a special action when the count reaches a preset value.
Special Relays Refer to the figure below. The counter features 24 presets, which you can program.
A preset is a number you derive and store so that the counter will constantly compare
the current count with the preset. When the two are equal, a special relay contact is
energized and program execution jumps to the interrupt routine. We recommend
using the special relay(s) in the interrupt service routine to cause any immediate
action you desire. After the interrupt service routine is complete, the CPU returns to
the ladder program, resuming program execution from the point of interruption. The
compare function is ready for the next preset event.
CPU Scan
Counter Current Input
Update
Value
X0, counter clock Ladder INT
Reset
Program
X2, external reset
Does = Execution HSIO
Count = Interrupt
Vmemory Preset Data Preset? Routine
V2320 0000 1000 Current Program
V2322 0000 2000 instruction
SPxxx
V2324 0000 2500
Output
V2326 0000 3175 Update IRT
V2376 0921 0000

39
Preset Data V7630 is a pointer location which points to Preset Table Pointer
Starting Location the beginning of the Preset Data Table. V7630 2000
The default starting location for the Preset
Data Table is V2320 (default after
initializing scratchpad V-memory). Preset Data
However, you may change this by V2000 0000 1000
programming a different value in V7630. V2002 0000 2000
Use the LDA and OUT instructions as
shown: V2004 0000 2500
Load the octal address, V2006 0000 3175
LDA convert to hex, leave
O2000 result in accumulator.
Output this address to
OUT V7630, the location of the
V7630 pointer to the Preset data. V2076 0000 0000
Using Fewer than When using fewer than 24 preset Preset Data
24 Presets registers, the HSIO looks for 0000 FFFF
V2320 0000 1000
(use LDD Kffff) in the next preset location
to indicate the last preset has been V2322 0000 2000
reached. The example to the right uses V2324 0000 2500
four presets. The 0000 FFFF in V2326 0000 3175
V2331-V2330 indicates the previous V2330 0000 FFFF

preset was the last.
NOTE: Each successive preset must be greater than the previous preset value. If a
preset value is less than a lower-numbered preset value, the CPU cannot compare
for that value, since the counter can only count upwards.
Equal Relay The following table lists all 24 preset register default locations. Each occupies two
Numbers 16-bit V-memory registers. The corresponding special relay contact number is in the
next column. We might also call these equal relay contacts, because they are true
(closed) when the present high-speed counter value is equal to the preset value.
Each contact remains closed until the counter value equals the next preset value.
Preset Preset Special Preset Preset Special

V-memory Regis- Relay V-memory Regis- Relay
ter Number ter Number
1 V2321 / V2320 SP540 13 V2351 / V2350 SP554
2 V2323 / V2322 SP541 14 V2353 / V2352 SP555
3 V2325 / V2324 SP542 15 V2355 / V2354 SP556
4 V2327 / V2326 SP543 16 V2357 / V2356 SP557
5 V2331 / V2330 SP544 17 V2361 / V2360 SP560
6 V2333 / V2332 SP545 18 V2363 / V2362 SP561
7 V2335 / V2334 SP546 19 V2365 / V2364 SP562
8 V2337 / V2336 SP547 20 V2367 / V2366 SP563
9 V2341 / V2340 SP550 21 V2371 / V2370 SP564
10 V2343 / V2342 SP551 22 V2373 / V2372 SP565
11 V2345 / V2344 SP552 23 V2375 / V2374 SP566
12 V2347 / V2346 SP553 24 V2377 / V2376 SP567
310
Calculating Your The preset values occupy two data words each. They can range in value from 0000
Preset Values 0000 to 9999 9999, just like the high-speed counter value. All 24 values are absolute
values, meaning that each one is an offset from the counter zero value.
The preset values must be individually derived for each application. In the industrial
lathe diagram below, the PLC monitors the position of the lead screw by counting
pulses. At points A, B, and C along the linear travel, the cutter head pushes into the
work material and cuts a groove.
PLC
Industrial Lathe
A B C
Counter
Device Motor
X0, counter clock
Start
The timing diagram below shows the duration of each equal relay contact closure.
Each contact remains on until the next one closes. All go off when the counter resets.
Equal Relays A B C
SP540
SP541
SP542
NOTE: Each successive preset must be two numbers greater than the previous
preset value. In the industrial lathe example, B>A+1 and C>B+1.
X Input The configurable discrete input options for High-Speed Counter Mode are listed in
Configuration the table below. Input X0 is dedicated for the counter clock input. Input X1 can be a
normal or filtered input. The section on Mode 60 operation at the end of this chapter
describes programming the filter time constants. Input X2 can be configured as the
counter reset, with or without the interrupt option. The interrupt option allows the
reset input (X2) to cause an interrupt like presets do, but there is no SP relay contact
closure (instead, X2 will be on during the interrupt routine, for 1 scan). Or finally, X2
may be left simply as a filtered input.
311
Input Configuration Function Hex Code

Register Required
X0 V7634 Counter Clock 0001
X1 V7635 Filtered Input xx06, xx = filter time

0 - 99 ms (BCD)
X2 V7636 Counter Reset (no interrupt) 0007* (default)
0207*
Counter Reset (with interrupt) 0107*
0307*
FIltered Input xx06, xx = filter time
0 - 99 ms (BCD)
*With the counter reset, you have the option of a normal reset or a faster reset.
However, the fast reset does not recognize changed preset values during program
execution. When 0007 or 0107 are set in V7636 and preset values are changed
during program execution, the DL05 recognizes the changed preset values at the
time of the reset. When 0207 or 0307 are set in V7636 the CPU does not check for
changed preset values, so the DL05 has a faster reset time.

Writing Your You may recall that the counter instruction is a standard instruction in the DL05
Control Program instruction set. Refer to the figure below. The mnemonic for the counter is UDC
(up-down counter).The DL05 can have up to 128 counters, labeled CT0 through
CT177. The high speed counter in the HSIO circuit is accessed in ladder logic by
using UDC CT76. It uses counter registers CT76 and CT77 exclusively when the
HSIO mode 10 is active (otherwise, CT76 and CT77 are available for standard
counter use). The HSIO counter needs two registers because it is a double-word
counter. It has three inputs as shown. The first input (Enable) allows counting when
active. The middle input is a dummy and has no fuction other than it is required by the
built-in compiler. The bottom signal is the reset. The Dummy Input must be off while
the counter is counting.
Standard Counter Function HSIO Counter Function
UP Count UDC CTxx Enable Input UDC CT76

DOWN Count Dummy Input
Kxxxxxxxx Kxxxxxxxx
Reset Input Reset Input
D Counts UP and DOWN D Counts UP only

D Preload counter by write to value D Can use Dummy Input to change count
D Reset input is internal only D Reset may be internal or external
312
The next figure shows how the HSIO counter will appear in a ladder program. Note
that the Enable Interrupt (ENI) command must execute before the counter value
reaches the first preset value. We do this at powerup by using the first scan relay.
When using the counter but not the presets and interrupt, we can omit the ENI.
DirectSOFT
SP1
ENI Required
XX
Enable Input UDC CT76
XX
Dummy Input Kxxxxxxxx
XX Preset Range:
Reset Input 1-99999999
When the enable input is energized, the high-speed counter will respond to pulses
on X0 and increment the counter at CT76 CT77. The reset input contact behaves in
a logical OR fashion with the physical reset input X2 (when selected). So,the high
speed counter can receive a reset form either the contact(s) on the reset rung in the
ladder, OR the external reset X2 if you have configured X2 as an external reset.

Program Example: The following example is the simplest way to use the high-speed counter, which
Counter Without does not use the presets and special relays in the interrupt routine. The program
Preset configures the HSIO circuit for Mode 10 operation, so X0 is automatically the counter
clock input. It uses the Compare-double (CMPD) instruction to cause action at
certain count values. Note that this allows you to have more than 24 presets.Then it
configures X2 to be the external reset of the counter.
313
Program DirectSOFT
Example Contd First Scan Only
SP0 Load constant K10 into the accumulator. This
LD selects Mode 10 as the HSIO mode.
K10
Mode 10 Output the constant K10 to V7633, the

OUT location of HSIO Mode select register.
V7633
Load the constant required to configure X0 as
LD the counter clock.
K1
Output the constant K1 to V7634, the location of

OUT the setup parameter for X0.
V7634
Load the constant required to configure input
Configure LD as filtered inputs.
Inputs K1006
Output the constant K1006 to V7635, the location

OUT of setup parameter for X1.
V7635

LD an external reset without interrupt.
K7

V7636
SP1
UDC CT76 CT76 is the HSIO counter. The first rungs SP1
always enables the counter. The dummy input in
SP1 the middle is always off. The third rungs Reset
Kxxxxxxxx input is always off, because we will use the
external reset.
SP1
SP1 Load the current count of the HSIO counter in

LDD V1076 and V1077 into the accumulator
V1076
Use the Compare-double instruction to compare

CMPD the double word in the accumulator to the constant
K309482
K309482
SP62 Y0
OUT The execution of the above CMPD instruction turns
on special relay contact SP62 if the current count
is greater than the comparison number (K309482).
END END coil marks the end of the main program.
The compare double instruction above uses the current count of the HSIO counter to
turn on Y0. This technique can make more than 24 comparisons, but it is scan-time
dependent. However, use the 24 built-in presets with the interrupt routine if your
application needs a very fast response time, as shown in the next example.
314
Counter With The following example shows how to program the HSIO circuit to trigger on three
Presets preset values. You may recall the industrial lathe example from the beginning of this
Program Example chapter. This example program shows how to control the lathe cutter head to make
three grooves in the work-piece at precise positions. When the lead screw turns, the
counter device generates pulses which the DL05 can count. The three preset
variables A, B, and C represent the positions (number of pulses) corresponding to
each of the three grooves.
Preset Data A V2320 0000 1500 Industrial Lathe

B V2322 0000 3780
C V2324 0000 4850 A B C
V2326 0000 FFFF
I/O X3 - Cutter head extended

Assignments X4 - Cutter head retracted Counter
Y0 - Lead screw motor Device
Start
Y1 - Cutter head solenoid Cutter head Lead screw
DirectSOFT
SP0 Enable Interrupts before reaching a preset
ENI generates an interrupt. Special Relay SP0 is on
during the first CPU scan.

K10
OUT Output this address to V7633, the location of

V7633 HSIO Mode select register.

K1
V7634
Select Mode 10 LD an external reset with interrupt.
K107
OUT Output the constant to V7636, the location of the

V7636 setup parameter for X2.
Load the octal address O2320 into the

LDA accumulator. This instruction automatically
O2320 converts the address into hex.
OUT Output this address to V7630, the location of

V7630 the pointer to the Preset Table.
SP0 Load the preset A value into the accumulator.

LDD
K1500
Load Presets OUTD Output the accumulator contents to the memory
V2320 location for preset 1.
Load the preset B value into the accumulator.

LDD
K3780
OUTD Output the accumulator contents to the memory

315
Load the preset C value into the accumulator.

LDD
K4850

Load the constant Kffff into the accumulator. This

LDD value represents the end of the preset list.
Kffff

V2326 location for preset 4 (end of preset marker).
SP1
UDC CT76 CT76 is the HSIO counter. The first rungs SP1
always enables the counter. The dummy input in
SP1 the middle is off (unused in this example).
Kxxxxxxxx
SP1
The third rungs Reset input is normally off,

SP0 because we will use the external reset. You can
optionally reset the counter value on each powerup
using the SP0 contact.
X3 Y1

RST Input X3 energizes when the groove has finished
cutting. So, we retract the cutter head.
X4 Y0
SET Turn lead screw on again, after cutter head has
retracted.
The INT label marks the beginning of the interrupt

INT O0
service routine program.
SP540 Preset 1 Y0
RSTI Inside the interrupt service routine, we turn OFF the
lead screw motor immediately.
SP541
Y1 These special equal relays turn on individually as
Preset 2 the corresponding preset is reached. In this
SETI application, each results in the cutting of a groove
SP542 (Y1), so they are logically ORed together.
Preset 3
X2 C10
SETI Input X2 will be energized inside the interrupt
routine if X2 external interrupt was the source.
IRT Return from the interrupt service routine.
Some applications will require a different type of action at each preset. It is possible
for the interrupt routine to distinguish one preset event from another, by turning on a
unique output for each equal relay contact SPxxx. We can determine the source of
the interrupt by examining the equal relay contacts individually, as well as X2. The X2
contact will be on (inside the interrupt routine only) if the interrupt was caused by the
external reset, X2 input.
316
Counter With The following example shows how you can preload the current count with another
Preload value. When the preload command input (X4 in this example) is energized, we
Program Example disable the counter from counting with C0. Then we write the value K3000 to the
count register (V1076-V1077). We preload the current count of the counter with
K3000. When the preload command (X4) is turned off, the counter resumes counting
any pulses, but now starting from K3000.
DirectSOFT
K10
Select Mode 10 OUT Output this address to V7633, the location of

V7633 HSIO Mode select register.

K1
V7634
LD an external reset with interrupt.
K107
OUT Output the constant to V7636, the location of the

V7636 setup parameter for X2.
C0
SET Set C0 on at powerup to enable counting.
C0
UDC CT76 CT76 is the HSIO counter. The first rungs C0
contact enables the counter. The dummy input is in
C1 the middle.
K99999999
C2
because we will use the external reset. You can
SP0 optionally reset the counter value on each powerup
X4 C0 When the preload request is made, the user turns

on X4. First we disable counting by resetting C0,
RST the counters enable input.
Load the BCD value K3000 into the

LDD accumulator.
K3000
OUTD Output the constant to V1076/V1077, the location

V1076 of the accumulated count for CT76.
C1
Generate a preload counter input pulse, which
PD causes the counter to preload from V1076-V1077.
C0 C1 C0
Enable the counter by setting C0, when the
SET preolad pulse on C1 has occurred (C1 is off).

317
Troubleshooting If youre having trouble with Mode 10 operation, please study the following
Guide for Mode 10 symptoms and possible causes. The most common problems are listed below.
Symptom: The counter does not count.

Possible causes:
1. Field sensor and wiring Verify that the encoder, proximity switch,or
counter actually turns on and illuminates the status LED for X0. The
problem could be due to sinking-sourcing wiring problem, etc. Remember
to check the signal ground connection. Also verify that the pulse on-time is
long enough for the PLC to recognize it.
2. Configuration use the Data View window to check the configuration
parameters. V7633 must be set to 10, and V7634 must be set to 1 to enable
the HSIO counter mode.
3. Stuck in reset check the input status of the reset input, X2. If X2 is on, the
counter will not count because it is being held in reset.
4. Ladder program make sure you are using counter CT76 in your
program. The top input is the enable signal for the counter. It must be on
before the counter will count. The middle input is the dummy input. The
bottom input is the counter reset, and must be off during counting.

Symptom: The counter counts but the presets do not function.
Possible causes:
1. Configuration Ensure the preset values are correct. The presets are
32-bit BCD values having a range of 0 to 99999999. Make sure you write all
32 bits to the reserved locations by using the LDD and OUTD instructions.
Use only evennumbered addresses, from V2320 to V2376. If using less
than 24 presets, be sure to place 0000FFFF in the location after the last
preset used.
2. Interrupt routine Only use Interrupt #0. Make sure the interrupt has been
enabled by executing an ENI instruction prior to needing the interrupt. The
interrupt routine must be placed after the main program, using the INT label
and ending with an interrupt return IRT.
3. Special relays Check the special relay numbers in your program. Use
SP540 for Preset 1, SP541 for Preset 2, etc. Remember that only one
special equal relay contact is on at a time. When the counter value reaches
the next preset, the SP contact which is on now goes off and the next one
turns on.
Symptom: The counter counts up but will not reset.

Possible causes:
1. Check the LED status indicator for X2 to make sure it is active when you
want a reset. Or, if you are using an internal reset, use the status mode of
DirectSOFT to monitor the reset input to the counter.
318
Mode 20: Quadrature Counter

Purpose The counter in the HSIO circuit can count two quadrature signal pulses instead of a
single pulse train (mode 10 operation). Quadrature signals are commonly generated
from incremental encoders, which may be rotary or linear. The quadrature counter
has two ranges from 0 to 99999999 or -8388608 to 8388607. Using CT76 and CT77,
the quadrature counter can count at up to a 5 kHz rate. Unlike Mode 10 operation,
Mode 20 operation can count UP or DOWN, but does not feature automated preset
values or interrupt on external reset capability. However, you have the standard
ladder instruction preset of CT76.
Functional Block The diagram below shows HSIO functionality in Mode 20. When the lower byte of
Diagram HSIO Mode register V7633 contains a BCD 20, the quadrature counter in the HSIO
circuit is enabled. Input X0 is dedicated to the Phase A quadrature signal, and input
X1 receives Phase B signal. X2 is dedicated to reset the counter to zero value when
energized.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO CPU
I/O data
COUNTER Vmemory
Mode Select
Phase Phase V7633 0020
A B Reset
X0 X1 X2 X3- X7
Input Circuit
Quadrature Quadrature encoder signals contain position and direction information, while their
Encoder Signals frequency represents speed of motion. Phase A and B signals shown below are
phase-shifted 90 degrees, thus the quadrature name. When the rising edge of
Phase A precedes Phase Bs leading edge (indicates clockwise motion by
convention), the HSIO counter counts UP. If Phase Bs rising edge precedes Phase
As rising edge (indicates counter-clockwise motion), the counter counts DOWN.
Leading Edge Signal 90 phase shift
Clockwise sequence
Phase A
Phase B
Counterclockwise sequence
Phase A
Phase B
Leading Edge Signal one cycle

319
Wiring Diagram A general wiring diagram for encoders to the DL05 in HSIO Mode 20 is shown below.
Encoders with sinking outputs (NPN open collector) are probably the best choice for
interfacing. If the encoder sources to the inputs, it must output 12 to 24 VDC. Note
that encoders with 5V sourcing outputs will not work with DL05 inputs.
Signal Common
Phase B
+
12 24 VDC
Phase A

Encoder

Interfacing to The DL05s DC inputs are flexible in that they detect current flow in either direction,

Encoder Outputs so they can be wired to an encoder with either sourcing or sinking outputs. In the
following circuit, an encoder has open-collector NPN transistor outputs. It sinks
current from the PLC input point, which sources current. The power supply can be
the +24VDC auxiliary supply or another supply (+12VDC or +24VDC), as long as the
input specifications are met.
Encoder Output,
(one phase) Phase A or B Input
Output Input
1224 VDC Supply
Ground + Common
In the next circuit, an encoder has open-emitter PNP transistor outputs. It sources
current to the PLC input point, which sinks the current back to ground. Since the
encoder sources current, no additional power supply is required. However, note that
the encoder output must be 12 to 24 volts (5V encoder outputs will not work).
Encoder Output,
(one phase)
+12 to 24VDC Phase A or B Input
Input
(sinking)
Output (sourcing)
Ground Common
320
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
0 0 2 0

in V7633.
20 = Quadrature Counter
S DirectSOFTs memory editor
X Input The configurable discrete input options for High-Speed Counter Mode are listed in
Configuration the table below. Input X0 is dedicated for Phase A, and input X1 is for Phase B. Input
X2 is the reset input to the quadrature counter, but it does not cause an interrupt. The
section on Mode 60 operation at the end of this chapter describes programming the
filter time constants.

Register Required
X0 V7634 Phase A 0002 (default)
quadrature, absolute
0 to 99999999
0012
quadrature, absolute
-8388608 to 8388607
X1 V7635 Phase B 0000
X2 V7636 Counter Reset (no interrupt) 0007
Discrete filtered input 1006
321
Writing Your You may recall that the Up-Down counter instruction is standard in the DL05
Control Program instruction set. Refer to the figure below. The mnemonic for the counter is UDC
(up-down counter).The DL05 can have up to 128 counters, labeled CT0 through
CT177. The quadrature counter in the HSIO circuit is accessed in ladder logic by
using UDC CT76. It uses counter registers CT76 and CT77 exclusively when the
HSIO mode 20 is active (otherwise, CT76 and CT77 are available for standard
counter use). The HSIO counter needs two registers because it is a double-word
counter. It also has three inputs as shown, but they are redefined. The first input is
the enable signal, the middle is a preload (write), and the bottom is the reset. The
enable input must be on before the counter will count. The enable input must be off
during a preload.
Standard Counter Function HSIO Counter Function
UP Count UDC CTxx Enable Input UDC CT76

DOWN Count Dummy Input
Kxxxxxxxx Kxxxxxxxx
Reset Input Reset Input
D Counts UP and DOWN D Counts UP and DOWN (from X0, X1)

D Preload counter by write to value D Can use Dummy Input to change count

D Reset input is internal only D Reset may be internal or external
The next figure shows the how the HSIO quadrature counter will appear in a ladder
program.
Enable Input UDC CT76

Dummy Input
Kxxxxxxxx
Reset Input
Preset Range:
1-99999999
When the enable input is energized, the counter will respond to quadrature pulses
on X0 and X1, incrementing or decrementing the counter at CT76 CT77. The reset
input contact behaves in a logical OR fashion with the physical reset input X2. This
means the quadrature counter can receive a reset from either the contact(s) on the
reset rung in the ladder, OR the external reset X2.
Quadrature Since presets are not available in quadrature counting, this mode is best suited for
Counter w/Preload simple counting and measuring. The example program on the following page shows
Program Example how to configure the quadrature counter. The program configures the HSIO circuit
for Mode 20 operation, so X0 is Phase A and X1 is Phase B clock inputs.
322
Program DirectSOFT
Example Contd SP0 Load constant K20 into the accumulator. This selects
LD Mode 20 as the HSIO mode.
K20
Select Mode 20 OUT Output this address to V7633, the location of the HSIO
V7633 Mode select register.
LD Load the constant required to configure X0 as Phase A

K2 input.
OUT Output the constant to V7634, the location of the setup

V7634 register for X0.
LD Load the constant required to configure X1 as Phase B

K0 input.
Output the constant to V7635, the location of the setup

OUT register for X1.
V7635
LD Load the constant required to configure X2 as an external

K7 reset.
OUT Output the constant to V7636, the location of the setup

V7636 register for X2.
C0
SET Set C0 on at powerup to enable counting.
C0
UDC CT76 CT76 is the HSIO quadrature counter. The first rungs SP1
always enables the counter. The dummy input is used by
C1 the built-in compiler.
Kxxxxxxxx
C2
SP0 because we will use the external reset. You can
optionally reset the counter value on each powerup
SP1 Load the current value of the counter into the accumulator
LDD on each scan.
V1076
Select Mode 20 Compare the value in the accumulator with the constant
CMPD K44292. If they are equal, the SP61 contact will be
K44292 turned on.
SP61 Y0 Set Y0 to ON when the counter reaches or exceeds
SET * our comparison value while COUNTING UP.
SP62
SP61 Y1
* Set Y1 to ON when the counter reaches or goes below
SET our comparison value while COUNTING DOWN.
SP60
END END coil marks the end of the main program..
* Note: You can reset Y0 later in the program by using the RST insturuction.
To preload the counter, just add the following example rungs to the program above.
323
Counter Preload X4 C0 When the preload request is made, the user turns
on X4. First we disable counting by resetting C0,
Program Example RST the counters enable input.
Load the BCD value K3000 into the

Preload counter LDD accumulator.
K3000
OUTD Output the constant to V1076/V1077, the location

V1076 of the accumulated pulse count.
C1
Generate a preload counter input pulse, which
PD causes the counter to preload from V1076-V1077.
C0 C1 C0
Enable the counter by setting C0, when the
SET preload pulse on C1 has occurred (C1 is off).
Guide for Mode 20 symptoms and possible causes. The most common problems are listed below.
Symptom: The counter does not count.
Possible causes:
1. Field sensor and wiring Verify that the encoder or other field device
inputs actually turn on and illuminates the status LEDs for X0 and X1. A
standard incremental encoder will visibly, alternately turn on the LEDs for

X0 and X1 when rotating slowly (1 RPM). Or, the problem could be due to a
sinking-sourcing wiring problem, etc. Remember to check the signal
ground connection. Also verify that the pulse on-time, duty cycle, voltage
level, and frequency are within the input specifications.
2. Configuration make sure all of the configuration parameters are correct.
V7633 must be set to 20, and V7634 must be set to 0002 to enable the
Phase A input, and V7635 must be set to 0000 to enable the Phase B
input.
3. Stuck in reset check the input status of the reset input, X2. If X2 is on, the
counter will not count because it is being held in reset.
4. Ladder program make sure you are using counter CT76 in your
program. The top input is the enable signal for the counter. It must be on
before the counter will count. The middle input is the dummy input and must
be off for the counter to count. The bottom input is the counter reset, and
must be off during counting.
Symptom: The counter counts in the wrong direction (up instead of down, and visa-versa).
Possible causes:
1. Channel A and B assignment Its possible that Channel A and B
assignments of the encoder wires is backwards from the desired
rotation/counting orientation. Just swap the X0 and X1 inputs, and the
counting direction will be reversed.
Symptom: The counter counts up and down but will not reset.
Possible causes:
1. Check the LED status indicator for X2 to make sure it is active when you
want a reset. Also verify the configuration register V7636 for X2 is set to 7.
Or, if you are using an internal reset, use the status mode of DirectSOFT to
monitor the reset input to the counter.
324
Mode 30: Pulse Output
Purpose The HSIO circuit in Mode 30 generates Trapezoidal Profile

output pulse trains suitable for open-loop Velocity
control of a single-axis motion positioning
system. It generates pulse (stepper
increment) and direction signals which Accel Decel
you can connect to motor drive systems
and perform various types of motion
control. Using Mode 30 Pulse Output, you Time
can select from three profile types detailed
later in this chapter:
S Trapezoidal Accel Slope to Target Velocity to Decel Slope

S Registration Velocity to Position Control on Interrupt (also used for
home search moves)
S Velocity Control Speed and Direction only
The HSIO circuit becomes a high-speed pulse generator (up to 7 kHz) in Mode 30.
By programming acceleration and deceleration values, position and velocity target
values, the HSIO function automatically calculates the entire motion profile. The
figure below shows the DL05 generating pulse and direction signals to the drive
amplifier of a stepper positioning system. The pulses accomplish the profile
independently and without interruption to ladder program execution in the CPU.
Stepper
Motor
Drive
Amplifier
DL05 Micro PLC Pulse
Direction
In the figure above, the DL05 generates

pulse and direction signals. Each pulse
represents the smallest increment of CCW Pulse
motion to the positioning system (such as
one step or micro-step to a stepper
CW Pulse
system). Alternatively, the HSIO Pulse
Output Mode may be configured to deliver
counter clock-wise (CCW) and clock-wise Drive
(CW) pulse signals as shown to the right. Amplifier
NOTE: The pulse output is designed for open loop stepper motor systems. This, plus
its minimum velocity of 40 pps make it unsuitable for servo motor control.
325
Functional Block The diagram below shows HSIO functionality in Mode 30. When the lower byte of
Diagram HSIO Mode register V7633 contains a BCD 30, the pulse output capability in the
HSIO circuit is enabled. The pulse outputs use Y0 and Y1 terminals on the output
connector. Remember that the outputs can only be DC type to operate.
DL05 Output Circuit

PLC
Y0 Y1
(Pulse / CW) (Direction / CCW) Y2 - Y5
HSIO
SP 104 Profile Complete
CPU
PULSE GEN. Y0 Start Profile
Y1 Preload Position Value
X1 Filtered Input
Interrupt FILTER Vmemory
Mode Select
V7633 xx30
X2 during
Registration
X0, X1, X2 X3- X7
Profile only

Input Circuit
IMPORTANT NOTE: In Pulse Output Mode, Y0 and Y1 references are redefined or

are used differently in two ways. Physical references refer to terminal screws, while
logical references refer to I/O references in the ladder program. Please read the
items below to understand this very crucial point.
Notice the I/O point assignment and usage in the above diagram:
S X0 and X1 can only be filtered inputs in Pulse Output Mode, and they
are available as an input contacts to the ladder program.
S X2 behaves as an external interrupt to the pulse generator for
registration profiles. In other profile modes, it can be used as a filtered
input just like X1 (registration mode configuration shown above).
S References Y0 and Y1 are used in two different ways. At the discrete
output connector, Y0 and Y1 terminals deliver the pulses to the motion
system. The ladder program uses logical references Y0 and Y1 to
initiate Start Profile and Load Position Value HSIO functions in Mode
30.
Hopefully, the above discussion will explain why some I/O reference names have
dual meanings in Pulse Output Mode. Please read the remainder of this section
with care, to avoid confusion about which actual I/O function is being discussed.
326
Wiring Diagram The generalized wiring diagram below shows pulse outputs Y0 and Y1 connected to
the drive amplifier inputs of a motion control system.
+
Signal Common +24 VDC

Motor Amplifier
Pulse
Direction
Pulse Output Wiring

Power Input
Interfacing to The pulse signals from Y0 and Y1 outputs will typically go to drive input circuits as
Drive Inputs shown above. Remember that the DL05s DC outputs are sinking-only. It will be
helpful to locate equivalent circuit schematics of the drive amplifier. The following
diagram shows how to interface to a sourcing drive input circuit.
Y0, Y1 Pulse Output Drive Input
Power
+DC pwr +V
Output Input
(sinking) + (sourcing)
Common Ground
The following circuit shows how to interface to a sinking drive input using a pullup
resistor. Please refer to Chapter 2 to learn how to calculate and install Rpullup.
Y0, Y1 Pulse Output
Power
+DC pwr
R pullup Drive Input

(sourcing)
(sinking) Output Input R input
+ (sinking)
Supply
Common Ground
327
Motion Profile The motion control profiles generated in Pulse Output Mode have the following
Specifications specifications:
Parameter Specification
Profiles Trapezoidal Accel Slope / Target Velocity / Decel Slope
Registration Velocity to Position Control on Interrupt
Velocity Control Speed and Direction only
Position Range 88388608 to 88388607
Positioning Absolute / relative command
Velocity Range 40 Hz to 7 kHz
V-memory registers V2320 to V2325 (Profile Parameter Table)
Current Position CT76 and CT77 (V1076 and V1077)
Physical I/O The configurable discrete I/O options for Pulse Output Mode are listed in the table
Configuration below. The CPU uses SP 104 contact to sense profile complete. V7637 is used to
select pulse/direction or CCW/CW modes for the pulse outputs. Input X2 is
dedicated as the external interrupt for use in registration mode.

Physical Configuration Function Hex Code
Input Register Required
V7637 Y0 = Pulse 0103
Y1 = Direction
Y0 = CW Pulse 0003
Y1 = CCW Pulse
X0 V7634 Discrete filtered input xx06, xx = filter time
X1 V7635 Discrete filtered input 0 - 99 ms (BCD)
X2 V7636 Discrete filtered input

Logical I/O The following logical I/O references define functions that allow the HSIO to
Functions communicate with the ladder program.
Logical Function
I/O
SP 104 Profile Complete the HSIO turns on SP104 to the CPU when the
profile completes. Goes back off when Start Profile (Y0) turns on.
Y0 Start Profile the ladder program turns on Y0 to start motion. If
turned off before the move completes, motion stops. Turning it on
again will start another profile, unless the current position equals
the target position.
Y1 Preload Position Value if motion is stopped and Start Profile is off,
you can load a new value in CT76/CT77, and turn on Y1. At that
transition, the value in CT76/CT77 becomes the current position.
328
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0
0 0 3 0

in V7633.
30 = Pulse Output
Profile / Velocity The first location in the Profile Parameter Table stores two key pieces of information.
Select Register The upper four bits (1215) select the type of profile required. The lower 12 bits
(011) select the Target Velocity.
Memory Location V2320 (default)
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0
0 7 0 0
Profile Select (BCD) Target Velocity Value

0 = Trapezoidal Profile, Absolute Position Range = 4 to 700, representing
8 = Trapezoidal Profile, Relative Position 40 Hz to 7 kHz pulse rate
9 = Registration Profile, Relative Position
2 = Velocity Profile
The ladder program must program this location before initiating any of the three
profiles. The LD and OUT instruction will write all 16 bits, so be sure to fully specify
the full four-digit BCD value for the Position / Velocity Select Register each time.
The absolute and relative selection determines how the HSIO circuit will interpret
your specified target position. Absolute position targets are referenced to zero.
Relative position targets are referenced to the current position (previous target
position). You may choose whichever reference method that is most convenient for
your application.
329
Profile V7630 is a pointer location which points to Profile Table Pointer

Parameter Table the beginning of the Profile Parameter V7630 2320
Table. The default starting location for the
profile parameter table is V2320. Profile Parameter Table
However, you may change this by V2320 xxxx
programming a different value in V7630.
Remember to use the LDA (load address) V2321 xxxx xxxx
instruction, converting octal into hex. V2323 xxxx
The HSIO uses the next V-memory V2324 xxxx
register past the bottom of the profile V2325 xxxx
parameter table to indicate profile errors.
Pulse Output Error Code
See the error table at the end of this
section for error code definitions. V2326 00xx
Trapezoidal Profile V-Memory Function Range Units

V2320, bits 1215 Trapezoidal Profile 0=absolute,
8=relative
V2320, bits 011 Target Velocity Value 4 to 700 x 10 pps
V2321/ 2322 Target Position Value 8388608 to Pulses
8388607

V2323 Starting Velocity 4 to 100 x 10 pps
V2324 Acceleration Time 1 to 100 x 100 mS
V2325 Deceleration Time 1 to 100 x 100 mS
V2326 Error Code (see end of section)
Registration Profile V-Memory Function Range Units

V2320, bits 1215 Registration Profile 9=relative
V2320, bits 011 Target Velocity Value 4 to 700 x 10 pps
V2321/ 2322 Target Position Value 8388608 to Pulses
8388607
V2323 Starting Velocity 4 to 100 x 10 pps
V2324 Acceleration Time 1 to 100 x 100 mS
V2325 Deceleration Time 1 to 100 x 100 mS
Velocity Profile V-Memory Function Range Units

V2320 Velocity Profile 2000 only
V2321/ 2322 Direction Select 80000000=CCW, Pulses
0=CW
V2323 Velocity 4 to 700 x 10 pps
330
Choosing the Pulse Output Mode generates three types of motion profiles. Most applications use
Profile Type one type for most moves. However, each move can be different if required.
S Trapezoidal Accel Slope to Target Velocity to Decel Slope
S Registration Velocity to Position Control on Interrupt
S Velocity Control Speed and Direction only
Trapezoidal The trapezoidal profile is the most Trapezoidal Profile
Profile Defined common positioning profile. It moves the Velocity
load to a pre-defined target position by Fixed Velocity
creating a move profile. The acceleration
slope is applied at the starting position. Accel Decel
The deceleration slope is applied
backwards from the target position. The
remainder of the move in the middle is Time
spent traveling at a defined velocity. Start position Target position
Trapezoidal profiles are best for simple point-to-point moves, when the distance
between the starting and ending positions of the move is known in advance.
Registration and Registration profiles solve a class of
Home Search motion control problems. In some
Profiles Defined applications, product material in work
moves past a work tool such as a drill Scrap

station. Shown to the right, registration Finished part area Area
marks on the scrap area of the work-piece
allow a machine tool to register its position
relative to the rectangle, to drill properly.
Home search moves allow open-loop direction of motion
motion systems to re-calibrate (preload)
the current position value at powerup. Registration marks
Registration profiles are a combination of Registration Profile
velocity and position control modes. The Velocity Position
move begins by accelerating to a Control Control
programmed velocity. The velocity is Velocity
sustained and the move is of indefinite
duration. When an external interrupt
signal occurs (due to registration Accel Decel
sensing), the profile switches from velocity
to position control. The move ends by
continuing motion a pre-defined distance
past the interrupt point (such as a drill hole Target position
location). The deceleration ramp is
applied in advance of the target position. Interrupt
Velocity Profile The velocity profile controls only the Velocity Profile
Defined direction and speed of motion. There is no Velocity
target position specified, so the move can
be of indefinite length. Only the first
velocity value needs to be defined. The
remaining velocity values can be created
while motion is in progress. Arrows in the
profile shown indicate velocity changes. Time
331
Trapezoidal Profile Operation

Trapezoidal Profile The trapezoidal profile is best suited for simple point-to-point moves, when the target
Applications position is known in advance. Starting velocities must be within the range of 40 pps to
1k pps. The remainder of the profile parameters are in the profile parameter table.
Trapezoidal Profile
Velocity
Target Velocity
Accel Decel
Starting
Velocity
Time
Start position Target position
Start Y0

Profile
Complete SP104
The time line of signal traces below the profile indicates the order of events.
The HSIO uses logical output Y0 as the Start input to the HSIO, which starts the
profile. Immediately the HSIO turns off the Profile Complete signal (SP104), so the
ladder program can monitor the progress of the move. Typically a ladder program
will monitor this bit so it knows when to initiate the next profile move.
If you are familiar with motion control, youll notice that we do not have to specify the
direction of the move. The HSIO function examines the target position relative to the
current position, and automatically outputs the correct direction information to the
motor drive.
Notice that the motion accelerates immediately to the starting velocity. This segment
is useful in stepper systems so we can jump past low speed areas when low-torque
problems or a resonant point in the motor might cause a stall. (When a stepper motor
stalls, we have lost the position of the load in open-loop positioning systems).
However, is is preferable not to make the starting velocity too large, because the
stepper motor will also slip some pulses due to the inertia of the system.
When you need to change the current position value, use logical Y1 output coil to
load a new value into the HSIO counter. If the ladder program loads a new value in
CT76/CT77 (V1076/V1077), then energizing Y1 will copy that value into the HSIO
circuit counter. This must occur before the profile begins, because the HSIO ignores
Y1 during motion.
332
Trapezoidal Profile The trapezoidal profile we want to perform is drawn and labeled in the following
Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity.
Trapezoidal Profile
Velocity
Target Velocity = 1 kHz
Accel = 2 sec Decel = 4 sec
Starting
Velocity = 40
Time
Start position Target position = 5000
The following program will realize the profile drawn above, when executed. The
beginning of the program contains all the necessary setup parameters for Pulse
Output Mode 30. We only have to do this once in the program, so we use first-scan
contact SP0 to trigger the setup.
DirectSOFT
SP0 Load constant K30 into the accumulator. This selects

K30
Mode 30 Output the constant to V7633, the location of the HSIO

OUT Mode select register.
V7633
Load the octal address of the beginning of the Profile
Locate Parameter LDA Parameter Table. The LDA instruction converts this to a
Table (optional) O2320 hex number in the accumulator.
Output this address to V7630, the location of the pointer
OUT to the Profile Parameter Table.
V7630
Load the constant K103 which is required to select
Select Pulse / LD pulse and direction for physical Y0 and Y1 functions,
Direction K103 respectively (use K3 if your application needs CCW
and CW).
OUT Output this constant to V7637, configuring the pulse
V7637 output type.
Filtered Inputs LD Load the constant K1006 which is required to select

K1006 filtered inputs with a 10 mS filter time constant.
OUT Output this constant to V7635, configuring X1.

V7635
OUT Output this constant to V7636, configuring X2.

V7636
333
Program
Example Contd SP0 Load the constant K100 which is required to select
LD Trapzoidal Profile, absolute positioning, and a target
K100 velocity of 1 kHz.
Profile / Target Output this constant to V2320, the location of the Profile
OUT Select / Starting Velocity setup register.
Velocity V2320
Load the constant K5000 which selects a target
Target Position LDD position of 5000 pulses. Dont forget to use double
K5000 word size (8-digit BCD position value).
Output this constant to V2321 and V2322, the location of
OUTD the Target Position double-word register.
V2321
Starting Velocity Load the constant K4 which is required to select a

LD starting velocity of 40 Hz (4 x 10 pps).
K4
Output this constant to V2323, the location of the starting

OUT velocity parameter register.
V2323
Load the constant K20 which is required to select an
Acceleration LD acceleration time of 2 seconds (20 x 100 mS).
K20
Output this constant to V2324, the location of the

OUT acceleration parameter register.

V2324

Load the constant K40 which is required to select a
Deceleration LD deceleration time of 4 seconds (40 x 100 mS).
K40

OUT deceleration parameter register.
V2325
Start Profile
X3 Y0 We use a spare filtered input to allow the operator
OUT to start the profile. When the operator turns X3 ON,
then OFF, logical output Y0 starts the profile.
Profile Complete
SP 104 Y2 SP104 is the logical output of the HSIO to indicate
OUT the move is complete. We use Y2 to energize an
annunciator that the profile has finished.
Preload At any time you can write (preload) a new position into the current position value.
Position Value This often done after a home search (see the registration example programs).
SP0 Load the constant K1000 as the new current position

LDD value.
K1000
Profile / Target Output this constant to V1076/V1077 (CTA76/CTA77). the

OUTD location of the current position value.
Velocity V1076
Y1
PD Turn on Y1 for 1 scan. The off-to-on transition
causes the HSIO to preload the current position
with the value in
334
Registration Profile Operation
Registration 1. In a typical application shown to the

Applications right, product material in work moves past
a work tool such as a drill. Registration
marks on the scrap area of the work-piece Finished part area Scrap
allow a machine tool to register its position Area
relative to the rectangle, to drill properly.
2. In other examples of registration, the
work piece is stationary and the tool direction of motion
moves. A drill bit may approach the Registration marks
surface of a part in work, preparing to drill
a hole of precise depth. However, the drill
bit length gradually decreases due to tool
wear. A method to overcome this is to
detect the moment of contact with the part
surface on each drill, moving the bit into
the part a constant distance after contact. Detect contact
3. The home search move allows a motion system to calibrate its position on
startup. In this case, the positioning system makes an indefinite move and waits for
the load to pass by a home limit switch. This creates an interrupt at the moment when
the load is in a known position. We then stop motion and preload the position value
with a number which equates to the physical home position.
The registration profile begins with only velocity control. When an interrupt pulse
occurs on physical input X2, the starting position is declared to be the present count
(current load position). The velocity control switches to position control, moving the
load to the target position. Note that the minimum starting velocity is 40 pps. This
instantaneous velocity accommodates stepper motors that can stall at low speeds.
Velocity
Registration Profile
Target Velocity
Accel Decel
Starting
Velocity
Start Target Time

position position
Start Y0
External Interrupt X2
Profile Complete SP104
The time line of signal traces below the profile indicates the order of events. The
CPU uses logical output Y0 to start the profile. Immediately the HSIO turns off the
Profile Complete signal (SP104), so the ladder program can monitor the moves
completion by sensing the signals on state.
335
Registration Profile The registration profile we want to perform is drawn and labeled in the following
Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity.
Registration Profile
Velocity
Target Velocity = 1 kHz
Accel = 2 sec Decel = 4 sec
Starting
Velocity = 40
Time
Start position Target position = 5000
The following program will realize the profile drawn above, when executed. The first
program rung contains all the necessary setup parameters. We only have to do this
once in the program, so we use first-scan contact SP0 to trigger the setup.
DirectSOFT
K30

Mode 30 Output this constant to V7633, the location of the HSIO
V7633
Locate Parameter LDA Parameter Table. The LDA instruction converts this to a
V7630
Direction K103 respectively (your application may use CCW and CW).
Output this constant to V7637, configuring the pulse
OUT output type.
V7637
Load the constant K2006 which is required to select X1
Filtered Inputs LD as a filtered input with a 20 mS filter time constant.
K2006
Output this constant to V7635, configuring X1.

OUT
V7635
Load the constant K1006 which is required to select the
LD external interrupt.
K1006
Output this constant to V7636, configuring X2, the

OUT registration interrupt input.
V7636
336
Program
Example Contd
SP0 Load the constant K9100 which is required to select
LD Registration Profile, relative positioning, and a target
K9100 velocity of 1 kHz (9xxx times 10 pps).
OUT Select / Starting Velocity setup register.
Velocity V2320
Load the constant K5000 which selects a target
Target Position LDD position of 5000 pulses. Dont forget to use double
V2321
Starting Velocity Load the constant K4 which is required to select a

LD starting velocity of 40 Hz (4 x 10 pps).
K4
Output this constant to V2323, the location of the starting

OUT velocity parameter register.
V2323
Load the constant K20 which is required to select an
Acceleration LD acceleration time of 2 seconds (20 x 100 mS).
K20

OUT
acceleration parameter register.

V2324
Load the constant K40 which is required to select a
Deceleration LD deceleration time of 4 seconds (40 x 100 mS).
K40

OUT deceleration parameter register.
V2325
Start Profile
X3 Y0
SET We use an input to allow the operator to start the
profile. X3 is a momentary Start switch. When the
operator turns X3 ON, logical output Y0 starts the
Profile Complete profile.
SP104 Y2
OUT SP104 is the logical output of the HSIO to indicate
the move is complete. We use Y2 to energize an
annunciator that the profile has finished. This wont
C0
occur until after the interrupt from X2 has occurred
PD and the profile is complete.
C0 Y0
RST
The profile will begin when the start input (X3) is given. Then the motion begins an
indefinite move, which lasts until an external interrupt on X2 occurs. Then the motion
continues on for 5000 more pulses before stopping.
337
Home Search One of the more challenging aspects of motion control is the establishment of actual
Program Example position at powerup. This is especially true for open-loop systems which do not have
a position feedback device. However, a simple limit switch located at an exact
location on the positioning mechanism can provide position feedback at one point.
For most stepper control systems, this method is a good and economical solution.
Load
Positioning System Motor
Limit Switches CCW limit (X1) Home limit (X2) CW limit (X3)
Motion
Numbering System -3000 -2000 -1000 0 1000 2000 3000
In the drawing above, the load moves left or right depending on the CCW/CW
direction of motor rotation. The PLC ladder program senses the CCW and CW limit
switches to stop the motor, before the load moves out-of-bounds and damages the
machine. The home limit switch is used at powerup to establish the actual position.

The numbering system is arbitrary, depending on a machines engineering units.

At powerup, we do not know whether the load is located to the left or to the right of the
home limit switch. Therefore, we will initiate a home search profile, using the
registration mode. The home limit switch is wired to X2, causing the interrupt. We
choose an arbitrary initial search direction, moving in the CW (left-to-right) direction.
S If the home limit switch closes first, then we stop and initialize the
position (this value is typically 0, but it may be different if preferred).
S However, if the CW limit switch closes first, we must reverse the motor
and move until the home limit switch closes, stopping just past it.
In the latter case, we repeat the first move, because we always need to make the
final approach to the home limit switch from the same direction, so that the final
physical position is the same in either case!
DirectSOFT
SP0 Selects Mode 30 as
LD the HSIO mode.
K30 Filtered Inputs
The constant K2006
Mode 30 OUT LD selects a 20 mS filter
V7633 K2006 time constant.
Output this constant to
Locate LDA Configure the address OUT V7635, configuring X1.
Parameter O2320 of the parameter table. V7635
Table (optional)
OUT The constant K1006
LD selects a 10 mS filter
V7630 K1006 time constant.
Select Pulse / Configure the Y0 and Y1
LD pulse outputs for pulse Output this constant to
Direction K103 and direction, respectively. OUT V7636, configuring X2, the
V7636 registration interrupt input.
OUT
V7637
338
Profile / Target Velocity

C1 Add a timer to
SP0 Select Registration Profile, TMR
LD relative positioning, and a create a slight
K9100 T0 delay before
target velocity of 1000 pps K5
(9xxx times 10 pps). reversing motor.
OUT T0 C2
V2320
SET CCW delay done.
Starting Velocity The constant K4 selects a
LD starting velocity of 40 Hz Y0
K4
(4 x 10 pps). SET Start profile again.
CCW past home
OUT C2 C3 X2 C3
V2323
SET CCW past home
The constant K20 selects
Acceleration LD an acceleration time of 2 Load a small
K20 seconds (20 x 100 mS). LDD positive position
K50 count (go CW).
OUT
V2324 OUTD
V2321
Deceleration
OUT Well choose the same for
V2325 the deceleration value. Home Limit found, CW search direction
C3 X2 Y0
X7 C10
Start the home search RST Turn off Start Profile.
SET
when X7 turns on.
C4
Go CW back to
Search in CW direction SET home.
C10 C0 The constant K50 selects C4 Add a timer to
LDD a target position of 50 TMR
K50 create a slight
pulses (CW direction). T1 delay before
K5 reversing motor.
Target Position OUTD
V2321 T1 C5
Turn on Start Profile, SET CW delay done.
Y0 searching for either the
home limit or the CW limit
SET (depends on our starting Y0
position). SET Start profile again.
C0
SET Set C0 to indicate the CW
home search has begun. Home Limit found, CW search direction
CW Limit found C0 C1 C3 X2 Y0
C0 C1 X3 Y0 RST Turn off Start Profile.
RST Turn off Start Profile.
C5 Load the constant
LDD
The constant K200 K0 K0 for our initialized
LDD selects a target position.
K80000200 position of 200
pulses, which is in OUTD Output this constant
the CCW direction. V1076 to C1076/V1077.
OUTD
V2321
C1
The CW limit has
SET been reached.
The home search profile will execute specific parts of the program, based on the
order of detection of the limit switches. Ladder logic sets C0 to initiate a home search
in the CW direction. If the CW limit is encountered, the program searches for home in
the CCW direction, passes it slightly, and does the final CW search for home. After
reaching home, the last ladder rung preloads the current position to 0.
339
Velocity Profile Operation

Velocity Profile The velocity profile is best suited for applications which involve motion but do not
Applications require moves to specific points. Conveyor speed control is a typical example.
Velocity Profile
Velocity
Time
Start Y0
Profile
Complete SP104

The time line of signal traces below the profile indicates the order of events.
Assuming the velocity is set greater than zero, motion begins when the Start input
(Y0) energizes. Since there is no end position target, the profile is considered in
progress as long as the Start input remains active. The profile complete logical input
to ladder logic (X0) correlates directly to the Start input status when velocity profiles
are in use.
While the Start input is active, the ladder program can command a velocity change
by writing a new value to the velocity register (V2323 by default). The full speed
range of 40 Hz to 7 kHz is available. Notice from the drawing that there are no
acceleration or deceleration ramps between velocity updates. This is how velocity
profiling works with the HSIO. However, the ladder program can command more
gradual velocity changes by incrementing or decrementing the velocity value more
slowly. A counter or timer can be useful in creating your own
acceleration/deceleration ramps. Unless the load must do a very complex move, it is
easier to let the HSIO function generate the accel/decel ramps by selecting the
trapezoidal or registration profiles instead.
Unlike the trapezoidal and registration profiles, you must specify the desired
direction of travel with velocity profiles. Load the direction select register
(V2321/V2322 by default) with 8000 0000 hex for CCW direction, or 0 for CW
direction.
340
Velocity Profile The velocity profile we want to perform is drawn and labeled in the following figure.
Program Example Each velocity segment is of indefinite length. The velocity only changes when ladder
logic (or other device writing to V-memory) updates the velocity parameter.
Velocity Profile
Velocity
Time
The following program uses dedicated discrete inputs to load in new velocity values.
This is a fun program to try, because you can create an infinite variety of profiles with
just two or three input switches. The intent is to turn on only one of X1, X2, or X3 at a
time. The beginning of the program contains all the necessary setup parameters for
Pulse Output Mode 30. We only have to do this once in the program, so we use
first-scan contact SP0 to trigger the setup.
DirectSOFT

K30
Mode 30 Output this constant to V7633, the location of the HSIO

V7633
Locate Parameter LDA Parameter Table. The LDA instruction converts this to
V7630
Direction K103 respectively (your application may use CCW and CW).
OUT output type.
V7637
Filtered Inputs LD filtered inputs with a 10 mS filter time constant.
K1006

OUT
V7635

OUT
V7636
341
Program
Example Contd
SP0 Load the constant K2000 which is required to select
LD Velocity Profile. This data word contains no velocity
K2000 information in the case of velocity mode.
OUT Select setup register.
Velocity V2320
Load the constant K80000000 which selects CCW
Select Direction LDD direction for Velocity Profiles. Dont forget to use double
V2321
Set Velocity Load the constant K10 which is required to select an

LD initial velocity of 100 pps (uses x10 multiplier).
K10
Output this constant to V2323, the location of the velocity

OUT parameter register. After the program is running, we can
V2323 write here again, using discrete input switches.
Start Profile
X1 Y0
OUT We use a spare filtered input to allow the operator

to start the profile. When the operator turns X1 ON
and leaves it on, logical output Y0 starts the profile.
Go Slow
X2 Load the constant K50 which is required to select a
LD velocity of 500 pps when the operator closes X2.
K50
OUT Output this constant to V2323, the location of the velocity

V2323 parameter register. The speed will change immediately.
Go Moderately
K200

Go Fast
K600

342
Pulse Output Error The Profile Parameter Table starting at V2320 (default location) defines the profile.
Codes Certain numbers will result in a error when the HSIO attempts to use the parameters
to execute a move profile. When an error occurs, the HSIO writes an error code in
V2326.
Error Code Error Description

0000 No error
0010 Requested profile type code is invalid (must use 0, 1, 2, 8, or 9)
0020 Target Velocity is not in BCD
0021 Target Velocity is specified to be less than 40 pps
0022 Target Velocity is specified to be greater than 7,000 pps
0030 Target Position value is not in BCD
0040 Starting Velocity is not in BCD
0041 Starting Velocity is specified to be less than 40 pps
0042 Starting Velocity is specified to be greater than 1,000 pps
0050 Acceleration Time is not in BCD
0051 Acceleration Time is zero

0052 Acceleration Time is greater than 10 seconds
0060 Deceleration Time is not in BCD
0061 Deceleration Time is zero
0062 Deceleration Time is greater than 10 seconds
Most errors can be corrected by rechecking the Profile Parameter Table values. The
error is automatically cleared at powerup and at Program-to-Run Mode transitions.
Guide for Mode 30 symptoms and possible causes. The most common problems are listed below:
Symptom: The stepper motor does not rotate.

Possible causes:
1. Configuration Verify that the HSIO actually generates pulses on outputs
Y0 and Y1. Watch the status LEDs for Y0 and Y1 when you start a motion
profile. If the LEDs flicker on and off or are steadily on, the configuration is
probably correct.
2. Programming error If there are no pulses on Y0 or Y1 you may have a
programming error. Check the contents of V2326 for an error code that may
be generated when the PLC attempts to do the move profile. Error code
descriptions are given above.
3. Check target value The profile will not pulse if the count value is equal to
the target value (ex. count =0, target=0)
343
4. Wiring Verify the wiring to the stepper motor is correct. Remember the
signal ground connection from the PLC to the motion system is required.
5. Motion system Verify that the drive is powered and enabled. To verify the
motion system is working, you can use Mode 60 operation (normal PLC
inputs/outputs) as shown in the test program below. With it, you can
manually control Y0 and Y1 with X0 and X1, respectively. Using an input
simulator is ideal for this type of manual debugging. With the switches you
can single-step the motor in either direction. If the motor will not move with
this simple control, Mode 30 operation will not be possible until the problem
with the motor drive system or wiring is corrected.
DirectSOFT
K60
Mode 60 Output the constant to V7633, the location of the

OUT HSIO Mode select register.
V7633
Filtered Inputs Load the constant K1006 which is required to configure

LD filtered inputs with a time constant of 10 mS.
K1006

OUT
V7634

OUT
V7635

OUT
V7636
X0 Y0
OUT Use a switch on X0 input to manually control output Y0.
X1 Y1
OUT Use a switch on X1 input to manually control output Y1.
6. Memory Error HSIO configuration parameters are stored in the CPU

system memory. Corrupted data in this memory area can sometimes
interfere with proper HSIO operation. If all other corrective actions fail,
initializing the scratchpad memory may solve the problem. With
DirectSOFT, select the PLC menu, then Setup, then Initialize Scratchpad.
Symptom: The motor turns in the wrong direction.

Possible causes:
1. Wiring If you have selected CW and CCW type operation, just swap the
wires on Y0 and Y1 outputs.
2. Direction control If you have selected Pulse and Direction type
operation, just change the direction bit to the opposite state.
344
Mode 40: High-Speed Interrupts

Purpose The HSIO Mode 40 provides a high-speed interrupt to the ladder program. This
capability is provided for your choice of the following application scenarios:
S An external event needs to trigger an interrupt subroutine in the CPU.
Using immediate I/O instructions in the subroutine is typical.
S An interrupt routine needs to occur on a timed basis which is different
from the CPU scan time (either faster or slower). The timed interrupt is
programmable, from 5 to 999 mS.
Functional Block The HSIO circuit creates the high-speed interrupt to the CPU. The following diagram
Diagram shows the external interrupt option, which uses X0. In this configuration X1 and X2
are normal filtered inputs.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO I/O data CPU

Interrupt Interrupt
Vmemory
Mode Select
FILTER V7633 0040
X0 X1, X2 X3- X7
Input Circuit
Alternately, you may configure the HSIO circuit to generate interrupts based on a
timer, as shown below. In this configuration, inputs X0 through X2 are filtered inputs.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO I/O data CPU

Interrupt Interrupt
Vmemory
FILTER Timer Mode Select
V7633 0040
X0, X1, X2 X3- X7
Input Circuit
345
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
0 0 4 0

in V7633.
40 = High-Speed Interrupt

Interrupts and the Refer to the drawing below. The source of the interrupt may be external (X0), or the
Ladder Program HSIO timer function. The setup parameter in V7634 serves a dual purpose:,
S It selects between the two interrupt sources, external (X0) or an internal
timer.
S In the case of the timer interrupt, it programs the interrupt timebase
between 5 and 999 mS.
The resulting interrupt uses label INT 0 in the ladder program. Be sure to include the
Enable Interrupt (ENI) instruction at the beginning of your program. Otherwise, the
interrupt routine will not be executed.
CPU Scan
Input
Update
Ladder INT
X0, External Interrupt Program
Execution Interrupt
Routine
Program
TIMER current
instruction
Interrupt source / IRT
Time select Input
Update
V7634 xxx4
346
External Interrupt Signal pulses at X0 must meet certain timing criteria to guarantee an interrupt will
Timing Parameters result. Refer to the timing diagram below. The input characteristics of X0 are fixed (it
is not a programmable filtered input). The minimum pulse width is 0.1 mS. There
must be some delay before the next interrupt pulse arrives, such that the interrupt
period cannot be smaller than 0.5 mS.
0.5 mS minimum
0.1 mS minimum
External
Interrupt X0
Time
Timed Interrupt When the timed interrupt is selected, the HSIO generates the interrupt to ladder
Parameters logic. There is no interrupt pulse width in this case, but the interrupt period can be
adjusted from 5 to 999 mS.
5 mS to 999 mS
Timed
Interrupt
Time
X Input / Timed The configurable discrete input options for High-Speed Interrupt Mode are listed in
INT Configuration the table below. Input X0 is the external interrupt when 0004 is in V7634. If you
need a timed interrupt instead, then V7634 contains the interrupt time period, and
input X0 becomes a filtered input (uses X1s filter time constant by default). Inputs
X1, and X2, can only be filtered inputs, having individual configuration registers and
filter time constants. However, X0 will have the same filter time constant as X1 when
the timed interrupt is selected.
Register Required
X0 V7634 External Interrupt 0004 (default)
Uses X1s time Filtered Input (when xxx4, xxx = INT timebase
setting in V7635 timed interrupt is in use) 5 - 999 ms (BCD)
X1 V7635 Filtered Input xx06 (xx = filter time)
0 - 99 ms (BCD)
0 - 99 ms (BCD)
Independent Timed Interrupt O1 is also available as an interrupt. This interrupt is independent of the
Interrupt HSIO features. Interrupt O1 uses an internal timer that is configured in V memory
location V7647. The interrupt period can be adjusted from 5 to 9999 mS. Once the
interrupt period is set and the interrupt is enabled in the program, the CPU will
continuously call the interrupt routine based on the time setting in V7647.

Register Required
V7647 High-Speed xxxx (xxxx = timer setting)
Timed Interrupt 5 - 9999 mS (BCD)
347
External Interrupt The following program selects Mode 40, then selects the external interrupt option.
Program Example Inputs X1 and X2 are configured as filtered inputs with a 10 mS time constant. The
program is otherwise generic, and may be adapted to your application.
DirectSOFT

K40
Mode 40 Output this constant to V7633, the location of the

V7633
External Interrupt Load the constant K4 which is required to select the

LD external interrupt option. X0 is the interrupt input.
K4
Output this constant to V7634, configuring the

OUT external interrupt option for X0.
V7634
Filtered Inputs Load the constant K1006 which is required to select

LD filtered inputs with a 10 mS filter time constant.
K1006

OUT
V7635

OUT
V7636
Y5
RST Reset output Y0.
INT Enable ENI Enable Interrupts at the beginning of the program.
Main Program Insert Main Program rungs here for your application.
INT O0 The INT label marks the beginning of the interrupt

Interrupt Routine Insert interrupt service routine rungs here for your
application.
SP1 Y5
SETI Use the pulse catch input to set output Y0 on.
IRT Return to the main ladder program.

348
Timed Interrupt The following program selects Mode 40, then selects the timed interrupt option, with
Program Example an interrupt period of 100 mS.
100 mS
Timed
Interrupt
Time
Inputs X0, X1, and X2, are configured as filtered inputs with a 10 mS time constant.
Note that X0 uses the time constant from X1. The program is otherwise generic, and
may be adapted to your application.
DirectSOFT

K40
Mode 40 OUT HSIO Mode select register.
V7633
LD the timed interrrupt option, with a period of 100 mS.
Timed Interrupt K1004
Output this constant to V7634, configuring the timed

OUT interrupt for 100 mS period.
V7634
Filtered Inputs LD filtered inputs with a 10 mS filter time constant.
K1006
Output this constant to V7635, configuring X1 and X0.
OUT
V7635
OUT
V7636
INT Enable ENI Enable Interrupts at the beginning of the program.
Insert Main Program rungs here for your application.

Main Program
INT O0 The INT label marks the beginning of the interrupt

Interrupt Routine Insert interrupt service routine rungs here for your
application.
SP1 Load constant K1 into the accumulator.

LD
K1
Add the value in the accumulator with the value in
ADD memory location V2000.
V2000
OUT Output the result into memory location V2000.

V2000
IRT Return to the main ladder program.

349
Mode 50: Pulse Catch Input

Purpose The HSIO circuit has a pulse-catch mode of operation. It monitors the signal on input
X0, preserving the occurrence of a narrow pulse. The purpose of the pulse catch
mode is to enable the ladder program to see an input pulse which is shorter in
duration than the current scan time. The HSIO circuit latches the input event on input
X0 for one scan. This contact automatically goes off after one scan.
Diagram contains a BCD 50, the pulse catch mode in the HSIO circuit is enabled. X0
automatically becomes the pulse catch input, which sets the latch on each rising
edge. The HSIO resets the latch at the end of the next CPU scan. Inputs X1 and X2
are available as filtered discrete inputs.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO I/O data CPU

LATCH

Vmemory
FILTER Mode Select
Set Reset V7633 0050
X0 scan X1, X2 X3- X7
Input Circuit
Pulse Catch Signal pulses at X0 must meet certain timing criteria to guarantee a pulse capture
Timing Parameters will result. Refer to the timing diagram below. The input characteristics of X0 are
fixed (it is not a programmable filtered input). The minimum pulse width is 0.1 mS.
There must be some delay before the next pulse arrives, such that the pulse period
cannot be smaller than 0.5 mS. If the pulse period is smaller than 0.5 mS, the next
pulse will be considered part of the current pulse.
0.5 mS minimum
0.1 mS minimum
Pulse
Input X0
Time
Note that the pulse catch and filtered input functions are opposite in nature. The
pulse catch feature on X0 seeks to capture narrow pulses, while the filter input
feature on X1 and X2 seeks to reject narrow pulses.
350
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0
0 0 5 0

in V7633.
50 = Pulse Catch Input
X Input The configurable discrete input options for Pulse Catch Mode are listed in the table
Configuration below. Input X0 is the pulse input, and must have 0005 loaded into it configuration
register V7634. Inputs X1 and X2 can only be filtered inputs. Each input has its own
configuration register and filter time constant.

Register Required
X0 V7634 Pulse Catch Input 0005
0 - 99 ms (BCD)
0 - 99 ms (BCD)
351
Pulse Catch The following program selects Mode 50, then programs the pulse catch code for X0.
Program Example Inputs X1 and X2 are configured as filtered inputs with 10 and 30 mS time constants
respectively. The program is otherwise generic, and may be adapted to your
application.
DirectSOFT

K50
Mode 50 Output this constant to V7633, the location of the

V7633
Pulse Catch Load the constant K5 which is required to configure X0

LD as the pulse catch input.
K5

OUT catch option for X0.
V7634
Filtered Inputs Load the constant K1006 which is required to select

K1006

OUT

V7635

K3006

OUT
V7636
Main Program
X0 Y0
SET Use the pulse catch input to set output Y0 on. This will
work even for a very short pulse on X0.

352
Mode 60: Discrete Inputs with Filter

Purpose The last mode we will discuss for the HSIO circuit is Mode 60, Discrete Inputs with
Filter. The purpose of this mode is to allow the input circuit to reject narrow pulses
and accept wide ones, as viewed from the ladder program. This is useful in
especially noisy environments or other applications where pulse width is important.
In all other modes in this chapter, X0 to X2 usually support the mode functions as
special inputs. Only spare inputs operate as filtered inputs by default. Now in Mode
60, all three inputs X0 through X2 function only as discrete filtered inputs.
Diagram contains a BCD 60, the input filter in the HSIO circuit is enabled. Each input X0
through X2 has its own filter time constant. The filter circuit assigns the outputs of the
filters as logical references X0 through X2.
DL05 Output Circuit

PLC
Y0, Y1 Y2 - Y5
HSIO I/O data CPU

FILTERS X0-X2
Vmemory
Mode Select
V7633 0060
X0 X1 X2 X3- X7
Input Circuit
Input Filter Signal pulses at inputs X0 X2 are filtered by using a delay time. In the figure below,
Timing Parameters the input pulse on the top line is longer than the filter time. The resultant logical input
to ladder is phase-shifted (delayed) by the filter time on both rising and falling edges.
In the bottom waveforms, the physical input pulse width is smaller than the filter time.
In this case, the logical input to the ladder program remains in the OFF state (input
pulse was filtered out).
Filter Time Filter Time
Physical Input X0
Logical Input X0
Time
Physical Input X0
Logical Input X0
353
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0
0 0 6 0

in V7633.
60 = Discrete Filtered Inputs

shows how to to this.
X Input The configurable discrete input options for Discrete Filtered Inputs Mode are listed
Configuration in the table below. The filter time constant (delay) is programmable from 0 to 99 mS
(the input acts as a normal discrete input when the time constant is set to 0). The
code for this selection occupies the upper byte of the configuration register in BCD.
We combine this number with the required 06 in the lower byte to get xx06, where
xx = 0 to 99. Input X0, X1, and X2 can only be filtered inputs. Each input has its own
configuration register and filter time constant.

Register Required
X0 V7634 Filtered Input xx06 (xx = filter delay time)
0 - 99 ms (BCD)
0 - 99 ms (BCD)
0 - 99 ms (BCD)
354
Filtered Inputs The following program selects Mode 60, then programs the filter delay time
Program Example constants for inputs X0, X1, and X2. Each filter time constant is different, for
illustration purposes. The program is otherwise generic, and may be adapted to your
application.
DirectSOFT

K60
Mode 60 Output the constant to V7633, the location of the

V7633
Filtered Inputs Load the constant K1006 which is required to configure

LD filtered inputs with a time constant of 10 mS.
K1006

OUT
V7634
K2006

OUT
V7635

K5006

OUT
V7636
Main Program Insert Main Program rungs here for your application.

14
CPU Specifications
and Operation
Introduction
CPU Specifications
CPU Hardware Setup
CPU Operation
Program Mode Operation
Run Mode Operation
I/O Response Time
CPU Scan Time Considerations
PLC Numbering Systems
Memory Map
DL05 System V-Memory
X Input Bit Map
Y Output Bit Map
Staget Control / Status Bit Map
Control Relay Bit Map
Timer Status Bit Map
Counter Status Bit Map
Network Configuration
Network Slave Operation
Network Master Operation
42
CPU Specifications and Operation
Introduction
The Central Processing Unit (CPU) is the heart of the Micro PLC. Almost all PLC
operations are controlled by the CPU, so it is important that it is set up correctly. This
chapter provides the information needed to understand:
S Steps required to set up the CPU
S Operation of ladder programs
S Organization of Variable Memory
To Programming Device
or Operator Interface
DL05
PLC
2 Comm.
CPU Ports
Main
Power
Supply
Input Circuit Output Circuit
Power
Input 8 Discrete Inputs Commons 6 Discrete Outputs Commons
NOTE: The High-Speed I/O function (HSIO) consists of dedicated but configurable
hardware in the DL05. It is not considered part of the CPU, because it does not
execute the ladder program. For more on HSIO operation, see Chapter 3.
CPU Specifications
and Operation
DL05 The DL05 Micro PLC which has 6K words of memory comprised of 2.0K of ladder
CPU Features memory and 4K words of V-memory (data registers). Program storage is in the
FLASH memory which is a part of the CPU board in the PLC. In addition, there is
RAM with the CPU which will store system parameters, V-memory, and other data
which is not in the application program. The RAM is backed up by a
super-capacitor, storing the data for several hours in the event of a power outage.
The capacitor automatically charges during powered operation of the PLC.
The DL05 supports fixed I/O which includes eight discrete input points and six output
points. No provision for expansion beyond these fourteen I/O points is available in
the DL05 model PLCs.
Over 120 different instructions are available for program development as well as
extensive internal diagnostics that can be monitored from the application program or
from an operator interface. Chapters 5, 6, and 7 provide detailed descriptions of the
instructions.
The DL05 provides two built-in RS232C communication ports, so you can easily
connect a handheld programmer, operator interface, or a personal computer without
needing any additional hardware.
43
CPU Specifications
Feature DL05
Total Program memory (words) 6K
Ladder memory (words) 2048
Total V-memory (words) 4096
User V-memory (words) 3968
Non-volatile V Memory (words) 128
Contact execution (boolean) 2.0uS
Typical scan (boolean) 2.73.2mS
RLL Ladder style Programming Yes
RLL and RLL PLUS Programming Yes
Run Time Edits Yes
Scan Variable / fixed
Handheld programmer Yes
DirectSOFT programming for Windows Yes
Built-in communication ports (RS232C) Yes
FLASH Memory Standard on CPU
Local Discrete I/O points available 14
Local Analog input / output channels maximum None
High-Speed I/O (quad., pulse out, interrupt, pulse catch, etc.) Yes, 2
I/O Point Density 8 inputs, 6 outputs
Number of instructions available (see Chapter 5 for details) 129
Control relays 512
Special relays (system defined) 512
Stages in RLL PLUS 256
CPU Specifications
Timers 128
and Operation
Counters 128
Immediate I/O Yes
Interrupt input (external / timed) Yes
Subroutines Yes
For/Next Loops Yes
Math Integer
Drum Sequencer Instruction Yes
Time of Day Clock/Calendar No
Internal diagnostics Yes
Password security Yes
System error log No
User error log No
Battery backup No (builtin supercap)
Yes, with mem cartridge
44
CPU Hardware Setup
Communication Cables are available that allow you to quickly and easily connect a Handheld
Port Pinout Programmer or a personal computer to the DL05 PLCs. However, if you need to
Diagrams build your own cables, use the pinout diagrams shown. The DL05 PLCs require an
RJ-12 phone plug to fit the built-in jacks.
The Micro PLC has two built-in RS232C communication ports. Port 1 is generally
used for connecting to a D2-HPP, DirectSOFT, operator interface, MODBUS
slave, or a DirectNET slave. . The baud rate is fixed at 9600 baud for port 1. Port 2
can be used to connect to a D2-HPP, DirectSOFT, operator interface, MODBUS
master/slave, or a DirectNET master/slave. Port 2 has a range of speeds from
300 baud to 38.4K baud.
Port 1 Pin Descriptions Port 2 Pin Descriptions

1 0V Power () connection (GND) 1 0V Power () connection (GND)
1234 5 6
2 5V Power (+) connection 2 5V Power (+) connection
3 RXD Receive Data (RS232C) 3 RXD Receive Data (RS232C)
4 TXD Transmit Data (RS232C 4 TXD Transmit Data (RS232C
5 5V Power (+) conection 5 RTS Request to Send
6-pin Female
Modular Connector
1 1
Top View
CPU Specifications
and Operation
Communication Port 1 Communication Port 2
Com 1 Connects to HPP, DirectSOFT, Com 2 Connects to HPP, DirectSOFT,

operator interfaces, etc. operator interfaces, etc.
6-pin, RS232C 6-pin, RS232C
9600 Baud (Fixed) Communication speed (baud)
Parity - odd (default) 300, 600, 1200, 2400, 4800,
Station address 1 (fixed) 9600, 19200, 38400
8 data bits Parity - odd (default), even, none
1 start, 1 stop bit Station address 1 (default)
Asynchronous, Half-duplex, DTE 8 data bits
Protocol: (Auto-Select) 1 start, 1 stop bit
K sequence (Slave only) Asynchronous, Half-duplex, DTE
DirectNET (Slave only) Protocol: (Auto-Select)
MODBUS (Slave only) K sequence (Slave only)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence/Print
45
Connecting the If youre using a Personal Computer with the DirectSOFT programming package,
Programming you can connect the computer to either of the DL05s programming ports. For an
Devices engineering office environment (typical during program development), this is the
preferred method of programming.
Use cable part no.

D2DSCBL
The Handheld programmer is connected to the CPU with a handheld programmer

cable. This device is ideal for maintaining existing installations or making small
program changes. The handheld programmer is shipped with a cable, which is
approximately 6.5 feet (200 cm) long.
For replacement
cable, use part no.
DV1000CBL
CPU Specifications
CPU Setup Even if you have years of experience using PLCs, there are a few things you need to
and Operation
Information do before you can start entering programs. This section includes some basic things,
such as changing the CPU mode, but it also includes some things that you may
never have to use. Heres a brief list of the items that are discussed.
S Selecting and Changing the CPU Modes
S Using Auxiliary Functions
S Clearing the program (and other memory areas)
S How to initialize system memory
S Setting retentive memory ranges
The following paragraphs provide the setup information necessary to get the CPU
ready for programming. They include setup instructions for either type of
programming device you are using. The D2HPP Handheld Programmer Manual
provides the Handheld keystrokes required to perform all of these operations. The
DirectSOFT Manual provides a description of the menus and keystrokes required
to perform the setup procedures via DirectSOFT.
46
Mode Switch
Status Indicators
Status Indicators The status indicator LEDs on the CPU front panels have specific functions which can
help in programming and troubleshooting.
Indicator Status Meaning

PWR ON Power good
OFF Power failure
RUN ON CPU is in Run Mode
OFF CPU is in Stop or program Mode
CPU ON CPU self diagnostics error
OFF CPU self diagnostics good
TX1 ON Data is being transmitted by the CPU - Port 1
OFF No data is being transmitted by the CPU - Port 1
RX1 ON Data is being received by the CPU - Port 1
OFF No data is being received by the CPU - Port 1
TX2 ON Data is being transmitted by the CPU - Port 2
OFF No data is being transmitted by the CPU - Port 2
CPU Specifications
RX2 ON Data is being received by the CPU - Port 2

and Operation
OFF No data is being received by the CPU - Port 2
Mode Switch The mode switch on the DL05 PLC provides positions for enabling and disabling
Functions program changes in the CPU. Unless the mode switch is in the TERM position, RUN
and STOP mode changes will not be allowed by any interface device, (handheld
programmer, DirectSOFT programing package or operator interface). Programs
may be viewed or monitored but no changes may be made. If the switch is in the
TERM position and no program password is in effect, all operating modes as well as
program access will be allowed through the connected programming or monitoring
device.
47
Modeswitch Position CPU Action

RUN (Run Program) CPU is forced into the RUN mode if no errors are encountered. No
changes are allowed by the attached programming/monitoring device.
TERM (Terminal) RUN, PROGRAM and the TEST modes are available. Mode and
program changes are allowed by the programming/monitoring device.
STOP CPU is forced into the STOP mode. No changes are allowed by the
programming/monitoring device.
Changing Modes in There are two ways to change the CPU mode. You can use the CPU mode switch to
the DL05 PLC select the operating mode, or you can place the mode switch in the TERM position
and use a programming device to change operating modes. With the switch in this
position, the CPU can be changed between Run and Program modes. You can use
either DirectSOFT or the Handheld Programmer to change the CPU mode of
operation. With DirectSOFT you use a menu option in the PLC menu. With the
Handheld Programmer, you use the MODE key.
MODE
Menu Options Key
Mode of Operation The DL05 CPU will normally power-up in the mode that it was in just prior to the
at Power-up power interruption. For example, if the CPU was in Program Mode when the power
was disconnected, the CPU will power-up in Program Mode (see warning note
CPU Specifications
below).
and Operation
WARNING: Once the super capacitor has discharged, the system memory
may not retain the previous mode of operation. When this occurs, the PLC can
power-up in either Run or Program Mode if the mode switch is in the term
position. There is no way to determine which mode will be entered as the
startup mode. Failure to adhere to this warning greatly increases the risk of
unexpected equipment startup.
48
Auxiliary Functions Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX
Functions perform many different operations, ranging from clearing ladder memory,
displaying the scan time, copying programs to EEPROM in the handheld
programmer, etc. They are divided into categories that affect different system
parameters. Appendix A provides a description of the AUX functions.
You can access the AUX Functions from DirectSOFT or from the D2HPP
Handheld Programmer. The manuals for those products provide step-by-step
procedures for accessing the AUX Functions. Some of these AUX Functions are
designed specifically for the Handheld Programmer setup, so they will not be
needed (or available) with the DirectSOFT package. The following table shows a list
of the Auxiliary functions for the Handheld Programmer.
AUX 2* RLL Operations 5B HSIO Configuration

21 Check Program 5D Scan Control Setup
22 Change Reference AUX 6* Handheld Programmer
Configuration
23 Clear Ladder Range 61 Show Revision Numbers
24 Clear All Ladders 62 Beeper On / Off
AUX 3* V-Memory Operations 65 Run Self Diagnostics
31 Clear V Memory AUX 7* EEPROM Operations
AUX 4* I/O Configuration 71 Copy CPU memory to HPP EEPROM
41 Show I/O Configuration 72 Write HPP EEPROM to CPU
AUX 5* CPU Configuration 73 Compare CPU to HPP EEPROM
51 Modify Program Name 74 Blank Check (HPP EEPROM)
53 Display Scan Time 75 Erase HPP EEPROM
54 Initialize Scratchpad 76 Show EEPROM Type (CPU and
HPP)
55 Set Watchdog Timer AUX 8* Password Operations
56 Set Communication Port 2 81 Modify Password
CPU Specifications
57 Set Retentive Ranges 82 Unlock CPU

and Operation
58 Test Operations 83 Lock CPU

59 Override Setup
Clearing an Before you enter a new program, be sure to always clear ladder memory. You can
Existing Program use AUX Function 24 to clear the complete program.
You can also use other AUX functions to clear other memory areas.
S AUX 23 Clear Ladder Range
S AUX 24 Clear all Ladders
S AUX 31 Clear V Memory
Initializing System The DL05 Micro PLC maintain system parameters in a memory area often referred
Memory to as the scratchpad. In some cases, you may make changes to the system setup
that will be stored in system memory. For example, if you specify a range of Control
Relays (CRs) as retentive, these changes are stored in system memory.
AUX 54 resets the system memory to the default values.
49
WARNING: You may never have to use this feature unless you want to clear any
setup information that is stored in system memory. Usually, youll only need to
initialize the system memory if you are changing programs and the old program
required a special system setup. You can usually load in new programs without ever
initializing system memory.
Remember, this AUX function will reset all system memory. If you have set special
parameters such as retentive ranges, etc. they will be erased when AUX 54 is used.
Make sure you that you have considered all ramifications of this operation before
you select it.
Setting Retentive The DL05 PLCs provide certain ranges of retentive memory by default. The default
Memory Ranges ranges are suitable for many applications, but you can change them if your
application requires additional retentive ranges or no retentive ranges at all. The
default settings are:
DL05
Memory Area
Default Range Available Range
Control Relays C400 C777 C0 C777
V Memory V1400 V7777 V0 V7777
Timers None by default T0 T177
Counters CT0 CT177 CT0 CT177
Stages None by default S0 S377
You can use AUX 57 to set the retentive ranges. You can also use DirectSOFT
menus to select the retentive ranges. Appendix A contains detailed information
about auxiliary
WARNING: The DL05 PLCs do not have battery back-up (unless the memory
cartridge, D001MC, is installed) The super capacitor will retain the values in the
CPU Specifications
event of a power loss, but only for a short period of time, depending on conditions.
and Operation
410
Using a Password The DL05 PLCs allow you to use a password to help minimize the risk of
unauthorized program and/or data changes. Once you enter a password you can
lock the PLC against access. Once the CPU is locked you must enter the password
before you can use a programming device to change any system parameters.
You can select an 8-digit numeric password. The Micro PLCs are shipped from the
factory with a password of 00000000. All zeros removes the password protection. If
a password has been entered into the CPU you cannot just enter all zeros to remove
it. Once you enter the correct password, you can change the password to all zeros to
remove the password protection.
WARNING: Make sure you remember your password. If you forget your password
you will not be able to access the CPU. The Micro PLC must be returned to the
factory to have the password removed.
You can use the D2HPP Handheld

Programmer or DirectSOFT to enter a
password. The following diagram shows how
you can enter a password with the Handheld
Programmer.
DirectSOFT D2HPP
Select AUX 81
I B
PASSWORD
CLR CLR AUX ENT
8 1
00000000
Enter the new 8-digit password
PASSWORD
X X X ENT
XXXXXXXX
CPU Specifications
and Operation
Press CLR to clear the display
There are three ways to lock the CPU once the password has been entered.
1. If the CPU power is disconnected, the CPU will be automatically locked
against access.
2. If you enter the password with DirectSOFT, the CPU will be automatically
locked against access when you exit DirectSOFT.
3. Use AUX 83 to lock the CPU.
When you use DirectSOFT, you will be prompted for a password if the CPU has
been locked. If you use the Handheld Programmer, you have to use AUX 82 to
unlock the CPU. Once you enter AUX 82, you will be prompted to enter the
password.
411
CPU Operation
Achieving the proper control for your equipment or process requires a good
understanding of how DL05 CPUs control all aspects of system operation. There are
four main areas to understand before you create your application program:
S CPU Operating System the CPU manages all aspects of system
control. A quick overview of all the steps is provided in the next section.
S CPU Operating Modes The two primary modes of operation are
Program Mode and Run Mode.
S CPU Timing The two important areas we discuss are the I/O
response time and the CPU scan time.
S CPU Memory Map DL05 CPUs offer a wide variety of resources,
such as timers, counters, inputs, etc. The memory map section shows
the organization and availability of these data types.
CPU Operating At powerup, the CPU initializes the
Power up
System internal electronic hardware. Memory
initialization starts with examining the
Initialize hardware
retentive memory settings. In general, the
contents of retentive memory is Initialize various memory
preserved, and non-retentive memory is based on retentive
initialized to zero (unless otherwise configuration
specified).
After the one-time powerup tasks, the Update input
CPU begins the cyclical scan activity. The
flowchart to the right shows how the tasks Service peripheral
differ, based on the CPU mode and the
existence of any errors. The scan time is Update Special Relays
defined as the average time around the
task loop. Note that the CPU is always PGM
reading the inputs, even during program Mode?
CPU Specifications
mode. This allows programming tools to RUN
and Operation
monitor input status at any time.
Execute program
The outputs are only updated in Run
mode. In program mode, they are in the off Update output
state.
Error detection has two levels. Non-fatal
errors are reported, but the CPU remains Do diagnostics
in its current mode. If a fatal error occurs,
the CPU is forced into program mode and OK
OK?
YES
the outputs go off.
NO
Report error, set flag
register, turn on LED
NO
Fatal error
YES
Force CPU into
PGM mode
412
Program Mode In Program Mode, the CPU does not

execute the application program or update
the output points. The primary use for
Program Mode is to enter or change an
application program. You also use
program mode to set up the CPU
parameters, such as HSIO features,
retentive memory areas, etc.
You can use a programming device, such
as DirectSOFT or the D2HPP Handheld Download
Programmer to place the CPU in Program Program
Mode.
Run Mode In Run Mode, the CPU executes the

application program and updates the I/O
system. You can perform many operations
during Run Mode. Some of these include:
S Monitor and change I/O point status
S Update timer/counter preset values
Normal Run mode scan
S Update Variable memory locations
Run Mode operation can be divided into Read Inputs

several key areas. For the vast majority of
applications, some of these execution Service Peripherals
segments are more important than others.
For example, you need to understand how Update Special Relays
the CPU updates the I/O points, handles
forcing operations, and solves the Solve the Application Program
CPU Specifications
application program. The remaining

and Operation
segments are not that important for most Write Outputs

applications.
You can use DirectSOFT or the D2HPP Diagnostics
Handheld Programmer to place the CPU
in Run Mode.
You can also edit the program during Run Mode. The Run Mode Edits are not
bumpless to the outputs. Instead, the CPU maintains the outputs in their last state
while it accepts the new program information. If an error is found in the new program,
then the CPU will turn all the outputs off and enter the Program Mode. This feature is
discussed in more detail in Chapter 9.
WARNING: Only authorized personnel fully familiar with all aspects of the
application should make changes to the program. Changes during Run Mode
become effective immediately. Make sure you thoroughly consider the impact of any
changes to minimize the risk of personal injury or damage to equipment.
413
Read Inputs The CPU reads the status of all inputs, then stores it in the image register. Input
image register locations are designated with an X followed by a memory location.
Image register data is used by the CPU when it solves the application program.
Of course, an input may change after the CPU has just read the inputs. Generally,
the CPU scan time is measured in milliseconds. If you have an application that
cannot wait until the next I/O update, you can use Immediate Instructions. These do
not use the status of the input image register to solve the application program. The
Immediate instructions immediately read the input status directly from the I/O
modules. However, this lengthens the program scan since the CPU has to read the
I/O point status again. A complete list of the Immediate instructions is included in
Chapter 5.
Service Peripherals After the CPU reads the inputs from the input modules, it reads any attached
and Force I/O peripheral devices. This is primarily a communications service for any attached
devices. For example, it would read a programming device to see if any input, output,
or other memory type status needs to be modified. There are two basic types of
forcing available with the DL05 CPUs.
S Forcing from a peripheral not a permanent force, good only for one
scan
S Bit Override holds the I/O point (or other bit) in the current state. Valid
bits are X, Y, C, T, CT, and S. (These memory types are discussed in
more detail later in this chapter).
Regular Forcing This type of forcing can temporarily change the status of a
discrete bit. For example, you may want to force an input on, even though it is really
off. This allows you to change the point status that was stored in the image register.
This value will be valid until the image register location is written to during the next
scan. This is primarily useful during testing situations when you need to force a bit on
to trigger another event.
Bit Override Bit override can be enabled on a point-by-point basis by using AUX
CPU Specifications
59 from the Handheld Programmer or, by a menu option from within DirectSOFT.
and Operation
Bit override basically disables any changes to the discrete point by the CPU. For
example, if you enable bit override for X1, and X1 is off at the time, then the CPU will
not change the state of X1. This means that even if X1 comes on, the CPU will not
acknowledge the change. So, if you used X1 in the program, it would always be
evaluated as off in this case. Of course, if X1 was on when the bit override was
enabled, then X1 would always be evaluated as on.
There is an advantage available when you use the bit override feature. The regular
forcing is not disabled because the bit override is enabled. For example, if you
enabled the Bit Override for Y0 and it was off at the time, then the CPU would not
change the state of Y0. However, you can still use a programming device to change
the status. Now, if you use the programming device to force Y0 on, it will remain on
and the CPU will not change the state of Y0. If you then force Y0 off, the CPU will
maintain Y0 as off. The CPU will never update the point with the results from the
application program or from the I/O update until the bit override is removed.
The following diagram shows a brief overview of the bit override feature. Notice the
CPU does not update the Image Register when bit override is enabled.
414
Input Update Input Update

X128 ... X2 X1 X0
OFF ... ON ON OFF
Bit Override OFF Force from Y128 ... Y2 Y1 Y0 Force from Bit Override ON
Programmer OFF ... ON ON OFF Programmer
C377 ... C2 C1 C0
OFF ... ON OFF OFF
Result of Program Image Register (example) Result of Program
Solution Solution
application should make changes to the program. Make sure you thoroughly
consider the impact of any changes to minimize the risk of personal injury or damage
to equipment.
Update Special There are certain V-memory locations that contain Special Relays and other
Relays and Special dedicated register information. This portion of the execution cycle makes sure these
Registers locations get updated on every scan. Also, there are several different Special
Relays, such as diagnostic relays, etc., that are also updated during this segment.
Solve Application The CPU evaluates each instruction in the

Program application program during this segment
of the scan cycle. The instructions define
the relationship between the input
conditions and the desired output
response. The CPU uses the output
image register area to store the status of
the desired action for the outputs. Output Normal Run mode scan
image register locations are designated
with a Y followed by a memory location. Read Inputs
The actual outputs are updated during the
write outputs segment of the scan cycle. Service Peripherals
There are immediate output instructions
CPU Specifications
available that will update the output points

and Operation
Update Special Relays

immediately instead of waiting until the
write output segment. A complete list of
Solve the Application Program
the Immediate instructions is provided in
Chapter 5.
Write Outputs
The internal control relays (C), the stages
(S), and the variable memory (V) are also
Diagnostics
updated in this segment.
You may recall that you can force various types of points in the system. (This was
discussed earlier in this chapter.) If any I/O points or memory data have been forced,
the output image register also contains this information.
415
Write Outputs Once the application program has solved the instruction logic and constructed the
output image register, the CPU writes the contents of the output image register to the
corresponding output points. Remember, the CPU also made sure that any forcing
operation changes were stored in the output image register, so the forced points get
updated with the status specified earlier.
Diagnostics During this part of the scan, the CPU performs all system diagnostics and other tasks
such as calculating the scan time and resetting the watchdog timer. There are many
different error conditions that are automatically detected and reported by the DL05
PLCs. Appendix B contains a listing of the various error codes.
Probably one of the more important things that occurs during this segment is the
scan time calculation and watchdog timer control. The DL05 CPU has a watchdog
timer that stores the maximum time allowed for the CPU to complete the solve
application segment of the scan cycle. If this time is exceeded the CPU will enter the
Program Mode and turn off all outputs. The default value set from the factory is 200
ms. An error is automatically reported. For example, the Handheld Programmer
would display the following message E003 S/W TIMEOUT when the scan overrun
occurs.
You can use AUX 53 to view the minimum, maximum, and current scan time. Use
AUX 55 to increase or decrease the watchdog timer value.
I/O Response Time

Is Timing Important I/O response time is the amount of time required for the control system to sense a
for Your change in an input point and update a corresponding output point. In the majority of
Application? applications, the CPU performs this task in such a short period of time that you may
never have to concern yourself with the aspects of system timing. However, some
applications do require extremely fast update times. In these cases, you may need to
know how to to determine the amount of time spent during the various segments of
operation.
There are four things that can affect the I/O response time.
CPU Specifications
S The point in the scan cycle when the field input changes states
and Operation
S Input Off to On delay time
S CPU scan time
S Output Off to On delay time
The next paragraphs show how these items interact to affect the response time.
Normal Minimum The I/O response time is shortest when the input changes just before the Read
I/O Response Inputs portion of the execution cycle. In this case the input status is read, the
application program is solved, and the output point gets updated. The following
diagram shows an example of the timing for this situation.
416
Scan
Solve Solve Solve Solve

Scan Program Program Program Program
Read Write
Inputs Outputs
Field Input
CPU Reads CPU Writes

Inputs Outputs
Input
Off/On Delay
Output
Off/On Delay
I/O Response Time
In this case, you can calculate the response time by simply adding the following
items:
Input Delay + Scan Time + Output Delay = Response Time
Normal Maximum The I/O response time is longest when the input changes just after the Read Inputs
I/O Response portion of the execution cycle. In this case the new input status is not read until the
following scan. The following diagram shows an example of the timing for this
situation.
Scan

CPU Specifications
Read Write
Inputs Outputs
and Operation
Field Input
CPU Reads CPU Writes

Inputs Outputs
Input
Off/On Delay
Output
Off/On Delay
I/O Response Time
items:
Input Delay +(2 x Scan Time) + Output Delay = Response Time

417
Improving There are a few things you can do the help improve throughput.
Response Time S You can choose instructions with faster execution times
S You can use immediate I/O instructions (which update the I/O points
during the program execution)
S You can use the HSIO Mode 50 Pulse Catch features designed to
operate in high-speed environments. See the Chapter 3 for details on
using this feature.
Of these three things the Immediate I/O instructions are probably the most important
and most useful. The following example shows how an immediate input instruction
and immediate output instruction would affect the response time.
Scan

Normal Read Write Normal
Read Input Output Write
Input Immediate Immediate Outputs
Field Input
Input
Off/On Delay
Output
Off/On Delay
I/O Response Time
items.
CPU Specifications
Input Delay + Instruction Execution Time + Output Delay = Response Time
and Operation
The instruction execution time would be calculated by adding the time for the
immediate input instruction, the immediate output instruction, and any other
instructions in between the two.
NOTE: Even though the immediate instruction reads the most current status from
I/O, it only uses the results to solve that one instruction. It does not use the new
status to update the image register. Therefore, any regular instructions that follow
will still use the image register values. Any immediate instructions that follow will
access the I/O again to update the status.
418
CPU Scan Time Considerations
The scan time covers all the cyclical tasks

Power up
that are performed by the operating
system. You can use DirectSOFT or the
Initialize hardware
Handheld Programmer to display the
minimum, maximum, and current scan Initialize various memory
times that have occurred since the based on retentive
configuration
previous Program Mode to Run Mode
transition. This information can be very
important when evaluating the Update input
performance of a system.
As weve shown previously there are Service peripheral
several segments that make up the scan
cycle. Each of these segments requires a Update Special Relays
certain amount of time to complete. Of all
the segments, the following are the most PGM
important. Mode?
S Input Update RUN

S Peripheral Service Execute program
S Program Execution
Update output
S Output Update
S Timed Interrupt Execution
Do diagnostics
The only one you really have the most
control over is the amount of time it takes
OK YES
to execute the application program. This is OK?
because different instructions take
NO
different amounts of time to execute. So, if
Report error, set flag
you think you need a faster scan, then you register, turn on LED
can try to choose faster instructions.
CPU Specifications
Your choice of I/O type and peripheral

and Operation
NO
Fatal error
devices can also affect the scan time.
However, these things are usually dictated YES
by the application. Force CPU into
PGM mode
The following paragraphs provide some
general information on how much time
some of the segments can require.
Reading Inputs The time required during each scan to read the input status is 40 mS. Dont confuse
this with the I/O response time that was discussed earlier.
Writing Outputs The time required to write the output status is 629 mS. Dont confuse this with the I/O
response time that was discussed earlier.
419
Application The CPU processes the program from address 0 to the END instruction. The CPU
Program Execution executes the program left to right and top to bottom. As each rung is evaluated the
appropriate image register or memory location is updated. The time required to
solve the application program depends on the type and number of instructions used,
and the amount of execution overhead.
Just add the execution times for all the instructions in your program to determine to
total execution time. Appendix C provides a complete list of the instruction execution
times for the DL05 Micro PLC. For example, the execution time for running the
program shown below is calculated as follows:
Instruction Time
X0 X1 Y0
STR X0 2 ms OUT
OR C0 1.6 ms
ANDN X1 1.6 ms C0
OUT Y0 6.8 ms
STRN C100 2.3 ms
C100
LD K10 42.7 ms LD
STRN C101 2.3 ms K10
OUT V2002 16.6 ms C101

STRN C102 2.3 ms OUT V2002
LD K50 42.7 ms
STRN C103 2.3 ms C102
LD
OUT V2006 16.6 ms K50
STR X5 2 ms
ANDN X10 1.6 ms C103
OUT V2006
OUT Y3 6.8 ms
END 24 ms
X5 X10 Y3
OUT
SUBTOTAL 174.2 ms
Overhead DL05 END

Minimum 0.66 mS
CPU Specifications
Maximum 2.5 ms
and Operation
TOTAL TIME = (Program execution time + Overhead) x 1.1
The program above takes only 174.2 ms to execute during each scan. The DL05
spends 0.1ms, on internal timed interrupt management, for every 1ms of instruction
time. The total scan time is calculated by adding the program execution time to the
overhead (shown above)and multiplying the result (ms) by 1.1. Overhead includes
all other housekeeping and diagnostic tasks. The scan time will vary slightly from
one scan to the next, because of fluctuation in overhead tasks.
Program Control Instructions the DL05 PLCs have an interrupt routine feature
that changes the way a program executes. Since this instruction interrupts normal
program flow, it will have an effect on the program execution time. For example, a
timed interrupt routine with a 10 mS period interrupts the main program execution
(before the END statement) every 10 mS, so the CPU can execute the interrupt
routine. Chapter 5 provides detailed information on interrupts.
420
PLC Numbering Systems
If you are a new PLC user or are using

PLCDirect PLCs for the first time, please octal binary
1482
BCD ?
take a moment to study how our PLCs use
numbers. Youll find that each PLC
? ? 3 0402 ?
3A9
manufacturer has their own conventions
on the use of numbers in their PLCs. We
7 961428 ASCII
1001011011 hexadecimal
want to take just a moment to familiarize
you with how numbers are used in 177 1011
decimal
?
PLCDirect PLCs. The information you A 72B
learn here applies to all of our PLCs! 300124 ?
As any good computer does, PLCs store and manipulate numbers in binary form:
just ones and zeros. So why do we have to deal with numbers in so many different
forms? Numbers have meaning, and some representations are more convenient
than others for particular purposes. Sometimes we use numbers to represent a size
or amount of something. Other numbers refer to locations or addresses, or to time. In
science we attach engineering units to numbers to give a particular meaning.
PLC Resources PLCs offer a fixed amount of resources, depending on the model and configuration.
We use the word resources to include variable memory (V-memory), I/O points,
timers, counters, etc. Most modular PLCs allow you to add I/O points in groups of
eight. In fact, all the resources of our PLCs are counted in octal. Its easier for
computers to count in groups of eight than ten, because eight is an even power of 2.
Octal means simply counting in groups of Decimal 1 2 3 4 5 6 7 8
eight things at a time. In the figure to the
right, there are eight circles. The quantity
in decimal is 8, but in octal it is 10 (8 and
9 are not valid in octal). In octal, 10 Octal 1 2 3 4 5 6 7 10
means 1 group of 8 plus 0 (no individuals).
CPU Specifications
In the figure below, we have two groups of eight circles. Counting in octal we have
and Operation
20 items, meaning 2 groups of eight, plus 0 individuals Dont say twenty, say
twozero octal. This makes a clear distinction between number systems.
Decimal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Octal 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 20
After counting PLC resources, its time to access PLC resources (theres a
difference). The CPU instruction set accesses resources of the PLC using octal
addresses. Octal addresses are the same as octal quantities, except they start
counting at zero. The number zero is significant to a computer, so we dont skip it.
Our circles are in an array of square X= 0 1 2 3 4 5 6 7
containers to the right. To access a
resource, our PLC instruction will address X
its location using the octal references 1X
shown. If these were counters, CT14
would access the black circle location. 2X
421
VMemory Variable memory (called V-memory) stores data for the ladder program and for
configuration settings. V-memory locations and V-memory addresses are the same
thing, and are numbered in octal. For example, V2073 is a valid location, while
V1983 is not valid (9 and 8 are not valid octal digits).
Each V-memory location is one data word wide, meaning 16 bits. For configuration
registers, our manuals will show each bit of a V-memory word. The least significant
bit (LSB) will be on the right, and the most significant bit (MSB) on the left. We use the
word significant, referring to the relative binary weighting of the bits.
V-memory address V-memory data
(octal) (binary)
MSB LSB
V2017 0 1 0 0 1 1 1 0 0 0 1 0 1 0 0 1
V-memory data is 16-bit binary, but we rarely program the data registers one bit at a
time. We use instructions or viewing tools that let us work with decimal, octal, and
hexadecimal numbers. All these are converted and stored as binary for us.
A frequently-asked question is How do I tell if a number is octal, BCD, or hex? The
answer is that we usually cannot tell just by looking at the data... but it does not really
matter. What matters is: the source or mechanism which writes data into a
V-memory location and the thing which later reads it must both use the same data
type (i.e., octal, hex, binary, or whatever). The V-memory location is just a storage
box... thats all. It does not convert or move the data on its own.
Binary-Coded Since humans naturally count in decimal (10 fingers, 10 toes), we prefer to enter and
Decimal Numbers view PLC data in decimal as well. However, computers are more efficient in using
pure binary numbers. A compromise solution between the two is Binary-Coded
Decimal (BCD) representation. A BCD digit ranges from 0 to 9, and is stored as four
binary bits (a nibble). This permits each V-memory location to store four BCD digits,
with a range of decimal numbers from 0000 to 9999.
BCD number 4 9 3 6
V-memory storage 0 1 0 0 1 0 0 1 0 0 1 1 0 1 1 0
CPU Specifications
and Operation
In a pure binary sense, a 16-bit word can represent numbers from 0 to 65535. In
storing BCD numbers, the range is reduced to only 0 to 9999. Many math
instructions use Binary-Coded Decimal (BCD) data, and DirectSOFT and the
handheld programmer allow us to enter and view data in BCD.
Hexadecimal Hexadecimal numbers are similar to BCD numbers, except they utilize all possible
Numbers binary values in each 4-bit digit. They are base-16 numbers so we need 16 different
digits. To extend our decimal digits 0 through 9, we use A through F as shown.
Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Hexadecimal 0 1 2 3 4 5 6 7 8 9 A B C D E F
A 4-digit hexadecimal number can represent all 65536 values in a V-memory word.
The range is from 0000 to FFFF (hex). PLCs often need this full range for sensor
data, etc. Hexadecimal is just a convenient way for humans to view full binary data.
Hexadecimal number A 7 F 4
V-memory storage 1 0 1 0 0 1 1 1 1 1 1 1 0 1 0 0
422
Memory Map
With any PLC system, you generally have many different types of information to
process. This includes input device status, output device status, various timing
elements, parts counts, etc. It is important to understand how the system represents
and stores the various types of data. For example, you need to know how the system
identifies input points, output points, data words, etc. The following paragraphs
discuss the various memory types used in DL05 Micro PLCs. A memory map
overview for the CPU follows the memory descriptions.
Octal Numbering All memory locations and resources are

System numbered in Octal (base 8). For example,
the diagram shows how the octal
numbering system works for the discrete
input points. Notice the octal system does
not contain any numbers with the digits 8
or 9.
X0 X1 X2 X3 X4 X5 X6 X7
X10 X11
Discrete and Word As you examine the different memory Discrete On or Off, 1 bit
Locations types, youll notice two types of memory
X0
in the DL05, discrete and word memory.
Discrete memory is one bit that can be
either a 1 or a 0. Word memory is referred
to as V memory (variable) and is a 16-bit
location normally used to manipulate
data/numbers, store data/numbers, etc.
CPU Specifications
and Operation
Some information is automatically stored Word Locations 16 bits

in V memory. For example, the timer
0 1 0 1 00 0 0 0 0 1 0 0 1 0 1
current values are stored in V memory.
V Memory The discrete memory area is for inputs, outputs, control relays, special relays,
Locations for stages, timer status bits and counter status bits. However, you can also access the
Discrete Memory bit data types as a V-memory word. Each V-memory location contains 16
Areas consecutive discrete locations. For example, the following diagram shows how the X
input points are mapped into V-memory locations.
8 Discrete (X) Input Points
X7 X6 X5 X4 X3 X2 X1 X0
Bit # 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 V40400
These discrete memory areas and their corresponding V memory ranges are listed
in the memory area table for DL05 Micro PLCs on the following pages.
423
Input Points The discrete input points are noted by an

(X Data Type) X data type. There are 8 discrete input X0 Y0
points and 256 discrete input addresses OUT
available with DL05 CPUs. In this
example, the output point Y0 will be
turned on when input X0 energizes.
Output Points The discrete output points are noted by a

(Y Data Type) Y data type. There are 6 discrete outputs X1 Y1
and 256 discrete output addresses OUT
available with DL05 CPUs. In this
example, output point Y1 will be turned
on when input X1 energizes.
Control Relays Control relays are discrete bits normally

(C Data Type) used to control the user program. The X6 C5
control relays do not represent a real OUT
world device, that is, they cannot be
physically tied to switches, output coils, C5 Y10
etc. They are internal to the CPU. OUT
Because of this, control relays can be
Y20
programmed as discrete inputs or OUT
discrete outputs. These locations are
used in programming the discrete
memory locations (C) or the
corresponding word location which
contains 16 consecutive discrete
locations.
In this example, memory location C5 will
energize when input X6 turns on. The
second rung shows a simple example of
how to use a control relay as an input.
CPU Specifications
and Operation
Timers and Timer status bits reflect the relationship
Timer Status Bits between the current value and the preset X0
TMR T1
(T Data type) value of a specified timer. The timer K30
status bit will be on when the current
value is equal or greater than the preset
value of a corresponding timer. T1 Y12
When input X0 turns on, timer T1 will OUT
start. When the timer reaches the preset
of 3 seconds (K of 30) timer status
contact T1 turns on. When T1 turns on,
output Y12 turns on. Turning off X0
resets the timer.
424
Timer Current As mentioned earlier, some information

X0
Values is automatically stored in V memory. This TMR T1
(V Data Type) is true for the current values associated K1000
with timers. For example, V0 holds the
current value for Timer 0, V1 holds the V1 K30 Y2
current value for Timer 1, etc. OUT
The primary reason for this is

V1 K50 Y3
programming flexibility. The example OUT
shows how you can use relational
contacts to monitor several time intervals
V1 K75 V1 K100 Y4
from a single timer.
OUT
Counters and Counter status bits that reflect the X0

Counter Status relationship between the current value CNT CT3
K10
Bits and the preset value of a specified
X1
(CT Data type) counter. The counter status bit will be on
when the current value is equal to or
greater than the preset value of a CT3 Y2
corresponding counter. OUT
Each time contact X0 transitions from off to on, the counter increments by one. (If X1
comes on, the counter is reset to zero.) When the counter reaches the preset of 10
counts (K of 10) counter status contact CT3 turns on. When CT3 turns on, output Y2
turns on.
Counter Current Just like the timers, the counter current X0

Values values are also automatically stored in V CNT CT3
K10
(V Data Type) memory. For example, V1000 holds the
X1
current value for Counter CT0, V1001
holds the current value for Counter CT1,
CPU Specifications
etc.
and Operation
V1003 K1 Y2
The primary reason for this is OUT
programming flexibility. The example
shows how you can use relational V1003 K3 Y3
contacts to monitor the counter values. OUT
V1003 K5 V1003 K8 Y4
OUT
425
Word Memory Word memory is referred to as V memory

(V Data Type) (variable) and is a 16-bit location X0
LD
normally used to manipulate K1345
data/numbers, store data/numbers, etc.
Some information is automatically stored
OUT V2000
in V memory. For example, the timer
current values are stored in V memory.
The example shows how a four-digit
BCD constant is loaded into the
accumulator and then stored in a Word Locations 16 bits
V-memory location.
0 0 0 1 00 1 1 0 1 0 0 0 1 0 1
1 3 4 5
Stages Ladder Representation

(S Data type) Stages are used in RLL PLUS programs to
create a structured program, similar to a ISG
S0000 Wait forStart
flowchart. Each program Staget
Start S1
denotes a program segment. When the JMP
program segment, or Staget, is active, X0
S500
the logic within that segment is executed. JMP
SG
If the Staget is off, or inactive, the logic S0001 Check for a Part
is not executed and the CPU skips to the Part
Present S2
next active Staget. (See Chapter 7 for a JMP
more detailed description of RLL PLUS X1
Part
programming.) Present S6
JMP
Each Staget also has a discrete status X1
bit that can be used as an input to SG

S0002 Clamp the part
indicate whether the Staget is active or
inactive. If the Staget is active, then the Clamp
SET
status bit is on. If the Staget is inactive,
CPU Specifications
S400
Part
Locked S3
then the status bit is off. This status bit
and Operation
JMP
can also be turned on or off by other X2
instructions, such as the SET or RESET

instructions. This allows you to easily
control stages throughout the program.
Special Relays Special relays are discrete memory

(SP Data Type) locations with pre-defined functionality. SP5 C10
There are many different types of special OUT
relays. For example, some aid in
program development, others provide
system operating status information, etc.
Appendix D provides a complete listing of SP4: 1 second clock
the special relays.
SP5: 100 ms clock
In this example, control relay C10 will SP6: 50 ms clock
energize for 50 ms and de-energize for
50 ms because SP5 is a predefined
relay that will be on for 50 ms and off for
50 ms.
426
DL05 System V-memory

System Parameters The DL05 PLCs reserve several V-memory locations for storing system parameters
and Default Data or certain types of system data. These memory locations store things like the error
Locations codes, High-Speed I/O data, and other types of system setup information.
(V Data Type)
System Description of Contents Default Values / Ranges
V-memory
V2320V2377 The default location for multiple preset values for the High-Speed Counter N/A
V7620V7627 Locations for DV1000 operator interface parameters
V7620 Sets the V-memory location that contains the value. V0 V2377
V7621 Sets the V-memory location that contains the message. V0 V2377
V7622 Sets the total number (1 16) of V-memory locations to be displayed. 1 16
V7623 Sets the V-memory location that contains the numbers to be displayed. V0 V2377
V7624 Sets the V-memory location that contains the character code to be displayed. V0 V2377
V7625 Contains the function number that can be assigned to each key. V-memory location for X,
Y, or C points used.
V7626 Powerup operational mode. 0, 1, 2, 12, 3
V7627 Change preset value. 0000 to 9999
V7630 Starting location for the multistep presets for channel 1. The default value is Default: V2320
2320, which indicates the first value should be obtained from V2320. Since Range: V0 V2320
there are 24 presets available, the default range is V2320 V2377. You can
change the starting point if necessary.
V7631V7632 Reserved N/A
V7633 Sets the desired function code for the high speed counter, interrupt, pulse Default: 0060
catch, pulse train, and input filter. Location can also be used to set the Lower Byte Range:
power-up in Run Mode option. Range: 10 Counter
20 Quadrature
30 Pulse Out
40 Interrupt
50 Pulse Catch
CPU Specifications
60 Filtered
and Operation
discrete In.
Upper Byte Range:
Bits 812, 14, 15: Unused
Bit 13: Powerup in RUN,
only if Mode Switch is in
TERM position.
V7634 X0 Setup Register for High-Speed I/O functions Default: 1006
V7647 Timed Interrupt Default: 0000
Range: 000303E7h
(39999ms)
V7655 Port 2: Setup for the protocol, time-out, and the response delay time. Default: 00E0
V7656 Port 2: Setup for the station number, baud rate, STOP bit, and parity. Default: 8501
427
System Description of Contents Default Values / Ranges

V-memory
V7657 Port 2: Setup completion code used to notify the completion of the parameter Default: 0A00
setup.
V7660 Scan control setup: Keeps the scan control mode. Default: 0000
V7661 Setup timer over counter: Counts the times the actual scan time exceeds the N/A
user setup time.
V7720V7722 Locations for DV1000 operator interface parameters. N/A
V7720 Titled Timer preset value pointer N/A
V7721 Title Counter preset value pointer N/A
V7722 HiByte-Titled Timer preset block size, LoByte-Titled Counter preset block size N/A
V7751 Fault Message Error Code stores the 4-digit code used with the FAULT N/A
instruction when the instruction is executed.
V7755 Error code stores the fatal error code.
V7756 Error code stores the major error code.
V7757 Error code stores the minor error code.
V7760V7762 Reserved
V7763 Program address where syntax error exists N/A
V7764 Syntax error code N/A
V7765 Scan stores the total number of scan cycles that have occurred since the N/A
last Program Mode to Run Mode transition.
V7775 Scan stores the current scan time (milliseconds). N/A
V7776 Scan stores the minimum scan time that has occurred since the last N/A
Program Mode to Run Mode transition (milliseconds).
CPU Specifications
and Operation
V7777 Scan stores the maximum scan time that has occurred since the last N/A
Program Mode to Run Mode transition (milliseconds).
428
DL05 Memory Map
Memory Type Discrete Memory Word Memory Qty. Symbol

Reference Reference Decimal
(octal) (octal)
Input Points X0 X377 V40400 - V40417 256 X0
(See note 1)
Output Points Y0 Y377 V40500 V40517 256 Y0

(See note 1)
Control Relays C0 C777 V40600 - V40637 512 C0 C0
Special Relays SP0 SP777 V41200 V41237 512 SP0
Timers T0 T177 V41100 V41107 128

TMR T0
K100
Timer Current None V0 V177 128 V0 K100

Values
Timer Status Bits T0 T177 V41100 V41107 128 T0
Counters CT0 CT177 V41140 V41147 128 CNT CT0

K10
CPU Specifications
Counter None V1000 V1177 128

and Operation
V1000 K100
Current Values
Counter Status CT0 CT177 V41140 V41147 128 CT0

Bits
Data Words None V1200 V7377 3968 None specific, used with many
instructions
Data Words None V7400 V7577 128 None specific, used with many
Nonvolatile instructions
Stages S0 S377 V41000 V41017 256 S0
SG
S 001
System None V7600 V7777 128 None specific, used for various
parameters purposes
1 The DL05 systems are limited to 8 discrete inputs and 6 discrete outputs with the present available hardware, but 256 point addresses exist.
429
X Input Bit Map

This table provides a listing of individual Input points associated with each V-memory address bit for the
DL05s eight physical inputs. Actual available references are X0 to X377 (V40400 V40417).
MSB DL05 Input (X) Points LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
007 006 005 004 003 002 001 000 V40400
Y Output Bit Map

This table provides a listing of individual output points associated with each V-memory address bit for the
DL05s six physical outputs. Actual available references are Y0 to Y377 (V40500 V40517).
MSB DL05 Output (Y) Points LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
005 004 003 002 001 000 V40500
Stage Control / Status Bit Map

This table provides a listing of individual Staget control bits associated with each V-memory address bit.
MSB DL05 Stage (S) Control Bits LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
017 016 015 014 013 012 011 010 007 006 005 004 003 002 001 000 V41000
037 036 035 034 033 032 031 030 027 026 025 024 023 022 021 020 V41001
057 056 055 054 053 052 051 050 047 046 045 044 043 042 041 040 V41002
CPU Specifications
and Operation
077 076 075 074 073 072 071 070 067 066 065 064 063 062 061 060 V41003
117 116 115 114 113 112 111 110 107 106 105 104 103 102 101 100 V41004
137 136 135 134 133 132 131 130 127 126 125 124 123 122 121 120 V41005
157 156 155 154 153 152 151 150 147 146 145 144 143 142 141 140 V41006
177 176 175 174 173 172 171 170 167 166 165 164 163 162 161 160 V41007
217 216 215 214 213 212 211 210 207 206 205 204 203 202 201 200 V41010
237 236 235 234 233 232 231 230 227 226 225 224 223 222 221 220 V41011
257 256 255 254 253 252 251 250 247 246 245 244 243 242 241 240 V41012
277 276 275 274 273 272 271 270 267 266 265 264 263 262 261 260 V41013
317 316 315 314 313 312 311 310 307 306 305 304 303 302 301 300 V41014
337 336 335 334 333 332 331 330 327 326 325 324 323 322 321 320 V41015
357 356 355 354 353 352 351 350 347 346 345 344 343 342 341 340 V41016
377 376 375 374 373 372 371 370 367 366 365 364 363 362 361 360 V41017
430
Control Relay Bit Map

This table provides a listing of the individual control relays associated with each V-memory address bit.
MSB DL05 Control Relays (C) LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
017 016 015 014 013 012 011 010 007 006 005 004 003 002 001 000 V40600
037 036 035 034 033 032 031 030 027 026 025 024 023 022 021 020 V40601
057 056 055 054 053 052 051 050 047 046 045 044 043 042 041 040 V40602
077 076 075 074 073 072 071 070 067 066 065 064 063 062 061 060 V40603
117 116 115 114 113 112 111 110 107 106 105 104 103 102 101 100 V40604
137 136 135 134 133 132 131 130 127 126 125 124 123 122 121 120 V40605
157 156 155 154 153 152 151 150 147 146 145 144 143 142 141 140 V40606
177 176 175 174 173 172 171 170 167 166 165 164 163 162 161 160 V40607
217 216 215 214 213 212 211 210 207 206 205 204 203 202 201 200 V40610
237 236 235 234 233 232 231 230 227 226 225 224 223 222 221 220 V40611
257 256 255 254 253 252 251 250 247 246 245 244 243 242 241 240 V40612
277 276 275 274 273 272 271 270 267 266 265 264 263 262 261 260 V40613
317 316 315 314 313 312 311 310 307 306 305 304 303 302 301 300 V40614
337 336 335 334 333 332 331 330 327 326 325 324 323 322 321 320 V40615
357 356 355 354 353 352 351 350 347 346 345 344 343 342 341 340 V40616
377 376 375 374 373 372 371 370 367 366 365 364 363 362 361 360 V40617
417 416 415 414 413 412 411 410 407 406 405 404 403 402 401 400 V40620
437 436 435 434 433 432 431 430 427 426 425 424 423 422 421 420 V40621
457 456 455 454 453 452 451 450 447 446 445 444 443 442 441 440 V40622
477 476 475 474 473 472 471 470 467 466 465 464 463 462 461 460 V40623
517 516 515 514 513 512 511 510 507 506 505 504 503 502 501 500 V40624
CPU Specifications
and Operation
537 536 535 534 533 532 531 530 527 526 525 524 523 522 521 520 V40625
557 556 555 554 553 552 551 550 547 546 545 544 543 542 541 540 V40626
577 576 575 574 573 572 571 570 567 566 565 564 563 562 561 560 V40627
617 616 615 614 613 612 611 610 607 606 605 604 603 602 601 600 V40630
637 636 635 634 633 632 631 630 627 626 625 624 623 622 621 620 V40631
657 656 655 654 653 652 651 650 647 646 645 644 643 642 641 640 V40632
677 676 675 674 673 672 671 670 667 666 665 664 663 662 661 660 V40633
717 716 715 714 713 712 711 710 707 706 705 704 703 702 701 700 V40634
737 736 735 734 733 732 731 730 727 726 725 724 723 722 721 720 V40635
757 756 755 754 753 752 751 750 747 746 745 744 743 742 741 740 V40636
777 776 775 774 773 772 771 770 767 766 765 764 763 762 761 760 V40637
431
Timer Status Bit Map

This table provides a listing of individual timer contacts associated with each V-memory address bit.
MSB DL05 Timer (T) Contacts LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
017 016 015 014 013 012 011 010 007 006 005 004 003 002 001 000 V41100
037 036 035 034 033 032 031 030 027 026 025 024 023 022 021 020 V41101
057 056 055 054 053 052 051 050 047 046 045 044 043 042 041 040 V41102
077 076 075 074 073 072 071 070 067 066 065 064 063 062 061 060 V41103
117 116 115 114 113 112 111 110 107 106 105 104 103 102 101 100 V41104
137 136 135 134 133 132 131 130 127 126 125 124 123 122 121 120 V41105
157 156 155 154 153 152 151 150 147 146 145 144 143 142 141 140 V41106
177 176 175 174 173 172 171 170 167 166 165 164 163 162 161 160 V41107
Counter Status Bit Map

This table provides a listing of individual counter contacts associated with each V-memory address bit.
MSB DL05 Counter (CT) Contacts LSB

Address
17 16 15 14 13 12 11 10 7 6 5 4 3 2 1 0
017 016 015 014 013 012 011 010 007 006 005 004 003 002 001 000 V41140
037 036 035 034 033 032 031 030 027 026 025 024 023 022 021 020 V41141
057 056 055 054 053 052 051 050 047 046 045 044 043 042 041 040 V41142
077 076 075 074 073 072 071 070 067 066 065 064 063 062 061 060 V41143
117 116 115 114 113 112 111 110 107 106 105 104 103 102 101 100 V41144
137 136 135 134 133 132 131 130 127 126 125 124 123 122 121 120 V41145
CPU Specifications
157 156 155 154 153 152 151 150 147 146 145 144 143 142 141 140 V41146
and Operation
177 176 175 174 173 172 171 170 167 166 165 164 163 162 161 160 V41147
432
Network Configuration and Connections

Configuring This section describes how to configure the CPUs built-in networking ports for either
the DL05s MODBUS or DirectNET. This will allow you to connect the DL05 PLC system directly
Comm Ports to MODBUS networks using the RTU protocol, or to other devices on a DirectNET
network. MODBUS host systems must be capable of issuing the MODBUS
commands to read or write the appropriate data. For details on the MODBUS
protocol, check with your MODBUS supplier for the lastest version of the Gould
MODBUS Protocol reference Guide. For more details on DirectNET, order our
DirectNET manual, part number DADNETM.
Communication Port 1 Communication Port 2
Com 1 Connects to HPP, DirectSOFT, Com 2 Connects to HPP, DirectSOFT,

operator interfaces, etc. operator interfaces, etc.
6-pin, RS232C 6-pin, RS232C
9600 Baud (Fixed) Communication speed (baud)
Parity - odd (default) 300, 600, 1200, 2400, 4800,
Station address 1 (fixed) 9600, 19200, 38400
8 data bits Parity - odd (default), even, none
1 start, 1 stop bit Station address 1 (default)
Asynchronous, Half-duplex, DTE 8 data bits
Protocol: (Auto-Select) 1 start, 1 stop bit
K sequence (Slave only) Asynchronous, Half-duplex, DTE
DirectNET (Slave only) Protocol: (Auto-Select)
MODBUS (Slave only) K sequence (Slave only)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence/Print
You will need to make sure the network connection is a 3-wire RS232 type.
Normally, the RS232 signals are used for for communications between two devices
with distances up to a maximum of 15 meters.
Networking Port 1 Pin Descriptions Port 2 Pin Descriptions
DL05 to DL05
CPU Specifications

RS232C
and Operation
2 5V Power (+) conection 2 5V Power (+) conection

3 RXD Receive Data (RS232C) 3 RXD Receive Data (RS232C)
4 TXD Transmit Data (RS232C 4 TXD Transmit Data (RS232C
1234 5 6 5 RTS Request to Send
5 5V Power (+) conection
6-pin Female
Modular Connector
DL05 DL05
PORT 2 PORT 1 or 2
1 0V 0V 1
3 RXD RXD 3
4 TXD TXD 4
433
Networking
PC to DL05s
1234 5 6
RS422
6-pin Female
Modular Connector
F2UNICON DL05
GND
1 or 6 0V 0V 1 or 6 PORT 2
GND
0V 0V 1
TXD+ RXD+ 3 RXD RXD 3
RXD RXD 3
TXD RXD 4 TXD TXD 4
TXD TXD 4 RXD TXD
2 CTS 5V 2
RTS RTS 5 RXD+ TXD+
5 5V RTS 5
FAISONET
Note: When using the DL05 on a multi-drop

network, the RTS ON Delay time must be set
to at least 5ms and the RTS OFF Delay time F2UNICON DL05
must be set to at least 2ms. If you encounter GND
1 or 6 0V 0V 1 or 6 PORT 2
problems, the time can be increased. RXD+ 3 RXD RXD 3
RXD 4 TXD TXD 4
TXD
2 CTS 5V 2
TXD+
Networking 5 5V RTS 5
DL05 Master
to Other PLCs
CPU Specifications
and Operation
DL05 F2UNICON DL05
PORT 2 1 or 6 0V 0V 1 or 6 PORT 2
GND GND
1 or 6 0V 0V 1 or 6 3 RXD RXD 3
TXD+ RXD+
3 RXD RXD 3
TXD RXD 4 TXD TXD 4
4 TXD TXD 4 RXD TXD
2 CTS 5V 2
2 CTS RXD+ TXD+
5V 2
5 5V RTS 5
5 5V RTS 5
FAISONET
F2UNICON DL240
GND
1 0V 0V 1 PORT 2
RXD+ 3 RXD RXD 3
RXD 4 TXD TXD 4
TXD
2 CTS 5V 2
TXD+
5 5V RTS 5
434
MODBUS Port In DirectSOFT, choose the PLC menu, then Setup, then Secondary Comm Port.
Configuration S Port: From the port number list box at the top, choose Port 2.
S Protocol: Click the check box to the left of MODBUS (use AUX 56 on
the HPP, andselect MBUS), and then youll see the dialog box below.
Setup Communication Ports
Port: Port 2 Close

Protocol:
K-sequence
DirectNET
MODBUS Help
Non-sequence
Timeout: 800 mS
RTS ON Delay Time: 5 mS

RTS OFF Delay Time: 2 mS
Station Number: 1
Baud Rate: 38400
Stop Bits: 1
Parity: None
S Timeout: amount of time the port will wait after it sends a message to get
a response before logging an error.
S RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time
the DL05 waits to send the data after it has raised the RTS signal line.
The RTS OFF Delay Time specifies the time the DL05 waits to release
the RTS signal line after the data has been sent. When using the DL05 on
a multi-drop network, the RTS ON Delay time must be set to at least 5ms
CPU Specifications
and the RTS OFF Delay time must be set to at least 2ms. If you
and Operation
encounter problems, the time can be increased.

S Station Number: For making the CPU port a MODBUSR master, choose
1. The possible range for MODBUS slave numbers is from 1 to 247, but
the DL05 network instructions used in Master mode will access only
slaves 1 to 99. Each slave must have a unique number. At powerup, the
port is automatically a slave, unless and until the DL05 executes ladder
logic network instructions which use the port as a master. Thereafter, the
port reverts back to slave mode until ladder logic uses the port again.
S Baud Rate: The available baud rates include 300, 600, 1200, 2400,
4800, 9600, 19200, and 38400 baud. Choose a higher baud rate initially,
reverting to lower baud rates if you experience data errors or noise
problems on the network. Important: You must configure the baud rates of
all devices on the network to the same value. Refer to the appropriate
product manual for details.
S Stop Bits: Choose 1 or 2 stop bits for use in the protocol.
S Parity: Choose none, even, or odd parity for error checking.
Then click the button indicated to send the Port configuration to
the CPU, and click Close.
435
DirectNET Port In DirectSOFT, choose the PLC menu, then Setup, then Secondary Comm Port.
Configuration S Port: From the port number list box, choose Port 2 .
S Protocol: Click the check box to the left of DirectNET (use AUX 56 on
the HPP, then select DNET), and then youll see the dialog box below.
Setup Communication Ports
Port: Port 2 Close

Protocol:
K-sequence
DirectNET
MODBUS Help
Non-sequence
Timeout: 800 mS
RTS ON Delay Time: 5 mS

RTS OFF Delay Time: 2 mS
Station Number: 1
Baud Rate: 38400
Stop Bits: 1
Parity: None
Format: Hex
S Timeout: amount of time the port will wait after it sends a message to
get a response before logging an error.
S RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time
the DL05 waits to send the data after it has raised the RTS signal line.
The RTS OFF Delay Time specifies the time the DL05 waits to release
the RTS signal line after the data has been sent. When using the DL05
on a multi-drop network, the RTS ON Delay time must be set to at least
CPU Specifications
5ms and the RTS OFF Delay time must be set to at least 2ms. If you
and Operation
encounter problems, the time can be increased.
S Station Number: For making the CPU port a DirectNET master,
choose 1. The allowable range for DIrectNET slaves is from 1 to 90
(each slave must have a unique number). At powerup, the port is
automatically a slave, unless and until the DL05 executes ladder logic
instructions which attempt to use the port as a master. Thereafter, the
port reverts back to slave mode until ladder logic uses the port again.
S Baud Rate: The available baud rates include 300, 600, 1200, 2400,
4800, 9600, 19200, and 38400 baud. Choose a higher baud rate initially,
reverting to lower baud rates if you experience data errors or noise
problems on the network. Important: You must configure the baud rates
of all devices on the network to the same value.
S Stop Bits: Choose 1 or 2 stop bits for use in the protocol.
S Parity: Choose none, even, or odd parity for error checking.
S Format: Choose between hex or ASCII formats.
Then click the button indicated to send the Port configuration to
the CPU, and click Close.
436
Network Slave Operation

This section describes how other devices on a network can communicate with a CPU
port that you have configured as a DirectNETslave or MODBUS slave (DL05). A
MODBUS host must use the MODBUS RTU protocol to communicate with the DL05 as
a slave. The host software must send a MODBUS function code and MODBUS address
to specify a PLC memory location the DL05 comprehends. The DirectNET host uses
normal I/O addresses to access applicable DL05 CPU and system. No CPU ladder logic
is required to support either MODBUS slave or DirectNET slave operation.
MODBUS Function The MODBUS function code determines whether the access is a read or a write, and
Codes Supported whether to access a single data point or a group of them. The DL05 supports the
MODBUS function codes described below.
MODBUS Function DL05 Data Types

Function Code Available
01 Read a group of coils Y, CR, T, CT
02 Read a group of inputs X, SP
05 Set / Reset a single coil Y, CR, T, CT
15 Set / Reset a group of coils Y, CR, T, CT
03, 04 Read a value from one or more registers V
06 Write a value into a single register V
16 Write a value into a group of registers V
Determining the There are typically two ways that most host software conventions allow you to
MODBUS Address specify a PLC memory location. These are:
S By specifying the MODBUS data type and address
S By specifying a MODBUS address only.
CPU Specifications
and Operation
437
If Your Host Software Many host software packages allow you to specify the MODBUS data type and the
Requires the Data MODBUS address that corresponds to the PLC memory location. This is the easiest
Type and Address... method, but not all packages allow you to do it this way.
The actual equation used to calculate the address depends on the type of PLC data
you are using. The PLC memory types are split into two categories for this purpose.
S Discrete X, SP, Y, CR, S, T, C (contacts)

S Word V, Timer current value, Counter current value
In either case, you basically convert the PLC octal address to decimal and add the
appropriate MODBUS address (if required). The table below shows the exact
equation used for each group of data.
DL05 Memory Type QTY PLC Range MODBUS MODBUS

(Dec.) (Octal) Address Range Data Type
(Decimal)
For Discrete Data Types .... Convert PLC Addr. to Dec. + Start of Range + Data Type
Inputs (X) 256 X0 X377 2048 2303 Input
Special Relays (SP) 512 SP0 SP777 3072 3583 Input
Outputs (Y) 256 Y0 Y377 2048 2303 Coil
Control Relays (CR) 512 C0 C777 3072 4583 Coil
Timer Contacts (T) 128 T0 T177 6144 6271 Coil
Counter Contacts (CT) 128 CT0 CT177 6400 6527 Coil
Stage Status Bits (S) 256 S0 S377 5120 5375 Coil
For Word Data Types .... Convert PLC Addr. to Dec. + Data Type
Timer Current Values (V) 128 V0 V177 0 127 Input Register
Counter Current Values (V) 128 V1000 V1177 512 639 Input Register
CPU Specifications
V Memory, user data (V) 3968 V1200 V7377 640 3839 Holding Register
and Operation
V Memory, non-volatile (V) 128 V7600 V7777 3968 4095 Holding Register
438
The following examples show how to generate the MODBUS address and data type
for hosts which require this format.
Example 1: V2100 Find the MODBUS address for User V PLC Address (Dec.) + Data Type
location V2100.
V2100 = 1088 decimal
1. Find V memory in the table. 1088 + Hold. Reg. = Holding Reg. 1088
2. Convert V2100 into decimal (1088).
3. Use the MODBUS data type from the table.
V Memory, user data (V) 3200 V1200 V7377 640 3839 Holding Register
Example 2: Y20 Find the MODBUS address for output Y20. PLC Addr. (Dec) + Start Addr. + Data Type
1. Find Y outputs in the table. Y20 = 16 decimal
2. Convert Y20 into decimal (16). 16 + 2048 + Coil = Coil 2064
3. Add the starting address for the range
(2048).
Outputs (Y) 256 Y0 Y377 2048 2303 Coil
Example 3: T10 Current Find the MODBUS address to obtain the PLC Address (Dec.) + Data Type
Value current value from Timer T10.
T10 = 8 decimal
1. Find Timer Current Values in the table. 8 + Input Reg. = Input Reg. 8
2. Convert T10 into decimal (8).
CPU Specifications
Timer Current Values (V) 128 V0 V177 0 127 Input Register

and Operation
Example 4: C54 Find the MODBUS address for Control Relay PLC Addr. (Dec) + Start Addr. +Data Type
C54.
C54 = 44 decimal
1. Find Control Relays in the table. 44 + 3072 + Coil = Coil 3116
2. Convert C54 into decimal (44).
(3072).
Control Relays (CR) 512 C0 C777 3072 3583 Coil

439
If Your MODBUS Some host software does not allow you to specify the MODBUS data type and
Host Software address. Instead, you specify an address only. This method requires another step to
Requires an determine the address, but its still fairly simple. Basically, MODBUS also separates
Address ONLY the data types by address ranges as well. So this means an address alone can
actually describe the type of data and location. This is often referred to as adding the
offset. One important thing to remember here is that two different addressing
modes may be available in your host software package. These are:
S 484 Mode
S 584/984 Mode
We recommend that you use the 584/984 addressing mode if your host
software allows you to choose. This is because the 584/984 mode allows access
to a higher number of memory locations within each data type. If your software only
supports 484 mode, then there may be some PLC memory locations that will be
unavailable. The actual equation used to calculate the address depends on the type
of PLC data you are using. The PLC memory types are split into two categories for
this purpose.
S Discrete X, SP, Y, CR, S, T, C (contacts)
S Word V, Timer current value, Counter current value
In either case, you basically convert the PLC octal address to decimal and add the
appropriate MODBUS addresses (as required). The table below shows the exact
equation used for each group of data.
DL05 Memory Type QTY PLC Range MODBUS 484 Mode 584/984 MODBUS
(Dec.) (Octal) Address Range Address Mode Data Type
(Decimal) Address
For Discrete Data Types ... Convert PLC Addr. to Dec. + Start of Range + Appropriate Mode Address
Inputs (X) 256 X0 X377 2048 2303 1001 10001 Input
Special Relays (SP) 512 SP0 SP777 3072 3583 1001 10001 Input
Outputs (Y) 256 Y0 Y377 2048 2303 1 1 Coil
CPU Specifications
Control Relays (CR) 512 C0 C777 3072 3583 1 1 Coil
and Operation
Timer Contacts (T) 128 T0 T177 6144 6271 1 1 Coil
Counter Contacts (CT) 128 CT0 CT177 6400 6527 1 1 Coil
Stage Status Bits (S) 256 S0 S377 5120 5375 1 1 Coil
For Word Data Types .... Convert PLC Addr. to Dec. + Appropriate Mode Address
Timer Current Values (V) 128 V0 V377 0 127 3001 30001 Input Reg.
Counter Current Values (V) 128 V1000 V1177 512 639 3001 30001 Input Reg
V Memory, user data (V) 3200 V1400 V7377 768 3839 4001 40001 Hold Reg.
V Memory, non-volatile (V) 128 V7400 V7577 3840 3967 4001 40001 Hold Reg.
V Memory, system (V) 256 V7600 V7777 3968 4095 4001 40001 Hold Reg.
440
The following examples show how to generate the MODBUS addresses for hosts
which require this format.
Example 1: V2100 Find the MODBUS address for User V PLC Address (Dec.) + Mode Address
584/984 Mode location V2100.
V2100 = 1088 decimal
1. Find V memory in the table. 1088 + 40001 = 41089
2. Convert V2100 into decimal (1088).
3. Add the MODBUS starting address for the
mode (40001).
V Memory, system (V) 128 V1200 V7377 3480 3735 4001 40001 Hold Reg.
Example 2: Y20 Find the MODBUS address for output Y20. PLC Addr. (Dec) + Start Addr. + Mode
584/984 Mode 1. Find Y outputs in the table. Y20 = 16 decimal
2. Convert Y20 into decimal (16). 16 + 2048 + 1 = 2065
(2048).
4. Add the MODBUS address for the mode
(1).
Outputs (Y) 256 Y0 Y377 2048 2303 1 1 Coil
Example 3: T10 Current Find the MODBUS address to obtain the PLC Address (Dec.) + Mode Address
Value current value from Timer T10.
T10 = 8 decimal
484 Mode 1. Find Timer Current Values in the table. 8 + 3001 = 3009
2. Convert T10 into decimal (8).
3. Add the MODBUS starting address for the
mode (3001).
Timer Current Values (V) 128 V0 V177 0 127 3001 30001 Input Reg.
CPU Specifications
Example 4: C54 Find the MODBUS address for Control Relay PLC Addr. (Dec) + Start Address + Mode
and Operation
584/984 Mode C54.

C54 = 44 decimal
1. Find Control Relays in the table. 44 + 3072 + 1 = 3117
2. Convert C54 into decimal (44).
(3072).
4. Add the MODBUS address for the mode
(1).
Control Relays (CR) 512 C0 C777 3072 3583 1 1 Coil
Determining the Addressing the memory types for DirectNET slaves is very easy. Use the ordinary
DirectNET Address native address of the slave device itself. To access a slave PLCs memory address
V2000 via DirectNET, for example, the network master will request V2000 from the
slave.
441
Network Master Operation

This section describes how the DL05 can communicate on a MODBUS or DirectNET
network as a master. For MODBUS networks, it uses the MODBUS RTU protocol,
which must be interpreted by all the slaves on the network. Both MODBUS and
DirectNet are single master/multiple slave networks. The master is the only member
of the network that can initiate requests on the network. This section teaches you how
to design the required ladder logic for network master operation.
MODBUS RTU Protocol, or DirectNET
Slave #1 Slave #2 Slave #3
Master
When using the DL05 PLC as the master station, simple RLL instructions are used
to initiate the requests. The WX instruction initiates network write operations, and
the RX instruction initiates network read operations. Before executing either the WX
or RX commands, we will need to load data related to the read or write operation
onto the CPUs accumulator stack. When the WX or RX instruction executes, it uses
the information on the stack combined with data in the instruction box to completely
define the task, which goes to the port.
CPU Specifications
and Operation
Network
WX (write)
RX (read)
Slave
Master
The following step-by-step procedure will provide you the information necessary to
set up your ladder program to receive data from a network slave.
442
Step 1: The first Load (LD) instruction identifies

Identify Master the communications port number on the F 2 0 1
Port # and Slave # network master (DL05) and the address of
the slave station. This instruction can
address up to 99 MODBUS slaves, or 90 Slave address (BCD)
DirectNET slaves. The format of the word Port number (BCD)
is shown to the right. The F2 in the upper
byte indicates the use of the right port of Internal port (hex)
the DL05 PLC, port number 2. The lower
byte contains the slave address number in LD
BCD (01 to 99). KF201
Step 2: The second Load (LD) instruction 6 4 (BCD)

Load Number of determines the number of bytes which will
Bytes to Transfer be transferred between the master and
slave in the subsequent WX or RX
instruction. The value to be loaded is in # of bytes to transfer
BCD format (decimal), from 1 to 128
bytes. LD
K64
The number of bytes specified also depends on the type of data you want to obtain.
For example, the DL05 Input points can be accessed by V-memory locations or as X
input locations. However, if you only want X0 X27, youll have to use the X input
data type because the V-memory locations can only be accessed in 2-byte
increments. The following table shows the byte ranges for the various types of
DirectLOGIC products.
DL 05 / 205 / 350 / 405 Memory Bits per unit Bytes

V memory 16 2
T / C current value 16 2
CPU Specifications
and Operation
Inputs (X, SP) 8 1

Outputs 8 1
(Y, C, Stage, T/C bits)
Scratch Pad Memory 8 1
Diagnostic Status 8 1
DL330 / 340 Memory Bits per unit Bytes

Data registers 8 1
T / C accumulator 16 2
I/O, internal relays, shift register 1 1
bits, T/C bits, stage bits
Scratch Pad Memory 8 1
Diagnostic Status(5 word R/W) 16 10
443
Step 3: The third instruction in the RX or WX 4 0 6 0 0

sequence is a Load Address (LDA) (octal)
Specify Master
Memory Area instruction. Its purpose is to load the
starting address of the memory area to be Starting address of
transferred. Entered as an octal number, master transfer area
the LDA instruction converts it to hex and
places the result in the accumulator.
LDA
For a WX instruction, the DL05 CPU O40600
sends the number of bytes previously
specified from its memory area beginning
at the LDA address specified. MSB V40600 LSB
For an RX instruction, the DL05 CPU
reads the number of bytes previously 15 0
specified from the slave, placing the V40601
MSB LSB
received data into its memory area
beginning at the LDA address specified.
15 0
NOTE: Since V memory words are always 16 bits, you may not always use the whole
word. For example, if you only specify 3 bytes and you are reading Y outputs from the
slave, you will only get 24 bits of data. In this case, only the 8 least significant bits of
the last word location will be modified. The remaining 8 bits are not affected.
Step 4: The last instruction in our sequence is the SP116

Specify Slave WX or RX instruction itself. Use WX to LD
KF201
Memory Area write to the slave, and RX to read from the
slave. All four of our instructions are
LD
shown to the right. In the last instruction, K64
you must specify the starting address and
a valid data type for the slave. LDA
O40600
CPU Specifications
RX
Y0
and Operation
S DirectNET slaves specify the same address in the WX and RX
instruction as the slaves native I/O address
S MODBUS DL405, DL205, or DL05 slaves specify the same address
in the WX and RX instruction as the slaves native I/O address
S MODBUS 305 slaves use the following table to convert DL305
addresses to MODBUS addresses
DL305 Series CPU Memory TypetoMODBUS Cross Reference (excluding 350 CPU)
PLC Memory type PLC base MODBUS PLC Memory Type PLC base MODBUS
address base addr. address base addr.
TMR/CNT Current Values R600 V0 TMR/CNT Status Bits CT600 GY600
I/O Points IO 000 GY0 Control Relays CR160 GY160
Data Registers R401, V100 Shift Registers SR400 GY400
R400
Stage Status Bits (D3330P only) S0 GY200
444
Communications Typically network communications will SP117 Y1

from a last longer than 1 scan. The program must SET
Ladder Program wait for the communications to finish
before starting the next transaction. SP116
LD
KF201
Port Communication Error
LD
Port Busy K0003
LDA
O40600
RX
Y0
Port 2, which can be a master, has two Special Relay contacts associated with it (see
Appendix D for comm port special relays).One indicates Port busy(SP116), and
the other indicates Port Communication Error(SP117). The example above shows
the use of these contacts for a network master that only reads a device (RX). The
Port Busy bit is on while the PLC communicates with the slave. When the bit is off
the program can initiate the next network request.
The Port Communication Error bit turns on when the PLC has detected an error.
Use of this bit is optional. When used, it should be ahead of any network instruction
boxes since the error bit is reset when an RX or WX instruction is executed.
Multiple Read and If you are using multiple reads and writes Interlocking Relay
Write Interlocks in the RLL program, you have to interlock SP116 C100
the routines to make sure all the routines LD
KF201
are executed. If you dont use the
interlocks, then the CPU will only execute
LD
the first routine. This is because each port K0003
can only handle one transaction at a time.
In the example to the right, after the RX LDA
O40600
instruction is executed, C0 is set. When
CPU Specifications
the port has finished the communication

and Operation
RX
task, the second routine is executed and Y0
Interlocking
C0 is reset. Relay C100
If youre using RLL PLUS Stage
SET
Programing, you can put each routine in a
separate program stage to ensure proper SP116 C100
LD
execution and switch from stage to stage KF201
allowing only one of them to be active at a
time. LD
K0003
LDA
O40400
WX
Y0
C100
RST
15
Standard RLL
Instructions
Boolean Instructions
Comparative Boolean
Immediate Instructions
Timer, Counter and Shift Register Instructions
Accumulator / Stack Load and Output Data Instructions
Logical Instructions (Accumulator)
Math Instructions
Bit Operation Instructions (Accumulator)
Number Conversion Instructions (Accumulator)
Table Instructions
CPU Control Instructions
Program Control Instructions
Interrupt Instructions
Message Instructions
52 Standard RLL Instructions
Introduction
DL05 Micro PLCs offer a wide variety of instructions to perform many different types
of operations. This chapter shows you how to use each standard Relay Ladder Logic
(RLL) instruction. In addition to these instructions, you may also need to refer to the
Drum instruction in Chapter 6, or the Stage programming instructions in Chapter 7.
There are two ways to quickly find the instruction you need.
S If you know the instruction category (Boolean, Comparative Boolean, etc.)
just use the title at the top of the page to find the pages that discuss the
instructions in that category.
S If you know the individual instruction name, use the following table to find
the page(s) that discusses the instruction.
Instruction Page Instruction Page Instruction Page
ACON 5107 ENCO 580 OR 510, 524,
557
ADDB 573 END 594
OR OUT 513
ADD 563 ENI 5103
ORE 521
ADDD 564 FAULT 5106
ORI 526
AND 511, 525, FOR 596
555 ORN 510, 524
GRAY 588
AND STR 512 ORND 516
GTS 598
ANDD 556 ORNE 521
HTA 586
ANDE 522 OR OUTI 528
INC 571
ANDI 527 OR STR 512
INCB 572
ORD 558
ANDN 511, 525 INT 5103
ORNI 526
ANDND 517 INV 584
OROUTI 528
ANDNE 522 IRT 5103
ORPD 516
ANDNI 527 IRTC 5103
OUT 513, 552
ANDPD 517 ISG 722
OUTD 552
ATH 585 JMP 722
OUTF 553
BCD 583 LD 548
OUTI 528
BIN 582 LDA 551 PAUSE 519
CMP 561 LDD 549 PD 514
CMPD 562 LDF 550 POP 553
CNT 536 LDLBL 592 PRINT 5109
CV 723 MLR 5101 RST 518
CVJMP 723 MLS 5101 RSTI 529
DEC 571 MOV 591 RSTWT 595
DECB 572 MOVMC 592 RT 598
RLL Instructions
DECO 581 MUL 567 RTC 598

DISI 5104 MULB 575 RX 5113
Standard
DIV 569 MULD 568 SBR 598

DIVB 576 NCON 5107 SET 518
DIVD 570 NEXT 596 SETI 529
DLBL 5107 NJMP 722 SFLDGT 589
DRUM 612 NOP 594 SG 721
EDRUM 62, NO TAG NOT 514 SGCNT 538
Instruction Set 53
Instruction Page Instruction Page Instruction Page

SHFL 577 STRND 515 TMR 531
SHFR 579 STRNE 520 TMRA 533
SR 542 STRNI 526 TMRAF 533
STOP 594 STRPD 515 TMRF 531
STR 59, 523 SUB 565 UDC 540
STRE 520 SUBB 574 WX 5115
STRI 526 SUBD 566 XOR 559
STRN 59, 523 SUM 577 XORD 560
RLL Instructions
Standard
Using Boolean Instructions

Do you ever wonder why so many PLC manufacturers always quote the scan time
for a 1K boolean program? Simple. Most all programs utilize many boolean
instructions. These are typically very simple instructions designed to join input and
output contacts in various series and parallel combinations. Since the DirectSOFT
package allows you to use graphic symbols to build the program, you dont
absolutely have to know the mnemonics of the instructions. However, it may helpful
at some point, especially if you ever have to troubleshoot the program with a
Handheld Programmer.The following paragraphs show how these instructions are
used to build simple ladder programs.
END Statement All DL05 programs require an END statement as the last instruction. This tells the
CPU that this is the end of the program. Normally, any instructions placed after the
END statement will not be executed. There are exceptions to this such as interrupt
routines, etc. Chapter 5 discusses the instruction set in detail.
X0 Y0
OUT
All programs must have
and END statement
END
Simple Rungs You use a contact to start rungs that contain both contacts and coils. The boolean
instruction that does this is called a Store or, STR instruction. The output point is
represented by the Output or, OUT instruction. The following example shows how to
enter a single contact and a single output coil.
DirectSOFT Example Handheld Mnemonics
X0 Y0 STR X0
OUT Y0
OUT END
END
Normally Closed Normally closed contacts are also very common. This is accomplished with the
Contact Store Not or, STRN instruction. The following example shows a simple rung with a
normally closed contact.
RLL Instructions

Standard
X0 Y0 STRN X0
OUT OUT Y0
END
END
Standard RLL Instructions 55
Contacts in Series Use the AND instruction to join two or more contacts in series. The following
example shows two contacts in series and a single output coil. The instructions used
would be STR X0, AND X1, followed by OUT Y0.
X0 X1 Y0 STR X0
AND X1
OUT OUT Y0
END
END
Midline Outputs Sometimes it is necessary to use midline outputs to get additional outputs that are
conditional on other contacts. The following example shows how you can use the
AND instruction to continue a rung with more conditional outputs.
X0 X1 Y0 STR X0
AND X1
OUT OUT Y0
AND X2
X2 Y1 OUT Y1
AND X3
OUT OUT Y2
END
X3 Y2
OUT
END
Parallel Elements You also have to join contacts in parallel. The OR instruction allows you to do this.
The following example shows two contacts in parallel and a single output coil. The
instructions would be STR X0, OR X1, followed by OUT Y0.

X0 Y0 STR X0
OUT OR X1
OUT Y0
X1 END
END
RLL Instructions
Standard
Joining Series Quite often it is necessary to join several groups of series elements in parallel. The
Branches in Or Store (ORSTR) instruction allows this operation. The following example shows a
Parallel simple network consisting of series elements joined in parallel.
X0 X1 Y0 STR X0
OUT AND X1
STR X2
X2 X3 AND X3
ORSTR
OUT Y0
END END
Joining Parallel You can also join one or more parallel branches in series. The And Store (ANDSTR)
Branches in Series instruction allows this operation. The following example shows a simple network
with contact branches in series with parallel contacts.
X0 X1 Y0 STR X0
OUT STR X1
OR X2
X2 ANDSTR
OUT Y0
END
END
Combination You can combine the various types of series and parallel branches to solve most any
Networks application problem. The following example shows a simple combination network.
X0 X2 X5 Y0
OUT
X1 X3 X4
X6
END
Comparative Some PLC manufacturers make it really difficult to do a simple comparison of two
Boolean numbers. Some of them require you to move the data all over the place before you
can actually perform the comparison. The DL05 Micro PLCs provide Comparative
RLL Instructions
Boolean instructions that allow you to quickly and easily solve this problem. The
Comparative Boolean provides evaluation of two 4-digit values using boolean
Standard
contacts. The valid evaluations are: equal to, not equal to, equal to or greater than,
and less than.
In the following example when the value V1400 K1234 Y3
in V-memory location V1400 is equal to OUT
the constant value 1234, Y3 will
energize.
Boolean Stack There are limits to how many elements you can include in a rung. This is because the
DL05 PLCs use an 8-level boolean stack to evaluate the various logic elements. The
boolean stack is a temporary storage area that solves the logic for the rung. Each
time the program encounters a STR instruction, the instruction is placed on the top of
the stack. Any other STR instructions already on the boolean stack are pushed down
a level. The ANDSTR, and ORSTR instructions combine levels of the boolean stack
when they are encountered. An error will occur during program compilation if the
CPU encounters a rung that uses more than the eight levels of the boolean stack.
The following example shows how the boolean stack is used to solve boolean logic.
X0 X1 ORSTR AND X4 Y0
STR
STR OUT Output
X2 AND X3
STR ANDSTR
X5 OR
STR X0 STR X1 STR X2 AND X3

1 STR X0 1 STR X1 1 STR X2 1 X2 AND X3
2 2 STR X0 2 STR X1 2 STR X1
3 3 3 STR X0 3 STR X0
4 4 4 4
5 5 5 5
6 6 6 6
7 7 7 7
8 8 8 8
ORSTR AND X4 ORNOT X5

1 X1 OR (X2 AND X3) 1 X4 AND [X1 OR (X2 AND X3)] 1 NOT X5 OR X4 AND [X1 OR (X2 AND X3)]
2 STR X0 2 STR X0 2 STR X0
3 3 3
S S S
S S S
8 8 8
ANDSTR
1 X0 AND (NOT X5 OR X4) AND [X1 OR (X2 AND X3)]
2
3
RLL Instructions
Standard
S
S
8
Immediate Boolean The DL05 Micro PLCs can usually complete an operation cycle in a matter of
milliseconds. However, in some applications you may not be able to wait a few
milliseconds until the next I/O update occurs. The DL05 PLCs offer Immediate input
and outputs which are special boolean instructions that allow reading directly from
inputs and writing directly to outputs during the program execution portion of the
CPU cycle. You may recall that this is normally done during the input or output
update portion of the CPU cycle. The immediate instructions take longer to execute
because the program execution is interrupted while the CPU reads or writes the I/O
point. This function is not normally done until the read inputs or the write outputs
portion of the CPU cycle.
NOTE: Even though the immediate input instruction reads the most current status
from the input point, it only uses the results to solve that one instruction. It does not
use the new status to update the image register. Therefore, any regular instructions
that follow will still use the image register values. Any immediate instructions that
follow will access the I/O again to update the status. The immediate output
instruction will write the status to the I/O and update the image register.
CPU Scan
The CPU reads the inputs from the local

base and stores the status in an input
Read Inputs image register.
X11 ... X2 X1 X0
OFF ... ON OFF OFF OFF X0
Input Image Register
OFF X1
Read Inputs from Specialty I/O
Solve the Application Program

Immediate instruction does not use the
input image register, but instead reads
X0 Y0 the status from the module immediately.
I I/O Point X0 Changes
RLL Instructions
ON X0
OFF X1
Standard
Write Outputs
Write Outputs to Specialty I/O
Diagnostics
Store The Store instruction begins a new rung

(STR) or an additional branch in a rung with a Aaaa
normally open contact. Status of the
contact will be the same state as the
associated image register point or
memory location.
Store Not The Store Not instruction begins a new

(STRN) rung or an additional branch in a rung Aaaa
with a normally closed contact. Status of
the contact will be opposite the state of
the associated image register point or
memory location.
Operand Data Type DL05 Range
A aaa
Inputs X 0377
Outputs Y 0377
Control Relays C 0777
Stage S 0377
Timer T 0177
Counter CT 0177
Special Relay SP 0777
In the following Store example, when input X1 is on, output Y2 will energize.
DirectSOFT Handheld Programmer Keystrokes
X1 Y2 $ B ENT
STR 1
OUT
GX C ENT
OUT 2
In the following Store Not example, when input X1 is off output Y2 will energize.
X1 Y2 SP B ENT
OUT STRN 1
GX C ENT
OUT 2
RLL Instructions
Standard
Or The Or instruction logically ors a normally

(OR) open contact in parallel with another
contact in a rung. The status of the
Aaaa
contact will be the same state as the
memory location.
Or Not The Or Not instruction logically ors a

(ORN) normally closed contact in parallel with
another contact in a rung. The status of
Aaaa
memory location.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following Or example, when input X1 or X2 is on, output Y5 will energize.

X1 Y5 $ B ENT
STR 1
OUT
Q C ENT
OR 2
X2
GX F ENT
OUT 5
In the following Or Not example, when input X1 is on or X2 is off, output Y5 will

energize.
X1 Y5 $ B ENT
OUT STR 1
R C ENT
ORN 2
X2
GX F ENT
OUT 5
RLL Instructions
Standard
And The And instruction logically ands a

(AND) normally open contact in series with Aaaa
the contact will be the same state as the
memory location.
And Not The And Not instruction logically ands a

(ANDN) normally closed contact in series with Aaaa
memory location.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following And example, when input X1 and X2 are on output Y5 will energize.
X1 X2 Y5 $ B ENT
STR 1
OUT
V C ENT
AND 2
GX F ENT
OUT 5
In the following And Not example, when input X1 is on and X2 is off output Y5 will
energize.
X1 X2 Y5 $ B ENT
OUT STR 1
W C ENT
ANDN 2
GX F ENT
OUT 5
RLL Instructions
Standard
And Store The And Store instruction logically ands

(AND STR) two branches of a rung in series. Both OUT
branches must begin with the Store

instruction.
Or Store The Or Store instruction logically ors two

(OR STR) branches of a rung in parallel. Both OUT
branches must begin with the Store
instruction.
In the following And Store example, the branch consisting of contacts X2, X3, and X4
have been anded with the branch consisting of contact X1.
X1 X2 X3 Y5 $ B ENT
STR 1
OUT
$ C ENT
STR 2
X4
V D
ENT
AND 3
Q E
ENT
OR 4
L ENT
ANDST
GX F ENT
OUT 5
In the following Or Store example, the branch consisting of X1 and X2 have been
ored with the branch consisting of X3 and X4.
X1 X2 Y5 $ B ENT
STR 1
OUT
V C
ENT
AND 2
X3 X4
$ D ENT
STR 3
V E ENT
AND 4
M ENT
ORST
GX F ENT
OUT 5
RLL Instructions
Standard
Out The Out instruction reflects the status of

(OUT) the rung (on/off) and outputs the discrete Aaaa
(on/off) state to the specified image OUT
register point or memory location.
Multiple Out instructions referencing the same discrete location should not be used
since only the last Out instruction in the program will control the physical output
point. Instead, use the next instruction, the Or Out.
A aaa
Inputs X 0377
Outputs Y 0377
In the following Out example, when input X1 is on, output Y2 and Y5 will energize.
X1 Y2 $ B ENT
STR 1
OUT
GX C ENT
OUT 2
Y5
GX F ENT
OUT OUT 5
Or Out The Or Out instruction allows more than

(OR OUT) one rung of discrete logic to control a A aaa
single output. Multiple Or Out OR OUT
instructions referencing the same output
coil may be used, since all contacts
controlling the output are logically ORed
together. If the status of any rung is on,
the output will also be on.
A aaa
Inputs X 0177
Outputs Y 0177
In the following example, when X1 or X4 is on, Y2 will energize.

RLL Instructions
X1
Standard
Y2
$ B ENT
OR OUT STR 1
O D F ENT ENT C ENT
INST# 3 5 2
$ E ENT
STR 4
X4 Y2 O D F C
ENT ENT ENT
INST# 3 5 2
OR OUT
Not The Not instruction inverts the status of

(NOT) the rung at the point of the instruction.
In the following example when X1 is off, Y2 will energize. This is because the Not
instruction inverts the status of the rung at the Not instruction.
X1 Y2 $ B ENT
STR 1
OUT
SHFT N O T ENT
TMR INST# MLR
GX C ENT
OUT 2
NOTE: DirectSOFT Release 1.1i and later supports the use of the NOT instruction.
The above example rung is merely intended to show the visual representation of the
NOT instruction. The rung cannot be created or displayed in DirectSOFT versions
earlier than 1.1i.
Positive The Positive Differential instruction is

Differential typically known as a one shot. When the A aaa
(PD) input logic produces an off to on PD
transition, the output will energize for one
CPU scan.
A aaa
Inputs X 0377
Outputs Y 0377
In the following example, every time X1 makes an off to on transition, C0 will

energize for one scan.
X1 C0 $ B ENT
STR 1
PD
SHFT P SHFT D A ENT
CV 3 0
RLL Instructions
Standard
Store Positive The Store Positive Differential instruction

Differential begins a new rung or an additional branch
(STRPD) in a rung with a normally open contact.
Aaaa
The contact closes for one CPU scan
when the state of the associated image
register point makes an Off-to-On
transition. Thereafter, the contact remains
open until the next Off-to-On transition
(the symbol inside the contact represents
the transition). This function is sometimes
called a one-shot.
Store Negative The Store Negative Differential instruction

Differential begins a new rung or an additional branch
(STRND) in a rung with a normally closed contact.
Aaaa
The contact closes for one CPU scan
when the state of the associated image
register point makes an On-to-Off
transition. Thereafter, the contact remains
open until the next On-to-Off transition
(the symbol inside the contact represents
the transition).
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following example, each time X1 is makes an Off-to-On transition, Y4 will

X1 $ SHFT P D B ENT
Y4 STR CV 3 1
OUT GX E ENT
OUT 4
In the following example, each time X1 is makes an On-to-Off transition, Y4 will

RLL Instructions
X1 $ SHFT N D B ENT
Y4
Standard
STR TMR 3 1
OUT GX E
ENT
OUT 4
Or Positive The Or Positive Differential instruction

Differential logically ors a normally open contact in
(ORPD) parallel with another contact in a rung. The
status of the contact will be open until the
associated image register point makes an Aaaa
Off-to-On transition, closing it for one CPU
scan. Thereafter, it remains open until
another Off-to-On transition.
Or Negative The Or Negative Differential instruction

Differential logically ors a normally open contact in
(ORND) parallel with another contact in a rung. The
associated image register point makes an Aaaa
On-to-Off transition, closing it for one CPU
another On-to-Off transition.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following example, Y 5 will energize whenever X1 is on, or for one CPU scan
when X2 transitions from Off to On.
$ B ENT
X1 Y5 STR 1
OUT Q SHFT P D C ENT
OR CV 3 2
X2 GX F
ENT
OUT 5
In the following example, Y 5 will energize whenever X1 is on, or for one CPU scan
when X2 transitions from On to Off.
$ B ENT
X1 Y5 STR 1
OUT Q N D C
SHFT ENT
OR TMR 3 2
RLL Instructions
X2 GX F
ENT
OUT 5
Standard
And Positive The And Positive Differential instruction

Differential logically ands a normally open contact in
(ANDPD) parallel with another contact in a rung. The
Aaaa
associated image register point makes an
Off-to-On transition, closing it for one CPU
another Off-to-On transition.
And Negative The And Negative Differential instruction

Differential logically ands a normally open contact in
(ANDND) parallel with another contact in a rung. The
Aaaa
associated image register point makes an
On-to-Off transition, closing it for one CPU
another On-to-Off transition.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following example, Y5 will energize for one CPU scan whenever X1 is on and
X2 transitions from Off to On.
$ B ENT
X1 X2 Y5 STR 1
OUT Q SHFT P D C ENT
OR CV 3 2
GX F
ENT
OUT 5
In the following example, Y5 will energize for one CPU scan whenever X1 is on and
X2 transitions from On to Off.
X2 $ B ENT
X1 Y5 STR 1
OUT Q N D C
SHFT ENT
OR TMR 3 2
RLL Instructions
GX F
ENT
OUT 5
Standard
Set The Set instruction sets or turns on an Optional

memory range
(SET) image register point/memory location or A aaa aaa
a consecutive range of image register SET
points/memory locations. Once the
point/location is set it will remain on until it
is reset using the Reset instruction. It is
not necessary for the input controlling the
Set instruction to remain on.
Reset The Reset instruction resets or turns off Optional

memory range
(RST) an image register point/memory location A aaa aaa
or a range of image registers RST
points/memory locations. Once the
point/location is reset it is not necessary
for the input to remain on.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
In the following example when X1 is on, Y2 through Y5 will energize.

X1 $ B
Y2 Y5 ENT
STR 1
SET
X C F ENT
SET 2 5
In the following example when X1 is on, Y2 through Y5 will be reset or deenergized.

X1 $ B
Y2 Y5 ENT
STR 1
RST
S C F ENT
RST 2 5
RLL Instructions
Standard
Pause The Pause instruction disables the

(PAUSE) output update on a range of outputs. The Y aaa aaa
ladder program will continue to run and PAUSE
update the image register. However, the
outputs in the range specified in the
Pause instruction will be turned off at the
output points.
aaa
Outputs Y 0377
In the following example, when X1 is ON, Y3Y5 will be turned OFF. The execution of
the ladder program will not be affected.
DirectSOFT
X1 Y5 Y7
PAUSE
Since the D2HPP Handheld Programmer does not have a specific Pause key, you
can use the corresponding instruction number for entry (#960), or type each letter of
the command.
Handheld Programmer Keystrokes
$ B ENT
STR 1
O J G A ENT ENT D F ENT
INST# 9 6 0 3 5
In some cases, you may want certain output points in the specified pause range to
operate normally. In that case, use Aux 58 to over-ride the Pause instruction.
RLL Instructions
Standard
Comparative Boolean Instructions
Comparative Boolean
Store If Equal The Store If Equal instruction begins a

(STRE) new rung or additional branch in a rung B bbb
V aaa
with a normally open comparative
contact. The contact will be on when
Vaaa =Bbbb .
Store If Not Equal The Store If Not Equal instruction begins

(STRNE) a new rung or additional branch in a rung V aaa B bbb
with a normally closed comparative
Vaaa Bbbb.
B aaa bbb
V memory V All (See page 428) All (See page 428)
Pointer P All (See page 428) All (See page 428)
Constant K 09999
In the following example, when the value in V memory location V2000 = 4933 , Y3 will
energize.
V2000 K4933 Y3 $ SHFT E C A A A

STR 4 2 0 0 0
OUT
E J D D ENT
4 9 3 3
GX D ENT
OUT 3
In the following example, when the value in V memory location V2000 5060, Y3
will energize.
Y3 SP SHFT E C A A A
V2000 K5060
STRN 4 2 0 0 0
OUT
F A G A ENT
5 0 6 0
GX D ENT
OUT 3
RLL Instructions
Standard
Or If Equal The Or If Equal instruction connects a

(ORE) normally open comparative contact in
parallel with another contact. The
contact will be on when Vaaa = Bbbb. V aaa B bbb
Or If Not Equal The Or If Not Equal instruction connects

(ORNE) a normally closed comparative contact in
parallel with another contact. The
contact will be on when Vaaa Bbbb. V aaa B bbb
B aaa bbb
Constant K 09999
In the following example, when the value in V memory location V2000 = 4500 or
V2002 = 2345 , Y3 will energize.
$ SHFT E C A A A
V2000 K4500 Y3
STR 4 2 0 0 0
OUT
E F A A ENT
4 5 0 0
V2002 K2345 Q SHFT E C A A C

OR 4 2 0 0 2
C D E F ENT
2 3 4 5
GX D ENT
OUT 3
V2002 050, Y3 will energize.
$ SHFT E C A A A
V2000 K3916 Y3 STR 4 2 0 0 0
OUT D J B G ENT
3 9 1 6
V2002 K2500 R SHFT E C A A C

ORN 4 2 0 0 2
C F A A ENT
2 5 0 0
GX D ENT
OUT 3
RLL Instructions
Standard
And If Equal The And If Equal instruction connects a

(ANDE) normally open comparative contact in V aaa B bbb
series with another contact. The contact
will be on when Vaaa = Bbbb.
And If Not Equal The And If Not Equal instruction connects

(ANDNE) a normally closed comparative contact in V aaa B bbb
series with another contact. The contact
will be on when Vaaa Bbbb
A/B aaa bbb
Constant K 09999
In the following example, when the value in V memory location V2000 = 5000 and
V2002 = 2345, Y3 will energize.
V2000 K5000 V2002 K2345 Y3 $ SHFT E C A A A

STR 4 2 0 0 0
OUT
F A A A ENT
5 0 0 0
V SHFT E C A A C
AND 4 2 0 0 2
C D E F ENT
2 3 4 5
GX D ENT
OUT 3
V2000 K2550 V2002 K2500 Y3 $ SHFT E C A A A

STR 4 2 0 0 0
OUT
C F F A ENT
2 5 5 0
W SHFT E C A A C
ANDN 4 2 0 0 2
C F A A ENT
2 5 0 0
GX D ENT
RLL Instructions
OUT 3
Standard
Store The Comparative Store instruction

(STR) begins a new rung or additional branch in A aaa B bbb
a rung with a normally open comparative
Aaaa Bbbb.
Store Not The Comparative Store Not instruction

(STRN) begins a new rung or additional branch in A aaa B bbb
a rung with a normally closed
comparative contact. The contact will be
on when Aaaa < Bbbb.
A/B aaa bbb
Constant K 09999
Timer T 0177
Counter CT 0177
In the following example, when the value in V memory location V2000 1000, Y3
will energize.
V2000 K1000 Y3 $ SHFT V C A A A

STR AND 2 0 0 0
OUT
B A A A ENT
1 0 0 0
GX D ENT
OUT 3
In the following example, when the value in V memory location V2000 < 4050, Y3 will
energize.
V2000 K4050 Y3 SP SHFT V C A A A

STRN AND 2 0 0 0
OUT
E A F A ENT
4 0 5 0
GX D ENT
OUT 3
RLL Instructions
Standard
Or The Comparative Or instruction

(OR) connects a normally open comparative
contact in parallel with another contact.
The contact will be on when Aaaa A aaa B bbb
Bbbb.
Or Not The Comparative Or Not instruction

(ORN) connects a normally open comparative
The contact will be on when Aaaa < Bbbb. A aaa B bbb
A/B aaa bbb
Constant K 09999
Timer T 0177
Counter CT 0177
$ SHFT E C A A A
V2000 K6045 Y3 STR 4 2 0 0 0
OUT G A E F ENT
6 0 4 5
V2002 K2345 Q SHFT V C A A C

OR AND 2 0 0 2
C D E F ENT
2 3 4 5
GX D ENT
OUT 3
In the following example when the value in V memory location V2000 = 1000 or
V2002 < 050, Y3 will energize.
$ SHFT E C A A A
V2000 K1000 Y3 STR 4 2 0 0 0
OUT B A A A ENT
1 0 0 0
R SHFT V C A A C
V2002 K2500 ORN AND 2 0 0 2
C F A A ENT
2 5 0 0
GX D ENT
OUT 3
RLL Instructions
Standard
And The Comparative And instruction

(AND) connects a normally open comparative A aaa B bbb
contact in series with another contact.
The contact will be on when Aaaa
Bbbb.
And Not The Comparative And Not instruction

(ANDN) connects a normally open comparative A aaa B bbb
The contact will be on when Aaaa <
Bbbb.
A/B aaa bbb
Constant K 09999
Timer T 0177
Counter CT 0177
In the following example, when the value in V memory location V2000 = 5000, and
V2000 K5000 V2002 K2345 Y3 $ SHFT E C A A A

STR 4 2 0 0 0
OUT
F A A A ENT
5 0 0 0
V SHFT V C A A C
AND AND 2 0 0 2
C D E F ENT
2 3 4 5
GX D ENT
OUT 3
V2002 < 050, Y3 will energize.
$ SHFT E C A A A
V2000 K7000 V2002 K2500 Y3 STR 4 2 0 0 0
OUT H A A A ENT
7 0 0 0
W SHFT V C A A C
ANDN AND 2 0 0 2
C F A A ENT
2 5 0 0
GX SHFT Y D ENT
OUT AND 3
RLL Instructions
Standard
Store The Store Immediate instruction begins a

Immediate new rung or additional branch in a rung. X aaa
(STRI) The status of the contact will be the same
as the status of the associated input point
at the time the instruction is executed. The
image register is not updated.
Store Not The Store Not Immediate instruction

Immediate begins a new rung or additional branch in X aaa
(STRNI) a rung. The status of the contact will be
opposite the status of the associated input
point at the time the instruction is
executed. The image register is not
updated.
aaa
Inputs X 0377
In the following example, when X1 is on, Y2 will energize.

X1 Y2 $ SHFT I B ENT
STR 8 1
OUT
GX C ENT
OUT 2
In the following example when X1 is off, Y2 will energize.

X1 Y2 SP I B
SHFT ENT
STRN 8 1
OUT
GX C ENT
OUT 2
Or Immediate The Or Immediate connects two contacts

(ORI) in parallel. The status of the contact will be
the same as the status of the associated
X aaa
input point at the time the instruction is
executed. The image register is not
RLL Instructions
updated.
Standard
Or Not Immediate The Or Not Immediate connects two

(ORNI) contacts in parallel. The status of the
contact will be opposite the status of the
associated input point at the time the X aaa
instruction is executed. The image
register is not updated.
OR Immediate Operand Data Type DL05 Range
Instructions Contd aaa
Inputs X 0377

X1 Y5 $ B ENT
OUT STR 1
Q SHFT I C ENT
X2 OR 8 2
GX F ENT
OUT 5
In the following example, when X1 is on or X2 is off, Y5 will energize.

DirectSOFT
X1 Y5 $ B ENT
OUT STR 1
R SHFT I C ENT
X2 ORN 8 2
GX F ENT
OUT 5
And Immediate The And Immediate connects two

(ANDI) contacts in series. The status of the X aaa
contact will be the same as the status of
the associated input point at the time the
And Not Immediate The And Not Immediate connects two

(ANDNI) contacts in series. The status of the X aaa
contact will be opposite the status of the
associated input point at the time the
aaa
Inputs X 0377
In the following example, when X1 and X2 are on, Y5 will energize.

X1 X2 Y5 $ B ENT
OUT STR 1
V SHFT I C ENT
AND 8 2
RLL Instructions
GX F ENT
OUT 5
Standard
In the following example, when X1 is on and X2 are off, Y5 will energize.

X1 X2 Y5 $ B ENT
STR 1
OUT
W SHFT I C ENT
ANDN 8 2
GX F ENT
OUT 5
Out Immediate The Out Immediate instruction reflects the

(OUTI) status of the rung (on/off) and outputs the
discrete (on/off) status to the specified
Y aaa
module output point and the image register
OUTI
at the time the instruction is executed. If
multiple Out Immediate instructions
referencing the same discrete point are
used it is possible for the module output
status to change multiple times in a CPU
scan. See Or Out Immediate.
Or Out Immediate The Or Out Immediate instruction has

(OROUTI) been designed to use more than 1 rung of Y aaa
discrete logic to control a single output. OROUTI
Multiple Or Out Immediate instructions
referencing the same output coil may be
used, since all contacts controlling the
output are ored together. If the status of
any rung is on at the time the instruction is
executed, the output will also be on.
aaa
Outputs Y 0377
In the following example, when X1 is on, output point Y2 on the output module will
turn on. For instruction entry on the Handheld Programmer, you can use the
instruction number (#350) as shown, or type each letter of the command.
X1 Y2 $ B ENT
STR 1
OUTI
O D F A ENT ENT
INST# 3 5 0
C ENT
2

$ B ENT
X1 Y2
STR 1
OR OUTI O D F A ENT ENT
INST# 3 5 0
C ENT
X4 Y2 2
OR OUTI $ E ENT
RLL Instructions
STR 4
O D F A ENT ENT
Standard
INST# 3 5 0
C ENT
2
Set Immediate The Set Immediate instruction

(SETI) immediately sets, or turns on an output or Y aaa aaa
a range of outputs in the image register SETI
and the corresponding output point(s) at
the time the instruction is executed. Once
the outputs are set it is not necessary for
the input to remain on. The Reset
Immediate instruction can be used to
reset the outputs.
Reset The Reset Immediate instruction

Immediate immediately resets, or turns off an output Y aaa aaa
(RSTI) or a range of outputs in the image register RSTI
and the output point(s) at the time the
instruction is executed. Once the outputs
are reset it is not necessary for the input to
remain on.
aaa
Outputs Y 0377
In the following example, when X1 is on, Y2 through Y5 will be set on in the image
register and on the corresponding output points.
$ B ENT
X1 Y2 Y5 STR 1
SETI X I C F
SHFT ENT
SET 8 2 5
In the following example, when X1 is on, Y5 through Y22 will be reset (off) in the
image register and on the corresponding output module(s).
$ B ENT
X1 Y2 Y5 STR 1
RSTI S I C F
SHFT ENT
RST 8 2 5
RLL Instructions
Standard
Timer, Counter, and Shift Register Instructions
Timer, Counter and Shift Register Instructions

Using Timers Timers are used to time an event for a desired length of time. The single input timer
will time as long as the input is on. When the input changes from on to off the timer
current value is reset to 0. There is a tenth of a second and a hundredth of a second
timer available with a maximum time of 999.9 and 99.99 seconds respectively. There
is a discrete bit associated with each timer to indicate that the current value is equal
to or greater than the preset value. The timing diagram below shows the relationship
between the timer input, associated discrete bit, current value, and timer preset.
Seconds
0 1 2 3 4 5 6 7 8 X1
TMR T1
X1 K30
Timer preset
T1
T1 Y0
OUT
Current 0 10 20 30 40 50 60 0
Value 1/10 Seconds
There are those applications that need an accumulating timer, meaning it has the
ability to time, stop, and then resume from where it previously stopped. The
accumulating timer works similarly to the regular timer, but two inputs are required.
The start/stop input starts and stops the timer. When the timer stops, the elapsed
time is maintained. When the timer starts again, the timing continues from the
elapsed time. When the reset input is turned on, the elapsed time is cleared and the
timer will start at 0 when it is restarted. There is a tenth of a second and a hundredth
of a second timer available with a maximum time of 9999999.9 and 999999.99
seconds respectively. The timing diagram below shows the relationship between the
timer input, timer reset, associated discrete bit, current value, and timer preset.
Seconds
0 1 2 3 4 5 6 7 8 X1
TMRA T0
K30
X1 Start/Stop
X2
X2
Reset Input
T0
Current 0 10 10 20 30 40 50 0
Value 1/10 Seconds
RLL Instructions
Standard
Timer (TMR) and The Timer instruction is a 0.1 second single

Timer Fast (TMRF) input timer that times to a maximum of
999.9 seconds. The Timer Fast instruction
TMR T aaa
is a 0.01 second single input timer that
B bbb
times up to a maximum of 99.99 seconds.
These timers will be enabled if the input
logic is true (on) and will be reset to 0 if the Preset Timer #
input logic is false (off).
Instruction Specifications
Timer Reference (Taaa): Specifies the
timer number. TMRF T aaa
B bbb
Preset Value (Bbbb): Constant value (K)
or a V memory location.
Current Value: Timer current values are Preset Timer #
accessed by referencing the associated V
or T memory location*. For example, the
timer current value for T3 physically
resides in V-memory location V3.
Discrete Status Bit: The discrete status
bit is referenced by the associated T
memory location. Operating as a timer
done bit, it will be on if the current value is
The timer discrete status bit and the
equal to or greater than the preset value. current value are not specified in the timer
For example, the discrete status bit for instruction.
Timer 2 is TA2.
NOTE: Timer preset constants (K) may be changed by using a handheld

programmer, even when the CPU is in Run Mode. Therefore, a V-memory preset is
required only if the ladder program must change the preset.
A/B aaa bbb
Timers T 0177
V memory for preset 12007377

V
values 74007577
12007377
Pointers (preset only) P
74007577
Constants
K 09999
(preset only)
Timer discrete status

T/V 0177 or V4110041107
bits
Timer current values V /T* 0177
NOTE: * With the HPP, both the Timer discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
RLL Instructions
such as T2 for discrete status bit for Timer T2, and TA2 for the current value of
Standard
Timer T2.
You can perform functions when the timer reaches the specified preset using the
discrete status bit. Or, use comparative contacts to perform functions at different
time intervals, based on one timer. The examples on the following page show these
two methods of programming timers.
Timer Example In the following example, a single input timer is used with a preset of 3 seconds. The
Using Discrete timer discrete status bit (T2) will turn on when the timer has timed for 3 seconds. The
Status Bits timer is reset when X1 turns off, turning the discrete status bit off and resetting the
timer current value to 0.
DirectSOFT Timing Diagram
X1 Seconds
TMR T2 0 1 2 3 4 5 6 7 8
K30
X1
T2 Y0
OUT
T2
Y0
Current 0 10 20 30 40 50 60 0
$ B ENT Value
STR 1 1/10 Seconds
N C D A ENT
TMR 2 3 0
$ SHFT T C ENT
STR MLR 2
GX A ENT
OUT 0
Timer Example In the following example, a single input timer is used with a preset of 4.5 seconds.
Using Comparative Comparative contacts are used to energize Y3, Y4, and Y5 at one second intervals
Contacts respectively. When X1 is turned off the timer will be reset to 0 and the comparative
contacts will turn off Y3, Y4, and Y5.
X1 Seconds
TMR T20
K45 0 1 2 3 4 5 6 7 8
Y3 X1
TA20 K10
OUT
Y3
TA20 K20 Y4 Y4
OUT
Y5
TA20 K30 Y5
T2
OUT
Current 0 10 20 30 40 50 60 0
Value
1/10 Seconds
$ B ENT
STR 1
N C A E F ENT
TMR 2 0 4 5
$ SHFT T C A B A ENT
STR MLR 2 0 1 0
GX D ENT
OUT 3
RLL Instructions
$ SHFT T C A C A ENT
STR MLR 2 0 2 0
Standard
GX E ENT
OUT 4
$ SHFT T C A D A ENT
STR MLR 2 0 3 0
GX F ENT
OUT 5
Accumulating The Accumulating Timer is a 0.1 second

Timer (TMRA) two input timer that will time to a maximum Enable TMRA T aaa
of 9999999.9. The Accumulating Fast B bbb
Accumulating Fast Timer is a 0.01 second two-input timer that
will time to a maximum of 99999.99. Each Reset
Timer (TMRAF)
one uses two timer registers in V-memory.
These timers have two inputs, an enable
and a reset. The timer starts timing when Preset Timer #
the enable is on and stops when the
enable is off (without resetting the count).
The reset will reset the timer when on and
allow the timer to time when off.
Instruction Specifications Enable TMRAF T aaa
Timer Reference (Taaa): Specifies the B bbb
timer number. Reset
Current Value: Timer current values are Preset Timer #
accessed by referencing the associated V
or T memory location*. For example, the
timer current value for T3 resides in
V-memory location V3.
bit is accessed by referencing the
associated T memory location. Operating
The timer discrete status bit and the
as a timer done bit ,it will be on if the current value are not specified in the
current value is equal to or greater than timer instruction.
the preset value. For example the discrete
status bit for timer 2 would be T2.
NOTE: The accumulating type timer uses two consecutive V-memory locations
for the 8-digit value, and therefore two consecutive timer locations. For example, if
TMR 1 is used, the next available timer number is TMR 3.
A/B aaa bbb
Timers T 0176
V memory for preset 12007377

V
values 74007577
12007377
74007577
Constants
K 099999999
(preset only)
Timer discrete status

T/V 0176 or V4110041107
bits
Timer current values V /T* 0176

RLL Instructions
NOTE: * With the HPP, both the Timer discrete status bits and current value are
Standard
such as T2 for discrete status bit for Timer T2, and TA2 for the current value of
Timer T2.
The following examples show two methods of programming timers. One performs
functions when the timer reaches the preset value using the discrete status bit, or
use comparative contacts to perform functions at different time intervals.
Accumulating In the following example, a two input timer (accumulating timer) is used with a preset
Timer Example of 3 seconds. The timer discrete status bit (T6) will turn on when the timer has timed
using Discrete for 3 seconds. Notice in this example that the timer times for 1 second , stops for one
Status Bits second, then resumes timing. The timer will reset when C10 turns on, turning the
discrete status bit off and resetting the timer current value to 0.
X1 Seconds
0 1 2 3 4 5 6 7 8
TMRA T6
X1
K30
C10
C10
Y7 T6
T6
OUT Current 0 10 10 20 30 40 50 0
Value
1/10 Seconds
Handheld Programmer Keystrokes Handheld Programmer Keystrokes (cont)
$ B ENT D A ENT
STR 1 3 0
$ SHFT C B A ENT $ SHFT T G ENT
STR 2 1 0 STR MLR 6
N SHFT A G GX B A ENT
TMR 0 6 OUT 1 0
Accumulator Timer In the following example, a single input timer is used with a preset of 4.5 seconds.
Example Using Comparative contacts are used to energized Y3, Y4, and Y5 at one second intervals
Comparative respectively. The comparative contacts will turn off when the timer is reset.
Contacts
X1
Seconds
TMRA T20 0 1 2 3 4 5 6 7 8
K45 X1
C10
C10
TA20 K10 Y3 Y3
OUT
Y4
TA20 K20 Y4
Y5
OUT
T20
TA20 K30 Y5
Current 0 10 10 20 30 40 50 0
OUT Value
1/10 Seconds
$ B GX E ENT
ENT OUT 4
STR 1
$ C B A $ SHFT T C A
RLL Instructions
SHFT ENT STR MLR 2 0

STR 2 1 0
N A C A E F D A ENT
Standard
SHFT ENT 3 0
TMR 0 2 0 4 5
$ T C A B A GX F ENT
SHFT ENT OUT 5
STR MLR 2 0 1 0
GX D ENT
OUT 3
$ SHFT T C A C A ENT
STR MLR 2 0 2 0
Using Counters Counters are used to count events . The counters available are up counters,
up/down counters, and stage counters (used with RLL PLUS programming).
The up counter has two inputs, a count input and a reset input. The maximum count
value is 9999. The timing diagram below shows the relationship between the counter
input, counter reset, associated discrete bit, current value, and counter preset.
X1
CNT CT1
X1
Up K3
X2
X2
Reset
CT1
Current 1 2 3 4 0 Counter preset
Value Counts
The up down counter has three inputs, a count up input, count down input and reset
input. The maximum count value is 99999999. The timing diagram below shows the
relationship between the counter input, counter reset, associated discrete bit,
current value, and counter preset.
X1
X1 UDC CT2
Up K3
X2 X2
X3
Down
X3
CT2
Reset
Current 1 2 1 2 3 0
Value Counts
Counter preset
The stage counter has a count input and is reset by the RST instruction. This
instruction is useful when programming using the RLL PLUS structured programming.
The maximum count value is 9999. The timing diagram below shows the relationship
between the counter input, associated discrete bit, current value, counter preset and
reset instruction.
X1 X1
SGCNT CT2
Up K3
CT2
Current 1 2 3 4 0
Value Counts Counter preset
RST
RLL Instructions
CT2
Standard
Counter The Counter is a two input counter that

(CNT) increments when the count input logic
transitions from off to on. When the counter
reset input is on the counter resets to 0.
When the current value equals the preset Counter #
value, the counter status bit comes on and
the counter continues to count up to a Count CNT CT aaa
maximum count of 9999. The maximum B bbb
value will be held until the counter is reset.
Reset
Counter Reference (CTaaa): Specifies
the counter number. Preset
Current Values: Counter current values
are accessed by referencing the
associated V or CT memory locations*.
The V-memory location is the counter The counter discrete status bit and the
current value are not specified in the
location + 1000. For example, the counter counter instruction.
current value for CT3 resides in V memory
location V1003.
Discrete Status Bit: The discrete status bit is accessed by referencing the
associated CT memory location. It will be on if the value is equal to or greater than the
preset value. For example the discrete status bit for counter 2 would be CT2.
NOTE: Counter preset constants (K) may be changed by using a programming

device, even when the CPU is in Run Mode. Therefore, a V-memory preset is
required only if the ladder program must change the preset.
A/B aaa bbb
Counters CT 0177
V memory 12007377
V
(preset only) 74007577
12007377
74007577
Constants
K 09999
(preset only)
Counter discrete
CT/V 0177 or V4114041147
status bits
Counter current
V/CT* 0177
values
RLL Instructions
NOTE: * With the HPP, both the Counter discrete status bits and current value are
Standard
such as CT2 for discrete status bit for Counter CT2, and CTA2 for the current
value of Counter CT2.
Counter Example In the following example, when X1 makes an off to on transition, counter CT2 will
Using Discrete increment by one. When the current value reaches the preset value of 3, the counter
Status Bits status bit CT2 will turn on and energize Y7. When the reset C10 turns on, the counter
status bit will turn off and the current value will be 0. The current value for counter
CT2 will be held in V memory location V1002.
DirectSOFT Counting diagram
X1
CNT CT2
X1
K3
C10
C10
CT2 Y7 Y10
OUT Current 1 2 3 4 0
Value
$ B ENT $ SHFT C SHFT T C ENT

STR 1 STR 2 MLR 2
$ SHFT C B A ENT GX B A ENT
STR 2 1 0 OUT 1 0
GY C D ENT
CNT 2 3
Counter Example In the following example, when X1 makes an off to on transition, counter CT2 will
Using Comparative increment by one. Comparative contacts are used to energize Y3, Y4, and Y5 at
Contacts different counts. When the reset C10 turns on, the counter status bit will turn off and
the counter current value will be 0, and the comparative contacts will turn off.
X1
CNT CT2
X1
K3
C10
C10
CTA2 K1 Y3 Y3
OUT
Y4
CTA2 K2 Y4
Y5
OUT
Current 1 2 3 4 0
Value
CTA2 K3 Y5
OUT
$ B ENT $ SHFT C SHFT T C

STR 1 STR 2 MLR 2
RLL Instructions
$ SHFT C B A ENT C ENT

STR 2 1 0 2
Standard
GY C D ENT GX E ENT
CNT 2 3 OUT 4
$ SHFT C SHFT T C $ SHFT C SHFT T C
STR 2 MLR 2 STR 2 MLR 2
B ENT D ENT
1 3
GX D ENT GX F ENT
OUT 3 OUT 5
Stage Counter The Stage Counter is a single input counter

(SGCNT) that increments when the input logic Counter #
transitions from off to on. This counter
differs from other counters since it will hold SGCNT CT aaa
its current value until reset using the RST B bbb
instruction. The Stage Counter is designed
Preset
for use in RLL PLUS programs but can be
used in relay ladder logic programs. When
the current value equals the preset value, The counter discrete status bit and the
the counter status bit turns on and the current value are not specified in the
counter instruction.
counter continues to count up to a
maximum count of 9999. The maximum
value will be held until the counter is reset.
Counter Reference (CTaaa): Specifies
the counter number.
Current Values: Counter current values
are accessed by referencing the
associated V or CT memory locations*.
The V-memory location is the counter
location + 1000. For example, the counter
current value for CT3 resides in V memory
location V1003.
associated CT memory location. It will be
on if the value is equal to or greater than the
preset value. For example the discrete
status bit for counter 2 would be CT2.
A/B aaa bbb
Counters CT 0177
V memory 12007377
V
12007377
74007577
Constants
K 09999
(preset only)
Counter discrete
CT/V 0177 or V4114041147
status bits
Counter current
V/CT* 10001177
values
RLL Instructions
Standard
Stage Counter In the following example, when X1 makes an off to on transition, stage counter CT7
Example Using will increment by one. When the current value reaches 3, the counter status bit CT7
Discrete Status will turn on and energize Y7. The counter status bit CT7 will remain on until the
Bits counter is reset using the RST instruction. When the counter is reset, the counter
status bit will turn off and the counter current value will be 0. The current value for
counter CT7 will be held in V memory location V1007.
X1
SGCNT CT7
X1
K3
CT7 Y7 Y10
OUT Current 1 2 3 4 0
Value
C5 CT7 RST
RST CT7
$ B ENT GX B A ENT
STR 1 OUT 1 0
SHFT S SHFT G SHFT GY $ SHFT C F ENT

RST 6 CNT STR 2 5
H D ENT S SHFT C SHFT T H ENT
7 3 RST 2 MLR 7
$ SHFT C SHFT T H ENT
STR 2 MLR 7
Stage Counter In the following example, when X1 makes an off to on transition, counter CT2 will
Example Using increment by one. Comparative contacts are used to energize Y3, Y4, and Y5 at
Comparative different counts. Although this is not shown in the example, when the counter is reset
Contacts using the Reset instruction, the counter status bit will turn off and the current value
will be 0. The current value for counter CT2 will be held in V memory location V1002.
X1
SGCNT CT2
K10
X1
CT2 K1 Y3
Y3
OUT
Y4
CT2 K2 Y4
OUT
Y5
Y5 Current 1 2 3 4 0
CT2 K3 Value
OUT
$ B ENT $ SHFT C SHFT T C

STR 1 STR 2 MLR 2
RLL Instructions
SHFT S G SHFT GY C ENT

RST 6 CNT 2
Standard
C B A ENT GX E ENT
2 1 0 OUT 4
$ SHFT C SHFT T C $ SHFT C SHFT T C
STR 2 MLR 2 STR 2 MLR 2
B ENT D ENT
1 3
GX D ENT GX F ENT
OUT 3 OUT 5
Up Down Counter This Up/Down Counter counts up on each

(UDC) off to on transition of the Up input and Up UDC CT aaa
counts down on each off to on transition of B bbb
the Down input. The counter is reset to 0 Down
when the Reset input is on. The count Counter #
range is 099999999. The count input not
being used must be off in order for the Reset
Preset
active count input to function.
Instruction Specification
Counter Reference (CTaaa): Specifies Caution: The UDC uses two
the counter number. V memory locations for the 8 digit
Preset Value (Bbbb): Constant value (K) current value. This means that the
or two consecutive V memory locations. UDC uses two consecutive
Current Values: Current count is a double counter locations. If UDC CT1 is
word value accessed by referencing the used in the program, the next
associated V or CT memory locations*. available counter is CT3.
The V-memory location is the counter The counter discrete status bit and the
location + 1000. For example, the counter current value are not specified in the
current value for CT5 resides in V memory counter instruction.
location V1005 and V1006.
associated CT memory location.
Operating as a counter done bit it will be
on if the value is equal to or greater than the
preset value. For example the discrete
status bit for counter 2 would be CT2.
A/B aaa bbb
Counters CT 0176
V memory 12007377
V
12007377
74007577
Constants
K 099999999
(preset only)
Counter discrete
CT/V 0176 or V4114041147
status bits
Counter current
V/CT* 0176
values
RLL Instructions
Standard

Up / Down Counter In the following example if X2 and X3 are off ,when X1 toggles from off to on the
Example Using counter will increment by one. If X1 and X3 are off the counter will decrement by one
Discrete Status when X2 toggles from off to on. When the count value reaches the preset value of 3,
Bits the counter status bit will turn on. When the reset X3 turns on, the counter status bit
will turn off and the current value will be 0.
DirectSOFT Counting Diagram
X1
UDC CT2
K3 X1
X2
X2
X3
X3
CT2
CT2 Y7
Current 1 2 1 2 3 0
OUT Value
$ B ENT D ENT
STR 1 3
$ C ENT $ SHFT C SHFT T C ENT
STR 2 STR 2 MLR 2
$ D ENT GX B A ENT
STR 3 OUT 1 0
SHFT U D C C
ISG 3 2 2
Up / Down Counter In the following example, when X1 makes an off to on transition, counter CT2 will
Example Using increment by one. Comparative contacts are used to energize Y3 and Y4 at different
Comparative counts. When the reset (X3) turns on, the counter status bit will turn off, the current
Contacts value will be 0, and the comparative contacts will turn off.
DirectSOFT Counting Diagram
X1
UDC CT2
V2000 X1
X2
X2
X3
X3
CTA2 K1 Y3 Y3
OUT
Y4
CTA2 K2 Y4 1 2 3 4 0
Current
Value
OUT
$ B ENT B ENT
STR 1 1
RLL Instructions
$ C ENT GX D ENT
STR 2 OUT 3
Standard
$ D ENT $ SHFT C SHFT T C

STR 3 STR 2 MLR 2
SHFT U D C C C ENT
ISG 3 2 2 2
SHFT V C A A A ENT GX E ENT

AND 2 0 0 0 OUT 4
$ SHFT C SHFT T C
STR 2 MLR 2
Shift Register The Shift Register instruction shifts data

(SR) through a predefined number of control
relays. The control ranges in the shift
register block must start at the beginning
of an 8 bit boundary use 8-bit blocks.
DATA SR
The Shift Register has three contacts.
S Data determines the value (1 or From A aaa
0) that will enter the register CLOCK
S Clock shifts the bits one position To B bbb

on each low to high transition RESET
S Reset resets the Shift Register to
all zeros.
With each off to on transition of the clock input, the bits which make up the shift
register block are shifted by one bit position and the status of the data input is placed
into the starting bit position in the shift register. The direction of the shift depends on
the entry in the From and To fields. From C0 to C17 would define a block of sixteen
bits to be shifted from left to right. From C17 to C0 would define a block of sixteen
bits, to be shifted from right to left. The maximum size of the shift register block
depends on the number of available control relays. The minimum block size is 8
control relays.
A/B aaa bbb
Control Relay C 0777 0777
X1 $ B ENT
Data Input SR STR 1
$ C ENT
STR 2
From C0
X2 $ D
Clock Input ENT
STR 3
SHFT S SHFT R SHFT A

To C17 RST ORN 0
X3
Reset Input
B H ENT
1 7
Inputs on Successive Scans Shift Register Bits

Data Clock Reset
C0 C17
1 0-1-0 0
0 0-1-0 0
RLL Instructions
0 0-1-0 0
Standard
1 0-1-0 0
0 0-1-0 0
0 0 1
- indicates on - indicates off

Using the The accumulator in the DL05 internal CPUs is a 32 bit register which is used as a
Accumulator temporary storage location for data that is being copied or manipulated in some
manor. For example, you have to use the accumulator to perform math operations
such as add, subtract, multiply, etc. Since there are 32 bits, you can use up to an
8-digit BCD number. The accumulator is reset to 0 at the end of every CPU scan.
Copying Data to The Load and Out instructions and their variations are used to copy data from a
the Accumulator V-memory location to the accumulator, or, to copy data from the accumulator to V
memory. The following example copies data from V-memory location V2000 to
V-memory location V2010.
V2000
X1 LD 8 9 3 5
V2000
Unused accumulator bits
Copy data from V2000 to the
are set to zero
lower 16 bits of the accumu-
lator
Acc. 0 0 0 0 8 9 3 5
OUT
V2010 8 9 3 5
Copy data from the lower 16 bits V2010

of the accumulator to V2010
Since the accumulator is 32 bits and V memory locations are 16 bits the Load Double
and Out Double (or variations thereof) use two consecutive V-memory locations or 8
digit BCD constants to copy data either to the accumulator from a V-memory
address or from a V-memory address to the accumulator. For example if you wanted
to copy data from V2000 and V2001 to V2010 and V2011 the most efficient way to
perform this function would be as follows:
X1
LDD V2001 V2000
V2000 6 7 3 9 5 0 2 6
Copy data from V2000 and

V2001 to the accumulator
Acc. 6 7 3 9 5 0 2 6
OUTD
V2010 6 7 3 9 5 0 2 6
Copy data from the accumulator to
V2010 and V2011 V2011 V2010
RLL Instructions
Standard
Changing the Instructions that manipulate data also use the accumulator. The result of the
Accumulator Data manipulated data resides in the accumulator. The data that was being manipulated
is cleared from the accumulator. The following example loads the constant value
4935 into the accumulator, shifts the data right 4 bits, and outputs the result to
V2010.
X1 LD Constant 4 9 3 5
K4935
Load the value 4935 into the

accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 1 0 1
The upper 16 bits of the accumulator

will be set to 0
S S S S Shifted out of
accumulator
SHFR 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
K4 Acc. 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 1
Shift the data in the accumulator

4 bits (K4) to the right
OUT
V2010
0 4 9 3
Output the lower 16 bits of the ac-
cumulator to V2010 V2010
Some of the data manipulation instructions use 32 bits. They use two consecutive V
memory locations or an 8 digit BCD constant to manipulate data in the accumulator.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is added with the value in V2006 and V2007 using the Add Double
instruction. The value in the accumulator is copied to V2010 and V2011 using the
Out Double instruction.
V2001 V2000
X1
LDD 6 7 3 9 5 0 2 6
V2000
Load the value in V2000 and

V2001 into the accumulator
6 7 3 9 5 0 2 6 (Accumulator)
ADDD
+ 2 0 0 0 4 0 4 6 (V2006 and V2007)
V2006
Acc. 8 7 3 9 9 0 7 2
Add the value in the
accumulator with the value
in V2006 and V2007
OUTD
V2010 8 7 3 9 9 0 7 2
RLL Instructions
Copy the value in the V2011 V2010

Standard
accumulator to V2010 and

V2011
Using the The accumulator stack is used for instructions that require more than one parameter
Accumulator Stack to execute a function or for user defined functionality. The accumulator stack is used
when more than one Load instruction is executed without the use of an Out
instruction. The first load instruction in the scan places a value into the accumulator.
Every Load instruction thereafter without the use of an Out instruction places a value
into the accumulator and the value that was in the accumulator is placed onto the
accumulator stack. The Out instruction nullifies the previous load instruction and
does not place the value that was in the accumulator onto the accumulator stack
when the next load instruction is executed. Every time a value is placed onto the
accumulator stack the other values in the stack are pushed down one location. The
accumulator is eight levels deep (eight 32 bit registers). If there is a value in the
eighth location when a new value is placed onto the stack, the value in the eighth
location is pushed off the stack and cannot be recovered.
X1 LD Constant 3 2 4 5
K3245
Current Acc. value
Accumulator Stack
Load the value 3245 into the accumu- Acc. 0 0 0 0 3 2 4 5
lator Level 1 X X X X X X X X
Previous Acc. value
Level 2 X X X X X X X X
Acc. X X X X X X X X
Constant 5 1 5 1 Level 7 X X X X X X X X
LD
K5151 Level 8 X X X X X X X X
Current Acc. value
Load the value 5151 into the accumu- Acc. 0 0 0 0 5 1 5 1

lator, pushing the value 3245 onto the Bucket
Previous Acc. value Accumulator Stack
stack
Acc. 0 0 0 0 3 2 4 5 Level 1 0 0 0 0 3 2 4 5
6 3 6 3 Level 7 X X X X X X X X
LD Constant
K6363 Current Acc. value
Acc. 0 0 0 0 6 3 6 3
Load the value 6363 into the accumu- Bucket
lator, pushing the value 5151 to the 1st Previous Acc. value Accumulator Stack
stack location and the value 3245 to
the 2nd stack location Acc. 0 0 0 0 5 1 5 1 Level 1 0 0 0 0 5 1 5 1
Level 2 0 0 0 0 3 2 4 5
RLL Instructions
Bucket
Standard
The POP instruction rotates values upward through the stack into the accumulator.
When a POP is executed the value which was in the accumulator is cleared and the
value that was on top of the stack is in the accumulator. The values in the stack are
shifted up one position in the stack.
X1 POP Previous Acc. value
Current Acc. value Accumulator Stack

POP the 1st value on the stack into the
accumulator and move stack values 0 0 0 0 3 7 9 2
Acc. 0 0 0 0 4 5 4 5 Level 1
up one location
Level 2 0 0 0 0 7 9 3 0
OUT
V2000 4 5 4 5 Level 6 X X X X X X X X
V2000
Copy data from the accumulator to Level 8 X X X X X X X X
V2000
POP Previous Acc. value
Acc. 0 0 0 0 4 5 4 5

accumulator and move stack values Acc. 0 0 0 0 3 7 9 2 Level 1 0 0 0 0 7 9 3 0
up one location
OUT
V2001 3 7 9 2 Level 6 X X X X X X X X
V2001
V2001.
Previous Acc. value

POP
Acc. 0 0 0 0 3 7 9 2

Acc. X X X X 7 9 3 0 Level 1 X X X X X X X X
accumulator and move stack values
up one location Level 2 X X X X X X X X
OUT 7 9 3 0
V2002 Level 6 X X X X X X X X
V2002
V2002
Using Pointers Many of the DL05 series instructions will allow V-memory pointers as a operand
(commonly known as indirect addressing). Pointers allow instructions to obtain data
from V-memory locations referenced by the pointer value.
NOTE: DL05 V-memory addressing is in octal. However, the pointers reference a

V-memory location with values viewed as HEX. Use the Load Address (LDA)
instruction to move an address into the pointer location. This instruction performs the
Octal to Hexadecimal conversion automatically.
RLL Instructions
Standard
In the following simple example we are using a pointer operand in a Load instruction.
V-memory location 2000 is being used as the pointer location. V2000 contains the
value 440 which the CPU views as the Hex equivalent of the Octal address
V-memory location V2100. The CPU will copy the data from V2100 which in this
example contains the value 2635 into the lower word of the accumulator.
X1 V2076 X X X X
LD
V2077 X X X X
P2000
V2100 2 6 3 5
V1400 (P1400) contains the value 440 V2101 X X X X
HEX. 440 HEX. = 2100 Octal which
contains the value 2635. V2102 X X X X
V2000 V2103 X X X X
Accumulator
0 4 4 0 V2104 X X X X
2 6 3 5
V2105 X X X X
OUT
V2200 S
S
Copy the data from the lower 16 bits of
the accumulator to V2200. V2200 2 6 3 5
V2201 X X X X
The following example is identical to the one above with one exception. The LDA
(Load Address) instruction automatically converts the Octal address to Hex.
X1 LDA Load the lower 16 bits of the
accumulator with Hexadecimal
O 2100 equivalent to Octal 2100 (440) 2 1 0 0
2100 Octal is converted to Hexadecimal

Unused accumulator bits 440 and loaded into the accumulator
are set to zero
Acc. 0 0 0 0 0 4 4 0
OUT Copy the data from the lower 16 bits of

the accumulator to V2000 0 4 4 0
V 2000
V2000
S
S
V2076 X X X X
V2077 X X X X
V2000 (P2000) contains the value 440 V2100 2 6 3 5

LD
Hex. 440 Hex. = 2100 Octal which V2101 X X X X
P 2000 contains the value 2635
V2102 X X X X
V2100 V2103 X X X X
Accumulator
0 4 4 0 V2104 X X X X
V2105 X X X X 0 0 0 0 2 6 3 5
S
S
OUT Copy the data from the lower 16 bits of
the accumulator to V2200 V2200 2 6 3 5
V 2200
V2201 X X X X
RLL Instructions
Standard
Load The Load instruction is a 16 bit instruction

(LD) that loads the value (Aaaa), which is either
a V memory location or a 4 digit constant, LD
into the lower 16 bits of the accumulator. A aaa
The upper 16 bits of the accumulator are
set to 0.
A aaa
V memory V All (See page 428)
Pointer P All V mem. (See page 428)
Constant K 0FFFF
Discrete Bit Flags Description
SP53 on when the pointer is outside of the available range.
SP70 on when the value loaded into the accumulator by any instruction is zero.
SP76 on when the result in the accumulator is negative.
NOTE: Two consecutive Load instructions will place the value of the first load
instruction onto the accumulator stack.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator and output to V2010.
DirectSOFT
V2000
X1 LD 8 9 3 5
V2000
Load the value in V2000 into The unused accumulator

the lower 16 bits of the bits are set to zero
accumulator
Acc. 0 0 0 0 8 9 3 5
OUT
V2010
Copy the value in the lower 8 9 3 5

16 bits of the accumulator to
V2010 V2010
$ B X
STR 1 SET
SHFT L D
ANDST 3
C A A A ENT
2 0 0 0
GX SHFT V C A B A ENT
RLL Instructions
OUT AND 2 0 1 0
Standard
Load Double The Load Double instruction is a 32 bit

(LDD ) instruction that loads the value (Aaaa),
which is either two consecutive V memory LDD
locations or an 8 digit constant value, into A aaa
the accumulator.
A aaa
Constant K 0FFFFFFFF
In the following example, when X1 is on, the 32 bit value in V2000 and V2001 will be
loaded into the accumulator and output to V2010 and V2011.
DirectSOFT
X1 LDD V2001 V2000
V2000 6 7 3 9 5 0 2 6

V2001 into the 32 bit
accumulator
Acc. 6 7 3 9 5 0 2 6
6 7 3 9 5 0 2 6
OUTD
V2010 V2011 V2010
Copy the value in the 32 bit

V2011
$ B ENT
STR 1
SHFT L D D
ANDST 3 3
C A A A ENT
2 0 0 0
RLL Instructions
GX SHFT D
OUT 3
Standard
C A B A ENT
2 0 1 0
Load The Load Formatted instruction loads

Formatted 132 consecutive bits from discrete
(LDF) memory locations into the accumulator. LDF A aaa
The instruction requires a starting location K bbb
(Aaaa) and the number of bits (Kbbb) to be
loaded. Unused accumulator bit locations
are set to zero.
A aaa bbb
Inputs X 0377
Outputs Y 0377
Stage Bits S 0377
Timer Bits T 0177
Counter Bits CT 0177
Special Relays SP 0777
Constant K 132
In the following example, when C0 is on, the binary pattern of C10C16 (7 bits) will
be loaded into the accumulator using the Load Formatted instruction. The lower 7
bits of the accumulator are output to Y0Y6 using the Out Formatted instruction.
DirectSOFT
C0 Location Constant
LDF C10 C16 C15 C14 C13 C12 C11 C10
K7 C10 K7 OFF OFF OFF ON ON ON OFF
Load the status of 7

consecutive bits (C10C16) The unused accumulator bits are set to zero
into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0
OUTF Y0
K7
Location Constant Y6 Y5 Y4 Y3 Y2 Y1 Y0
Copy the value from the
specified number of bits in Y0 K7 OFF OFF OFF ON ON ON OFF
the accumulator to Y0 Y6
RLL Instructions

Standard
$ SHFT C A ENT
STR 2 0
SHFT L D F
ANDST 3 5
SHFT C B A H ENT
2 1 0 7
GX SHFT F
OUT 5
A H ENT
0 7
Load Address The Load Address instruction is a 16 bit

(LDA) instruction. It converts any octal value or
address to the HEX equivalent value and LDA
loads the HEX value into the accumulator. O aaa
This instruction is useful when an address
parameter is required since all addresses
for the DL05 system are in octal.
aaa
Octal Address O All V mem. (See page 428)
In the following example when X1 is on, the octal number 40400 will be converted to
a HEX 4100 and loaded into the accumulator using the Load Address instruction.
The value in the lower 16 bits of the accumulator is copied to V2000 using the Out
instruction.
DirectSOFT
X1 LDA Octal Hexadecimal
O 40400 4 0 4 0 0 4 1 0 0
Load The HEX equivalent to

the octal number into the The unused accumulator
lower 16 bits of the bits are set to zero
accumulator
Acc. 0 0 0 0 4 1 0 0
4 1 0 0
OUT
V2000 V2000
Copy the value in lower 16

bits of the accumulator to
V2000
$ B ENT
STR 1
SHFT L D A
ANDST 3 0
E A E A A ENT
4 0 4 0 0
RLL Instructions
GX SHFT V C A A A ENT
OUT AND 2 0 0 0
Standard
Out The Out instruction is a 16 bit instruction

(OUT) that copies the value in the lower 16 bits of
the accumulator to a specified V memory OUT
location (Aaaa). A aaa
A aaa
lower 16 bits of the accumulator using the Load instruction. The value in the lower 16
bits of the accumulator are copied to V2010 using the Out instruction.
X1 LD V2000 $ B ENT
8 9 3 5 STR 1
V2000
SHFT L D
Load the value in V2000 into ANDST 3
the lower 16 bits of the The unused accumulator
accumulator bits are set to zero C A A A ENT
2 0 0 0
Acc. 0 0 0 0 8 9 3 5
OUT GX SHFT V C A B A ENT
OUT AND 2 0 1 0
V2010
Copy the value in the lower

16 bits of the accumulator to 8 9 3 5
V2010
V2010
Out Double The Out Double instruction is a 32 bit

(OUTD) instruction that copies the value in the OUTD
accumulator to two consecutive V memory A aaa
locations at a specified starting location
(Aaaa).
A aaa
In the following example, when X1 is on, the 32 bit value in V2000 and V2001 will be
loaded into the accumulator using the Load Double instruction. The value in the
accumulator is output to V2010 and V2011 using the Out Double instruction.
DirectSOFT V2001 V2000 Handheld Programmer Keystrokes
RLL Instructions
6 7 3 9 5 0 2 6
X1 $ B ENT
LDD STR 1
Standard
V2000
SHFT L D D
Load the value in V2000 and ANDST 3 3
V2001 into the accumulator Acc. 6 7 3 9 5 0 2 6
C A A A ENT
2 0 0 0
OUTD
GX SHFT D
V2010 OUT 3
Copy the value in the 6 7 3 9 5 0 2 6 C A B A ENT
accumulator to V2010 and 2 0 1 0
V2011 V2011 V2010
Out The Out Formatted instruction outputs

Formatted 132 bits from the accumulator to the
(OUTF) specified discrete memory locations. The OUTF A aaa
instruction requires a starting location K bbb
(Aaaa) for the destination and the number
of bits (Kbbb) to be output.
A aaa bbb
Inputs X 0377
Outputs Y 0377
Constant K 132
In the following example, when C0 is on, the binary pattern of C10C16 (7 bits) will
be loaded into the accumulator using the Load Formatted instruction. The lower 7
bits of the accumulator are output to Y0Y6 using the Out Formatted instruction.
DirectSOFT
C0 Location Constant
LDF C10 C16 C15 C14 C13 C12 C11 C10
K7 C10 K7 OFF OFF OFF ON ON ON OFF
Load the status of 7

consecutive bits (C10C16) The unused accumulator bits are set to zero
into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0
OUTF Y0
Accumulator
K7
Copy the value of the

specified number of bits
from the accumulator to
Y20Y26 Location Constant Y26 Y25 Y24 Y23 Y22 Y21 Y20
Y0 K7 OFF OFF OFF ON ON ON OFF
$ SHFT C A ENT
STR 2 0
SHFT L D F
ANDST 3 5
SHFT C B A H ENT
2 1 0 7
GX SHFT F
OUT 5
A H ENT
0 7
Pop The Pop instruction moves the value from

(POP) the first level of the accumulator stack (32
bits) to the accumulator and shifts each POP
value in the stack up one level.
RLL Instructions
Standard
SP63 on when the result of the instruction causes the value in the accumulator
to be zero.
Pop Instruction In the example below, when C0 is on, the value 4545 that was on top of the stack is
Continued moved into the accumulator using the Pop instruction The value is output to V2000
using the Out instruction. The next Pop moves the value 3792 into the accumulator
and outputs the value to V2001. The last Pop moves the value 7930 into the
accumulator and outputs the value to V2002. Please note if the value in the stack
were greater than 16 bits (4 digits) the Out Double instruction would be used and 2 V
memory locations for each Out Double must be allocated.
DirectSOFT
Previous Acc. value
C0 POP

Pop the 1st. value on the stack into the
Acc. 0 0 0 0 4 5 4 5 Level 1 0 0 0 0 3 7 9 2
up one location Level 2 0 0 0 0 7 9 3 0
OUT Level 4 X X X X X X X X
V2000 4 5 4 5 Level 6 X X X X X X X X
Copy the value in the lower 16 bits of
the accumulator to V2000 Level 7 X X X X X X X X
POP
Previous Acc. value
Acc. 0 0 0 0 4 5 4 5
Pop the 1st. value on the stack into the
accumulator and move stack values Current Acc. value Accumulator Stack
up one location
Acc. 0 0 0 0 3 7 9 2 Level 1 0 0 0 0 7 9 3 0
OUT Level 3 X X X X X X X X
V2001
Copy the value in the lower 16 bits of Level 5 X X X X X X X X

the accumulator to V2001 V2001 3 7 9 2 Level 6 X X X X X X X X
POP Level 8 X X X X X X X X
Pop the 1st. value on the stack into the Previous Acc. value
up one location Acc. 0 0 0 0 3 7 9 2
OUT Acc. 0 0 0 0 7 9 3 0 Level 1 X X X X X X X X

Copy the value in the lower 16 bits of
the accumulator to V2002 Level 4 X X X X X X X X
V2002 7 9 3 0 Level 6 X X X X X X X X
$ C A
SHFT ENT Level 8 X X X X X X X X
STR 2 0
SHFT P SHFT O P ENT

CV INST# CV
GX SHFT V C A A A ENT
OUT AND 2 0 0 0
SHFT P SHFT O P ENT

RLL Instructions
CV INST# CV
GX SHFT V C A A B ENT
Standard
OUT AND 2 0 0 1
SHFT P SHFT O P ENT

CV INST# CV
GX SHFT V C A A C ENT
OUT AND 2 0 0 2
Accumulator Logic Instructions
Logical Instructions (Accumulator)
And The And instruction is a 16 bit instruction

(AND) that logically ands the value in the lower
16 bits of the accumulator with a AND
specified V memory location (Aaaa). The A aaa
result resides in the accumulator. The
discrete status flag indicates if the result
of the And is zero.
A aaa
Pointer P All (See page 428)
SP63 Will be on if the result in the accumulator is zero
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
accumulator using the Load instruction. The value in the accumulator is anded
with the value in V2006 using the And instruction. The value in the lower 16 bits of the
accumulator is output to V2010 using the Out instruction.
DirectSOFT
X1 V2000
LD
2 8 7 A
V2000
Load the value in V2000 into The upper 16 bits of the accumulator
the lower 16 bits of the will be set to 0
accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
AND
V2006 Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
AND the value in the 6A38

accumulator with AND (V2006) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
the value in V2006
Acc. 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0
OUT
V2010
2 8 3 8
Copy the lower 16 bits of the
RLL Instructions
accumulator to V2010 V2010

Standard
$ B ENT
STR 1
SHFT L D C A A A ENT
ANDST 3 2 0 0 0
V SHFT V C A A G ENT
AND AND 2 0 0 6
OUT AND 2 0 1 0
And Double The And Double is a 32 bit instruction that

(ANDD) logically ands the value in the
accumulator with two consecutive V ANDD
memory locations or an 8 digit (max.) K aaa
constant value (Aaaa). The result
resides in the accumulator. Discrete
status flags indicate if the result of the
And Double is zero or a negative number
(the most significant bit is on).
aaa
SP70 Will be on is the result in the accumulator is negative
flags is executed.
accumulator is anded with 36476A38 using the And double instruction. The value in
the accumulator is output to V2010 and V2011 using the Out Double instruction.
DirectSOFT V2001 V2000
X1 LDD 5 4 7 E 2 8 7 A
V2000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
ANDD
K36476A38 Acc. 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
AND the value in the

accumulator with AND 36476A38 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
the constant value
36476A38 Acc. 0 0 0 0
1 0 1 0 0 0 0
1 0 0 0 0
1 0
1 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0
OUTD
V2010 1 4 4 6 2 8 3 8

V2011
RLL Instructions
Standard

$ B ENT
STR 1
SHFT L D D C A A A ENT
ANDST 3 3 2 0 0 0
V SHFT D SHFT K D G E H G SHFT A SHFT D I ENT
AND 3 JMP 3 6 4 7 6 0 3 8
GX SHFT D C A B A ENT
OUT 3 2 0 1 0
Or The Or instruction is a 16 bit instruction

(OR) that logically ors the value in the lower 16
bits of the accumulator with a specified V OR
memory location (Aaaa). The result A aaa
resides in the accumulator. The discrete
status flag indicates if the result of the Or
is zero.
A aaa
flags is executed.
accumulator using the Load instruction. The value in the accumulator is ored with
V2006 using the Or instruction. The value in the lower 16 bits of the accumulator are
output to V2010 using the Out instruction.
DirectSOFT
X1 V2000
LD
2 8 7 A
V2000
accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
OR
V2006 Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
Or the value in the 6A38

accumulator with OR (V2006) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
the value in V2006
Acc. 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 1 1 1 1 0 1 0
OUT
V2010
6 A 7 A
16 bits of the accumulator to V2010
V2010
$ B ENT
STR 1
RLL Instructions
ANDST 3 2 0 0 0
Standard
Q SHFT V C A A G ENT
OR AND 2 0 0 6
OUT AND 2 0 1 0
Or Double The Or Double is a 32 bit instruction that

(ORD) ors the value in the accumulator with the
value (Aaaa), which is either two ORD
consecutive V memory locations or an 8 K aaa
digit (max.) constant value. The result
resides in the accumulator. Discrete
status flags indicate if the result of the Or
Double is zero or a negative number (the
most significant bit is on).
aaa
flags is executed.
accumulator is ored with 36476A38 using the Or Double instruction. The value in the
accumulator is output to V2010 and V2011 using the Out Double instruction.
DirectSOFT
X1 V2001 V2000
LDD
5 4 7 E 2 8 7 A
V2000

V2001 into accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
ORD
K36476A38 Acc. 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
OR the value in the

accumulator with OR 36476A38 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
the constant value
36476A38 Acc. 0 0
1 0
1 0
1 0 1 0
1 0 0 0
1 0
1 0
1 0
1 0
1 0
1 0
1 0 1 1 0 1 0 1 0 0 1 1 1 1 0 1 0
OUTD
V2010
7 6 7 F 6 A 7 A
Copy the value in the
RLL Instructions
accumulator to V2010 and V2011 V2010

V2011
Standard
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
Q SHFT D SHFT K D G E H G SHFT A SHFT D I ENT
OR 3 JMP 3 6 4 7 6 0 3 8
OUT 3 2 0 1 0
Exclusive Or The Exclusive Or instruction is a 16 bit

(XOR) instruction that performs an exclusive or
of the value in the lower 16 bits of the XOR
accumulator and a specified V memory A aaa
location (Aaaa). The result resides in the
in the accumulator. The discrete status
flag indicates if the result of the XOR is
zero.
A aaa
flags is executed.
accumulator using the Load instruction. The value in the accumulator is exclusive
ored with V2006 using the Exclusive Or instruction. The value in the lower 16 bits of
the accumulator are output to V2010 using the Out instruction.
DirectSOFT
X1 V2000
LD
2 8 7 A
V2000
accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
XOR
V2006 Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
XOR the value in the 6A38

accumulator with XOR (V2006) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
the value in V2006
Acc. 0 0 0 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0
OUT
V2010
4 2 4 2
Copy the lower 16 bits of the
accumulator to V2010 V2010

RLL Instructions
$ SHFT X B ENT
STR SET 1
Standard
SHFT L D SHFT V C A A A ENT

ANDST 3 AND 2 0 0 0
SHFT X SHFT Q SHFT V C A A G ENT

SET OR AND 2 0 0 6
OUT AND 2 0 1 0
Exclusive Or The Exclusive OR Double is a 32 bit

Double instruction that performs an exclusive or
(XORD) of the value in the accumulator and the XORD
value (Aaaa), which is either two K aaa
consecutive V memory locations or an 8
digit (max.) constant. The result resides
in the accumulator. Discrete status flags
indicate if the result of the Exclusive Or
Double is zero or a negative number (the
most significant bit is on).
A aaa
flags is executed.
accumulator is exclusively ored with 36476A38 using the Exclusive Or Double
instruction. The value in the accumulator is output to V2010 and V2011 using the Out
Double instruction.
X1 LDD 5 4 7 E 2 8 7 A
V2000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
XORD Acc. 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0
K36476A38
XORD the value in the 0 1 0 1 0 1 0 0 0 1 1 1 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 1 1 0 1 0

Acc.
accumulator with
the constant value
36476A38 XORD 36476A38 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 1 0 1 0 1 0 0 0 1 1 1 0 0 0
OUTD Acc. 0 0
1 0
1 0 0 1
0 0
1 0 0 0 0
1 0
1 0
1 0 0 0
1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 1 0
V2010

accumulator to V2010
and V2011 6 2 3 9 4 2 4 2
RLL Instructions
Handheld Programmer Keystrokes V2011 V2010

Standard
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT X Q SHFT D SHFT K

SET OR 3 JMP
D G E H G SHFT A SHFT D I ENT
3 6 4 7 6 0 3 8
OUT 3 2 0 1 0
Compare The compare instruction is a 16 bit

(CMP) instruction that compares the value in the
lower 16 bits of the accumulator with the CMP
value in a specified V memory location A aaa
(Aaaa). The corresponding status flag
will be turned on indicating the result of
the comparison.
A aaa
SP60 On when the value in the accumulator is less than the instruction value.
SP61 On when the value in the accumulator is equal to the instruction value.
SP62 On when the value in the accumulator is greater than the instruction
value.
flags is executed.
In the following example when X1 is on, the constant 4526 will be loaded into the
lower 16 bits of the accumulator using the Load instruction. The value in the
accumulator is compared with the value in V2000 using the Compare instruction.
The corresponding discrete status flag will be turned on indicating the result of the
comparison. In this example, if the value in the accumulator is less than the value
specified in the Compare instruction, SP60 will turn on energizing C30.
DirectSOFT
X1 LD Constant
K4526 4 5 2 6
Load the constant value The unused accumulator

4526 into the lower 16 bits of bits are set to zero
the accumulator
Acc. 0 0 0 0 4 5 2 6
Compared
with
CMP
V2000
8 9 4 5
Compare the value in the
accumulator with the value V2000
in V2000
SP60 C30
RLL Instructions

Standard
$ B ENT
STR 1
SHFT L D SHFT K E F C G ENT

ANDST 3 JMP 4 5 2 6
SHFT C SHFT M P C A A A ENT

2 ORST CV 2 0 0 0
$ SHFT SP G A ENT
STR STRN 6 0
GX SHFT C D A ENT
OUT 2 3 0
Compare Double The Compare Double instruction is a

(CMPD) 32bit instruction that compares the
value in the accumulator with the value CMPD
(Aaaa), which is either two consecutive V A aaa
memory locations or an 8digit (max.)
constant. The corresponding status flag
will be turned on indicating the result of
the comparison.
A aaa
SP60 On when the value in the accumulator is less than the instruction value.
SP61 On when the value in the accumulator is equal to the instruction value.
SP62 On when the value in the accumulator is greater than the instruction
value.
flags is executed.
In the following example when X1 is on, the value in V2000 and V2001 will be loaded
accumulator is compared with the value in V2010 and V2011 using the CMPD
instruction. The corresponding discrete status flag will be turned on indicating the
result of the comparison. In this example, if the value in the accumulator is less than
the value specified in the Compare instruction, SP60 will turn on energizing C30.
DirectSOFT
X1 V2001 V2000
LDD
4 5 2 6 7 2 9 9
V2000

Acc. 4 5 2 6 7 2 9 9
Compared
CMPD with
V2010
6 7 3 9 5 0 2 6
Compare the value in the
V2011 V2010
in V2010 and V2011
SP60 C30
RLL Instructions

Standard
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT C SHFT M P D C A B A ENT

2 ORST CV 3 2 0 1 0
$ SHFT SP G A ENT
STR STRN 6 0
GX SHFT C D A ENT
OUT 2 3 0
Math Instructions
Math Instructions
Add Add is a 16 bit instruction that adds a

(ADD) BCD value in the accumulator with a
BCD value in a V memory location ADD
(Aaaa). The result resides in the A aaa
accumulator.
A aaa
SP63 On when the result of the instruction causes the value in the accumulator
to be zero.
SP66 On when the 16 bit addition instruction results in a carry.
SP70 On anytime the value in the accumulator is negative.
SP75 On when a BCD instruction is executed and a NONBCD number was

encountered.
flags is executed.
accumulator using the Load instruction. The value in the lower 16 bits of the
accumulator are added to the value in V2006 using the Add instruction. The value in
the accumulator is copied to V2010 using the Out instruction.
DirectSOFT V2000
X1 4 9 3 5
LD
V2000
Load the value in V2000 into

the lower 16 bits of the The unused accumulator
accumulator bits are set to zero
0 0 0 0 4 9 3 5 (Accumulator)
ADD
+ 2 5 0 0 (V2006)
V2006
Acc. 7 4 3 5
Add the value in the lower
16 bits of the accumulator
with the value in V2006
OUT
V2010 7 4 3 5
RLL Instructions
Copy the value in the lower V2010

V2010
Standard
$ B ENT
STR 1
ANDST 3 2 0 0 0
SHFT A D D C A A G ENT
0 3 3 2 0 0 6
OUT AND 2 0 1 0
Math Instructions
Add Double Add Double is a 32 bit instruction that

(ADDD) adds the BCD value in the accumulator
with a BCD value (Aaaa), which is either ADDD
two consecutive V memory locations or A aaa
an 8digit (max.) BCD constant. The
result resides in the accumulator.
A aaa
Constant K 099999999
to be zero.

encountered.
flags is executed.
accumulator is added with the value in V2006 and V2007 using the Add Double
instruction. The value in the accumulator is copied to V2010 and V2011 using the
Out Double instruction.
X1
LDD 6 7 3 9 5 0 2 6
V2000

6 7 3 9 5 0 2 6 (Accumulator)
ADDD
+ 2 0 0 0 4 0 4 6 (V2006 and V2007)
V2006
Acc. 8 7 3 9 9 0 7 2
Add the value in the
in V2006 and V2007
OUTD
V2010 8 7 3 9 9 0 7 2

RLL Instructions

V2011
Standard

$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT A D D D C A A G ENT
0 3 3 3 2 0 0 6
GX SHFT D SHFT V C A B A ENT
OUT 3 AND 2 0 1 0
Math Instructions
Subtract Subtract is a 16 bit instruction that

(SUB) subtracts the BCD value (Aaaa) in a V
memory location from the BCD value in SUB
the lower 16 bits of the accumulator. The A aaa
result resides in the accumulator.
A aaa
to be zero.
SP64 On when the 16 bit subtraction instruction results in a borrow.

encountered.
flags is executed.
accumulator using the Load instruction. The value in V2006 is subtracted from the
value in the accumulator using the Subtract instruction. The value in the accumulator
is copied to V2010 using the Out instruction.
DirectSOFT V2000
2 4 7 5
X1 LD
V2000

accumulator
0 0 0 0 2 4 7 5 (Accumulator)
SUB y 1 5 9 2 (V2006)
V2006
Acc. 0 8 8 3
Subtract the value in V2006
from the value in the lower
OUT 0 8 8 3
V2010
V2010
RLL Instructions

V2010
Standard
$ B ENT
STR 1
ANDST 3 2 0 0 0
SHFT S U B SHFT V C A A G ENT

RST ISG 1 AND 2 0 0 6
OUT AND 2 0 1 0
Math Instructions
Subtract Double Subtract Double is a 32 bit instruction that

(SUBD) subtracts the BCD value (Aaaa), which is
either two consecutive V memory SUBD
locations or an 8-digit (max.) constant, A aaa
from the BCD value in the accumulator.
The result resides in the accumulator.
A aaa
Constant K 099999999
to be zero.

encountered.
flags is executed.
into the accumulator using the Load Double instruction. The value in V2006 and
V2007 is subtracted from the value in the accumulator. The value in the accumulator
is copied to V2010 and V2011 using the Out Double instruction.
0 1 0 6 3 2 7 4
X1 LDD
V2000

V2001 into the accumulator (Accumulator)
0 1 0 6 3 2 7 4
y 6 7 2 3 7 5 (V2006 and V2007)
SUBD
V2006 ACC. 0 0 3 9 0 8 9 9
The in V2006 and V2007 is

subtracted from the value in
the accumulator
OUTD 0 0 3 9 0 8 9 9
V2010
V2011 V2010
RLL Instructions
V2011
Standard
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT S SHFT U B D C A A G ENT

RST ISG 1 3 2 0 0 6
OUT 3 2 0 1 0
Math Instructions
Multiply Multiply is a 16 bit instruction that

(MUL) multiplies the BCD value (Aaaa), which is
either a V memory location or a 4digit MUL
(max.) constant, by the BCD value in the A aaa
lower 16 bits of the accumulator The
result can be up to 8 digits and resides in
the accumulator.
A aaa
Constant K 09999
to be zero.

encountered.
flags is executed.
accumulator using the Load instruction. The value in V2006 is multiplied by the value
in the accumulator. The value in the accumulator is copied to V2010 and V2011
using the Out Double instruction.
DirectSOFT V2000
X1 1 0 0 0
LD
V2000
The unused accumulator
Load the value in V2000 into bits are set to zero
the lower 16 bits of the
accumulator 0 0 0 0 1 0 0 0 (Accumulator)
2 5 (V2006)
MUL
V2006 Acc. 0 0 0 2 5 0 0 0
The value in V2006 is

multiplied by the value in the
accumulator
0 0 0 2 5 0 0 0
OUTD
V2010 V2010
V2010

V2011
RLL Instructions
Standard
$ B ENT
STR 1
ANDST 3 2 0 0 0
SHFT M U L C A A G ENT
ORST ISG ANDST 2 0 0 6
OUT 3 2 0 1 0
Math Instructions
Multiply Double Multiply Double is a 32 bit instruction that

(MULD) multiplies the 8-digit BCD value in the
accumulator by the 8-digit BCD value in
the two consecutive V-memory locations MULD
specified in the instruction. The lower 8 A aaa
digits of the results reside in the
accumulator. Upper digits of the result
reside in the accumulator stack.
A aaa
Vmemory V All (See p. 428)
SP63 On when the result of the instruction causes the value in the accumulator to be zero.
SP75 On when a BCD instruction is executed and a NONBCD number was encountered.
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the constant Kbc614e hex will be loaded
into the accumulator. When converted to BCD the number is 12345678. That
numberis stored in V1400 and V1401. After loading the constant K2 into the
accumulator, we multiply it times 12345678, which is 24691356.
DirectSOFT Display
1 2 3 4 5 6 7 8 (Accumulator)
X1 LDD Load the hex equivalent
of 12345678 decimal into
Kbc614e the accumulator.
Convert the value to V1401 V1400

BCD
BCD format. It will 1 2 3 4 5 6 7 8
occupy eight BCD digits
(32 bits).
OUTD Output the number to 2 (Accumulator)
V1400 and V1401 using
V1400 the OUTD instruction. Acc. 2 4 6 9 1 3 5 6
LD Load the constant K2

into the accumulator.
K2
2 4 6 9 1 3 5 6
MULD Multiply the accumulator
contents (2) by the
V1400 V1403 V1500
8-digit number in V1400
and V1401.
OUTD Move the result in the

V1402 and V1403 using the
OUTD instruction.
$ B ENT SHFT L D D SHFT K SHFT
RLL Instructions
STR 1 ANDST 3 3 JMP

B C G B E B C D
Standard
SHFT ENT SHFT ENT

1 2 6 1 4 1 2 3
GX SHFT D B E A A ENT
OUT 3 1 4 0 0
SHFT L D SHFT K C ENT

ANDST 3 JMP 2
SHFT M U L D B E A A
ORST ISG ANDST 3 1 4 0 0
GX SHFT D B E A C ENT
OUT 3 1 4 0 2
Math Instructions
Divide Divide is a 16 bit instruction that divides

(DIV) the BCD value in the accumulator by a
BCD value (Aaaa), which is either a V DIV
memory location or a 4-digit (max.) A aaa
constant. The first part of the quotient
resides in the accumulator and the
remainder resides in the first stack
location.
A aaa
Constant K 19999
SP53 On when the value of the operand is larger than the accumulator can work
with.
to be zero.

encountered.
flags is executed.
accumulator using the Load instruction. The value in the accumulator will be divided
by the value in V2006 using the Divide instruction. The value in the accumulator is
copied to V2010 using the Out instruction.
DirectSOFT V2000
5 0 0 0
X1 LD
V2000

accumulator
0 0 0 0 5 0 0 0 (Accumulator)
DIV (V2006)
4 9
V2006
Acc. 1 0 2 0 0 0 0 0 0 0 2
The value in the
accumulator is divided by First stack location contains
the value in V2006 the remainder
OUT 1 0 0
V2010
V2010
RLL Instructions

V2010
Standard
$ B ENT
STR 1
ANDST 3 2 0 0 0
SHFT D I V C A A G ENT
3 8 AND 2 0 0 6
OUT AND 2 0 1 0
Math Instructions
Divide Double Divide Double is a 32 bit instruction that

(DIVD) divides the BCD value in the accumulator
by a BCD value (Aaaa), which must be
obtained from two consecutive V memory DIVD
locations. (You cannot use a constant as A aaa
the parameter in the box.) The first part of
the quotient resides in the accumulator
and the remainder resides in the first stack
location.
A aaa
Pointer P All (See p. 428)
SP53 On when the value of the operand is larger than the accumulator can work with.
SP75 On when a BCD instruction is executed and a NONBCD number was encountered.
accumulator is divided by the value in V1420 and V1421 using the Divide Double
instruction. The first part of the quotient resides in the accumulator an the remainder
resides in the first stack location. The value in the accumulator is copied to V1500
and V1501 using the Out Double instruction.
DirectSOFT Display V1401 V1400
X1 LDD 0 1 5 0 0 0 0 0
V1400
Load the value in V1400 and The unused accumulator

V1401 into the accumulator bits are set to zero
0 1 5 0 0 0 0 0 (Accumulator)
DIVD 0 0 0 0 0 0 5 0 (V1421 and V1420)

V1420
Acc. 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0
The value in the accumulator First stack location contains
is divided by the value in the remainder
V1420 and V1421
OUTD
V1500 0 0 0 3 0 0 0 0

RLL Instructions
and V1501
Standard
$ B ENT SHFT L D D
STR 1 ANDST 3 3
B E A A ENT SHFT D I V
1 4 0 0 3 8 AND
B E C A ENT GX SHFT D
1 4 2 0 OUT 3
B F A A ENT
1 5 0 0
Math Instructions
Increment The Increment instruction increments a

(INC) BCD value in a specified V memory location INC
A aaa
by 1 each time the instruction is executed.
Decrement The Decrement instruction decrements a

(DEC) BCD value in a specified V memory location DEC
by 1 each time the instruction is executed. A aaa
A aaa
SP63 on when the result of the instruction causes the value in the accumulator to be zero.
SP75 on when a BCD instruction is executed and a NONBCD number was encountered.
In the following increment example, when C5 is on the value in V1400 increases by

one.
DirectSOFT Display V1400
C5 8 9 3 5
INC
V1400
Increment the value in

V1400 by 1. V1400
8 9 3 6

$ C F ENT
STR 2 5
SHFT I N C B E A A
8 TMR 2 1 4 0 0
In the following decrement example, when C5 is on the value in V1400 is decreased

by one.
RLL Instructions
C5 8 9 3 5
DEC
Standard
V1400
Decrement the value in

V1400 by 1.
V1400
8 9 3 4
$ C F ENT
STR 2 5
SHFT D E C B E A A
3 4 2 1 4 0 0
Math Instructions
Increment Binary The Increment Binary instruction

(INCB) increments a binary value in a specified V
memory location by 1 each time the INCB
instruction is executed. A aaa
A aaa
to be zero.
In the following example when C5 is on, the binary value in V2000 is increased by 1.
DirectSOFT V2000 Handheld Programmer Keystrokes
C5 4 A 3 C
INCB $ SHFT C F ENT
STR 2 5
V2000
SHFT I N C B C A A A ENT
Increment the binary value 8 TMR 2 1 2 0 0 0
in the accumulator by1 V2000
4 A 3 D
Decrement Binary The Decrement Binary instruction

(DECB) decrements a binary value in a specified V
memory location by 1 each time the DECB
instruction is executed. A aaa
A aaa
to be zero.
flags is executed.
In the following example when C5 is on, the value in V2000 is decreased by 1.

RLL Instructions
DirectSOFT V2000
Standard
4 A 3 C
C5 DECB $ C F
SHFT ENT
STR 2 5
V2000
SHFT D E C B C A A A ENT
Decrement the binary value 3 4 2 1 2 0 0 0
in the accumulator by1 V2000
4 A 3 B
Math Instructions
Add Binary Add Binary is a 16 bit instruction that adds

(ADDB) the unsigned 2s complement binary value
in the lower 16 bits of the accumulator with ADDB
an unsigned 2s complement binary value A aaa
(Aaaa), which is either a V memory
location or a 16-bit constant. The result
can be up to 32 bits (unsigned 2s
complement) and resides in the
accumulator.
A aaa
Pointer P All V mem (See p. 428)
Constant K 0FFFF
SP73 On when a signed addition or subtraction results in a incorrect sign bit.
accumulator using the Load instruction. The binary value in the accumulator will be
added to the binary value in V1420 using the Add Binary instruction. The value in the
accumulator is copied to V1500 and V1501 using the Out instruction.
0 A 0 5
X1 LD
V1400
Load the value in V1400 into the The unused accumulator

lower 16 bits of the accumulator bits are set to zero
0 0 0 0 0 A 0 5 (Accumulator)
ADDB + (V1420)
1 2 C 4
V1420
Acc. 1 C C 9
The binary value in the
accumulator is added to the
binary value in V1420
OUTD 1 C C 9
V1500
V1500
RLL Instructions

V1500 and V1501
Standard
$ B ENT SHFT L D
STR 1 ANDST 3
B E A A ENT SHFT A D D B
1 4 0 0 0 3 3 1
B E C A ENT GX SHFT D B F A A ENT
1 4 2 0 OUT 3 1 5 0 0
Math Instructions
Subtract Binary Subtract Binary is a 16 bit instruction that

(SUBB) subtracts the unsigned 2s complement
binary value (Aaaa), which is either a V
memory location or a 16-bit 2s SUBB
complement binary value, from the binary A aaa
value in the accumulator. The result
resides in the accumulator.
A aaa
Constant K 0FFFF
accumulator using the Load instruction. The binary value in V1420 is subtracted
from the binary value in the accumulator using the Subtract Binary instruction. The
value in the accumulator is copied to V1500 using the Out instruction.

1 0 2 4
X1 LD
V1400

0 0 0 0 1 0 2 4 (Accumulator)
SUBB y (V1420)
0 A 0 B
V1420
Acc. 0 6 1 9
The binary value in V1420 is
subtracted from the value in
the accumulator
OUT 0 6 1 9
V1500
V1500
Copy the value in the lower 16
bits of the accumulator to V1500
RLL Instructions
Standard

$ B ENT
STR 1
SHFT L D B E A A ENT
ANDST 3 1 4 0 0
SHFT S SHFT U B B B E C A ENT

RST ISG 1 1 1 4 2 0
GX D B F A A
SHFT ENT
OUT 3 1 5 0 0
Math Instructions
Multiply Binary Multiply Binary is a 16 bit instruction that

(MULB) multiplies the unsigned 2s complement
binary value (Aaaa), which is either a V MULB
A aaa
memory location or a 16-bit unsigned 2s
complement binary constant, by the16-bit
binary value in the accumulator The result
can be up to 32 bits and resides in the
accumulator.
A aaa
Constant K 1FFFF
accumulator using the Load instruction. The binary value in V1420 is multiplied by
the binary value in the accumulator using the Multiply Binary instruction. The value in
X1 0 A 0 1
LD
V1400
Load the value in V1400 into the

lower 16 bits of the accumulator The unused accumulator
bits are set to zero
0 0 0 0 0 A 0 1 (Accumulator)
MULB
0 0 2 E (V1420)
V1420
Acc. 0 0 0 1 C C 2 E
The binary value in V1420 is
multiplied by the binary
value in the accumulator
OUTD 0 0 0 1 C C 2 E
V1500
V1501 V1500
V1500 and V1501

$ B ENT
STR 1
RLL Instructions
ANDST 3 1 4 0 0
Standard
SHFT M U L B B E C A ENT
ORST ISG ANDST 1 1 4 2 0
GX D B F A A
SHFT ENT
OUT 3 1 5 0 0
Math Instructions
Divide Binary Divide Binary is a 16 bit instruction that

(DIVB) divides the unsigned 2s complement
binary value in the accumulator by a
binary value (Aaaa), which is either a V DIVB
memory location or a 16-bit unsigned 2s A aaa
complement binary constant. The first part
of the quotient resides in the accumulator
and the remainder resides in the first stack
location.
A aaa
Constant K 0FFFF
accumulator using the Load instruction. The binary value in the accumulator is
divided by the binary value in V1420 using the Divide Binary instruction. The value in

F A 0 1
X1 LD
V1400

0 0 0 0 F A 0 1 (Accumulator)
DIVB (V1420)
0 0 5 0
V1420
Acc. 0 3 2 0 0 0 0 0 0 0 0 0
The binary value in the
accumulator is divided by First stack location contains
the binary value in V1420 the remainder
OUT 0 3 2 0
V1500
V1500
Copy the value in the lower 16
bits of the accumulator to V1500
RLL Instructions
Standard

$ B ENT
STR 1
ANDST 3 1 4 0 0
SHFT D I U B B E C A ENT
3 8 ISG 1 1 4 2 0
GX D B F A A
SHFT ENT
OUT 3 1 5 0 0
Bit Operation Instructions
Sum The Sum instruction counts number of bits

(SUM) that are set to 1 in the accumulator. The
SUM
HEX result resides in the accumulator.
In the following example, when X1 is on, the value formed by discrete locations
X10X17 is loaded into the accumulator using the Load Formatted instruction. The
number of bits in the accumulator set to 1 is counted using the Sum instruction. The
value in the accumulator is copied to V1500 using the Out instruction.
DirectSOFT Display
X17 X16 X15 X14 X13 X12 X11 X10
X1 ON ON OFF OFF ON OFF ON ON
LDF X10
K8 The unused accumulator
bits are set to zero
Load the value represented by
discrete locations X10X17
into the accumulator 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 1 1
Acc. 0 0 0 0 0 0 0 5
SUM
Sum the number of bits in

the accumulator set to 1
OUT 0 0 0 5
V1500
V1500
to V1500

$ B ENT
STR 1
SHFT L D F B A I ENT
ANDST 3 5 1 0 8
SHFT S SHFT U M ENT

RST ISF ORST
GX B F A A ENT
OUT 1 5 0 0
Shift Left Shift Left is a 32 bit instruction that shifts

RLL Instructions
(SHFL) the bits in the accumulator a specified

number (Aaaa) of places to the left. The SHFL
Standard
vacant positions are filled with zeros and A aaa

the bits shifted out of the accumulator are
discarded.
A aaa
Constant K 132
into the accumulator using the Load Double instruction. The bit pattern in the
accumulator is shifted 2 bits to the left using the Shift Left instruction. The value in the
accumulator is copied to V2010 and V2011 using the Out Double instruction.
DirectSOFT
V2001 V2000
X1 LDD 6 7 0 5 3 1 0 1
V2000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SHFL Acc. 0 1 1 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1
K2
The bit pattern in the

accumulator is shifted 2 bit
S S S S
positions to the left Shifted out of the
accumulator
OUTD
V2010
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Copy the value in the Acc. 0
1 0 0 0
1 0
1 1 0 0 0 0 0 0
1 0 0
1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0
V2011
9 C 1 4 C 4 0 4
V2011 V2010
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT S SHFT H F L C ENT

RST 7 5 ANDST 2
OUT 3 2 0 1 0
RLL Instructions
Standard
Shift Right Shift Right is a 32 bit instruction that shifts

(SHFR) the bits in the accumulator a specified
number (Aaaa) of places to the right. The SHFR
vacant positions are filled with zeros and A aaa
the bits shifted out of the accumulator are
lost.
A aaa
Constant K 132
into the accumulator using the Load Double instruction. The bit pattern in the
accumulator is shifted 2 bits to the right using the Shift Right instruction. The value in
the accumulator is copied to V2010 and V2011 using the Out Double instruction.
X1 LDD Constant 6 7 0 5 3 1 0 1
V2000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SHFR Acc. 0 1 1 0 0 1 1 1 0 0 0 0 0 1 0 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1
K2
The bit pattern in the

accumulator is shifted 2 bit S S S S
positions to the right Shifted out of the
accumulator
OUTD
V2010 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Copy the value in the Acc. 0 0 0 0

1 0
1 1
0 0 0
1 0
1 0
1 0 0 0 0 0 0
1 0 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0
V2011
1 9 C 1 4 C 4 0
V2011 V2010
$ B ENT
STR 1
RLL Instructions
ANDST 3 3 2 0 0 0
Standard
SHFT S SHFT H F R C ENT

RST 7 5 ORN 2
OUT 3 2 0 1 0
Encode The Encode instruction encodes the bit

(ENCO) position in the accumulator having a value
of 1, and returns the appropriate binary ENCO
representation. If the most significant bit is
set to 1 (Bit 31), the Encode instruction
would place the value HEX 1F (decimal
31) in the accumulator. If the value to be
encoded is 0000 or 0001, the instruction
will place a zero in the accumulator. If the
value to be encoded has more than one bit
position set to a 1, the least significant 1
will be encoded and SP53 will be set on.
SP53 On when the value of the operand is larger than the accumulator can work
with.
flags is executed.
In the following example, when X1 is on, The value in V2000 is loaded into the
accumulator using the Load instruction. The bit position set to a 1 in the
accumulator is encoded to the corresponding 5 bit binary value using the Encode
instruction. The value in the lower 16 bits of the accumulator is copied to V2010
using the Out instruction.
DirectSOFT V2000
1 0 0 0
X1 LD
V2000
Load the value in V2000 into

the lower 16 bits of the 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
accumulator
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0
Bit postion 12 is
converted
to binary
ENCO
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Encode the bit position set
to 1 in the accumulator to a Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0
5 bit binary value
OUT
V2010
Copy the value in the lower 16 bits 0 0 0 C

RLL Instructions
of the accumulator to V2010

V2010 Binary value
for 12.
Standard
$ B ENT
STR 1
ANDST 3 2 0 0 0
SHFT E N C O ENT
4 TMR 2 INST#
OUT AND 2 0 1 0
Decode The Decode instruction decodes a 5 bit

(DECO) binary value of 031 (01F HEX) in the
accumulator by setting the appropriate bit DECO
position to a 1. If the accumulator contains
the value F (HEX), bit 15 will be set in the
accumulator. If the value to be decoded is
greater than 31, the number is divided by
32 until the value is less than 32 and then
the value is decoded.
In the following example when X1 is on, the value formed by discrete locations
X10X14 is loaded into the accumulator using the Load Formatted instruction. The
five bit binary pattern in the accumulator is decoded by setting the corresponding bit
position to a 1 using the Decode instruction.
DirectSOFT
X14 X13 X12 X11 X10
X1 LDF X10 OFF ON OFF ON ON
K5
Load the value in

represented by discrete
locations X10X14 into the
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
accumulator
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1
The binary vlaue

is converted to
bit position 11.
DECO
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Decode the five bit binary Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
pattern in the accumulator
and set the corresponding
bit position to a 1
$ B ENT
STR 1
SHFT L D F B A F ENT
ANDST 3 5 1 0 5
SHFT D E C O ENT
3 4 2 INST#
RLL Instructions
Standard
Number Conversion Instructions
Number Conversion Instructions (Accumulator)
Binary The Binary instruction converts a BCD

(BIN) value in the accumulator to the equivalent
binary value. The result resides in the BIN
accumulator.
In the following example, when X1 is on, the value in V2000 and V2001 is loaded into
the accumulator using the Load Double instruction. The BCD value in the
accumulator is converted to the binary (HEX) equivalent using the BIN instruction.
The binary value in the accumulator is copied to V2010 and V2011 using the Out
Double instruction. (The handheld programmer will display the binary value in
V2010 and V2011 as a HEX value.)
SP75 on when a BCD instruction is executed and a NONBCD number was encountered.
X1 0 0 0 2 8 5 2 9
LDD
V2000

8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1
BCD Value
28529 = 16384 + 8192 + 2048 + 1024 + 512 + 256 + 64 + 32 + 16 + 1
BIN Binary Equivalent Value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Convert the BCD value in Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1
the accumulator to the
binary equivalent value 2 1 5 2 1 6 3 1 8 4 2 1 5 2 1 6 3 1 8 4 2 1 5 2 1 6 3 1 8 4 2 1
1 0 3 6 3 7 3 6 3 1 0 0 2 6 3 5 2 6 1 0 0 0 1 5 2 4 2 6
4 7 6 8 4 1 5 7 8 9 9 4 4 2 1 5 7 3 9 9 4 2 2 6 8
7 3 8 4 2 0 5 7 8 4 7 8 2 1 0 3 6 8 2 6 8 4
4 7 7 3 1 8 4 7 6 3 1 5 8 4 7 6 8 4
4 4 0 5 7 8 4 2 0 0 5 7 8 4 2
8 1 9 4 7 6 3 1 8 4 2 6
3 8 1 5 2 4 2 6
OUTD 6 2 2 6 8
4 4
V2010 8
Copy the binary value in the
accumulator to V2010 and V2011
RLL Instructions

Standard
0 0 0 0 6 F 7 1 The binary (HEX) value

copied to V2010
$ B ENT V2011 V2010
STR 1
ANDST 3 3 2 0 0 0
SHFT B I N ENT
1 8 TMR
OUT 3 2 0 1 0
Binary Coded The Binary Coded Decimal instruction

Decimal converts a binary value in the accumulator
(BCD) to the equivalent BCD value. The result BCD
In the following example, when X1 is on, the binary (HEX) value in V2000 and V2001
is loaded into the accumulator using the Load Double instruction. The binary value in
the accumulator is converted to the BCD equivalent value using the BCD instruction.
The BCD value in the accumulator is copied to V2010 and V2011 using the Out
Double instruction.
X1 0 0 0 0 6 F 7 1
LDD
V2000 Binary Value

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 1 0 1 1 1 0 0 0 1
2 1 5 2 1 6 3 1 8 4 2 1 5 2 1 6 3 1 8 4 2 1 5 2 1 6 3 1 8 4 2 1
1 0 3 6 3 7 3 6 3 1 0 0 2 6 3 5 2 6 1 0 0 0 1 5 2 4 2 6
4 7 6 8 4 1 5 7 8 9 9 4 4 2 1 5 7 3 9 9 4 2 2 6 8
7 3 8 4 2 0 5 7 8 4 7 8 2 1 0 3 6 8 2 6 8 4
4 7 7 3 1 8 4 7 6 3 1 5 8 4 7 6 8 4
4 4 0 5 7 8 4 2 0 0 5 7 8 4 2
8 1 9 4 7 6 3 1 8 4 2 6
3 8 1 5 2 4 2 6
6 2 2 6 8
4 4
8
BCD
16384 + 8192 + 2048 + 1024 + 512 + 256 + 64 + 32 + 16 + 1 = 28529
Convert the binary value in BCD Equivalent Value

the accumulator to the BCD
equivalent value 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1
OUTD
V2010
Copy the BCD value in the 0 0 0 2 8 5 2 9 The BCD value

accumulator to V2010 and V2011 copied to
V2011 V2010 V2010 and V2011
$ B
RLL Instructions
ENT
STR 1
Standard
ANDST 3 3 2 0 0 0
SHFT B C D ENT
1 2 3
OUT 3 2 0 1 0
Invert The Invert instruction inverts or takes the

(INV) ones complement of the 32 bit value in the
accumulator. The result resides in the INV
accumulator.
accumulator is inverted using the Invert instruction. The value in the accumulator is
copied to V2010 and V2011 using the Out Double instruction.
X1 0 4 0 5 0 2 5 0
LDD
V2000

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0
INV
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 0 1 1 1 1 1 1 0 1 1 0 1 0 1 1 1 1
Invert the binary bit pattern
in the accumulator
OUTD F B F A F D A F
V2010 V2011 V2010
V2011
$ B ENT
STR 1
ANDST 3 3 2 0 0 0
SHFT I N V ENT
8 TMR AND
OUT 3 2 0 1 0
RLL Instructions
Standard
ASCII to HEX The ASCII TO HEX instruction converts a

(ATH) table of ASCII values to a specified table of ATH
V aaa
HEX values. ASCII values are two digits
and their HEX equivalents are one digit.
This means an ASCII table of four V memory locations would only require two V
memory locations for the equivalent HEX table. The function parameters are loaded
into the accumulator stack and the accumulator by two additional instructions.
Listed below are the steps necessary to program an ASCII to HEX table function.
The example on the following page shows a program for the ASCII to HEX table
function.
Step 1: Load the number of V memory locations for the ASCII table into the first
level of the accumulator stack.
Step 2: Load the starting V memory location for the ASCII table into the
accumulator. This parameter must be a HEX value.
Step 3: Specify the starting V memory location (Vaaa) for the HEX table in the
ATH instruction.
Helpful Hint: For parameters that require HEX values when referencing memory
locations, the LDA instruction can be used to convert an octal address to the HEX
equivalent and load the value into the accumulator.
aaa
In the example on the following page, when X1 is ON the constant (K4) is loaded into
the accumulator using the Load instruction and will be placed in the first level of the
accumulator stack when the next Load instruction is executed. The starting location
for the ASCII table (V1400) is loaded into the accumulator using the Load Address
instruction. The starting location for the HEX table (V1600) is specified in the ASCII
to HEX instruction. The table below lists valid ASCII values for ATH conversion.
ASCII Values Valid for ATH Conversion

ASCII Value Hex Value ASCII Value Hex Value
30 0 38 8
RLL Instructions
31 1 39 9
Standard
32 2 41 A
33 3 42 B
34 4 43 C
35 5 44 D
36 6 45 E
37 7 46 F
DirectSOFT Display Hexadecimal

ASCII TABLE Equivalents
X1 LD Load the constant value
into the lower 16 bits of the
K4 accumulator. This value
defines the number of V
memory location in the
ASCII table
V1400 33 34
LDA Convert octal 1400 to HEX
O 1400
300 and load the value into
the accumulator
1234 V1600
V1401 31 32
ATH V1600 is the starting
location for the HEX table
V1600
V1402 37 38
5678 V1601

$ B ENT V1403 35 36
STR 1
SHFT L D SHFT K E ENT

ANDST 3 JMP 4
SHFT L D A B E A A ENT
ANDST 3 0 1 4 0 0
SHFT A T H B G A A ENT
0 MLR 7 1 6 0 0
HEX to ASCII The HEX to ASCII instruction converts a

(HTA) table of HEX values to a specified table of HTA
ASCII values. HEX values are one digit and V aaa
their ASCII equivalents are two digits.
This means a HEX table of two V memory locations would require four V memory
locations for the equivalent ASCII table. The function parameters are loaded into the
accumulator stack and the accumulator by two additional instructions. Listed below
are the steps necessary to program a HEX to ASCII table function. The example on
the following page shows a program for the HEX to ASCII table function.
Step 1: Load the number of V memory locations in the HEX table into the first level
of the accumulator stack.
Step 2: Load the starting V memory location for the HEX table into the
accumulator. This parameter must be a HEX value.
Step 3: Specify the starting V memory location (Vaaa) for the ASCII table in the
HTA instruction.
RLL Instructions
Standard
aaa
In the following example, when X1 is ON the constant (K2) is loaded into the
accumulator using the Load instruction. The starting location for the HEX table
(V1500) is loaded into the accumulator using the Load Address instruction. The
starting location for the ASCII table (V1400) is specified in the HEX to ASCII
instruction.
DirectSOFT Display
Hexadecimal
X1 LD Equivalents ASCII TABLE
K2
Load the constant value into

the lower 16 bits of the
accumulator. This value
defines the number of V 33 34 V1400
locations in the HEX table.
V1500 1234
LDA
O 1500
31 32 V1401
Convert octal 1500 to HEX

340 and load the value into
the accumulator
HTA 37 38 V1402
V1400
V1400 is the starting

V1501 5678
location for the ASCII table.
The conversion is executed
by this instruction.
35 36 V1403
$ B ENT
STR 1
SHFT L D SHFT K E ENT

ANDST 3 JMP 4
SHFT L D A B F A A ENT
ANDST 3 0 1 5 0 0
SHFT H T A B E A A ENT
7 MLR 0 1 4 0 0
The table below lists valid ASCII values for HTA conversion.
ASCII Values Valid for HTA Conversion
Hex Value ASCII Value Hex Value ASCII Value
0 30 8 38
RLL Instructions
1 31 9 39
Standard
2 32 A 41
3 33 B 42
4 34 C 43
5 35 D 44
6 36 E 45
7 37 F 46
Gray Code The Gray code instruction converts a 16 bit

(GRAY) gray code value to a BCD value. The BCD
conversion requires 10 bits of the
accumulator. The upper 22 bits are set to GRAY
0. This instruction is designed for use
with devices (typically encoders) that use
the grey code numbering scheme. The
Gray Code instruction will directly convert
a gray code number to a BCD number for
devices having a resolution of 512 or 1024
counts per revolution. If a device having a
resolution of 360 counts per revolution is to
be used you must subtract a BCD value of
76 from the converted value to obtain the
proper result. For a device having a
resolution of 720 counts per revolution you
must subtract a BCD value of 152.
In the following example, when X1 is ON the binary value represented by X10X27 is

loaded into the accumulator using the Load Formatted instruction. The gray code
value in the accumulator is converted to BCD using the Gray Code instruction. The
value in the lower 16 bits of the accumulator is copied to V2010.
DirectSOFT
X27 X26 X25 X12 X11 X10
S S S S
X1 LDF K16 OFF OFF OFF ON OFF ON
X10
Load the value represented

by X10X27 into the lower
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
GRAY
Convert the 16 bit grey code

value in the accumulator to a
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
BCD value
Acc. 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0
OUT
V2010

16 bits of the accumulator to Gray Code BCD
V2010
0000000000 0000 0 0 0 6
Handheld Programmer Keystrokes 0000000001 0001 V2010

0000000011 0002
$ B ENT
STR 1 0000000010 0003
RLL Instructions
L D F B A B G 0000000110 0004
SHFT ENT
ANDST 3 5 1 0 1 6
Standard
0000000111 0005
SHFT G R A Y ENT
6 ORN 0 MLS 0000000101 0006
GX V C A B A 0000000100 0007
SHFT ENT
OUT AND 2 0 1 0 S S
S S
S S
1000000001 1022
1000000000 1023
Shuffle Digits The Shuffle Digits instruction shuffles a

(SFLDGT) maximum of 8 digits rearranging them in a
specified order. This function requires
parameters to be loaded into the first level SFLDGT
of the accumulator stack and the
accumulator with two additional
instructions. Listed below are the steps
necessary to use the shuffle digit function.
The example on the following page shows
a program for the Shuffle Digits function.
Step 1: Load the value (digits) to be shuffled into the first level of the accumulator
stack.
Step 2: Load the order that the digits will be shuffled to into the accumulator.
Note: If the number used to specify the order contains a 0 or 9F, the
corresponding position will be set to 0.
See example on the next page.
Note:If the number used to specify the order contains duplicate numbers, the
most significant duplicate number is valid. The result resides in the accumulator.
See example on the next page.
Step 3: Insert the SFLDGT instruction.

Shuffle Digits There are a maximum of 8 digits that can Digits to be

shuffled (first stack location)
Block Diagram be shuffled. The bit positions in the first
9 A B C D E F 0
level of the accumulator stack defines the
digits to be shuffled. They correspond to
the bit positions in the accumulator that
define the order the digits will be shuffled. 1 2 8 7 3 6 5 4
The digits are shuffled and the result Specified order (accumulator)

Bit Positions 8 7 6 5 4 3 2 1
B C E F 0 D A 9
Result (accumulator)
RLL Instructions
Standard
In the following example when X1 is on, The value in the first level of the accumulator
stack will be reorganized in the order specified by the value in the accumulator.
Example A shows how the shuffle digits works when 0 or 9 F is not used when
specifying the order the digits are to be shuffled. Also, there are no duplicate
numbers in the specified order.
Example B shows how the shuffle digits works when a 0 or 9F is used when
specifying the order the digits are to be shuffled. Notice when the Shuffle Digits
instruction is executed, the bit positions in the first stack location that had a
corresponding 0 or 9F in the accumulator (order specified) are set to 0.
Example C shows how the shuffle digits works when duplicate numbers are used
specifying the order the digits are to be shuffled. Notice when the Shuffle Digits
instruction is executed, the most significant duplicate number in the order specified
is used in the result.
DirectSOFT
A B C
X1 LDD V2001 V2000 V2001 V2000 V2001 V2000
V2000 9 A B C D E F 0 0 F E D C B A 9 9 A B C D E F 0

Original 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1
bit
Positions 9 A B C D E F 0 Acc. 0 F E D C B A 9 Acc. 9 A B C D E F 0 Acc.
V2007 V2006 V2007 V2006 V2007 V2006

LDD
V2006 1 2 8 7 3 6 5 4 0 0 4 3 0 0 2 1 4 3 2 1 4 3 2 1

V2007 into the accumulator Specified 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1
order
1 2 8 7 3 6 5 4 Acc. 0 0 4 3 0 0 2 1 Acc. 4 3 2 1 4 3 2 1 Acc.
New bit 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1
SFLDGT Positions
B C E F 0 D A 9 Acc. 0 0 0 0 E D A 9 Acc. 0 0 0 0 9 A B C Acc.
Shuffle the digits in the first

level of the accumulator
stack based on the pattern
in the accumulator. The
result is in the accumulator.
OUTD
B C E F 0 D A 9 0 0 0 0 E D A 9 0 0 0 0 9 A B C
V2010
V2011 V2010 V2011 V2010 V2011 V2010
V2011
$ B ENT
STR 1
L D D C A A A
RLL Instructions
SHFT ENT
ANDST 3 3 2 0 0 0
L D D C A A G
Standard
SHFT ENT
ANDST 3 3 2 0 0 6
SHFT S SHFT F L D G T ENT

RST 5 ANDST 3 6 MLR
OUT 3 2 0 1 0
Table Instructions
Table Instructions
Move The Move instruction moves the values
(MOV) from a V memory table to another
V memory table the same length. The MOV
function parameters are loaded into the V aaa
first level of the accumulator stack and the
accumulator by two additional
instructions. Listed below are the steps
necessary to program the Move function.
S Step 1: Load the number of V memory locations to be moved into the
first level of the accumulator stack. This parameter is a HEX value (K40
max, 100 octal).
S Step 2: Load the starting V memory location for the locations to be
moved into the accumulator. This parameter is a HEX value.
S Step 3: Insert the MOVE instruction which specifies starting V
memory location (Vaaa) for the destination table.
aaa
In the following example, when X1 is on, the constant value (K6) is loaded into the
accumulator using the Load instruction. This value specifies the length of the table
and is placed in the first stack location after the Load Address instruction is
executed. The octal address 2000 (V2000), the starting location for the source table
is loaded into the accumulator. The destination table location (V2030) is specified in
the Move instruction.
DirectSOFT S
S
X1 Load the constant value 6
LD (HEX) into the lower 16 bits S X X X X V2026
K6 of the accumulator S
X X X X V2027
Convert octal 2000 to HEX 0 1 2 3 V2000 0 1 2 3 V2030
LDA 400 and load the value into
O 2000 the accumulator 0 5 0 0 V2001 0 5 0 0 V2031
9 9 9 9 V2002 9 9 9 9 V2032
Copy the specified table
MOV locations to a table 3 0 7 4 V2003 3 0 7 4 V2033
V2030 beginning at location V2030
Rll Instructions
8 9 8 9 V2004 8 9 8 9 V2034
Standard
1 0 1 0 V2005 1 0 1 0 V2035
X X X X V2006 X X X X V2036
$ B ENT
STR 1 X X X X V2007 X X X X V2037
L D K G S S
SHFT SHFT ENT
ANDST 3 JMP 6 S S
SHFT L D A C A A A ENT
ANDST 3 0 2 0 0 0
SHFT M O V C A D A ENT
ORST INST# AND 2 0 3 0
Table Instructions
Move Memory The Move Memory Cartridge and the Load Label
Cartridge / instructions are used to copy data from program
Load Label ladder memory to V memory. The Load Label MOVMC
instruction is used with the MOVMC instruction V aaa
(MOVMC), (LDLBL) when copying data from program ladder memory to
V memory.
To copy data from the program ladder memory to V
memory, the function parameters are loaded into the
first two levels of the accumulator stack and the LDLBL
accumulator by two additional instructions. Listed K aaa
below are the steps necessary to program the Move
Memory Cartridge and Load Label functions.
S Step 1: Load the number of words to be copied into the second level
of the accumulator stack.
S Step 2: Load the offset for the data label area in ladder memory and
the beginning of the V memory block into the first level of the stack.
S Step 3: Load the source data label (LDLBL Kaaa) into the
accumulator when copying data from ladder memory to V memory. This
is the source location of the value.
S Step 4: Insert the MOVMC instruction which specifies destination in
V-memory (Vaaa). This is the copy destination.
A aaa

RLL Instructions
Standard
Table Instructions
Copy Data From a In the example to the right, data is copied from a Data Label Area to V memory.
Data Label Area to When X1 is on, the constant value (K4) is loaded into the accumulator using the
V Memory Load instruction. This value specifies the length of the table and is placed in the
second stack location after the next Load and Load Label (LDLBL) instructions
are executed. The constant value (K0) is loaded into the accumulator, specifying
the offset for the source and destination data. It is placed in the first stack location
after the LDLBL instruction is executed. The source address where data is being
copied from is loaded into the accumulator using the LDLBL instruction. The
MOVMC instruction specifies the destination starting location and executes the
copying of data from the Data Label Area to V memory.
Data Label Area DirectSOFT
Programmed X1
After the END LD
Instruction K4
S
S
DLBL K1 Load the value 4 into the
accumulator specifying the
N C O N 1 2 3 4 V2000 number of locations to be
copied.
K 1 2 3 4
N C O N 4 5 3 2 V2001 LD
K 4 5 3 2 K0
N C O N 6 1 5 1 V2002 Load the value 0 into the

K 6 1 5 1 accumulator specifying the
offset for source and
N C O N 8 8 4 5 V2003 destination locations
K 8 8 4 5
LDLBL
X X X X V2004 K1
S
Load the value 1 into the
S accumulator specifying the
Data Label Area K1 as the
starting address of the data
to be copied.
MOVMC
$ B ENT
STR 1 V2000
SHFT L D SHFT K E ENT V2000 is the destination

ANDST 3 JMP 4 starting address for the data
to be copied.
SHFT L D SHFT K A ENT
ANDST 3 JMP 0
SHFT L D L B L B ENT
ANDST 3 ANDST 1 ANDST 1
SHFT M O V M C C A A A ENT
ORST INST# AND ORST 2 2 0 0 0
Rll Instructions
Standard

No Operation The No Operation is an empty (not
(NOP) programmed) memory location.
NOP
SHFT N O P ENT
NOP TMR INST# CV
End The End instruction marks the termination

(END) point of the normal program scan. An End
instruction is required at the end of the END
main program body. If the End instruction
is omitted an error will occur and the CPU
will not enter the Run Mode. Data labels,
subroutines and interrupt routines are
placed after the End instruction. The End
instruction is not conditional; therefore, no
input contact is allowed.
SHFT E N D ENT
4 TMR 3
END
Stop The Stop instruction changes the

(STOP) operational mode of the CPU from Run to
Program (Stop) mode. This instruction is STOP
typically used to stop PLC operation in an
error condition.
In the following example, when C0 turns on, the CPU will stop operation and switch
to the program mode.
RLL Instructions
C0 $ SHFT C A ENT
Standard
STR 2 0
STOP S T O P
SHFT SHFT ENT
RST MLR INST# CV
SP16 On when the DL05 goes into the TERM_PRG mode.
SP53 On when the DL05 goes into the PRG mode.

Reset Watch Dog The Reset Watch Dog Timer instruction

Timer resets the CPU scan timer. The default
(RSTWT) setting for the watch dog timer is 200ms.
Scan times very seldom exceed 200ms,
RSTWT
but it is possible. For/next loops,
subroutines, interrupt routines, and table
instructions can be programmed such that
the scan becomes longer than 200ms.
When instructions are used in a manner
that could exceed the watch dog timer
setting, this instruction can be used to
reset the timer.
A software timeout error (E003) will occur and the CPU will enter the program
mode if the scan time exceeds the watch dog timer setting. Placement of the
RSTWT instruction in the program is very important. The instruction has to be
executed before the scan time exceeds the watch dog timers setting.
If the scan time is consistently longer than the watch dog timers setting, the
timeout value may be permanently increased from the default value of 200ms by
AUX 55 on the HPP or the appropriate auxiliary function in your programming
package. This eliminates the need for the RSTWT instruction.
In the following example the CPU scan timer will be reset to 0 when the RSTWT
instruction is executed. See the For/Next instruction for a detailed example.
SHFT R S T W T ENT
ORN RST MLR ANDN MLR
RSTWT
RLL Instructions
Standard
For / Next The For and Next instructions are used to

(FOR) execute a section of ladder logic between
(NEXT) the For and Next instruction a specified
A aaa
numbers of times. When the For
FOR
instruction is enabled, the program will
loop the specified number of times. If the
For instruction is not energized the section
of ladder logic between the For and Next
instructions is not executed.
For / Next instructions cannot be nested.
The normal I/O update and CPU
housekeeping is suspended while
NEXT
executing the For / Next loop. The program
scan can increase significantly, depending
on the amount of times the logic between
the For and Next instruction is executed.
With the exception of immediate I/O
instructions, I/O will not be updated until
the program execution is completed for
that scan. Depending on the length of time
required to complete the program
execution, it may be necessary to reset the
watch dog timer inside of the For / Next
loop using the RSTWT instruction.
A aaa
Constant K 19999
Rll Instructions
Standard
In the following example, when X1 is on, the application program inside the For /
Next loop will be executed three times. If X1 is off the program inside the loop will not
be executed. The immediate instructions may or may not be necessary depending
on your application. Also, The RSTWT instruction is not necessary if the For / Next
loop does not extend the scan time larger the Watch Dog Timer setting. For more
information on the Watch Dog Timer, refer to the RSTWT instruction.
DirectSOFT
X1 1 2 3
K3
FOR
RSTWT
X20 Y5
OUT
NEXT
$ B ENT
STR 1
SHFT F O R D ENT
5 INST# ORN 3
SHFT R S T W T ENT
ORN RST MLR ANDN MLR
$ SHFT I C A ENT
STR 8 2 0
GX F ENT
OUT 5
SHFT N E X T ENT
TMR 4 SET MLR
RLL Instructions
Standard
Goto Subroutine The Goto Subroutine instruction allows a

(GTS) section of ladder logic to be placed outside
(SBR) the main body of the program execute only
K aaa
when needed. There can be a maximum GTS
of 64 GTS instructions and 64 SBR
instructions used in a program. The GTS
instructions can be nested up to 8 levels.
An error E412 will occur if the maximum
limits are exceeded. Typically this will be
used in an application where a block of
program logic may be slow to execute and
is not required to execute every scan. The SBR K aaa
subroutine label and all associated logic is
placed after the End statement in the
program. When the subroutine is called
from the main program, the CPU will
execute the subroutine (SBR) with the
same constant number (K) as the GTS
instruction which called the subroutine.
By placing code in a subroutine it is only
scanned and executed when needed
since it resides after the End instruction.
Code which is not scanned does not
impact the overall scan time of the
program.
aaa
Constant K 1FFFF
Subroutine Return When a Subroutine Return is executed in

(RT) the subroutine the CPU will return to the
point in the main body of the program from
which it was called. The Subroutine Return
RT
is used as termination of the subroutine
which must be the last instruction in the
subroutine and is a stand alone instruction
(no input contact on the rung).
Subroutine Return The Subroutine Return Conditional

Conditional instruction is a optional instruction used
(RTC) with a input contact to implement a
conditional return from the subroutine. The
Rll Instructions
RTC
Subroutine Return (RT) is still required for
Standard
termination of the Subroutine.

In the following example, when X1 is on, Subroutine K3 will be called. The CPU will
jump to the Subroutine Label K3 and the ladder logic in the subroutine will be
executed. If X35 is on the CPU will return to the main program at the RTC instruction.
If X35 is not on Y0Y17 will be reset to off and then the CPU will return to the main
body of the program.
DirectSOFT Display X1 K3
GTS
C0
LD
K10
S
S
S
END
SBR K3
X20 Y5
OUTI
X21 Y10
OUTI
X35
RTC
X35 Y0 Y17
RSTI
RT
$ B ENT
STR 1
SHFT G T S D ENT
6 MLR RST 3
S
S
SHFT E N D ENT
4 TMR 3
SHFT S SHFT B R D ENT

RST 1 ORN 3
$ SHFT I C A ENT
STR 8 2 0
GX SHFT I F ENT
OUT 8 5
$ SHFT I C B ENT
STR 8 2 1
GX SHFT I B A ENT
OUT 8 1 0
$ SHFT I D F ENT
STR 8 3 5
SHFT R T C ENT
ORN MLR 2
RLL Instructions
SP SHFT I D F ENT
STRN 8 3 5
Standard
S SHFT I A B H ENT
RST 8 0 1 7
SHFT R T ENT
ORN MLR
In the following example, when X1 is on, Subroutine K3 will be called. The CPU will
jump to the Subroutine Label K3 and the ladder logic in the subroutine will be
executed. The CPU will return to the main body of the program after the RT
instruction is executed.
DirectSOFT
X1 K3
GTS
S
S
S
END
SBR K3
X20 Y5
OUT
X21 Y10
OUT
RT
$ B ENT
STR 1
SHFT G T S D ENT
6 MLR RST 3
S
S
SHFT E N D ENT
4 TMR 3
SHFT S SHFT B R D ENT

RST 1 ORN 3
$ SHFT I C A ENT
STR 8 2 0
GX F ENT
OUT 5
$ SHFT I C B ENT
STR 8 2 1
GX B A ENT
OUT 1 0
SHFT R T ENT
Rll Instructions
ORN MLR
Standard
Master Line Set The Master Line Set instruction allows the
(MLS) program to control sections of ladder logic K aaa
by forming a new power rail controlled by MLS
the main left power rail. The main left rail is
always master line 0. When a MLS K1
instruction is used, a new power rail is
created at level 1. Master Line Sets and
Master Line Resets can be used to nest
power rails up to seven levels deep.
aaa
Constant K 17
Master Line Reset The Master Line Reset instruction marks

(MLR) the end of control for the corresponding K aaa
MLS instruction. The MLR reference is one MLR
less than the corresponding MLS.
aaa
Constant K 07
Understanding The Master Line Set (MLS) and Master Line Reset (MLR) instructions allow you to
Master Control quickly enable (or disable) sections of the RLL program. This provides program
Relays control flexibility. The following example shows how the MLS and MLR instructions
operate by creating a sub power rail for control logic.
X0 MLS When contact X0 is on, logic under the first MLS

will be executed.
K1
X1 Y7
OUT
X2 MLS When contact X2 and X0 is on, logic

under the second MLS will be
K2 executed.
X3
RLL Instructions
MLR MLR The MLR instructions note the end of the Master Control area. (They will be entered in
Standard
adjacent addresses.)
K0 K1
X10
MLS/MLR Example In the following MLS/MLR example logic between the first MLS K1 (A) and MLR K0
(B) will function only if input X0 is on. The logic between the MLS K2 (C) and MLR K1
(D) will function only if input X10 and X0 is on. The last rung is not controlled by either
of the MLS coils.
X0 K1
A $ A ENT
MLS STR 0
Y B ENT
X1 C0 MLS 1
OUT $ B ENT
STR 1
X2 C1 GX SHFT C A ENT
OUT 2 0
OUT
$ C ENT
STR 2
X3 Y0
GX SHFT C B ENT
OUT OUT 2 1
$ D ENT
X10 STR 3
K2 C
GX A ENT
MLS
OUT 0
X5 $ B A ENT
Y1
STR 1 0
OUT Y C ENT
MLS 2
X4 Y2 $ F ENT
STR 5
OUT
GX B ENT
OUT 1
K1 D
$ E ENT
MLR STR 4
GX C ENT
X5 C2 OUT 2
OUT T B ENT
MLR 1
X6 Y3 $ F ENT
STR 5
OUT
GX SHFT C C ENT
OUT 2 2
K0
B
$ G ENT
MLR STR 6
GX D ENT
X7 Y4 OUT 3
OUT T A ENT
MLR 0
$ H ENT
STR 7
GX E C ENT
OUT 4 2
Rll Instructions
Standard
Interrupt The Interrupt instruction allows a section of

(INT) ladder logic to be placed below the main
body of the program and executed only INT O
when needed. High-Speed I/O Modes 10,
20, and 40 can generate an interrupt. With
Mode 40, you may select an external
interrupt (input X0), or a time-based
interrupt (5999 mS).
INT 1
Typically, interrupts are used in an application when a fast response to an input is

needed or a program section must execute faster than the normal CPU scan. The
interrupt label and all associated logic must be placed after the End statement in the
program. When an interrupt occurs, the CPU will complete execution of the current
instruction it is processing in ladder logic, then execute the interrupt routine. After
interrupt routine execution, the ladder program resumes from the point at which it
was interrupted.
See Chapter 3, the section on Mode 40 (Interrupt) Operation for more details on
interrupt configuration. In the DL05, only one hardware interrupt is available.
Constant O 0, 1
Interrupt Return An Interrupt Return is normally executed as

(IRT) the last instruction in the interrupt routine. It
returns the CPU to the point in the main IRT
program from which it was called. The
Interrupt Return is a stand-alone
instruction (no input contact on the rung).
Interrupt Return The Interrupt Return Conditional
Conditional instruction is a optional instruction used
(IRTC) with an input contact to implement a
condtional return from the interrupt IRTC
routine. The Interrupt Return is required to
terminate the interrupt routine.
RLL Instructions
Standard
Enable Interrupts The Enable Interrupt instruction is placed in

(ENI) the main ladder program (before the End
instruction), enabling the interrupt. The ENI
interrupt remains enabled until the program
executes a Disable Interrupt instruction.
Disable Interrupts A Disable Interrupt instruction in the main

(DISI) body of the application program (before
the End instruction) will disable the DISI
interupt (either extenal or timed). The
interrupt remains disabled until the
program executes an Enable Interrupt
instruction.
External Interrupt In the following example, we do some initialization on the first scan, using the
Program Example first-scan contact SP0. The interrupt feature is the HSIO Mode 40. Then we
configure X0 as the external interrupt by writing to its configuration register, V7634.
See Chapter 3, Mode 40 Operation for more details.
During program execution, when X2 is on the interrupt is enabled. When X2 is off the
interrupt will be disabled. When an interrupt signal (X0) occurs the CPU will jump to
the interrupt label INT O 0. The application ladder logic in the interrupt routine will be
performed. The CPU will return to the main body of the program after the IRT
instruction is executed.
SP0 LD Load the constant value
(K40) into the lower 16 bits $ SHFT SP A ENT
K40
of the accumulator STR STRN 0
SHFT L D SHFT K E A ENT

OUT Copy the value in the lower
16 bits of the accumulator to ANDST 3 JMP 4 0
V7633
V7633 GX V H G D D
SHFT ENT
OUT AND 7 6 3 3
LD Load the constant value (K4)
K4 into the lower 16 bits of the L D K E
SHFT SHFT ENT
accumulator ANDST 3 JMP 4
Copy the value in the lower GX SHFT V H G D E ENT

OUT OUT AND 7 6 3 4
V7634 16 bits of the accumulator to
V7634 $ C ENT
STR 2
X2
ENI SHFT E N I ENT
4 TMR 8
X2 SP C ENT
DISI STRN 2
SHFT D I S I ENT
3 8 RST 8
S
S S
S
S E N D
SHFT ENT
END 4 TMR 3
SHFT I N T A ENT
8 TMR MLR 0
INT O0
$ SHFT I B ENT
STR 8 1
X1 Y5
X SHFT I F ENT
SETI SET 8 5
$ SHFT I D ENT
X3 Y7 STR 8 3
SETI
X SHFT I H ENT
SET 8 7
IRT SHFT I R T ENT

8 ORN MLR
RLL Instructions
Standard
Timed Interrupt In the following example, we do some initialization on the first scan, using the
Program Example first-scan contact SP0. The interrupt feature is the HSIO Mode 40. Then we
configure the HSIO timer as a 10 mS interrupt by writing K104 to the configuration
register for X0 (V7634). See Chapter 3, Mode 40 Operation for more details.
When X4 turns on, the interrupt will be enabled. When X4 turns off, the interrupt will
be disabled. Every 10 mS the CPU will jump to the interrupt label INT O 0. The
application ladder logic in the interrupt routine will be performed. If X3 is not on
Y0Y7 will be reset to off and then the CPU will return to the main body of the
program.
X1 LD Load the constant value $ B ENT
(K40) into the lower 16 bits STR 1
K40 of the accumulator
SHFT L D SHFT K E A ENT
ANDST 3 JMP 4 0
OUT Copy the value in the lower GX V H G D D

16 bits of the accumulator to SHFT ENT
OUT AND 7 6 3 3
V7633 V7633
SHFT L D SHFT K B A E ENT
ANDST 3 JMP 1 0 4
LD Load the constant value GX V H G D E

SHFT ENT
(K10) into the lower 16 bits OUT AND 7 6 3 4
K104 of the accumulator
$ E ENT
STR 4
OUT Copy the value in the lower SHFT E N I ENT

16 bits of the accumulator to 4 TMR 8
V7634 V7634
SP E ENT
STRN 4
X4
SHFT D I S I ENT
ENI 3 8 RST 8
S
X4 S
DISI
SHFT E N D ENT
S 4 TMR 3
S I N T A
SHFT ENT
8 TMR MLR 0
END
$ SHFT I C ENT
STR 8 2
INT O0
X SHFT I F ENT
SET 8 5
SP SHFT I D ENT
X2 Y5 STRN 8 3
SETI X SHFT I A H ENT
SET 8 0 7
SHFT I R T ENT
X3 Y0 Y7 8 ORN MLR
RSTI
IRT
Independent Timed Interrupt O1 is also available as an interrupt. This interrupt is independent of the
Interrupt HSIO features. Interrupt O1 uses an internal timer that is configured in V memory
location V7647. The interrupt period can be adjusted from 5 to 9999 mS. Once the
RLL Instructions
interrupt period is set and the interrupt is enabled in the program, the CPU will
Standard
continuously call the interrupt routine based on the time setting in V7647.

Register Required
V7647 High-Speed xxxx (xxxx = timer setting)
Timed Interrupt 5 - 9999 mS (BCD)
Fault The Fault instruction is used to display a

(FAULT) message on the handheld programmer or
in the DirectSOFT status bar. The FAULT
message has a maximum of 23 characters A aaa
and can be either V memory data,
numerical constant data or ASCII text.
To display the value in a V memory location, specify the V memory location in the
instruction. To display the data in ACON (ASCII constant) or NCON (Numerical
constant) instructions, specify the constant (K) value for the corresponding data
label area.
A aaa
Constant K 1FFFF
SP50 On when the FAULT instruction is executed.
Fault Example In the following example when X1 is on,

the message SW 146 will display on the
handheld programmer. The NCONs use SW 146
the HEX ASCII equivalent of the text to
be displayed. (The HEX ASCII for a blank
is 20, a 1 is 31, 4 is 34 ...)

S
S
X1 FAULT $ B ENT
K1 STR 1
SHFT F A U L T B ENT
S 5 0 ISG ANDST MLR 1
S
S
END
S
DLBL E N D
K1 SHFT ENT
4 TMR 3
SHFT D L B L B ENT
ACON
3 ANDST 1 ANDST 1
A SW
SHFT A C O N S W ENT
0 2 INST# TMR RST ANDN
SHFT N C O N C A D B ENT
NCON TMR 2 INST# TMR 2 0 3 1
K 2031
RLL Instructions
SHFT N C O N D E D G ENT
TMR 2 INST# TMR 3 4 3 6
Standard
NCON
K 3436
Data Label The Data Label instruction marks the

(DLBL) beginning of an ASCII / numeric data area.
DLBLs are programmed after the End DLBL K aaa
statement. A maximum of 64 DLBL
instructions can be used in a program.
Multiple NCONs and ACONs can be used
in a DLBL area.
aaa
Constant K 1FFFF
ASCII Constant The ASCII Constant instruction is used

(ACON) with the DLBL instruction to store ASCII
text for use with other instructions. Two ACON
ASCII characters can be stored in an A aaa
ACON instruction. If only one character is
stored in a ACON a leading space will be
inserted.
aaa
ASCII A 09 AZ
Numerical The Numerical Constant instruction is

Constant used with the DLBL instruction to store the
(NCON) HEX ASCII equivalent of numerical data NCON
for use with other instructions. Two digits K aaa
can be stored in an NCON instruction.
aaa
Constant K 0FFFF
RLL Instructions
Standard
Data Label In the following example, an ACON and two NCON instructions are used within a
Example DLBL instruction to build a text message. See the FAULT instruction for information
on displaying messages. The DV-1000 Manual also has information on displaying
messages.
DirectSOFT
S
S
S
END
DLBL
K1
ACON
A SW
NCON
K 2031
NCON
K 3436

S
S
SHFT E N D ENT
4 TMR 3
SHFT D L B L B ENT
3 ANDST 1 ANDST 1
SHFT A C O N S W ENT
0 2 INST# TMR RST ANDN
SHFT N C O N C A D B ENT
SHFT N C O N D E D G ENT
RLL Instructions
Standard
Print Message The Print Message instruction prints the

(PRINT) embedded text or text/data variable
PRINT A aaa
message to the specified communications
port (Port 2 on the DL05 CPU), which must Hello, this is a PLC message
have the communications port configured.
Data Type DL05 Range
A aaa
Constant K 2
You may recall from the CPU specifications in Chapter 3 that the DL05s ports are
capable of several protocols. Port 1 cannot be configured for the non-sequence
portocol. To configure port 2 using the Handheld Programmer, use AUX 56 and
follow the prompts, making the same choices as indicated below on this page. To
configure a port in DirectSOFT, choose the PLC menu, then Setup, then Setup
Secondary Comm Port.
S Port: From the port number list box at the top, choose Port 2.
S Protocol: Click the check box to the left of Non-sequence, and then
youll see the dialog box shown below.
S Baud Rate: Choose the baud rate that matches your printer.
S
RLL Instructions
Stop Bits, Parity: Choose number of stop bits and parity setting to
match your printer.
Standard
S Memory Address: Choose a V-memory address for DirectSOFT to use

to store the port setup information. You will need to reserve 9 words in
V-memory for this purpose. Select Always use for printing if it applies.
Then click the button indicated to send the Port 2 configuration
to the CPU, and click Close. Then see Chapter 3 for port wiring
information, in order to connect your printer to the DL05.
Port 2 on the DL05 has standard RS232 levels, and should work with most printer
serial input connections.
Text element this is used for printing character strings. The character strings are
defined as the character (more than 0) ranged by the double quotation marks. Two
hex numbers preceded by the dollar sign means an 8-bit ASCII character code. Also,
two characters preceded by the dollar sign is interpreted according to the following
table:
# Character code Description

1 $$ Dollar sign ($)
2 $ Double quotation ()
3 $L or $l Line feed (LF)
4 $N or $n Carriage return line feed (CRLF)
5 $P or $p Form feed
6 $R or $r Carriage return (CR)
7 $T or $t Tab
The following examples show various syntax conventions and the length of the
output to the printer.
Example:
Length 0 without character
A Length 1 with character A
Length 1 with blank
$ Length 1 with double quotation mark
$R$L Length 2 with one CR and one LF
$0D$0A Length 2 with one CR and one LF
$$ Length 1 with one $ mark
In printing an ordinary line of text, you will need to include double quotation marks
before and after the text string. Error code 499 will occur in the CPU when the print
instruction contains invalid text or no quotations. It is important to test your PRINT
instruction data during the application development.
The following example prints the message to port 2. We use a PD contact, which
causes the message instruction to be active for just one scan. Note the $N at the end
of the message, which produces a carriage return / line feed on the printer. This
prepares the printer to print the next line, starting from the left margin.
X1 PRINT K2 Print the message to Port 2 when

RLL Instructions
Hello, this is a PLC message.$N X1 makes an off-to-on transition.

Standard
V-memory element this is used for printing V-memory contents in the integer
format or real format. Use V-memory number or V-memory number with : and data
type. The data types are shown in the table below. The Character code must be
capital letters.
NOTE: There must be a space entered before and after the V-memory address to
separate it from the text string. Failure to do this will result in an error code 499.
# Character code Description

1 none 16-bit binary (decimal number)
2 :B 4 digit BCD
3 :D 32-bit binary (decimal number)
4 :DB 8 digit BCD
Example:
V2000 Print binary data in V2000 for decimal number
V2000 : B Print BCD data in V2000
V2000 : D Print binary number in V2000 and V2001 for decimal number
V2000 : D B Print BCD data in V2000 and V2001
Example: The following example prints a message containing text and a variable.
The reactor temperature labels the data, which is at V2000. You can use the : B
qualifier after the V2000 if the data is in BCD format, for example. The final string
adds the units of degrees to the line of text, and the $N adds a carriage return / line
feed.
X1 PRINT K2 Print the message to Port 2

Reactor temperature = V2000 deg. $N when X1 makes an off-to-on
transition.
represents a space
Message will read:
Reactor temperature = 0156 deg
V-memory text element this is used for printing text stored in V-memory. Use the
% followed by the number of characters after V-memory number for representing the
text. If you assign 0 as the number of characters, the print function will read the
character count from the first location. Then it will start at the next V-memory location
and read that number of ASCII codes for the text from memory.
Example:
RLL Instructions
V2000 % 16 16 characters in V2000 to V2007 are printed.

V2000 % 0 The characters in V2001 to Vxxxx (determined by the number
Standard
in V2000) will be printed.

Bit element this is used for printing the state of the designated bit in V-memory or a
relay bit. The bit element can be assigned by the designating point (.) and bit number
preceded by the V-memory number or relay number. The output type is described as
shown in the table below.
# Data format Description

1 none Print 1 for an ON state, and 0 for an
OFF state
2 : BOOL Print TRUE for an ON state, and
FALSE for an OFF state
3 : ONOFF Print ON for an ON state, and OFF
for an OFF state
Example:
V2000 . 15 Prints the status of bit 15 in V2000, in 1/0 format
C100 Prints the status of C100 in 1/0 format
C100 : BOOL Prints the status of C100 in TRUE/FALSE format
C100 : ON/OFF Prints the status of C00 in ON/OFF format
V2000.15 : BOOL Prints the status of bit 15 in V2000 in TRUE/FALSE format
The maximum numbers of characters you can print is 128. The number of characters
for each element is listed in the table below:
Element type Maximum

Characters
Text, 1 character 1
16 bit binary 6
32 bit binary 11
4 digit BCD 4
8 digit BCD 8
Floating point (real number) 12
Floating point (real with exponent) 12
V-memory/text 2
Bit (1/0 format) 1
Bit (TRUE/FALSE format) 5
Bit (ON/OFF format) 3
The handheld programmers mnemonic is PRINT, followed by the DEF field.

RLL Instructions
Special relay flags SP116 and SP117 indicate the status of the DL05 CPU ports
Standard
(busy, or communications error). See the appendix on special relays for a

description.
NOTE: You must use the appropriate special relay in conjunction with the PRINT
command to ensure the ladder program does not try to PRINT to a port that is still
busy from a previous PRINT or WX or RX instruction.
Network Instructions
Read from Network The Read from Network instruction

(RX) causes the master device on a network to
read a block of data from a slave device on
RX
the same network. The function
A aaa
parameters are loaded into the
accumulator and the first and second level
of the stack. Listed below are the program
steps necessary to execute the Read from
Network function.
Step 1: Load the slave address (090 BCD) into the low byte and F2 into the
high byte of the accumulator (the next two instructions push this word down to the
second layer of the stack).
Step 2: Load the number of bytes to be transferred into the accumulator (the
next instruction pushes this word onto the top of the stack).
Step 3: Load the starting Master CPU address into the accumulator. This is the
memory location where the data read from the slave will be put. This parameter
requires a HEX value.
Step 4: Insert the RX instruction which specifies the starting V memory location
(Aaaa) where the data will be read from in the slave.
Helpful Hint: For parameters that require HEX values, the LDA instruction can
be used to convert an octal address to the HEX equivalent and load the value into
the accumulator.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
Program Memory $ 02047 (2K program mem.)

Standard RLL
Instructions
In the following example, when X1 is on and the port busy relay SP116 (see special
relays) is not on, the RX instruction will access port 2 operating as a master. Ten
consecutive bytes of data (V2000 V2004) will be read from a CPU at station
address 5 and copied into V memory locations V2300V2304 in the CPU with the
master port.
DirectSOFT
X1 SP116 LD
KF205
The constant value KF205

Master Slave
specifies the port number (2) CPU CPU
and the slave address (5)
S S
LD S S
K10
V2277 X X X X X X X X V1777
The constant value K10 V2300 3 4 5 7 3 4 5 7 V2000
specifies the number of
bytes to be read V2301 8 5 3 4 8 5 3 4 V2001
V2302 1 9 3 6 1 9 3 6 V2002
LDA
V2303 9 5 7 1 9 5 7 1 V2003
O 2300
V2304 1 4 2 3 1 4 2 3 V2004
Octal address 2300 is
converted to 4C0 HEX and V2305 X X X X X X X X V2005
loaded into the accumulator.
V2300 is the starting S S
location for the Master CPU S S
where the specified data will
be read into
RX
V2000

location in the for the Slave
CPU where the specified
data will be read from
$ B ENT
STR 1
W SHFT SP B B G ENT
ANDN STRN 1 1 6
SHFT L D SHFT K SHFT F SHFT C A F ENT

ANDST 3 JMP 5 2 0 5
SHFT L D SHFT K B A ENT

ANDST 3 JMP 1 0
SHFT L D A C D A A ENT
ANDST 3 0 2 3 0 0
SHFT R X C A A A ENT
ORN SET 2 0 0 0
Standard RLL
Instructions
Write to Network The Write to Network instruction is used to

(WX) write a block of data from the master
device to a slave device on the same
network. The function parameters are WX
A aaa
loaded into the accumulator and the first
and second level of the stack. Listed below
are the program steps necessary to
execute the Write to Network function.
Step 1: Load the slave address (090 BCD) into the low byte and F2 into the
high byte of the accumulator (the next two instructions push this word down to the
second layer of the stack).
Step 2: Load the number of bytes to be transferred into the accumulator (the
next instruction pushes this word onto the top of the stack).
Step 3: Load the starting Master CPU address into the accumulator. This is the
memory location where the data will be written from. This parameter requires a
HEX value.
Step 4: Insert the WX instruction which specifies the starting V memory location
(Aaaa) where the data will be written to in the slave.
Helpful Hint: For parameters that require HEX values, the LDA instruction can
be used to convert an octal address to the HEX equivalent and load the value into
the accumulator.
A aaa
Inputs X 0377
Outputs Y 0377
Stage S 0377
Timer T 0177
Counter CT 0177
Program Memory $ 02048 (2K program mem.)
Standard RLL
Instructions
In the following example when X1 is on and the module busy relay SP116 (see
special relays) is not on, the WX instruction will access port 2 operating as a master.
Ten consecutive bytes of data is read from the Master CPU and copied to V memory
locations V2000V2004 in the slave CPU at station address 5.
DirectSOFT
X1 SP116 LD
KF205
The constant value KF205

Master Slave
specifies the port number (2) CPU CPU
and the slave address (5)
S S
LD S S
K10
V2277 X X X X X X X X V1777
The constant value K10 V2300 3 4 5 7 3 4 5 7 V2000
specifies the number of
bytes to be written V2301 8 5 3 4 8 5 3 4 V2001
V2302 1 9 3 6 1 9 3 6 V2002
LDA
V2303 9 5 7 1 9 5 7 1 V2003
O 2300
V2304 1 4 2 3 1 4 2 3 V2004
Octal address 2300 is
converted to 4C0 HEX and V2305 X X X X X X X X V2005
loaded into the accumulator.
V2300 is the starting S S
location for the Master CPU S S
where the specified data will
be read from.
WX
V2000

location in the for the Slave
CPU where the specified
data will be written to
$ B ENT
STR 1
W SHFT SP B C E ENT
ANDN STRN 1 1 6
SHFT L D SHFT K F C A F ENT

SHFT SHFT
ANDST 3 JMP 5 2 0 5
SHFT L D SHFT K B A ENT

ANDST 3 JMP 1 0
SHFT L D A C D A A ENT
ANDST 3 0 2 3 0 0
SHFT W X C A A A ENT
ANDN SET 2 0 0 0
Standard RLL
Instructions
16
Drum Instruction
Programming
Introduction
Step Transitions
Overview of Drum Operation
Drum Control Techniques
Drum Instruction
EDrum Instruction
62
Drum Instruction Programming
Introduction
Drum Instruction
Programming
Purpose The Event Drum (EDRUM) instruction in the DL05 CPU electronically simulates an
electro-mechanical drum sequencer. The instruction offers enhancements to the
basic principle, which we describe first.
Drum Terminology Drum instructions are best suited for repetitive processes that consist of a finite
number of steps. They can do the work of many rungs of ladder logic with elegant
simplicity. Therefore, drums can save a lot of programming and debugging time.
We introduce some terminology associated with the drum instruction by describing
the original mechanical drum shown below. The mechanical drum generally has
pegs on its curved surface. The pegs are populated in a particular pattern,
representing a set of desired actions for machine control. A motor or solenoid rotates
the drum a precise amount at specific times. During rotation, stationary wipers sense
the presence of pegs (present = on, absent = off). This interaction makes or breaks
electrical contact with the wipers, creating electrical outputs from the drum. The
outputs are wired to devices on a machine for On/Off control.
Drums usually have a finite number of positions within one rotation, called steps.
Each step represents some process step. At powerup, the drum resets to a
particular step. The drum rotates from one step to the next based on a timer, or on
some external event. During special conditions, a machine operator can manually
increment the drum step using a jog control on the drums drive mechanism. The
contact closure of each wiper generates a unique on/off pattern called a sequence,
designed for controlling a specific machine. Because the drum is circular, it
automatically repeats the sequence once per rotation. Applications vary greatly, and
a particular drum may rotate once per second, or as slowly as once per week.
Pegs
Wipers
Drum
Outputs
Electronic drums provide the benefits of mechanical drums and more. For example,
they have a preset feature that is impossible for mechanical drums: The preset
function lets you move from the present step directly to any other step on command!
63
Drum Chart For editing purposes, the electronic drum is presented in chart form in DirectSOFT
Representation and in this manual. Imagine slicing the surface of a hollow drum cylinder between
Drum Instruction
two rows of pegs, then pressing it flat. Now you can view the drum as a chart as
Programming
shown below. Each row represents a step, numbered 1 through 16. Each column
represents an output, numbered 0 through 15 (to match word bit numbering). The
solid circles in the chart represent pegs (On state) in the mechanical drum, and the
open circles are empty peg sites (Off state).
OUTPUTS
STEP 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 f F f F f f F f f f F f f F f f
2 f F f F F f F f f f f F f f F f
3 f F F F F f F F f f f f f f f f
4 F F f F F f F f F f f f f f f F
5 f f f F f f F f F f F f F f f F
6 f f f F f f F f F f F f F F f F
7 F f f F f f F F F F f F F F f F
8 F f F f f F f F F f f f F f f F
9 f f f f f f f F F f f f F f f f
10 f f f f f f f F F F f f f f f f
11 F f f f F f f f f F f f f f F f
12 f F f f F F f f F f F F f F F f
13 f f F f f f f f f f f F F f F f
14 f f f f f f f F f f f F F f F F
15 F f f f f F f F f F f F f f F F
16 f f F f f f f F f F f F F f f F
Output Sequences The mechanical drum sequencer derives its name from sequences of control
changes on its electrical outputs. The following figure shows the sequence of On/Off
controls generated by the drum pattern above. Compare the two, and you will find
that they are equivalent! If you can see their equivalence, you are well on your way to
understanding drum instruction operation.
Step
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Output
1
0 0
1
1 0
1
2 0
1
3 0
1
4 0
1
5 0
1
6 0
1
7 0
1
8 0
1
9 0
1
10 0
1
11 0
1
12 0
1
13 0
1
14 0
1
15 0
64
Step Transitions
Drum Instruction
Programming
Drum Instruction There are two types of Drum instructions in the DL05 CPU:
Types S Timed Drum with Discrete Outputs (DRUM)
S Time and Event Drum with Discrete Outputs (EDRUM)
The two drum instructions include time-based step transitions, and the EDRUM
includes event-based transitions as well. Each drum has 16 steps, and each step
has 16 outputs. Refer to the figure below. Each output can be either an X, Y, or C coil,
offering programming flexibility. We assign Step 1 an arbitrary unique output pattern
(f= Off, F= On) as shown. When programming a drum instruction, you also
determine both the output assignment and the On/Off state (pattern) at that time. All
steps use the same output assignment, but each step may have its own unique
output pattern.
Timer-Only Drums move from one step to another based on time and/or an external event
Transitions (input). Each step has its own transition condition which you assign during the drum
instruction entry. The figure below shows how timer-only transitions work.
Step 1 Outputs: F f f f F f F f f f f F F f f f
Increment
count timer
No Has counts per

step expired?
Yes
Step 2 Outputs: f f f F f f f f F F f F f f F F
Use next transition criteria
The drum stays in Step 1 for a specific duration (user-programmable). The timebase
of the timer is programmable, from 0.01 seconds to 99.99 seconds. This establishes
the resolution, or the duration of each tick of the clock. Each step uses the same
timebase, but has its own unique counts per step, which you program. When the
counts for Step 1 have expired, then the drum moves to Step 2. The outputs change
immediately to match the new pattern for Step 2.
The drum spends a specific amount of time in each step, given by the formula:
Time in step = 0.01 seconds X Timebase x Counts per step

65
For example, if you program a 5 second time base and 12 counts for Step 1, then the
drum will spend 60 seconds in Step 1. The maximum time for any step is given by the
Drum Instruction
formula:
Programming
Max Time per step = 0.01 seconds X 9999 X 9999
= 999,800 seconds = 277.7 hours = 11.6 days
NOTE: When first choosing the timebase resolution, a good rule of thumb is to make
it about 1/10 the duration of the shortest step in your drum. Then you will be able to
optimize the duration of that step in 10% increments. Other steps with longer
durations allow optimizing by even smaller increments (percentage-wise). Also,
note that the drum instruction executes once per CPU scan. Therefore, it is pointless
to specify a drum timebase that is much faster than the CPU scan time.
Timer and Event Step transitions may also occur based on time and/or external events. The figure
Transitions below shows how step transitions work in these cases.
No Is Step event
true?
Yes
Increment
count timer
No Has step
counts expired?
Yes
When the drum enters Step 1, it sets the output pattern as shown. Then it begins
polling the external input programmed for that step. You can define event inputs as
X, Y, or C discrete point types. Suppose we select X0 for the Step 1 event input. If X0
is off, then the drum remains in Step 1. When X0 is On, the event criteria is met and
the timer increments. The timer increments as long as the event (X0) remains true.
When the counts for Step 1 have expired, then the drum moves to Step 2. The
outputs change immediately to match the new pattern for Step 2.
66
Event-Only Step transitions do not require both the event and the timer criteria programmed for
Transitions each step. You have the option of programming just one of the two, and even mixing
Drum Instruction
transition types among all the steps of the drum. For example, you might want Step 1
Programming
to transition on an event, Step 2 to transition on time only, and Step 3 to transition on

both time and an event. Furthermore, you may elect to use only part of the 16 steps,
and only part of the 16 outputs.
No Is Step event
true?
Yes
Counter Each drum instruction uses the resources of four counters in the CPU. When
Assignments programming the drum instruction, you select the first counter number. The drum
also uses the next three counters automatically. The counter bit associated with the
first counter turns on when the drum has completed its cycle, going off when the
drum is reset. These counter values and the counter bit precisely indicate the
progress of the drum instruction, and can be monitored by your ladder program.
Suppose we program a timer drum to have Counter Assignments
8 steps, and we select CT10 for the
CT10 Counts in step V1010 1528
counter number (remember, counter
numbering is in octal). Counter usage is CT11 Timer Value V1011 0200
shown to the right. The right column holds CT12 Preset Step V1012 0001
typical values, interpreted below. CT13 Current Step V1013 0004
CT10 shows that we are at the 1528th count in the current step, which is step 4
(shown in CT13). If we have programmed step 4 to have 3000 counts, then the step
is just over half completed. CT11 is the count timer, shown in units of 0.01 seconds.
So, each least-significant-digit change represents 0.01 seconds. The value of 200
means that we have been in the current count (1528) for 2 seconds (0.01 x 100).
Finally, CT12 holds the preset step value which was programmed into the drum
instruction. When the drums Reset input is active, it presets to step 1 in this case.
The value of CT12 changes only if the ladder program writes to it, or the drum
instruction is edited and the program is restarted. Counter bit CT10 turns on when
the drum cycle is complete, and turns off when the drum is reset.
67
Last Step The last step in a drum sequence may be any step number, since partial drums are
Completion valid. Refer to the following figure. When the transition conditions of the last step are
Drum Instruction
met, the drum sets the counter bit corresponding to the counter named in the drum
Programming
instruction box (such as CT0). Then it moves to a final drum complete state. The
drum outputs remain in the pattern defined for the last step. Having finished a drum
cycle, the Start and Jog inputs have no effect at this point.
The drum leaves the drum complete state when the Reset input becomes active (or
on a program-torun mode transition). It resets the drum complete bit (such as CT0),
and then goes directly to the appropriate step number defined as the preset step.
Last step Outputs: F F F f f f F f f F f F F F f F
No Are transition (Timer and/or

conditions met? Event criteria)
Yes
Set
Set Drum Complete bit
CT0 = 1
Complete Outputs: F F F f f f F f f F f F F F f F
No Reset Input
Active?
Yes
Reset Reset Drum Complete bit

CT0 = 0
Go to Preset Step
68
Overview of Drum Operation

Drum Instruction
Programming
Drum Instruction The drum instruction utilizes various inputs and outputs in addition to the drum
Block Diagram pattern itself. Refer to the figure below.
Inputs DRUM INSTRUCTION Outputs

Block Diagram
Start
Realtime Jog
Inputs
(from ladder) Reset
Drum
Preset Step f f F f f f
Step f f f f f f Final Drum
f f f f F f
Counts/Step Step Pointer F F f F
Outputs
F f
Control f F F f F f
Timebase f F F f F F
f F f f F F
Programming f F F f f F
Selections Events
Counter #
Pattern
Counter Assignments
CT0 Counts in step V1000 xxxx
CT1 Timer Value V1001 xxxx
CT2 Preset Step V1002 xxxx
CT3 Current Step V1003 xxxx
The drum instruction accepts several inputs for step control, the main control of the
drum. The inputs and their functions are:
S Start The Start input is effective only when Reset is off. When Start is
on, the drum timer runs if it is in a timed transition, and the drum looks
for the input event during event transitions. When Start is off, the drum
freezes in its current state (Reset must remain off), and the drum
outputs maintain their current on/off pattern.
S Jog The jog input is only effective when Reset is off (Start may be
either on or off). The jog input increments the drum to the next step on
each off-to-on transition (only EDRUM supports the jog input).
S Reset The Reset input has priority over the Start input. When Reset is
on, the drum moves to its preset step. When Reset is off, then the Start
input operates normally.
S Preset Step A step number from 1 to 16 that you define (typically is
step 1). The drum moves to this step whenever Reset is on, and
whenever the CPU first enters run mode.
69
S Counts/Step The number of timer counts the drum spends in each

step. Each step has its own counts parameter. However, programming
Drum Instruction
the counts/step is optional.
Programming
S Timer Value the current value of the counts/step timer.
S Counter # The counter number specifies the first of four consecutive
counters which the drum uses for step control. You can monitor these to
determine the drums progress through its control cycle. The DL05 has
128 counters (CT0 CT177 in octal).
S Events Either an X, Y, C, S, T, or CT type discrete point serves as
step transition inputs. Each step has its own event. However,
programming the event is optional.
WARNING: The outputs of a drum are enabled any time the CPU is in Run Mode.
The Start Input does not have to be on, and the Reset input does not disable the
outputs. Upon entering Run Mode, drum outputs automatically turn on or off
according to the pattern of the current step of the drum. This initial step number
depends on the counter memory configuration: non-retentive versus retentive.
Powerup State of The choice of the starting step on powerup and program-to-run mode transitions are
Drum Registers important to consider for your application. Please refer to the following chart. If the
counter memory is configured as non-retentive, the drum is initialized the same way
on every powerup or program-to-run mode transition. However, if the counter
memory is configured to be retentive, the drum will stay in its previous state.
Counter Num- Function Initialization on Powerup

ber
Non-Retentive Case Retentive Case
CT(n) Current Step Initialize = 0 Use Previous (no
Count change)
CT(n + 1) Counter Timer Initialize = 0 Use Previous (no
Value change)
CT(n + 2) Preset Step Initialize = Preset Step # Use Previous (no
change)
CT(n + 3) Current Step # Initialize = Preset Step # Use Previous (no
change)
Applications with relatively fast drum cycle times typically will need to be reset on
powerup, using the non-retentive option. Applications with relatively long drum cycle
times may need to resume at the previous point where operations stopped, using the
retentive case. The default option is the retentive case. This means that if you
initialize scratchpad V-memory, the memory will be retentive.
610
Drum Control Techniques

Drum Instruction
Programming
Drum Now we are ready to put together the X0

Start
Control Inputs concepts on the previous pages and X1
demonstrate general control of the drum Jog Setup
Info. Outputs
instruction box. The drawing to the right X2
Reset
shows a simplified generic drum
f f F f f f
instruction. Inputs from ladder logic Steps f f f f f f
control the Start, Jog, and Reset Inputs f f f f F f
F F f F F f
(only the EDRUM instruction supports the f F F f F f
Jog Input). The first counter bit of the drum f F F f F F
f F f f F F
(CT0, for example) indicates the drum f F F f f F
cycle is done.
The timing diagram below shows an arbitrary timer drum input sequence and how
the drum responds. As the CPU enters Run mode it initializes the step number to the
preset step number (typically it is Step 1). When the Start input turns on the drum
begins running, waiting for an event and/or running the timer (depends on the setup).
After the drum enters Step 2, Reset turns On while Start is still On. Since Reset has
priority over Start, the drum goes to the preset step (Step 1). Note that the drum is
held in the preset step during Reset, and that step does not run (respond to events or
run the timer) until Reset turns off.
After the drum has entered step 3, the Start input goes off momentarily, halting the
drums timer until Start turns on again.
Start Reset Hold Resume Drum Reset

drum drum drum drum Complete drum
Inputs
1
Start 0
1
Jog 0
1
Reset 0
Drum Status
1 1 2 1 1 2 3 3 4 ... 15 16 16 16 1 1
Step #
1
Drum
Complete (CT0) 0
1
Outputs (x 16) 0
When the drum completes the last step (Step 16 in this example), the Drum
Complete bit (CT0) turns on, and the step number remains at 16. When the Reset
input turns on, it turns off the Drum Complete bit (CT0), and forces the drum to enter
the preset step.
NOTE: The timing diagram shows all steps using equal time durations. Step times
can vary greatly, depending on the counts/step programmed.
611
In the figure below, we focus on how the Jog input works on event drums. To the left
of the diagram, note that the off-to-on transitions of the Jog input increments the
Drum Instruction
step. Start may be either on or off (however, Reset must be off). Two jogs takes the
Programming
drum to step three. Next, the Start input turns on, and the drum begins running
normally. During step 6 another Jog input signal occurs. This increments the drum to
step 7, setting the timer to 0. The drum begins running immediately in step 7,
because Start is already on. The drum advances to step 8 normally.
As the drum enters step 14, the Start input turns off. Two more Jog signals moves the
drum to step 16. However, note that a third Jog signal is required to move the drum
through step 16 to drum complete. Finally, a Reset input signal arrives which forces
the drum into the preset step and turns off the drum complete bit.
Jog Reset Jog Jog Drum

drum drum drum drum Complete
Inputs
1
Start 0
1
Jog 0
1
Reset 0
Drum Status
1 2 3 3 3 4 5 6,7 8 ... 14 15 16 16 16 1
Step #
1
Drum
Complete (CT0) 0
1
Outputs (x 16) 0
Self-Resetting Applications often require drums that X0

Start
Drum automatically start over once they Setup
X1 Outputs
complete a cycle. This is easily Start Info.
accomplished, using the drum complete X2 Steps f f F f f f
bit. In the figure to the right, the drum Reset f f f f f f
f f f f F f
instruction setup is for CT0, so we logically CT0 F F f F F f
f F F f F f
OR the drum complete bit (CT0) with the f F F f F F
Reset input. When the last step is done, f F f f F F
f F F f f F
the drum turns on CT0 which resets itself
to the preset step, also resetting CT0.
Contact X2 still works as a manual reset.
Initializing Drum The outputs of a drum are enabled any time the CPU is in run mode. On
Outputs program-to-run mode transitions, the drum goes to the preset step, and the outputs
energize according to the pattern of that step. If your application requires all outputs
to be off at powerup, make the preset step in the drum a reset step, with all outputs
off.
Using Complex Each event-based transition accepts only one contact reference for the event.
Event Step However, this does not limit events to just one contact. Just use a control relay
Transitions contact such as C0 for the step transition event. Elsewhere in ladder logic, you may
use C0 as an output coil, making it dependent on many other events (contacts).
612
Drum Instruction
Drum Instruction
Programming
The DL05 drum instructions may be programmed using DirectSOFT or for the
EDRUM instruction only you can use a handheld programmer (firmware version
v1.8 or later. This section covers entry using DirectSOFT for all instructions plus the
handheld mnemonics for the EDRUM instruction.
Timed Drum with The Timed Drum with Discrete Outputs is the most basic of the DL05s drum
Discrete Outputs instructions. It operates according to the principles covered on the previous pages.
(DRUM) Below is the instruction in chart form as displayed by DirectSOFT.
Counter Number Step Preset
Discrete Output Assignment
Timebase
DRUM CT aaa 15 0
Start
Step Preset K bb (Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff)
Control
(Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff) (Fffff)
Inputs Reset 0.01 sec/Count K cccc
Step # Counts
1 Kdddd f f f f f f f f f f f f f f f f
Step Number 4 Kdddd f f f f f f f f f f f f f f f f
Counts per Step 6 Kdddd f f f f f f f f f f f f f f f f
Output Pattern 9 Kdddd f f f f f f f f f f f f f f f f
f= Off, F= On 10 Kdddd f f f f f f f f f f f f f f f f
The Timed Drum features 16 steps and 16 outputs. Step transitions occur only on a
timed basis, specified in counts per step. Unused steps must be programmed with
counts per step = 0 (this is the default entry). The discrete output points may be
individually assigned as X, Y, or C types, or may be left unused. The output pattern
may be edited graphically with DirectSOFT.
Whenever the Start input is energized, the drums timer is enabled. It stops when the
last step is complete, or when the Reset input is energized. The drum enters the
preset step chosen upon a CPU program-to-run mode transition, and whenever the
Reset input is energized.
Drum Parameters Field Data Types Ranges

Counter Number aaa 0 174
Preset Step bb K 1 16
Timer base cccc K 0 99.99 seconds
Counts per step dddd K 0 9999
Discrete Outputs Fffff X, Y, C see page 428
613
Drum instructions use four counters in the CPU. The ladder program can read the
counter values for the drums status. The ladder program may write a new preset
Drum Instruction
step number to CT(n+2) at any time. However, the other counters are for monitoring
Programming
purposes only.
Counter Number Ranges of (n) Function Counter Bit Function

CT(n) 0 174 Counts in step CTn = Drum Complete
CT( n+1) 1 175 Timer value CT(n+1) = (not used)
CT( n+2) 2 176 Preset Step CT(n+2) = (not used)
CT( n+3) 3 177 Current Step CT(n+3) = (not used)
The following ladder program shows the DRUM instruction in a typical ladder
program, as shown by DirectSOFT. Steps 1 through 10 are used, and twelve of the
sixteen output points are used. The preset step is step 1. The timebase runs at (K10
x 0.01) = 0.1 second per count. Therefore, the duration of step 1 is (25 x 0.1) = 2.5
seconds. In the last rung, the Drum Complete bit (CT0) turns on output Y0 upon
completion of the last step (step 10). A drum reset also resets CT0.
DirectSOFT Display
DRUM CT 0 15 0
X0
Start
Step Preset: K1 ( ) ( ) (C14) (Y10) (C4) (Y5) (Y13) (C7)
( ) ( ) (C30) (Y20) (C2) (Y6) (Y42) (C10)
X1
Reset 0.01 sec/Count: K 10
Step # Counts
1 K0025 f f f f F f f F F f f F f f f F
2 K0020 f f f f F f F f f F f f f f F f
3 K1500 f f f f f F f F f F f f F f f F
4 K0045 f f f f f f F f F f f F f f F f
5 K0180 f f f f f F f f f F f f f F f f
6 K0923 f f f f F f f F f f F f f F f F
7 K1200 f f f f F f F f F f F f f f F f
8 K8643 f f f f f F f f F f F f f f F F
9 K1200 f f f f F F F F F F F F F F F F
10 K4000 f f f f f F f F f F f F f F f f
11 f f f f f f f f f f f f f f f f
CT0 Y0
Drum Complete OUT
614
Event Drum The Event Drum (EDRUM) features time-based and event-based step transitions. It
(EDRUM) operates according to the general principles of drum operation covered in the
Drum Instruction
beginning of this chapter. Below is the instruction as displayed by DirectSOFT.

Programming
Counter Number
Step Preset
Timebase Discrete Output Assignment
Start EDRUM CT aa 15 0
Jog Step Preset: K bb (Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff)
Control
(Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff) (Ffff)
Inputs 0.01 sec/Count: K cccc
Reset
Step # Counts Event
1 Kdddd Eeeee f f f f f f f f f f f f f f f f
Step Number 4 Kdddd Eeeee f f f f f f f f f f f f f f f f
Counts per Step 6 Kdddd Eeeee f f f f f f f f f f f f f f f f
Event per step 9 Kdddd Eeeee f f f f f f f f f f f f f f f f
Output Pattern 11 Kdddd Eeeee f f f f f f f f f f f f f f f f
f= Off, F= On 12 Kdddd Eeeee f f f f f f f f f f f f f f f f
The Event Drum features 16 steps and 16 discrete outputs. Step transitions occur on
timed and/or event basis. The jog input also advances the step on each off-to-on
transition. Time is specified in counts per step, and events are specified as discrete
contacts. Unused steps and events must be left blank. The discrete output points
may be individually assigned.
Whenever the Start input is energized, the drums timer is enabled. As long as the
event is true for the current step, the timer runs during that step. When the step count
equals the counts per step, the drum transitions to the next step. This process stops
when the last step is complete, or when the Reset input is energized. The drum
enters the preset step chosen upon a CPU program-to-run mode transition, and
whenever the Reset input is energized.
Drum Parameters Field Data Types Ranges
Counter Number aa 0 174
Preset Step bb K 1 16
Timer base cccc K 0 99.99 seconds
Counts per step dddd K 0 9999
Event eeee X, Y, C, S, T, CT see page 428
Discrete Outputs ffff X, Y, C see page 428
615
Drum instructions use four counters in the CPU. The ladder program can read the
counter values for the drums status. The ladder program may write a new preset
Drum Instruction
step number to CT(n+2) at any time. However, the other counters are for monitoring
Programming
purposes only.
Counter Number Ranges of (n) Function Counter Bit Function

CT(n) 0 174 Counts in step CTn = Drum Complete
C( n+1) 1 175 Timer value CT(n+1) = (not used)
CT( n+2) 2 176 Preset Step CT(n+2) = (not used)
CT( n+3) 3 177 Current Step CT(n+3) = (not used)
The following ladder program shows the EDRUM instruction in a typical ladder
program, as shown by DirectSOFT. Steps 1 through 11 are used, and all sixteen
output points are used. The preset step is step 1. The timebase runs at (K10 x 0.01) =
0.1 second per count. Therefore, the duration of step 1 is (1 x 0.1) = 0.1 second. Note
that step 1 is time-based only (event is left blank). And, the output pattern for step 1
programs all outputs off, which is a typically desirable powerup condition. In the last
rung, the Drum Complete bit (CT4) turns on output Y0 upon completion of the last
step (step 11). A drum reset also resets CT4.
DirectSOFT Display
X0
Start EDRUM CT 4 15 0
X1
Jog Step Preset K1 (C34) (Y6) (C14) (Y0) (C4) (Y5) (Y1) (C7)
(Y3) (Y7) (C30) (Y2) (C2) (Y6) (Y4) (C10)
X2 0.01 sec/Count: K 10
Reset
Step # Counts Event
1 K0001 f f f f f f f f f f f f f f f f
2 K0020 Y4 F f f F F f f f f f f F f f F f
3 K0150 X1 f f F f F f f f F f f F f F f f
4 K0048 X2 f F f f f F f f f F F F f F F f
5 K0180 C0 f F f F f f f F f F F f F f f F
6 K0923 C1 F f f F f f F F f F f f f f F F
7 K0120 X0 f F f f f F f f F f f f f F F f
8 K0864 X5 F f f F f f F f f F f F F f f F
9 K1200 X3 f f f f f f F F F f f f F f F f
10 K0400 Y7 f F f F F f f f f F F f f F f f
11 K0000 C20 F f f f f F f f f F f f f F F F
CT4 Y0
Drum Complete OUT
616
Handheld The EDRUM instruction may be programmed using either DirectSOFT or a

Programmer handheld programmer. This section covers entry via the handheld programmer
Drum Instruction
Drum Mnemonics (Refer to the DirectSOFT manual for drum instruction entry using that tool).
Programming
X0
First, enter Store instructions for the Start
ladder rungs controlling the drums ladder Setup Outputs
X1 Info.
inputs. In the example to the right, the Jog Mask
f f F f f f
timer drums Start, Jog, and Reset inputs X2
Reset Steps f f f f f f
are controlled by X0, X1 and X2 f f f f F f
F F f F F f
respectively. The required keystrokes are f F F f F f
listed beside the mnemonic. f F F f F F
f F f f F F
These keystrokes precede the EDRUM f F F f f F
instruction mnemonic. Note that the Handheld Programmer Keystrokes

ladder rungs for Start, Jog, and Reset $ A
inputs are not limited to being Store X0 STR 0
ENT
singlecontact rungs. (Repeat for Store X1 and Store X2)
After the Store instructions, enter the EDRUM (using Counter CT0) as shown:
E D R U M A
EDRUM CNT0 SHFT
4 3 ORN ISG ORST 0
ENT
After entering the EDRUM mnemonic as above, the handheld programmer creates
an input form for all the drum parameters. The input form consists of approximately
fifty or more default mnemonic entries containing DEF (define) statements. The
default mnemonics are already input for you, so they appear automatically. Use the
NXT and PREV keys to move forward and backward through the form. Only the
editing of default values is required, thus eliminating many keystrokes. The entries
required for the basic timer drum are in the chart below.
Drum Parameters Multiple Mnemonic / Entry Default Valid Data Ranges

Entries Mnemonic Types
Start Input STR (plus input rung)
Jog Input STR (plus input rung)
Reset Input STR (plus input rung)
Drum Mnemonic DRUM CNT aa CT 0 174
Preset Step 1 bb DEF K0000 K 1 16
Timer base 1 cccc DEF K0000 K 1 9999
Output points 16 ffff DEF 0000 X, Y, C * see page
428
Counts per step 16 dddd DEF K0000 K 0 9999
Events 16 dddd DEF K0000 X, Y, C, S, see page
T, CT 428
Output pattern 16 gggg DEF K0000 K 0 FFFF
NOTE: Default entries for output points and events are DEF 0000, which means
they are unassigned. If you need to go back and change an assigned output as
unused again, enter K0000. The entry will again show as DEF 0000.
617
Using the DRUM entry chart (two pages before), we show the method of entry for the
basic time/event drum instruction. First, we convert the output pattern for each step
Drum Instruction
to the equivalent hex number, as shown in the following example.
Programming
Step 1 Outputs: f f f f F f f F f f f F F f F f
converts to: 15 0
0 9 1 A
The following diagram shows the method for entering the previous EDRUM example
on the HHP. The default entries of the form are in parenthesis. After the drum
instruction entry (on the fourth row), the remaining keystrokes over-write the
numeric portion of each default DEF statement. NOTE: Drum editing requires
Handheld Programmer firmware version 1.7 or later.
Start $ A ENT NOTE: You may use the NXT and PREV keys
STR 0
to skip past entries for unused outputs or steps.
Jog $ B ENT
STR 1
$ C
Reset STR 2
ENT
E D R U M A
Drum Inst. SHFT
4 3 ORN ISG ORST 0
ENT
Preset Step ( DEF K0001) NEXT
G E Handheld Programmer Keystrokes contd

Time Base ( DEF K0000 )
6 4
NEXT
1 ( DEF 0000 ) SHFT C H NEXT 1 ( DEF K0000 ) F NEXT

2 7 5
( DEF 0000 ) SHFT C B A NEXT ( DEF K0000 ) C A NEXT

2 1 0 2 0
( DEF 0000 ) SHFT Y B NEXT B F A NEXT

MLS 1 ( DEF K0000 ) 1 5 0
( DEF 0000 ) SHFT Y E NEXT ( DEF K0000 ) E F NEXT

MLS 4 4 5
( DEF 0000 ) SHFT Y F NEXT B I A NEXT

MLS 5 ( DEF K0000 ) 1 8 0
( DEF 0000 ) SHFT Y G NEXT J C D NEXT

MLS 6 ( DEF K0000 ) 9 2 3
( DEF 0000 ) SHFT C E NEXT B C A NEXT

2 4 ( DEF K0000 ) 1 2 0
( DEF 0000 ) SHFT C C NEXT I G E NEXT

( DEF K0000 )
2 2 Counts/ 8 6 4
Outputs
( DEF 0000 ) SHFT Y A NEXT
Step ( DEF K0000 ) B C A A NEXT
MLS 0 1 2 0 0
( DEF 0000 ) SHFT Y C NEXT ( DEF K0000 ) E A A NEXT

MLS 2 4 0 0
( DEF 0000 ) SHFT C B E NEXT ( DEF K0000 ) NEXT

2 1 4
( DEF 0000 ) SHFT C D A NEXT ( DEF K0000 ) NEXT

2 3 0
( DEF 0000 ) SHFT Y G NEXT ( DEF K0000 ) NEXT

MLS 6 skip over
( DEF 0000 ) SHFT Y H NEXT NEXT
unused steps
MLS 7 ( DEF K0000 )
( DEF 0000 ) SHFT C D E NEXT ( DEF K0000 ) NEXT

2 3 4
16 ( DEF 0000 ) SHFT Y B NEXT 16 ( DEF K0000 ) NEXT

MLS 1
(Continued on next page)

618
Handheld Programmer Keystrokes contd Handheld Programmer Keystrokes contd

Drum Instruction
1 ( DEF 0000 ) skip over unused event 1

Programming
NEXT
( DEF K0000 ) NEXT step 1 pattern = 0000
( DEF 0000 ) SHFT Y E NEXT
MLS 4 J I B C NEXT
( DEF K0000 ) 9 8 1 2
SHFT X B NEXT
( DEF 0000 ) SET 1 C I J E NEXT
( DEF K0000 ) 2 8 9 4
( DEF 0000 ) SHFT X C NEXT

SET 2 E E H G NEXT
( DEF K0000 ) 4 4 7 6
( DEF 0000 ) SHFT C A NEXT
2 0 ( DEF K0000 ) F B G J NEXT
5 1 6 9
( DEF 0000 ) SHFT C B NEXT

2 1 ( DEF K0000 ) J D E D NEXT
9 3 4 3
SHFT X A NEXT
( DEF 0000 ) SET 0 ( DEF K0000 ) E E I G NEXT
4 4 8 6
( DEF 0000 ) SHFT X F NEXT J E F J

SET 5 Output ( DEF K0000 )
9 4 5 9
NEXT
Events Pattern
( DEF 0000 ) SHFT X D NEXT
SET 3 D I SHFT A NEXT
( DEF K0000 ) 3 8 0
( DEF 0000 ) SHFT Y H NEXT

MLS 7 F I G E NEXT
( DEF K0000 ) 5 8 6 4
( DEF 0000 ) SHFT C C A NEXT

2 2 0 I E E H NEXT
( DEF K0000 ) 8 4 4 7
( DEF 0000 ) NEXT

( DEF K0000 ) NEXT
( DEF 0000 ) NEXT

( DEF K0000 ) NEXT
( DEF 0000 ) NEXT

( DEF K0000 ) NEXT unused steps
( DEF 0000 ) NEXT
( DEF K0000 ) NEXT
16 ( DEF 0000 ) NEXT 16

( DEF K0000 ) NEXT
$ GY A NEXT
STR CNT 0
Last rung
SHFT Y A NEXT
MLS 0
NOTE: You may use the NXT and PREV keys

to skip past entries for unused outputs or steps.
17
RLL PLUS
Stage Programming
Introduction to Stage Programming
Learning to Draw State Transition Diagrams
Using the Stage Jump Instruction for State Transitions
Stage Program Example: Toggle On/Off Lamp Controller
Four Steps to Writing a Stage Program
Stage Program Example: A Garage Door Opener
Stage Program Design Considerations
RLL PLUS (Stage) Instructions
Questions and Answers about Stage Programs
72
RLL PLUS Stage Programming
Introduction to Stage Programming

Stage Programming provides a way to organize and program complex applications
with relative ease, when compared to purely relay ladder logic (RLL) solutions.
Stage programming does not replace or negate the use of traditional boolean ladder
programming. This is why Stage Programming is also called RLL PLUS. You wont
have to discard any training or experience you already have. Stage programming
simply allows you to divide and organize a RLL program into groups of ladder
instructions called stages. This allows quicker and more intuitive ladder program
development than traditional RLL alone provides.
Stage Programming
Overcoming Many PLC programmers in the industry

Stage Fright have become comfortable using RLL for X0 C0
RLL PLUS
every PLC program they write... but often RST

remain skeptical or even fearful of learning
new techniques such as stage X4 C1 Y0
programming. While RLL is great at SET
solving boolean logic relationships, it has
disadvantages as well:
STAGE!
S Large programs can become almost
unmanageable, because of a lack of
structure.
X3 Y2
S In RLL, latches must be tediously OUT
created from self-latching relays.
S When a process gets stuck, it is
difficult to find the rung where the
error occurred.
S Programs become difficult to modify
later, because they do not intuitively
resemble the application problem
they are solving.
Its easy to see that these inefficiencies consume a lot of additional time, and time is
money. Stage programming overcomes these obstacles! We believe a few
moments of studying the stage concept is one of the greatest investments in
programming speed and efficiency a PLC programmer can make!
So, we encourage you to study stage programming and add it to your toolbox of
programming techniques. This chapter is designed as a self-paced tutorial on stage
programming. For best results:
S Start at the beginning and do not skip over any sections.
S Study each stage programming concept by working through each
example. The examples build progressively on each other.
S Read the Stage Questions and Answers at the end of the chapter for a
quick review.
73
Learning to Draw State Transition Diagrams

Introduction to Those familiar with ladder program
Process States execution know that the CPU must scan Inputs Ladder Outputs
the ladder program repeatedly, over and Program
over. Its three basic steps are:
1. Read the inputs
2. Execute the ladder program PLC Scan
3. Write the outputs 1) Read Execute Write
The benefit is that a change at the inputs 2) Read Execute Write
Stage Programming
can affect the outputs in just a few 3) Read (etc....)
milliseconds.
RLL PLUS
Most manufacturing processes consist of a series of activities or conditions , each
lasting for several seconds. minutes, or even hours. We might call these process
states, which are either active or inactive at any particular time. A challenge for RLL
programs is that a particular input event may last for just a brief instant. We typically
create latching relays in RLL to preserve the input event in order to maintain a
process state for the required duration.
We can organize and divide ladder logic into sections called stages, representing
process states. But before we describe stages in detail, we will reveal the secret to
understanding stage programming: state transition diagrams.
The Need for State Sometimes we need to forget about the scan nature of PLCs, and focus our thinking
Diagrams toward the states of the process we need to identify. Clear thinking and concise
analysis of an application gives us the best chance at writing efficient, bug-free
programs. State diagrams are just a tool to help us draw a picture of our process!
Youll discover that if we can get the picture right, our program will also be right!
A 2State Process Consider the simple process shown to the Inputs Outputs
right, which controls an industrial motor. On
We will use a green momentary SPST X0 Motor
pushbutton to turn the motor on, and a red Ladder Y0
one to turn it off. The machine operator will Off Program
press the appropriate pushbutton for just a X1
second or so. The two states of our
process are ON and OFF.
Transition condition
The next step is to draw a state transition
diagram, as shown to the right. It shows State
X0
the two states OFF and ON, with two
transition lines in-between. When the OFF ON
event X0 is true, we transition from OFF to X1
ON. When X1 is true, we transition from
ON to OFF. Output equation: Y0 = ON
If youre following along, you are very close to grasping the concept and the
problem-solving power of state transition diagrams. The output of our controller is
Y0, which is true any time we are in the ON state. In a boolean sense, Y0=ON state.
Next, we will implement the state diagram first as RLL, then as a stage program. This
will help you see the relationship between the two methods in problem solving.
74
The state transition diagram to the right is

X0
a picture of the solution we need to create.
The beauty of it is this: it expresses the
problem independently of the OFF ON
programming language we may use to X1
realize it. In other words, by drawing the
diagram we have already solved the Output equation: Y0 = ON
control problem!
First, well translate the state diagram to traditional RLL. Then well show how easy it
is to translate the diagram into a stage programming solution.
RLL Equivalent The RLL solution is shown to the right. It Set Reset Latch
Stage Programming
consists of a self-latching control relay, X0 X1 C0

C0. When the On pushbutton (X0) is
RLL PLUS
OUT
pressed, output coil C0 turns on and the
C0 contact on the second row latches
itself on. So, X0 sets the latch C0 on, and
it remains on after the X0 contact opens. Latch Output
The motor output Y0 also has power flow, C0 Y0
so the motor is now on. OUT
When the Off pushbutton (X1) is pressed,
it opens the normally-closed X1 contact,
which resets the latch. Motor output Y0
turns off when the latch coil C0 goes off.
Stage Equivalent The stage program solution is shown to

the right. The two inline stage boxes S0
and S1 correspond to the two states OFF SG
and ON. The ladder rung(s) below each S0 OFF State
stage box belong to each respective
stage. This means that the PLC only has Transition
to scan those rungs when the X0 S1
corresponding stage is active! JMP
For now, lets assume we begin in the OFF
State, so stage S0 is active. When the On
SG
pushbutton (X0) is pressed, a stage S1 ON State
transition occurs. The JMP S1 instruction Output
executes, which simply turns off the Stage SP1 Always on Y0
bit S0 and turns on Stage bit S1. So on the OUT
next PLC scan, the CPU will not execute
Stage S0, but will execute stage S1!
Transition
In the On State (Stage S1), we want the X1 S0
motor to always be on. The special relay JMP
contact SP1 is defined as always on, so Y0
turns the motor on.
When the Off pushbutton (X1) is pressed, a transition back to the Off State occurs.
The JMP S0 instruction executes, which simply turns off the Stage bit S1 and turns
on Stage bit S0. On the next PLC scan, the CPU will not execute Stage S1, so the
motor output Y0 will turn off. The Off state (Stage 0) will be ready for the next cycle.
75
Lets Compare Right now, you may be thinking I dont see the big advantage to Stage
Programming... in fact, the stage program is longer than the plain RLL program.
Well, now is the time to exercise a bit of faith. As control problems grow in complexity,
stage programming quickly out-performs RLL in simplicity, program size, etc.
For example, consider the diagram below.
Notice how easy it is to correlate the OFF
and ON states of the state transition SG
S0 OFF State
diagram below to the stage program at the
right. Now, we challenge anyone to easily X0 S1
identify the same states in the RLL JMP
program on the previous page!
Stage Programming
SG ON State
S1
RLL PLUS
SP1 Y0
OUT
X0
X1 S0
OFF ON JMP
X1
Initial Stages At powerup and Program-to-Run Mode Powerup in OFF State

transitions, the PLC always begins with all
ISG
normal stages (SG) off. So, the stage S0 Initial Stage
programs shown so far have actually had
no way to get started (because rungs are X0 S1
not scanned unless their stage is active). JMP
Assume that we want to always begin in
the Off state (motor off), which is how the SG
RLL program works. The Initial Stage S1
(ISG) is defined to be active at powerup. In SP1 Y0
the modified program to the right, we have OUT
changed stage S0 to the ISG type. This
ensures the PLC will scan contact X0 after X1 S0
powerup, because Stage S0 is active. JMP
After powerup, an Initial Stage (ISG)
works just like any other stage!
We can change both programs so that the Powerup in ON State
motor is ON at powerup. In the RLL below,
SG
we must add a first scan relay SP0, S0
latching C0 on. In the stage example to the
right, we simply make Stage S1 an initial X0 S1
stage (ISG) instead of S0. JMP
Powerup in ON State
X0 X1 ISG Initial Stage
C0 S1
OUT
SP1 Y0
C0 Y0 OUT
OUT
X1 S0
SP0
First Scan JMP
76
We can mark our desired powerup state Powerup

as shown to the right, which helps us X0
remember to use the appropriate Initial
Stages when creating a stage program. It OFF ON
is permissible to have as many initial X1
stages as the process requires.
What Stage Bits Do You may recall that a stage is just a section of ladder program which is either active or
inactive at a given moment. All stage bits (S0 to S377) reside in the PLCs image
register as individual status bits. Each stage bit is either a boolean 0 or 1 at any time.
Program execution always reads ladder rungs from top to bottom, and from left to
right. The drawing below shows the effect of stage bit status. The ladder rungs below
Stage Programming
the stage instruction continuing until the next stage instruction or the end of program
belong to stage 0. Its equivalent operation is shown on the right. When S0 is true, the
RLL PLUS
two rungs have power flow.

S If Stage bit S0 = 0, its ladder rungs are not scanned (executed).
S If Stage bit S0 = 1, its ladder rungs are scanned (executed).
Actual Program Appearance Functionally Equivalent Ladder
SG S0
S0
(includes all rungs in stage)
Stage Instruction The inline stage boxes on the left power

Characteristics rail divide the ladder program rungs into
stages. Some stage rules are: SG
S0
S Execution Only logic in active
stages are executed on any scan.
S Transitions Stage transition
instructions take effect on the next
occurrence of the stages involved. SG
S Octal numbering Stages are S1
numbered in octal, like I/O points,
etc. So S8 is not valid.
S Total Stages The DL05 offers up
to 256 stages (S0 to S377 in octal). SG
S No duplicates Each stage number S2
is unique and can be used just once.
S Any order You can skip numbers
and sequence the stage numbers in
any order. END
S Last Stage the last stage in the
ladder program includes all rungs
from its stage box until the end coil.
77
Using the Stage Jump Instruction for State Transitions

Stage Jump, Set, The Stage JMP instruction we have used deactivates the stage in which the
and Reset instruction occurs, while activating the stage in the JMP instruction. Refer to the
Instructions state transition shown below. When contact X0 energizes, the state transition from
S0 to S1 occurs. The two stage examples shown below are equivalent. So, the
Stage Jump instruction is equal to a Stage Reset of the current stage, plus a Stage
Set instruction for the stage to which we want to transition.
X0
Stage Programming
S0 S1
RLL PLUS
SG SG
S0 S0
S1
Equivalent S0
X0 X0
JMP RST
S1
SET
Please Read Carefully The jump instruction is easily misunderstood. The jump
does not occur immediately like a GOTO or GOSUB program control instruction
when executed. Heres how it works:
S The jump instruction resets the stage bit of the stage in which it occurs.
All rungs in the stage still finish executing during the current scan, even
if there are other rungs in the stage below the jump instruction!
S The reset will be in effect on the following scan, so the stage that
executed the jump instruction previously will be inactive and bypassed.
S The stage bit of the stage named in the Jump instruction will be set
immediately, so the stage will be executed on its next occurrence. In the
left program shown below, stage S1 executes during the same scan as
the JMP S1 occurs in S0. In the example on the right, Stage S1
executes on the next scan after the JMP S1 executes, because stage
S1 is located above stage S0.
SG SG Executes on next
S0 S1 scan after Jmp
X0 S1
S1 Y0
JMP
OUT
SG Executes on same SG
S1 scan as Jmp S0
X0 S1
S1 Y0
JMP
OUT
Note: Assume we start with Stage 0 active and stage 1 inactive for both examples.
78
Stage Program Example: Toggle On/Off Lamp Controller

A 4State Process In the process shown to the right, we use Inputs Outputs
an ordinary momentary pushbutton to
control a light bulb. The ladder program
will latch the switch input, so that we will Toggle
X0 Ladder Y0
push and release to turn on the light, push Program
and release again to turn it off (sometimes
called toggle function). Sure, we could just
buy a mechanical switch with the alternate
on/off action built in... However, this Powerup
Stage Programming
example is educational and also fun! X0

RLL PLUS
Next we draw the state transition diagram.

A typical first approach is to use X0 for OFF ON
both transitions (like the example shown X0
to the right). However, this is incorrect
(please keep reading). Output equation: Y0 = ON
Note that this example differs from the motor example, because now we have just
one pushbutton. When we press the pushbutton, both transition conditions are met.
We would just transition around the state diagram at top speed. If implemented in
Stage, this solution would flash the light on or off each scan (obviously undesirable)!
The solution is to make the the push and the release of the pushbutton separate
events. Refer to the new state transition diagram below. At powerup we enter the
OFF state. When switch X0 is pressed, we enter the Press-ON state. When it is
released, we enter the ON state. Note that X0 with the bar above it denotes X0 NOT.
Powerup X0 X0
PushON ISG
S0 OFF State
X0 S1
OFF ON
JMP
PushOFF SG PushOn State

X0 X0 S1
X0 S2
Output equation: Y0 = ON
JMP
When in the ON state, another push and
release cycle similarly takes us back to the
OFF state. Now we have two unique states SG ON State
S2
(OFF and ON) used when the pushbutton is Output
released, which is what was required to solve SP1 Y0
the control problem. OUT
The equivalent stage program is shown to the X0 S3
right. The desired powerup state is OFF, so JMP
we make S0 an initial stage (ISG). In the ON
state, we add special relay contact SP1, SG PushOff State
which is always on. S3
Note that even as our programs grow more X0 S0

complex, it is still easy to correlate the state JMP
transition diagram with the stage program!
79
Four Steps to Writing a Stage Program

By now, youve probably noticed that we follow the same steps to solve each
example problem. The steps will probably come to you automatically if you work
through all the examples in this chapter. Its helpful to have a checklist to guide us
through the problem solving. The following steps summarize the stage program
design procedure:
1. Write a Word Description of the application.
Describe all functions of the process in your own words. Start by listing what
happens first, then next, etc. If you find there are too many things happening at once,
Stage Programming
try dividing the problem into more than one process. Remember, you can still have
the processes communicate with each other to coordinate their overall activity.
RLL PLUS
2. Draw the Block Diagram.
Inputs represent all the information the process needs for decisions, and outputs
connect to all devices controlled by the process.
S Make lists of inputs and outputs for the process.
S Assign I/O point numbers (X and Y) to physical inputs and outputs.
3. Draw the State Transition Diagram.
The state transition diagram describes the central function of the block diagram,
reading inputs and generating outputs.
S Identify and name the states of the process.
S Identify the event(s) required for each transition between states.
S Ensure the process has a way to re-start itself, or is cyclical.
S Choose the powerup state for your process.
S Write the output equations.
4. Write the Stage Program.
Translate the state transition diagram into a stage program.
S Make each state a stage. Remember to number stages in octal. Up to
256 total stages are available in the DL05, numbered 0 to 377 in octal.
S Put transition logic inside the stage which originates each transition (the
stage each arrow points away from).
S Use an initial stage (ISG) for any states that must be active at powerup.
S Place the outputs or actions in the appropriate stages.
Youll notice that Steps 1 through 3 just prepare us to write the stage program in Step
4. However, the program virtually writes itself because of the preparation
beforehand. Soon youll be able to start with a word description of an application and
create a stage program in one easy session!
710
Stage Program Example: A Garage Door Opener

Garage Door In this next stage programming example
Opener Example well create a garage door opener
controller. Hopefully most readers are
familiar with this application, and we can
have fun besides!
The first step we must take is to describe
how the door opener works. We will start
by achieving the basic operation, waiting
Stage Programming
to add extra features later. Stage

programs are very easy to modify.
RLL PLUS
Our garage door controller has a motor

which raises or lowers the door on
command. The garage owner pushes and
releases a momentary pushbutton once to
raise the door. After the door is up, another
push-release cycle will lower the door.
In order to identify the inputs and outputs Up limit switch

of the system, its sometimes helpful to
sketch its main components, as shown in
the door side view to the right. The door Motor Raise
has an up limit and a down limit switch. Lower
Each limit switch closes only when the
door has reach the end of travel in the
corresponding direction. In the middle of
travel, neither limit switch is closed.
The motor has two command inputs: raise
and lower. When neither input is active, Door
the motor is stopped. Command
The door command is just a simple

pushbutton. Whether wall-mounted as Down limit switch
shown, or a radio-remote control, all door
control commands logical OR together as
one pair of switch contacts.
Draw the Block The block diagram of the controller is Inputs Outputs
Diagram shown to the right. Input X0 is from the
pushbutton door control. Input X1 Toggle X0
energizes when the door reaches the full
up position. Input X2 energizes when the Ladder To motor:
Up limit Program Y1
door reaches the full down position. When X1
the door is positioned between fully up or Raise
down, both limit switches are open.
Down limit
The controller has two outputs to drive the X2 Y2 Lower
motor. Y1 is the up (raise the door)
command, and Y2 is the down (lower the
door) command.
711
Draw the State Now we are ready to draw the state transition diagram. Like the previous light bulb
Diagram controller example, this application also has just one switch for the command input.
Refer to the figure below.
S When the door is down (DOWN state), nothing happens until X0
energizes. Its push and release brings us to the RAISE state, where
output Y1 turns on and causes the motor to raise the door.
S We transition to the UP state when the up limit switch (X1) energizes,
and turns off the motor.
S Then nothing happens until another X0 press-release cycle occurs. That
takes us to the LOWER state, turning on output Y2 to command the
motor to lower the door. We transition back to the DOWN state when the
Stage Programming
down limit switch (X2) energizes.
RLL PLUS
X0
X0 PushUP RAISE X1 ISG
Powerup S0 DOWN State
X0 S1
DOWN UP JMP
SG PushUP State
S1
X2 LOWER PushDOWN X0 X0 S2
X0 JMP
Output equations: Y1 = RAISE Y2 = LOWER

SG RAISE State
S2
The equivalent stage program is shown to the
right. For now, we will assume the door is SP1 Y1
down at powerup, so the desired powerup OUT
state is DOWN. We make S0 an initial stage X1 S3
(ISG). Stage S0 remains active until the door
JMP
control pushbutton activates. Then we
transition (JMP) to Push-UP stage, S1. SG
S3
UP State
A push-release cycle of the pushbutton takes
us through stage S1 to the RAISE stage, S2. X0 S4
We use the always-on contact SP1 to JMP
energize the motors raise command, Y1.
When the door reaches the fully-raised SG
position, the up limit switch X1 activates. This S4 PushDOWN State
takes us to the UP Stage S3, where we wait S5
X0
until another door control command occurs.
JMP
In the UP Stage S3, a push-release cycle of
the pushbutton will take us to the LOWER
SG LOWER State
Stage S5, where we activate Y2 to command S5
the motor to lower the door. This continues
until the door reaches the down limit switch, SP1 Y2
X2. When X2 closes, we transition from Stage OUT
S5 to the DOWN stage S0, where we began. X2 S0
NOTE: The only special thing about an initial JMP
stage (ISG) is that it is automatically active at
powerup. Afterwards, it is just like any other.
712
Add Safety Next we will add a safety light feature to

Light Feature the door opener system. Its best to get the
main function working first as we have
done, then adding the secondary features.
The safety light is standard on many
Safety light
commercially-available garage door
openers. It is shown to the right, mounted
on the motor housing. The light turns on
upon any door activity, remaining on for
approximately 3 minutes afterwards.
This part of the exercise will demonstrate
Stage Programming
the use of parallel states in our state

diagram. Instead of using the JMP
RLL PLUS
instruction, well use the set and reset

commands.
Modify the To control the light bulb, we add an output Inputs Outputs
Block Diagram and to our controller block diagram, shown to
State Diagram the right, Y3 is the light control output. Toggle
X0 Y1
Raise
In the diagram below, we add an additional
state called LIGHT. Whenever the Ladder
garage owner presses the door control Up limit Program Y2
X1
switch and releases, the RAISE or Lower
LOWER state is active and the LIGHT
state is simultaneously active. The line to
Down limit
the Light state is dashed, because it is not X2 Y3
the primary path. Light
We can think of the Light state as a parallel process to the raise and lower state. The
paths to the Light state are not a transition (Stage JMP), but a State Set command. In
the logic of the Light stage, we will place a three-minute timer. When it expires, timer
bit T0 turns on and resets the Light stage. The path out of the Light stage goes
nowhere, indicating the Light stage just becomes inactive, and the light goes out!
Output equations: Y1 = RAISE

Y2 = LOWER
X0 Y3 = LIGHT
X0 PushUP RAISE X1
X0
DOWN LIGHT T0 UP
X0
X2 LOWER PushDOWN X0
X0
713
Using a Timer The finished modified program is shown to

Inside a Stage the right. The shaded areas indicate the ISG
program additions. S0 DOWN State
In the Push-UP stage S1, we add the Set X0 S1
Stage Bit S6 instruction. When contact X0 JMP
opens, we transition from S1 and go to two
new active states: S2 and S6. In the SG PushUP State
Push-DOWN state S4, we make the same S1
additions. So, any time someone presses X0 S2
the door control pushbutton, the light turns JMP
on.
S6
Stage Programming
Most new stage programmers would be SET
concerned about where to place the Light SG
RAISE State
RLL PLUS
Stage in the ladder, and how to number it. S2
The good news is that it doesnt matter! SP1 Y1
S Just choose an unused Stage OUT
number, and use it for the new stage
X1 S3
and as the reference from other
stages. JMP
S Placement in the program is not SG UP State

critical, so we place it at the end. S3
You might think that each stage has to be X0 S4
directly under the stage that transitions to JMP
it. While it is good practice, it is not
required (thats good, because our two SG PushDOWN State
locations for the Set S6 instruction make S4
that impossible). Stage numbers and how X0 S5
they are used determines the transition
JMP
paths.
S6
In stage S6, we turn on the safety light by
SET
energizing Y3. Special relay contact SP1 SG
is always on. Timer T0 times at 0.1 second S5 LOWER State
per count. To achieve 3 minutes time SP1 Y2
period, we calculate:
OUT
3 min. x 60 sec/min
K= X2 S0
0.1 sec/count
JMP
K=1800 counts
The timer has power flow whenever stage SG LIGHT State
S6
S6 is active. The corresponding timer bit
T0 is set when the timer expires. So three SP1 Y3
minutes later, T0=1 and the instruction OUT
Reset S6 causes the stage to be inactive.
While Stage S6 is active and the light is on, TMR T0
K1800
stage transitions in the primary path
continue normally and independently of T0 S6
Stage 6. That is, the door can go up, down, RST
or whatever, but the light will be on for
precisely 3 minutes.
714
Add Emergency Some garage door openers today will

Stop Feature detect an object under the door. This halts
further lowering of the door. Usually
implemented with a photocell
(electric-eye), a door in the process of
being lowered will halt and begin raising.
We will define our safety feature to work in
this way, adding the input from the
photocell to the block diagram as shown to
the right. X3 will be on if an object is in the
path of the door. Inputs Outputs
Next, we make a simple addition to the
Stage Programming
Toggle
state transition diagram, shown in shaded X0 Y1
Raise
areas in the figure below. Note the new
RLL PLUS
transition path at the top of the LOWER Up limit Ladder Y2

X1
state. If we are lowering the door and Program Lower
detect an obstruction (X3), we then jump Down limit
to the Push-UP State. We do this instead X2 Y3 Light
of jumping directly to the RAISE state, to
give the Lower output Y2 one scan to turn Obstruction
X3
off, before the Raise output Y1 energizes.
X0
X0 PushUP RAISE X1
X0
DOWN X3 LIGHT T0 UP
X0
X2 and X3
LOWER PushDOWN X0
X0
Exclusive It is theoretically possible that the down limit (X2) and the obstruction input (X3)
Transitions could energize at the same moment. In that case, we would jump to the Push-UP
and DOWN states simultaneously, which does not make sense.
Instead, we give priority to the obstruction
by changing the transition condition to the
SG
DOWN state to [X2 AND NOT X3]. This S5 LOWER State
ensures the obstruction event has the
priority. The modifications we must make SP1 Y2
to the LOWER Stage (S5) logic are shown OUT
to the right. The first rung remains X2 X3 to DOWN S0
unchanged. The second and third rungs JMP
implement the transitions we need. Note
the opposite relay contact usage for X3, X3 to Push-UP S2
which ensures the stage will execute only JMP
one of the JMP instructions.
715
Stage Program Design Considerations

Stage Program The examples so far in this chapter used one self-contained state diagram to
Organization represent the main process. However, we can have multiple processes
implemented in stages, all in the same ladder program. New stage programmers
sometimes try to turn a stage on and off each scan, based on the false assumption
that only one stage can be on at a time. For ladder rungs that you want to execute
each scan, just put them in a stage that is always on.
The following figure shows a typical application. During operation, the primary
manufacturing activity Main Process, Powerup Initialization, E-Stop and Alarm
Stage Programming
Monitoring, and Operator Interface are all running. At powerup, three initial stages
shown begin operation.
RLL PLUS
Main Process
XXX = ISG
Idle Fill Agitate Rinse Spin
Powerup Initialization E-Stop and Alarm Monitoring Operator Interface
Powerup Monitor Control Recipe
Status
In a typical application, the separate stage sequences above operate as follows:

S Powerup Initialization This stage contains ladder rung tasks done
just once at powerup. Its last rung resets the stage, so this stage is only
active for one scan (or only as many scans that are required).
S Main Process this stage sequence controls the heart of the process
or machine. One pass through the sequence represents one part cycle
of the machine, or one batch in the process.
S E-Stop and Alarm Monitoring This stage is always active because it
is watching for errors that could indicate an alarm condition or require an
emergency stop. It is common for this stage to reset stages in the main
process or elsewhere, in order to initialize them after an error condition.
S Operator Interface this is another task that must always be active
and ready to respond to an operator. It allows an operator interface to
change modes, etc. independently of the current main process step.
Although we have separate processes, Operator Interface

there can be coordination among them.
For example, in an error condition, the Control Recipe
Status Stage may want to automatically
switch the operator interface to the status
mode to show error information as shown Set
to the right. The monitor stage could set Monitor Status
the stage bit for Status and Reset the
E-Stop and
stages Control and Recipe.
Alarm Monitoring
716
How Instructions We can think of states or stages as simply dividing up our ladder program as
Work Inside Stages depicted in the figure below. Each stage contains only the ladder rungs which are
needed for the corresponding state of the process. The logic for transitioning out of a
stage is contained within that stage. Its easy to choose which ladder rungs are active
at powerup by using an initial stage type (ISG).
Stage 0 Stage 1
Stage 2
Stage Programming
RLL PLUS
Most all instructions work just like they do in standard RLL. You can think of a stage
just like a miniature RLL program which is either active or inactive.
Output Coils As expected, output coils in active stages will turn on or off outputs
according to power flow into the coil. However, note the following:
S Outputs work as usual, provided each output reference (such as Y3) is
used in only one stage.
S An output can be referenced from more than one stage, as long as only
one of the stages is active at a time.
S If an output coil is controlled by more than one stage simultaneously, the
active stage nearest the bottom of the program determines the final
output status during each scan. Therefore, use the OROUT instruction
instead when you want multiple stages to have a logical OR control of
an output.
One-Shot or PD coils Use care if you must use a Positive Differential coil in a
stage. Remember that the input to the coil must make a 01 transition. If the coil is
already energized on the first scan when the stage becomes active, the PD coil will
not work. This is because the 01 transition did not occur.
PD coil alternative: If there is a task which you want to do only once (on 1 scan), it can
be placed in a stage which transitions to the next stage on the same scan.
Counter In using a counter inside a stage, the stage must be active for one scan
before the input to the counter makes a 01 transition. Otherwise, there is no real
transition and the counter will not count.
The ordinary Counter instruction does have a restriction inside stages: it may not be
reset from other stages using the RST instruction for the counter bit. However, the
special Stage counter provides a solution (see next paragraph).
Stage Counter The Stage Counter has the benefit that its count may be globally
reset from other stages by using the RST instruction. It has a count input, but no reset
input. This is the only difference from a standard counter.
Drum Realize that the drum sequencer is its own process, and is a different
programming method than stage programming. If you need to use a drum with
stages, be sure to place the drum instruction in an ISG stage that is always active.
717
Using a Stage as a You may recall the light bulb on-off

Supervisory controller example from earlier in this
Process chapter. For the purpose of illustration, Toggle X0 Ladder Y0
suppose we want to monitor the Program
productivity of the lamp process, by
counting the number of on-off cycles
which occurs. This application will require
the addition of a simple counter, but the
key decision is in where to put the counter.
Powerup
Stage Programming
ISG OFF State
S0
Supervisor Process
RLL PLUS
Supervisor X0 S1
JMP
Powerup X0 X0 SG PushOn State

PushON S1
X0 S2
OFF Main Process ON JMP
PushOFF SG ON State
X0 X0 S2
SP1 Y0
New stage programming students will OUT
typically try to place the counter inside one the
the stages of the process they are trying to X0 S3
monitor. The problem with this approach is JMP
that the stage is active only part of the time. In
order for the counter to count, the count input SG PushOff State
S3
must transition from off to on at least one scan
after its stage activates. Ensuring this X0 S0
requires extra logic that can be tricky. JMP
In this case, we only need to add another
supervisory stage as shown above, to watch ISG Supervisor State
S4
the main process. The counter inside the
supervisor stage uses the stage bit S1 of the S1
main process as its count input. Stage bits SGCNT CT0
used as a contact let us monitor a process! K5000
Note that both the Supervisor stage and the
OFF stage are initial stages. The supervisor
stage remains active indefinitely.
Stage Counter The counter in the above example is a special Stage Counter. Note that it does not
have a reset input. The count is reset by executing a Reset instruction, naming the
counter bit (CT0 in this case). The Stage Counter has the benefit that its count may
be globally reset from other stages. The standard Counter instruction does not have
this global reset capability. You may still use a regular Counter instruction inside a
stage... however, the reset input to the counter is the only way to reset it.
718
Power Flow Our discussion of state transitions has shown how the Stage JMP instruction makes
Transition the current stage inactive and the next stage (named in the JMP) active. As an
Technique alternative way to enter this in DirectSOFT, you may use the power flow method for
stage transitions.
The main requirement is that the current stage be located directly above the next
(jump-to) stage in the ladder program. This arrangement is shown in the diagram
below, by stages S0 and S1, respectively.
X0
S0 S1
Stage Programming
SG SG
S0 S0
RLL PLUS
Equivalent
X0 S1 All other rungs in stage...
JMP
X0
SG
S1 Power flow
transition
SG
S1
Recall that the Stage JMP instruction may occur anywhere in the current stage, and
the result is the same. However, power flow transitions (shown above) must occur as
the last rung in a stage. All other rungs in the stage will precede it. The power flow
transition method is also achievable on the handheld programmer, by simply
following the transition condition with the Stage instruction for the next stage.
The power flow transition method does eliminate one Stage JMP instruction, its only
advantage. However, it is not as easy to make program changes as using the Stage
JMP. Therefore, we advise using Stage JMP transitions for most programmers.
Stage View in The Stage View option in DirectSOFT will let you view the ladder program as a flow
DirectSOFT chart. The figure below shows the symbol convention used in the diagrams. You may
find the stage view useful as a tool to verify that your stage program has faithfully
reproduced the logic of the state transition diagram you intend to realize.
SG Stage Reference to Transition
J Jump S Set Stage
a Stage Logic
R Reset Stage
The following diagram is a typical stage view of a ladder program containing stages.
Note the left-to-right direction of the flow chart.
ISG SG SG SG
S0 J S1 J S2 S S4
SG SG
J J S5
S3
719
Parallel Processing Concepts

Parallel Processes Previously in this chapter we discussed how a state may transition to either one state
or another, called an exclusive transition. In other cases, we may need to branch
simultaneously to two or more parallel processes, as shown below. It is acceptable
to use all JMP instructions as shown, or we could use one JMP and a Set Stage bit
instruction(s) (at least one must be a JMP, in order to leave S1). Remember that all
instructions in a stage execute, even when it transitions (the JMP is not a GOTO).
Process A SG
S2 S3 S1 PushOn State
Stage Programming
X0 S2
S0 S1 X0
RLL PLUS
JMP
S4 S5 S4
Process B JMP
Note that if we want Stages S2 and S4 to energize exactly on the same scan, both
stages must be located below or above Stage S1 in the ladder program (see the
explanation at the bottom of page 77). Overall, parallel branching is easy!
Converging Now we consider the opposite case of parallel branching, which is converging
Processes processes. This simply means we stop doing multiple things and continue doing one
thing at a time. In the figure below, processes A and B converge when stages S2 and
S4 transition to S5 at some point in time. So, S2 and S4 are Convergence Stages.
Process A S1 S2
= Convergence Stage S5 S6
Process B S3 S4
Convergence While the converging principle is simple enough, it brings a new complication. As
Stages parallel processing completes, the multiple processes almost never finish at the
(CV) same time. In other words, how can we know whether Stage S2 or S4 will finish last?
This is an important point, because we have to decide how to transition to Stage S5.
The solution is to coordinate the transition CV Convergence

condition out of convergence stages. We S2
Stages
accomplish this with a stage type
designed for this purpose: the
Convergence Stage (type CV). In the CV
example to the right, convergence stages S4
S2 and S4 are required to be grouped
X3 S5
together as shown. No logic is permitted
between CV stages! The transition CVJMP
condition (X3 in this case) must be located
in the last convergence stage. The SG
S5
transition condition only has power flow
when all convergence stages in the group
are active.
720
Convergence Jump Recall the last convergence stage only CV

(CVJMP) has power flow when all CV stages in the S2 Convergence
group are active. To complement the Jump
convergence stage, we need a new jump
instruction. The Convergence Jump CV
(CVJMP) shown to the right will transition S4
to Stage S5 when X3 is active (as one
X3 S5
might expect), but it also automatically
resets all convergence stages in the CVJMP
group. This makes the CVJMP jump a
very powerful instruction. Note that this SG
S5
instruction may only be used with
Stage Programming
convergence stages.
RLL PLUS
Convergence The following summarizes the requirements in the use of convergence stages,
Stage Guidelines including some tips for their effective application:
S A convergence stage is to be used as the last stage of a process which

is running in parallel to another process or processes. A transition to the
convergence stage means that a particular process is through, and
represents a waiting point until all other parallel processes also finish.
S The maximum number of convergence stages which make up one
group is 16. In other words, a maximum of 16 stages can converge into
one stage.
S Convergence stages of the same group must be placed together in the
program, connected on the power rail without any other logic in
between.
S Within a convergence group, the stages may occur in any order, top to
bottom. It does not matter which stage is last in the group, because all
convergence stages have to be active before the last stage has power
flow.
S The last convergence stage of a group may have ladder logic within the
stage. However, this logic will not execute until all convergence stages
of the group are active.
S The convergence jump (CVJMP) is the intended method to be used to
transition from the convergence group of stages to the next stage. The
CVJMP resets all convergence stages of the group, and energizes the
stage named in the jump.
S The CVJMP instruction must only be used in a convergence stage, as it
is invalid in regular or initial stages.
S Convergence Stages or CVJMP instructions may not be used in
subroutines or interrupt routines.
721
RLL PLUS (Stage) Instructions
Staget The Staget instructions are used to

(SG) create structured RLL PLUS programs.
Stages are program segments which can SG
be activated by transitional logic, a jump or S aaa
a set stage that is executed from an active
stage. Stages are deactivated one scan
after transitional logic, a jump, or a reset
stage instruction is executed.
Stage Programming
RLL PLUS
aaa
Stage S 0377
The following example is a simple RLL PLUS program. This program utilizes an initial
stage, stage, and jump instructions to create a structured program.
U A ENT
ISG S0
ISG 0
$ A ENT
STR 0
GX A ENT
X0 Y0 OUT 0
OUT $ B ENT
STR 1
X1 S2 X S C
SHFT ENT
SET RST 2
SET
$ F ENT
STR 5
X5 S1
K B ENT
JMP JMP 1
2 B ENT
SG 1
SG S1 $ C ENT
STR 2
GX B ENT
OUT 1
X2 Y1 2 C ENT
SG 2
OUT
$ G ENT
STR 6
GX C ENT
SG S2 OUT 2
$ H ENT
STR 7
V SHFT S B ENT
X6 Y2 AND RST 1
OUT K A ENT
JMP 0
X7 S1 S0
JMP
722
Initial Staget The Initial Staget instruction is normally

(ISG) used as the first segment of an RLL PLUS
program. Multiple Initial Stages are allowed ISG
in a program. They will be active when the S aaa
CPU enters the Run mode allowing for a
starting point in the program.
aaa
Stage S 0377
Stage Programming
Initial Stages are also activated by transitional logic, a jump or a set stage executed
from an active stage.
RLL PLUS
JUMP The Jump instruction allows the program to

(JMP) transition from an active stage containing
S aaa
the jump instruction to another stage JMP
(specified in the instruction). The jump
occurs when the input logic is true. The
active stage containing the Jump will
deactivate 1 scan later.
aaa
Stage S 0377
Not Jump The Not Jump instruction allows the

(NJMP) program to transition from an active stage
which contains the jump instruction to
another which is specified in the instruction. S aaa
NJMP
The jump will occur when the input logic is
off. The active stage that contains the Not
Jump will be deactivated 1 scan after the
Not Jump instruction is executed.
aaa
Stage S 0377
In the following example, only stage ISG0 will be active when program execution.
begins. When X1 is on, program execution will jump from Initial Stage 0 to Stage 1.
723
ISG S0 U A ENT
ISG 0
$ B ENT
S1 STR 1
X1
JMP K B ENT
JMP 1
2 B ENT
SG S1 SG 1
$ C ENT
Y5 STR 2
X2
GX F ENT
OUT
OUT 5
S2 $ H ENT
X7 STR 7
Stage Programming
JMP
K C ENT
JMP 2
S3
RLL PLUS
X7 N K D
SHFT SHFT ENT
NJMP TMR JMP 3
S
S
S
Converge Stage The Converge Stage instruction is used to

(CV) and Converge group certain stages together by defining
Jump (CVJMP) them as Converge Stages.
CV
When all of the Converge Stages within a S aaa
group become active, the CVJMP
instruction (and any additional logic in the
final CV stage) will be executed. All
preceding CV stages must be active before
the final CV stage logic can be executed. All
Converge Stages are deactivated one scan
after the CVJMP instruction is executed.
S aaa
Additional logic instructions are only
CVJMP
allowed following the last Converge Stage
instruction and before the CVJMP
instruction. Multiple CVJUMP instructions
are allowed.
Converge Stages must be programmed in
the main body of the application program.
This means they cannot be programmed in
Subroutines or Interrupt Routines.
aaa
Stage S 0377
724
In the following example, when Converge Stages S10 and S11 are both active the
CVJMP instruction will be executed when X4 is on. The CVJMP will deactivate S10
and S11, and activate S20. Then, if X5 is on, the program execution will jump back to
the initial stage, S0.
DirectSOFT Display Handheld Programmer Keystrokes
U A ENT
ISG 0
$ A ENT
STR 0
ISG S0 GX A ENT
OUT 0
$ B ENT
X0 Y0 STR 1
Stage Programming
OUT K B ENT
JMP 1
K B A
RLL PLUS
ENT
S1 JMP 1 0
X1
JMP 2 B ENT
SG 1
S10 $ C ENT
STR 2
JMP
K B B ENT
JMP 1 1
SG S1 SHFT C V B A ENT
2 AND 1 0
SHFT C V B B ENT
2 AND 1 1
X2 S11
$ D
JMP STR 3
ENT
GX D ENT
OUT 3
$ E
CV S10 STR 4
ENT
SHFT C V SHFT K C A ENT

2 AND JMP 2 0
CV S11 2 C A ENT
SG 2 0
$ F ENT
X3 Y3 STR 5
OUT K A ENT
JMP 0
X4 S20
CVJMP
SG S20
X5 S0
JMP
725
Questions and Answers about Stage Programming

We include the following commonly-asked questions about Stage Programming as
an aid to new students. All question topics are covered in more detail in this chapter.
Q. What does stage programming do that I cant do with regular RLL programs?
A. Stages allow you to identify all the states of your process before you begin
programming. This approach is more organized, because you divide up a ladder
program into sections. As stages, these program sections are active only when they
are actually needed by the process. Most processes can be organized into a
Stage Programming
sequence of stages, connected by event-based transitions.
RLL PLUS
Q. What are Stage Bits?
A. A stage bit is just a single bit in the CPUs image register, representing the
active/inactive status of the stage in real time. For example, the bit for Stage 0 is
referenced as S0. If S0 = 0, then the ladder rungs in Stage 0 are bypassed (not
executed) on each CPU scan. If S0 = 1, then the ladder rungs in Stage 0 are
executed on each CPU scan. Stage bits, when used as contacts, allow one part of
your program to monitor another part by detecting stage active/inactive status.
Q. How does a stage become active?

A. There are three ways:
S If the Stage is an initial stage (ISG), it is automatically active at powerup.
S Another stage can execute a Stage JMP instruction naming this stage,
which makes it active upon its next occurrence in the program.
S A program rung can execute a Set Stage Bit instruction (such as Set
S0).
Q. How does a stage become inactive?

A. There are three ways:
S Standard Stages (SG) are automatically inactive at powerup.
S A stage can execute a Stage JMP instruction, resetting its Stage Bit to
0.
S Any rung in the program can execute a Reset Stage Bit instruction (such
as Reset S0).
Q. What about the power flow technique of stage transitions?

A. The power flow method of connecting adjacent stages (directly above or below in
the program) actually is the same as the Stage Jump instruction executed in the
stage above, naming the stage below. Power flow transitions are more difficult to edit
in DirectSOFT, we list them separately from two preceding questions.
Q. Can I have a stage which is active for only one scan?
A. Yes, but this is not the intended use for a stage. Instead, just make a ladder rung
active for 1 scan by including a stage Jump instruction at the bottom of the rung.
Then the ladder will execute on the last scan before its stage jumps to a new one.
726
Q. Isnt a Stage JMP just like a regular GOTO instruction used in software?
A. No, it is very different. A GOTO instruction sends the program execution
immediately to the code location named by the GOTO. A Stage JMP simply resets
the Stage Bit of the current stage, while setting the Stage Bit of the stage named in
the JMP instruction. Stage bits are 0 or 1, determining the inactive/active status of
the corresponding stages. A stage JMP has the following results:
S When the JMP is executed, the remainder of the current stages rungs
are executed, even if they reside past(under) the JMP instruction. On
the following scan, that stage is not executed, because it is inactive.
S The Stage named in the Stage JMP instruction will be executed upon its
next occurrence. If located past (under) the current stage, it will be
Stage Programming
executed on the same scan. If located before (above) the current stage,
it will be executed on the following scan.
RLL PLUS
Q. How can I know when to use stage JMP, versus a Set Stage Bit or Reset Stage Bit?
A. These instructions are used according to the state diagram topology you have
derived:
S Use a Stage JMP instruction for a state transition... moving from one
state to another.
S Use a Set Stage Bit instruction when the current state is spawning a
new parallel state or stage sequence, or when a supervisory state is
starting a state sequence under its command.
S Use a Reset Bit instruction when the current state is the last state in a
sequence and its task is complete, or when a supervisory state is
ending a state sequence under its command.
Q. What is an initial stage, and when do I use it?

A. An initial stage (ISG) is automatically active at powerup. Afterwards, it works just
like any other stage. You can have multiple initial stages, if required. Use an initial
stage for ladder that must always be active, or as a starting point.
Q. Can I have place program ladder rungs outside of the stages, so they are always on?
A. It is possible, but its not good software design practice. Place ladder that must
always be active in an initial stage, and do not reset that stage or use a Stage JMP
instruction inside it. It can start other stage sequences at the proper time by setting
the appropriate Stage Bit(s).
Q. Can I have more than one active stage at a time?

A. Yes, and this is a normal occurrence for many programs. However, it is important
to organize your application into separate processes, each made up of stages. And a
good process design will be mostly sequential, with only one stage on at a time.
However, all the processes in the program may be active simultaneously.
18
PID Loop Operation
DL05 PID Loop Features
Loop Setup Parameters
Loop Sample Rate and Scheduling
Ten Steps to Successful Process Control
Basic Loop Operation
PID Loop Data Configuration
PID Algorithms
Loop Tuning Procedure
PV Analog Filter
Feedforward Control
Time Proportioning Control
Cascade Control
Process Alarms
Ramp/Soak Generator
Troubleshooting Tips
Bibliography
Glossary of PID Loop Terminology
82
PID Loop Operation
DL05 PID Loop Features

Main Features The DL05 process loop control offers a sophisticated set of features to address
many application needs. The main features are:
S Up to 4 loops, individual programmable sample rates

S Manual/ Automatic/Cascaded loop capability available
S Two types of bumpless transfer available
S Full-featured alarms
S Ramp/soak generator with up to 16 segments
S Auto Tuning
The DL05 CPU has process control loop capability in addition to ladder program
execution. You can select and configure up to four loops. All sensor and actuator
wiring connects directly to DL05 analog modules. All process variables, gain values,
alarm levels, etc., associated with each loop reside in a Loop Variable Table in the
CPU. The DL05 CPU reads process variable (PV) inputs during each scan. Then it
makes PID loop calculations during a dedicated time slice on each PLC scan,
updating the control output value. The control loops use a
Proportional-Integral-Derivative (PID) algorithm to generate the control output. This
PID Loop Operation
chapter describes how the loops operate, and what you must do to configure and
tune the loops.
Analog Output
DL05
PID Loop Calculations Manufacturing Process
and Troubleshooting
Maintenance
Analog Input
The best tool for configuring loops in the DL05 is the DirectSOFT32 programming
software, release 3.0c, or later. DirectSOFT32 uses dialog boxes to help you set up
the individual loops. After completing the setup, you can use DirectSOFT32s PID
Trend View to tune each loop. The configuration and tuning selections you make are
stored in the DL05s FLASH memory, which is retentive. The loop parameters also
may be saved to disk for recall later.
83
PID Loop Operation
PID Loop Feature Specifications

Number of loops Selectable, 4 maximum
CPU V-memory needed 32 words (V locations) per loop selected, 64 words if using ramp/soak
PID algorithm Position or Velocity form of the PID equation
Control Output polarity Selectable direct-acting or reverse-acting
Error term curves Selectable as linear, square root of error, and error squared
Loop update rate (time 0.05 to 99.99 seconds, user programmable
between PID calculation)
Minimum loop update rate 0.05 seconds for 1 to 4 loops,
Loop modes Automatic, Manual (operator control), or Cascade control
Ramp/Soak Generator Up to 8 ramp/soak steps (16 segments) per loop with indication of
ramp/soak step number
PV curves Select standard linear, or square-root extract (for flow meter input)
Set Point Limits Specify minimum and maximum setpoint values
Process Variable Limits Specify minimum and maximum Process Variable values
Proportional Gain Specify gains of 0.01 to 99.99
Integrator (Reset) Specify reset time of 0.1 to 999.8 in units of seconds or minutes
PID Loop Operation

Derivative (Rate) Specify the derivative time from 0.01 to 99.99 seconds
Rate Limits Specify derivative gain limiting from 1 to 20
Bumpless Transfer I Automatically initialized bias and setpoint when control switches from
manual to automatic
Bumpless Transfer II Automatically set the bias equal to the control output when control switches
from manual to automatic
Step Bias Provides proportional bias adjustment for large setpoint changes
Anti-windup For position form of PID, this inhibits integrator action when the control
output reaches 0% or 100 % (speeds up loop recovery when output
recovers from saturation)
Error Deadband Specify a tolerance (plus and minus) for the error term (SPPV), so that no
Maintenance
change in control output value is made
Alarm Feature Specifications

Deadband Specify 0.1% to 5% alarm deadband on all alarms
PV Alarm Points Select PV alarm settings for Lowlow, Low, High, and High-high conditions
PV Deviation Specify alarms for two ranges of PV deviation from the setpoint value
Rate of Change Detect when PV exceeds a rate of change limit you specify
84
PID Loop Operation
The Basics of The key parts of a PID control loop are shown in the block diagram below. The path
PID Loops from the PLC to the Manufacturing Process and back to the PLC is the loop in
closed loop control.
Loop Configuring External
and Monitoring Disturbances
PLC System
Setpoint Value Error Term Loop Control Output Manufacturing

+ S Calculation Process

Process Variable
Manufacturing Process the set of actions that adds value to raw materials. The
process can involve physical changes and/or chemical changes to the material. The
changes render the material more useful for a particular purpose, ultimately used in
a final product.
Process Variable a measurement of some physical property of the raw materials.
Measurements are made using some type of sensor. For example, if the
PID Loop Operation
manufacturing process uses an oven, you will most likely want to control
temperature. Temperature is a process variable.
Setpoint Value the theoretically perfect quantity of the process variable, or the
desired amount which yields the best product. The machine operator knows this
value, and either sets it manually or programs it into the PLC for later automated use.
External Disturbances the unpredictable sources of error which the control
system attempts to cancel by offsetting their effects. For example, if the fuel input is
constant an oven will run hotter during warm weather than it does during cold
weather. An oven control system must counter-act this effect to maintain a constant
oven temperature during any season. Thus, the weather (which is not very
and Troubleshooting
predictable), is one source of disturbance to this process.

Maintenance
Error Term the algebraic difference between the process variable and the
setpoint. This is the control loop error, and is equal to zero when the process variable
is equal to the setpoint (desired) value. A well-behaved control loop is able to
maintain a small error term magnitude.
Loop Calculation the real-time application of a mathematical algorithm to the
error term, generating a control output command appropriate for minimizing the
error magnitude. Various control algorithms are available, and the DL05 uses the
Proportional-Integral-Derivative (PID) algorithm (more on this later).
Control Output the result of the loop calculation, which becomes a command for
the process (such as the heater level in an oven).
Loop Configuring operator-initiated selections which set up and optimize the
performance of a control loop. The loop calculation function uses the configuration
parameters in real time to adjust gains, offsets, etc.
Loop Monitoring the function which allows an operator to observe the status and
performance of a control loop. This is used in conjunction with the loop configuring to
optimize the performance of a loop (minimize the error term).
85
PID Loop Operation
The diagram below shows each loop element in the form of its real-world physical
component. The example manufacturing process involves a liquid in a reactor
vessel. A sensor probe measures a process variable which may be pressure,
temperature, or another parameter. The sensor signal is amplified through a
transducer, and is sent through the wire in analog form to the PLC input module.
Using a analog I/O combination module, the PLC reads the PV from its analog input.
The CPU executes the loop calculation, and writes to the analog output. This signal
goes to a device in the manufacturing process, such as a heater, valve, pump, etc.
Over time, the liquid begins to change enough to be measured on the sensor probe.
The process variable changes accordingly. The next loop calculation occurs, and
the loop cycle repeats in this manner continuously.
Loop Configuration
and Monitoring
Process Variable
Control Output
PID Loop Operation

Loop
Calculation
Manufacturing
Process
Maintenance
The personal computer shown is used to run DirectSOFT32, the PLC programming
software for DirectLOGIC programmable controllers. DirectSOFT32, release 3.0c
or later, can program the DL05 PLC (including the PID feature). The software
features a forms-based editor to configure loop parameters. It also features a PID
loop trending screen which will be helpful during the loop tuning process. Details on
how to use that software are in the DirectSOFT32 Manual.
86
PID Loop Operation
Loop Setup Parameters

Loop Table and The DL05 PLC gets its PID loop processing instructions only from tables in
Number of Loops V-memory. A PID instruction type in RLL does not exist for the DirectLogic PLCs.
Instead, the CPU reads setup parameters from reserved V-memory locations.
Shown in the table below, you must program a value in V7640 to point to the main
loop table. Then you will need to program V7641 with the number of loops you want
the CPU to calculate. V7642 contains error flags which will be set if V7640 or V7641
are programmed improperly.
Address Setup Parameter Data type Ranges Read/Write

V7640 Loop Parameter Octal V1200 V7377 write
Table Pointer
V7641 Number of Loops BCD 04 write
V7642 Loop Error Flags Binary 0 or 1 read
If the number of loops is 0, the loop controller task is turned off during the ladder
program scan. The loop controller will allow use of loops in ascending order,
beginning with 1. For example, you cannot use loop 1 and 4 while skipping 2 and 3.
PID Loop Operation
The loop controller attempts to control the full number of loops specified in V7641.
PID Error Flags The CPU reports any programming errors
of the setup parameters in V7640 and
V7641. It does this by setting the PID Error Flags, V7642
appropriate bits in V7642 on
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
program-to-run mode transitions.
If you use the DirectSOFT32 loop setup dialog box, its automatic range checking
prohibits possible setup errors. However, the setup parameters may be written using
other methods such as RLL, so the error flag register may be helpful in those cases.
and Troubleshooting
The following table lists the errors reported in V7642.

Maintenance
Bit Error Description (0 = no error, 1 = error)

0 The starting address (in V7640) is out of the lower V-memory range.
1 The starting address (in V7640) is out of the upper V-memory range.
2 The number of loops selected (in V7641) is greater than 4.
3 The loop table extends past (straddles) the boundary at V7377. Use an
address closer to V1200.
As a quick check, if the CPU is in Run mode and V7642=0000, there are no
programming errors.
87
PID Loop Operation
Establishing the On a program -to-run mode transition, the CPU reads the loop setup parameters as
Loop Table Size pictured below. At that moment, the CPU learns the location of the loop table and the
and Location number of loops it configures. Then during the ladder program scan, the PID Loop
task uses the loop data to perform calculations, generate alarms, and so on. There
are some loop table parameters the CPU will read or write on every loop calculation.
CPU Tasks VMemory Space
User Data
READ/
Ladder WRITE LOOP
Program DATA
CONFIGURE/
MONITOR
PID Loop
Task
Setup Parameters
READ V7640, V7641
(at powerup)
DirectSOFT32 Programming Software
The Loop Parameter table contains data VMemory User Data

for only as many loops as you selected in
PID Loop Operation

V7641. Each loop configuration occupies
32 words (0 to 37 octal) in the loop table. LOOP #1
V2000
For example, suppose you have an 32 words
application with 4 loops, and you choose V2037
V2040 LOOP #2
V2000 as the starting location. The Loop 32 words
Parameter will occupy V2000 V2037 for V2077
LOOP #3
loop 1, V2040 V2077 for loop 2 and so 32 words
on. Loop 4 occupies V2140 V2177.
LOOP #4
32 words
NOTE: The DL05 CPUs PID algorithm requires DirectSOFT32 Version 3.0c (or later)
Maintenance
and firmware version 2.1 (or later).
88
PID Loop Operation
Loop Table The parameters associated with each loop are listed in the following table. The
Word Definitions address offset is in octal, to help you locate specific parameters in a loop table. For
example, if a table begins at V2000, then the location of the reset (integral) term is
Addr+11, or V2011. Do not use the word# (in the first column) to calculate addresses.
Word # Address+Offset Description Format
1 Addr + 0 PID Loop Mode Setting 1 bits
2 Addr + 1 PID Loop Mode Setting 2 bits
3 Addr + 2 Setpoint Value (SP) word/binary
4 Addr + 3 Process Variable (PV) word/binary
5 Addr + 4 Bias (Integrator) Value word/binary
6 Addr + 5 Control Output Value word/binary
7 Addr + 6 Loop Mode and Alarm Status bits
8 Addr + 7 Sample Rate Setting word/BCD
9 Addr + 10 Gain (Proportional) Setting word/BCD
10 Addr + 11 Reset (Integral) Time Setting word/BCD
11 Addr + 12 Rate (Derivative) Time Setting word/BCD
12 Addr + 13 PV Value, Low-low Alarm word/binary
PID Loop Operation
13 Addr + 14 PV Value, Low Alarm word/binary

14 Addr + 15 PV Value, High Alarm word/binary
15 Addr + 16 PV Value, High-high Alarm word/binary
16 Addr + 17 PV Value, deviation alarm (YELLOW) word/binary
17 Addr + 20 PV Value, deviation alarm (RED) word/binary
18 Addr + 21 PV Value, rate-of-change alarm word/binary
19 Addr + 22 PV Value, alarm hysteresis setting word/binary
and Troubleshooting
20 Addr + 23 PV Value, error deadband setting word/binary

21 Addr + 24 PV low-pass filter constant word/BCD
Maintenance
22 Addr + 25 Loop derivative gain limiting factor setting word/BCD

23 Addr + 26 SP value lower limit setting word/binary
24 Addr + 27 SP value upper limit setting word/binary
25 Addr + 30 Control output value lower limit setting word/binary
26 Addr + 31 Control output value upper limit setting word/binary
27 Addr + 32 Remote SP Value V-Memory Address Pointer word/hex
28 Addr + 33 Ramp/Soak Setting Flag bit
29 Addr + 34 Ramp/Soak Programming Table Starting Address word/hex
30 Addr + 35 Ramp/Soak Programming Table Error Flags bits
31 Addr + 36 PV direct access, channel number word/hex
32 Addr + 37 Control output direct access, channel number word/hex
89
PID Loop Operation
PID Mode Setting 1 The individual bit definitions of the PID Mode Setting 1 word (Addr+00) are listed in
Bit Descriptions the following table. Additional information about the use of this word is available later
(Addr + 00) in this chapter.
Bit PID Mode Setting 1 Description Read/Write Bit=0 Bit=1
0 Manual Mode Loop Operation request write 01
request
1 Automatic Mode Loop Operation re- write 01
quest request
2 Cascade Mode Loop Operation request write 01
request
3 Bumpless Transfer select write Mode I Mode II
4 Direct or Reverse-Acting Loop select write Direct Reverse
5 Position / Velocity Algorithm select write Position Velocity
6 PV Linear / Square Root Extract select write Linear Sq. root
7 Error Term Linear / Squared select write Linear Squared
8 Error Deadband enable write Disable Enable
9 Derivative Gain Limit select write Off On
10 Bias (Integrator) Freeze select write Off On
PID Loop Operation

11 Ramp/Soak Operation select write Off On
12 PV Alarm Monitor select write Off On
13 PV Deviation alarm select write Off On
14 PV rate-of-change alarm select write Off On
15 Loop mode is independent from CPU write Loop with Loop
mode when set CPU mode Independent
of CPU mode
Maintenance
810
PID Loop Operation
PID Mode Setting 2 The individual bit definitions of the PID Mode Setting 2 word (Addr+01) are listed in
Bit Descriptions the following table. Additional information about the use of this word is available later
(Addr + 01) in this chapter.
Bit PID Mode Setting 2 Description Read/Write Bit=0 Bit=1
0 Input (PV) and Control Output Range write unipolar bipolar
Unipolar/Bipolar select
(See Notes 1 and 2)
1 Input/Output Data Format select write 12 bit 15 bit
(See Notes 1 and 2)
2 Analog Input filter write off on
3 SP Input limit enable write disable enable
4 Integral Gain (Reset) units select write seconds minutes
5 Select Autotune PID algorithm write closed loop open loop
6 Autotune selection write PID PI only
(rate = 0)
7 Autotune start read/write autotune force start
done
8 PID Scan Clock (internal use) read
PID Loop Operation
9 Input/Output Data Format 16-bit select write not select

(See Notes 1 and 2) 16 bit 16 bit
10 Select separate data format for input and write same separate
output (See Notes 2, and 3) format formats
11 Control Output Range write unipolar bipolar
Unipolar/Bipolar select
(See Notes 2, and 3)
12 Output Data Format select write 12 bit 15 bit
(See Notes 2, and 3)
13 Output data format 16-bit select write not select
and Troubleshooting
(See Notes 2, and 3) 16 bit 16 bit

Maintenance
1415 Reserved for future use
Note 1: If the value in bit 9 is 0, then the values in bits 0 and 1 are read. If the value in
bit 9 is 1, then the values in bits 0 and 1 are not read, and bit 9 defines the
data format (the range is automatically unipolar).
Note 2: If the value in bit 10 is 0, then the values in bits 0, 1, and 9 define the input and
output ranges and data formats (the values in bits 11, 12, and 13 are not
read). If the value in bit 10 is 1, then the values in bits 0, 1, and 9 define only
the input range and data format, and bits 11, 12, and 13 are read and define
the output range and data format.
Note 3: If bit 10 has a value of 1 and bit 13 has a value of 0, then bits 11 and 12 are
read and define the output range and data format. If bit 10 and bit 13 each
have a value of 1, then bits 11 and 12 are not read, and bit 13 defines the data
format, (the output range is automatically unipolar).
811
PID Loop Operation
Mode / Alarm The individual bit definitions of the Mode / Alarm monitoring (Addr+06) word is listed
Monitoring Word in the following table. More details are in the PID Mode section and Alarms section.
(Addr + 06)
Bit Mode / Alarm Bit Description Read/Write Bit=0 Bit=1
0 Manual Mode Indication read Manual
1 Automatic Mode Indication read Auto
2 Cascade Mode Indication read Cascade
3 PV Input LOWLOW Alarm read Off On
4 PV Input LOW Alarm read Off On
5 PV Input HIGH Alarm read Off On
6 PV Input HIGHHIGH Alarm read Off On
7 PV Input YELLOW Deviation Alarm read Off On
8 PV Input RED Deviation Alarm read Off On
9 PV Input Rate-of-Change Alarm read Off On
10 Alarm Value Programming Error read Error
11 Loop Calculation Overflow/Underflow read Error
12 Loop in Auto-Tune indication read Off On
PID Loop Operation

13 Auto-Tune error indication read Error
1415 Reserved for Future Use
Ramp / Soak Table The individual bit definitions of the Ramp / Soak Table Flag (Addr+33) word is listed
Flags in the following table. Further details are given in the Ramp / Soak Operation section.
(Addr + 33)
Bit Ramp / Soak Flag Bit Description Read/Write Bit=0 Bit=1
0 Start Ramp / Soak Profile write 01 Start
1 Hold Ramp / Soak Profile write 01 Hold
Maintenance
2 Resume Ramp / soak Profile write 01
Resume
3 Jog Ramp / Soak Profile write 01 Jog
4 Ramp / Soak Profile Complete read Complete
5 PV Input Ramp / Soak Deviation read Off On
6 Ramp / Soak Profile in Hold read Off On
7 Reserved read
815 Current Step in R/S Profile read decode as byte (hex)
Bits 815 must be read as a byte to indicate the current segment number of the
Ramp/Soak generator in the profile. This byte will have the values 1, 2, 3, 4, 5, 6, 7, 8,
9, A, B, C, D, E, F, and 10, which represent segments 1 to 16 respectively. If the
byte=0, then the Ramp/Soak table is not active.
812
PID Loop Operation
Ramp/Soak Each loop that you configure has the option of using a built-in Ramp/Soak generator
Table Location dedicated to that loop. This feature generates SP values that follow a profile. To use
(Addr + 34) the Ramp Soak feature, you must program a separate table of 32 words with
appropriate values. A DirectSOFT32 dialog box makes this easy to do.
In the loop table, the Ramp / Soak Table Pointer at Addr+34 must point to the start of
the ramp/soak data for that loop. This may be anywhere in user memory, and does
not have to adjoin to the Loop Parameter table, as shown to the left. Each R/S table
requires 32 words, regardless of the number of segments programmed.
The ramp/soak table parameters are defined in the table below. Further details are in
the section on Ramp / Soak Operation in this chapter.
VMemory Space Addr Step Description Addr Step Description

Offset Offset
User Data + 00 1 Ramp End SP Value + 20 9 Ramp End SP Value
V2000 + 01 1 Ramp Slope + 21 9 Ramp Slope
LOOP #1
V2037 32 words + 02 2 Soak Duration + 22 10 Soak Duration
LOOP #2 + 03 2 Soak PV Deviation + 23 10 Soak PV Deviation
32 words
+ 04 3 Ramp End SP Value + 24 11 Ramp End SP Value
+ 05 3 Ramp Slope + 25 11 Ramp Slope
PID Loop Operation
V3000 + 06 4 Soak Duration + 26 12 Soak Duration

Ramp/Soak #1
32 words + 07 4 Soak PV Deviation + 27 12 Soak PV Deviation
+ 12 6 Soak Duration + 32 14 Soak Duration
V2034 = 3000 Octal + 13 6 Soak PV Deviation + 33 14 Soak PV Deviation
Pointer to R/S table
and Troubleshooting

Maintenance
+ 17 8 Soak PV Deviation + 37 16 Soak PV Deviation
Ramp/Soak Table The individual bit definitions of the Ramp / Soak Table Programming Error Flags
Programming Error word (Addr+35) is listed in the following table. Further details are given in the PID
Flags Loop Mode section and in the PV Alarm section later in this chapter.
(Addr + 35)
Bit R/S Error Flag Bit Description Read/ Bit=0 Bit=1
Write
0 Starting Addr out of lower V-memory range read Error
1 Starting Addr out of upper V-memory range read Error
4 Starting Addr in System Parameter read Error
V-memory Range
813
PID Loop Operation
Loop Sample Rate and Scheduling
Loop Sample Rates The main tasks of the CPU fall into categories
Addr + 07 as shown to the right. The list represents the
tasks done when the CPU is in Run Mode, on Read
Inputs
each PLC scan. Note that PID loop
calculations occur after the ladder logic task.
Note: It is possible to keep the PID loops Service
running even when the ladder is not. This is Peripherals
done by selecting direct access in
Addr + 36 and placing a 1 in bit 15 of Addr + 00.
Ladder
The sample rate of a control loop is simply the Program
frequency of the PID calculation. Each PLC
Scan
calculation generates a new control output
value. With the DL05 CPU, you can set the Calculate
sample rate of a loop from 50 mS to 99.99 PID Loops
seconds. Most loops do not require a fresh
PID calculation on every PLC scan. Some Internal
loops may need to be calculated only once in Diagnostics
1000 scans.
PID Loop Operation

You select the desired sample rate for each
loop, and the CPU automatically schedules Write
Outputs
and executes PID calculations on the
0appropriate scans.
Choosing the Best For any particular control loop, there is no single perfect sample rate to use. A good
Sample Rate sample rate is a compromise that simultaneously satisfies various guidelines:
S The desired sample rate is proportional to the response time of the PV
to a change in control output. Usually, a process with a large mass will
have a slow sample rate, but a small mass needs a faster sample rate.
S Faster sample rates provide a smoother control output and accurate PV
performance, but use more CPU processing time. Sample rates much
Maintenance
faster than necessary serve only to waste CPU processing power.
S Slower sample rates provide a rougher control output and less accurate
PV performance, but use less CPU processing time.
S A sample rate which is too slow will cause system instability, particularly
when a change in the setpoint or a disturbance occurs.
As a starting point, determine a sample rate for your loop which will be fast enough to
avoid control instability (which is extremely important). Follow the procedure on the
next page to find a starting sample rate:
814
PID Loop Operation
Determining a suitable sample rate (Addr+07):

1. Operate the process open-loop (the loop does not even need to be
configured yet). Place the CPU in run mode (and the loop in Manual mode,
if you have already configured it). Manually set the control output value so
the PV is stable and in the middle of a safe range.
2. Try to choose a time when the process will have negligible external
disturbances. Then induce a sudden 10% step change in the control value.
3. Record the rise or fall time of the PV (time between 10% to 90% points).
4. Divide the recorded rise or fall time by 10. This is the initial sample rate you
can use to begin tuning your loop.
Control 10% of full output range

Output
90%
10%
PV
Rise Time
Sample
Rate
PID Loop Operation
In the figure above, suppose the measured rise time response of the PV was 25
seconds. The suggested sample rate from this measurement will be 2.5 seconds.
For illustration, the sample rate time line shows ten samples within the rise time
period. These show the frequency of PID calculations as the PV changes values. Of
course, the sample rate and PID calculations are continuous during operation.
NOTE: An excessively fast sample rate will diminish the available resolution in the
PV Rate-of-Change Alarm, because the alarm rate value is specified in terms of PV
change per sample period. For example, a 50 mS sample rate means the smallest
and Troubleshooting
PV rate-of-change we can detect is 20 PV counts (least significant bit counts) per

second, or 1200 LSB counts per minute.
Maintenance
Programming the The Loop Parameter table for each loop has a data location for the sample rate.
Sample Rate Referring to the figure below, location V+07 contains a BCD number from 00.05 to
99.99 (with an implied decimal point). This represents 50 mS to 99.99 seconds. This
number may be programmed using DirectSOFT32s PID Setup screen, or any other
method of writing to V-memory. It must be programmed before the loop will operate
properly.
Setpoint Error Term Loop Control Output

+ S Calculation

Process Variable
Sample RateV+07
Sample Rate
X X X X BCD 00.05 to 99.99 sec
815
PID Loop Operation
PID Loop Effect Since PID loop calculations are a task within the CPU scan activities, the use of PID
on CPU Scan Time loops will increase the average scan time. The amount of scan time increase is
proportional to the number of loops used and the sample rate of each loop.
The execution time for a single loop PID Calculation Time
calculation depends on the number of Minimum 150 mS
options selected, such as alarms, error
Typical 250 mS
squared, etc. The chart to the right gives
the range of times you can expect. Maximum 350 mS
To calculate scan time increase, we also must know (or estimate) the scan time of
the ladder (without loops). A fast scan time will increase by a smaller percentage
than a slow scan time will, when adding the same PID loop calculation load in each
case. The formula for average scan time calculation is:
Scan time without loop

Avg. Scan Time with PID loop = X PID calculation time + Scan time without loop
Sample rate of loop
For example, suppose the estimated scan time without loop calculations is 50 mS,
and the loop sample time is 3 seconds. Now, calculate the new scan time:
PID Loop Operation

50 mS
Average Scan time with PID loop = X 250 mS + 50 mS = 50.004 mS
3 sec.
As the calculation shows, the addition of only one loop with a slow sample rate has a
very small effect on scan time. Next, expand the equation above to show the effect of
adding any number of loops:
n=L
Avg. Scan Time with PID loops =

S n=1
Scan time without loop
Sample rate of nth loop
X PID calculation time + Scan time
without loops
Maintenance
In the new equation above, you calculate the summation term (inside the brackets)
for each loop from 1 to L (last loop), and add the right-most term scan time without
loops only once at the end. Suppose you have a DL05 PLC controlling four loops.
The table below shows the data and summation term values for each loop.
Loop Number Description Sample Rate Summation Term

1 Steam Flow, Inlet valve 0.25 sec 50 mS
2 Water bath temperature 30 sec 0.42 mS
3 Dye level, main tank 10 sec 1.25 mS
4 Steam Pressure, Autoclave 1.5 sec 8.3 mS
Now adding the summation terms, plus the original scan time value, we have:
Avg. Scan Time with PID loops = 50 mS + 0.42 mS + 1.25 mS + 8.3 mS + 50 mS = 50.06 mS
816
PID Loop Operation
The DL05 CPU only does PID calculation on a particular scan for the loop(s) which
have sample time periods that are due for an update (calculation). The built-in loop
scheduler applies the following rules:
S Loops with sample rates 2 seconds are processed at the rate of as
many loops per scan as is required to maintain each loops sample rate.
Specifying loops with fast sample rates will increase the PLC scan time.
So, use this capability only if you need it!
S Loops with sample rates > 2 seconds are processed at the rate of one
or fewer loops per scan, at the minimum rate required to maintain each
loops sample rate.
The implementation of loop calculation scheduling is shown in the flow chart below.
This is a more detailed look at the contents of the Calculate PID Loops task in the
CPU scan activities flow chart. The pointers I and J correspond to the slow (> 2
sec) and fast ( 2 sec) loops, respectively. The flow chart allows the J pointer to
increment from loop 1 to the last loop, if there are any fast loops specified. The I
pointer increments only once per scan, and then only when the next slow loop is due
for an update. In this way, both I and J pointers cycle from 1 to the highest loop
number used, except at different rates. Their combined activity keeps all loops
properly updated.
PID Loop Operation
Loop Sample Times 2 seconds: Loop Sample Times > 2 seconds:
Begin PID loop task
Loop J
No No Loop I
Sample rate 2 sec?
Time up?
Yes Yes
and Troubleshooting
Loop I
Maintenance
No Loop J PID Calculation

Time up?
Yes
Loop J Set I = I+1

PID Calculation
I > total number Yes

selected loops?
No J > total Yes
number of loops?
No Set I=0
Set J = J+1 Set J = 0
End PID loop task

817
PID Loop Operation
Ten Steps to Successful Process Control

Modern electronic controllers such as the DL05 CPU provide sophisticated process
control features. Automated control systems can be difficult to debug, because a
given symptom can have many possible causes. We recommend a careful,
step-by-step approach to bringing new control loops online:
Step 1: The most important knowledge is how to make your product. This knowledge is
Know the Recipe the foundation for designing an effective control system. A good process recipe
will do the following:
S Identify all relevant Process Variables, such as temperature, pressure, or
flow rates, etc. which need precise control.
S Plot the desired Setpoint values for each process variables for the duration
of one process cycle.
Step 2: This simply means choosing the method the machine will use to maintain control
Plan Loop over the Process Variables to follow their Setpoints. This involves many issues and
Control Strategy trade-offs, such as energy efficiency, equipment costs, ability to service the machine
during production, and more. You must also determine how to generate the Setpoint
value during the process, and whether a machine operator can change the SP.
Step 3: Assuming the control strategy is sound, it is still crucial to properly size the actuators
PID Loop Operation

Size and Scale and properly scale the sensors.
Loop Components S Choose an actuator (heater, pump. etc.) which matches the size of the
load. An oversized actuator will have an overwhelming effect on your
process after a SP change. However, an undersized actuator will allow
the PV to lag or drift away from the SP after a SP change or process
disturbance.
S Choose a PV sensor which matches the range of interest (and control)
for our process. Decide the resolution of control you need for the PV
(such as within 2 deg. C), and make sure the sensor input value
provides the loop with at least 5 times that resolution (at LSB level).
However, an over-sensitive sensor can cause control oscillations, etc.
Maintenance
The DL05 provides 12bit and 15bit unipolar and bipolar data format
options, and a 16bit unipolar option. This selection affects SP, PV,
Control Output and Integrator sum.
Step 4: After deciding the number of loops, PV variables to measure, and SP values, you
Select I/O Modules can choose the appropriate I/O modules. Refer to the figure on the next page. In
many cases, you will be able to share input or output modules, or use a analog I/O
combination module, among several control loops. The example shown sends the
PV and Control Output signals for two loops through the same set of modules.
We offer DL05 analog input modules with 4 channels per module
that accept 0 20mA or 4 20mA signals. Also, analog input and output combination
modules are now available.
818
PID Loop Operation
DL05 CPU
Input V-memory Digital
Module Output
Loop 1 Data
Channel 1 PV SP OUT Channel 1 Process 1
Loop 2 Data
Channel 2 PV SP OUT Channel 2 Process 2
Channel 3
Channel 4
Step 5: After selection and procurement of all loop components and I/O module(s), you can
Wiring and perform the wiring and installation. Refer to the wiring guidelines in Chapter 2 of this
Installation Manual, and to the D0OPTIONSM manual. The most common wiring errors when
installing PID loop controls are:
S Reversing the polarity of sensor or actuator wiring connections.
S Incorrect signal ground connections between loop components.
PID Loop Operation
Step 6: After wiring and installation, choose the loop setup parameters. The easiest method
Loop Parameters for programming the loop tables is using DirectSOFT32 (3.0c or later). This software
provides PID Setup dialog boxes which simplify the task. Note: It is important to
understand the meaning of all loop parameters mentioned in this chapter before
choosing values to enter.
Step 7: With the sensor and actuator wiring done, and loop parameters entered, we must
Check Open Loop manually and carefully check out the new control system (use Manual Mode).
Performance S Verify that the PV value from the sensor is correct.
S If it is safe to do so, gradually increase the control output up above 0%,
and Troubleshooting
and see if the PV responds (and moves in the correct direction!).

Maintenance
Step 8: If the Open Loop Test (see Loop Tuning on page 838) shows the PV reading is
Loop Tuning correct and the control output has the proper effect on the process, you can follow
the closed loop tuning procedure (see Automatic Mode on page 839). In this step,
you tune the loop so the PV automatically follows the SP.
Step 9: If the closed loop test shows the PV will follow small changes in the SP, consider
Run Process Cycle running an actual process cycle. You will need to have completed the programming
which will generate the desired SP in real time. In this step, you may want to run a
small test batch of product through the machine, watching the SP change according
to the recipe.
WARNING: Be sure the Emergency Stop and power-down provision is readily

accessible, in case the process goes out of control. Damage to equipment and/or
serious injury to personnel can result from loss of control of some processes.
Step 10: When the loop tests and tuning sessions are complete, be sure to save all loop setup
Save Parameters parameters to disk.
819
PID Loop Operation
Basic Loop Operation

Data Locations Each PID loop is dependent on the instructions and data values in its respective loop
table. The following diagram shows an example of the loop table locations
corresponding to the main three loop variables: SP, PV, and Control Output. The
example below begins at V2000 (you can use any memory location compatible with
Loop Table requirements). The SP, PV and Control Output are located at the
addresses shown.
Setpoint V+02 Error Loop Control Output V+05

+ S Term Calculation

Process Variable V+03
Loop Table
V2002 XXXX Setpoint
V2003 XXXX Process Variable
V2005 XXXX Control Output
Data Sources The data for the SP, PV, and Control Output must interface with real-world devices.
PID Loop Operation

In the figure below, the sources or destinations are shown for each loop variable. The
Control Output and Process Variable values move through the analog input/output
combination module to interface with the process itself.
A few rungs of ladder logic are required to copy data from the analog module to the
loop table, or vice versa. Refer to the analog module chapter of this manual for an
example of the required ladder logic.
Setpoint V+02 Loop Control Output V+05

+ S Calculation Analog
Maintenance
Setpoint Sources: Output
Process
Operator Input
Ramp/soak generator Process Variable V+03
Ladder Program Analog
Another loops output (cascade) Input
The Setpoint has several possible sources, as listed above. Many applications will
use two or more of the sources at different times, depending on the loop mode. In
addition, the loop control strategy and programming method also determine how the
setpoint is generated.
When using the built-in Ramp/Soak generator or when cascading a loop, the PID
controller automatically writes the setpoint data in location V+02 for you. If you want
to use a setpoint from any other source, the ladder program must write that
setpoint to the loop table location V+02.
Each of the three main loop parameters can have only one source or destination at
any given time. During the application development, it is a good idea to draw loop
schematic diagrams showing data sources, etc., to help avoid mistakes.
820
PID Loop Operation
Direct Access The loop controller in the DL05 PLC has the ability to directly access analog input
to Analog I/O and output values independent of the ladder logic scan. These values represent the
process variable (PV) and the control output. The Direct Access feature makes it
possible for the loop controller to perform closed-loop control while the CPU is in
Program Mode.
The loop controller can read the analog PV value in the selected data format directly
from the desired analog input module and write the control output value in the same or
a different data format to the desired analog output. The Direct Access feature, when
enabled, accesses the analog values only once per PID calculation for each
respective loop. The ladder logic, however, may simultaneously access the same
analog input data by the standard method (LD instruction) or by the pointer method
whenever the CPU is in Run Mode.
NOTE: If PID direct access is used, do not use the analog output pointer logic to send
data to the outputs.
You may optionally configure each loop to access its analog I/O (PV and control
output) by placing proper values in the associated loop table registers. The figure
below shows the loop table parameters at V+36 and V+37 and their role in direct
access to the analog values.
Setpoint V+02 Error Loop Control Output V+05

PID Loop Operation
+ S Calculation
-
Process Variable V+03
Loop Table
V2036 0F XX Slot / channel number for PV
V2037 0F XX Slot / channel number for Output
0F XX
and Troubleshooting
Channel number, 1 to 4
Maintenance
Stands for Option Module.Slot
You may program these loop table parameters directly, or use the appropriate
DirectSOFT32 dialog box for easy configuring. For example, a value of 0F02 in
register V2036 directs the loop controller to read the PV data from channel 1 of the
analog input module. A value of 0000 in either register tells the loop controller not to
access the corresponding analog value directly. In that case, ladder logic must
transfer the value between the loop table and the analog input module.
If the PV or control output values require some math manipulation by ladder logic,
then it will not be possible to use the direct access function of the loop controller. In
this case, ladder logic will have to perform the math and transfer the data from the
analog module as required.
NOTE: The loop controller restricts the transfer of analog data to or from the module
to one method. In other words, you must designate the analog module for direct
access or ladder logic access.
821
PID Loop Operation
Loop Modes The DL05 gives you the three standard control modes: Manual, Automatic, and
Cascade. The sources of the three basic variables SP, PV, and control output are
different for each mode. An introduction to the three control modes and their signal
sources follows.
In Manual Mode, the loop is not executing PID calculations (however, loop alarms
are still active). With regard to the loop table, the CPU stops writing values to location
V+05 for that loop. It is expected that an operator or other intelligent source is
manually controlling the output, by observing the PV and writing data to V+05 as
necessary to keep the process under control. The drawing below shows the
equivalent schematic diagram of manual mode operation.
Input from Operator Manual

Control Output V+05
Loop
Calculation
Auto
In Automatic Mode, the loop operates normally and generates new control output
values. It calculates the PID equation and writes the result in location V+05 every
sample period of that loop. The equivalent schematic diagram is shown below.
Input from Operator Manual
PID Loop Operation

Control Output V+05
Loop
Calculation
Auto
In Cascade Mode, the loop operates as it does in Automatic Mode, with one
important difference. The data source for the SP changes from its normal location at
V+02, using the control output value from another loop. So in Auto or Manual modes,
the loop calculation uses the data at V+02. In Cascade Mode, the loop calculation
reads the control output from another loops parameter table.
Maintenance
Another loop Cascaded loop
Control Output V+05 Cascade

Loop
Calculation Control Output
Setpoint Loop
+ S Calculation
Normal SP V+02
Auto/Manual Process Variable
As pictured below, A loop can be changed from one mode to another, but cannot go
from Manual Mode directly to Cascade, or vice versa. This mode change is
prohibited because a loop would be changing two data sources at the same time,
and could cause a loss of control.
Manual Automatic Cascade

822
PID Loop Operation
CPU Modes and The DL05 PLC has the ability to run PID calculations while the CPU is in Program
Loop Modes Mode. Usually, a CPU in Program Mode has halted all operations. However, a DL05
PLC in Program Mode may or may not be running PID calculations (and providing
PID control output), depending on your configuration settings. Having the ability to
run loops independent of the ladder logic makes it feasible to make a ladder logic
change while the process is still running. This is especially beneficial for large-mass
continuous processes that are difficult or costly to interrupt.
Loops that run independent of the ladder scan must have the ability to directly
access the analog module channels for the PV and control output values. The loop
controller does have this capability, which is covered in the section on direct access
of analog I/O (located prior to this section in this chapter).
The relationship between CPU modes and loop modes is depicted in the figure
below. The vertical dashed line shows the optional relationship between the mode
changes. Bit 15 of PID Mode 1 setting word (V+00) determines the selection. If set to
zero so the loop follows the CPU mode, then placing the CPU in Program Mode will
force all loops into Manual Mode. Similarly, placing the CPU in Run mode will allow
each loop to return to the mode it was in previously (which includes Manual,
Automatic, and Cascade). With this selection you automatically affect the modes of
the loops by changing the CPU mode.
CPU Modes:
PID Loop Operation
Mode change
Program Run
Loop Mode Linking
0 = loop follows PLC mode PID Mode 1 Setting V+00

1 = loop is independent
of PLC mode Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Loop
and Troubleshooting
Modes:
Maintenance
Mode change Mode change

If Bit 15 is set to one, then the loops will run independent of the CPU mode. It is like
having two independent processors in the CPU... one is running ladders and the
other is running the process loops.
NOTE: To make changes to any loop table parameter values, the PID loop must be
in Manual Mode and the PLC must be stopped. If you have selected (as shown
above) to operate the PID loop independent of the CPU mode, then you must take
certain steps to make it possible to make loop parameter changes. You can
temporarily make the loops follow the CPU mode by changing bit 15 to 0. Then your
programming device (such as DirectSOFT32) will be able to place the loop into
Manual Mode. After you change the loops parameter setting, just restore bit 15 to a
value of 1 to re-establish PID operation independent of the CPU.
823
PID Loop Operation
How to Change The first three bits of the PID Mode 1 word PID Mode 1 Setting V+00
Loop Modes (V+00) request the operating mode of the
corresponding loop. Note: these bits are Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
mode change requests, not commands
(certain conditions can prohibit a
Cascade Manual
particular mode change see next page).
Automatic
The normal state of these mode request bits is 000. To request a mode change, you
must SET the corresponding bit to a 1, for one scan. The PID loop controller
automatically resets the bits back to 000 after it reads the mode change request.
Methods of requesting mode changes are:
S DirectSOFT32s PID View this is the easiest method. Click on one of
the radio buttons, and DirectSOFT32 sets the appropriate bit.
S HPP Use Word Status (WD ST) to monitor the contents of V+00,
which will be a 4-digit BCD/hex value. You must calculate and enter a
new value for V+00 that ORs the correct mode bit with its current value.
S Ladder program ladder logic can request any loop mode when the
PLC is in Run Mode. This will be necessary after application startup.
Use the program shown to the right to SET Go to Auto Mode
the mode bit on (do not use an out coil). On X0 B2000.1
PID Loop Operation

a 01 transition of X0, the rung sets the SET
Auto bit = 1. The loop controller resets it.
S Operator panel interface the operators panel to ladder logic using

standard methods, then use the technique above to set the mode bit.
Since we can only request mode changes, the PID loop controller decides when to
permit mode changes and provides the loop mode status. It reports the current mode
on bits 0, 1, and 2 of the Loop Mode and Alarm Status word, location V+06 in the loop
table. The parallel request / monitoring functions are shown in the figure below. The
figure also shows the two possible mode-dependent SP sources, and the two
possible Control Output sources.
Manual
Maintenance
Input from Operator
Control Output
from another loop Cascade Control Output
Setpoint Error Term Loop
+ S Calculation
Normal Source Auto/Cascade
Mode Select
PID Mode
Control
PID Mode 1 Setting V+00 Loop Mode and Alarm Status V+06
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Mode Request Mode Monitoring

Cascade Manual Cascade Manual
Automatic Automatic
824
PID Loop Operation
Operator Panel Since the modes Manual, Auto, and Cascade are the most fundamental and
Control of important PID loop controls, you may want to hard-wire mode control switches to
PID Modes an operators panel. Most applications will need only Manual and Auto selections
(Cascade is used in a few advanced applications). Remember that mode controls
are really mode request bits, and the actual loop mode is indicated elsewhere.
The following figure shows an operators panel using momentary push-buttons to
request PID mode changes. The panels mode indicators do not connect to the
switches, but interface to the corresponding data locations.
Operators Panel Manual
Auto
Mode Request Mode Monitoring
Cascade
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PLC Modes Effect If you have selected the option for the loops to follow the PLC mode, the PLC modes
on Loop Modes (Program, Run) interact with the loops as a group. The following summarizes this
PID Loop Operation
interaction:
S When the PLC is in Program Mode, all loops are placed in Manual Mode
and no loop calculations occur. However, note that output modules
(including analog outputs) turn off in PLC Program Mode. So, actual
manual control is not possible when the PLC is in Program Mode.
S The only time the CPU will allow a loop mode change is during PLC run
Mode operation. As such, the CPU records the modes of all 16 loops as
the desired mode of operation. If power failure and restoration occurs
during PLC Run Mode, the CPU returns all loops to their prior mode
(which could be Manual, Auto, or Cascade).
and Troubleshooting
S On a Program-to-Run mode transition, the CPU forces each loop to

return to its prior mode recorded during the last PLC Run Mode.
Maintenance
S You can add and configure new loops only when the PLC is in Program
Mode. New loops automatically begin in Manual Mode.
Loop Mode In normal conditions the mode of a loop is determined by the request to V+00, bits 0,
Override 1, and 2. However, some conditions exist which will prevent a requested mode
change from occurring:
S A loop that is not set independent of PLC mode cannot change modes
when the PLC is in Program mode.
S A major loop of a cascaded pair of loops cannot go from Manual to Auto
until its minor loop is in Cascade mode.
In other situations, the PID loop controller will automatically change the mode of the
loop to ensure safe operation:
S A loop which develops an error condition automatically goes to Manual.
S If the minor loop of a cascaded pair of loops leaves Cascade Mode for
any reason, its major loop automatically goes to Manual Mode.
825
PID Loop Operation
Bumpless In process control, the word transfer has a particular meaning. A loop transfer
Transfers occurs when we change its mode of operation, as shown below. When we change
loop modes, what we are really doing is causing a transfer of control of some loop
parameter from one source to another. For example, when a loop changes from
Manual Mode to Automatic Mode, control of the output changes from the operator to
the loop controller. When a loop changes from Automatic Mode to Cascade Mode,
control of the SP changes from its original source in Auto Mode to the output of
another loop (the major loop).
Mode change Mode change

Operator Transfer PID

generates calculates
loop output loop output
SP Transfer SP
generated generated
local to loop remotely by
major loop
The basic problem of loop transfers is the two different sources of the loop parameter
PID Loop Operation

being transferred will have different numerical values. This causes the PID
calculation to generate an undesirable step change, or bump on the control output,
thereby upsetting the loop to some degree. The bumpless transfer feature
arbitrarily forces one parameter equal to another at the moment of loop mode
change, so the transfer is smooth (no bump on the control output).
The bumpless transfer feature of the DL05 PID Mode 1 Setting V+00
loop controller is available in two types:
Bumpless I, and Bumpless II. Use Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DirectSOFT32s PID Setup dialog box to
select transfer type. Or, you can use bit 3 Bumpless Transfer I / II select
of PID Mode 1 V+00 setting as shown.
Maintenance
The characteristics of Bumpless I and II transfer types are listed in the chart below.
Note that their operation also depends on which PID algorithm you are using, the
position or velocity form of the PID equation. Note that you must use Bumpless
Transfer type I when using the velocity form of the PID algorithm.
Transfer Transfer PID Algorithm Manual-to-Auto Auto-to-Cascade

Type Select Bit Transfer Action Transfer Action
Bumpless 0 Position Forces Bias = Control Output Forces Major Loop Output =
Transfer I Forces SP = PV Minor Loop PV
Velocity Forces SP = PV Forces Major Loop Output =
Minor Loop PV
Bumpless 1 Position Forces Bias = Control Output none
Transfer II
Velocity none none
826
PID Loop Operation
PID Loop Data Configuration

Loop Parameter In choosing the Process Variable range and resolution, a related choice to make is
Data Formats the data format of the three main loop variables: SP, PV, and Control Output (the
Integrator sum in V+04 also uses this data format). The four data formats available
are 12 or 15 bit (right justified), signed or unsigned (MSB is sign bit in bipolar
formats). The four binary combinations of bits 0 and 1 of PID Mode 2 word V+01
choose the format. The DirectSOFT32 PID Setup dialog sets these bits
automatically when you select the data format from the menu.
Setpoint V+02 Loop Control Output V+05

+ S Calculation

PID Mode 2 Setting V+01 Process Variable V+03

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data formats LSB

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
00 12 bit unipolar 0 to 0FFF (0 to 4095)
PID Loop Operation
Select data
01 12 bit bipolar 0 to 0FFF, 8FFF to 8001
format using
(0 to 4095, 4095 to 1)
bits 0 and 1.
10 15 bit unipolar 0 to 32767
11 15 bit bipolar 0 to 7FFF, FFF to 8001

(0 to 32767, 32767 to 1)
= sign bit
The data format is a very powerful setting, because it determines the numerical
interface between the PID loop and the PV sensor, and the Control Output device.
The Setpoint must also be in the same data format. Normally, the data format is
and Troubleshooting
chosen during the initial loop configuration and is not changed again.
Maintenance
Choosing Unipolar Choosing the data format involves deciding whether to use unipolar or bipolar
or Bipolar Format numbers. Most applications such as temperature control will use only positive
numbers, and therefore need unipolar format. Usually it is the Control Output which
determines bipolar/unipolar selection. For example, velocity control may include
control of forward and reverse directions. At a zero velocity setpoint the desired
control output is also zero. In that case, bipolar format must be used.
Unipolar Bipolar
827
PID Loop Operation
Handling In many batch process applications, sensors or actuators interface to DL05 analog
Data Offsets modules using 420 mA signals. This signal type has a built-in 20% offset, because
the zero-point is a 4 mA instead of 0 mA. However, remember the analog modules
convert the signals into data and remove the offset at the same time. For example, a
420 mA signal is often converted to 0000 0FFF hex, or 0 to 4095 decimal. In this
case, all you need to do is choose 12-bit unipolar data format, and make sure the
ladder program copies the data appropriately between the loop table and the analog
modules.
S PV Offset In the event you have a PV value with a 20% offset, convert
it to zerooffset by subtracting 20% of the top of its range, and multiply
by1.25.
S Control Output In the event the Control Output is going to a device
with 20% offset, all you need to do is have the ladder program write a
value equivalent to the offset to the integrator register (V+04), before
transitioning from Manual to Auto mode. The loop will then see this
offset as a part of the process, taking care of it for you automatically.
Setpoint (SP) The Setpoint in loop table location V+02 represents the desired value of the process
Limits variable. After selecting the data format for these variables, you can set limits on the
range of SP values which the loop calculation will use. Many loops have two or more
possible sources writing the Setpoint at various times, and the limits you set will help
safeguard the process from the effects of a bad SP value.
PID Loop Operation

In the figure below, the SP has a selectable limit function, enabled by PID Mode 2
Setting V+01 word, bit 3. If enabled, then locations V+26 and V+27 determine the
lower and upper SP limits, respectively. The loop calculation applies this limit
internally, so it is always possible to write any value to V+02.
No
Limits
0
Control
Setpoint Loop Output
With + S Calculation
1
Limits
Maintenance
Process Variable (PV)
Loop Table
V+26 XXXX SP Lower Limit PID Mode 2 Setting V+01
V+27 XXXX SP Upper Limit
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SP Limits enable
The loop calculation checks these SP upper and lower limits before each
calculation. This means ladder logic can change the limit settings while a process is
in progress, allowing you to keep a tighter guard band on the SP input value.
828
PID Loop Operation
Remote Setpoint You may recall there are generally several possible data sources for the SP value.
(SP) Location The PID loop controller has the built-in ability to select between two sources
according to the current loop mode. Refer to the figure below. A loop reads its
setpoint from table location V+02 in Auto or Manual modes. If you plan to use
Cascade Mode for the loop at any time, then you must program its loop parameter
table with a remote setpoint pointer.
The Remote SP pointer resides in location V+32 in the loop table. For loops that will
be cascaded (made a minor loop), you will need to program this location with the
address of the major loops Control Output address. Find the starting location of the
major loops parameter table and add offset +05 to it.
Loop Table
V+32 XXXX Remote SP Pointer
Another loop
(major loop) Cascaded loop
Cascade (minor loop)
Loop Control Output V+05
Calculation Control Output
Setpoint Loop
+ S Calculation
Normal SP V+02
PID Loop Operation
A DirectSOFT32 Loop Setup dialog box will allow you to enter the Remote SP
pointer if you know the address. Otherwise, you can enter it with a HPP or program it
through ladder logic using the LDA instruction.
Process Variable The process variable input to each loop is the value the loop is ultimately trying to
(PV) Configuration control, to make it equal to the setpoint and follow setpoint changes as quickly as
possible. Most sensors for process variables have a primarily linear response curve.
Most temperature sensors are mostly linear across their sensing range. However,
flow sensing using an orifice plate technique gives a signal representing
(approximately) the square of the flow. Therefore, a square-root extract function is
and Troubleshooting
necessary before using the signal in a linear control system (such as PID).
Maintenance
Some flow transducers are available which will do the square-root extract, but they
add cost to the sensor package. The PID loop PV input has a selectable square-root
extract function, pictured below. You can select between normal (linear) PV data,
and data needing a square-root extract by using PID Mode setting V+00 word, bit 6.
Setpoint Loop Control Output

+ S Calculation

Linear PV
0
Process Variable
1 Square-
root PV
PID Mode 1 Setting V+00
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Linear/Square-root PV select
829
PID Loop Operation
IMPORTANT: The scaling of the SP must be adjusted if you use PV square-root

extract, because the loop drives the output so the square root of the PV is equal to
the PV input. Divide the desired SP value by the square root of the analog span, and
use the result in the V+02 location for the SP. This does reduce the resolution of the
SP, but most flow control loops do not require a lot of precision (the recipient of the
flow is integrating the errors). Use one of the following formulas for the SP according
to the data format you are using. Its a good idea to set the SP upper limit to the top of
the allowed range.
Data Format SP Scaling SP Range PV range

12-bit SP = PV input / 64 0 64 0 4095
15-bit SP = PV input / 181.02 0 181 0 32767
Control Output The Control Output is the numerical result of the PID calculation. All of the other
Configuration parameter choices ultimately influence the value of a loops Control Output for each
calculation. Some final processing selections dedicated to the Control Output are
available, shown below. At the far right of the figure, the final output may be restricted
by lower and upper limits that you program. The values for V+30 and V+31 may be
set once using DirectSOFT32s PID Setup dialog box.
PID Loop Operation

The Control Output lower and upper limits can help guard against commanding an
excessive correction to an error when a loop fault occurs (such as PV sensor signal
loss). However, do not use these limits to restrict mechanical motion that might
otherwise damage a machine (use hard-wired limit switches instead).
With
Normal Output
0 Limits
+ S Calculation
Inverted Output 1
Process Variable
Maintenance
Loop Table
V+30 XXXX Control Output Lower Limit
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 V+31 XXXX Control Output Upper Limit
Normal / Inverted Output Select
The other available selection is the normal/inverted output selection (called

forward/reverse in DirectSOFT). Use bit 4 of the PID Mode 1 Setting V+00 word to
configure the output. Independently of unipolar or bipolar format, a normal output
goes upward on positive errors and downward on negative errors (where
Error=(SPPV)). The inverted output reverses the direction of the output change.
The normal/inverted output selection is used to configure
direct-acting/reverse-acting loops. This selection is ultimately determined by the
direction of the response of the process variable to a change in the control output in a
particular direction. Refer to the PID Algorithms section for more on direct-acting and
reverse-acting loops.
830
PID Loop Operation
Error Term The Error term is internal to the CPUs PID loop controller, and is generated again in
Configuration each PID calculation. Although its data is not directly accessible, you can easily
calculate it by subtracting: Error = (SPPV). If the PV square-root extract is enabled,
then Error = (SP (sqrt(PV)). In any case, the size of the error and algebraic sign
determine the next change of the control output for each PID calculation.
Now we will superimpose some special effects on to the error term as described.
Refer to the diagram below. Bit 7 of the PID Mode Setting 1 V+00 word lets you select
a linear or squared error term, and bit 8 enables or disables the error deadband.
NOTE: When first configuring a loop, its best to use the standard error term. After
the loop is tuned, then you will be able to tell if these functions will enhance control.
Error Error
0 0
Error
Setpoint Term Loop
+ S Error Error with Calculation
1 1
squared Deadband
Process Variable
PID Loop Operation
PID Mode 1 Setting V+00 Loop Table

V+23 XXXX Error Deadband
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Error Deadband select Linear/Squared Error select
Error Squared When selected, the squared error function simply squares the
error term (but preserves the original algebraic sign), which is used in the
calculation. This affects the Control Output by diminishing its response to smaller
error values, but maintaining its response to larger errors. Some situations in which
and Troubleshooting
the error squared term might be useful:

Maintenance
S Noisy PV signal using a squared error term can reduce the effect of
low-frequency electrical noise on the PV, which will make the control
system jittery. A squared error maintains the response to larger errors.
S Non-linear process some processes (such as chemical pH control)
require non-linear controllers for best results. Another application is
surge tank control, where the Control Output signal must be smooth.
Error Deadband When selected, the error deadband function takes a range of
small error values near zero, and simply substitutes zero as the value of the error. If
the error is larger than the deadband range, then the error value is used normally.
Loop parameter location V+23 must be programmed with a desired deadband
amount. Units are the same as the SP and PV units (0 to FFF in 12-bit mode, and 0 to
7FFF in 15-bit mode). The PID loop controller automatically applies the deadband
symmetrically about the zero-error point.
831
PID Loop Operation
PID Algorithms
The ProportionalIntegralDerivative (PID) algorithm is widely used in process
control. The PID method of control adapts well to electronic solutions, whether
implemented in analog or digital (CPU) components. The DL05 CPU implements the
PID equations digitally by solving the basic equations in software. I/O modules serve
only to convert electronic signals into digital form (or vise-versa).
The DL05 features two types of PID controls: position and velocity. These terms
usually refer to motion control situations, but here we use them in a different sense:
S PID Position Algorithm The control output is calculated so it responds
to the displacement (position) of the PV from the SP (error term).
S PID Velocity Algorithm The control output is calculated to represent
the rate of change (velocity) for the PV to become equal to the SP.
The majority of applications will use the position form of the PID equation. If you are
not sure of which algorithm to use, try the Position Algorithm first. Use
DirectSOFT32s PID View Setup dialog box to select the desired algorithm. Or, use
bit 5 of PID Mode 1 Setting V+00 word as shown below to select the algorithm.
Loop Calculation
0
Position Algorithm
PID Loop Operation

Setpoint Error Control Output
+ S
1
Velocity Algorithm
Process Variable PID Mode 1 Setting V+00
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Position / Velocity select
NOTE: The selection of a PID algorithm is very fundamental to control loop

operation, and is normally never changed after the initial configuration of a loop.
Maintenance
Position Algorithm The Position Algorithm causes the PID equation to calculate the Control Output Mn:
n
Mn = Kc * en + Ki * S ei + Kr * (en en1) + Mo
i=1
In the formula above, the sum of the integral terms and the initial output are
combined into the Bias term, Mx. Using the bias term, we define formulas for the
Bias and Control Output as a function of sampling time:
Mxo =Mo
Mxn =Ki * en + Mxn1
n
Mn = Ki * S ei + Mo
i=1
Mn = Kc * en + Kr * (en en1) + Mxn.....Output for sampling time n
832
PID Loop Operation
The position algorithm variables and related variables are:

Ts = Sample rate
Kc = Proportional gain
Ki = Kc * (Ts/Ti) coefficient of integral term
Kr = Kc * (Td/Ts) coefficient of derivative term
Ti = Reset time (integral time)
Td = Rate time (derivative time)
SPn = Set Point for sampling time n (SP value)
PVn = Process variable for sampling time n (PV)
en = SPn PVn = Error term for sampling time n
M0 = Control Output for sampling time 0
Mn = Control Output for sampling time n
Analysis of these equations will be found in most good text books on process control.
At a glance, we can isolate the parts of the PID Position Algorithm which correspond
to the P, I, and D terms, and the Bias as shown below.
n
i=1
Control Proportional Integral Derivative Initial

Output Term Term Term Output
PID Loop Operation
Bias
Term
The initial output is the output value assumed from Manual mode control when the
loop transitioned to Auto Mode. The sum of the initial output and the integral term is
the bias term, which holds the position of the output. Accordingly, the Velocity
Algorithm discussed next does not have a bias component.
Velocity Algorithm The Velocity Algorithm form of the PID equation can be obtained by transforming
and Troubleshooting
Position Algorithm formula with subtraction of the equation of (n1)th degree from
the equation of nth degree.
Maintenance
The velocity algorithm variables and related variables are:
Ts = Sample rate
Kc = Proportional gain
Ki = Kc * (Ts/Ti) = coefficient of integral term
Kr = Kc * (Td/Ts) = coefficient of derivative term
Ti = Reset time (integral time)
Td = Rate time (derivative time)
SPn = Set Point for sampling time n (SP value)
PVn = Process variable for sampling time n (PV)
en = SPn PVn = Error term for sampling time n
Mn = Control Output for sampling time n
The resulting equations for the Velocity Algorithm form of the PID equation are:
DMn =Mn Mn1
DMn = Kc * (en en1) + Ki * en + Kr * (en 2*en1 +en2)
833
PID Loop Operation
Direct-Acting and The gain of a process determines, in part, how it must be controlled. The process
Reverse-Acting shown in the diagram below has a positive gain, which we call direct-acting. This
Loops means that when the control output increases, the process variable also eventually
increases. Of course, a true process is usually a complex transfer function that
includes time delays. Here, we are only interested in the direction of change of the
process variable in response to a control output change.
Most process loops will be direct-acting, such as a temperature loop. An increase in
the heat applied increases the PV (temperature). Accordingly, direct-acting loops
are sometimes called heating loops.
Direct-Acting Loop Process

+ S Calculation +

Process Variable
A reverse-acting loop is one in which the process has a negative gain, as shown
below. An increase in the control output results in a decrease in the PV. This is
commonly found in refrigeration controls, where an increase in the cooling input
causes a decrease in the PV (temperature). Accordingly, reverse-acting loops are
sometimes called cooling loops.
PID Loop Operation

Reverse-Acting Loop Process
+ S Calculation

Process Variable
It is crucial to know whether a particular loop is direct or reverse-acting!

Unless you are controlling temperature, there is no obvious answer. In a flow control
loop, a valve positioning circuit can be configured and wired reverse-acting as easily
Maintenance
as direct-acting. One easy way to find out is to run the loop in Manual Mode, where
you must manually generate control output values. Observe whether the PV goes up
or down in response to a step increase in the control output.
To run a loop in Auto or Cascade Mode, the control output must be correctly
programmed (refer to the previous section on Control Output Configuration). Use
normal output for direct-acting loops, and inverted output for reverse-acting
loops. To compensate for a reverse-acting loop, the PID controller must know to
invert the control output. If you have a choice, configure and wire the loop to be
direct-acting. This will make it easier to view and interpret loop data during the loop
tuning process.
834
PID Loop Operation
P-I-D Loop Terms You may recall the introduction of the position and velocity forms of the PID loop
equations. The equations basically show the three components of the PID
calculation. The following figure shows a schematic form of the PID calculation, in
which the control output is the sum of the proportional, integral and derivative terms.
On each calculation of the loop, each term receives the same error signal value.
Loop Calculation
P
Setpoint Error Term + Control Output
+ S I + S
D +
Process Variable
The role of the P, I, and D terms in the control task are as follows:
S Proportional the proportional term simply responds proportionally to
the current size of the error. This loop controller calculates a
proportional term value for each PID calculation. When the error is zero,
the proportional term is also zero.
S Integral the integrator (or reset) term integrates (sums) the error
values. Starting from the first PID calculation after entering Auto Mode,
the integrator keeps a running total of the error values. For the position
form of the PID equation, when the loop reaches equilibrium and there
PID Loop Operation
is no error, the running total represents the constant output required to

hold the current position of the PV.
S Derivative the derivative (or rate) term responds to change in the
current error value from the error used in the previous PID calculation.
Its job is to anticipate the probable growth of the error and generate a
contribution to the output in advance.
The P, I, and D terms work together as a team. To do that effectively, they will need
some additional instructions from us. The figure below shows the P, I, and D terms
contain programmable gain values kp, ki, and kd respectively. The values reside in
and Troubleshooting
the loop table in the locations shown. The goal of the loop tuning process (covered
later) is to derive gain values that result in good overall loop performance.
Maintenance
NOTE: The proportional gain is also simply called gain, in PID loop terminology.
Loop Calculation
kp P

+ S ki I + S
+
Process Variable kd D
V+10 XX.XX Proportional gain

Loop Table V+11 XX.XX Integral gain
V+12 XX.XX Derivative gain
835
PID Loop Operation
The P, I and D gains are 4-digit BCD

numbers with values from 0000 to 9999. kp P
They contain an implied decimal point in
the middle, so the values are actually +
00.00 to 99.99. Some gain values have ki I + S
units Integral gain may be in units of +
seconds or minutes, by programming the
bit shown. Derivative gain is in seconds. kd D
V+10 XX.XX P gain
V+11 XX.XX I gain 0=sec, 1=min.
V+12 XX.XX D gain sec. PID Mode 2 Setting V+01
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Units select
In DirectSOFT32s trend view, you can program the gain values and units in realtime
while the loop is running. This is typically done only during the loop tuning process.
Proportional Gain This is the most basic gain of the three. Values range from
0000 to 9999, but they are used internally as xx.xx. An entry of 0000 effectively
removes the proportional term from the PID equation. This accommodates
applications which need integral-only loops.
PID Loop Operation

Integral Gain Values range from 0001 to 9998, but they are used internally as
xx.xx. An entry of 0000 or 9999causes the integral gain to be R, effectively
removing the integrator term from the PID equation. This accommodates
applications which need proportional-only loops. The units of integral gain may be
either seconds or minutes, as shown above.
Derivative Gain Values range from 0001 to 9999, but they are used internally as
xx.xx. An entry of 0000 allows removal of the derivative term from the PID equation
(a common practice). This accommodates applications which need proportional
and/or integral-only loops. The derivative term has an optional gain limiting feature,
discussed in the next section.
Maintenance
NOTE: It is very important to know how to increase and decrease the gains. The
proportional and derivative gains are as one might expect... smaller numbers
produce less gains and larger numbers produce more gain. However, the integral
term has a reciprocal gain(1/Ts), so smaller numbers produce more gain and larger
numbers produce less gain. This is very important to know during loop tuning.
Using a Subset of Each of the P, I, and D gains allows a setting to eliminate that term from the PID
PID Control equation. Many applications actually work best by using a subset of PID control. The
figure below shows the various combinations of PID control offered on the DL05. We
do not recommend using any other combination of control, because most of them
are inherently unstable.
P P
+ + + +
I + S I + S P S I S
D +
836
PID Loop Operation
Derivative Gain The derivative term is unique in that it has an optional gain-limiting feature. This is
Limiting provided because the derivative term reacts badly to PV signal noise or other causes
of sudden PV fluctuations. The function of the gain-limiting is shown in the diagram
below. Use bit 9 of PID Mode 1 Setting V+00 word to enable the gain limit.
Loop Calculation
Proportional
P
Control
Setpoint Error Term Integral + Output
+ S I + S
+
Derivative
D 0
Process Variable
Derivative, 1
gain-limited
Loop Table PID Mode 1 Setting V+00

V+25 00XX Derivative Gain Limit
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Derivative gain limit select

PID Loop Operation
The derivative gain limit in location V+25 must have a value between 0 and 20, in
BCD format. This setting is operational only when the enable bit = 1.
The gain limit can be particularly useful during loop tuning. Most loops can tolerate
only a little derivative gain without going into wild oscillations.
Bias Term In the widely-used position form of the PID equation, an important component of the
control output value is the bias term shown below. Its location in the loop table is in
V+04. the loop controller writes a new bias term after each loop calculation.
and Troubleshooting
n
Maintenance
i=1
Control Proportional Integral Derivative Initial

Output Term Term Term Output
V+04 XXXX Bias term

Bias Term
If we cause the error (en) to go to zero for two or more sample periods, the
proportional and derivative terms cancel. The bias term is the sum of the integral
term and the initial output (Mo). It represents the steady, constant part of the control
output value, and is similar to the DC component of a complex signal waveform.
The bias term value establishes a working region for the control output. When the
error fluctuates around its zero point, the output fluctuates around the bias value.
This concept is very important, because it shows us why the integrator term must
respond more slowly to errors than either the proportional or derivative terms.
837
PID Loop Operation
Bias Freeze The term reset windup refers to an undesirable characteristic of integrator
behavior which occurs naturally under certain conditions. Refer to the figure below.
Suppose the PV signal becomes disconnected, and the PV value goes to zero.
While this is a serious loop fault, it is made worse by reset windup. Notice the bias
(reset) term keeps integrating normally during the PV disconnect, until its upper limit
is reached. When the PV signal returns, the bias value is saturated (windup) and
takes a long time to return to normal. The loop output consequently has an extended
recovery time. Until recovery, the output level is wrong and causes further problems.
PV
PV loss PV loss
0
Reset windup Freeze bias enabled
Bias
Output
Recovery time Recovery time
PID Loop Operation

In the second PV signal loss episode in the figure, the freeze bias feature is enabled.
It causes the bias value to freeze when the control output goes out of bounds. Much
of the reset windup is thus avoided, and the output recovery time is much less.
For most applications, the freeze bias PID Mode 1 Setting V+00
feature will work with the loop as
described above. You may enable the Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
feature using the DirectSOFT32 PID View
setup dialog, or set bit 10 of PID Mode 1 Bias freeze
Setting word as shown to the right. select
NOTE: The bias freeze feature stops the bias term from changing when the control
Maintenance
output reaches the end of the data range. If you have set limits on the control output
other than the range (i.e, 04095 for a unipolar/12bit loop), the bias term still uses the
end of range for the stopping point and bias freeze will not work.
In the feedforward method discussed later in this chapter, ladder logic writes directly
to the bias term value. However, there is no conflict with the freeze bias feature,
because bias term writes due to feedforward are relatively infrequent when in use.
838
PID Loop Operation
Loop Tuning Procedure

This is perhaps the most important step in closed-loop process control. The goal of a
loop tuning procedure is to adjust the loop gains so the loop has optimal
performance in dynamic conditions. The quality of a loops performance may
generally be judged by how well the PV follows the SP after a SP step change.
Auto Tuning versus Manual Tuning you may change the PID gain values directly
(manual tuning), or you can have the PID processing engine in the CPU
automatically calculate the gains (auto tuning). Most experienced process
engineers will have a favorite method, and the DL05 will accommodate either
preference. The use of the auto tuning can eliminate much of the trial-and-error of
the manual tuning approach, especially if you do not have a lot of loop tuning
experience. However, note that performing the auto tuning procedure will get the
gains close to optimal values, but additional manual tuning changes can take the
gain values to their optimal values.
WARNING: Only authorized personnel fully familiar with all aspects of the process
should make changes that affect the loop tuning constants. Using the loop auto tune
procedures will affect the process, including inducing large changes in the control
output value. Make sure you thoroughly consider the impact of any changes to
minimize the risk of injury to personnel or damage to equipment. The auto tune in the
DL05 is not intended to perform as a replacement for your process knowledge.
PID Loop Operation
Open-Loop Test Whether you use manual or auto tuning, it is very important to verify basic
characteristics of a newly-installed process before attempting to tune it. With the
loop in Manual Mode, verify the following items for each new loop.
S Setpoint verify the source which is to generate the setpoint can do so.
You can put the PLC in Run Mode, but leave the loop in Manual Mode.
Then monitor the loop table location V+02 to see the SP value(s). The
ramp/soak generator (if you are using it) should be tested now.
S Process Variable verify the PV value is an accurate measurement,
and Troubleshooting
and the PV data arriving in the loop table location V+03 is correct. If the
Maintenance
PV signal is very noisy, consider filtering the input either through

hardware (RC low-pass filter), or using a digital S/W filter.
S Control Output if it is safe to do so, manually change the output a
small amount (perhaps 10%) and observe its affect on the process
variable. Verify the process is direct-acting or reverse acting, and check
the setting for the control output (inverted or non-inverted). Make sure
the control output upper and lower limits are not equal to each other.
S Sample Rate while operating open-loop, this is a good time to find the
ideal sample rate (procedure give earlier in this chapter). However, if
you are going to use auto tuning, note the auto tuning procedure will
automatically calculate the sample rate in addition to the PID gains.
The discussion beginning on the following page covers the manual tuning
procedure. If want to perform only auto tuning, please skip the next section and
proceed directly to the section on auto tuning.
839
PID Loop Operation
Manual Tuning Now comes the exciting moment when we actually close the loop (go to Auto Mode)
Procedure for the first time. Use the following checklist before switching to Auto mode:
S Monitor the loop parameters with a loop trending instrument. We
recommend using the PID view feature of DirectSOFT.
NOTE: We recommend using the PID trend view setup menu to select the vertical
scale feature to manual, for both SP/PV area and Bias/Control Output areas. The
auto scaling feature will otherwise change the vertical scale on the process
parameters and add confusion to the loop tuning process.
S Adjust the gains so the Proportional Gain = 10, Integrator Gain = 9999,
and Derivative Gain =0000. This disables the integrator and derivative
terms, and provides a little proportional gain.
S Check the bias term value in the loop parameter table (V+04). If it is not
zero, then write it to zero using DirectSOFT32 or HPP, etc.
Now we can transition the loop to Auto Mode. Check the mode monitoring bits to
verify its true mode. If the loop will not stay in Auto Mode, check the troubleshooting
tips at the end of this chapter.
CAUTION: If the PV and Control Output values begin to oscillate, reduce the gain
values immediately. If the loop does not stabilize immediately, then transfer the loop
PID Loop Operation

back to Manual Mode and manually write a safe value to the control output. During
the loop tuning procedure, always be near the Emergency Stop switch which
controls power to the loop actuator in case a shutdown is necessary.
S At this point, the SP should = PV because of the bumpless transfer

feature. Increase the SP a little, in order to develop an error value. With
only the proportional gain active and the bias term=0, we can easily
check the control output value:
Control Output = (SP PV) x proportional gain
S If the control output value changed, the loop should be getting more
Maintenance
energy from the actuator, heater, or other device. Soon the PV should
move in the direction of the SP. If the PV does not change, then
increase the proportional gain until it moves slightly.
S Now, add a small amount of integral gain. Remember that large
numbers are small integrator gains and small numbers are large
integrator gains! After this step, the PV should = SP, or be very close.
Until this point we have only used proportional and integrator gains. Now we can
bump the process (change the SP by 10%), and adjust the gains so the PV has an
optimal response. Refer to the figure below. Adjust the gains according to what you
see on the PID trend view. The critically- damped response shown gives the fastest
PV response without oscillating.
840
PID Loop Operation
S Over-damped response the gains are too small, so gradually increase

them, concentrating on the proportional gain first.
S Under-damped response the gains are too large. Reduce the integral
gain first, and then the proportional gain if necessary.
S Critically-damped response this is the the optimal gain setting. You
can verify that this is the best response by increasing the proportional
gain slightly. the loop then should make one or two small oscillations.
10% of over-damped response

SP range
critically-damped response
SP
PV under-damped response
Now you may want to add a little derivative gain to further improve the
critically-damped response above. Note the proportional and integral gains will be
PID Loop Operation
very close to their final values at this point. Adding some derivative action will allow
you to increase the proportional gain slightly without causing loop oscillations. The
derivative action tends to tame the proportional response slightly, so adjust these
gains together.
Auto Tuning Autotuning is initiated within DirectSOFT32. You can use autotuning to establish
Procedure initial PID parameter values (autotuning is not run continuously during operation).
Whenever a substantial change in loop dynamics occurs (mass of process, size of
actuator, etc.), you will need to repeat the tuning procedure to derive the new gains
that are required for optimal control.
and Troubleshooting
WARNING: Only authorized personnel fully familiar with all aspects of the process
Maintenance
should make changes that affect the loop tuning constants. Using the loop auto
tuning procedures will affect the process, including inducing large changes in the
control output value. Make sure you thoroughly consider the impact of any changes
to minimize the risk of injury to personnel or damage to equipment. The auto tune in
the DL05 is not intended to perform as a replacement for your process knowledge.
The loop controller offers both closed-loop and open-loop methods. If you intend to
use the auto tune feature, we recommend you use the open-loop method first. This
will permit you to use the closed-loop method of auto tuning when the loop is
operational (Auto Mode) and cannot be shut down (Manual Mode). The following
sections describe how to use the auto tuning feature, and what occurs in open and
closed-loop auto tuning.
841
PID Loop Operation
The controls for the auto tuning function use three bits in the PID Mode 2 word V+01,
as shown below. DirectSOFT32 will manipulate these bits automatically when you
use the auto tune feature within DirectSOFT. Or, you may have ladder logic access
these bits directly for allowing control from another source such as a dedicated
operator interface. The individual control bits let you to start the auto tune procedure,
select PID or PI tuning, and select closed-loop or open-loop tuning. If you select PI
tuning, the auto tune procedure leaves the derivative gain at 0. The Loop Mode and
Alarm Status word V+06 reports the auto tune status as shown. Bit 12 will be on (1)
when during the auto tuning cycle, automatically returning to off (0) when done.
Auto Tune Function
Start Auto Tune Auto Tune

(0 to 1 transition) Active
0=PID tuning, Auto Tune
Auto Tuning 1=open PI tuning Error Auto Tuning
Controls 0=closed loop, Status
1=open loop
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PID Loop Operation

Open-Loop Auto Tuning During an open-loop auto tuning cycle, the loop
controller operates as shown in the diagram below. Before starting this procedure,
place the loop in Manual mode and ensure the PV and control output values are in
the middle of their ranges (away from the end points).
PLC System
Process Variable
Response Step Function

Open Loop
Auto Tuning
Maintenance
Control
Setpoint Value Error Term Loop Output Manufacturing

Process Variable
NOTE: In theory, the SP value does not matter in this case, because the loop is not
closed. However, the firmware requires that the SP value be more than 205 counts
away from the PV value before starting the auto tune cycle (205 counts or more
below the SP for forward-acting loops, or 205 counts or more above the SP for
reverse-acting loops).
When auto tuning, the loop controller induces a step change on the output and
simply observes the response of the PV. From the PV response, the auto tune
function calculates the gains and the sample time. It automatically places the results
in the corresponding registers in the loop table.
842
PID Loop Operation
The following timing diagram shows the events which occur in the open-loop auto
tuning cycle. The auto tune function takes control of the control output and induces a
10%-of-span step change. If the PV change which the loop controller observes is
less than 2%, then the step change on the output is increased to 20%-of-span.
Open Loop Auto Tune Cycle Wave: Step Response Method
PV
Tangent Rr = Slope
(%)
SP
Process Wave
Base Line
LrRr
(%)
Lr
(sec.)
Time (sec)
Step Change Dm=10%
Output Value
(%)
Auto Tune Cycle

PID Cycle PID Cycle
PID Loop Operation
Auto Tune Start Auto Tune End
* When Auto Tune starts, step change output Dm=10%

* During Auto Tune, the controller output reached the full scale positive limit.
Auto Tune stopped and the Auto Tune Error bit in the Alarm word bit turned on.
* When PV change is under 2%, output is changed at 20%.
When the loop tuning observations are complete, the loop controller computes Rr
(maximum slope in %/sec.) and Lr (dead time in sec). The auto tune function
computes the gains according to the Ziegler-Nichols equations, shown below:
PID tuning: PI tuning:
and Troubleshooting
P = 1.2 * Dm/LrRr P = 0.9 * Dm/LrRr

Maintenance
I = 2.0 * Lr I = 3.33 * Lr
D = 0.5 * Lr D=0
Sample Rate = 0.056 * Lr Sample Rate = 0.12 * Lr
Dm = Output step change (10% = 0.1, 20% = 0.2)
We highly recommend using DirectSOFT32 for the auto tuning interface. The
duration of each auto tuning cycle will depend on the mass of our process. A
slowly-changing PV will result in a longer auto tune cycle time. When the auto tuning
is complete, the proportional, integral, and derivative gain values are automatically
updated in loop table locations V+10, V+11, and V+12 respectively. The sample time
in V+07 is also updated automatically. You can test the validity of the values the auto
tuning procedure yields by measuring the closed-loop response of the PV to a step
change in the output. The instructions on how to do this are in the section on the
manual tuning procedure (located prior to this section on auto tuning).
843
PID Loop Operation
Closed-Loop Auto Tuning During a closed-loop auto tuning cycle, the loop
controller operates as shown in the diagram below.
PLC System
Process Variable
Response Limit cycle wave

Closed Loop
Auto Tuning
Control
Setpoint Value Error Term Loop Output Manufacturing

Process Variable
When auto tuning, the loop controller imposes a square wave on the output. Each
transition of the output occurs when the PV value crosses over (or under) the SP
value. Therefore, the frequency of the limit cycle is roughly proportional to the mass
of the process. From the PV response, the auto tune function calculates the gains
and the sample time. It automatically places the results in the corresponding
registers in the loop table.
PID Loop Operation

The following timing diagram shows the events which occur in the closed-loop auto
tuning cycle. The auto tune function examines the direction of the offset of the PV
from the SP. The auto tune function then takes control of the control output and
induces a full-span step change in the opposite direction. Each time the sign of the
error (SP PV) changes, the output changes full-span in the opposite direction. This
procedes through three full cycles.
Closed Loop Auto Tune Cycle Wave: Limit Cycle Method

Xo
SP
Process Wave
Maintenance
PV
Output Value
To
PID Cycle PID Cycle
Auto Tune Cycle
Auto Tune Start Auto Tune End

Calculation of
PID parameter
*Mmax = Output Value upper limit setting Mmin = Output Value lower limit setting.
* This example is directacting. When set at reverseacting, output is inverted.
844
PID Loop Operation
When the loop tuning observations are complete, the loop controller computes To
(bump period) and Xo (amplitude of the PV). Then it uses these values to compute
Kpc (sensitive limit) and Tpc (period limit). From these values, the loop controller
auto tune function computes the PID gains and the sample rate according to the
Ziegler-Nichols equations shown below:
Kpc = 4M / ( * Xo) Tpc = 0
M = amplitude of output
PID tuning: PI tuning:

P = 0.45 * Kpc P = 0.30 *Kpc
I = 0.60 * Tpc I = 1.00 * Tpc
D = 0.10 * Tpc D=0
Sample Rate = 0.014 * Tpc Sample Rate = 0.03 * Tpc
Auto tuning error if the auto tune error bit (bit 13 of Loop Mode and Alarm status
word V+06) is on, please verify the PV and SP values are within 5% of full scale
difference, as required by the auto tune function. The bit will also turn on if the
closed-loop method is in use, and the output goes to the limits of the range.
NOTE: If your PV fluctuates rapidly, you probably need to use the built-in analog filter
PID Loop Operation
(see page 845) or create a filter in ladder logic (see example on page 846).
Tuning In tuning cascaded loops, we will need to de-couple the cascade relationship and
Cascaded Loops tune the loops individually, using one of the loop tuning procedures previously
covered.
1. If you are not using auto tuning, then find the loop sample rate for the
minor loop, using the method discussed earlier in this chapter. Then set
the sample rate of the major loop slower than the minor loop by a factor
of 10. Use this as a starting point.
and Troubleshooting
Maintenance
2. Tune the minor loop first. Leave the major loop in Manual Mode, and
you will need to generate SP changes for the minor loop manually as
described in the loop tuning procedure.
3. Verify the minor loop gives a critically-damped response to a 10% SP

change while in Auto Mode. Then we are finished tuning the minor loop.
4. In this step, you will need to get the minor loop in Cascade Mode, and
then the Major loop in Auto Mode. We will be tuning the major loop with
the minor loop treated as a series component its overall process.
Therefore, do not go back and tune the minor loop again while tuning
the major loop.
5. Tune the major loop, following the standard loop tuning procedure in
this section. The response of the major loop PV is actually the overall
response of the cascaded loops together.
845
PID Loop Operation
PV Analog Filter
A noisy PV signal can make tuning difficult and can cause the control output to be
more extreme than necessary, as the output tries to respond to the peaks and
valleys of the PV. There are two equivalent methods of filtering the PV input to make
the loop more stable. The first method is accomplished using the DL05s built-in
filter. The second method achieves a similar result using ladder logic.
The DL05 Built-in The DL05 provides a selectable first-order low-pass PV input filter which can be
Analog Filter particularly helpful during auto tuning, using the closed-loop method. Shown in the
figure below, we strongly recommend the use of a filter during auto tuning. You
may disable the filter after auto tuning is complete, or continue to use it if the PV input
signal is noisy.

+ S Calculation
Unfiltered
PV
0
Process Variable
1 Filtered
PV
PID Loop Operation

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Loop Table

PV filter V+24 XXXX FIlter constant
enable/disable
Bit 2 of PID Mode Setting 2 provides the enable/disable control for the low-pass PV
filter (0=disable, 1=enable). The roll-off frequency of the single-pole low-pass filter is
controlled by using register V+24 in the loop parameter table, the filter constant. The
data format of the filter constant value is BCD, with an implied decimal point 00X.X,
as follows:
Maintenance
S The filter constant has a valid range of 000.1 to 001.0.
S DirectSOFT32 converts values above the valid range to 001.0 and
values below this range to 000.1
S Values close to 001.0 result in higher roll-off frequencies, while values
closer to 000.1 result in lower roll-off frequencies.
We highly recommend using DirectSOFT32 for the auto tuning interface. The
duration of each auto tuning cycle will depend on the mass of your process. A
slowly-changing PV will result in a longer auto tune cycle time.
When the auto tuning is complete, the proportional, integral, and derivative gain
values are automatically updated in loop table locations V+10, V+11, and V+12
respectively. The sample time in V+07 is also updated automatically. You can test
the validity of the values the auto tuning procedure yields by measuring the
closed-loop response of the PV to a step change in the output. The instructions on
how to do this are in the section on the manual tuning procedure.
846
PID Loop Operation
The algorithm which the built-in filter follows is:

yi = k (xi yi1) + yi1
yi is the current output of the filter
xi is the current input to the filter
yi1 is the previous output of the filter
k is the PV Analog Input Filter Factor
Creating an A similar algorithm can be built in your ladder program. Your analog inputs can be
Analog Filter in filtered effectively using either method. The following programming example
Ladder Logic describes the ladder logic you will need. Be sure to change the example memory
locations to those that fit your application.
Filtering can induce a 1 part in 1000 error in your output because of rounding. If
your process cannot tolerate a 1 part in 1000 error, do not use filtering. Because of
the rounding error, you should not use zero or full scale as alarm points. Additionally,
the smaller the filter constant the greater the smoothing effect, but the slower the
response time. Be sure a slower response is acceptable in controlling your process.
SP1 Load the filter constant into the accumulator. To mimick
LD the built-in filter, use values between 1 and 10. This is
K2 equivalent to the 0.1 to 1.0 range of the built-in filter.
Output the constant to a convenient memory location that
OUT is not in use.
V1400
PID Loop Operation
V2200 V2003 If the raw analog input (V2200 in our example) is greater
LD than or equal to the current PV value in the PID Loop Table
V2200 (V2003), load the raw analog input into the accumulator.
SUB Subtract the Loop Table PV value from the raw
V2003 analog input.
MUL
V1400 The MUL and DIV instructions have the
combined effect of multiplying by a decimal
DIV number between 0.1 and 1.0.
K10
ADD Add the adjusted difference (between the raw analog

and Troubleshooting
V2003 input and the PV) back to the PV.

Maintenance
OUT Replace the previous Loop Table PV value with the

V2003 new filtered analog value in the Loop Table.
V2200 V2003 If the raw analog input is less than the current PV
LD value in the PID Loop Table (V2003), load the current
V2003
PV value into the accumulator.
SUB Subtract the raw analog input the from Loop Table PV
V2200 value.
MUL
V1400 The MUL and DIV instructions have the
combined effect of multiplying by a decimal
DIV number between 0.1 and 1.0.
K10
ADD Add the adjusted difference (between the raw analog input
V2200 and the PV) back to the analog input value.
OUT Replace the previous Loop Table PV value with the

V2003 new filtered analog value in the Loop Table.

847
PID Loop Operation
Feedforward Control
Feedforward control is an enhancement to standard closed-loop control. It is most
useful for diminishing the effects of a quantifiable and predictable loop disturbance
or sudden change in setpoint. Use of this feature is an option available to you on the
DL05. However, its best to implement and tune a loop without feedforward, and
adding it only if better loop performance is still needed. The term feed-forward
refers to the control technique involved, shown in the diagram below. The incoming
setpoint value is fed forward around the PID equation, and summed with the output.
Feedforward path
kf
+
+ S Calculation + S

Process Variable
In the previous section on the bias term, we said that the bias term value establishes
a working region or operating point for the control output. When the error fluctuates
around its zero point, the output fluctuates around the bias value. Now, when there
PID Loop Operation

is a change in setpoint, an error is generated and the output must change to a new
operating point. This also happens if a disturbance introduces a new offset in the
loop. The loop does not really know its way to the new operating point... the
integrator (bias) must increment/decrement until the error disappears, and then the
bias has found the new operating point.
Suppose that we are able to know a sudden setpoint change is about to occur
(common in some applications). We can avoid much of the resulting error in the first
place, if we can quickly change the output to the new operating point. If we know
(from previous testing) what the operating point (bias value) will be after the setpoint
change, we can artificially change the output directly (which is feedforward). The
benefits from using feedforward are:
S The SPPV error is reduced during predictable setpoint changes or loop
Maintenance
offset disturbances.
S Proper use of feedforward will allow us to reduce the integrator gain.
Reducing integrator gain gives us an even more stable control system.
Feedforward is very easy to use in the DL05 loop controller, as shown below. The
bias term has been made available to the user in a special read/write location, at PID
Parameter Table location V+04.
Loop Calculation
kp P
V+04
+ S ki I XXXX Bias Term
+ S
+
Process Variable kd D
848
PID Loop Operation
To change the bias (operating point), ladder logic only has to write the desired value
to V+04. The PID loop calculation first reads the bias value from V+04 and modifies
the value based on the current integrator calculation. Then it writes the result back to
location V+04. This arrangement creates a sort of transparent bias term. All you
have to do to implement feed forward control is write the correct value to the bias
term at the right time (the example below shows you how).
NOTE: When writing the bias term, one must be careful to design ladder logic to
write the value only once, at the moment when the new bias operating point is to
occur. If ladder logic writes the bias value on every scan, the loops integrator is
effectively disabled.
Feedforward How do we know when to write to the bias term, and what value to write? Suppose we
Example have an oven temperature control loop, and we have already tuned the loop for
optimal performance. Refer to the figure below. We notice that when the operator
opens the oven door, the temperature sags a bit while the loop bias adjusts to the
heat loss. Then when the door closes, the temperature rises above the SP until the
loop adjusts again. Feedforward control can help diminish this effect.
Oven Closed
Open Closed
PID Loop Operation
door
PV PV sags
PV excess
Bias
First, we record the amount of bias change the loop controller generates when the
and Troubleshooting
door opens or closes. Then, we write a ladder program to monitor the position of an
oven door limit switch. When the door opens, our ladder program reads the current
Maintenance
bias value from V+04, adds the desired change amount, and writes it back to V+04.
When the door closes, we duplicate the procedure, but subtracting desired change
amount instead. The following figure shows the results.
Oven Closed
Open Closed
door
PV
Feed-forward Feed-forward
Bias
The step changes in the bias are the result of our two feed-forward writes to the bias
term. We can see the PV variations are greatly reduced. The same technique may
be applied for changes in setpoint.
849
PID Loop Operation
Time-Proportioning Control
The PID loop controller in the DL05 CPU generates a smooth control output signal
across a numerical range. The control output value is suitable to drive an analog
output module, which connects to the process. In the process control field, this is
called continuous control, because the output is on (at some level) continuously.
While continuous control can be smooth and robust, the cost of the loop components
(such as actuators, heater amplifiers) can be expensive. A simpler form of control is
called time-proportioning control. This method uses actuators which are either on or
off (no in-between). Loop components for on/off-based control systems are lower
cost than their continuous control counterparts.
In this section, we will show you how to convert the control output of a loop to
time-proportioning control for the applications that need it. Lets take a moment to
review how alternately turning a load on and off can control a process. The diagram
below shows a hot-air balloon following a path across some mountains. The desired
path is the setpoint. The balloon pilot turns the burner on and off alternately, which is
his control output. The large mass of air in the balloon effectively averages the effect
of the burner, converting the bursts of heat into a continuous effect: slowly changing
balloon temperature and ultimately the altitude, which is the process variable.
PID Loop Operation

Maintenance
Time-proportioning control approximates continuous control by virtue of its
duty-cycle the ratio of ON time to OFF time. The following figure shows an example
of how duty cycle approximates a continuous level when it is averaged by a large
process mass.
period
Desired
Effect
On/Off On
Control Off
If we were to plot the on/off times of the burner in the hot-air balloon, we would
probably see a very similar relationship to its effect on balloon temperature and
altitude.
850
PID Loop Operation
On/Off Control The following ladder segment provides a time proportioned on/off control output. It
Program Example converts the continuous output in V2005 to on/off control using the output coil, Y0.
SP Loop V2005 Time Y0 P

+ S Calculation Proportioning
Process
V

continuous on/off
PV
The example program uses two timers to generate On/Off control. It makes the
following assumptions, which you can alter to fit your application:
S The loop table starts at V2000, so the control output is at V2005.
S The data format of the control output is 12-bit, unipolar (0 FFF).
S The time base (one full cycle) for the On/Off waveform is 10 seconds.
We use a fast timer (0.01 sec/tick), counting to 1000 ticks (10 seconds).
S The On/Off control output is Y0.
The time proportioning program must match the resolution of the output (1 part in
1000) to the resolution of the time base of T0 (also 1 part in 1000).
NOTE: Some processes change too fast for time proportioning control. Consider the
speed of your process when you choose this control method. Use continuous control
for processes that change too fast for time proportioning control.
PID Loop Operation
Use a fast timer (0.01 sec. resolution) for the main time
T0 base. The K1000 provides a preset of 10 seconds. The
TMRF T0 N.C. T0 contact makes this self-resetting. T0 is on for
K1000
one scan each 10 seconds.
T0 At the end of the 10 second period, T0 turns on, and

LD
V2005 loads the control output value (binary) from the loop table
V+05 location, V2005.
Convert the number in the accumulator to BCD

BCD format, to satisfy the MUL, DIV, and TMRF format
requirement.
and Troubleshooting
Multiply the Control Output (BCD) by 1,000. This step

MUL
Maintenance
combined with the following DIV function converts the

K1000 range to 0 1000.
DirectSOFT32
Divide the product of the previous step by 4095. This
DIV completes the conversion of the output range from
K4095 0 4095 to 0 1000, which matches the number of
ticks in our 10 second timer range.
OUT Output our result to V1400. This is our arbitrary location
V1400 for the second timers preset value.
T0 The second fast timer also counts in increments of

TMRF T1 .01 seconds, so its range is also 0 1000. This timers
V1400 output, T1, turns the output coil, Y0, off when the preset
is reached.
Using the N.C. T1 contact, invert the T1 timer output, so

T1 TA1 K0 Y0 the On/Off control output is on at the beginning of the
10-second timebase. Y0 turns off when T1 turns on. The
OUT
STRNE contact prevents Y0 from energizing during the
scan when T1 is resetting. Y0 goes to the actuator, heater,
etc. for the loop.

851
PID Loop Operation
Cascade Control
Introduction Cascaded loops are an advanced control technique that is superior to individual loop
control in certain situations. As the name implies, cascade means that one loop is
connected to another loop. In addition to Manual (open loop) and Auto (closed loop)
Modes, the DL05 also provides Cascaded Mode.
NOTE: Cascaded loops are an advanced process control technique. Therefore we

recommend their use only for experienced process control engineers.
When a manufacturing process is complex and contains a lag time from control input
to process variable output, even the most perfectly tuned single loop around the
process may yield slow and inaccurate control. It may be the actuator operates on
one physical property, which eventually affects the process variable, measured by a
different physical property. Identifying the intermediate variable allows us to divide
the process into two parts as shown in the following figure.
PROCESS
Intermediate Process
Control input Process A Variable Process B Variable (PV)
PID Loop Operation

The principle of cascaded loops is simply that we add another process loop to more
precisely control the intermediate variable! This separates the source of the control
lag into two parts, as well.
The diagram below shows a cascade control system, showing that it is simply one
loop nested inside another. The inside loop is called the minor loop, and the outside
loop is called the major loop. For overall stability, the minor loop must be the fastest
responding loop of the two. We do have to add the additional sensor to measure the
intermediate variable (PV for process A). Notice the setpoint for the minor loop is
automatically generated for us, by using the output of the major loop. Once the
cascaded control is programmed and debugged, we only need to deal with the
original setpoint and process variable at the system level. The cascaded loops
Maintenance
behave as one loop, but with improved performance over the previous single-loop
solution.
External External
Disturbances Disturbances
Output B/
Setpoint Loop B Loop A Output A Process A Process B
+ S Calculation
Setpoint A
+ S Calculation (secondary) (primary)

Minor
Major Loop
Loop PV, Process A
PV, Process B
One of the benefits to cascade control can be seen by examining its response to
external disturbances. Remember the minor loop is faster acting than the major
loop. Therefore, if a disturbance affects process A in the minor loop, the Loop A PID
calculation can correct the resulting error before the major loop sees the effect.
852
PID Loop Operation
Cascaded Loops in In the use of the term cascaded loops, we must make an important distinction. Only
the DL05 CPU the minor loop will actually be in the Cascade Mode. In normal operation, the major
loop must be in Auto Mode. If you have more than two loops cascaded together, the
outer-most (major) loop must be in Auto Mode during normal operation, and all inner
loops in Cascade Mode.
NOTE: Technically, both major and minor loops are cascaded in strict process
control terminology. Unfortunately, we are unable to retain this convention when
controlling loop modes. Remember that all minor loops will be in Cascade Mode, and
only the outer-most (major) loop will be in Auto Mode.
You can cascade together as many loops as necessary on the DL05, and you may
have multiple groups of cascaded loops. For proper operation on cascaded loops
you must use the same data range (12/15 bit) and unipolar/bipolar settings on the
major and minor loop.
To prepare a loop for Cascade Mode operation as a minor loop, you must program its
remote Setpoint Pointer in its loop parameter table location V+32, as shown below.
The pointer must be the address of the V+05 location (control output) of the major
loop. In Cascade Mode, the minor loop will ignore the its local SP register (V+02),
and read the major loops control output as its SP instead.
Major Loop (Auto mode) Minor Loop (Cascade Mode)
PID Loop Operation
Loop Table Loop Table

V+02 XXXX SP V+02 XXXX SP
V+03 XXXX PV V+03 XXXX PV
V+05 XXXX Control Output V+05 XXXX Control Output
V+32 XXXX Remote SP Pointer

and Troubleshooting
When using DirectSOFT32s PID View to watch the SP value of the minor loop,
DirectSOFT32 automatically reads the major loops control output and displays it for
Maintenance
the minor loops SP. The minor loops normal SP location, V+02, remains
unchanged.
Now, we use the loop parameter arrangement above and draw its equivalent loop
schematic, shown below.
Major loop Minor Cascaded loop
Control Output V+05 Cascade

Loop
Control
Calculation
Remote Setpoint Loop Output
SP + S Calculation
Local SP

V+02 Auto/Manual Process Variable
Remember that a major loop goes to Manual Mode automatically if its minor loop is
taken out of Cascade Mode.
853
PID Loop Operation
Process Alarms
The performance of a process control loop may be generally measured by how
closely the process variable matches the setpoint. Most process control loops in
industry operate continuously, and will eventually lose control of the PV due to an
error condition. Process alarms are vital in early discovery of a loop error condition,
and can alert plant personnel to manually control a loop or take other measures until
the error condition has been repaired.
The DL05 CPU has a sophisticated set of alarm features for each loop:
S PV Absolute Value Alarms monitors the PV with respect to two lower
limit values and two upper limit values. It generates alarms whenever
the PV goes outside these programmed limits.
S PV Deviation Alarm monitors the PV value as compared to the SP. It
alarms when the difference between the PV and SP exceed the
programmed alarm value.
S PV Rate-of-change Alarm computes the rate-of-change of the PV,
and alarms if it exceeds the programmed alarm amount
S Alarm Hysteresis works in conjunction with the absolute value and
deviation alarms to eliminate alarm chatter near alarm thresholds.
PID Loop Operation

The alarm thresholds are fully programmable, and each type of alarm may be
independently enabled and monitored. The following diagram shows the PV
monitoring function. Bits 12, 13, and 14 of PID Mode 1 Setting V+00 word in the loop
parameter table to enable/disable the alarms. DirectSOFT32s PID View setup
dialog screens allow easy programming, enabling, and monitoring of the alarms.
Ladder logic may monitor the alarm status by examining bits 3 through 9 of PID
Mode and alarm Status word V+06 in the loop table.
Setpoint Error Term Loop Control Output

+ S Calculation

Maintenance
Process Variable
1 Alarm Generation
0 PV Value
1
0 PV Deviation
1
0 PV Rate-of-change
Enable Alarms PID Mode 1 Setting PID Alarm Word Monitor Alarms
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Alarm Enable Bits Alarm Bits
Unlike the PID calculations, the alarms are always functioning any time the CPU is in
Run Mode. The loop may be in Manual, Auto, or Cascade, and the alarms will be
functioning if the enable bit(s) as listed above are set =1.
854
PID Loop Operation
PV Absolute The PV absolute value alarms are organized as two upper and two lower alarms.
Value Alarms The alarm status is false as long as the PV value remains in the region between the
upper and lower alarms, as shown below. The alarms nearest the safe zone are
named High Alarm and Low Alarm. If the loop loses control, the PV will cross one of
these thresholds first. Therefore, you can program the appropriate alarm threshold
values in the loop table locations shown below to the right. The data format is the
same as the PV and SP (12-bit or 15-bit). The threshold values for these alarms
should be set to give an operator an early warning if the process loses control.
Highhigh Alarm Loop Table

High Alarm V+16 XXXX High-high Alarm
PV V+15 XXXX High Alarm

V+14 XXXX Low Alarm
Low Alarm
V+13 XXXX Low-low Alarm
Lowlow Alarm
If the process remains out of control for some time, the PV will eventually cross one
of the outer alarm thresholds, named High-high alarm and Low-low alarm. Their
threshold values are programmed using the loop table registers listed above. A
High-high or Low-low alarm indicates a serious condition exists, and needs the
PID Loop Operation
immediate attention of the operator.

The PV Absolute Value Alarms are PID Mode and Alarm Status V+06
reported in the four bits in the PID Mode
and Alarm Status word in the loop table, as Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
shown to the right. We highly recommend
using ladder logic to monitor these bits. High-high Alarm
The bit-of-word instructions make this High Alarm
easy to do. Additionally, you can monitor Low Alarm
PID alarms using DirectSOFT. Low-low Alarm
and Troubleshooting
PV Deviation The PV Deviation Alarms monitor the PV deviation with respect to the SP value. The
Alarms deviation alarm has two programmable thresholds, and each threshold is applied
Maintenance
equally above and below the current SP value. In the figure below, the smaller
deviation alarm is called the Yellow Deviation, indicating a cautionary condition for
the loop. The larger deviation alarm is called the Red Deviation, indicating a strong
error condition for the loop. The threshold values use the loop parameter table
locations V+17 and V+20 as shown.
Red Deviation Alarm Red

Yellow Deviation Alarm Yellow Loop Table
SP Green V+17 XXXX Yellow Deviation Alarm
V+20 XXXX Red Deviation Alarm
Yellow Deviation Alarm Yellow
Red Deviation Alarm
Red
The thresholds define zones, which fluctuate with the SP value. The green zone
which surrounds the SP value represents a safe (no alarm) condition. The yellow
zones lie outside the green zone, and the red zones are beyond those.
855
PID Loop Operation
The PV Deviation Alarms are reported in PID Mode and Alarm Status V+06
the two bits in the PID Mode and Alarm
Status word in the loop table, as shown to Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
the right. We highly recommend using
ladder logic to monitor these bits. The Red Deviation
bit-of-word instructions make this easy to Yellow Deviation
do. Additionally, you can monitor PID
alarms using DirectSOFT.
The PV Deviation Alarm can be independently enabled and disabled from the other
PV alarms, using bit 13 of the PID Mode 1 Setting V+00 word.
Remember the alarm hysteresis feature works in conjunction with both the deviation
and absolute value alarms, and is discussed at the end of this section.
PV Rate-of-Change One powerful way to get an early warning of a process fault is to monitor the
Alarm rate-of-change of the PV. Most batch processes have large masses and
slowly-changing PV values. A relatively fast-changing PV will result from a broken
signal wire for either the PV or control output, a SP value error, or other causes. If the
operator responds to a PV Rate-of-Change Alarm quickly and effectively, the PV
absolute value will not reach the point where the material in process would be ruined.
The DL05 loop controller provides a programmable PV Rate-of-Change Alarm, as
shown below. The rate-of-change is specified in PV units change per loop sample
PID Loop Operation

time. This value is programmed into the loop table location V+21.
Loop Table
PV slope OK PV slope excessive
V+21 XXXX PV Rate-of-Change Alarm
PV
PID Mode and Alarm Status V+06
rate-of-change alarm
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sample time Sample time
PV Rate of
Maintenance
Change Alarm
As an example, suppose the PV is temperature for our process, and we want an

alarm when the temperature changes faster than 15 degrees / minute. We must
know PV counts per degree and the loop sample rate. Then, suppose the PV value
(in V+03 location) represents 10 counts per degree, and the loop sample rate is 2
seconds. We will use the formula below to convert our engineering units to counts /
sample period:
15 degrees 10 counts / degree 150

Alarm Rate-of-Change = X = = 5 counts / sample period
1 minute 30 loop samples / min. 30
From the calculation result, we would program the value 5 in the loop table for the
rate-of-change. The PV Rate-of-Change Alarm can be independently enabled and
disabled from the other PV alarms, using bit 14 of the PID Mode 1 Setting V+00 word.
The alarm hysteresis feature (discussed next) does not affect the Rate-of-Change
Alarm.
856
PID Loop Operation
PV Alarm The PV Absolute Value Alarm and PV Deviation Alarm are programmed using
Hysteresis threshold values. When the absolute value or deviation exceeds the threshold, the
alarm status becomes true. Real-world PV signals have some noise on them, which
can cause some fluctuation in the PV value in the CPU. As the PV value crosses an
alarm threshold, its fluctuations cause the alarm to be intermittent and annoy
process operators. The solution is to use the PV Alarm Hysteresis feature.
The PV Alarm Hysteresis amount is programmable from 1 to 200 (hex). When using
the PV Deviation Alarm, the programmed hysteresis amount must be less than the
programmed deviation amount. The figure below shows how the hysteresis is
applied when the PV value goes past a threshold and descends back through it.
Alarm threshold
Hysteresis
Loop Table
PV
V+22 XXXX PV Alarm Hysteresis
Alarm 1
0
PID Loop Operation
The hysteresis amount is applied after the threshold is crossed, and toward the safe
zone. In this way, the alarm activates immediately above the programmed threshold
value. It delays turning off until the PV value has returned through the threshold by
the hysteresis amount.
Alarm The PV Alarm threshold values must have PID Mode and Alarm Status V+06
Programing Error certain mathematical relationships to be
valid. The requirements are listed below. If Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
not met, the Alarm Programming Error bit
will be set, as indicated to the right. Alarm Programming Error
and Troubleshooting
S PV Absolute Alarm value requirements:

Maintenance
Low-low < Low < High < High-high

S PV Deviation Alarm requirements:
Yellow < Red
857
PID Loop Operation
Ramp/Soak Generator
Introduction Our discussion of basic loop operation noted the setpoint for a loop will be generated
in various ways, depending on the loop operating mode and programming
preferences. In the figure below, the ramp / soak generator is one of the ways the SP
may be generated. It is the responsibility of your ladder program to ensure only one
source attempts to write the SP value at V+02 at any particular time.
Setpoint Sources:
Operator Input
Setpoint V+02 Loop Control Output
Ramp/soak generator
+ S Calculation
Ladder Program
Another loops output (cascade)
Process Variable
If the SP for your process rarely changes or can tolerate step changes, you probably
will not need to use the ramp/soak generator. However, some processes require
precisely-controlled SP value changes. The ramp / soak generator can greatly
reduce the amount of programming required for these applications.
The terms ramp and soak have special SP
PID Loop Operation

meanings in the process control industry,
and refer to desired setpoint (SP) values in Soak
temperature control applications. In the Ramp
figure to the right, the setpoint increases
during the ramp segment. It remains slope
steady at one value during the soak
segment. Time
Complex SP profiles can be generated by specifying a series of ramp/soak

segments. The ramp segments are specified in SP units per second time. The soak
time is also programmable in minutes.
It is instructive to view the ramp/soak generator as a dedicated function to generate
Maintenance
SP values, as shown below. It has two categories of inputs which determine the SP
values generated. The ramp/soak table must be programmed in advance,
containing the values that will define the ramp/soak profile. The loop reads from the
table during each PID calculation as necessary. The ramp/soak controls are bits in a
special loop table word that control the real-time start/stop functionality of the
ramp/soak generator. The ladder program can monitor the status of the ramp soak
profile (current ramp/segment number).
Ramp/soak table
Ramp/soak Setpoint Loop Control Output
Ramp/soak controls Generator + S Calculation

Process Variable
858
PID Loop Operation
Now that we have described the general ramp/soak generator operation, we list its
specific features:
S Each loop has its own ramp/soak generator (use is optional).
S You may specify up to eight ramp/soak steps (16 segments).
S The ramp soak generator can run anytime the PLC is in Run mode. Its
operation is independent of the loop mode (Manual or Auto).
S Ramp/soak real-time controls include Start, Hold, Resume, and Jog.
S Ramp/soak monitoring includes Profile Complete, Soak Deviation (SP
minus PV), and current ramp/soak step number.
The following figure shows a SP profile consisting of ramp/soak segment pairs. The
segments are individually numbered as steps from 1 to 16. The slope of each of the
ramp may be either increasing or decreasing. The ramp/soak generator
automatically knows whether to increase or decrease the SP based on the relative
values of a ramps end points. These values come from the ramp/soak table.
15 16
13 14 Soak
Ramp
5 6 Soak
Ramp
4
PID Loop Operation
3 Soak
Ramp
Step 1 2 Soak
Ramp
Soak
Ramp
SP
Ramp/Soak Table
The parameters which define the VMemory Space
ramp/soak profile for a loop are in a
ramp/soak table. Each loop may have its
and Troubleshooting
User Data
own ramp/soak table, but it is optional.
Recall the Loop Parameter table consists
Maintenance
V2000 LOOP #1
a 32-word block of memory for each loop, V2034 =
and together they occupy one contiguous V2037 32 words 3000 octal
memory area. However, the ramp/soak V2040 LOOP #2
table for a loop is individually located, 32 words V2074 =
V2077
3600 octal
because it is optional for each loop. An
address pointer in location V+34 in the
loop table specifies the starting location of V3000
the ramp/soak table. Ramp/Soak #1
32 words
In the example to the right, the loop
parameter tables for Loop #1 and #2
occupy contiguous 32-word blocks as
shown. Each has a pointer to its
ramp/soak table, independently located
elsewhere in user V-memory. Of course, V3600 Ramp/Soak #2
you may locate all the tables in one group, 32 words
as long as they do not overlap.
859
PID Loop Operation
The parameters in the ramp/soak table must be user-defined. the most convenient
way is to use DirectSOFT, which features a special editor for this table. Four
parameters are required to define a ramp and soak segment pair, as pictured below.
S Ramp End Value specifies the destination SP value for the end of the
ramp. Use the same data format for this number as you use for the SP.
It may be above or below the beginning SP value, so the slope could be
up or down (we dont have to know the starting SP value for ramp #1).
S Ramp Slope specifies the SP increase in counts (units) per second. It
is a BCD number from 00.00 to 99.99 (uses implied decimal point).
S Soak Duration specifies the time for the soak segment in minutes,
ranging from 000.1 to 999.9 minutes in BCD (implied decimal point).
S Soak PV Deviation (optional) specifies an allowable PV deviation
above and below the SP value during the soak period. A PV deviation
alarm status bit is generated by the ramp/soak generator.
Ramp End
SP Value Soak PV Ramp/Soak Table
deviation V+00 XXXX Ramp End SP Value
V+01 XXXX Ramp Slope
Slope Soak
PID Loop Operation

SP V+02 XXXX Soak Duration
duration
V+03 XXXX Soak PV Deviation
segment becomes active
The ramp segment becomes active when the previous soak segment ends. If the
ramp is the first segment, it becomes active when the ramp/soak generator is
started, and automatically assumes the present SP as the starting SP.
Offset Step Description Offset Step Description
Maintenance
860
PID Loop Operation
Many applications do not require all 16 R/S steps. Use all zeros in the table for
unused steps. The R/S generator ends the profile when it finds ramp slope=0.
Ramp/Soak The individual bit definitions of the Ramp / Soak Table Flag (Addr+33) word is listed
Table Flags in the following table.
Bit Ramp / Soak Flag Bit Description Read/Write Bit=0 Bit=1

0 Start Ramp / Soak Profile write 01 Start
1 Hold Ramp / Soak Profile write 01 Hold
2 Resume Ramp / soak Profile write 01
Resume
3 Jog Ramp / Soak Profile write 01 Jog
4 Ramp / Soak Profile Complete read Complete
5 PV Input Ramp / Soak Deviation read Off On
6 Ramp / Soak Profile in Hold read Off On
7 Reserved read Off On
815 Current Step in R/S Profile read decode as byte (hex)
PID Loop Operation
Ramp/Soak The main enable control to permit PID Mode 1 Setting V+00
Generator Enable ramp/soak generation of the SP value is
accomplished with bit 11 in the PID Mode 1 Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Setting V+00 word, as shown to the right.
The other ramp/soak controls in V+33 Ramp/Soak
Generator Enable
shown in the table above will not operate
unless this bit=1 during the entire
ramp/soak process.
Ramp/Soak The four main controls for the ramp/soak Ramp/Soak Settings V+33
Controls generator are in bits 0 to 3 of the
and Troubleshooting
ramp/soak settings word in the loop Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Maintenance
parameter table. DirectSOFT32 controls

these bits directly from the ramp/soak Jog
settings dialog. However, you must use Resume
ladder logic to control these bits during Hold
program execution. We recommend using Start
the bit-of-word instructions.
Ladder logic must set a control bit to a 1 to command the corresponding function.
When the loop controller reads the ramp/soak value, it automatically turns off the bit
for you. Therefore, a reset of the bit is not required, when the CPU is in Run Mode.
The example program rung to the right Start R/S Generator
shows how an external switch X0 can turn X0 B2033.0
on, and the PD contact uses the leading SET
edge to set the proper control bit to start
the ramp soak profile. This uses the Set
Bit-of-word instruction.
861
PID Loop Operation
The normal state for the ramp/soak control bits is all zeros. Ladder logic must set
only one control bit at a time.
S Start a 0-to-1 transition will start the ramp soak profile. The CPU must
be in Run Mode, and the loop can be in Manual or Auto Mode. If the
profile is not interrupted by a Hold or Jog command, it finishes normally.
S Hold a 0-to-1 transition will stop the ramp/soak profile in its current
state, and the SP value will be frozen.
S Resume a 0-to-1 transition cause the ramp/soak generator to resume
operation if it is in the hold state. The SP values will resume from their
previous value.
S Jog a 0-to-1 transition will cause the ramp/soak generator to truncate
the current segment (step), and go to the next segment.
Ramp/Soak Profile You can monitor the Ramp/Soak profile Ramp/Soak Settings V+33
Monitoring status using other bits in the Ramp/Soak
Settings V+33 word, shown to the right. Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
S R/S Profile Complete =1 when the
R/S Profile in Hold
last programmed step is done.
Soak PV Deviation
S Soak PV Deviation =1 when the R/S Profile Complete
error (SPPV) exceeds the specified
PID Loop Operation

deviation in the R/S table.
S R/S Profile in Hold =1 when the
profile was active but is now in hold.
The number of the current step is available Ramp/Soak Settings V+33

in the upper 8 bits of the Ramp/Soak
Settings V+33 word. The bits represent a Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
2-digit hex number, ranging from 1 to 10.
Ladder logic can monitor these to
synchronize other parts of the program Current Profile Step, 2digit hex
with the ramp/soak profile. Load this word
Value = 01 to 10 hex,
to the accumulator and shift right 8 bits, or 1 to 16 decimal
Maintenance
and you have the step number.
Ramp/Soak The starting address for the ramp/soak Ramp/Soak Table Error V+35
Programming table must be a valid location. If the
Errors address points outside the range of user Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
V-memory, one of the bits to the right will
turn on when the ramp/soak generator is Starting Address set in
started. We recommend using reserved system V-memory
DirectSOFT32 to configure the Starting Address set out of
ramp/soak table. It automatically range V-memory upper range
checks the addresses for you.
Starting Address set out
of V-memory lower range
Testing Your Its a good idea to test your ramp/soak profile before using it to control the process.
Ramp/Soak Profile This is easy to do, because the ramp/soak generator will run even when the loop is in
Manual Mode. Using DirectSOFT32s PID View will be a real time-saver, because it
will draw the profile on-screen for you. Be sure to set the trending timebase slow
enough to display completed ramp-soak segment pairs in the waveform window.
862
PID Loop Operation
Troubleshooting Tips
Q. The loop will not go into Automatic Mode.
A. Check the following for possible causes:
S A PV alarm exists, or a PV alarm programming error exists.
S The loop is the major loop of a cascaded pair, and the minor loop is not
in Cascade Mode.
Q. The Control Output stays at zero constantly when the loop is in Automatic Mode.
S The Control Output upper limit in loop table location V+31 is zero.
S The loop is driven into saturation, because the error never goes to zero
value and changes (algebraic) sign.
Q. The Control Output value is not zero, but it is incorrect.

S The gain values are entered improperly. Remember, gains are entered
in the loop table in BCD, while the SP and PV are in binary. If you are
using DirectSOFT, it displays the SP, PV, Bias and Control output in
PID Loop Operation
decimal (BCD), converting it to binary before updating the loop table.
Q. The Ramp/Soak Generator does not operate when I activate the Start bit.
S The Ramp/Soak enable bit is off. Check the status of bit 11 of loop
parameter table location V+00. It must be set =1.
S The hold bit or other bits in the Ramp/Soak control are on.
S The beginning SP value and the first ramp ending SP value are the
same, so first ramp segment has no slope and consequently has no
and Troubleshooting
duration. The ramp/soak generator moves quickly to the soak segment,

Maintenance
giving the illusion the first ramp is not working.

S The loop is in Cascade Mode, and is trying to get the SP remotely.
S The SP upper limit value in the loop table location V+27 is too low.
S Check your ladder program to verify it is not writing to the SP location
(V+02 in the loop table). A quick way to do this is to temporarily place an
end coil at the beginning of your program, then go to PLC Run Mode,
and manually start the ramp/soak generator.
Q. The PV value in the table is constant, even though the analog module receives the PV signal.
A. Your ladder program must read the analog value from the module successfully
and write it into the loop table V+03 location. Verify the analog module is generating
the value, and the ladder is working.
Q. The Derivative gain doesnt seem to have any affect on the output.
A. The derivative limit is probably enabled (see section on derivative gain limiting).
863
PID Loop Operation
Q. The loop Setpoint appears to be changing by itself.

S The Ramp/Soak generator is enabled, and is generating setpoints.
S If this symptom occurs on loop Manual-to-Auto Mode changes, the loop
automatically sets the SP=PV (bumpless transfer feature).
S Check your ladder program to verify it is not writing to the SP location
(V+02 in the loop table). A quick way to do this is to temporarily place an
end coil at the beginning of your program, then go to PLC Run Mode.
Q. The SP and PV values I enter with DirectSOFT32 work okay, but these values do not work
properly when the ladder program writes the data.
A. The PID View in DirectSOFT32 lets you enter SP, PV, and Bias values in decimal,
and displays them in decimal for your convenience. For example, when the data
format is 12 bit unipolar, the values range from 0 to 4095. However, the loop table
actually requires these in hex, so DirectSOFT32 converts them for you. The values
in the table range from 0 to FFF, for 12-bit unipolar format.
Q. The loop seems unstable and impossible to tune, no matter what I gains I use.
S The loop sample time is set too long. Refer to the section near the front
of this chapter on selecting the loop update time.
S The gains are too high. Start out by reducing the derivative gain to zero.
PID Loop Operation

Then reduce the integral gain, and the proportional gain if necessary.
S There is too much transfer lag in your process. This means the PV
reacts sluggishly to control output changes. There may be too much
distance between actuator and PV sensor, or the actuator may be
weak in its ability to transfer energy into the process.
S There may be a process disturbance that is over-powering the loop.
Make sure the PV is relatively steady when the SP is not changing.
Bibliography
Fundamentals of Process Control Theory, Second Edition Application Concepts of Process Control
Maintenance
Author: Paul W. Murrill Author: Paul W. Murrill
Publisher: Instrument Society of America Publisher: Instrument Society of America
ISBN 1556172974 ISBN 1556170807
PID Controllers: Theory, Design, and Tuning, 2nd Edition Fundamentals of Temperature, Pressure, and Flow
Author: K. Astrom and T Hagglund Measurements, Third edition
Publisher: Instrument Society of America Author: Robert P. Benedict
ISBN 1556175167 Publisher: John Wiley and Sons
ISBN 0471893838
Process / Industrial Instruments & Controls Handbook, pH Measurement and Control, Second Edition
Fourth Edition Author: Gregory K. McMillan
Author (Editor-in-Chief): Douglas M. Considine Publisher: Instrument Society of America
Publisher: McGraw-Hill, Inc. ISBN 1556174837
ISBN 0070124450
Process Control, Third Edition Process Measurement and Analysis, Third Edition
Instrument Engineers Handbook Instrument Engineers Handbook
Author (Editor-in-Chief): Bela G. Liptak Author (Editor-in-Chief): Bela G. Liptak
Publisher: Chilton Publisher: Chilton
ISBN 0801982421 ISBN 0801981972
864
PID Loop Operation
Glossary of PID Loop Terminology

Automatic Mode An operational mode of a loop, in which it makes PID calculations and updates the
loops control output.
Bias Freeze A method of preserving the bias value (operating point) for a control output, by inhibiting
the integrator when the output goes out-of-range. The benefit is a faster loop recovery.
Bias Term In the position form of the PID equation, it is the sum of the integrator and the initial
control output value.
Bumpless Transfer A method of changing the operation mode of a loop while avoiding the usual sudden
change in control output level. This consequence is avoided by artificially making the SP
and PV equal, or the bias term and control output equal at the moment of mode change.
Cascaded Loops A cascaded loop receives its setpoint from the output of another loop. Cascaded loops
have a major/minor relationship, and work together to ultimately control one PV.
Cascade Mode An operational mode of a loop, in which it receives its SP from another loops output.
Continuous Control Control of a process done by delivering a smooth (analog) signal as the control output.
Direct-Acting Loop A loop in which the PV increases in response to a control output increase. In other
words, the process has a positive gain.
Error The difference in value between the SP and PV, Error=SP PV
Error Deadband An optional feature which makes the loop insensitive to errors when they are small. You
PID Loop Operation
can specify the size of the deadband.

Error Squared An optional feature which multiplies the error by itself, but retains the original algebraic
sign. It reduces the effect of small errors, while magnifying the effect of large errors.
Feedforward A method of optimizing the control response of a loop when a change in setpoint or
disturbance offset is known and has a quantifiable effect on the bias term.
Control Output The numerical result of a PID equation which is sent by the loop with the intention of
nulling out the current error.
Derivative Gain A constant that determines the magnitude of the PID derivative term in response to the
current error.
Integral Gain A constant that determines the magnitude of the PID integral term in response to the
and Troubleshooting
current error.
Maintenance
Major Loop In cascade control, it is the loop that generates a setpoint for the cascaded loop.
Manual Mode An operational mode of a loop, it which the PID calculations are stopped. The operator
must manually control the loop by writing to the control output value directly.
Minor Loop In cascade control, the minor loop is the subordinate loop that receives its SP from the
major loop.
On / Off Control A simple method of controlling a process, through on/off application of energy into the
system. The mass of the process averages the on/off effect for a relatively smooth PV. A
simple ladder program can convert the DL05s continuous loop output to on/off control.
PID Loop A mathematical method of closed-loop control involving the sum of three terms based
on proportional, integral, and derivative error values. The three terms have independent
gain constants, allowing one to optimize (tune) the loop for a particular physical system.
Position Algorithm The control output is calculated so it responds to the displacement (position) of the PV
from the SP (error term)
Process A manufacturing procedure which adds value to raw materials. Process control
particularly refers to inducing chemical changes to the material in process.
Process Variable (PV) A quantitative measurement of a physical property of the material in process, which
affects final product quality and is important to monitor and control.
865
PID Loop Operation
Proportional Gain A constant that determines the magnitude of the PID proportional term in response to
the current error.
PV Absolute Alarm A programmable alarm that compares the PV value to alarm threshold values.
PV Deviation Alarm A programmable alarm that compares the difference between the SP and PV values to
a deviation threshold value.
Ramp / Soak Profile A set of SP values called a profile, which is generated in real time upon each loop
calculation. The profile consists of a series of ramp and soak segment pairs, greatly
simplifying the task of programming the PLC to generate such SP sequences.
Rate Also called differentiator, the rate term responds to the changes in the error term.
Remote Setpoint The location where a loop reads its setpoint when it is configured as the minor loop in a
cascaded loop topology.
Reset Also called integrator, the reset term adds each sampled error to the previous,
maintaining a running total called the bias.
Reset Windup A condition created when the loop is unable to find equilibrium, and the persistent error
causes the integrator (reset) sum to grow excessively (windup). Reset windup causes
an extra recovery delay when the original loop fault is remedied.
Reverse-Acting Loop A loop in which the PV increases in response to a control output decrease. In other
words, the process has a negative gain.
Sampling time The time between PID calculations. The CPU method of process control is called a
sampling controller, because it samples the SP and PV only periodically.
PID Loop Operation

Setpoint (SP) The desired value for the process variable. The setpoint (SP) is the input command to
the loop controller during closed loop operation.
Soak Deviation The soak deviation is a measure of the difference between the SP and PV during a soak
segment of the Ramp / Soak profile, when the Ramp / Soak generator is active.
Step Response The behavior of the process variable in response to a step change in the SP (in closed
loop operation), or a step change in the control output (in open loop operation)
Transfer To change from one loop operational mode to another (between Manual, Auto, or
Cascade). The word transfer probably refers to the transfer of control of the control
output or the SP, depending on the particular mode change.
Velocity Algorithm The control output is calculated to represent the rate of change (velocity) for the PV to
become equal to the SP.
Maintenance
19
Maintenance and
Troubleshooting
Hardware System Maintenance
Diagnostics
CPU Indicators
Communications Problems
I/O Point Troubleshooting
Noise Troubleshooting
Machine Startup and Program Troubleshooting
92
Maintenance and Troubleshooting
Hardware System Maintenance

Standard No regular or preventative maintenance is required for this product (there are no
Maintenance internal batteries); however, a routine maintenance check (about every one or two
months) of your PLC and control system is good practice, and should include the
following items:
S Air Temperature Check the air temperature in the control cabinet, so
the operating temperature range of any component is not exceeded.
S Air Filter If the control cabinet has an air filter, clean or replace it
periodically as required.
S Fuses or breakers Verify that all fuses and breakers are intact.
S Cleaning the Unit Check that all air vents are clear. If the exterior
case needs cleaning, disconnect the input power, and carefully wipe the
case using a damp cloth. Do not let water enter the case through the air
vents and do not use strong detergents because this may discolor the
case.
Diagnostics
Diagnostics Your DL05 Micro PLC performs many pre-defined diagnostic routines with every
CPU scan. The diagnostics can detect various errors or failures in the PLC. The two
primary error classes are fatal and non-fatal.
Fatal Errors Fatal errors are errors which may cause the system to function improperly, perhaps
introducing a safety problem. The CPU will automatically switch to Program Mode if
it is in Run Mode. (Remember, in Program Mode all outputs are turned off.) If the fatal
error is detected while the CPU is in Program Mode, the CPU will not allow you to
transition to Run Mode until the error has been corrected.
Some examples of fatal errors are:
S Power supply failure
and Troubleshooting
S Parity error or CPU malfunction

Maintenance
S Particular programming errors
Non-fatal Errors Non-fatal errors are errors that need your attention, but should not cause improper
operation. They do not cause or prevent any mode transitions of the CPU. The
application program can use special relay contacts to detect non-fatal errors, and
even take the system to an orderly shutdown or switch the CPU to Program Mode if
desired. An example of a non-fatal error is:
S Particular programming errors
Finding Diagnostic The programming devices will notify you of an error if one occurs while online.
Information S DirectSOFT provides the error number and an error message.
S The handheld programmer displays error numbers and short
descriptions of the error.
Appendix B has a complete list of error messages in order by error number.
Many error messages point to supplemental V-memory locations which contain
related information. Special relays (SP contacts) also provide error indications.
93
V-memory Error The following table names the specific memory locations that correspond to certain
Code Locations types of error messages.
Error Class Error Category Diagnostic
V-memory
User-Defined Error code used with FAULT instruc- V7751
tion
System Error Fatal Error code V7755
Major Error code V7756
Minor Error code V7757
Grammatical Address where syntax error occurs V7763
Error Code found during syntax check V7764
CPU Scan Number of scans since last Program V7765
to Run Mode transition
Current scan time (ms) V7775
Minimum scan time (ms) V7776
Maximum scan time (ms) V7777
Special Relays (SP) The special relay table also includes status indicators which can indicate errors. For
Corresponding to a more detailed description of each of these special relays refer to Appendix D.
Error Codes
CPU Status Relays SP52 Syntax error

SP11 Forced Run mode SP53 Cannot solve the logic
SP12 Terminal Run mode SP54 Communication error
SP13 Test Run mode SP56 Table instruction overrun
SP15 Test stop mode
and Troubleshooting
SP16 Terminal Program mode
Accumulator Status Relays
SP17 Forced stop
Maintenance
SP60 Acc. is less than value
SP20 STOP instruction was executed
SP61 Acc. is equal to value
SP22 Interrupt enabled
SP62 Acc. is greater than value
System Monitoring Relays
SP63 Acc. result is zero
SP36 Override setup
SP64 Half borrow occurred
SP37 Scan control error
SP65 Borrow occurred
SP40 Critical error SP66 Half carry occurred
SP41 Non-critical error SP67 Carry occurred
SP42 Diagnostics error SP70 Result is negative (sign)
SP44 Program memory error SP71 Pointer reference error
SP45 I/O error SP73 Overflow
SP46 Communications error SP75 Data is not in BCD
SP50 Fault instruction was executed SP76 Load zero
SP51 Watchdog timeout
94
DL05 Micro PLC These errors can be generated by the CPU or by the Handheld Programmer,
Error Codes depending on the actual error. Appendix B provides a more complete description of
the error codes.
The errors can be detected at various times. However, most of them are detected at
power-up, on entry to Run Mode, or when a Handheld Programmer key sequence
results in an error or an illegal request.
Error Description Error Description

Code Code
E003 Software time-out E525 Mode Switch not in Term position
E004 Invalid instruction E526 Unit is offline
(RAM parity error in the CPU) E527 Unit is online
E104 Write failed
E528 CPU mode
E151 Invalid command
E540 CPU locked
E311 Communications error 1
E541 Wrong password
E542 Password reset
E601 Memory full
E602 Instruction missing
E320 Time out
E604 Reference missing
E321 Communications error
E620 Out of memory
E360 HP Peripheral port time-out
E621 EEPROM Memory not blank
E501 Bad entry
E622 No Handheld Programmer EEPROM
E502 Bad address
E624 V memory only
E503 Bad command
E625 Program only
E504 Bad reference / value
E627 Bad write operation
E505 Invalid instruction
E628 Memory type error (should be EEPROM)
and Troubleshooting
E506 Invalid operation

E640 Mis-compare
Maintenance
E520 Bad operation CPU in Run

E650 Handheld Programmer system error
E521 Bad operation CPU in Test Run
E651 Handheld Programmer ROM error
E523 Bad operation CPU in Test Program
E652 Handheld Programmer RAM error
E524 Bad operation CPU in Program
95
Program Error The following table lists program syntax and runtime error codes. Error detection
Codes occurs during a Program-to-Run mode transition, or when you use AUX 21 Check
Program. The CPU will also turn on SP52 and store the error code in V7755.
Appendix B provides a more complete description of the error codes.
Error Code Description Error Code Description

E4** No Program in CPU E438 Invalid IRT address
E401 Missing END statement E440 Invalid Data Address
E402 Missing LBL E441 ACON/NCON
E403 HP Peripheral port time-out E451 Bad MLS/MLR
E404 HP Peripheral port time-out E453 Missing T/C
E405 HP Peripheral port time-out E454 Bad TMRA
E406 Missing IRT E455 Bad CNT
E412 SBR / LBL >64 E456 Bad SR
E421 Duplicate stage reference E461 Stack Overflow
E422 Duplicate SBR/LBL reference E462 Stack Underflow
E423 HP Peripheral port time-out E463 Logic Error
E431 Invalid ISG/SG address E464 Missing Circuit
E433 Invalid ISG / SG address E471 Duplicate coil reference
E434 Invalid RTC E472 Duplicate TMR reference
E435 Invalid RT E473 Duplicate CNT reference
E436 Invalid INT address E499 Print instruction
E437 Invalid IRTC
and Troubleshooting
Maintenance
96
CPU Indicators
The DL05 Micro PLCs have indicators on the front

to help you determine potential problems with the
system. In normal runtime operation only, the RUN
and PWR indicators are on. The table below is a
quick reference to potential problems.
Indicator Status Potential Problems
PWR (LED off) 1. System voltage incorrect
2. PLC power supply faulty
RUN (LED off) 1. CPU programming error
2. (CPU in program mode)
CPU (LED on) 1. Electrical noise interference
2. Internal CPU defective
PWR Indicator In general there are three reasons for the CPU power status LED (PWR) to be OFF:
1. Power to the unit is incorrect or is not applied.
2. PLC power supply is faulty.
3. Other component(s) have the power supply shut down.
If the voltage to the power supply is not correct, the PLC may not operate properly or
may not operate at all. Use the following guidelines to correct the problem.
WARNING: To minimize the risk of electrical shock, always disconnect the system
and Troubleshooting
power before inspecting the physical wiring.

Maintenance
1. First, disconnect the external power.

2. Verify that all external circuit breakers or fuses are still intact.
3. Check all incoming wiring for loose connections. If youre using a separate
termination block, check those connections for accuracy and integrity.
4. If the connections are acceptable, reconnect the system power and verify
the voltage at the DL05 power input is within specification. If the voltage is
not correct shut down the system and correct the problem.
5. If all wiring is connected correctly and the incoming power is within the
specifications, the PLC internal supply may be faulty.
The best way to check for a faulty PLC is to substitute a known good one to see if this
corrects the problem. The removable connectors on the DL05 make this relatively
easy. If there has been a major power surge, it is possible the PLC internal power
supply has been damaged. If you suspect this is the cause of the power supply
damage, consider installing an AC line conditioner to attenuate damaging voltage
spikes in the future.
97
RUN Indicator If the CPU will not enter the Run mode (the RUN indicator is off), the problem is
usually in the application program, unless the CPU has a fatal error. If a fatal error
has occurred, the CPU LED should be on. (You can use a programming device to
determine the cause of the error.)
Both of the programming devices, Handheld Programmer and DirectSOFT, will
return an error message describing the problem. Depending on the error, there may
also be an AUX function you can use to help diagnose the problem. The most
common programming error is Missing END Statement. All application programs
require an END statement for proper termination. A complete list of error codes can
be found in Appendix B.
CPU Indicator If the CPU indicator is on, a fatal error has occurred in the CPU. Generally, this is not
a programming problem but an actual hardware failure. You can power cycle the
system to clear the error. If the error clears, you should monitor the system and
determine what caused the problem. You will find this problem is sometimes caused
by high frequency electrical noise introduced into the CPU from an outside source.
Check your system grounding and install electrical noise filters if the grounding is
suspected. If power cycling the system does not reset the error, or if the problem
returns, you should replace the CPU.
Communications Problems
If you cannot establish communications with the CPU, check these items.
S The cable is disconnected.

S The cable has a broken wire or has been wired incorrectly.
S The cable is improperly terminated or grounded.
S The device connected is not operating at the correct baud rate (9600
baud).
S The device connected to the port is sending data incorrectly.
and Troubleshooting
S A grounding difference exists between the two devices.
Maintenance
S Electrical noise is causing intermittent errors.
S The PLC has a bad communication port and should be replaced.
For problems in communicating with DirectSOFT on a personal computer, refer to

the DirectSOFT manual. It includes a troubleshooting section that can help you
diagnose PC problems in communications port setup, address or interrupt conflicts,
etc.
98
I/O Point Troubleshooting

Possible Causes If you suspect an I/O error, there are several things that could be causing the
problem.
S High-Speed I/O configuration error
S A blown fuse in your machine or panel (the DL05 does not have internal
I/O fuses)
S A loose terminal block
S The auxiliary 24 VDC supply has failed
S The Input or Output Circuit has failed
Some Quick Steps When troubleshooting the DL05 Micro PLCs there are a few facts you should be
aware of. These facts may assist you in quickly correcting an I/O problem.
S HSIO configuration errors are commonly mistaken for I/O point failure
during program development. If the I/O point in question is in X0X2, or
Y0Y1, check all parameter locations listed in Chapter 3 that apply to
the HSIO mode you have selected.
S The output circuits cannot detect shorted or open output points. If you
suspect one or more faulty points, measure the voltage drop from the
common to the suspect point. Remember when using a Digital Volt
Meter, leakage current from an output device such as a triac or a
transistor must be considered. A point which is off may appear to be on
if no load is connected the point.
S The I/O point status indicators are logic-side indicators. This means the
LED which indicates the on or off status reflects the status of the point
with respect to the CPU. On an output point the status indicators could
be operating normally while the actual output device (transistor, triac
etc.) could be damaged. With an input point, if the indicator LED is on
the input circuitry is probably operating properly. Verify the LED goes off
and Troubleshooting
when the input signal is removed.

S Leakage current can be a problem when connecting field devices to an
Maintenance
I/O point. False input signals can be generated when the leakage
current of an output device is great enough to turn on the connected
input device. To correct this install a resistor in parallel with the input or
output of the circuit. The value of this resistor will depend on the amount
of leakage current and the voltage applied but usually a 10K to 20KW
resistor will work. Verify the wattage rating of the resistor is correct for
your application.
S Because of the removable terminal blocks on the DL05, the easiest
method to determine if an I/O circuit has failed is to replace the unit if
you have a spare. However, if you suspect a field device is defective,
that device may cause the same failure in the replacement PLC as well.
As a point of caution, you may want to check devices or power supplies
connected to the failed I/O circuit before replacing the unit with a spare.
99
Testing Output Output points can be set on or off in the DL05 series CPUs. If you want to do an I/O
Points check out independent of the application program, follow the procedure below:
Step Action
Use a handheld programmer or DirectSOFT to communicate online to
1
the PLC.
2 Change to Program Mode.
3 Go to address 0.
Insert an END statement at address 0. (This will cause program
4 execution to occur only at address 0 and prevent the application pro-
gram from turning the I/O points on or off).
5 Change to Run Mode.
Use the programming device to set (turn) on or off the points you wish
6
to test.
When you finish testing I/O points delete the END statement at
7
address 0.
WARNING: Depending on your application, forcing I/O points may cause

unpredictable machine operation that can result in a risk of personal injury or
equipment damage. Make sure you have taken all appropriate safety precautions
prior to testing any I/O points.
Handheld
END
Programmer
Keystrokes Used X0 X2 X5 X7 Y2 Insert an END statement
to Test an Output at the beginning of the
Point X1 X3 X4 program. This disables
the remainder of the
program.
and Troubleshooting
END
Maintenance
From a clear display, use the following keystrokes
STAT ENT
16P STATUS
BIT REF X
Use the PREV or NEXT keys to select the Y data type
NEXT A ENT
Y 10 Y 0
0
Y2 is now on
Use arrow keys to select point, then use
ON and OFF to change the status
SHFT ON Y 10 Y 0
INS
910
Noise Troubleshooting
Electrical Noise Noise is one of the most difficult problems to diagnose. Electrical noise can enter a
Problems system in many different ways and they fall into one of two categories, conducted or
radiated. It may be difficult to determine how the noise is entering the system but the
corrective actions for either of the types of noise problems are similar.
S Conducted noise is when the electrical interference is introduced into
the system by way of a attached wire, panel connection ,etc. It may
enter through an I/O circuit, a power supply connection, the
communication ground connection, or the chassis ground connection.
S Radiated noise is when the electrical interference is introduced into the
system without a direct electrical connection, much in the same manner
as radio waves.
Reducing While electrical noise cannot be eliminated it can be reduced to a level that will not
Electrical Noise affect the system.
S Most noise problems result from improper grounding of the system. A
good earth ground can be the single most effective way to correct noise
problems. If a ground is not available, install a ground rod as close to
the system as possible. Ensure all ground wires are single point
grounds and are not daisy chained from one device to another. Ground
metal enclosures around the system. A loose wire can act as a large
antenna, introducing noise into the system. Therefore, tighten all
connections in your system. Loose ground wires are more susceptible to
noise than the other wires in your system. Review Chapter 2 Installation,
Wiring, and Specifications if you have questions regarding how to
ground your system.
S Electrical noise can enter the system through the power source for the
PLC and I/O circuits. Installing an isolation transformer for all AC
sources can correct this problem. DC sources should be well-grounded
good quality supplies.
and Troubleshooting
S Separate input wiring from output wiring. Never run low-voltage I/O
Maintenance
wiring close to high voltage wiring.

911
Machine Startup and Program Troubleshooting

The DL05 Micro PLCs provide several features that can help you debug your
program before and during machine startup. This section discusses the following
topics which can be very helpful.
S Program Syntax Check
S Duplicate Reference Check
S Special Instructions
S Run Time Edits
S Forcing I/O Points
Syntax Check Even though the Handheld Programmer and DirectSOFT provide error checking
during program entry, you may want to check a program that has been modified.
Both programming devices offer a way to check the program syntax. For example,
you can use AUX 21, CHECK PROGRAM to check the program syntax from a
Handheld Programmer, or you can use the PLC Diagnostics menu option within
DirectSOFT. This check will find a wide variety of programming errors. The following
example shows how to use the syntax check with a Handheld Programmer.
Use AUX 21 to perform syntax check
CLR C B AUX ENT

AUX 21 CHECK PRO
2 1
1:SYN 2:DUP REF
Select syntax check (default selection)
(You may not get the busy display BUSY

ENT
if the program is not very long.)
and Troubleshooting
Maintenance
One of two displays will appear
Error Display (example)
$00050 E401
MISSING END
(shows location in question)
Syntax OK display
NO SYNTAX ERROR
?
See the Error Codes Section for a complete listing of programming error codes. If
you get an error, just press CLR and the Handheld will display the instruction where
the error occurred. Correct the problem and continue running the Syntax check until
the NO SYNTAX ERROR message appears.
912
Special There are several instructions that can be used to help you debug your program
Instructions during machine startup operations.
S END
S PAUSE
S STOP
END Instruction: If you need a way to quickly disable part of the program, just insert
an END statement prior to the portion that should be disabled. When the CPU
encounters the END statement, it assumes that is the end of the program. The
following diagram shows an example.
Normal Program New END disables X10 and Y1
X0 X2 Y0 X0 X2 Y0
X1 X3 X4 X1 X3 X4
X10 Y1
END
X10 Y1
END
END
PAUSE Instruction: This instruction provides a quick way to allow the inputs (or
other logic) to operate while disabling selected outputs. The output image register is
still updated, but the output circuits are not. For example, you could make this
conditional by adding an input contact or CR to control the instruction with a switch or
a programming device. Or, you could just add the instruction without any conditions
so the selected outputs would be disabled at all times.
Normal Program PAUSE disables Y0 and Y1
and Troubleshooting
X0 X2 Y0 Y0 Y1
PAUSE
Maintenance
X1 X3 X4 X0 X2 Y0
X10 Y1 X1 X3 X4
X10 Y1
END
END
STOP Instruction: Sometimes during machine startup you need a way to quickly
turn off all the outputs and return to Program Mode. You can use the STOP
instruction. When this instruction is executed the CPU automatically exits Run Mode
and enters Program Mode. Remember, all outputs are turned off during Program
Mode. The following diagram shows an example of a condition that returns the CPU
to Program Mode.
913
Normal Program STOP puts CPU in Program Mode
X0 X2 Y0 X7
STOP
X1 X3 X4 X0 X2 Y0
X5 Y1 X1 X3 X4
X5 Y1
END
END
In the example shown above, you could trigger X10 which would execute the STOP
instruction. The CPU would enter Program Mode and all outputs would be turned off.
Duplicate You can also check for multiple uses of the same output coil. Both programming
Reference Check devices offer a way to check for this condition.. For example, you can AUX 21,
CHECK PROGRAM to check for duplicate references from a Handheld
Programmer, or you can use the PLC Diagnostics menu option within DirectSOFT.
The following example shows how to perform the duplicate reference check with a
Handheld Programmer.
Use AUX 21 to perform syntax check

C B
CLR
2 1
AUX ENT AUX 21 CHECK PRO
1:SYN 2:DUP REF
Select duplicate reference check

ENT (You may not get the busy BUSY
display if the program is not
and Troubleshooting
very long.)
Maintenance
One of two displays will appear
$00024 E471
Error Display (example)
DUP COIL REF
(shows location in question)
NO DUP REFS
Syntax OK display
?
If you get an error, just press CLR and the Handheld will display the instruction where
the error occurred. Correct the problem and continue running the Duplicate
Reference check until no duplicate references are found.
NOTE: You can use the same coil in more than one location, especially in programs
containing Stage instructions and / or OROUT instructions. The Duplicate
Reference check will find occurrences, even though they are acceptable.
914
Run Time Edits The DL05 Micro PLC allows you to make changes to the application program during
Run Mode. These edits are not bumpless. Instead, CPU scan is momentarily
interrupted (and the outputs are maintained in their current state) until the program
change is complete. This means if the output is off, it will remain off until the program
change is complete. If the output is on, it will remain on.
application should make changes to the program. Changes during Run Mode
become effective immediately. Make sure you thoroughly consider the impact of any
changes to minimize the risk of personal injury or damage to equipment. There are
some important operational changes during Run Time Edits.
1. If there is a syntax error in the new instruction, the CPU will not enter the Run
Mode.
2. If you delete an output coil reference and the output was on at the time, the output
will remain on until it is forced off with a programming device.
3. Input point changes are not acknowledged during Run Time Edits. So, if youre
using a high-speed operation and a critical input comes on, the CPU may not see
the change.
Not all instructions can be edited during a Run Time Edit session. The following list
shows the instructions that can be edited.
Mnemonic Description Mnemonic Description

TMR Timer OR, ORN Or greater than or equal
Or less than
TMRF Fast timer
LD Load data (constant)
TMRA Accumulating timer
LDD Load data double (constant)
TMRAF Accumulating fast timer
ADDD Add data double (constant)
CNT Counter
SUBD Subtract data double (constant)
UDC Up / Down counter
MUL Multiply (constant)
SGCNT Stage counter
DIV Divide (constant)
STR, STRN Store, Store not
and Troubleshooting
CMPD Compare accumulator (constant)

AND, ANDN And, And not
Maintenance
ANDD And accumulator (constant)

OR, ORN Or, Or not
ORD Or accumulator (constant)
STRE, STRNE Store equal, Store not equal
XORD Exclusive or accumulator (constant)
ANDE, ANDNE And equal, And not equal
LDF Load discrete points to accumulator
ORE, ORNE Or equal, Or not equal
OUTF Output accumulator to discrete points
STR, STRN Store greater than or equal
Store less than SHFR Shift accumulator right
AND, ANDN And greater than or equal SHFL Shift accumulator left
And less than NCON Numeric constant
915
Well use the program logic shown to de-

scribe how this process works. In the ex- X0 X1 Y0
ample, well change X0 to C10. Note, the OUT
example assumes you have already
placed the CPU in Run Mode. C0
Use the MODE key to select Run Time Edits
MODE NEXT NEXT ENT

*MODE CHANGE*
RUN TIME EDIT?
Press ENT to confirm the Run Time Edits
ENT
(Note, the RUN LED on the D2HPP *MODE CHANGE*
Handheld starts flashing to indicate RUNTIME EDITS
Run Time Edits are enabled.)
Find the instruction you want to change (X0)
SHFT X A SHFT FD REF

SET 0 FIND
$00000 STR X0
Press the arrow key to move to the X. Then enter the new contact (C10).
SHFT C B A ENT
RUNTIME EDIT?
2 1 0
STR C10
Press ENT to confirm the change
and Troubleshooting
Maintenance
ENT (Note, once you press ENT, the next
address is displayed. OR C0
916
Forcing I/O Points There are many times, especially during machine startup and troubleshooting, that
you need the capability to force an I/O point to be either on or off. Before you use a
programming device to force any data type it is important you understand how the
DL05 CPUs process the forcing requests.
WARNING: Only authorized personnel fully familiar with the application should
make program changes. Do thoroughly consider the impact of any changes to
minimize the risk of personal injury or damage to equipment.
Bit Forcing Bit forcing temporarily changes the status of a discrete bit. For
example, you may want to force an input on even though the program has turned it
off. This allows you to change the point status stored in the image register. The
forced value will be valid until the CPU writes to the image register location during the
next scan. This is useful you just need to force a bit on to trigger another event.
The following diagrams show a brief X0 Y0
example of how you could use the OUT
D2HPP Handheld Programmer to force
an I/O point. The example assumes you C0
have already placed the CPU into Run
Mode.
From a clear display, use the following keystrokes
STAT ENT
16P STATUS
BIT REF X
Use the PREV or NEXT keys to select the Y data type. (Once the Y
appears, press 0 to start at Y0.)
NEXT A ENT
Y 10 Y 0
0
and Troubleshooting
Use arrow keys to select point, then use Y2 is now on

Maintenance
ON and OFF to change the status

SHFT ON Y 10 Y 0
INS
Bit Forcing with From a blank display, use the following Solid fill indicates point is on.
Direct Access keystrokes to force Y7 ON
Y H ON
SHFT
MLS 7
SHFT
INS BIT FORCE
Y7
From a blank display, use the following No fill indicates point is off.
keystrokes to force Y7 OFF
SHFT Y
MLS
H
7
SHFT OFF
DEL
BIT FORCE
Y7
1A
Auxiliary Functions
In This Appendix. . . .
Introduction
AUX 2* RLL Operations
AUX 3* Vmemory Operations
AUX 4* I/O Configuration
AUX 5* CPU Configuration
AUX 6* Handheld Programmer Configuration
AUX 7* EEPROM Operations
AUX 8* Password Operations
A2
Auxiliary Functions
Introduction
Auxiliary Functions
Appendix A
Purpose of Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX
Auxiliary Functions Functions perform many different operations, including clearing ladder memory,
displaying the scan time, and copying programs to EEPROM in the handheld
programmer. They are divided into categories that affect different system resources.
You can access the AUX Functions from DirectSOFT or from the D2HPP
Handheld Programmer. The manuals for those products provide step-by-step
procedures for accessing the AUX Functions. Some of these AUX Functions are
designed specifically for the Handheld Programmer setup, so they will not be
needed (or available) with the DirectSOFT package. Even though this Appendix
provides many examples of how the AUX functions operate, you should supplement
this information with the documentation for your choice of programming device.
Note, the Handheld Programmer may have additional AUX functions that are not
supported with the DL05 PLCs.
AUX Function and Description DL05 AUX Function and Description DL05
AUX 2* RLL Operations AUX 6* Handheld Programmer Configura-
tion
21 Check Program
61 Show Revision Numbers
22 Change Reference
62 Beeper On / Off HP
23 Clear Ladder Range
65 Run Self Diagnostics HP
24 Clear All Ladders
AUX 3* V-Memory Operations
71 Copy CPU memory to HP
31 Clear V Memory HPP EEPROM
AUX 4* I/O Configuration 72 Write HPP EEPROM to CPU HP
41 Show I/O Configuration 73 Compare CPU to HP
AUX 5* CPU Configuration HPP EEPROM
51 Modify Program Name 74 Blank Check (HPP EEPROM) HP
53 Display Scan Time 75 Erase HPP EEPROM HP
54 Initialize Scratchpad 76 Show EEPROM Type HP
(CPU and HPP)
55 Set Watchdog Timer
56 Set Communication Port 2
81 Modify Password
57 Set Retentive Ranges
82 Unlock CPU
58 Test Operations
83 Lock CPU
59 Override Setup
5B HSIO Interface Configuration
5D Scan Control Setup
supported
HP Handheld Programmer function
A3
Auxilliary Functions
Accessing AUX DirectSOFT provides various menu options during both online and offline
Auxiliary Functions
Functions via programming. Some of the AUX functions are only available during online
DirectSOFT programming, some only during offline programming, and some during both online
Appendix A
and offline programming. The following diagram shows and example of the PLC
operations menu available within DirectSOFT.
Menu Options
Accessing AUX You can also access the AUX functions by using a Handheld Programmer. Plus,
Functions via the remember some of the AUX functions are only available from the Handheld.
Handheld Sometimes the AUX name or description cannot fit on one display. If you want to see
Programmer the complete description, just press the arrow keys to scroll left and right. Also,
depending on the current display, you may have to press CLR more than once.
CLR AUX
AUX FUNCTION SELECTION
AUX 2* RLL OPERATIONS
Use NXT or PREV to cycle through the menus
NEXT
AUX FUNCTION SELECTION
AUX 3* V OPERATIONS
Press ENT to select sub-menus
ENT AUX 3* V OPERATIONS

AUX 31 CLR V MEMORY
You can also enter the exact AUX number to go straight to the sub-menu.
Enter the AUX number directly
CLR D B AUX
AUX 3* V OPERATIONS
3 1
AUX 31 CLR V MEMORY
A4
Auxiliary Functions
AUX 2* RLL Operations

Auxiliary Functions
Appendix A
RLL Operations auxiliary functions allow you to perform various operations on the
ladder program.
AUX 21 Both the Handheld and DirectSOFT automatically check for errors during program
Check Program entry. However, there may be occasions when you want to check a program that has
already been in the CPU. Two types of checks are available:
S Syntax
S Duplicate References
The Syntax check will find a wide variety of programming errors, such as missing
END statements. If you perform this check and get an error, see Appendix B for a
complete listing of programming error codes. Correct the problem and then continue
running the Syntax check until the message NO SYNTAX ERROR appears.
Use the Duplicate Reference check to verify you have not used the same output coil
reference more than once. Note, this AUX function will also find the same outputs
even if they have been used with the OROUT instruction, which is perfectly
acceptable.
This AUX function is available on the PLC Diagnostics sub-menu from within
DirectSOFT.
AUX 22 There will probably be times when you need to change an I/O address reference or
Change Reference control relay reference. AUX 22 allows you to quickly and easily change all
occurrences, (within an address range), of a specific instruction. For example, you
can replace every instance of X5 with X10.
AUX 23 There have been many times when weve taken existing programs and added or
Clear Ladder removed certain portions to solve new application problems. By using AUX 23 you
Range can select and delete a portion of the program. DirectSOFT does not have a menu
option for this AUX function, but you can just select the appropriate portion of the
program and cut it with the editing tools.
AUX 24 AUX 24 clears the entire program from CPU memory. Before you enter a new
Clear Ladders program, you should always clear ladder memory. This AUX function is available on
the PLC/Clear PLC sub-menu within DirectSOFT.
AUX 3* V-memory Operations

AUX 31 AUX 31 clears all the information from the V-memory locations available for general
Clear V Memory use. This AUX function is available on the PLC/Clear PLC sub-menu within
DirectSOFT.
AUX 4* I/O Configuration

AUX 41 This AUX function allows you to display the current I/O configuration on the DL05.
Show I/O Both the Handheld Programmer and DirectSOFT will show the I/O configuration.
Configuration
A5
AUX 5* CPU Configuration
Auxiliary Functions
Appendix A
The following auxiliary AUX functions allow you to setup, view, or change the CPU
configuration.
AUX 51 DL05 PLCs can use a program name for the CPU program or a program stored on
Modify Program EEPROM in the Handheld Programmer. (Note, you cannot have multiple programs
Name stored on the EEPROM.) The program name can be up to eight characters in length
and can use any of the available characters (AZ, 09). AUX 51 allows you to enter a
program name. You can also perform this operation from within DirectSOFT by
using the PLC/Setup sub-menu. Once youve entered a program name, you can
only clear the name by using AUX 54 to reset the system memory. Make sure you
understand the possible effects of AUX 54 before you use it!
AUX 53 AUX 53 displays the current, minimum, and maximum scan times. The minimum
Display Scan Time and maximum times are the ones that have occurred since the last Program Mode to
Run Mode transition. You can also perform this operation from within DirectSOFT
by using the PLC/Diagnostics sub-menu.
AUX 54 The CPU maintains system parameters in a memory area often referred to as the
Initialize scratchpad. In some cases, you may make changes to the system setup that will be
Scratchpad stored in system memory. For example, if you specify a range of Control Relays
(CRs) as retentive, these changes are stored.
NOTE: You may never have to use this feature unless you have made changes that
affect system memory. Usually, youll only need to initialize the system memory if you
are changing programs and the old program required a special system setup. You
can usually change from program to program without ever initializing system
memory.
AUX 54 resets the system memory to the default values. You can also perform this
operation from within DirectSOFT by using the PLC/Setup sub-menu.
AUX 55 DL05 PLCs have a watchdog timer that is used to monitor the scan time. The
Set Watchdog default value set from the factory is 200 ms. If the scan time exceeds the watchdog
Timer time limit, the CPU automatically leaves RUN mode and enters PGM mode. The
Handheld displays the following message E003 S/W TIMEOUT when the scan
overrun occurs.
Use AUX 55 to increase or decrease the watchdog timer value. You can also perform
this operation from within DirectSOFT by using the PLC/Setup sub-menu.
AUX 56 Since the DL05 CPU has an additional communication port, you can use the
CPU Network Handheld to set the network address for port 2 and the port communication
Address parameters. The default settings are:
S Station address 1
S HEX mode
S Odd parity
You can use this port with either the Handheld Programmer, DirectSOFT, or, as a
communication port for DirectNET and MODBUS. Refer to DirectNET and
MODBUS manuals for additional information about communication settings
required for network operation.
A6
Auxiliary Functions
NOTE: You will only need to use this procedure if you have port 2 connected to a
Auxiliary Functions
network. Otherwise, the default settings will work fine.

Appendix A
Use AUX 56 to set the network address and communication parameters. You can
also perform this operation from within DirectSOFT by using the PLC/Setup
sub-menu.
AUX 57 DL05 CPUs provide certain ranges of retentive memory by default. Some of the
Set Retentive retentive memory locations are backed up by a super-capacitor, and others are in
Ranges non-volatile FLASH memory. The FLASH memory locations are V7400 to V7577.
The default ranges are suitable for many applications, but you can change them if
your application requires additional retentive ranges or no retentive ranges at all.
The default settings are:
DL05
Memory Area Default Range Available
Range
Control Relays C400 C777 C0 C777
V Memory V1400 V7777 V0 V7777
Timers None by default T0 T177
Counters CT0 CT177 CT0 CT177
Stages None by default S0 S377
Use AUX 57 to change the retentive ranges. You can also perform this operation
from within DirectSOFT by using the PLC/Setup sub-menu.
WARNING: The DL05 CPUs do not have battery-backed RAM. The super-capacitor
will retain the values in the event of a power loss, but only up to 3 weeks. (The
retention time may be as short as 4 1/2 days in 60 degree C operating temperature.)
AUX 58 AUX 58 is used to override the output disable function of the Pause instruction. Use
Test Operations AUX 58 to program a single output or a range of outputs which will operate normally
even when those points are within the scope of the pause instruction.
AUX 59 Bit override can be enabled on a point-by-point basis by using AUX 59 from the
Bit Override Handheld Programmer or, by a menu option from within DirectSOFT. Bit override
basically disables any changes to the discrete point by the CPU. For example, if you
enable bit override for X1, and X1 is off at the time, then the CPU will not change the
state of X1. This means that even if X1 comes on, the CPU will not acknowledge the
change. So, if you used X1 in the program, it would always be evaluated as off in
this case. Of course, if X1 was on when the bit override was enabled, then X1 would
always be evaluated as on.
There is an advantage available when you use the bit override feature. The regular
forcing is not disabled because the bit override is enabled. For example, if you
enabled the Bit Override for Y0 and it was off at the time, then the CPU would not
change the state of Y0. However, you can still use a programming device to change
the status. Now, if you use the programming device to force Y0 on, it will remain on
and the CPU will not change the state of Y0. If you then force Y0 off, the CPU will
maintain Y0 as off. The CPU will never update the point with the results from the
application program or from the I/O update until the bit override is removed from the
point.
A7
The following diagram shows a brief overview of the bit override feature. Notice the
Auxiliary Functions
CPU does not update the Image Register when bit override is enabled.
Appendix A
Bit Override OFF Bit Override ON
Input Update Input Update

X128 ... X2 X1 X0
OFF ... ON ON OFF
Force from Y128 ... Y2 Y1 Y0 Force from
Programmer OFF ... ON ON OFF Programmer
C377 ... C2 C1 C0
OFF ... ON OFF OFF
Result of Program Image Register (example)
Result of Program
Solution Solution
AUX 5B AUX 5B is used with the High-Speed I/O (HSIO) function to select the configuration.
Counter Interface You can choose the type of counter, set the counter parameters, etc. See Chapter 3
Configuration for a complete description of how to select the various counter features.
AUX 5D The DL05 CPU has two program scan modes: fixed and variable. In fixed mode, the
Select PLC scan time is lengthened to the time you specify (in milliseconds). If the actual scan
Scan Mode time is longer than the fixed scan time, then the error code E504 BAD REF/VAL is
displayed. In variable scan mode, the CPU begins each scan as soon as the
previous scans activities complete.
A8
Auxiliary Functions
AUX 6* Handheld Programmer Configuration

Auxiliary Functions
Appendix A
The following auxiliary functions allow you to setup, view, or change the Handheld
Programmer configuration.
AUX 61 As with most industrial control products, there are cases when additional features
Show Revision and enhancements are made. Sometimes these new features only work with certain
Numbers releases of firmware. By using AUX 61 you can quickly view the CPU and Handheld
Programmer firmware revision numbers. This information (for the CPU) is also
available from within DirectSOFT from the PLC/Diagnostics sub-menu.
AUX 62 The Handheld has a beeper that provides confirmation of keystrokes. You can use
Beeper On/Off Auxiliary (AUX) Function 62 to turn off the beeper.
AUX 65 If you think the Handheld Programmer is not operating correctly, you can use AUX 65
Run Self to run a self diagnostics program. You can check the following items.
Diagnostics S Keypad
S Display
S LEDs and Backlight
S Handheld Programmer EEPROM check

The following auxiliary functions allow you to move the ladder program from one
area to another and perform other program maintenance tasks.
Transferrable Many of these AUX functions allow you to copy different areas of memory to and
Memory Areas from the CPU and handheld programmer. The following table shows the areas that
may be mentioned.
Option and Memory Type DL05 Default Range

1:PGM Program $00000 $02047
2:V V memory $00000 $07777
3:SYS System Non-selectable copies
system parameters
4:etc (All) Program, Sys- Non-selectable
tem and non-volatile V-
memory only
AUX 71 AUX 71 copies information from the CPU memory to an EEPROM installed in the
CPU to HPP Handheld Programmer.You can copy different portions of EEPROM (HP) memory to
EEPROM the CPU memory as shown in the previous table.
A9
Auxiliary Functions
AUX 72 AUX 72 copies information from the EEPROM installed in the Handheld
HPP EEPROM Programmer to CPU memory in the DL05. You can copy different portions of
Appendix A
to CPU EEPROM (HP) memory to the CPU memory as shown in the previous table.
AUX 73 AUX 73 compares the program in the Handheld programmer (EEPROM) with the
Compare HPP CPU program. You can compare different types of information as shown previously.
EEPROM to CPU
AUX 74 AUX 74 allows you to check the EEPROM in the handheld programmer to make sure
HPP EEPROM it is blank. Its a good idea to use this function anytime you start to copy an entire
Blank Check program to an EEPROM in the handheld programmer.
AUX 75 AUX 75 allows you to clear all data in the EEPROM in the handheld programmer.
Erase HPP You should use this AUX function before you copy a program from the CPU.
EEPROM
AUX 76 You can use AUX 76 to quickly determine what size EEPROM is installed in the
Show EEPROM Handheld Programmer.
Type

There are several AUX functions available that you can use to modify or enable the
CPU password. You can use these features during on-line communications with the
CPU, or, you can also use them with an EEPROM installed in the Handheld
Programmer during off-line operation. This will allow you to develop a program in the
Handheld Programmer and include password protection.
S AUX 81 Modify Password
S AUX 82 Unlock CPU
S AUX 83 Lock CPU
AUX 81 You can use AUX 81 to provide an extra measure of protection by entering a
Modify Password password that prevents unauthorized machine operations. The password must be
an eight-character numeric (09) code. Once youve entered a password, you can
remove it by entering all zeros (00000000). (This is the default from the factory.)
Once youve entered a password, you can lock the CPU against access. There are
two ways to lock the CPU with the Handheld Programmer.
S The CPU is always locked after a power cycle (if a password is present).
S You can use AUX 82 and AUX 83 to lock and unlock the CPU.
A10
Auxiliary Functions
You can also enter or modify a password from within DirectSOFT by using the
Auxiliary Functions
PLC/Password sub-menu. This feature works slightly differently in DirectSOFT.

Once youve entered a password, the CPU is automatically locked when you exit the
Appendix A
software package. It will also be locked if the CPU is power cycled.
WARNING: Make sure you remember the password before you lock the CPU. Once
the CPU is locked you cannot view, change, or erase the password. If you do not
remember the password, you have to return the CPU to the factory for password
removal.
NOTE: The DL05 CPUs support multi-level password protection of the ladder
program. This allows password protection while not locking the communication port
to an operator interface. The multi-level password can be invoked by creating a
password with an upper case A followed by seven numeric characters (e.g.
A1234567).
AUX 82 AUX 82 can be used to unlock a CPU that has been password protected.
Unlock CPU DirectSOFT will automatically ask you to enter the password if you attempt to
communicate with a CPU that contains a password.
AUX 83 AUX 83 can be used to lock a CPU that contains a password. Once the CPU is
Lock CPU locked, you will have to enter a password to gain access. Remember, this is not
necessary with DirectSOFT since the CPU is automatically locked whenever you
exit the software package.
1B
DL05 Error Codes
Error Code Table
B2
DL05 Error Codes
DL05 Error Code Description

E003 If the program scan time exceeds the time allotted to the watchdog timer, this
SOFTWARE error will occur. SP51 will be on and the error code will be stored in V7755. To
TIME-OUT correct this problem use AUX 55 to extend the time allotted to the watchdog
timer.
E004 The CPU attempted to execute an instruction code, but the RAM contents
INVALID had a parity error. Performing a program download to the CPU in an
INSTRUCTION electrically noisy environment can corrupt a programs contents. Clear the
CPU program memory, and download the program again.
E043 The battery in the CMOS RAM cartridge is low and should be replaced.
MC BATTERY LOW
Error Codes
Appendix B
E104 A write to the CPU was not successful. Disconnect the power, remove the
WRITE FAILED CPU, and make sure the EEPROM is not write protected. If the EEPROM is
not write protected, make sure the EEPROM is installed correctly. If both
conditions are OK, replace the CPU.
E151 A parity error has occurred in the application program. SP44 will be on and
BAD COMMAND the error code will be stored in V7755 .This problem may possibly be due to
electrical noise. Clear the memory and download the program again. Correct
any grounding problems. If the error returns replace the Micro PLC.
E311 A request from the handheld programmer could not be processed by the
HP COMM CPU. Clear the error and retry the request. If the error continues replace the
ERROR 1 CPU. SP46 will be on and the error code will be stored in V7756.
E312 A data error was encountered during communications with the CPU. Clear
HP COMM the error and retry the request. If the error continues check the cabling
ERROR 2 between the two devices, replace the handheld programmer, then if
necessary replace the CPU. The error code will be stored in V7756.
E313 An address error was encountered during communications with the CPU.
HP COMM Clear the error and retry the request. If the error continues check the cabling
ERROR 3 between the two devices, replace the handheld programmer, then if
necessary replace the CPU. The error code will be stored in V7756.
E316 A mode error was encountered during communications with the CPU. Clear
HP COMM the error and retry the request. If the error continues replace the handheld
ERROR 6 programmer, then if necessary replace the CPU. The error code will be stored
in V7756.
E320 The CPU did not respond to the handheld programmer communication
HP COMM request. Check to insure cabling is correct and not defective. Power cycle the
TIME-OUT system if the error continues replace the CPU first and then the handheld
programmer if necessary.
E321 A data error was encountered during communication with the CPU. Check to
COMM ERROR insure cabling is correct and not defective. Power cycle the system and if the
error continues replace the CPU first and then the handheld programmer if
necessary.
B3
DL05 Error Codes
DL405 Error Codes

E360 The device connected to the peripheral port did not respond to the handheld
Appendix A
HP PERIPHERAL programmer communication request. Check to insure cabling is correct and
PORT TIME-OUT not defective. The peripheral device or handheld programmer could be
defective.
E4** A syntax error exists in the application program. The most common is a
NO PROGRAM missing END statement. Run AUX21 to determine which one of the E4**
series of errors is being flagged. SP52 will be on and the error code will be
stored in V7755.
E401 All application programs must terminate with an END statement. Enter the
MISSING END END statement in appropriate location in your program. SP52 will be on and
Error Codes
Appendix B
STATEMENT the error code will be stored in V7755.
E402 A MOVMC or LDLBL instruction was used without the appropriate label.
MISSING LBL Refer to the Chapter 5 for details on these instructions. SP52 will be on and
the error code will be stored in V7755.
E403 A subroutine in the program does not end with the RET instruction. SP52 will
MISSING RET be on and the error code will be stored in V7755.
E404 A NEXT instruction does not have the corresponding FOR instruction. SP52
MISSING FOR will be on and the error code will be stored in V7755.
E405 A FOR instruction does not have the corresponding NEXT instruction. SP52
MISSING NEXT will be on and the error code will be stored in V7755.
E406 An interrupt routine in the program does not end with the IRT instruction.
MISSING IRT SP52 will be on and the error code will be stored in V7755.
E412 There is greater than 64 SBR or DLBL instructions in the program. This error
SBR/LBL>64 is also returned if there is greater than 2 INT instructions used in the program.
SP52 will be on and the error code will be stored in V7755.
E421 Two or more SG or ISG labels exist in the application program with the same
DUPLICATE STAGE number. A unique number must be allowed for each Stage and Initial Stage.
REFERENCE SP52 will be on and the error code will be stored in V7755.
E422 Two or more LBL instructions exist in the application program with the same
DUPLICATE LBL number. A unique number must be allowed for each and label. SP52 will be
REFERENCE on and the error code will be stored in V7755.
E423 Nested loops (programming one FOR/NEXT loop inside of another) are not
NESTED LOOPS allowed. SP52 will be on and the error code will be stored in V7755.
E431 An ISG or SG instruction must not be placed after the end statement (such as
INVALID ISG/SG inside a subroutine). SP52 will be on and the error code will be stored in
ADDRESS V7755.
B4
DL05 Error Codes

E433 A SBR must be programmed after the end statement, not in the main body of
INVALID SBR the program or in an interrupt routine. SP52 will be on and the error code will
ADDRESS be stored in V7755.
E434 A RTC must be programmed after the end statement, not in the main body of
INVALID RTC the program or in an interrupt routine. SP52 will be on and the error code will
E435 A RT must be programmed after the end statement, not in the main body of
INVALID RT the program or in an interrupt routine. SP52 will be on and the error code will
E436 An INT must be programmed after the end statement, not in the main body of
Error Codes
Appendix B
INVALID INT the program. SP52 will be on and the error code will be stored in V7755.
ADDRESS
E437 An IRTC must be programmed after the end statement, not in the main body
INVALID IRTC of the program. SP52 will be on and the error code will be stored in V7755.
ADDRESS
E438 An IRT must be programmed after the end statement, not in the main body of
INVALID IRT the program. SP52 will be on and the error code will be stored in V7755.
ADDRESS
E440 Either the DLBL instruction has been programmed in the main program area
INVALID DATA (not after the END statement), or the DLBL instruction is on a rung containing
ADDRESS input contact(s).
E441 An ACON or NCON must be programmed after the end statement, not in the
ACON/NCON main body of the program. SP52 will be on and the error code will be stored
in V7755.
E451 MLS instructions must be numbered in ascending order from top to bottom.
BAD MLS/MLR
E453 A timer or counter contact is being used where the associated timer or
MISSING T/C counter does not exist.
E454 One of the contacts is missing from a TMRA instruction.
BAD TMRA
E455 One of the contacts is missing from a CNT or UDC instruction.
BAD CNT
E456 One of the contacts is missing from the SR instruction.
BAD SR
B5
DL05 Error Codes
DL405 Error Codes

E461 More than nine levels of logic have been stored on the stack. Check the use
Appendix A
STACK OVERFLOW of OR STR and AND STR instructions.
E462 An unmatched number of logic levels have been stored on the stack. Insure
STACK the number of AND STR and OR STR instructions match the number of STR
UNDERFLOW instructions.
E463 A STR instruction was not used to begin a rung of ladder logic.
LOGIC ERROR
E464 A rung of ladder logic is not terminated properly.
MISSING CKT
E471 Two or more OUT instructions reference the same I/O point.
Error Codes
Appendix B
DUPLICATE COIL
REFERENCE
E472 Two or more TMR instructions reference the same number.
DUPLICATE TMR
REFERENCE
E473 Two or more CNT instructions reference the same number.
DUPLICATE CNT
REFERENCE
E499 Invalid PRINT instruct usage. Quotations and/or spaces were not entered or
PRINT entered incorrectly.
INSTRUCTION
B6
DL05 Error Codes

E501 An invalid keystroke or series of keystrokes was entered into the handheld
BAD ENTRY programmer.
E502 An invalid or out of range address was entered into the handheld
BAD ADDRESS programmer.
E503 An invalid command was entered in the handheld programmer.
BAD COMMAND
E504 An invalid value or reference number was entered with an instruction.
BAD REF/VAL
E505 An invalid instruction was entered into the handheld programmer.
Error Codes
Appendix B
INVALID
INSTRUCTION
E506 An invalid operation was attempted by the handheld programmer.
INVALID
OPERATION
E520 An operation which is invalid in the RUN mode was attempted by the
BAD OPRUN handheld programmer.
E521 An operation which is invalid in the TEST RUN mode was attempted by the
BAD OPTRUN handheld programmer.
E523 An operation which is invalid in the TEST PROGRAM mode was attempted
BAD OPTPGM by the handheld programmer.
E524 An operation which is invalid in the PROGRAM mode was attempted by the
BAD OPPGM handheld programmer.
E525 An operation was attempted by the handheld programmer while the CPU
MODE SWITCH mode switch was in a position other than the TERM position.
E526 The handheld programmer is in the OFFLINE mode. To change to the
OFF LINE ONLINE mode use the MODE the key.
E527 The handheld programmer is in the ON LINE mode. To change to the OFF
ON LINE LINE mode use the MODE the key.
E528 The operation attempted is not allowed during a Run Time Edit.
CPU MODE
E540 The CPU has been password locked. To unlock the CPU use AUX82 with the
CPU LOCKED password.
E541 The password used to unlock the CPU with AUX82 was incorrect.
WRONG
PASSWORD
E542 The CPU powered up with an invalid password and reset the password to
PASSWORD RESET 00000000. A password may be re-entered using AUX81.
E601 Attempted to enter an instruction which required more memory than is
MEMORY FULL available in the CPU.
E602 A search function was performed and the instruction was not found.
INSTRUCTION
MISSING
B7
DL05 Error Codes
DL405 Error Codes

E603 A search function was performed and the data was not found.
Appendix A
DATA MISSING
E604 A search function was performed and the reference was not found.
REFERENCE
MISSING
E620 An attempt to transfer more data between the CPU and handheld
OUT OF MEMORY programmer than the receiving device can hold.
E621 An attempt to write to a non-blank EEPROM in the handheld programmer
EEPROM NOT was made. Erase the EEPROM and then retry the write.
BLANK
Error Codes
Appendix B
E622 A data transfer was attempted with no EEPROM (or possibly a faulty
NO HPP EEPROM EEPROM) installed in the handheld programmer.
E623 A function was requested with an EEPROM in the handheld programmer
SYSTEM EEPROM which contains system information only.
V-MEMORY ONLY which contains V-memory data only.
PROGRAM ONLY which contains program data only.
E626 An attempt to transfer data from a tape to a UVPROM Memory Cartridge.
PROM MC This transfer must be made using a CMOS RAM Cartridge.
E627 An attempt to write to a write-protected or faulty EEPROM in the handheld
BAD WRITE programmer was made. Check the write protect jumper and replace the
EEPROM if necessary.
E628 The wrong size EEPROM is being used in the handheld programmer. This
EEPROM TYPE error occurs when the program size is larger than what the HPP can hold.
ERROR
E640 A compare between the EEPROM handheld programmer and the CPU was
COMPARE ERROR found to be in error.
E641 The volume level of the cassette player is not set properly. Adjust the volume
VOLUME LEVEL and retry the operation.
E642 An error was detected while data was being transferred to the handheld
CHECKSUM ERROR programmers Memory Cartridge. Check cabling and retry the operation.
E650 A system error has occurred in the handheld programmer. Power cycle the
HPP SYSTEM handheld programmer. If the error returns replace the handheld programmer.
ERROR
E651 A ROM error has occurred in the handheld programmer. Power cycle the
HPP ROM ERROR handheld programmer. If the error returns replace the handheld programmer.
E652 A RAM error has occurred in the handheld programmer. Power cycle the
HPP RAM ERROR handheld programmer. If the error returns replace the handheld programmer.
1C
Instruction
Execution Times
Introduction
Instruction Execution Times
C2
Introduction
This appendix contains several tables that provide the instruction execution times
for DL05 Micro PLCs. Many of the execution times depend on the type of data used
with the instruction. Registers may be classified into the following types:
S Data (word) Registers
S Bit Registers
V-Memory Data Some V-memory locations are considered data registers, such as timer or counter
Registers current values. Standard user V memory is classified as a V-memory data register.
Note that you can load a bit pattern into these types of registers, even though their
primary use is for data registers. The following locations are data registers:
Data Registers DL05

Timer Current Values V0 - V177
Counter Current Values V1000 - V1177
User Data Words V1200 - V7377
V7400 - V7577
Inst. Execution Times
V-Memory Bit You may recall that some of the discrete points such as X, Y, C, etc. are automatically
Registers mapped into V memory. The following bit registers contain this data:
Appendix C
Bit Registers DL05

Input Points (X) V40400 - V40417
Output Points (Y) V40500 - V40517
Control Relays (C) V40600 - V40637
Stages (S) V41000 - V41017
Timer Status Bits V41100 - V41107
Counter Status Bits V41140 - V41147
Special Relays (SP) V41200 - V41237
How to Read the Two Data Locations Available

Some instructions can have more than
Tables one parameter. For example, the SET X0 X1 Y0 Y7
instruction shown in the ladder program to SET
the right can set a single point or a range of
C0
points.
In these cases, execution times that depend on the amount and type of parameters.
The execution time tables list execution times for both situations, as shown below:
SET 1st #: X, Y, C, S 32.2 ms

2nd #: X, Y, C, S (N pt) 14ms+3.1msxN Execution depends
on numbers of
RST 1st #: X, Y, C, S 34.4 ms locations and types
2nd #: X, Y, C, S (N pt) 16+3.2xN of data used
C3
Boolean Boolean Instructions DL05

Instructions
Instruction Legal Data Types Execute Not Execute
STR X, Y, C, T, CT, S, SP 2.0 ms 2.0 ms
STRN X, Y, C, T, CT, S, SP 2.3 ms 2.3 ms
OR X, Y, C, T, CT, S, SP 1.6 ms 1.6 ms
ORN X, Y, C, T, CT, S, SP 1.9 ms 1.9 ms
AND X, Y, C, T, CT, S, SP 1.4 ms 1.4 ms
ANDN X, Y, C, T, CT, S, SP 1.6 ms 1.6 ms
ANDSTR None 1.3 ms 1.3 ms
ORSTR None 1.3 ms 1.3 ms
OUT X, Y, C 6.8 ms 6.8 ms
OROUT X, Y, C 6.7 ms 6.7 ms
NOT None 1.6 ms 1.6 ms
PD X, Y, C 52.3 ms 53.0 ms
20.2 ms 12.9 ms

STRPD X, Y, C, T, CT, S, SP
STRND X, Y, C, T, CT, S, SP 20.1 ms 13.0 ms
Appendix C
ORPD X, Y, C, T, CT, S, SP 20.0 ms 12.6 ms
ORND X, Y, C, T, CT, S, SP 19.8 ms 12.7 ms
ANDPD X, Y, C, T, CT, S, SP 20.0 ms 12.6 ms
ANDND X, Y, C, T, CT, S, SP 19.9 ms 12.8 ms
SET 1st #: X, Y, C, S 32.2 ms 3.7 ms
2nd #: X, Y, C, S (N pt) 14ms+3.1msxN 4.7 ms
RST 1st #: X, Y, C, S 34.4 ms 3.7 ms
2nd #: X, Y, C, S (N pt) 16+3.2xN 4.7 ms
1st #: T, CT 63.6 ms 3.7 ms
2nd #: T, CT (N pt) 39+6.7xN 4.9 ms
PAUSE 1wd: Y 23.4 ms 23.0 ms
2wd: Y (N points) 19.7+1.5xN 19.5+1.4xN
C4
Comparative Comparative Boolean Instructions DL05

Boolean
Instructions
STRE 1st 2nd
V: Data Reg. V:Data Reg. 17.0 ms 16.8 ms
V:Bit Reg. 17.0 ms 16.8 ms
K:Constant 11.7 ms 11.6 ms
P:Indir. (Data) 42.8 ms 42.7 ms
P:Indir. (Bit) 42.8 ms 42.7 ms
V: Bit Reg. V:Data Reg. 17.0 ms 16.8 ms
P:Indir. (Data) V:Data Reg. 42.8 ms 42.7 ms
P:Indir. (Bit) V:Data Reg. 42.8 ms 42.7 ms
STRNE 1st 2nd

Appendix C

C5
Comparative Boolean (cont.) DL05
Instruct Legal Data Types Execute Not Execute

ORE 1st 2nd

ORNE 1st 2nd
16.7 ms 16.8 ms
Appendix C
V: Data Reg. V:Data Reg.
C6
Instruct Legal Data Types Execute Not Execute

ANDE 1st 2nd
ANDNE 1st 2nd

16.7 ms 16.8 ms
Appendix C
V: Data Reg. V:Data Reg.

C7
Instruc Legal Data Types Execute Not Execute

STR 1st 2nd
T, CT V:Data Reg. 17.0 ms 16.9 ms
1st 2nd

Appendix C
STRN 1st 2nd
1st 2nd
C8

OR 1st 2nd
1st 2nd

Appendix C

ORN 1st 2nd
1st 2nd
C9

AND 1st 2nd
1st 2nd

Appendix C
ANDN 1st 2nd
T, CT V:Data Reg. 15.8 ms 15.7
V:Bit Reg. 15.8 ms 15.7
K:Constant 10.8 ms 10.8
P:Indir. (Data) 41.9 ms 41.9
P:Indir. (Bit) 41.9 ms 41.9
1st 2nd
C10
Immediate Immediate Instructions DL05

Instructions
STRI X 38.2 ms 38.2 ms
STRNI X 38.5 ms 38.5 ms
ORI X 37.7 ms 37.7 ms
ORNI X 38.2 ms 38.2 ms
ANDI X 37.7 ms 37.7 ms
ANDNI X 38.1 ms 38.1 ms
OUTI Y 77.5 ms 77.5 ms
OROUTI Y 85.7 ms 85.7 ms
SETI 1st #: Y 68.0 ms 3.2 ms
2nd #: Y (N pt) 108.5ms+1.6msxN 4.3 ms
RSTI 1st #: Y 66.9 3.3 ms

2nd #: Y (N pt) 10.8ms+1.7msxN 4.4 ms
Timer, Counter, Timer, Counter, and Shift Register DL05

and Shift Register
TMR 1st 2nd

T V:Data Reg. 64.0 ms 59.0 ms
Appendix C

TMRF 1st 2nd
TMRA 1st 2nd
TMRAF 1st 2nd
CNT 1st 2nd
CT V:Data Reg. 79.5 ms 66.9 ms
C11
Timer, Counter, and Shift Register DL05

SGCNT 1st 2nd
UDC 1st 2nd
V:Bit Reg. 118.3 ms 101.1 ms
SR C (N points to shift) 43.4ms+25.6msxN 31.4 ms
Accumulator Data Accumulator / Stack Load and DL05

Instructions Output Data Instructions
LD V:Data Reg. 43.7 ms 3.7 ms

Appendix C
LDD V:Data Reg. 47.1 ms 3.7 ms
LDF 1st 2nd
X, Y, C, S K:Constant 65.8ms+13.9msxN 4.9 ms
T, CT, SP (N pt)
LDA O: (Octal constant for address) 42.7 ms 3.7 ms
OUT V:Data Reg. 16.6 ms 3.7 ms
OUTD V:Data Reg. 18.1 ms 3.8 ms
OUTF 1st 2nd
X, Y, C K:Constant 61.9ms+22msxN 4.7 ms
(N pt)
POP None 41.1 ms 2.7 ms
C12
Logical Logical (Accumulator) Instructions DL05

Instructions
AND V:Data Reg. 23.5 ms 3.9 ms
ANDD V:Data Reg. 23.3 ms 3.7 ms
OR V:Data Reg. 23.9 ms 3.7 ms
ORD V:Data Reg. 23.8 ms 3.8 ms
XOR V:Data Reg. 23.5 ms 3.9 ms

Appendix C
XORD V:Data Reg. 23.3 ms 3.7 ms

CMP V:Data Reg. 25.4 ms 3.7 ms
CMPD V:Data Reg. 37.3 ms 3.9 ms
Math Instructions Math Instructions (Accumulator) DL05

ADD V:Data Reg. 140.7 ms 3.7 ms
ADDD V:Data Reg. 152.4 ms 3.9 ms
SUB V:Data Reg. 148.1 ms 3.7 ms
C13
Math Instructions (Accumulator) DL05

SUBD V:Data Reg. 157.0 ms 3.9 ms
MUL V:Data Reg. 305.0 ms 3.7 ms
MULD V:Data Reg. 1261.3 ms 3.8 ms
DIV V:Data Reg. 557.1 ms 3.7 ms
DIVD V:Data Reg. 562.2 ms 3.8 ms

Appendix C
INC V:Data Reg. 35.7 ms 3.4 ms
DEC V:Data Reg. 41.4 ms 3.3 ms
ADDB V:Data Reg. 69.5 ms 3.3 ms
SUBB V:Data Reg. 69.3 ms 3.3 ms
MULB V:Data Reg. 23.4 ms 3.2 ms
DIVB V:Data Reg. 76.1 ms 3.3 ms
C14
Math Instructions (Accumulator) DL05

INCB V:Data Reg. 23.0 ms 3.4 ms
DECB V:Data Reg. 23.2 ms 2.5 ms
Bit Instructions Bit Instructions (Accumulator) DL05

SUM None 19.2 ms 2.3 ms
SHFR V:Data Reg. (N bits) 23.0 ms 3.4 ms
V:Bit Reg. (N bits) 23.0 ms 3.4 ms
K:Constant (N bits) 20.3 ms 3.3 ms
SHFL V:Data Reg. (N bits) 29.7 ms 3.4 ms
V:Bit Reg. (N bits) 29.7 ms 3.4 ms
K:Constant (N bits) 20.4 ms 3.3 ms
ENCO None 12.6 ms 2.3 ms

DECO None 20.3 ms 2.3 ms
Appendix C
Number Number Conversion Instructions DL05

Conversion (Accumulator)
Instructions
BIN None 75.8 ms 2.3 ms
BCD None 159.9 ms 2.2 ms
INV None 6.2 ms 2.3 ms
ATH V:Data Reg. (N bits)
97ms+20msxN 3.3 ms
V:Bit Reg. (N bits)
HTA V:Data Reg. (N bits)
98ms+27msxN 2.1 ms
V:Bit Reg. (N bits)
GRAY None 224.7 ms 2.3 ms
SFLDGT None 95.3 ms 2.2 ms
Table Instructions Table Instructions DL05

MOV V:Data Reg. / V:Bit Reg. 63ms+16msxN 3.3 ms
P:Indir. (Data) / P:Indir. (Bit)
MOVMC Move from E2 to V:Data Reg.
Move from E2 to V:Bit Reg. 50ms+15msxN 3.3 ms
N= #of words
LDLBL K 33.5 ms 4.2 ms
C15
CPU Control CPU Control Instructions DL05

Instructions
NOP None 1.1 ms 1.1 ms
END None 24.0 ms 24.0 ms
STOP None 10.0 ms 1.1 ms
RSTWDT None 5.9 ms 2.2 ms
NOT None 1.6 ms 1.6 ms
Program Control Program Control Instructions DL05

Instructions
FOR V, K 125.9 ms 14.5 ms
NEXT None 64.4 ms 64.4 ms
GTS K 27.5 ms 14.8 ms
SBR K 1.5 ms 1.5 ms
RTC None 25.7 ms 12.1 ms
RT None 21.2 ms 21.2 ms

MLS K (17) 35.2 ms 35.2 ms
30.9 ms 30.9 ms
Appendix C
MLR K (07)
Interrupt Interrupt Instructions DL05

Instructions
ENI None 24.2 ms 2.7 ms
DISI None 9.4 ms 2.3 ms
INT O(0,1) 7.5 ms
IRTC None 0.9 ms 1.3 ms
IRT None 6.6 ms
Network Network Instructions DL05

Instructions
RX X, Y, C, T, CT, SP, S, $ 852.0 ms 4.4 ms
V:Data Reg. 852.0 ms 4.4 ms
WX X, Y, C, T, CT, SP, S, $ 1614.0 ms 4.4 ms
V:Data Reg. 1614.0 ms 4.4 ms
C16
Message Message Instructions DL05

Instructions
FAULT V:Data Reg. 65.0 ms 4.4 ms
DLBL K
NCON K
ACON A
PRINT ASCII 631.0 ms 3.6 ms
RLL PLUS RLL PLUS Instructions DL05

Instructions
ISG S 44.0 ms 41.1 ms
SG S 44.0 ms 41.1 ms
JMP S 76.0 ms 9.3 ms
NJMP S 77.4 ms 9.3 ms
CV S 42.1 ms 27.5 ms
CVJMP S 89.5 ms 17.6 ms

Appendix C
Drum Drum Instructions DL05

Instructions
DRUM CT 840.0 ms 339.6 ms
EDRUM CT 753.2 ms 357.0 ms
1D
Special Relays
DL05 PLC Special Relays
D2
Special Relays
DL05 PLC Special Relays

Appendix A
Special Relays are just contacts that are set by the CPU operating system to
indicate a particular system event has occurred. These contacts are available for
use in your ladder program. Knowing just the right special relay contact to use for a
particular situation can save lot of programming time. Since the CPU operating
system sets and clears special relay contacts, the ladder program only has to use
them as inputs in ladder logic.
Startup and SP0 First scan on for the first scan after a power cycle or program to run transition
Real-Time Relays only. The relay is reset to off on the second scan. It is useful where a
function needs to be performed only on program startup.
SP1 Always ON provides a contact to insure an instruction is executed every scan.
SP3 1 minute clock on for 30 seconds and off for 30 seconds.
SP4 1 second clock on for 0.5 second and off for 0.5 second.
SP5 100 ms clock on for 50 ms. and off for 50 ms.
SP6 50 ms clock on for 25 ms. and off for 25 ms.
SP7 Alternate scan on every other scan.
CPU Status Relays SP11 Forced run on when the mode switch is in the run position and the CPU is
mode running.
SP12 Terminal on when the CPU is in the run mode.
run mode
SP13 Test on when the CPU is in the test run mode.
run mode
SP15 Test on when the CPU is in the test stop mode.
stop mode
SP16 Terminal on when the mode switch is the the TERM position and the CPU is in
PGM mode program mode.
Special Relays
Appendix D
SP17 Forced stop on when the mode switch is in the STOP position.
SP20 Forced on when the STOP instruction is executed.
stop mode
SP22 Interrupt enabled on when interrupts have been enabled using the ENI instruction.
D3
Special Relays
System Monitoring SP36 Override setup on when the override function is used.
relay
SP37 Scan control on when the actual scan time runs over the prescribed scan time.
error
SP40 Critical error on when a critical error such as I/O communication loss has
occurred.
SP41 Warning on when a non critical error has occurred.
SP42 Diagnostics error on when a diagnostics error or a system error occurs.
SP44 Program on when a memory error such as a memory parity error has
memory error occurred.
SP45 I/O error on when an I/O error such as a blown fuse occurs.
SP46 Communications on when a communication error occurs on any of the CPU ports.
error
SP50 Fault instruction on when a Fault Instruction is executed.
SP51 Watch Dog on if the CPU Watch Dog timer times out.
timeout
SP52 Grammatical on if a grammatical error has occurred either while the CPU is
error running or if the syntax check is run. V7755 will hold the exact error
code.
SP53 Solve logic error on if CPU cannot solve the logic.
SP54 Communication on whent RX, WX, RD, WT instructions are executed with the wrong
error parameters.
SP56 Table instuction on if a table instruction with a pointer is executed and the pointer
overrun value is outside the table boundary.
Accumulator SP60 Value less than on when the accumulator value is less than the instruction value.
Status SP61 Value equal to on when the accumulator value is equal to the instruction value.
SP62 Greater than on when the accumulator value is greater than the instruction value.
SP63 Zero on when the result of the instruction is zero (in the accumulator.)
SP64 Half borrow on when the 16 bit subtraction instruction results in a borrow.
Special Relays
Appendix D
SP65 Borrow on when the 32 bit subtraction instruction results in a borrow.
SP66 Half carry on when the 16 bit addition instruction results in a carry.
SP67 Carry when the 32 bit addition instruction results in a carry.
SP70 Sign on anytime the value in the accumulator is negative.
SP71 Pointer on when the V-memory specified by a pointer (P) is not valid.
reference error
SP73 Overflow on if overflow occurs in the accumulator when a signed addition or
subtraction results in an incorrect sign bit.
SP75 Data error on if a BCD number is expected and a nonBCD number is
encountered.
SP76 Load zero on when any instruction loads a value of zero into the accumulator.
D4
Special Relays
HSIO Pulse SP104 Profile Complete on when the pulse output profile is completed. (Mode 30)
Output Relay
Appendix A
Communication SP116 CPU port busy on when port 2 is the master and sending data.
Monitoring Relays Port 2
SP117 Communications on when port 2 is the master and has a communication error.
error Port 2
Equal Relays for SP540 Current = target value on when the counter current value equals the value in
HSIO Mode 10 V2320 / V2321.
Counter Presets SP541 Current = target value on when the counter current value equals the value in
V2322 / V2323.
SP542 Current = target value on when the counter current value equals the value in
V2324 / V2325.
V2326 / V2327.
V2330 / V2331.
V2332 / V2333.
V2334 / V2335.
V2336 / V2337.
V2340 / V2341.
V2342 / V2343.
V2344 / V2345.
V2346 / V2347
Special Relays
Appendix D
V2350 / V2351.
V2352 / V2353.
V2354 / V2355.
V2356 / V2357.
D5
Special Relays
V2360 / V2361.
V2362 / V2363.
V2364 / V2365.
V2366 / V2367.
V2370 / V2371.
V2372 / V2373.
V2374 / V2375.
V2376 / V2377.
Special Relays
Appendix D
1E
DL05
Product Weights
Product Weight Table
E2
Product Weights
Product Weight Table

Appendix A
PLC Weight
D005AR 0.60 lb. (272g)
D005DR 0.60 lb. (272g)
D005AD 0.58 lb. (263g)
D005DD 0.56 lb. (254g)
D005AA 0.60 lb. (272g)
D005DA 0.60 lb. (272g)
D005DRD 0.56 lb. (254g)
D005DDD 0.58 lb. (263g)
Product Weights
Appendix E
1F
European Union
Directives (CE)
European Union (EU) Directives
Basic EMC Installation Guidelines
F2
European Union Directives
European Union (EU) Directives

Appendix A
NOTE: The information contained in this section is intended as a guideline and is

based on our interpretation of the various standards and requirements. Since the
actual standards are issued by other parties and in some cases Governmental
agencies, the requirements can change over time without advance warning or notice.
Changes or additions to the standards can possibly invalidate any part of the
information provided in this section.
This area of certification and approval is absolutely vital to anyone who wants to do
business in Europe. One of the key tasks that faced the EU member countries and
the European Economic Area (EEA) was the requirement to bring several similar yet
distinct standards together into one common standard for all members. The primary
purpose of a single standard was to make it easier to sell and transport goods
between the various countries and to maintain a safe working and living
environment. The Directives that resulted from this merging of standards are now
legal requirements for doing business in Europe. Products that meet these
Directives are required to have a CE mark to signify compliance.
Member Countries As of January 1, 1997, the members of the EU are Austria, Belgium, Denmark,
Finland, France, Germany, Greece, Ireland, Italy, Luxembourg, The Netherlands,
Portugal, Spain, Sweden, and the United Kingdom. Iceland, Liechtenstein, and
Norway together with the EU members make up the European Economic Area
(EEA) and all are covered by the Directives.
Applicable There are several Directives that apply to our products. Directives may be amended,
Directives or added, as required.
S Electromagnetic Compatibility Directive (EMC) this Directive
attempts to ensure that devices, equipment, and systems have the
ability to function satisfactorily in its electromagnetic environment
without introducing intolerable electromagnetic disturbance to anything
in that environment.
S Machinery Safety Directive this Directive covers the safety aspects
of the equipment, installation, etc. There are several areas involved,
including testing standards covering both electrical noise immunity and
noise generation.
S Low Voltage Directive this Directive is also safety related and
covers electrical equipment that has voltage ranges of 501000VAC
and/or 751500VDC.
S Battery Directive this Directive covers the production, recycling, and
disposal of batteries.
Compliance Certain standards within each Directive already require mandatory compliance. The
EMC Directive, which has gained the most attention, became mandatory as of
January 1, 1996. The Low Voltage Directive became mandatory as of January 1,
EU Directives
1997.
Appendix F
Ultimately, we are all responsible for our various pieces of the puzzle. As
manufacturers, we must test our products and document any test results and/or
installation procedures that are necessary to comply with the Directives. As a
machine builder, you are responsible for installing the products in a manner which
will ensure compliance is maintained. You are also responsible for testing any
combinations of products that may (or may not) comply with the Directives when
used together.
F3
The end user of the products must comply with any Directives that may cover
maintenance, disposal, etc. of equipment or various components. Although we
strive to provide the best assistance available, it is impossible for us to test all
possible configurations of our products with respect to any specific Directive.
Because of this, it is ultimately your responsibility to ensure that your machinery (as
a whole) complies with these Directives and to keep up with applicable Directives
and/or practices that are required for compliance.
As of January 1, 1999, the DL05, DL205, DL305, and DL405 PLC systems
manufactured by Koyo Electronics Industries or FACTS Engineering, when properly
installed and used, conform to the Electromagnetic Compatibility (EMC), Low
Voltage Directive, and Machinery Directive requirements of the following standards.
S EMC Directive Standards Revelant to PLCs
EN500811 Generic emission standard for residential, commercial,
and light industry
EN500812 Generic emission standard for industrial environment.
EN500821 Generic immunity standard for residential, commercial,
and light industry
EN500822 Generic immunity standard for industrial environment.
S Low Voltage Directive Standards Applicable to PLCs
EN610101 Safety requirements for electrical equipment for
measurement, control, and laboratory use.
S Product Specific Standard for PLCs
EN611312 Programmable controllers, equipment requirements and
tests. This standard replaces the above generic standards for immunity
and safety. However, the generic emissions standards must still be used
in conjunction with the following standards:
EN 61000-3-2 Harmonics
EN 61000-3-2 Fluctuations
PLCDirect is currently in the process of changing their testing
procedures from the generic standards to the product specific
standards.
Special Installation The installation requirements to comply with the requirements of the Machinery
Manual Directive, EMC Directive and Low Voltage Directive are slightly more complex than
the normal installation requirements found in the United States. To help with this, we
have published a special manual which you can order:
S DAEUM EU Installation Manual that covers special installation
requirements to meet the EU Directive requirements. Order this manual
to obtain the most up-to-date information.
EU Directives
Appendix F
F4
Other Sources of Although the EMC Directive gets the most attention, other basic Directives, such as
Information the Machinery Directive and the Low Voltage Directive, also place restrictions on the
control panel builder. Because of these additional requirements it is recommended
Appendix A
that the following publications be purchased and used as guidelines:

S BSI publication TH 42073: February 1996 covers the safety and
electrical aspects of the Machinery Directive
S EN 602041:1992 General electrical requirements for machinery, including
Low Voltage and EMC considerations
S IEC 100052: EMC earthing and cabling requirements
S IEC 100051: EMC general considerations
It may be possible for you to obtain this information locally; however, the official
source of applicable Directives and related standards is:
The Office for Official Publications of the European Communities
L2985 Luxembourg; quickest contact is via the World Wide Web at
http://euroop.eu.int/indexn.htm
Another source is:
British Standards Institution Sales Department
Linford Wood
Milton Keynes
MK14 6LE
United Kingdom; the quickest contact is via the World Wide Web at
http://www.bsi.org.uk
Basic EMC Installation Guidelines

Enclosures The simplest way to meet the safety requirements of the Machinery and Low Voltage
Directives is to house all control equipment in an industry standard lockable steel
enclosure. This normally has an added benefit because it will also help ensure that
the EMC characteristics are well within the requirements of the EMC Directive.
Although the RF emissions from the PLC equipment, when measured in the open
air, are well below the EMC Directive limits, certain configurations can increase
emission levels. Holes in the enclosure, for the passage of cables or to mount
operator interfaces, will often increase emissions.
EU Directives
Appendix F
F5
AC Mains Filters DL05, DL205 and DL305 AC

powered base power supplies
require extra mains filtering to
comply with the EMC Directive
on conducted RF emissions.
All PLC equipment has been Schaffner
FN2010
tested with filters from Filter
Schaffner, which reduce
emissions levels if the filters
are properly grounded (earth
ground). A filter with a current To AC
rating suitable to supply all Input
PLC power supplies and AC Transient Circuitry
Suppressor
input modules should be
selected. We suggest the Fused
FN2010 for DL05/DL205 Earth Terminals
systems and the FN2080 for Terminal
DL305 systems. DL405 L N
systems do not require extra
filtering.
NOTE: Very few mains filters can reduce problem emissions to negligible levels. In
some cases, filters may increase conducted emissions if not properly matched to the
problem emissions.
Suppression and In order to comply with the fire risk requirements of the Low Voltage and Machinery
Fusing Directive electrical standards EN 610101, and EN 602041, by limiting the power
into unlimited mains circuits with power leads reversed, it is necessary to fuse both
AC and DC supply inputs. You should also install a transient voltage suppressor
across the power input connections of the PLC. Choose a suppressor such as a metal
oxide varistor, with a rating of 275VAC working voltage for 230V nominal supplies
(150VAC working voltage for 115V supplies) and high energy capacity (eg. 140
joules).
Transient suppressors must be protected by fuses and the capacity of the transient
suppressor must be greater than the blow characteristics of the fuses or circuit
breakers to avoid a fire risk. A recommended AC supply input arrangement for Koyo
PLCs is to use twin 3 amp TT fused terminals with fuse blown indication, such as
DINnectors DNF10L terminals, or twin circuit breakers, wired to a Schaffner FN2010
filter or equivalent, with high energy transient suppressor soldered directly across the
output terminals of the filter. PLC system inputs should also be protected from voltage
impulses by deriving their power from the same fused, filtered, and surge-suppressed
supply.
EU Directives
Appendix F
Internal Enclosure A heavy-duty star earth terminal block should be provided in every cubicle for the
Grounding connection of all earth ground straps, protective earth ground connections, mains
filter earth ground wires, and mechanical assembly earth ground connections. This
should be installed to comply with safety and EMC requirements, local standards, and
the requirements found in IEC 100052.The Machinery Directive also requires that
the common terminals of PLC input modules, and common supply side of loads driven
from PLC output modules should be connected to the protective earth ground
terminal.
F6
Equipotential
Grounding
Appendix A
Serial Communication Cable

Key Equi-potential Bond
Adequate site earth grounding must be provided for equipment containing modern
electronic circuitry. The use of isolated earth electrodes for electronic systems is
forbidden in some countries. Make sure you check any requirements for your
particular destination. IEC 100052 covers equi-potential bonding of earth grids
adequately, but special attention should be given to apparatus and control cubicles
that contain I/O devices, remote I/O racks, or have inter-system communications with
the primary PLC system enclosure. An equi-potential bond wire must be provided
alongside all serial communications cables, and to any separate items of the plant
which contain I/O devices connected to the PLC. The diagram shows an example
of four physical locations connected by a communications cable.
Communications Conductive
Screened

Adapter
and Shielded Cable

Cables Serial
I/O
To Earth
Block
Equi-potential
Bond
Control Cubicle
Good quality 24 AWG minimum twisted-pair shielded cables, with overall foil and
braid shields are recommended for analog cabling and communications cabling
outside of the PLC enclosure. To date it has been a common practice to only provide
an earth ground for one end of the cable shield in order to minimize the risk of noise
caused by earth ground loop currents between apparatus. The procedure of only
EU Directives
grounding one end, which primarily originated as a result of trying to reduce hum in
Appendix F
audio systems, is no longer applicable to the complex industrial environment.

Shielded cables are also efficient emitters of RF noise from the PLC system, and can
interact in a parasitic manner in networks and between multiple sources of
interference.
F7
The recommendation is to use shielded cables as electrostatic pipes between

apparatus and systems, and to run heavy gauge equi-potential bond wires
alongside all shielded cables. When a shielded cable runs through the metallic wall
of an enclosure or machine, it is recommended in IEC 100052 that the shield
should be connected over its full perimeter to the wall, preferably using a conducting
adapter, and not via a pigtail wire connection to an earth ground bolt. Shields must be
connected to every enclosure wall or machine cover that they pass through.
Analog and RS232 Providing an earth ground for both ends of the shield for analog circuits provides the
Cables perfect electrical environment for the twisted pair cable as the loop consists of signal
and return, in a perfectly balanced circuit arrangement, with connection to the
common of the input circuitry made at the module terminals. RS232 cables are
handled in the same way.
Multidrop Cables RS422 twin twisted pair, and RS485 single twisted pair cables also require a 0V link,
which has often been provided in the past by the cable shield. It is now
recommended that you use triple twisted pair cabling for RS422 links, and twin
twisted pair cable for RS485 links. This is because the extra pair can be used as the
0V inter-system link. With loop DC power supplies earth grounded in both systems,
earth loops are created in this manner via the inter-system 0v link. The installation
guides encourage earth loops, which are maintained at a low impedance by using
heavy equi-potential bond wires. To account for nonEuropean installations
using single-end earth grounds, and sites with far from ideal earth ground
characteristics, we recommend the addition of 100 ohm resistors at each 0V
link connection in network and communications cables.
Last Slave Slave n Master
TXD 0V RXD TXD 0V RXD RXD 0V TXD
+ + + + + +
100W 100W
100W
Termination Termination
Shielded Cables When you run cables between PLC items within an enclosure which also contains
within Enclosures susceptible electronic equipment from other manufacturers, remember that these cables
may be a source of RF emissions. There are ways to minimize this risk. Standard data
cables connecting PLCs and/or operator interfaces should be routed well away from other
equipment and their associated cabling. You can make special serial cables where the
cable shield is connected to the enclosures earth ground at both ends, the same way as
external cables are connected.
Network Isolation For safety reasons, it is a specific requirement of the Machinery Directive that a keyswitch
must be provided that isolates any network input signal during maintenance, so that
remote commands cannot be received that could result in the operation of the machinery.
EU Directives
The FAISONET does not have a keyswitch! Use a keylock and switch on your enclosure
Appendix F
which when open removes power from the FAISONET. To avoid the introduction of
noise into the system, any keyswitch assembly should be housed in its own earth
grounded steel box and the integrity of the shielded cable must be maintained.
Again, for further information on EU directives we recommend that you get a copy of
our EU Installation Manual (DAEUM). Also, if you are connected to the World
Wide Web, you can check the EU Commisions official site at:
http://europ.eu.int/
F8
DC Powered Due to slightly higher emissions radiated by the DC powered versions of the DL05, and
Versions the differing emissions performance for different DC supply voltages, the following
stipulations must be met.
Appendix A
S The PLC must be housed within a metallic enclosure with a minimum

amount of orifices.
S The communication cable and all I/O cables must pass through suitable
ferrite beads which must be mounted within the enclosure. The I/O
cables can be bundled together and passed through the same ferrite.
Recommended ferrite beads and split cores are detailed below. These were used in
extensive EMC tests and found to successfully attenuate radiated emissions to a
high degree.
For I/O Bundle

Manufacturer Mfg. Part No. OD ID L 1 Turn 1 Turn 2 Turn 2 Turn
mm mm mm L/25 MHz L/100 MHz L/25 MHz L/100 MHz
W W W W
RS Online 2606795 17.5 9.5 28.5 153 210 649 632
FairRite 2643665702 17.5 9.5 28.5 153 210 649 632
Wurth Elektronik 742 700 9 17.5 9.5 28.5 153 210 649 632
For Communication Cable

RS Online 2224416 26.6 16.6 72 132 301 547
FairRite 0444167281 26.6 10.7 16.6 72 132 301 547
Richco MTFC 231114T 26.6 10.7 16.6 72 132 301 547
EU Directives
Appendix F
F9
Items Specific to
the DL05 S The rating between all circuits in this product are rated as basic
insulation only, as appropriate for single fault conditions.
S There is no isolation offered between the PLC and the analog inputs of
this product.
S It is the responsibility of the system designer to earth one side of all
control and power circuits, and to earth the braid of screened cables.
S This equipment must be properly installed while adhering to the
guidelines of the in house PLC installation manual DAEUM, and the
installation standards IEC 100051, IEC 100052 and IEC 11314.
S It is a requirement that all PLC equipment must be housed in a
protective steel enclosure, which limits access to operators by a lock
and power breaker. If access is required by operators or untrained
personnel, the equipment must be installed inside an internal cover or
secondary enclosure.
S It should be noted that the safety requirements of the machinery
directive standard EN602041 state that all equipment power circuits
must be wired through isolation transformers or isolating power
supplies, and that one side of all AC or DC control circuits must be
earthed.
S Both power input connections to the PLC must be separately fused
using 3 amp T type antisurge fuses, and a transient suppressor fitted
to limit supply overvoltages.
S If the user is made aware by notice in the documentation that if the
equipment is used in a manner not specified by the manufacturer the
protection provided by the equipment may be impaired.
EU Directives
Appendix F
1
Index
Binary Coded Decimal instruction, 582, 584

A
Binary instruction, 583
Accumulating Fast Timer instruction, 533
Bit Operation Instructions, 578
Accumulating Timer instruction, 533
Boolean Instructions, 54, 59
Accumulator Stack Load Instructions, 543
Bumpless transfer, 825
Add Binary instruction, 572, 574
Add Double instruction, 564
Add instruction, 563 C
Agency approvals, 28 Cables
Alarms, PID, 853 operator interfaces, 214
programming, 19
And Double instruction, 556 programming devices, 214
And If Equal instruction, 522 Calculating Program Execution Time, 419
And If Not Equal instruction, 522 Cascade control, 851
And Immediate instruction, 527 Common terminals, 216
And instruction, 511, 555 Communication Port Specifications, 432
comparative, 525
Communication ports, 114
And Negative Differential instruction, 517 pinout diagrams, 44
And Not Immediate instruction, 527 Communications problems, 97
And Not instruction, 511 Comparative Boolean, 520
comparative, 525
Compare Double instruction, 562
And Positive Differential instruction, 517
Compare instruction, 561
And Store instruction, 512
Components, 17
ASCII Constant instruction, 5106, 5108
Connections
ASCII TO HEX instruction, 586 operator interface, 214
Auxiliary Functions, 48 power input, 19
programming devices, 19, 214, 45
Auxiliary functions, A2 Solid State field devices, 217
toggle switches, 18
Connector
B common terminals, 216
Bias freeze, 837 diagram, 216
Index2
removal, 25 counter assignments, 66
Control Output, 829 drum control techniques, 610
EDRUM (Event Drum), 614
Control Relay Bit Map, 430 handheld programmer mnemonics, 616
Converge Jump instruction, 723 overview of drum operation, 68
powerup state, 69
Converge Stage instruction, 723 selfresetting, 611
Convergence Stages, 719 step transition, 64
Converting Number Formats Drum sequencer programming, 112
ASCII TO HEX, 586
Hex to ASCII, 587
Counter instruction, 536 E
Counter Instructions, 530 Emergency stop, 23
Counter Status Bit Map, 431 Enable Interrupt instruction, 5104
CPU Encode instruction, 577, 579, 581
changing modes, 47
configuration, A5 End Instruction, 54
features, 42 Environmental specifications, 28
hardware setup, 44
Equal relays, 39, D3, D5
indicators, 96
instruction list, 52 Error codes
Mode switch, 46 code locations, 93
specifications, 43 listing, B2B9
status indicators, 46 pulse output errors, 343
CPU Indicator, 97 Error term, 830
CPU Operation, 411 European Directives, F2
CPU Scan Time, 418 Exclusive Or Double instruction, 560
Exclusive Or instruction, 559
Execution Times, C3
D
Data Label instruction, 5106, 5108
Decrement Binary instruction, 571
F
Derivative term, 834 Fatal Errors, 92
Diagnostics, 92 Fault instruction, 5107
Dimensions, 26 Feed forward control, 847
DIN rail mounting, 29 For instruction, 597
Direct-acting loop, 833 Fuse protection, 210
DirectNET, 435
Divide Double instruction, 570 G
Divide instruction, 569
Goto Subroutine instruction, 599
DL05 Micro PLC
front panel, 24 Gray Code instruction, 589
mounting guidelines, 26
unit dimensions, 26
Drum instruction, 62, 612
chart representation, 63
Index3
Interrupt Return instruction, 5104
H
Interrupts
Handheld programmer, A6 external, 347
EEPROM operations, A7 HSIO input, 345
HEX TO ASCII instructions, 587 timed, 347
Highspeed I/O Invert instruction, 585
configuration, 35
discrete inputs with filter, 353
features, 32 J
highspeed counter, 36
highspeed interrupts, 345 Jump instruction, 77, 722
I/O Point Usage, 34
modes, 34
programming, 311, 322, 341 L
pulse catch input, 350
pulse output, 325 Load Address instruction, 551
Home search profile, 338 Load Double instruction, 549
Load Formatted instruction, 550
Load instruction, 548
I
Load Label instruction, 591, 593
I/O Response Time, 415 Logical Instructions, 555
I/O Type Selection, 16
Increment Binary instruction, 571
Initial Stage instruction, 722
M
Initial Stages, 75 Maintenance, 92
Instructions Manual, organization, 14
accumulator / stack Load, 543 Master Line Reset instruction, 5102
bit operation, 578
boolean, 59 Master Line Set instruction, 5102
capable of run time edits, 914 Math Instructions, 563
comparative boolean, 520
Memory
drum, 62, 612
EEPROM, 113
execution times, C2, C3, C6
FLASH, 113
immediate, 526
interrupt, 5104 Memory Map, 422, 428
list of, 52 Message Instructions, 5107
logical, 555
math, 563 MODBUS, 434, 441
message, 5107 Mode switch, 46
network, 5114
Modes
number conversion, 583
at powerup, 47
program control, 597
changing, 47
stage, 721
stage programming, 72 Motion control profile, 325
table, 592 Mounting guidelines, 26
timer, counter, and shift register, 530 DIN rail, 29
Integral term, 834 Move instruction, 592
Interrupt Instructions, 5104 Move Memory Cartridge instruction, 591, 593
Interrupt Return Conditional instruction, 5104
Index4
Multiply Binary instruction, 576 Out Immediate instruction, 528
Multiply Double instruction, 568 Out instruction, 513, 552
Multiply instruction, 567 Output Data Instructions, 543
N P
Network Configuration and Connections, 432 Panel layout, 27
Network Diagrams, 432, 433 Part Numbers, 15, 16
Network Instructions, 5114 Password, 410, A8
Network master operation, 441 Pause instruction, 519
Network slave operation, 436 PID Loops
Next instruction, 597 Alarms, process, 853
algorithms, 831
NonFatal Errors, 92 basic operation, 819
Normally Closed Contact, 54 bibliography, 863
cascade control, 851
Not instruction, 514 data configuration, 826
Not Jump instruction, 722 features, 82
Number Conversion Instructions, 583 feed forward control, 847
On/Off control, 849
Numbering Systems, 420 Ramp/Soak generator, 857
Numerical Constant instruction, 5106, 5108 sample rate, 813
scheduling, 813
setup parameters, 86
terminology, 84, 864
O troubleshooting tips, 862
On/Off control, 849 tuning procedure, 838
One shot, 514 PID loops, auto tuning, 838
Or Double instruction, 558 PLC Numbering Systems, 420
Or If Equal instruction, 521 Pop instruction, 553
Or If Not Equal instruction, 521 Position algorithm, 831
Or Immediate instruction, 526 Positive Differential instruction, 514
Or instruction, 510, 557 Power indicator, 96
comparative, 524 Power wiring, 19
Or Negative Differential instruction, 516 Presets, 38
Or Not Immediate instruction, 526 calculating values, 310
starting location, 39
Or Not instruction, 510
comparative, 524 Print Message instruction, 5110
Or Out Immediate instruction, 528 Process control, 817
Or Out instruction, 513 Product Weight Table, E2
Or Positive Diffential instruction, 516 Profiles
home search, 338
Or Store instruction, 512 motion control, 325
Out Double instruction, 552 registration, 330, 335
trapezoidal, 330, 332
Out Formatted instruction, 553
Index5
velocity, 330, 340 corresponding to error codes, 93
Program Control Instructions, 597 Specifications
Program Execution Time, 419 CPU, 43
D005AA, 234
Program Mode, 412 D005AD, 230
Programming, concepts, 112 D005AR, 226
D005DA, 236
Programming Methods, 15 D005DD, 232
examples, 110 D005DDD, 240
Proportional term, 834 D005DR, 228
D005DRD, 238
Discrete option modules, 242
Q environmental, 28
input power, 211
Quick Start, 17 motion profiles, 328
Stage Control / Status Bit Map, 429
Stage Counter instruction, 538, 716
R
Stage instructions, 721
Ramp/soak generator, 857 Stage programming, 112, 72
Read from Network instruction, 5114 convergence, 719
Registration profile, 330, 335 emergency stop, 714
four steps to writing a stage program, 79
Relay wiring, 219 garage door opener example, 710
prolonging contact life, 221 initial stages, 75
Reset Immediate instruction, 529 introduction, 72
jump instruction, 77
Reset instruction, 518 mutually exclusive transitions, 714
Retentive Memory Ranges, 49 parallel processes, 712
Reverse-acting loop, 833 parallel processing concepts, 719
power flow transition, 718
Run Indicator, 97 program organization, 715
Run Mode, 412 questions and answers, 725
stage instruction characteristics, 76
Run time edits, 914 stage view, 718
state transition diagrams, 73
supervisor process, 717
S timer inside stage, 713
Safety guidelines, 22 Standard RLL Programming, 112
Scratchpad memory, 110 Status Indicators, 46, 96
Set Immediate instruction, 529 Store If Equal instruction, 520
Set instruction, 518 Store If Not Equal instruction, 520
Setpoint, 827 Store immediate instruction, 526
Shift Register instruction, 542 Store instruction, 59
comparative, 523
Shift Register Instructions, 530
Store Negative Differential instruction, 515
Shift Right instruction, 580
Store Not Immediate instruction, 526
Shuffle Digits instruction, 590
Store Not instruction, 59
Sinking / sourcing I/O, 215 comparative, 523
Special relays, 38, D2
Index6
Store Positive Differential instruction, 515 Troubleshooting guide
Subroutine Return Conditional instruction, 599 HSIO Mode 20, 324
HSIO Mode 30, 343
Subroutine Return instruction, 599
Subtract Binary instruction, 573, 575
Subtract double instruction, 566 U
Subtract instruction, 565 Up Down Counter instruction, 540
Sum instruction, 578
System design, 111
V
System Vmemory, 426
Vmemory, 426
Velocity algorithm, 831
T Velocity profile, 330, 340
Table Instructions, 592
Technical support, 12
W
Time-proportioning control, 849
Timer Fast instruction, 531 Web site, 12
Timer instruction, 531 Wiring

counter input, 37
Timer Instructions, 530 counter outputs, 37
Timer Status Bit Map, 431 DC inputs, 222
DC Outputs, 223
Trapezoidal profile, 330, 332 drive inputs, 327
Troubleshooting, 92 emergency stop, 23
communications, 97 encoder, 33
electrical noise, 910 fuse protection, 212
error codes, B2 High Speed I/O, 224
I/O points, 98 power input, 19, 210, 211
program debug, 911 pulse output, 327
Informaes sobre programao

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DL05 User Manual

Title: DL05 Micro PLC User Manual

Edition/Rev Date Description of Changes

Chapter 2: Installation, Wiring, and Specifications

System Power Disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

D005DD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233

Chapter 3: High-Speed Input and Pulse Output Features

Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Trapezoidal Profile Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331

Chapter 4: CPU Specifications and Operation

Communication Port Pinout Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Word Memory (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425

Chapter 5: Standard RLL Instructions

Using Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Immediate Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526

And Double (ANDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 556

Reset Watch Dog Timer (RSTWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 595

Chapter 6: Drum Instruction Programming

Drum Instruction Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Chapter 7: RLLPLUS Stage Programming

Power Flow Transition Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 718

Chapter 8: PID Loop Operation

Step 9: Run Process Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 818

Process Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 853

Chapter 9: Maintenance and Troubleshooting

Appendix A: Auxiliary Functions

AUX 41 Show I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4

Appendix B: DL05 Error Codes

Appendix C: Instruction Execution Times

Bit Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C14

Appendix D: Special Relays

Appendix E: DL05 Product Weights

Appendix F: European Union Directives (CE)

DL05 Micro PLC Components

The DL05 Micro PLC family is a versatile

DL05 Discrete Discrete External High-Speed Pulse

I/O Selection Quick Chart

DL05 INPUTS OUTPUTS

Quick Start for PLC Checkout and Programming

Step 1: Unpack the DL05 Equipment

S DL05 Micro PLC

Step 2: Connect Switches to Input Terminals

D005AR, D005AD, D005AA

WARNING: DO NOT wire the

Step 3: Connect the Power Wiring

110/220 VAC Power Input 12/24 VDC Power Input

Step 4: Connect the Programming Device

Use cable part #

(cable comes with HPP)

Step 5: Switch on the System Power

Step 6: Initialize Scratchpad Memory

Step 7: Enter a Ladder Program

C E AUX ENT ENT CLR

E N D Enter the END

Steps to Designing a Successful System

Step 1: Always make safety the first priority in any

Step 2: The PLC is the heart of your automation

Step 3: There are many considerations involved PLC

Step 4: It is important to understand the various AC

Step 5: Before you begin to enter a program, it is

Standard RLL Programming Timer/Event Drum Sequencer Stage Programming

Step 7: Once you have installed the Micro PLC TMR T1

Step 8: Sometimes equipment failures occur