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TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

Very Low Power Consumption

Typical Supply Current

200 A

(Per Amplifier) Wide Common-Mode and Differential Voltage Ranges

Low Input Bias and Offset Currents

Common-Mode Input Voltage Range

Includes V CC+ Output Short-Circuit Protection

High Input Impedance

JFET-Input Stage

Internal Frequency Compensation

Latch-Up-Free Operation

High Slew Rate

3.5 V/ s Typ

TL061, TL061A, TL061B D, JG, P, OR PW PACKAGE (TOP VIEW)

Typ TL061, TL061A, TL061B D, JG, P, OR PW PACKAGE (TOP VIEW) OFFSET N1 IN– IN+

OFFSET N1

IN–

IN+

V CC–

NC

V CC+

OUT

OFFSET N2

TL061

U PACKAGE

NC

OFFSET N1

IN–

IN+

V CC–

NC

NC

V CC+

OUT

OFFSET N2

TL062, TL062A, TL062B D, JG, P, OR PW PACKAGE (TOP VIEW)

1OUT

1IN–

1IN+

V CC–

V CC+

2OUT

2IN–

2IN+

TL062

NC

1OUT

1IN–

1IN+

V CC–

U PACKAGE

NC

V CC+

2OUT

2IN–

2IN+

TL064

D, J, N, PW, OR W PACKAGE

D OR N PACKAGE

4OUT

4IN–

4IN+

V CC–

3IN+

3IN–

3OUT

TL064A, TL064B

1OUT

1IN–

1IN+

V CC+

2IN+

2IN–

2OUT

description

The JFET-input operational amplifiers of the TL06_ series are designed as low-power versions of the TL08_ series amplifiers. They feature high input impedance, wide bandwidth, high slew rate, and low input offset and input bias currents. The TL06_ series feature the same terminal assignments as the TL07_ and TL08_ series. Each of these JFET-input operational amplifiers incorporates well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit.

The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 85°C, and the M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.

NC – No internal connection

of –55 ° C to 125 ° C. NC – No internal connection Please be aware

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

1OUT

V CC+

NC

NC

NC

V CC

2IN+

NC

NC

NC

TL061 FK PACKAGE (TOP VIEW) 3 2 1 20 19 NC NC 4 18 IN–
TL061
FK PACKAGE
(TOP VIEW)
3
2
1
20 19
NC
NC
4
18
IN–
5
17
V CC+
NC
6
16
NC
IN+
7
15
OUT
NC
8
14
NC
9
10 11 12 13
NC – No internal connection
NC
NC
V CC–
OFFSET N1
NC
NC
OFFSET N2
NC
NC
NC

NC

1IN–

NC

1IN+

NC

TL062

FK PACKAGE

(TOP VIEW)

3

2

1

20 19

4 NC

18

17

16

15

14

5 2OUT

6 NC

7 2IN–

10 11 12 13

8 NC

9

AVAILABLE OPTIONS

1IN+

NC

V CC+

NC

2IN+

TL064

FK PACKAGE

(TOP VIEW)

3 2 1 20 19 4 18 5 17 6 16 7 15 8 14
3
2
1
20 19
4
18
5
17
6
16
7
15
8
14
9
10 11 12 13
2IN–
1IN–
2OUT
1OUT
NC
NC
3OUT
4OUT
3IN–
4IN–

4IN+

NC

V CC–

NC

3IN+

     

PACKAGED DEVICES

   

T A

   

V

IO MAX

 

SMALL

SMALL

PLASTIC

 

PLASTIC

     

CHIP FORM

AT 25°C

 

OUTLINE

OUTLINE

   

DIP

DIP

TSSOP

(PW)

 

(Y)

     

(D008) †

(D014) †

(N)

(P)

 
   

15

mV

 

TL061CD

     

TL061CP

TL061CPW

 

TL061Y

 

6

mV

TL061ACD

TL061ACP

   

3

mV

TL061BCD

TL061BCP

0°C

 

15

mV

 

TL062CD

     

TL062CP

TL062CPW

 

TL062Y

to

 

6

mV

TL062ACD

TL062ACP

   

70°C

3

mV

TL062BCD

TL062BCP

 

15

mV

 

TL064CD

 

TL064CN

 

TL064CPW

 

TL064Y

 

6

mV

TL064ACD

TL064ACN

 

3

mV

TL064BCD

TL064BCN

     

PACKAGE

 

T A

V

IO MAX

 

SMALL

 

SMALL

CHIP

 

CERAMIC

 

CERAMIC

PLASTIC

PLASTIC

 

FLAT

 

FLAT

AT 25°C

OUTLINE

OUTLINE

CARRIER

 

DIP

DIP

DIP

 

DIP

PACK

PACK

   

(D008) †

(D014) †

(FK)

(J)

(JG)

(N)

(P)

(U)

(W)

–40°C

                       

to

85°C

 

6

mV

TL061ID

TL062ID TL062ID

 

TL064ID

TL064IN

 

TL061IP

TL062IP TL062IP

–55°C

 

6

mV

   

TL061MFK

     

TL061MJG

   

TL061MU

 

to

6

mV

TL062MFK

TL062MJG

TL062MU

125°C

9

mV

TL064MFK

TL064MJ

TL064MW

† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL061CDR).

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

symbol (each amplifier)

schematic (each amplifier)

IN+

IN–

+ – OFFSET N1 OFFSET N2 Offset Null/Compensation TL061 Only
+
OFFSET N1
OFFSET N2
Offset Null/Compensation
TL061 Only

OUT

V CC+ IN+ 50 IN– 100 C1 OFFSET N1 OFFSET N2 OUT V CC–
V CC+
IN+
50
IN–
100
C1
OFFSET N1
OFFSET N2
OUT
V CC–

TL061 Only

C1 = 10 pF on TL061, TL062, and TL064 Component values shown are nominal.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

TL061Y chip information

This chip, when properly assembled, has characteristics similar to the TL061. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

(5) (4) (6) (3) (7) 41 (1) (2) (8)
(5)
(4)
(6)
(3)
(7)
41
(1)
(2)
(8)

OFFSET N1

IN+

IN–

OFFSET N2

(1) V CC+ (7) (3) + (6) (2) – (4) (5)
(1)
V CC+
(7)
(3)
+
(6)
(2)
(4)
(5)

V CC–

OUT

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum T J (max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (4) is Internally Connected to Backside of Chip.

53

53

53

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

TL062Y chip information

This chip, when properly assembled, has characteristics similar to the TL062. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

66

66

Bonding-Pad Assignments 66 (7) (6) (5) (8) (4) (1) (2) (3) 49 1IN+ 1IN– 2OUT V
(7) (6) (5) (8) (4) (1) (2) (3)
(7)
(6)
(5)
(8)
(4)
(1)
(2)
(3)

49

49

1IN+

1IN–

2OUT

V CC+

(8) (3) + (1) (2) – + (5) (7) (6) – (4)
(8)
(3)
+
(1)
(2)
+ (5)
(7)
(6)
(4)

V CC–

1OUT

2IN+

2IN–

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum T J (max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (4) is Internally Connected to Backside of Chip.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

TL064Y chip information

This chip, when properly assembled, has characteristics similar to the TL064. Thermal compression or ultrasonic bonding can be used on the doped-aluminum bonding pads. The chips can be mounted with conductive epoxy or a gold-silicon preform.

Bonding-Pad Assignments

(13) (9) (12) (11) (10) (14) (8) 60 (1) (7) (2) (3) (4) (5) (6)
(13)
(9)
(12)
(11)
(10)
(14)
(8)
60
(1)
(7)
(2)
(3)
(4)
(5)
(6)
110

1IN+

1IN–

2OUT

4IN+

4IN–

3OUT

V CC+ (4) (3) + (1) 1OUT (2) – + (5) 2IN+ (7) (6) –
V CC+
(4)
(3)
+
(1)
1OUT
(2)
+ (5)
2IN+
(7)
(6)
– 2IN–
(10)
+
(8)
4OUT
(9)
+ (12)
3IN+
(14)
(13)
– 3IN–
(11)

V CC–

Chip Thickness: 15 Mils Typical Bonding Pads: 4 × 4 Mils Minimum T J (max) = 150°C Tolerances Are ±10%. All Dimensions Are in Mils. Pin (11) is Internally Connected to Backside of Chip.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

 

TL06_C

     

TL06_AC

TL06_I

TL06_M

UNIT

TL06_BC

Supply voltage, V CC+ (see Note 1)

18

18

18

 

V

Supply voltage, V CC (see Note 1)

–18

–18

–18

 

V

Differential input voltage, V ID (see Note 2)

±30

±30

±30

 

V

Input voltage, V I (see Notes 1 and 3)

±15

±15

±15

 

V

Duration of output short circuit (see Note 4)

unlimited

unlimited

unlimited

 

Continuous total dissipation

See Dissipation Rating Table

 

Storage temperature range, T stg

–65 to 150

–65 to 150

–65 to 150

°C

Case temperature for 60 seconds

FK package

   

260

°C

p

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds

J,

W

JG, U, or

package

   

300

°

C

 

D,

N, P, or

       

p

Lead temperature 1,6 mm (1/6 inch) from case for 10 seconds

PW package

260

260

°

C

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1.

All voltage values except differential voltages are with respect to the midpoint between V CC+ and V CC .

2.

Differential voltages are at IN+ with respect to IN–.

3.

The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.

4.

The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGE

T A

25°C

DERATING

DERATE ABOVE T A

T A = 70°C POWER RATING

T A = 85°C POWER RATING

T A = 125°C POWER RATING

POWER RATING

FACTOR

D (8 pin)

680

mW

5.8

mW/°C

33°C

465

mW

378

mW

N/A

D (14 pin)

680

mW

7.6

mW/°C

60°C

604

mW

490

mW

N/A

FK

680

mW

11.0

mW/°C

88°C

680

mW

680

mW

273

mW

J

680

mW

11.0

mW/°C

88°C

680

mW

680

mW

273

mW

JG

680

mW

8.4

mW/°C

69°C

672

mW

546

mW

210

mW

N

680

mW

9.2

mW/°C

76°C

680

mW

597

mW

N/A

P

680

mW

8.0

mW/°C

65°C

640

mW

520

mW

N/A

PW (8 pin)

525

mW

4.2

mW/°C

25°C

336

mW

N/A

N/A

PW (14 pin)

700

mW

5.6

mW/°C

25°C

448

mW

N/A

N/A

U

675

mW

5.4

mW/°C

25°C

432

mW

351

mW

135

mW

W

680

mW

8.0

mW/°C

65°C

640

mW

520

mW

200

mW

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

electrical characteristics, V CC± = ±15 V (unless otherwise noted)

     

TL061C

   

TL061AC

 

TL062C

TL062AC

 

PARAMETER

TEST CONDITIONS †

TL064C

TL064AC

UNIT

 

MIN

TYP

MAX

MIN

TYP

MAX

 

V

O = 0,

A = 25°C

T

 

3

15

 

3

6

 

V

IO

p

Input offset voltage

R

S = 50

A = Full range

T

 

20

 

7.5

mV

VIO

Temperature coefficient of input offset voltage

V

O = 0, R S = 50 ,

A = Full range

T

 

10

 

10

°

V/ C

   

A = 25°C

T

 

5

200

 

5

100

pA

I IO

p

Input offset current

V

O = 0

A = Full range

T

 

5

 

3

nA

   

A = 25°C

T

 

30

400

 

30

200

pA

I IB

Input bias current ‡

V

O = 0

       

A = Full range

T

 

10

 

7

nA

 

Common-mode

   

–12

   

–12

   

V

ICR

input voltage range

°

A = 25 C

T

 

±11

to

±11

to

V

   

15

15

 

Maximum peak output

R

L = 10 k ,

T A = 25°C

±10

±13.5

 

±10

±13.5

   

V

OM

voltage swing

 

R

L 10 k ,

T A = Full range

±10

±10

V

 

Large-signal differential

V

O = ± 10 V,

A = 25°C

T

3

6

4

6

 

A

VD

voltage amplification

R

L 10 k

A = Full range

T

3

4

V/mV

B

1

Unity-gain bandwidth

R

L = 10 k ,

T A = 25°C

 

1

 

1

MHz

r i

Input resistance

A = 25°C

T

   

10

12

 

10

12

 

CMRR

Common-mode rejection ratio

V

IC = V ICR min, V O = 0,

70

86

80

86

dB

R

S = 50 ,

T A = 25°C

   

k

SVR

Supply-voltage rejection ratio

V

V

CC = ± 9 V to ± 15 V,

O = 0, R S = 50

70

95

80

95

dB

 

(

V CC± /

V

IO )

,

   

A = 25°C

T

 
 

Total power dissipation (each amplifier)

V

O = 0,

A = 25°C,

T

     

P

D

No load

 

6

7.5

 

6

7.5

mW

I CC

Supply current

V

O = 0,

A = 25°C,

T

 

200

250

 

200

250

A

(each amplifier)

No load

   

V

O1 /V O2

Crosstalk attenuation

A

VD = 100,

T A = 25°C

 

120

   

120

 

dB

† All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for T A is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and –40°C to 85°C for TL06_I. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

electrical characteristics, V CC± = ±15 V (unless otherwise noted)

     

TL061BC

 

TL061I

   

TL062BC

TL062I

 

PARAMETER

TEST CONDITIONS †

TL064BC

TL064I

UNIT

 

MIN

TYP

MAX

MIN

TYP

MAX

 

V

O = 0,

A = 25°C

T

 

2

3

 

3

6

 

V IO

p

Input offset voltage

R

S = 50

A = Full range

T

 

5

 

9

mV

VIO

Temperature coefficient of input offset voltage

V

O = 0, R S = 50 ,

 

10

 

10

V/°C

A = Full range

T

   
   

A = 25°C

T

 

5

100

 

5

100

pA

I IO

p

Input offset current

V

O = 0

A = Full range

T

 

3

 

10

nA

   

A = 25°C

T

 

30

200

 

30

200

pA

I IB

Input bias current ‡

V

O = 0

       

A = Full range

T

 

7

 

20

nA

     

–12

   

–12

   

V ICR

Common-mode input voltage range

A = 25°C

T

±11

to

±11

to

V

 

15

15

 

Maximum peak output voltage swing

R

L = 10 k ,

T A = 25°C

±10

±13.5

 

±10

±13.5

   

V OM

R

L 10 k ,

T A = Full range

±10

±10

V

 

Large-signal differential voltage amplification

V

O = ± 10 V,

A = 25°C

T

4

6

4

6

 

A VD

R

L 10 k

A = Full range

T

4

4

V/mV

B 1

Unity-gain bandwidth

R

L = 10 k ,

T A = 25°C

 

1

 

1

MHz

r i

Input resistance

A = 25°C

T

 

10

12

 

10

12

 

CMRR

Common-mode

V

IC = V ICR min, V O = 0,

80

86

80

86

dB

rejection ratio

 

R

S = 50 ,

T A = 25°C

   

k SVR

Supply-voltage rejection ratio

V

V

CC = ± 9 V to ± 15 V,

O = 0, R S = 50

80

95

80

95

dB

(

V CC± /

V

IO )

,

   

A = 25°C

T

 

Total power dissipation (each amplifier)

V

O = 0,

A = 25°C,

T

     

P D

No load

 

6

7.5

 

6

7.5

mW

I CC

Supply current

V

O = 0,

A = 25°C,

T

 

200

250

 

200

250

A

(each amplifier)

No load

   

V O1 /V O2

Crosstalk attenuation

A

VD = 100,

T A = 25°C

 

120

   

120

 

dB

† All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for T A is 0°C to 70°C for TL06_C, TL06_AC, and TL06_BC and –40°C to 85°C for TL06_I. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

electrical characteristics, V CC± = ±15 V (unless otherwise noted)

     

TL061M

     
 

PARAMETER

TEST CONDITIONS †

TL062M

 

TL064M

 

UNIT

 

MIN

TYP

MAX

MIN

TYP

MAX

 

V

O = 0,

A = 25°C

T

 

3

6

 

3

9

 

V IO

p

Input offset voltage

R

S = 50

A = –55°C to 125°C

T

 

9

 

15

mV

VIO

Temperature coefficient of input offset voltage

V

O = 0, R S = 50 ,

 

10

 

10

V/°C

A = –55°C to 125°C

T

   
   

A = 25°C

T

 

5

100

 

5

100

pA

I IO

Input offset current

V

O = 0

A = –55°C

T

 

20*

 

20*

 
 

A = 125°C

T

 

20

 

20

nA

   

A = 25°C

T

 

30

200

 

30

200

pA

I IB

Input bias current ‡

V

O = 0

A = –55°C

T

 

50*

 

50*

 
 

A = 125°C

T

 

50

 

50

nA

     

–12

   

–12

   

V ICR

Common-mode input voltage range

A = 25°C

T

±11.5

to

±11.5

to

V

 

15

15

 

Maximum peak output voltage swing

R

L = 10 k ,

T A = 25°C

±10

±13.5

 

±10

±13.5

   

V OM

R

L 10 k ,

T A = –55°C to 125°C

±10

±10

V

 

Large-signal differential voltage amplification

V

O = ±10 V,

A = 25°C

T

4

6

4

6

 

A VD

R

L 10 k

A = –55°C to 125°C

T

4

4

V/mV

B 1

Unity-gain bandwidth

R

L = 10 k ,

T A = 25°C

   

MHz

r i

Input resistance

 

A = 25°C

T

 

10

12

 

10

12

 

CMRR

Common-mode

 

V

IC = V ICR min, V O = 0,

80

86

80

86

dB

rejection ratio

R

S = 50 ,

T A = 25°C

   

k SVR

Supply-voltage rejection

V

CC = ±9 V to ±15 V, V O = 0,

80

95

80

95

dB

ratio ( V CC± /

V

IO )

R

S = 50 ,

T A = 25°C

   
 

Total power dissipation (each amplifier)

V

O = 0,

A = 25°C,

T

     

P D

No load

 

6

7.5

 

6

7.5

mW

I CC

Supply current

V

O = 0,

A = 25°C,

T

 

200

250

 

200

250

A

(each amplifier)

 

No load

   

V O1 /V O2

Crosstalk attenuation

A

VD = 100,

T A = 25°C

 

120

   

120

 

dB

* This parameter is not production tested. † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 15. Pulse techniques are used to maintain the junction temperature as close to the ambient temperature as possible.

operating characteristics, V CC± = ±15 V, T A = 25°C

 

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SR

Slew rate at unity gain (see Note 5)

V I = 10 V, C L = 100 pF,

R L = 10 k , See Figure 1

2

3.5

V/ s

t r

Rise time

V I = 20 V, C L = 100 pF,

R L = 10 k , See Figure 1

 

0.2

 
 

Overshoot factor

 

10%

s

V n

Equivalent input noise voltage

R S = 20

,

f = 1 kHz

 

42

nV/Hz

NOTE 5:

Slew rate at –55°C to 125°C is 0.7 V/ s min.

TL061, TL061A, TL061B, TL061Y, TL062, TL062A TL062B, TL062Y, TL064, TL064A, TL064B, TL064Y LOW-POWER JFET-INPUT OPERATIONAL AMPLIFIERS

SLOS078F – NOVEMBER 1978 – REVISED JANUARY 1999

electrical characteristics, V CC± = ±15 V, T A = 25°C (unless otherwise noted)

     

TL061Y

   

TL062Y

 

PARAMETER

 

TEST CONDITIONS †

TL064Y

UNIT

   

MIN

TYP

MAX

V

IO

Input offset voltage

V

O = 0,

R S = 50

 

3

15

mV

VIO

Temperature coefficient of input offset voltage

V

O = 0,

R S = 50

 

10

V/°C

I IO

Input offset current

V

O = 0

   

5

200

pA

I IB

Input bias current ‡

V

O = 0

   

30

400

pA

     

–12

   

V

ICR

Common-mode input voltage range

 

±11

to

V

 

15

V

OM

Maximum peak output voltage swing

 

R

L

= 10 k

±10

±13.5

 

V

A

VD

Large-signal differential voltage amplification

V

O = ±10 V,

R L 2 k

3

6

V/mV

B

1

Unity-gain bandwidth

R

L

= 10 k

 

1

MHz

r i

Input resistance

   

10

12

 

CMRR

Common-mode rejection ratio

 

V

IC = V ICR min,

V O = 0,

 

dB

R

S = 50

70

86

k

SVR

pp

Supply voltage rejection ratio ( V CC± /

 

V

IO )

V

R

CC = ±9 V to ±15 V,

S = 50

V O = 0,

70

95

dB

P

D

Total power dissipation (each amplifier)

 

V

O = 0,

No load

 

6

7.5

mW

I CC

Supply current (per amplifier)

V

O = 0,

No load

 

200

250

A

V

O1 /V O2

Crosstalk attenuation

A

VD = 100

   

120

 

dB