Specifications - PCI-SIG

16.10.
2017 Specifications | PCI-SIG
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Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

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OCuLink BP Type ECN (https://pcisig.com/sites/default/ les/speci cation_documents/D-ECN_OCuLink_BP-Type.pdf) 1.x

The backplane type (BP Type) signal was incompletely...view more
OCuLink Wiring Chart ECN (https://pcisig.com/sites/default/ les/speci cation_documents/D-ECN_WiringChart.pdf) 1.x

a....view more
PCI Express Base Speci cation Revision 4.0, Version 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/10912?downloadRevision=active) 4.x
This speci cation describes the PCI Express archit...view more
PCI Express Base Speci cation Revision 4.0, Version 1.0 (Change Bar) (https://members.pcisig.com/wg/PCI-SIG/document/10916?downloadRevision=active) 4.x
Native PCIe Enclosure Management ECN 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Native_PCIe_Enclosure_Management_v10August2017.pdf)
De nes mechanisms for simple storage enclosure mana...view more
Expansion ROM Validation ECN (https://pcisig.com/sites/default/ les/speci cation_documents/Expansion%20ROM%20Validation%20ECN.pdf) 3.x

Provide an optional mechanism to indicate to softwar...view more
OCuLink CPRSNT# Notice ECN (https://pcisig.com/sites/default/ les/speci cation_documents/OCuLink%20CPRSNT%23%20Notice%20ECN.pdf) 1.x

The cable presence (CPRSNT#) signal was incompletely...view more
PCIe CEM Thermal Reporting ECN (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe%20CEM%20Thermal%20Reporting%20ECN.pdf) 3.x

This ECN speci es changes to the PCI Local Bus Spec...view more
PCI Code and ID Assignment Speci cation Revision 1.9 (https://members.pcisig.com/wg/PCI-SIG/document/10451?downloadRevision=active) 1.x
This speci cation contains the Class Code and Capab...view more
Hierarchy ID Message ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Hierarchy_ID-2017-02-23-clean.pdf) 3.x

De nes a new, optional PCI-SIG De ned Type 1 Vendo...view more
Enable PCIe and USB 3.1 Gen1 on M.2 Card Key B ECN (https://pcisig.com/sites/default/ les/speci cation_documents/QTI_ECN-PCIe_USB-3.1_Gen1__2-10-2017.pdf) 1.x
M.2 Key B (WWAN) is modi ed to enable PCIe and USB ...view more
https://pcisig.com/specifications/pciexpress/specifications/ECN_Atomic_Ops_080417.pdf 1/12
16.10.2017 Specifications | PCI-SIG

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Flattening Portal Bridge (FPB) ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_FPB_9_Feb_2017.pdf) 3.x

This ECR is intended to address a class of issues wi...view more
PCIe BGA SSD 11.5x13 ECN (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_BGASSD_11.5x13_ECN_R12g.pdf) 1.x

This proposal adds a new 11.5 mm x 13 mm PCIe BGA SS...view more
OCuLink Skew (https://pcisig.com/sites/default/ les/speci cation_documents/OCuLink_Skew_D-ECN_Final2.pdf) 1.x

A PCI Express Receiver is required to tolerate 6 ns ...view more
PCI Express M.2 Speci cation Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/10029) 1.x

The M.2 form factor is intended for Mobile Adapters....view more
PCI Express M.2 Speci cation Revision 1.1 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/10030) 1.x
The M.2 form factor is intended for Mobile Adapters....view more
PCI Express Mini Card Electromechanical Speci cation Revision 2.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/10031) 2.x
This speci cation de nes an implementation for sma...view more
PCI Express Mini Card Electromechanical Speci cation Revision 2.1 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/10032) 2.x
OCuLink Memory Map Change (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-OCuLink%20MemoryMap.pdf) 1.x

This is a modi cation of the cable assembly memory ...view more
OCuLink Server Change (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Server_Change.pdf) 1.x

Table 6-12 and Table 6-13 in Section 6.9 are modi e...view more
Errata for the PCI Express OCuLink Speci cation Revision 1.0 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_OCuLink_r1_Errata_2016-05- 1.x
27.pdf)
PCI Code and ID Assignment Speci cation Revision 1.8 (https://members.pcisig.com/wg/PCI-SIG/document/download/9815) 1.x
PCI Code and ID Assignment Speci cation Revision 1.8 (Change Bar) (https://members.pcisig.com/wg/PCI-SIG/document/download/9814) 1.x
VF Resizable BARs ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-VF-Resizable-BARs_6-July-2016.pdf) 3.x

Similar to, and based on, the Resizable BAR and Expa...view more
SR-IOV Table Updates ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_SR-IOV_Table_Updates_16-June-2016.pdf) 3.x

Update SR-IOV speci cation to re ect current PCI C...view more
Extended Message Data for MSI ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN%20EMD%20for%20MSI%202016-05-10.pdf) 3.x
MSI is enhanced to include an Extended Message Data ...view more
Expanded Resizable BARs ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN%20Expanded%20Resizable%20BARs%202016-04- 3.x

18%20clean.pdf)
The Resizable BAR capability currently allows BARs o...view more
Errata for the PCI Express Base Speci cation Revision 3.1, Single Root I/O Virtualization and Sharing Revision 1.1, Address Translation and Sharing Revision 1.1, and 3.x
M.2 Speci cation Revision 1.0 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_Base_r3%201_Errata_2015-09-18_clean.pdf)
M.2 SSIC Eye Limits De nition ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-ECNform_M.2_Spec_SSIC_EyeSpec_Dec-02-2015.pdf) 3.x
De nition of electrical eye limits (Eye Height and ...view more

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Root Complex Integrated Endpoints and IOV Updates 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN__Integrated_Endpoints_and_IOV_updates__19%20Nov%202015_Final.pdf)
This ECNimplements a variety of spec modi cations ...view more
PCI Express Base Speci cation Revision 3.1a with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8273) 3.x
PCI Express Base Speci cation Revision 3.1a (https://members.pcisig.com/wg/PCI-SIG/document/download/8257) 3.x

Emergency Power Reduction Mechanism with PWRBRK Signal ECN 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/Emergency%20Power%20Reduction%20Mechanism%20with%20PWRBRK%20Signal%20ECN.pdf)
This ECNde nes two sets of related changes to supp...view more
Supporting PCIe and SATA BGA form factor for SSDs ECN (https://pcisig.com/sites/default/ les/speci cation_documents/BGA_SSD_ECN.pdf) 1.x
This ECN is intended to de ne a new form-factor and...view more
PCI Express OCuLink Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/9036) 1.x

This document is a companion Speci cation to the PC...view more
Designated Vendor-Speci c Extended Capability ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_DVSEC-2015-08-04-clean_0.pdf) 3.x

De ne a Vendor-Speci c Extended Capability that is...view more
PCI Code and ID Assignment Speci cation Revision 1.7 (https://members.pcisig.com/wg/PCI-SIG/document/8868) 1.x
PCI Code and ID Assignment Speci cation Revision 1.7 with change bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8867) 1.x
WWAN Key C De nition (https://pcisig.com/sites/default/ les/speci cation_documents/5_WWAN_Key_C_De nition_ECN_WW12.3_Final.pdf) 1.x

This ECR describes the necessary changes to enable a...view more
PCI Code and Assignment Speci cation Revision 1.6 (https://members.pcisig.com/wg/PCI-SIG/document/download/8278) 1.x
PCI Code and Assignment Speci cation Revision 1.6 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8288) 1.x
M.2 2242 WWAN Module (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-M.2_2242_for_WWAN.pdf) 1.x

Add 2242 form factor for WWAN modules using Socket 2...view more
Errata for the PCI Express Base Speci cation Revision 3.0 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_Base_r3_0_Errata_2014-10- 3.x
23_clean.pdf)
Power-up requirements for PCIe side bands in a Vbat powered system 1.x
(https://pcisig.com/sites/default/ les/speci cation_documents/MiniEx_M2_ECN_Vbat_PERST_CLKREQ_Power-up-Reqts_20141020.pdf)
In ECN Power-up requirements for PCIe side bands (P...view more
Tx Blanking and SYSCLK on Socket 1 Related Pinouts (https://pcisig.com/sites/default/ les/speci cation_documents/ECR- 1.x
ECNform_Tx_Blanking_and_SYSCLK_on_Socket1_Key_E_Pinout_2014_10_19.pdf)
The proposed change is to include 2 GNSS Aiding sign...view more
M.2 COEX Signal De nition - UART (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-ECNform_M.2_Spec_COEX_Pin_De nition-UART_19-Oct- 1.x
2014.pdf)
De nition of two of the three COEX pins as a UART T...view more

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Transition of NFC Signals from 3.3V to 1.8V (https://pcisig.com/sites/default/ les/speci cation_documents/ECR- 1.x
ECNform_Transition_of_NFC_Signals_from_3.3V_to_1.8V_2014_10_19.pdf)
The proposed change is to change the current voltage...view more
Extension Devices (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Retimer_6_Oct_2014_NCB.pdf) 3.x

Provide speci cation for Physical Layer protocol aw...view more
Power-up requirements for PCIe side bands (PERST#, etc.) (https://pcisig.com/sites/default/ les/speci cation_documents/MiniEx_M2_ECR_PERST_CLKREQ_Power- 1.x
up-Reqts_20140918_Final.pdf)
Section 3.1.3.2.1 is rede ned to provide a more rea...view more
M.2 Signal De nition Audio & ANTCTL Functions (https://pcisig.com/sites/default/ les/speci cation_documents/ECR- 1.x
ECNform_M.2_Spec_Audio_ANTCTL_Pin_De nition_Functions_Comment_Final.pdf)
De nition of the four Audio pins to provide de nit...view more
SMBus interface for SSD Socket 2 and Socket 3 1.x

(https://pcisig.com/sites/default/ les/speci cation_documents/4_SMBus_interface_for_SSD_Socket_2_and_Socket_3.pdf)
SMBus interface signals are included in sections 3.2...view more
Add USB 3.0 to the Mini Card (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-USB_3_Mini_Card_2014_8_08_14_Final.pdf) 2.x
Mobile broadband peak data rates continue to increas...view more
NOP DLLP (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_NOP_DLLP-2014-06-11_clean.pdf) 3.x

This ECN accomplishes two housekeeping tasks associa...view more
Separate Refclk Independent SSC Architecture (SRIS) JTOL and SSC Pro le Requirements (https://pcisig.com/sites/default/ les/speci cation_documents/D- 3.x
ECN___SRIS_JTOL_SSC__31_March_14_NCB.pdf)
Modi es speci cations to provide revised JTOL curv...view more
Tighten Mini Card Power Rail Voltage Tolerance (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-VAUX_Mini_Card_2014_03_12_Final.pdf) 2.x
Modify the Mini Card speci cation to tighten the po...view more
PLL Bandwidth Test Limits (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_PLL_Test_Limits_10_March_2014.pdf) 3.x

Modi es the limits used by the PLL bandwidth test t...view more
PCI Express M.2 Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8248) 1.x

The M.2 form factor is used for Mobile Add-In cards....view more
Readiness Noti cations (RN) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_RN_29_Aug_2013.pdf) 3.x

De nes mechanisms to reduce the time software need...view more

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PCI Express Card Electromechanical Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8250) 3.x
This speci cation is a companion for the PCI Expres...view more
PCI Express Architecture Platform Init/Con g Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8239) 3.x

This test speci cation primarily covers tests of PC...view more
PCI Express Architecture PHY Test Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8287) 3.x
This document provides test descriptions for PCI Exp...view more
PCI Express Architecture Con guration Space Test Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8284) 3.x
This document primarily covers PCI Express testing o...view more
PCI Express Architecture Link Layer and Transaction Layer Test Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8277) 3.x
This test speci cation primarily covers testing of ...view more
L1 PM Substates with CLKREQ, Revision 1.0a 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_L1_PM_Substates_with_CLKREQ_31_May_2013_Rev10a.pdf)
This ECR de nes an optional mechanism, that establ...view more
M-PCIe (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_M-PCIe_22_May_2013.pdf) 3.x

This ECR de nes a new logical layer mapping of PCI ...view more
Precision Time Measurement (PTM), Revision 1.0a (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_PTM_Revision1a_31_Mar_2013.pdf) 3.x
De nes an optional-normative Precision Time Measure...view more
Separate Refclk Independent SSC Architecture (SRIS) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_SRIS_2012_10_Jan_2013.pdf) 3.x
Provide speci cations to enable separate Refclk wit...view more
Seasim Software Package (https://members.pcisig.com/wg/PCI-SIG/document/download/8759) 3.x

The PCI Express 3.0 describes a method to simulate 8...view more
Change Root Complex Event Collector Class Code (https://pcisig.com/sites/default/ les/speci cation_documents/ECN- 3.x
Change_Root_Complex_Event_Collector_Class_Code_2012-12-13.pdf)
Change the Sub-Class assignment for Root Complex Eve...view more
Enhanced DPC (eDPC) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Enhanced_DPC_2012-11-19_ nal.pdf) 3.x

This optional normative ECN de nes enhancements to ...view more
PCI Express Architecture Con guration Space Test Speci cation Revision 2.0a (https://members.pcisig.com/wg/PCI-SIG/document/download/8262) 2.x
PCI Express Architecture Con guration Space Test Speci cation Revision 2.0a with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8291) 2.x
PCI Express Architecture PHY Test Speci cation Revision 2.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8245) 2.x
This document provides test descriptions for PCI Exp...view more
PCI Express Architecture Link Layer Test Speci cation Revision 2.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8267) 2.x
This test speci cation primarily covers testing of ...view more

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PCI Express External Cabling Speci cation Revision 2.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8254) 2.x
This is a companion speci cation to the PCI Express...view more
PCI Express External Cabling Speci cation Revision 2.0 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8263) 2.x
Combined Antenna Tuning/Coexistence Signal ECR (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe-MiniCEM-Combined-Antenna-Tuning- 2.x

Coexistence-Signals-ECN_May_31_2012.pdf)
Modify the PCI Express Mini Card speci cation to de...view more
Downstream Port Containment (DPC) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_DPC_2012-02-09_ nalized.pdf) 3.x

This ECN de nes a new error containment mechanism f...view more
Lightweight Noti cation (LN) Protocol (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_LN_Protocol_2011-10-06.pdf) 3.x

This optional normative ECN de nes a simple protoco...view more
8.0 GT/s Receiver Impedance (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-8G_Receiver_Impedance_26May2011.pdf) 3.x

Receivers that operate at 8.0 GT/s with an impedance...view more
PASID Translation (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-PASID-ATS-2011-03-31.pdf) 1.x

The Process Address Space ID (PASID) ECN to the Base...view more
Process Address Space ID (PASID) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-PASID-Base-2011-03-31.pdf) 1.x

This optional normative ECN de nes an End-End TLP P...view more
Errata for the PCI Express Base Speci cation Revision 2.1 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_Base_r2201_Errata_18Nov10.pdf) 2.x
PCI Express Base Speci cation Revision 3.0 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8269) 3.x
PCI Express Base Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8265) 3.x


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REF CLK Delayed from CLKREQ# Assertion (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-REF_CLK_Delayed_from_CLKREQ_Assertion_- 1.x
_20100630.pdf)
This ECR requests making a change to the CLKREQ# ass...view more
Protocol Multiplexing (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Protocol_Multiplexing-2010-06-17.pdf) 3.x

This involves a minor upward compatible change in Ch...view more
End-End TLP Pre x Changes for RCs (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_EE_TLP_Pre x_Changes_26May2010.pdf) 3.x
This change allows for all Root Ports with the End-...view more
Second Wireless Disable Pin (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Second20Wireless20Disable20-2020100510.pdf) 1.x

This ECN is for the functional addition of a second ...view more
Single Root I/O Virtualization and Sharing Speci cation Revision 1.1 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8251) 1.x
The purpose of this document is to specify PCI I/O ...view more
Single Root I/O Virtualization and Sharing Speci cation Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/8238) 1.x
CEM Support Power (https://pcisig.com/sites/default/ les/speci cation_documents/ECR_CEM_Power_2009-9-09_2_.pdf) 2.x

ECR covers proposed modi cation of Section 4.2 Pow...view more
ASPM Optionality (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_ASPM_Optionality_2009-08-20.pdf) 2.x

Prior to this ECN, all PCIe external Links were requ...view more
Optimized Bu er Flush/Fill (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_OBFF_30apr09.pdf) 2.x

This ECR proposes to add a new mechanism for platfor...view more
PCI Express Base Speci cation Revision 2.1 (https://members.pcisig.com/wg/PCI-SIG/document/9307) 2.x

Errata for the PCI Express Base Speci cation Revision 2.0 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_Base_r2.0_Errata_27Feb09.pdf) 2.x
Address Translation Services Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/8255) 1.x

This speci cation describes the extensions required...view more
TLP Pre x (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_TLP_Pre x_2008-12-15.pdf) 2.x

Emerging usage model trends indicate a requirement f...view more
System Board Eye Height Speci cation Update (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-ECN_System_Eye_Height.pdf) 2.x
This ECN modi es the system board transmitter path ...view more
TLP Processing Hints (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_TPH_11Sept08.pdf) 2.x

This optional normative ECR de nes a mechanism by w...view more
Extended Tag Enable Default (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Extended_Tag_Enable_Default_05Sept2008_ nal.pdf) 2.x

The change allows a Function to use Extended Tag e...view more
PCI Express Architecture Con guration Space Test Speci cation Revision 2.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8282) 2.x

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Latency Tolerance Reporting (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_LatencyTolnReporting_14Aug08.pdf) 2.x

This ECR proposes to add a new mechanism for Endpoin...view more
PCI Express Architecture Transaction Layer Test Speci cation Revision 2.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8266) 2.x
This document contains a list of Test Assertions and...view more
ID-Based Ordering (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_ID-Based-Ordering_29may08.pdf) 2.x

This ECN proposes to add a new ordering attribute wh...view more
Dynamic Power Allocation (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Dynamic-Power-Allocation_24May08.pdf) 2.x

DPA (Dynamic Power Allocation) extends existing PCIe...view more
Multi-Root I/O Virtualization and Sharing Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8280) 1.x
Multicast (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Multicast_2008-05-08.pdf) 2.x

This optional normative ECN adds Multicast functiona...view more
Internal Error Reporting (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Internal-Error-Reporting_24Apr08.pdf) 2.x

PCI Express (PCIe) de nes error signaling and loggi...view more
Resizable BAR Capability (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Resizable-BAR_24Apr2008.pdf) 2.x

This optional ECN adds a capability for Functions wi...view more
Atomic Operations (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Atomic_Ops_080417.pdf) 2.x

This optional normative ECN de nes 3 new PCIe trans...view more
PCI Express 225 W/300 W High Power Card Electromechanical Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8276) 1.x
The main objective of this speci cation is to suppo...view more
Address Translation Services 1.0 Speci cation Errata (https://pcisig.com/sites/default/ les/speci cation_documents/ATS_Errata_1_0-11302007.pdf) 1.x
Single Root I/O Virtualization and Sharing Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8272) 1.x
Alternative Routing-ID Interpretation (ARI) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-alt-rid-interpretation-070604.pdf) 2.x

For virtualized and non-virtualized environments, a ...view more
PCI Express Card Electromechanical Speci cation Revision 2.0 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8279) 2.x
Address Translation Services Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8264) 1.x

This speci cation describes the extensions required...view more
Errata for the PCI Express Base Speci cation Revision 1.1 (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_Base_Spec_11_Errata_8feb07a.pdf) 1.x

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PCI Express External Cabling Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8243) 1.x

PCI Express Card Electromechanical Speci cation Revision 1.1 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8281) 1.x

This speci cation describes the PCI Express archite...view more
This speci cation describes the PCI Express archite...view more
PCI Express ExpressModule Electromechanical Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8252) 1.x
This document is a companion speci cation to the PC...view more
PCI Express x16 Graphics 150W-ATX Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8249) 1.x
The objectives of this speci cation are Support for...view more
PCI Express Architecture Mobile Graphics Low-Power Addendum to the PCI Express Base Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI- 1.x
SIG/document/download/8240)
This addendum to the PCI Express Base 1.0a describes...view more
PCI Express to PCI/PCI-X Bridge Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8259) 1.x
This speci cation describes the PCI Express to PCI/...view more
Tech

(/speci cations/pciexpress/speci c
&&&speclib=&order= eld_revision&
PCI Firmware Speci cation Revision 3.2 (https://members.pcisig.com/wg/PCI-SIG/document/download/8232) 3.x

This document describes the hardware independent r...view more
Enhanced Allocation (EA) for Memory and I/O Resources 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Enhanced_Allocation_23_Oct_2014_Final.pdf)
Enhanced Allocation is an optional Conventional PCI ...view more
ACPI Additions for FW Latency Optimizations 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_fw_latency_optimization_ nal.pdf)
This ECR provides two additional ACPI DSM functions ...view more
PCIe Hot Plug (https://pcisig.com/sites/default/ les/speci cation_documents/ecn_hot_plug_ nal.pdf) 3.x

This ECN a ects the PCI Firmware Speci cation v3.1...view more
UEFI Related Updates (https://pcisig.com/sites/default/ les/speci cation_documents/ecn-UEFI_Updates112113.pdf) 3.x

Update the references to the latest UEFI Speci cati...view more

Changing Class Code for In niBand Adapter (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_subclass_IB.pdf) 3.x
This ECN updates the subclass ID description in the ...view more

Class Code & Capability ID Extraction 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_ClassCodeCapID_Extraction_2010-04-28.pdf)
This ECN extracts the Class Code de nitions from Ap...view more
PCIe Device Labeling under Operating Systems (https://pcisig.com/sites/default/ les/speci cation_documents/ECR_Slot_Naming- 3.x
10.pdf)
This ECR proposes a mechanism (new extension to _DSM...view more
ACPI Additions for ASPM, OBFF, LTR ECNs 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECR_fw_acpi_base_ECNs_01Feb10.pdf)
A number of PCIe base speci cations ECNs have been ...view more
Update DMTF SM CLP Speci cation References 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Update_SM_CLP_references_in_PCI_Firmware_Spec.-11_09_2009-
v9.pdf)
This update references to sections in the DMTF Serve...view more
UEFI PCI Services Update (https://pcisig.com/sites/default/ les/speci cation_documents/ecn_closed_review- 3.x

Update_EFI_Services_Chapter_in_Firmware_Spec-09_28_2009-v2.pdf)
This is a request to update the UEFI PCI Services....view more
Unoccupied Slot Power Hand-o State Clari cation 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/PCI_FW_Slot_Power_ECN_website.pdf)
This ECN allows the unoccupied slots' power to be of...view more
PCI Option ROM CLP (https://pcisig.com/sites/default/ les/speci cation_documents/PCIFW30_CLP_1_0_071906.pdf) 3.x

This ECN recti es the di erences between the DMTF ...view more
Advanced Capabilities for Conventional PCI 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Conventional_Adv_Caps_27Jul06.pdf)
For conventional PCI devices integrated into a PCI E...view more
Errata for PCI 3.0 (https://pcisig.com/sites/default/ les/speci cation_documents/PCI_3_0Errata_3-18-05.pdf) 3.x
PCI_OSC Clari cations (https://pcisig.com/sites/default/ les/speci cation_documents/PCIFW30ECR_OSC_080906_website.pdf) 3.x

This ECN attempts to make clari cations such that t...view more
Ignore PCI Boot Con guration_DSM Function (https://pcisig.com/sites/default/ les/speci cation_documents/ECR-Ignorebootcon g- 3.x
nal.pdf)
This ECN adds a function to the _DSM De nitions for...view more

Interrupt Line Register Usage (https://pcisig.com/sites/default/ les/speci cation_documents/ECN- 1.x

Interrupt_Line_Register_Usage_061605.pdf)
This ECN is a request for modi cations to the parag...view more

Generic Capability Structure for SATA Host Bus Adapters 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/SATA_CAP_Ptr_ECN_-_ nal.pdf)
The functional changes proposed involve the de niti...view more
PCI Bus Power Management Interface Speci cation Revision 1.2 (https://members.pcisig.com/wg/PCI-SIG/document/download/8230) 1.x
The goal of this speci cation is to establish a sta...view more
PCI Local Bus Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8237) 3.x

This document contains the formal speci cations of ...view more
PCI Local Bus Speci cation Revision 3.0 with Change Bar (https://members.pcisig.com/wg/PCI-SIG/document/download/8231) 3.x
Errata for PCI 2.3 (https://pcisig.com/sites/default/ les/speci cation_documents/PCI_2_3_Errata_9_08_03.pdf) 2.x
SATA Class Code ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_SATA_Class_Code.pdf) 3.x

Create a new class code for SerialATA host-based ada...view more
MSI-X (https://pcisig.com/sites/default/ les/speci cation_documents/msi-x_ecn.pdf) 2.x

Extend the current MSI functionality to support a la...view more
MSI-X (https://pcisig.com/sites/default/ les/speci cation_documents/msi-x_ecn_0.pdf) 3.x

Extend the current MSI functionality to support a la...view more
PCI-to-PCI Bridge Architecture Speci cation Revision 1.2 (https://members.pcisig.com/wg/PCI-SIG/document/download/8226) 1.x

This speci cation de nes the behavior of a complia...view more
PCI-to-PCI Bridge Architecture Speci cation Revision 1.2 with Change Bar (https://members.pcisig.com/wg/PCI- 1.x
This speci cation de nes the behavior of a complia...view more
SHPC Memory Access Granularity 1.x

(https://pcisig.com/sites/default/ les/speci cation_documents/SHPC_Memory_Access_Granularity_ECN.pdf)
Restrict PCI Standard Hot-Plug (SHPC) device drivers...view more
SHPC Extensions for PCI-X 2.0 (https://pcisig.com/sites/default/ les/speci cation_documents/ecn_shpc_pcix20.pdf) 1.x

Changes are to the PCI Standard Hot-Plug Controller ...view more
PCI/PCI-X Connector Contact Finish Changes 2.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_PCI_Connector_Finish.pdf)
The intent of this ECR is to update the PCI base spe...view more
PCI/PCI-X Connector Contact Finish Changes 3.x

(https://pcisig.com/sites/default/ les/speci cation_documents/ECN_PCI_Connector_Finish_0.pdf)
The intent of this ECR is to update the PCI base spe...view more
PCI Local Bus Speci cation Revision 2.3 (https://members.pcisig.com/wg/PCI-SIG/document/download/8233) 2.x

PCI Hot-Plug Speci cation Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/8227) 1.x

The primary objective of this speci cation is to en...view more
PCI Standard Hot-Plug Controller and Subsystem Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI- 1.x
The primary purpose of this document is to specify a...view more

Mini PCI Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8234) 1.x

The Mini PCI Speci cation de nes an alternate impl...view more
PCI Bios Speci cation Revision 2.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/8224) 2.x

This document describes the software interface prese...view more
Copyright 2017 PCI-SIG. All rights reserved. View our privacy policy (/pci-sig-online-privacy-policy). Contact Us (/membership/contact-us).

Specifications - PCI-SIG

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Specifications - PCI-SIG

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16.10.

2017 Specifications | PCI-SIG

Speci cations Library (/speci cations)

Review Zone (/speci cations/review-zone)

Ordering Information (/speci cations/order-form)

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

OCuLink BP Type ECN (https://pcisig.com/sites/default/ les/speci cation_documents/D-ECN_OCuLink_BP-Type.pdf) 1.x

OCuLink Wiring Chart ECN (https://pcisig.com/sites/default/ les/speci cation_documents/D-ECN_WiringChart.pdf) 1.x

Native PCIe Enclosure Management ECN 3.x

Expansion ROM Validation ECN (https://pcisig.com/sites/default/ les/speci cation_documents/Expansion%20ROM%20Validation%20ECN.pdf) 3.x

OCuLink CPRSNT# Notice ECN (https://pcisig.com/sites/default/ les/speci cation_documents/OCuLink%20CPRSNT%23%20Notice%20ECN.pdf) 1.x

PCIe CEM Thermal Reporting ECN (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe%20CEM%20Thermal%20Reporting%20ECN.pdf) 3.x

Hierarchy ID Message ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Hierarchy_ID-2017-02-23-clean.pdf) 3.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

Flattening Portal Bridge (FPB) ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_FPB_9_Feb_2017.pdf) 3.x

PCIe BGA SSD 11.5x13 ECN (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe_BGASSD_11.5x13_ECN_R12g.pdf) 1.x

OCuLink Skew (https://pcisig.com/sites/default/ les/speci cation_documents/OCuLink_Skew_D-ECN_Final2.pdf) 1.x

PCI Express M.2 Speci cation Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/10029) 1.x

OCuLink Memory Map Change (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-OCuLink%20MemoryMap.pdf) 1.x

OCuLink Server Change (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Server_Change.pdf) 1.x

VF Resizable BARs ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-VF-Resizable-BARs_6-July-2016.pdf) 3.x

SR-IOV Table Updates ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_SR-IOV_Table_Updates_16-June-2016.pdf) 3.x

Expanded Resizable BARs ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN%20Expanded%20Resizable%20BARs%202016-04- 3.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

Root Complex Integrated Endpoints and IOV Updates 3.x

PCI Express Base Speci cation Revision 3.1a (https://members.pcisig.com/wg/PCI-SIG/document/download/8257) 3.x

Emergency Power Reduction Mechanism with PWRBRK Signal ECN 3.x

PCI Express OCuLink Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/9036) 1.x

Designated Vendor-Speci c Extended Capability ECN (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_DVSEC-2015-08-04-clean_0.pdf) 3.x

WWAN Key C De nition (https://pcisig.com/sites/default/ les/speci cation_documents/5_WWAN_Key_C_De nition_ECN_WW12.3_Final.pdf) 1.x

M.2 2242 WWAN Module (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-M.2_2242_for_WWAN.pdf) 1.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

Extension Devices (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Retimer_6_Oct_2014_NCB.pdf) 3.x

SMBus interface for SSD Socket 2 and Socket 3 1.x

NOP DLLP (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_NOP_DLLP-2014-06-11_clean.pdf) 3.x

PLL Bandwidth Test Limits (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_PLL_Test_Limits_10_March_2014.pdf) 3.x

PCI Express M.2 Speci cation Revision 1.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8248) 1.x

Readiness Noti cations (RN) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_RN_29_Aug_2013.pdf) 3.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

PCI Express Architecture Platform Init/Con g Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8239) 3.x

L1 PM Substates with CLKREQ, Revision 1.0a 3.x

M-PCIe (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_M-PCIe_22_May_2013.pdf) 3.x

Seasim Software Package (https://members.pcisig.com/wg/PCI-SIG/document/download/8759) 3.x

Enhanced DPC (eDPC) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Enhanced_DPC_2012-11-19_ nal.pdf) 3.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

Combined Antenna Tuning/Coexistence Signal ECR (https://pcisig.com/sites/default/ les/speci cation_documents/PCIe-MiniCEM-Combined-Antenna-Tuning- 2.x

Downstream Port Containment (DPC) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_DPC_2012-02-09_ nalized.pdf) 3.x

Lightweight Noti cation (LN) Protocol (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_LN_Protocol_2011-10-06.pdf) 3.x

8.0 GT/s Receiver Impedance (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-8G_Receiver_Impedance_26May2011.pdf) 3.x

PASID Translation (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-PASID-ATS-2011-03-31.pdf) 1.x

Process Address Space ID (PASID) (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-PASID-Base-2011-03-31.pdf) 1.x

PCI Express Base Speci cation Revision 3.0 (https://members.pcisig.com/wg/PCI-SIG/document/download/8265) 3.x

Speci cation Title (/speci cations/pciexpress/speci cations/ECN_Atomic_Ops_080417.pdf?&&&speclib=&order=title&sort=asc) Spec Rev

Protocol Multiplexing (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Protocol_Multiplexing-2010-06-17.pdf) 3.x

Second Wireless Disable Pin (https://pcisig.com/sites/default/ les/speci cation_documents/ECN-Second20Wireless20Disable20-2020100510.pdf) 1.x

CEM Support Power (https://pcisig.com/sites/default/ les/speci cation_documents/ECR_CEM_Power_2009-9-09_2_.pdf) 2.x

ASPM Optionality (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_ASPM_Optionality_2009-08-20.pdf) 2.x

Optimized Bu er Flush/Fill (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_OBFF_30apr09.pdf) 2.x

PCI Express Base Speci cation Revision 2.1 (https://members.pcisig.com/wg/PCI-SIG/document/9307) 2.x

Address Translation Services Revision 1.1 (https://members.pcisig.com/wg/PCI-SIG/document/download/8255) 1.x

TLP Pre x (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_TLP_Pre x_2008-12-15.pdf) 2.x

TLP Processing Hints (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_TPH_11Sept08.pdf) 2.x

Extended Tag Enable Default (https://pcisig.com/sites/default/ les/speci cation_documents/ECN_Extended_Tag_Enable_Default_05Sept2008_ nal.pdf) 2.x