FLIP-FLOP

A. Tujuan.
1. For R-S Flip-Flop
- During the following experiment you will learn how an R-S flip-flop works and how
to build its truth table.
- During the following experiment you will learn how an extended R-S flip-flop
behaves and how to build its truth table. Notice the differences with the first R-S
flip-flop.
- During the following experiment you will learn how to build an extended R-S flip-
flop with dominant reset and see how it behaves. Notice the differences to the
first two experiments.

2. For J-K Flip-Flop

- The following experiment will allow you to look into the behaviour and truth table
of an asynchronous J-K flip-flop where the inputs C, J and K are not used.
- The following experiment will allow you to look into the behaviour and truth table
of a J-K flip-flop where single pulses are used at the C input.
- In the following experiment you will look into the behaviour and truth table of a J-
K flip-flop where a train of pulses is used at the C input. Therefore the in- and
output signals are investigated with the help of the logic analyzer.
- The following experiment will allow you to look into the behaviour and truth table
of a J-K flip-flop where a train of pulses is used at the C input. Other inputs will
be applied and visualized with the logic analyzer.

B. Alat dan Bahan

- Panel Uni Train
- Sequential Circuits card SO4201- 9T
- Komputer desktop
- Keyboard
- Mouse
- Kabel Jumper
C. Langkah Percobaan

For R-S Flip-Flop

1. Behaviour of an R-S Flip-Flop Behaviour.

- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to get an enlarged view of the connections.

- Open the virtual instrument Advanced Digital I/O Display via the menu option
Instruments | Digital | Extended IO or by clicking on the image below.
- Activate or deactivate the indicated FF inputs writing a one or a zero respectively
in the order indicated in the table. Fill in the table with 0's and 1's for the output
values.
- Do not get confused when you find the inverted input variables such as S or S.
This is just a representation in order to make obvious that the input S is active at
low. This is true for the NAND latch, but it is the same in terms of the binary value
you actually input. Some authors use S and some others would use S. Also
remember that RESET is a synonym for CLEAR and PRESET is a synonym. for
SET. The representation of the CLEAR or RESET input is R, not to confuse with
CLK, which often is also labeled C.

2. Extended R-S Flip-Flop

- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to better be able to see the inputs which are to be
connected.
- Open the virtual instrument Advanced Digital I/O Display via the menu option
Instruments | Digital | Extended IO or by clicking on the image below.
 - Activate or deactivate the indicated inputs writing a one or a zero respectively in
the order indicated in the table. Fill in the table with 0's and 1's for the output
values.

S (Q1) R (Q0) Binary Input Value (Byte Q7...Q0) Qn* Qn+1 (I1) Qn+1 (I0)

0 1 00000001 (0x01)

1 1 00000011 (0x03)

1 0 00000010 (0x02)

0 0 00000000 (0x00)

1 1 00000011 (0x03)

0 1 00000001 (0x01)

1 0 00000010 (0x02)

0 0 00000000 (0x00)

1 1 00000011 (0x03)

* Qn designates the previous output, while Qn+1 designates the current output for
that entry (after applying the requested input).

3. R-S Flip-Flop with Dominant Reset

- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to see the inputs which have to be connected.
 - Open the virtual instrument Advanced Digital I/O Display via the menu option
Instruments | Digital | Extended IO or by clicking on the image below.

Inactivate or activate the indicated inputs writing a one or a zero respectively in the
order indicated in the table. Fill in the table with 0's and 1's for the output values.

S (Q1) R (Q0) Binary Input Value (Byte Q7...Q0) Qn* Qn+1 (I1) Qn+1 (I0)

0 1 00000001 (0x01)

1 1 00000011 (0x03)

1 0 00000010 (0x02)

0 0 00000000 (0x00)

1 1 00000011 (0x03)

0 1 00000001 (0x01)
1 0 00000010 (0x02)

0 0 00000000 (0x00)

1 1 00000011 (0x03)

*Qn designates the previous output while Qn+1 designates the current output for
that entry (after applying the requested input).

For J-K Flip-Flop

1. Asynchronous Behaviour
- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to better be able to see the inputs which are to be
connected.

- Open the virtual instrument Advanced Digital I/O Display via the menu option
Instruments | Digital | Extended IO or by clicking on the image below.
 - Activate or deactivate the indicated inputs writing a one or a zero respectively in
the order indicated in the table. Fill in the table with 0's and 1's for the output
values. As you can see, most inputs except for J and K have a line above that
indicates inversion because it should be emphasized that R, C, and S are active
at LOW. The inputs C, J, and K will be ignored this time.

J C K Binary Input Value Qn* Qn+1 Qn+1

S (Q4) R (Q0)
(Q3) (Q2) (Q1) (Byte Q7...Q0) (I1) (I1) (I0)

0 0 0 0 0 00000000 (0x00)

0 0 0 0 1 00000001 (0x01)

1 0 0 0 1 00010001 (0x11)

1 0 0 0 0 00010000 (0x10)

1 0 0 0 1 00010001 (0x11)

0 0 0 0 1 00000001 (0x01)

1 0 0 0 0 00010000 (0x01)

1 0 0 0 1 00010001 (0x11)

*Qn designates the previous output, while Qn+1 designates the current output for that
entry (after applying the requested input).
2. Synchronous Behaviour (Single Pulse Clock Signal)
- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to better be able to see the inputs which are to be
connected.

- Open the virtual instrument Advanced Digital I/O Display via the menu option
Instruments | Digital | Extended IO or by clicking on the image below.

- Reset the FF by writing binary 00011110 (corresponding to byte Q7...Q0) to the

FF inputs.
 - Now you will "prepare" the J and K inputs by activating them with a falling edge at
Q2 (terminal C) in the order shown in the table. Remember that J and K are not
inverted, and thus active when HIGH, as opposed to R and S, which are
active when LOW. C is activated with a falling edge. The inputs R and S will be
ignored this time (always kept HIGH). Read the outputs at Q and Q after having
given a pulse to C which sets it LOW for a short time (for example 1 second).

Binary Input
J C K C Qn+1 Qn+1
S (Q4) R (Q0) Value (Byte Qn
(Q3) (Q2)* (Q1) (Q2)* (I1)** (I0)
Q7...Q0)

00010001
1 0 0 0 1
(0x11)

00010001
1 0 0 0 1
(0x11)

00011001
1 1 0 0 1
(0x19)

00011001
1 1 0 0 1
(0x19)

00010011
1 0 0 1 1
(0x13)

00010011
1 0 0 1 1
(0x13)

00011011
1 1 0 1 1
(0x1B)

00011011
1 1 0 1 1
(0x1B)

* Input C stays HIGH most of the time, except for the duration of the pulse you
should cause.
 ** Qn+1 designates the level after a new input combination is applied and the
falling edge has been detected, while Qn designates the level before the arrival of
a new pulse at the clock input.

3. Synchronous Behaviour (Pulse Train Clock Signal) 1

- Assemble the following experiment with the Sequential Circuits card SO4201- 9T
as shown in the diagram and animation. Choose the option "Enlarge" with a right
click on the animation in order to better be able to see the inputs which are to be
connected.

- Now you will apply the different signals to the flip-flop in a more automated way
by using the Logic Analyzer. Predefined signal patterns make the input
activation easier and quicker.
- The icon on the upper-right corner opens the Logic Analyzer. You can switch
between Labsoft and the Logic Analyzer by clicking at their respective icons
without losing the data with which you have been working. Open the Logic
Analyzer.
- Go to File | Open Workspace | Load Template and choose the course "Digital
Electronics 2" from the folder where it was originally installed. Then click "OK".

- Choose the workspace "JK timing 1" and click "OK". A pattern for the inputs of
the J-K FF will be displayed. According to the inputs, what will be the output Q at
the different instants of time? When will the output be Q = 1?
- Apply the outputs S, J, C, K, R and read the inputs Q and Q by
clicking Settings | Start Measurement at the menu or by pressing the "Start/Stop
measurement" button.

- Copy the resulting screen with right click + Copy and paste it into the space
below with right click + Paste. Then answer the following question(s).
- Open the workspace "JK timing 2" and click "OK". A pattern for the inputs of
the J-K FF will be displayed. Apply the outputs S, J, C, K, R and read the inputs
Q and Q by clicking Settings | Start Measurement at the menu or by pressing
the "Start/Stop measurement" button.
-

- Copy the resulting screen with right click + Copy and paste it into the space
below with right click + Paste. Then answer the following question(s).
4. Synchronous Behaviour (Pulse Train Clock Signal) 2
- Leave the connections as they were during the first part of the experiment.
Choose the workspace "JK timing 3" and click "OK". A pattern for the inputs of
the J-K FF will be displayed.
Start the measurement and read the inputs Q and Q by clicking Settings | Start
Measurement at the menu or by pressing the "Start/Stop measurement" button.

- Copy the resulting screen with right click + Copy and paste it into the space
below with right click + Paste. Then answer the following question(s).

- Choose the workspace "JK timing 4" and click "OK". A pattern for the inputs of
the J-K FF will be displayed. Apply the outputs S, J, C, K, R and read the inputs
Q and Q by clicking Settings | Start Measurement at the menu or by pressing the
"Start/Stop measurement" button.

- Copy the resulting screen with right click + Copy and paste it into the space
below with right click + Paste. Then answer the following question(s).