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1. Introduction
2. Fundamentals of Modular Multilevel Converter
3. Submodule Topologies
4. Dimensioning of the components
5. Redundant Operation and Fault Tolerance
6. Control Methods
7. Applications and Projects
8. Outlook and Future trends
2
1. Main future converter requirements
- Minimization of EMC-filters
3
1. Conventional converter topologies
Neutral Point Clamped Converter
P
T11
T12 C1 DC-
busbar
NPC Converter: T13
(5-level)
(Akagi, Nabae, Takahashi)
T14 C2
Commutation V AC Vd
Path: T21
T22 C3
T23
T24 C4
N
T11
C41 DC-
T12
C31 busbar
FCC Converter: T13
(5-level) C42
C21
T14
(Meynard, Foch)
C11
Commutation Vd
Path: T21 V AC
C32
T22 C22
C43
T23
C33
C44
T24
N
(Robicon)
Well established for single motor drives (without active front end)
Very complicated transformer with increasing number of levels
No DC-Bus available
6
1. Conventional converter topologies
HVDC-Transmission using Two-Level converter
Characteristics:
8
2. Fundamentals of Modular Multilevel Converter
Modular Multilevel Converter (M2C or MMC)
9
2. Fundamentals of Modular Multilevel Converter
Features:
Advantages:
10
2. Fundamentals of Modular Multilevel Converter
Comparison of 2-level converter and MMC
Arms currents AC-Terminal voltages
2-level Converter
M2C
Arm currents of M2C are not chopped (simplified HV-construction, low EMI)
No filters at AC-side required
No special requirements for transformers, motors, cabling
No capacitors at DC-Bus
11
2. Comparison of 2-level converter and MMC
1 1
0.995 0.995
0.99 0.99
0.985 0.985
Efficiency
0.98
Efficiency
0.98
0.975 0.975
0.97 0.97
0.965 0.965
0.96 0.96
0.955 0.955
0.95 0.95
0 50 100 150 200 250 300 350 0 50 100 150 200 250 300 350
Real Power (MW) Real Power (MW)
12
2. Fundamentals of Modular Multilevel Converter
First assumptions for idealized operation
13
2. Simplified equivalent circuit of the MMC
Arm currents (HB-SM)
DC-current distribution:
Id/3 in each arm
Id
P
Id
P
Voltage range using HB-Submodules:
ia1 ia3 ia5
0 uz Ud
La La La
Ud
Ud/2
U z1 (t ) = w sin( t )
uz1 uz3 uz5
2
U
U z1 (t ) = d + w sin( t )
Ud
uw1 iw1 iw2 iw3 2
0 L1 L2 L3
Ud
U z1 (t ) = (1 k sin( t ) )
2
15
2. Simplified equivalent circuit of the MMC
Relationship between arm currents and voltages
m k cos = 2
L1 i LS RCu uN2
w2
Ud
L2 i LS RCu uN3 iCC1 (t ) + iCC 2 (t ) + iCC 3 (t ) = 0
w3
L3
uz2 uz4 uz6
La La La
ia2 ia4 ia6
17
2. Real operation with circulating currents
Conditions
iCC1 (t ) = CC sin(2 t + CC )
4
iCC 2 (t ) = CC sin 2 t + CC
3
18
2. Real operation with circulating currents
Control of circulating currents
CC1
a1 a5
a a Uz
z1 z5 U
ia
U
4 La
z2 z6
a a
a2 a6
19
2. Real operation with circulating currents
Reasonable usage of circulating currents:
MMC
21
2. Common mode voltages
Conditions for introducing common mode voltages
CM multiple of 3
(3, 6, 9, 12, 15, 18,)
22
2. Precharging of the capacitors
U
UCnom U
d
8
U
Aux U
U U ... C16
C1 C2
2
0
0 1 2 3 4 5
t [ms]
23
2. Control of the DC-side
stray
Important for rapid power changes of real
power
DC Advantageous for operation of several
converters on common DC-Bus
24
2. Control of the DC-side
Short circuits at the DC-side
MMC:
25
2. Control of the DC-side
Electronic DC-current limitation
LV
DB DB
HV
HV
DB
T1 D1 T3 D3 T1 D1 T3 D3
Ia + +
X2 - UC
-
C0 C0
T2 D2 T4 D4 T2 D2 T4 D4
X1
T1 D1 T1 D1 T3 D3
Ia UC +
+
X2 - - UC
C0 C0
T2 D2 T2 D2 T4 D4
X1
+
- UC
VDR2 C0
T2 D2 T2 D2 T4 D4
X1
T1 D1 T3 D3 T1 D1 T3 D3
Ia + +
X2 - UC
-
C0 C0
T2 D2 T4 D4 T2 D2 T4 D4
X1
Reduction of installed semiconductors
Negative voltage not possible in both directions of arm current
31
3. Submodule Topologies
Cross coupled Half-Bridge-Submodules:
(Nami, A.; Wang, L.; Dijkhuizen, F.; Shukla, A.: Five level cross connected cell for cascaded converters)
T6 T8
T1 D1 D6 D8 T3 D3
ia +
UC1 S +
X2 - UC2 -
C0 C0
T2 D2 D9 D7 T4 D4
T9 T7
X1
D6
T1 D1 T3 D3
ia + +
X2 UC1 T5 D5 UC2
- -
C0 C0
T2 D2 T4 D4
D7
X1
T1 D1 D6 T3 D3
ia + +
X2 UC1 T5 D5
- UC2 -
C0 C0
T2 D2 D7 T4 D4
T7
X1
Diodes (D6 + D7) of the CD-SM extended by parallel IGBTs (T6, T7)
Characteristics similiar to Clamp-Double-SM
Negative voltages possible for both directions of arm current (k 1)
Switching sequences and capacitor balancing critical
(Capacitors switched in parallel)
34
3. Submodule Topologies
35
4. Dimensioning of the components
Semiconductors
36
4. Dimensioning of the components
Semiconductors
n
( )
Ud
2
(1 + )
b U Cnom
37
4. Dimensioning of the semiconductors
Submodule currents
x = 1 2
m
Average currents through semicondutors:
1 I bm x
iT 1 = iD1 = b x Iw = d
4 3
1 1
iT 2 = (1 b x ) I w + I d
4 6
1 1
iD 2 = (1 b x ) I w I d
4 6
iT 2 , iD 2 > iT 1 , iD1
38
4. Dimensioning of the components
Capacitors
39
4. Dimensioning of the capacitors
Necessary energy installed per arm
Conditions:
Uz(t) ia(t)
Pz(t)
40
4. Dimensioning of the capacitors
Necessary energy installed per arm 1)
Pz (t ) = u z (t ) ia (t )
Uz(t) ia(t)
W z (t ) = Pz (t )dt
Wz = 0
+ W z = W z
x2
W z = Pz (t )dt
Pz(t) x1
Zeros of current:
1
x1 ( m, ) = arcsin
m
1
x2 ( m, ) = + arcsin
m
1) Conditions: 41
see page 40
4. Dimensioning of the capacitors
Necessary energy hub per submodule 1)
3
P 1 2
W z ( m ) = d m 1 2
3 m
3
2 PS k cos
2 2
W z ( k ) = 1
3 k 2
3
k cos 2
2
2 PS
WSM ( k ) = 1
3 k n 2
1) Conditions: 42
see page 40
4. Dimensioning of the capacitors
Necessary energy installed per submodule 1)
U C ,min = U C (1 ) U C ,max = U C (1 + )
Necessary capacitance:
1
WC ( , U C ) = WSM
4
WSM W z
C0 = =
2 U Cnom
2
2 n U Cnom
2
1) Conditions: 43
see page 40
4. Dimensioning of the capacitors
Necessary energy installed per submodule 1)
X z = Wz
PS
3
2 k cos
2 2
X z ( k ) = 1
3 k 2
La La
La
+ 0
2
2La 4 La
La La
In general, reducing the set value of AC-voltage is the preferable measure (if
necessary)
47
6. Control methods
Main items
48
6. Balancing of the arm energies
Definition of energies:
Example for converter with 3phases and 6 arms
WP = W1 + W3 + W5 Total energy of the positive arms
WN = W2 + W4 + W6 Total energy of the negative arms
WPh1 = W1 + W2 Energy in Phase 1
WPh2 = W3 + W4 Energy in Phase 2
WPh3 = W5 + W6 Energy in Phase 3
Primary goal:
50
6. Balancing of the arm energies
Definition of energy ripple in the arms
Idealized case with zero circulating currents and zero common mode voltage
3
U d I d cos( ) 2 k cos( )
2 2
W z = 1
N k 2
51
6. Operation at frequency zero
Worst case-condition at = 0:
Example: Frozen vector at = /2
id
P
1 iCC1
Phase 1 ia1 ia3 iCC2 ia5
0.8 Phase 2
Phase 3 La La La
0.6
0.4
uz1 uz3 uz5
0.2 LS RCu uN1
iw1
0
L1 iw2 LS RCu uN2
0.2 Ud
L2 iw3 LS RCu uN3
0.4
0.6 L3
uz2 uz4 uz6
0.8
1 La La La
0 /2 3/2 2
ia2 ia4 ia6
La 1/2 La La 1/2 La
Id Id
uz1 =
uz1 = 0 uz35 = U0 uz35 = Ud
(Ud U0)
iw
La 1/2 La La 1/2 La
iz2 iz46 iz2 iz46
N N
1 1
WSM = TCM U 0 IW per submodule
n 2
Low values of energy ripple are achievable, when output voltage (U0) is
small
Further improvement possible using trapezoidal waveform of the
common mode voltage
54
6. Operation at frequency zero
Impact of the common mode voltage on circulting current (ICC)
U0
=c -c
Ud
U0'
U0
= d +1 d0
U CM = 1
2 U d [1 c (1 + 2d )]
1 c 2
CC 1 = 1 2 IW
1 c (1 + 2d )
I d = I d + d sin (0t )
2
uW up
ui
L R Cu
S
iW Common mode voltage for one phase:
Id
in
un U CM = U CM + CM sin ( 0t )
Ud
2
Mn LA 0: sinusoidal common mode frequency
iw/2
56
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of current control
(Kolb, J.; Kammerer, F.; Braun, M.: A novel control scheme for low frequency operation of the Modular Multilevel Converter)
iw 1
ip = Id + Id = (i p + in )
iw/2 2 2
ip i
Ud LA
in = I d w iw = i p in
Mp 2
2
uW up
ui Ud di p
L S R Cu Mp: =L + u p + uw
iW 2 dt
Id
in
un Ud di
Mn: = L n + un uw
2 dt
Ud
2
Mn LA
iw/2
57
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of current control
(Kolb, J.; Kammerer, F.; Braun, M.: A novel control scheme for low frequency operation of the Modular Multilevel Converter)
diw 1
iw/2 = (u n u p 2 (RCu iw + ui ))
ip dt 2 La + Ls
Ud
Mp LA
2 Controlled using difference of arm voltages
uW up
ui did 1
L S R Cu
iW
= (U d (u n + u p ))
Id dt 2 Ls
in
Controlled using sum of arm voltages
un
Ud
2
Mn LA
58
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of energy control
Instantaneous power in the arms:
Pp / n = u p / n i p / n
iw/2
ip
Ud
Mp LA
2
P = Pp Pn Power difference between the arms
uW up 1
ui
L S R Cu P = (Pp + Pn ) Average Power of one phase
iW 2
Id
in
Common mode () and differential mode ()
un
components
Ud
2
Mn LA P , p = P ,n
iw/2
P , p = P ,n
59
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of energy control
Separated components:
1 1 1 1 1
upper + Ud I d Uw I w + Ud I w U wId CM d U CM I d UCM I w
iw/2 2 2 4 2 2
ip 1 1 1 1 1
lower + Ud I d Uw I w Ud I w +UwId + CMd + U CM I d UCM I w
2 2 4 2 2
Ud
Mp LA
2
Active power Pulsating power Active power
caused by DC- for
uW input output additional
up components balancing
ui
L S R Cu
iW Common mode components
Id
in Differential mode components
un
1 !
P = (Pp + Pn )= 0 Sum of arms power
Ud
Mn LA
2 (Averaged = 0)
2
!
iw/2
P = Pp Pn = 0 Difference of arms power
(Averaged = 0)
60
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of energy control
Necessary DC-components:
1
iw/2 Id = (U w I w + U CM I w )
ip Ud
Ud
Mp LA 1 1
2 d = U d I w 2U w I d 2U CM I d
uW
CM 2
up
ui
L S R Cu
iW
Id Side condition:
in 3 !
un
y =1
dy =0 No ripple current in DC-side
Ud
Mn LA
2
1 Uw
U CM (0t ) = cos(30t )
iw/2 4 cos
61
Equivalent circuit for one phase
6. Optimized operation for drives
Basics of energy control
(Kolb, J.; Kammerer, F.; Braun, M.: A novel control scheme for low frequency operation of the Modular Multilevel Converter)
feedforward
control
Uc
Current control up*
- d* - -
Energy control 1/2 uw0* MMC
C
- -
0 id Ud
sin(x t)
d*
- un*
C
Balance control
measured/filtered values
feedforward desired values (*)
control given parameters
Evaluation of measured values
ip
iw id
-
1/2
in
uCp
UC UC
C 1/2 C
uCn -
62
6. Modulation methods
63
6. Modulation methods
Carrier-based modulation methods
1 1 1 1
0 0 0 0
-1 -1 -1 -1
0 0.01 0.02 0 0.01 0.02 0 0.01 0.02 0 0.01 0.02
Time [s] Time [s] Time [s] Time [s]
4 4 4 4
2 2 2 2
0 0 0 0
0 0.01 0.02 0 0.01 0.02 0 0.01 0.02 0 0.01 0.02
Time [s] Time [s] Time [s] Time [s]
USM
rounding
Uarm,ref
65
6. Modulation methods
Averaging NLM
(Rohner, S.; Bernet, S.; Hiller, M.; Sommer, R.: Modulation, losses and semiconductor requirements of modular multilevel converters)
4 UC 4 UC
3 UC 3 UC
Uz,ref
Uz,ref
2 UC 2 UC Uz,AVG
Uz,AVG
Uz,PWM
1 UC 1 UC
TPWM
0 UC 0 UC
0 1 2 3 4 5 0 1 2 3 4 5
66
6. Modulation methods
Tolerance Band
(Hassanpoor, A.; ngquist, L.; Norrga, S.; Ilves, K.; Nee, H.-P.: Tolerance Band Modulation Methods for Modular Multilevel Converters)
67
6. Submodule capacitor voltage balancing
Control layer below arms energy control and modulation
Aims:
68
6. Submodule capacitor voltage balancing
Basic capacitor balancing
(Marquardt, R.; Lesnicar, A.; Hildinger, J.: Modulares Strom-richterkonzept fr Netzkupplungsanwendung bei hohen Spannungen)
Measuring and sorting-method in each arm
iz > 0 (charging): SM with lowest voltages are selected to be inserted
iz < 0 (discharging): SM with highest voltages are selected to be inserted
Example:
Positive arm Negative arm
iz,p 0
UC3 = 1010V UC6 = 960V
SM1 UC1 = 1040V UC5 = 1020V UC10 = 970V
SM2 UC2 = 1050V UC4 = 1030V UC8 = 980V
SM3 UC3 = 1010V UC1 = 1040V UC7 = 990V
SM4 UC4 = 1030V
UC2 = 1050V UC9 = 1000V
SM5 UC5 = 1020V
iw
Uw
SM7
SM8
UC7 = 990V
UC8 = 980V
Asynchronous sorting and selecting time period
SM9 UC9 = 1000V (or synchronous with PWM) can be chosen
SM10 UC10 = 970V
iz,n < 0
(Rohner, S.; Bernet, S.; Hiller, M.; Sommer, R.: Modulation, losses and 69
semiconductor requirements of modular multilevel converters)
6. Submodule capacitor voltage balancing
Predictive capacitor-voltage balancing
(Qin, J.; Saeedifard, M.: Reduced Switching-Frequency Voltage-Balancing Strategies for Modular Multilevel HVDC Converters)
70
6. Submodule capacitor voltage balancing
Advanced predictive capacitor-voltage balancing
(Ilves, K.; et al.: Predictive Sorting Algorithm for Modular Multilevel Converters Minimizing the Spread in the Submodule Capacitor Voltages)
Aim:
Equal capacitor voltages in one arm at maximum voltage
Conditions:
Knowledge of arm current/charge expected capacitor voltage
Knowledge of pulse pattern in advance target capacitor voltage
Pulse pattern must be cycled for even power loss distribution between SM
71
6. Submodule capacitor voltage balancing
Fundamental frequency modulation
(Ilves, K.; et al.: A New Modulation Method for the Modular Multilevel Converter Allowing Fundamental Switching Frequency)
72
7. Applications and Projects
High Voltage Direct Current (HVDC) - Transmission
Power Electronics
for HVDC-Grid
73
7. HVDC-Systems
Future Requirements for High Power Electronics
74
7. HVDC-Systems
75
7. HVDC-Systems
Converter Configurations
Symmetrical Monopole:
P
Ud/2 Limited Power
M2C M2C M2C Tight restrictions for
Ud/2
N operation after line faults
76
7. HVDC-Systems: Multiterminal
Iw2 [kA]
0
-2
2
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Iw1 [kA]
t[ms]
1
0
0
Id2 [kA]
-1
-2
-2
1 Converter 3
2
Iw3 [kA]
Id1 [kA]
-1 -2
prospective DC-current
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
-2 t[ms]
-3 1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Id3 [kA]
t[ms] 0
-1
Blocking command for the converters
-2
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
t[ms]
78
7. HVDC-Systems
0
Converter 1
Id1 [kA]
3.5
-1
prospective fault current
-2
3
-3
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
IFLT=If1 +If23 [kA]
2.5 t[ms]
1
0
Converter 2
2
Id2 [kA]
-1
1.5 -2
-3
1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
t[ms]
2
0.5
1
Converter 3
Id3 [kA]
0
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -1
t[ms]
-2
Blocking command for the converters 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
t[ms]
Reactive current is
shifted by 180 in
extremely fast and
smooth manner
100% reactive
power reversal in
less than
5ms possible
80
7. HVDC-Systems Research projects
Examples:
USA: GENI-Project
S.-Korea: Hyosung/Jeju-Island
China:
- 200kV DC-Breaker
- Multiterminal HVDC
(Zhoushan)
81
7. Applications and Projects
Flexible AC Transmission System (FACTS)
Requirements
No/Small AC-filters
Low Switching frequency
High reliability and high efficiency
Requirements
Reactive power compensation
Low maintenance and High reliability
Very high efficiency
Additional challenges
Large transient overvoltages from grid ngquist, L.; Haider, A.; Nee, H.-P.: Open-loop Approach to
Heavy overloads Control a Modular Multilevel Frequency Converter
83
7. Applications and Projects
Application of MMC for Drives
enaC
b hC
rately ekophC
D
/ epr-C
tliIF
M
E IG -eT
IvrntB
EMI-Filter
No safe failure behaviour (High
EMI-Filter Line-Side-
Converter DC-surge currents, high risk of
To
Motor 2 component damage)
No capability for redundant
operation after failures
High expense for passive filters
Two level IGBT-Converter
Passive EMI-filters and Line-Side-Converter
Large DC-capacitors distributed at DC-Bus
84
7. Applications and Projects
Application of MMC for Drives
Advantages:
P SM SM SM
SM SM SM Minimized machine losses
DC-Bus:
No Capacitors! SM SM SM Minimized accoustic noise
SM SM SM
i1
i2
V12 V23 Parasitic bearing currents
Motor V31
Vd i3
eliminated
No Filters! SM
SM SM
SM
Long motor cables enabled
SM SM
SM SM SM Redundant operation after failures
SM SM SM of submodules or failures at DC-Bus
N is enabled
85
7. Applications and Projects
Field of application for Large Drives
Marine propulsions
Shaft generators
Steel-mill
Generators in hydro power
Generators in wind power
Test bench drives
86
7. Applications and Projects
(Offshore) Wind Power
(Liu, H.; Ma, K.; Loh, P. C.; Blaabjerg, F.: Lifetime estimation of MMC for Offshore Wind Power HVDC Application)
87
7. Applications and Projects
Battery energy storage system (BESS)
(Schroeder, M.; Henninger, S.; Jaeger, J.; et al.: Integration of Batteries into a Modular Multilevel Converter)
Main advantages
Low voltage rating of the components
High reliability due to redundancy
88
8. Outlook and Future Trends
Future requirements
Higher Power
Improvement of conventional semiconductors
Wide bandgap semiconductors (SiC, GaN)
Reduced capacitor volume
New topologies
Improvement of capacitor technology
Current-Limiting capabilities
89
8. Development trend of semiconductors
Development-Trend:
90
8. Development trend of semiconductors
Package improvements
Half-Bridge Configuration
Modular Approach
Low inductive Package design
Higher power density
(Schtze, T.; Borghoff, G.; Wissen, M.; Hhn, A.: Boost Your
System! Defining the Future of IGBT High-Power Modules)
91
8. Development trend of semiconductors
Reverse Conducting IGBT (RC)
(Werber, D.; Pfirsch, F.; Komarnitskyy, V.; et al.: 6.5kV RCDC For increased Power Density in IGBT-Modules)
Improvements
92
8. Development trend of semiconductors
Silicon Carbide (RC)
(Heer, D.; Bayerer, R.; Domes, D.: Systemdesign fr SiC-JFET-Halbbrcken-Module)
Characteristics
Present status:
Only small chip area available for SiC
(max 5 x 5mm)
1.2kV and 1.7kV in commercial production
JFETs (normally on) best qualified
93
8. Development trend of semiconductors
Comparison of typical
iF On-State-Characteristics
Si-Thyristor
6kA Si-IGCT
Thyristor-Structures enable the
Si-IGBT lowest differential On-State-Resistance
4kA
SiC-FET
(Trend) IGBT-Development intends to reduce
2kA this difference
Wide Band-Gap-Semiconductors
-1V 1V 2V 3V VT offer the potential for:
96