An On-line Fault Detection and a Post-Fault
Strategy to Improve the Reliability of Matrix
Converters
Jaya Deepti Dasika and Maryam Saeedifard
School of Electrical and Computer Engineering, Purdue University
West Lafayette, IN, 47907-2035
Emails: jdasika@purdue.edu and maryam@purdue.edu
Abstract: This paper proposes a new on-line fault detection
method to detect open-switch faults in a Matrix Converter
(MC). The proposed fault detection method is based on a two-
step algorithm. The first step identifies the occurrence of the
fault by monitoring the measured load currents. The second
step locates the faulty switch by measuring the response of
the MC to a set of predefined switching states. The proposed
method allows fast detection and isolation of a faulty switch,
independent of the modulation strategy, the voltage transfer
ratio, or the output frequency, and without any requirement of
additional voltage sensors. The paper also presents a Model
Predictive Control (MPC)-based post-fault strategy that en-
ables the MC to continue its operation during faulty conditions.
Time-domain simulation studies are performed in the MAT-
LAB/SIMULINK environment to evaluate the performance of
the proposed fault detection method and the eectiveness of
the MPC as a post-fault control strategy.
I. Introduction
A direct Matrix Converter (MC) is a promising topology
for AC-AC conversion applications and as a replacement for
the conventional AC-DC-AC converter. Due to the absence of
the storage element/electrolytic capacitor, an MC provides a
more compact design with reduced weight/volume [1].
One of the main technical challenges in the development
of the MC is to improve its reliability and fault-tolerant
capability. In the technical literature, fault diagnosis and
reliable operation of the MC, specifically for open-switch
failures, have been investigated and various algorithms and
remedial measures have been proposed [2][9]. The existing
fault detection methods are mainly based on sensing either
the load voltages or the load currents [2][5], [10]. Voltage-
based sensing methods are reliable in identifying an open-
switch faults. However, their main drawback is the installation
of additional hardware besides the ones already installed
for control purposes, i.e., voltage transducers on the load-
side, which adds to the system cost. Current-based sensing
methods provide a more cost-eective solution as they rely
on the existing current transducers on the load-side and do
not need any extra hardware. Among the proposed current-
based sensing fault detection methods, the methods in [6], [7]
are developed for a specific modulation strategy, i.e., Alesina
978-1-4673-4355-8/13/$31.00 2013 IEEE 1185
Venturini (AV) [11] and two-stage Space Vector Modulation
(SVM). Although the proposed method in [8] is independent
of modulation strategy, it requires accurate measurement of
the currents at a very high sampling rate.
This paper proposes a fast and general current-based sensing
fault diagnosis method to locate an open-switch fault in an MC
independent of the modulation strategy. Upon the detection
of a fault in an MC, a remedial action needs to be taken
to maintain the system operation as close as possible to
normal either by the modification and reconfiguration of the
converter topology or by adopting a dierent control strategy.
Most of the existing reconfiguration methods are based on
adding auxiliary devices to the converter topology which add
to the system cost, complexity, and volume and may not be
applicable when the source/load neutral point is not accessible
[10], [12][14]. The alternative post-fault strategies use the
remaining eight (out of nine) healthy switches to operate the
MC with a modified AV or a SVM switching strategy and to
maintain balanced and sinusoidal load currents [6], [15].
This paper proposes a Model Predictive Control (MPC)-
based post-fault strategy to operate the MC subsequent to an
open-switch fault. An MPC strategy is a promising control
strategy to control power-electronic converter systems due to
its fast dynamic response, flexibility to include constrains and
nonlinearities of the system, and ease in digital implementation
[16][18]. This paper takes the advantages of the features
of an MPC strategy and develops a discrete-time predictive
model of an MC system. Based on the developed model, an
MPC strategy is proposed which provides promising post-
fault operation of an MC. Performance of the proposed fault
detection method and the post-fault strategy for a 3x3 MC
is evaluated based on time-domain simulation studies in the
MATLAB/SIMULINK software environment.
II. Matrix Converter System
The MC system of Fig. 1 consists of nine bi-directional
switches, an input filter, and a clamp circuit. The input filter
is designed to attenuate the switching frequency harmonics of
the grid current. The clamp circuit protects the MC circuit and
switching devices against high voltage and current stresses.
The bi-directional switches of the MC system can be realized
 Fig. 1. Circuit diagram of a MC indicating the path of a non-zero inductive load current iA when the faulty switch S Aa is switched on.

by series connection of two IGBTs with their parallel diodes, A will be equal to viq vclamp where q {a, b, c} and q is
as shown in Fig. 1. determined based on the circuit operating conditions.
The input and output voltages of the MC of Fig. 1 under The input and output voltages of the MC of Fig. 1, when
normal operating conditions are correlated by the following the switch S Aa is faulty, are correlated as:
equation:
vA 0 mAb mAc via

vA S Aa S Ab S Ac via vB = mBa mBb mBc vib

vB = S Ba S Bb S Bc vib (1) vC mCa mCb mCc vic

vC S Ca S Cb S Cc vic mAa 0 0 viq vclamp

+ 0 0 0 0 (4)
Assuming that the switching frequency of the converter is
much higher than the input and output frequencies, an average 0 0 0 0
model of the MC is expressed by As equation (4) shows, under faulty conditions, the output
voltages of the MC system are no longer the same as their
vA mAa mAb mAc via

vB = mBa mBb mBc vib
desired/expected values.
(2)
vC mCa mCb mCc vic III. Fault Detection
m pq for p {A, B, C}, q {a, b, c}, represents the duty ratio of Based on the discussion in the previous section, under faulty
the switch S pq and is conditions the load currents are not equal to their reference
t pq values and the current flowing through the clamp capacitor
m pq = (3) is equal to the current of the faulty phase. Furthermore,
Ts
under healthy operating conditions, no energy is transferred
where t pq is the on-duration time of the switch S pq within the to the clamp circuit. Based on these observations, this section
switching period T s . proposes a fault detection algorithm which follows a two-
To obtain the relationship between the input and output step approach to identify the fault. The first step detects the
voltages of the MC during an open-circuit fault condition, occurrence of the fault in MC system and the second step
consider a case when the MC is feeding an inductive load and locates the faulty switch.
an open-circuit fault happens in the switch S Aa . Under this
condition, the path of the non-zero inductive load current in A. Step 1: Detection of Fault
phase A, i.e., iA , when the faulty switch S Aa is switched on, is The proposed fault detection method monitors the three-
highlighted in Fig. 1. As shown in Fig. 1, under the described phase load currents and evaluates the percentage of the error
faulty condition, the current flowing through the clamp circuit between the measured values and their reference values. A
capacitor iclamp is equal to iA . The voltage at the output phase fault is detected when the percentage of the error is greater

1186

Fig. 2. Flowchart of the proposed fault detection algorithm.
than a pre-specified threshold value. For the sake of evalua-
tion, two error coecients Error1 and Error2 are defined as
follows:
iq,re f iq
Error1 = 100 (5)
ire f
id,re f id
Error2 = 100 (6)
ire f
 introduced by transducers and measurement circuits, there
where ire f = iq,re f 2 + id,re f 2 and iq,re f and id,re f are the q and
d components of the desired load currents. iq and id are the q
and d components of the load currents defined by:
2 4
iq = iA cos() + iB cos( ) + iC cos( ) (7)
3 3
2 4
id = iA sin() + iB sin( ) + iC sin( ) (8)
3 3
= o dt + 0 , where o is the load frequency. The error
threshold value, i.e., , is chosen as 10%.
To make the algorithm more robust and to avoid false results
during transients, an additional consideration is taken into
the account. Under healthy operating conditions, no energy is
transferred to the clamp circuit and ideally the clamp current
iclamp is zero. Verifying this additional constraint during tran-
sients will avoid any false fault detection. Therefore, during
transients, the value of the filtered clamp current iclamp, f is
sampled in each switching cycle. The algorithm to identify
the fault is presented in the flowchart of Fig. 2
B. Step 2: Identification of the Open-Circuited Switch
To identify the faulty switch, the nine bi-directional
switches of the MC are classified into three groups, i.e.,
Group1: {S Aa , S Ba, S Ca }, Group2: {S Ab , S Bb, S Cb } and Group3:
1187
Fig. 3. Flowchart of the proposed algorithm to identify a faulty switch.
{S Ac , S Bc, S Cc }. To identify the faulty switch in Group1, the
zero switching state aaa is applied to the MC and the currents
iclamp , iA , iB , and iC are measured. A non-zero current iclamp
indicates the presence of the faulty switch in Group1. If the
switch S Aa is faulty, iclamp will be equal to iA . Similarly, if
the switch S Ba (S Ca ) is faulty, iclamp will be equal to iB (iC ).
Ideally, under fault conditions, the clamp current iclamp should
be equal to the faulty phase current. However, due to the error
might be a dierence between iclamp and the corresponding
faulty phase current. Therefore, to take this into the account,
a safety margin is introduced and the fault coecients fA , fB ,
fC are defined as:
     
1, if iclamp  i j  0.05 iclamp  and iclamp  0
      
0, if iclamp  i j  0.05 iclamp  or iclamp = 0
fj = (9)
for j = A, B, C
Based on (9), the switch S ja , j = A, B, C, is faulty if f j = 1
and fk = 0 for k {A, B, C} and k  j. The proposed
algorithm identifies the faulty switch accurately if, the absolute
values of the two phase currents are not equal. However, if
more than one of the fault coecients are equal to one, the
algorithm does not provide conclusive results. To guarantee
the accuracy of the algorithm under all operating scenarios,
a switching state called a Fault Detection State (FDS) is
defined and applied to the MC switches. Table I lists the FDSs
for various possible fault coecient combinations for Group1
switches. Subsequent to the application of a FDS, the currents
are measured. For example, consider a case when the fault
coecients fA , fB are equal to one for Group1 switches. In
this case, the FDS baa is applied as a switching state and iclamp
is measured. If iclamp = iA , the faulty switch is identified as
 TABLE I TABLE II
The FDSs for various fault coefficient combinations Simulation parameters

Fault coecients FDS for FDS for FDS for Parameter Value
Group1 Group2 Group3 Vin 120V
fA = 1, fB = 1 baa abb acc fin 60Hz
fB = 1, fC = 1 aba bab cac fsw 10KHz
fC = 1, fA = 1 aab bba cca Lf 1mH
Cf 4.7F
Rd 15
Cclamp 100F
S Aa , otherwise, S Ba is faulty. With a similar procedure and by RL 14
LL 43mH
using the zero switching states bbb and ccc, a faulty switch
in Group2 and Group3 is identified. The corresponding FDSs
used for locating the faulty switch in Group2 and Group3 are between predicted current and the reference current, a cost
listed in Table I. The procedure to implement the proposed function associated with the current error is defined as
   
identification strategy is summarized in the diagram of Fig. 3. g = iq,re f iq (k + 1) + id,re f id (k + 1) (11)
where iq (k + 1) and id (k + 1) are the predicted values of the q
IV. An MPC-Based Post-Fault Strategy and d components of current and are calculated based on (10).
The switching state which provide the minimum value for the
Under normal operating conditions, an MC has 27 permitted cost function g is the optimum switching state and applied to
switching states. With a faulty switch, the number of permitted the MC in next switching cycle.
switching states is reduced to 18. For example, if switch
S Aa is faulty, the switching state abc is no longer permitted. V. Performance Evaluation
The objective of a post-fault strategy is to regulate the load This section evaluates performance and eectiveness of
currents at their reference values with the remaining 18 avail- the proposed fault detection method and also the post-fault
able switching states under an open-fault switch condition. control strategy, based on time-domain simulations in the
Therefore, assuming a sampling period of T s , the discrete- MATLAB/SIMULINK environment. The parameters of the
time model of the MC load-side current, with an Euler simulated system of Fig. 1 are listed in Table II.
approximation of the current derivative, is deduced as
A. Fault Detection
This section evaluates the performance of the proposed
iq (k + 1)   iA (k)
R T
fault detection method in terms of the required time taken
)A T s B K iB (k)
l s
id (k + 1) = (1 to identify fault. As mentioned before, the proposed fault
Ll
i0 (k + 1) iC (k)
detection method is independent of the modulation strategy.
via (k) However, the required time to detect the fault depends on
Ts
+ S K vib (k) (10) the modulation strategy, operating condition and sampling
Ll
vic (k) rate. Table III provides a quantitative comparison between
where the required time to detect the fault for the SVM and AV
modulation strategies, for three operating conditions and with
1 0 0 0 1 0 a sampling rate of 100s.

A = 0 1 0 , B = 1 0 0 , The next case study is to evaluate the performance of the

0 0 1 0 0 0 fault detection algorithm during system transients. The MC

S Aa S Ab S Ac system is operating in a steady state condition with iqre f = 7A

S = S Ba S Bb S Bc , and idre f = 0A. At t = 0.1s, iqre f is stepped down from 7A to

S Ca S Cb S Cc 3A and no fault is imposed on the MC system. Fig. 4 shows
the response of the system to step change. Based on Fig. 4(d),
cos() cos( 2
3 ) cos( 4
3 )

K = sin() sin( 2
3 ) sin( 4
3 ) ,
subsequent to step change in iqre f , the error coecients Error1
and Error2 exceed the threshold value of 10%. However, the
1 1 1
the filtered clamp current iclamp, f remains at zero. Therefore,
and no fault is detected in the system and the fault detection signal
 stays at zero as shown in Fig. 4(f).
= o dt
B. Identification of the Open Circuit Switch
Matrix S represents the permitted switching state matrix. The In this section, capability of the proposed fault location
element S i j in matrix S, for i {A, B, C}, j {a, b, c} is equal method described in Section III is evaluated. Two dierent
to one if, the corresponding switch is on, otherwise, it is zero. test cases are considered to illustrate the eectiveness of the
To achieve reference current tracking and to reduce the error proposed fault location method.

1188
 TABLE III
Fault detection time measurement for SVM and AV strategies

SVM strategy AV strategy

I peak (A) Average Min. Max. Average Min. Max.
8 time time time time time time
i i i (ms) (ms) (ms) (ms) (ms) (ms)
A B C
(A)

7.8 2.0 0.2 10 1.64 0.1 7

0
ABC

4.6 1.17 0.1 5.6 0.45 0.1 1.2

1.3 1.6 0.1 8.2 0.16 0.1 0.3
i

8
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14

(a) 8 i i i
A B C

(A)
10

ABC
i i 0
iqref & iq (A)

qref q Zero State aaa

i
5 8
0.067045 0.06705 0.067055 0.06706 0.067065
0
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14
(a)
4
(b)

(A)
2

clamp
4
idref id
&i (A)

i
2
d

0 0.067045 0.06705 0.067055 0.06706 0.067065

dref
i

0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14

(b)
Fault Locate Signal

2
(c)
1
6
0
(A)

4
clamp,f

2
0.067045 0.06705 0.067055 0.06706 0.067065
0
i

(c)
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14
Time(s)
(d) Fig. 5. Response of the MC system of Fig. 1 to a faulty switch in Group1:
200 (a) three-phase load currents, (b) clamp circuit current, and (c) Fault Locate
2
Error & Error

Error Error Signal.

1 2
100
1

0 In the first test case, a fault is imposed on the switch S Aa

0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 which belong to Group1. Figs. 5(a) and (b) show the load
currents and iclamp when the zero state aaa is applied to locate
(e)
the faulty switch in Group1. Fig. 5(c) depicts the Fault Locate
Fault Detection Signal

1 Signal of the circuit. As shown in Fig. 5, when the zero

0.5 state aaa is applied, the fault detection algorithm identifies
the faulty switch by measuring the load and clamp currents.
0
In the second test case, at t = 0.055s a fault is imposed
0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 on the switch S Ca which belong to Group3 when the load
currents of the output phases iC and iB have equal magnitudes.
(f) The algorithm described in Section III is implemented and
Time(s)
the output of the algorithm is an encoded Fault Locate Signal
Fig. 4. Response of the fault detection method to a step change in the which is used to identify the faulty switch. Figs. 6(a) and (b)
load current : (a) three-phase load currents, (b and c) q and d components of
current, (d) average clamp current, (e) error coecients, and (f) fault detection show the the load currents and iclamp when the zero states and
signal. the FDS are applied to locate the faulty switch. As shown
in Fig. 6(c), when the zero state ccc is applied, the fault
detection algorithm identifies the possible faulty switches and,
subsequently, identifies the exact faulty switch by applying the
FDS.

1189
 10 Normal Operation Fault Tolerant Operation iA iB iC

(A)
iA iB iC
(A)

8 0

ABC
Zero State Zero State Zero State FDS State
ABC

i
0 aaa bbb ccc cca 10 Fault Detection
i

8 0.025 0.065 0.105 0.145 0.185 0.22

0.05586 0.05587 0.05588 0.05589 0.055907
(a)
(a)
4

iclamp(A)
4
(A)

2
clamp

0
0
i

4 0 0.04 0.08 0.12 0.16 0.2 0.22

0.05586 0.05587 0.05588 0.05589 0.055907
(b)
(b)

Fault Detection Signal

1.5
Fault Locate Signal

10 1

5 0

0 0.025 0.065 0.105 0.145 0.185 0.22

0.05586 0.05587 0.05588 0.05589 0.055907
(c)
Time(s)
(c)
Time(s) Fig. 7. Response of the MC system of Fig. 1 during normal, faulty, and
post-fault operating conditions: (a) three-phase load currents, (b) clamp circuit
Fig. 6. Response of the MC system of Fig. 1 to a faulty switch in Group3: current, and (c) fault detection signal.
(a) three-phase load currents, (b) clamp circuit current, and (c) Fault Locate
Signal.

for a set of predefined switching states. The study results

C. Post-fault Strategy
The system of Fig. 1 is initially in a steady-state operating
condition and the MC operates based on a SVM strategy. At
t = 0.1s, an open-switch fault is imposed on the switch S Aa .
Subsequent to the fault, the MC is controlled using MPC-
based strategy such that the load currents track their reference
values. Fig. 7 shows the response of the system before and
subsequent to the fault.
Fig. 7(a) shows the three-phase load currents of the system.
Prior to the fault occurrence and under normal operation, no
energy is transferred to the clamp circuit and as shown in
Fig. 7(b), the clamp circuit current is equal to zero. Subsequent
to the fault, the load currents are no longer balanced and,
consequently, the inductive load energy is transferred to the
clamp circuit i.e., iclamp  0. Upon occurrence of the fault, the
proposed fault detection method identifies the fault and locates
and isolates the faulty switch in 0.7ms. The MPC-based post-
fault strategy generates the required switching signals for the
remaining 8 healthy switches to operate the matrix converter
and to maintain the load current at desired reference value.
VI. Conclusion
This paper proposes a new open-switch fault detection
method to detect, locate, and isolate a faulty switch in an MC.
The proposed fault detection method is based on monitoring
the load currents and measuring the response of the MC
based on time-domain simulations demonstrate the capability
of the fault detection method. The proposed fault detection
method: (i) requires no additional installation of the voltage
transducers, (ii) is independent of the modulation strategy, and
(iii) does not require a high sampling frequency to sample the
load currents. The paper also presents an MPC-based post-
fault strategy to run the MC subsequent to a fault. A discrete
mathematical model of the system is derived and based on
the derived model, an MPC strategy is developed. Simulation
results confirm satisfactory performance of the MC under
faulty conditions when it operates based on the MPC strategy.
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