ECE 450:DIGITAL SIGNAL

PROCESSORS AND APPLICATIONS

Lecture 14

Architecture of TMS320C54x
 Last Session
Amrita School of Engineering, Bangalore

DSP Computational building blocks

Barrel Shifter
MAC unit
ALU
Architecture of TMS 320C54x Processor

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 2

 Todays Session
Amrita School of Engineering, Bangalore

Architecture of TMS 320C54x Processor

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 3

 Digital Signal Processing
Amrita School of Engineering, Bangalore

Digital Representation of Signals & Processing

of these signals
Digital Representation: Conversion of natural
analog signals to digital by sampling &
quantization.
Signal Types: Analog & Digital
Ex. Speech, image & video, biomedical,
music, radar, seismic signals (low frequency)
etc..

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 4

Amrita School of Engineering, Bangalore

Processing: Analyze, modify or extract information

from signals.
Key operations:
Convolution,correlation,filtering,transformation &
modulation
All these involve MAC operation
Applications:
Image processing (enhancement, edge detection,
denoising,animation etc), data compression,speech
recognition & analysis, communication, music, home
appliances..

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 5

 Advantages of DSP
Amrita School of Engineering, Bangalore

Flexible ( Programmable)
Less sensitive to tolerance of components
The memory & processor are fairly independent of
temperature & aging
Cheaper with better performance and compact
Cascaded easily
Easy Storage
Low power consumption
Single chip processors possible
Some signal processing operations impossible to
implement using analog technology
Low frequency signal processing possible
..
17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 6
 Disadvantages of DSP
Amrita School of Engineering, Bangalore

Increased system complexity due to additional pre and

post processing devices like ADC, DAC and complex
digital circuitry
Limited range of frequencies are available for
processing. Large bandwidth designs are too
expensive. BWs in the range of 100 MHZ are still
processed by analog methods.
Design time is more
Finite word length problems exist

Advantages outweigh disadvantages in most applications

so DSP applications are increasing rapidly

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 7

Amrita School of Engineering, Bangalore

Reference:
TMS320C54x manual available with
CCS Simulator

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 8

Amrita School of Engineering, Bangalore
Architecture of C54x
Fixed Point processor
Advanced Harvard Architecture, CISC Processor
Separate memory bus structures for program & data.
High degree of parallelism
Multiply, load/store, add/sub to/from ACC and new address
generation can be done simultaneously.
Powerful Instruction set & most of the operations are
of single cycle
Targeted for portable devices (cellular phones, MP3
players, digital cameras )

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 9

 Bus structure
Amrita School of Engineering, Bangalore

Has several address/data buses:

1. Program Bus (PB): carries instruction codes &
immediate operands from program memory to CPU.
2. Program Address Bus (PAB): provides addresses to
program memory for both read/write operations.
3. Data Bus (DB): carries data between data memory
space and CPU.
4. Data Address Bus (DAB): provides addresses to
access data memory.

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 10

 Buses in C54x
Amrita School of Engineering, Bangalore

8 major 16-bit buses

4 program / data buses
1 Program bus, PB
3 Data buses
CB & DB for READ
EB for Write

4 address buses
PAB, CAB, DAB & EAB

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 11

Amrita School of Engineering, Bangalore

All CPU registers, peripheral registers and

I/O ports occupy data memory space
17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 12
Amrita School of Engineering, Bangalore

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 13

 Buses
Amrita School of Engineering, Bangalore

Can generate upto 2 data-mem addr per cycle

ARAU0 & ARAU1
PB can carry data operands stored in program space
to MAC.
One coeff from program mem
Two data values from data mem using ARAU0 &
ARAU1
Ex: [x(i) + x(N-1-i)] * h(i)
symmetric FIR in single cycle.

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 14

 Barrel Shifter
Amrita School of Engineering, Bangalore

ALU

MAC Unit
17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore CSSU
15
 Memory organization
Amrita School of Engineering, Bangalore

Minimum address range of 192K words

64K words for program space
64K words for data space
64K words for I/O space
ROM, DARAM, SARAM, two way shared
RAM
On-chip Memory Security option
MMR: 26 CPU regs, peripheral regs and scratch
pad RAM block located on data page 0(DP0)
17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 16
 Memory Mapped Registers(MMR)
Amrita School of Engineering, Bangalore

96 registers mapped into page 0 of the data

memory space.
26 CPU reg
16 I/O port regs
Peripheral & reserved regs
Register operation == mem operation
ex: AR0 maps to mem 16h in 5x and maps to
10h in 54x.

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 17

 Central Processing Unit
Amrita School of Engineering, Bangalore

CPU Registers
40-bit ALU
Two 40-bit Acc Regs (AccA & AccB)
Barrel Shifter Supporting 0-31 bit left shift
& 0-16 bit right shift range
MAC Block
16-bit Temp Reg (T)
16-bit Transition Reg (TRN)
Compare, Select and Store Unit (CSSU)
Exponent Encoder

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 18

 Accumulators A & B
Amrita School of Engineering, Bangalore

39-32 31-16 15-0

AG AH AL

Guard bits High-Order Bits Low-Order Bits

39-32 31-16 15-0

BG BH BL

Guard bits High-Order Bits Low-Order Bits

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 19

 CPU registers
Amrita School of Engineering, Bangalore

IMR, IFR
ST0 & ST1
PMST
AR0 AR7(GPRs)
SP reg
Circular-Buffer size Register (BK)
Block-Rep Regs (BRC, RSA and REA)
PC Extension Reg (XPC)

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 20

 Next Session
Amrita School of Engineering, Bangalore

ST0,ST1,PMST registers

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 21

Amrita School of Engineering, Bangalore

Thank You

17/ 02/ 14 Dr.Shikha Tripathi,ASE, Bangalore 22