iB iC
We calculated the DC behavior of
the BJT (DC biasing) with a sim
ple largesignal model as shown. In
activelinear region, this model is
simply: vBE = 0.7 V, iC = βiB .
This model is sufficient for calcu vγ vBE vsat vCE
lating the Q point as we are only
interested in ensuring sufficient de
sign space for the amplifier, i.e., Q
point should be in the middle of
the load line in the active linear re
gion. In fact, for our good biasing
scheme with negative feedback, the
Q point location is independent of
BJT parameters. (and, therefore,
independent of model used!)
A comparison of the simple model
with the iv characteristics of the
BJT shows that our simple large
signal model is very crude and is
not accurate for AC analysis.
For example, the input AC signal results in small changes in vBE around 0.7 V (Q point) and
corresponding changes in iB . The simple model cannot be used to calculate these changes
(It assume vBE is constant!). Also for a fixed iB , iC is not exactly constant as is assumed in
the simple model (see iC vs vCE graphs). As a whole, the simple large signal model is not
sufficient to describe the AC behavior of BJT amplifiers where more accurate representations
of the amplifier gain, input and output resistance, etc. are needed.
A more accurate, but still linear, model can be developed by assuming that the changes in
transistor voltages and currents due to the AC signal are small compared to corresponding
Qpoint values and using a Taylor series expansion. Consider function f (x). Suppose we
know the value of the function and all of its derivative at some known point, x0 . Then, value
Close to our original point of x0 , ∆x is small and the high order terms of this expansion
(terms with (∆x)n , n = 1, 2, 3, ...) usually become very small. Typically, we consider only
the first order term, i.e.,
df
f (x0 + ∆x) ≈ f (x0 ) + ∆x
dx x=x0
The Taylor series expansion can be similarly applied to function of two or more variables
such as f (x, y):
∂f ∂f
f (x0 + ∆x, y0 + ∆y) ≈ f (x0 , y0 ) + ∆x + ∆y
∂x x0 ,y0 ∂y x0 ,y0
In a BJT, there are four parameters of interest: iB , iC , vBE , and vCE . The BJT iv charac
teristics plots, specify two of the above parameters, vBE and iC in terms of the other two,
iB and vCE , i.e., vBE is a function of iB and vCE (written as vBE (iB , vCE ) similar to f (x, y))
and iC is a function of iB and vCE , iC (iB , vCE ).
Let’s assume that BJT is biased and the Q point parameters are IB , IC , VBE and VCE . We
now apply a small AC signal to the BJT. This small AC signal changes vCE and iB by small
values around the Q point:
The AC changes, ∆iB and ∆vCE results in AC changes in vBE and iC that can be found
from Taylor series expansion in the neighborhood of the Q point, similar to expansion of
f (x0 + ∆x, y0 + ∆y) above:
∂vBE ∂vBE
vBE (IB + ∆iB , VCE + ∆vCE ) = VBE + ∆iB + ∆vCE
∂iB ∂vCE
∂iC ∂iC
iC (IB + ∆iB , VCE + ∆vCE ) = IC + ∆iB + ∆vCE
∂iB ∂vCE
where all partial derivatives are calculated at the Q point and we have noted that at the Q
point, vBE (IB , VCE ) = VBE and iC (IB , VCE ) = IC . We can denote the AC changes in vBE
So, by applying a small AC signal, we have changed iB and vCE by small amounts, ∆iB and
∆vCE , and BJT has responded by changing , vBE and iC by small AC amounts, ∆vBE and
∆iC . From the above two sets of equations we can find the BJT response to AC signals:
where the partial derivatives are the slope of the iv curves near the Q point. We define
Each term on the right hand side should have units of Volts. Thus, hie should have units of
resistance and hre should have no units (these are consistent with the definitions of hie and
hre .) Furthermore, the above equation is like a KVL: the voltage drop between base and
emitter is written as sum of voltage drops across two elements. The voltage drop across the
first element is hie ∆iB . So, it is resistor with a value of hie . The voltage drop across the
second element is hre ∆vCE . Thus, it is dependent voltage source.
∆i V1 = hie ∆ iB ∆i h ie
Β Β
+  B
B
+ + +
∆v V2 = hre ∆ v CE ∆v hre ∆v CE
+
ΒΕ ΒΕ


 
E E
Each term on the right hand side should have units of Amperes. Thus, hf e should have no
units and hoe should have units of conductance (these are consistent with the definitions of
hoe and hf e .) Furthermore, the above equation is like a KCL: the collector current is written
as sum of two currents. The current in first element is hf e ∆iB . So, it is dependent current
source. The current in the second element is proportional to hoe /∆vCE . So it is a resistor
with the value of 1/hoe .
∆i ∆i
C C
C C
+ hfe ∆ iB +
i1 = h fe ∆ iB
∆v 1/hoe ∆v
CE CE
i = h oe ∆v
2 CE  
E E
∆i h ie ∆i
B
Now, if put the models for BE and B
C
C
CE terminals together we arrive at + hfe ∆ iB +
* Geometric mean.
1
rπ = hie ro = β = hf e
hoe
∆i ∆i ∆i ∆i
B C B C
B C B C
+ hfe ∆ iB + β∆ i
B
∆v h ie 1/hoe ∆v rπ ro
BE =⇒ BE
_ _
E E
The above hybridπ model includes a currentcontrolled current source. This implies that
BJT behavior is controlled by iB . In reality, vBE controls the BJT behavior. A variant of the
hybridπ model can be developed which includes a voltagecontrolled current source. This
can be achieved by noting it the above model that ∆vBE = hie ∆iB and
∆vBE ∆i ∆i
B C
hf e ∆iB = hf e = gm ∆vBE B C
hie + gm ∆ vBE
hf e ∆v rπ ro
gm ≡ Transfer conductance BE
hie
_
1 hie
re ≡ = Emitter resistance
gm hf e E
As we have developed different models for DC signals (simple largesignal model) and AC
signals (smallsignal model), analysis of BJT circuits follows these steps:
DC biasing analysis: Assume all capacitors are open circuit. Analyze the transistor circuit
using the simple large signal mode as described in pp 5758.
AC analysis:
1) Kill all DC sources
2) Assume coupling capacitors are short circuit. The effect of these capacitors is to set a
lower cutoff frequency for the circuit. This is analyzed in the last step.
3) Inspect the circuit. If you identify the circuit as a prototype circuit, you can directly use
the formulas for that circuit. Otherwise go to step 3. 3) Replace the BJT with its small
signal model.
4) Solve for voltage and current transfer functions and input and output impedances (node
voltage method is the best).
5) Compute the cutoff frequency of the amplifier circuit.
Several standard BJT amplifier configurations are discussed below and are analyzed. Because
most manufacturer spec sheets quote BJT “h” parameters, I have used this notation for
analysis. Conversion to notation used in most electronic text books (rπ , ro , and gm ) is
straightforward.
Common Collector Amplifier (Emitter Follower)
VCC
DC analysis: With the capacitors open circuit, this circuit is the
same as our good biasing circuit of page 57 with Rc = 0. The R1
VCC = 0
R1
vi Cc vi Cc C
B
vo vo
E
R2 RE R1 R2 RE
C
RE
The figure above shows why this is a common collector configuration: collector is shared
between input and output AC signals. We can now proceed with the analysis. Node voltage
method is usually the best approach to solve these circuits. For example, the above circuit
will have only one node equation for node at point E with a voltage vo :
vo − v i vo − 0 vo − 0
+ − β∆iB + =0
rπ ro RE
Because of the controlled source, we need to write an “auxiliary” equation relating the control
current (∆iB ) to node voltages:
vi − v o
∆iB =
rπ
Substituting the expression for ∆iB in our node equation, multiplying both sides by rπ , and
collecting terms, we get:
" #
1 1 rπ
vi (1 + β) = vo 1 + β + rπ + = vo 1+β+
ro RE ro k R E
vo 1
Av ≡ = rπ
vi 1+
(1 + β)(ro k RE )
Unless RE is very small (tens of Ω), the fraction in the denominator is quite small compared
to 1 and Av ≈ 1.
To find the input impedance, we calculate ii by KCL:
vi vi − v o
ii = i1 + ∆iB = +
RB rπ
vi
Ri ≡ = RB
ii
Note that RB is the combination of our biasing resistors R1 and R2 . With alternative biasing
schemes which do not require R1 and R2 , (and, therefore RB → ∞), the input resistance of
the emitter follower circuit will become large. In this case, we cannot use vo ≈ vi . Using the
full expression for vo from above, the input resistance of the emitter follower circuit becomes:
vi
Ri ≡ = RB k [rπ + (RE k ro )(1 + β)]
ii
and it is quite large (hundreds of kΩ to several MΩ) for RB → ∞. Such a circuit is in fact
the first stage of the 741 OpAmp.
The output resistance of the common collector amplifier (in fact for all transistor amplifiers)
is somewhat complicated because the load can be configured in two ways (see figure): First,
RE , itself, is the load. This is the case when the common collector is used as a “current
amplifier” to raise the power level and to drive the load. The output resistance of the circuit
is Ro as is shown in the circuit model. This is usually the case when values of Ro and Ai
(current gain) is quoted in electronic text books.
VCC VCC
R1 R1
vi Cc vi Cc
vo vo
R2 RE = RL R2 RE RL
vi Cc B rπ vi Cc B rπ
E vo E vo
∆i β∆ i ∆i β∆ i
B B B B
RB ro RE RB ro RE RL
C C
Ro R’o
Alternatively, the load can be placed in parallel to RE . This is done when the common
collector amplifier is used as a buffer (Av ≈ 1, Ri large). In this case, the output resistance
is denoted by Ro0 (see figure). For this circuit, BJT sees a resistance of RE k RL . Obviously,
if we want the load not to affect the emitter follower circuit, we should use RL to be much
Substituting for ∆iB from the 2nd equation in the first and rearranging terms we get:
vT (ro ) rπ (ro ) rπ rπ rπ
Ro ≡ = ≈ = ≈ = re
iT (1 + β)(ro ) + rπ (1 + β)(ro ) (1 + β) β
io RB
Ai ≡ =
ii RE
In summary, the general properties of the common collector amplifier (emitter follower)
include a voltage gain of unity (Av ≈ 1), a very large input resistance Ri ≈ RB (and can
be made much larger with alternate biasing schemes). This circuit can be used as buffer for
matching impedance, at the first stage of an amplifier to provide very large input resistance
(such in 741 OpAmp). As a buffer, we need to ensure that RL RE . The common collector
amplifier can be also used as the last stage of some amplifier system to amplify the current
(and thus, power) and drive a load. In this case, RE is the load, Ro is small: Ro = re and
current gain can be substantial: Ai = RB /RE .
Impact of Coupling Capacitor:
Up to now, we have neglected the impact of the coupling capacitor in the circuit (assumed
it was a short circuit). This is not a correct assumption at low frequencies. The coupling
capacitor results in a lower cutoff frequency for the transistor amplifiers. In order to find the
cutoff frequency, we need to repeat the above analysis and include the coupling capacitor
When we account for impedance of the capacitor, we have set up a high pass filter in the
input part of the circuit (combination of the coupling capacitor and the input resistance of
the amplifier). This combination introduces a lower cutoff frequency for our amplifier which
is the same as the cutoff frequency of the highpass filter:
1
ωl = 2π fl =
Ri Cc
Lastly, our small signal model is a lowfrequency model. As such, our analysis indicates
that the amplifier has no upper cutoff frequency (which is not true). At high frequencies,
the capacitance between BE , BC, CE layers become important and a highfrequency small
signal model for BJT should be used for analysis. You will see these models in upper division
courses. Basically, these capacitances results in amplifier gain to drop at high frequencies.
PSpice includes a highfrequency model for BJT, so your simulation should show the upper
cutoff frequency for BJT amplifiers.
The negative sign in Av indicates 180◦ phase shift between input and output. The circuit
has a large voltage gain but has medium value for input resistance.
As with the emitter follower circuit, the load can be configured in two ways: 1) Rc is the
load. Then Ro = ro and the circuit has a reasonable current gain. 2) Load is placed in
parallel to Rc . In this case, we need to ensure that RL Rc . Little current will flow in RL
and Ro and Ai values are of not much use.
Lower cutoff frequency: Both the coupling and bypass capacitors contribute to setting
the lower cutoff frequency for this amplifier. After some involved analysis one arrives at:
1 1
ωl = 2π fl = +
Ri Cc (RE + re )Cb
same as our good biasing circuit of page 57. The bias point
currents and voltages can be found using procedure of pages 57
and 58.
AC analysis: To start the analysis, we kill all DC sources, combine R1 and R2 into RB and
replace the BJT with its small signal model. Analysis is straight forward using nodevoltage
method.
C1 ∆i ∆i
vi B B C C vo
vE − v i vE vE − v o +
β∆ iB
+ − β∆iB + =0 ∆v
rπ RE ro BE
rπ ro
RB
vo vo − v E _ E
+ + β∆iB = 0
RC ro RE
RC
vi − v E
∆iB = (Controlled source aux. Eq.)
rπ
vE vE − v i vE − v o
+β + =0
RE rπ ro
vo vo − v E vE − v i
+ −β =0
RC ro rπ
Above are two equations in two unknowns (vE and vo ). Adding the two equation together
we get vE = −(RE /RC )vo and substituting that in either equations we can find vo .
Alternatively, we can find compact and simple solutions by noting that terms containing ro
in the denominator are usually small as ro is quite large. In this case, the node equations
simplify to (using rπ /β = re ):
1 1 vi RE
vE + = → vE = vi
RE re re RE + r e
RC RC RE RC
vo = (vE − vi ) = − 1 vi = − vi
re re RE + r e RE + r e
vo RC RC
Av = =− ≈−
vi RE + r e RE
Ri = RB k [β(RE + re )] Ro = re
As before the minus sign in Av indicates a 180◦ phase shift between input and output signals.
Note the impact of negative feedback introduced by the emitter resistance. The voltage gain
is independent of BJT parameters and is set by RC and RE as RE re (recall OpAmp
inverting amplifier!). The input resistance is increased dramatically.
VCC
A Possible Biasing Problem: The gain of the common
emitter amplifier with the emitter resistance is approximately R1 RC
1 1
ωl = 2π fl = +
Ri Cc (RE2 + re )Cb
Note that if the bypass capacitor does not exist, the second term should not be included in
the expression for ωl .
R1
(RE k ro )(1 + β)
Av = ≈1 Cc
rπ + (RE k ro )(1 + β) vi
(ro ) rπ rπ
Ro = ≈ = re R2 RE
(1 + β)(ro ) + rπ β
1
2π fl =
Ri Cc
VCC
Common Emitter:
β β Rc
Av = − (Rc k ro ) ≈ − Rc = − R1 RC
rπ rπ re
vo
Ri = R B k r π vi Cc
Ro = r o
1 1 R2
2π fl = +
Ri Cc (RE + re )Cb RE Cb
RC RC VCC
Av = − ≈−
RE1 + re RE1
Ri = RB k [β(RE1 + re )] R1 RC
vo
Ro = r e
vi Cc
1 1
2π fl = +
Ri Cc (RE2 + re )Cb
R2
RE1
RE2 Cb
Example 1: Find the bias point and AC amplifier parameters of this circuit (Manufacturers’
spec sheets give: hf e = 200, hie = 5 kΩ, hoe = 10 µS).
1 rπ
rπ = hie = 5 kΩ ro = = 100 kΩ β = hf e = 200 re = = 25 Ω
hoe β
DC analysis:
9V
RB = 18 k k 22 k = 9.9 kΩ
22k 1k
22
VBB = 9 = 4.95 V
18 + 22
IE IE
KVL: VBB = RB IB + VBE + 103 IE IB = =
1+β 201 9V
3
! IC
9.9 × 10
4.95 − 0.7 = IE + 103 RB IB +
2.1 +
VCE
VBE _ _
IC +
IE = 4 mA ≈ IC , IB = = 20 µA
β −
VBB
1k
AC analysis: The circuit is a common collector amplifier. Using the formulas in page 70,
Av ≈ 1
Ri ≈ RB = 9.9 kΩ
Ro ≈ re = 25 Ω
ωl 1 1
fl = = = = 36 Hz
2π 2πRB Cc 2π × 9.9 × 10 × 0.47 × 10−6
3
1 rπ
rπ = hie = 5 kΩ ro = = 100 kΩ β = hf e = 200 re = = 25 Ω
hoe β
DC analysis:
15 V
RB = 5.9 k k 34 k = 5.0 kΩ
5.9 240 47 µ F
VBB = 15 = 2.22 V
5.9 + 34
IE IE
KVL: VBB = RB IB + VBE + 510IE IB = =
1+β 201 15 V
!
3
5.0 × 10 IC
2.22 − 0.7 = IE + 510 IB +
2.1 RB
VCE
+
IC VBE _ _
IE = 3 mA ≈ IC , IB = = 15 µA +
β − 270 + 240
VBB = 510
KVL: VCC = 1000IC + VCE + 510IE
VCE = 15 − 1, 510 × 3 × 10−3 = 10.5 V
DC Bias summary: IE ≈ IC = 3 mA, IB = 15 µA, VCE = 10.5 V
AC analysis: The circuit is a common collector amplifier with an emitter resistance. Note
that the 240 Ω resistor is shorted out with the bypass capacitor. It only enters the formula
for the lower cutoff frequency. Using the formulas in page 70:
RC 1, 000
Av = = = 3.39
RE1 + re 270 + 25
Ri ≈ RB = 5.0 kΩ
Ro ≈ re = 25 Ω
ωl 1 1
fl = = + =
2π 2πRi Cc 2π(RE2 + re )Cb
1 1
+ = 20 Hz
2π5.0 × 10 × 4.7 × 10
3 −6 2π(240 + 25)47 × 10−6
1 rπ
rπ = hie = 5 kΩ ro = = 100 kΩ re = = 25 Ω
hoe β R1 RC
vo
vi Cc
The prototype of this circuit is a common emitter amplifier with an
emitter resistance. Using formulas of page 70 (re = rπ /hf e = 25 Ω), R2
RE
RC RC
Av  = ≈ =4
RE + r e RE
−3 −
15 − 7.5 = 3 × 10 (RC + RE ) → RC + RE = 2.5 kΩ VBB
RE
RC
=4 → 4RE + RE = 2.5 kΩ → RE = 500 Ω, RC = 2. kΩ
RE
Commercial values are RE = 510 Ω and RC = 2 kΩ. Use these commercial values for the
rest of analysis.
We need to check if VE > 1 V, the condition for good biasing. VE = RE IE = 510×3×10−3 =
1.5 > 1, it is OK (See next example for the case when VE is smaller than 1 V).
We now proceed to find RB and VBB . RB is found from good bias condition and VBB from
a KVL in BE loop:
R1 R2
RB = R 1 k R 2 = = 5 kΩ
R1 + R 2
VBB R2 2.28
= = = 0.152
VCC R1 + R 2 15
R1 can be found by dividing the two equations: R1 = 33 kΩ. R2 is found from the equation
for VBB to be R2 = 5.9 kΩ. Commercial values are R1 = 33 kΩ and R2 = 6.2 kΩ.
Lastly, we have to find the value of the coupling capacitor:
1
ωl = = 2π × 100
Ri Cc
1 rπ
rπ = hie = 5 kΩ ro = = 100 kΩ re = = 25 Ω
hoe β R1 RC
vo
The prototype of this circuit is a common emitter amplifier with an vi Cc
VCC = RC IC + VCE + RE IE
15 − 7.5 = 3 × 10−3 (RC + RE ) → RC + RE = 2.5 kΩ
RC
= 10 → 10RE + RE = 2.5 kΩ → RE = 227 Ω, RC = 2.27 kΩ
RE
We need to check if VE > 1 V which is the condition for good VCC
biasing: VE = RE IE = 227 × 3 × 10−3 = 0.69 < 1. Therefore,
we need to use a bypass capacitor and modify our circuits as is R1 RC
shown. vo
RC
VE = (RE1 + RE2 )IE
iC
1
RE1 + RE2 = = 333 RB iB +
3 × 10−3 +
vCE
vBE _ _
+
Now, solving for RC , RE1 , and RE2 , we find RC = 2.2 kΩ, − RE1 + RE2
RE1 = 220 Ω, and RE2 = 110 Ω (All commercial values). VBB
RB (β + 1)(RE1 + RE2 )
RB = 0.1(βmin + 1)(RE1 + RE2 ) = 0.1 × 101 × 330 = 3.3 kΩ
KVL: VBB = RB IB + VBE + RE IE
3 × 10−3
VBB = 3.3 × 103 + 0.7 + 330 × 3 × 10−3 = 1.7 V
201
R1 R2
RB = R 1 k R 2 = = 3.3 kΩ
R1 + R 2
VBB R2 1
= = = 0.066
VCC R1 + R 2 15
1 1
ωl = + = 2π × 100
Ri Cc RE2 Cb
This is one equation in two unknown (Cc and CB ) so one can be chosen freely. Typically
Cb Cc as Ri ≈ RB RE . Using Ri ≈ RB = 3.3 kΩ and choosing Cb = 47 µF, one find
Cc = 0.7 µF (commercial value of 0.68 µF).
So, are design values are: R1 = 50 kΩ, R2 = 3.6 kΩ, RE1 = 220 Ω, RE2 = 110 Ω, RC =
2.2 kΩ, Cb = 47 µF, and Cc = 680 nF.