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IRF720

Data Sheet January 2002

3.3A, 400V, 1.800 Ohm, N-Channel Power Features


MOSFET 3.3A, 400V
This N-Channel enhancement mode silicon gate power field
rDS(ON) = 1.800
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers, Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
High Input Impedance
These types can be operated directly from integrated
circuits. Related Literature
- TB334 Guidelines for Soldering Surface Mount
Formerly developmental type TA17404.
Components to PC Boards

Ordering Information Symbol


PART NUMBER PACKAGE BRAND
D
IRF720 TO-220AB IRF720

NOTE: When ordering, use the entire part number.


G

Packaging
JEDEC TO-220AB

SOURCE
DRAIN
GATE

DRAIN (FLANGE)

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


IRF720

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified


IRF720 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 400 V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 400 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 3.3 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 2.1 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 13 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS 20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 50 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 190 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250A, VGS = 0V, (Figure 10) 400 - - V
Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250A 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 A
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 A
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 3.3 - - A
Gate to Source Leakage Current IGSS VGS = 20V - - 100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 1.8A, VGS = 10V, (Figures 8, 9) - 1.5 1.8
Forward Transconductance (Note 2) gfs VDS 10V, ID = 2.0A, (Figure 12) 1.7 2.7 - S
Turn-On Delay Time td(ON) VDD = 200V, ID 3.3A, RGS = 18, VGS = 10V, - 10 15 ns
RL = 59
Rise Time tr - 14 21 ns
MOSFET Switching Times are Essentially Independent
Turn-Off Delay Time td(OFF) of Operating Temperature - 30 45 ns
Fall Time tf - 13 20 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID = 3.3A, VDS = 0.8 x Rated BVDSS - 12 20 nC
(Gate to Source + Gate to Drain) IG(REF) = 1.5mA, (Figure 14)
Gate Charge is Essentially Independent of Operating
Gate to Source Charge Qgs - 2.0 - nC
Temperature
Gate to Drain Miller Charge Qgd - 6.0 - nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz, (Figure 10) - 360 - pF
Output Capacitance COSS - 55 - pF
Reverse Transfer Capacitance CRSS - 20 - pF
Internal Drain Inductance LD Measured From the Contact Modified MOSFET - 3.5 - nH
Screw on Tab to Center of Die Symbol Showing the
Internal Device
Measured From the Drain - 4.5 - nH
Inductances
Lead, 6mm (0.25in) From
D
Package to Center of Die
Internal Source Inductance LS Measured From the Source LD - 7.5 - nH
Lead, 6mm (0.25in) from
Header to Source Bonding G
Pad LS

Thermal Resistance, Junction to Case RJC - - 2.5 oC/W

Thermal Resistance, Junction to Ambient RJA Free Air Operation - - 80 oC/W

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


IRF720

Source to Drain Diode Specifications


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol D - - 3.3 A
Showing the Integral
Pulse Source to Drain Current (Note 3) ISDM - - 13 A
Reverse P-N Junction
Rectifier
G

S
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 3.3A, VGS = 0V, (Figure 13) - - 1.6 V
Reverse Recovery Time trr TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s 120 - 600 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s 0.64 - 3.0 C
NOTES:
2. Pulse test: pulse width 300s, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 31H, RGS = 25, peak IAS = 3.3A.

Typical Performance Curves Unless Otherwise Specified

1.2 5
POWER DISSIPATION MULTIPLIER

1.0
4
ID, DRAIN CURRENT (A)

0.8
3

0.6
2
0.4

1
0.2

0 0
0 50 100 150 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

3.0

0.5
THERMAL IMPEDANCE (oC/W)

1.0

0.2
ZJC, TRANSIENT

0.1

0.05 PDM
0.1
0.02
0.01 t1
t2
NOTES:
SINGLE PULSE DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC + TC
0.01
10-5 10-4 10-3 10-2 0.1 1 10
t1 , RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


IRF720

Typical Performance Curves Unless Otherwise Specified (Continued)

100
5
OPERATION IN THIS VGS = 10V
AREA MAY BE VGS = 6.0V
LIMITED BY rDS(ON)
4
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)


10s PULSE DURATION = 80s
10 DUTY CYCLE = 0.5% MAX
3 VGS = 5.5V
100s

1ms 2
1
VGS = 5.0V
10ms 1
TJ = MAX RATED
TC = 25oC VGS = 4.0V VGS = 4.5V
SINGLE PULSE DC
0.1 0
1 10 102 103 0 40 80 120 160 200
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5 10
PULSE DURATION = 80s PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX VGS = 10V DUTY CYCLE = 0.5% MAX
VDS 50V
4
ID, DRAIN CURRENT (A)

VGS = 6.0V
ID, DRAIN CURRENT (A)

1
3
VGS = 5.5V

2 TJ = 150oC TJ = 25oC
0.1
VGS = 5.0V
1
VGS = 4.0V VGS = 4.5V

0 0.01
0 3 6 9 12 15 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

10 3.0
PULSE DURATION = 80s PULSE DURATION = 80s
rDS(ON), NORMALIZED ON RESISTANCE

DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX


VGS = 10V, ID =1.8A
8
rDS(ON), DRAIN TO SOURCE

2.4
ON RESISTANCE

6 VGS = 20V 1.8

4 1.2
VGS = 10V

2 0.6

0 0
0 3 6 9 12 15 -60 -40 -20 0 20 40 60 80 100 120 140 160
ID, DRAIN CURRENT (A) TJ, JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON


VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


IRF720

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 1000
ID = 250A VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD


1.15 800 CRSS = CGD
COSS CDS + CGS
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 600

CISS
0.95 400
COSS
CRSS
0.85 200

0.75
0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1 2 5 10 2 5 102
TJ, JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

5 102
PULSE DURATION = 80s PULSE DURATION = 80s
ISD, SOURCE TO DRAIN CURRENT (A)
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
gfs, TRANSCONDUCTANCE (S)

4
TJ = 25oC
10
3

2 TJ = 150oC
TJ = 150oC TJ = 25oC
1

0 0.1
0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 2.0
ID , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 3.3A
VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 320V
16

12 VDS = 80V

8
VDS = 200V

0
0 4 8 12 16 20
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


IRF720

Test Circuits and Waveforms

VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS


+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG 0
-
DUT 90%

VGS 50% 50%


PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
VDD

SAME TYPE Qg(TOT)


VGS
12V AS DUT Qgd
0.2F 50k
BATTERY
0.3F Qgs

D
VDS

G DUT
0

IG(REF) S
0 IG(REF)
VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

2002 Fairchild Semiconductor Corporation IRF720 Rev. B


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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
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failure to perform when properly used in accordance support device or system, or to affect its safety or
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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4
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