IC Design of

Power Management Circuits (I)

Wing-Hung Ki
Integrated Power Electronics Laboratory
ECE Dept., HKUST
Clear Water Bay, Hong Kong
www.ee.ust.hk/~eeki

International Symposium on Integrated Circuits

Singapore, Dec. 14, 2009
 Tutorial Content

1. Switching Converters: Fundamentals and Control

2. Switching Converters: IC Design

3. Switching Converters: Stability and Compensation

4. Fundamentals of Bandgap References

5. Development of Integrated Charge Pumps

6. Introduction to Low Dropout Regulators

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 Part I

Switching Converters:
Fundamentals and Control

Ki 3
 Content

Steady State Analysis

Lossless elements
Buck, boost, buck-boost power stages
Volt-second balance
Continuous conduction mode
Discontinuous conduction mode
Ringing suppression
Pseudo-continuous conduction mode
Efficiency

Performance Evaluation Parameters

Control Topologies
PWM voltage mode control
PWM current mode control

Single-Inductor Multi-Input Multi-Output Converters

Ki 4
 Linear Regulator has Low Efficiency

Idd
MN Vo
IQ1 IQ2 IQ3 Io

VREF
Vdd R1
EA
bVo RL
C
R2

power converter

Efficiency of linear regulator is not high:

Po VI V Io V
= = o o = o < o <1
Pin VddIdd Vdd Io + IQ Vdd

Can one design a power converter with efficiency close to 1?

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 Switches as Lossless Components

A power converter with high efficiency needs lossless components.

Reactive elements: capacitors, inductors
Active elements: switches

Isw Isw
+ +
L Vsw Vsw
C

store & store & switch open switch closed

relax relax
Psw = VswIsw Psw = VswIsw
PC = 0 PL = 0 = Vsw0 = 0Isw
=0 =0

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 Switching Converter: Heuristic Development (1)

Vo Vo = Vdd

Vdd RL
t
No regulation

Vo Vo = DVdd
SW1 Vdd

Vdd RL
t
Load cannot accept a
duty ratio = D pulsating supply voltage

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 Switching Converter: Heuristic Development (2)

Add a lossless filter to

Vo achieve small ripple voltage,
SW1 L
but
Vdd
when switch is off, inductor
RL
C current cannot change
instantaneously and cause
spark (volt-second balance).

Vx
Vo
SW1 L Vdd
Vo = DVdd
Vdd SW2 RL
C
t

Add a second switch that operates complementarily to arrive at

a functional switching converter.
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 Buck, Boost and Buck-Boost Converters (1)

Vx
Vo One L and one C gives a second
SW1 L order switching converter.
Vdd SW2 RL
C

Buck C has to be in parallel with RL for

filtering, leaving three ways to place
Vx
Vo L, SW1 and SW2 between Vdd and RL.
L SW2
Vdd SW1 RL
C
Three types of converters:
Boost Step-down: buck
Step-up: boost
Vx
Vo Step-up/down: buck-boost
SW1 SW2
Vdd L
C
RL (Boost-buck, or Cuk, is a 4th order
converter)
Buck-boost
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 Buck, Boost and Buck-Boost Converters (2)
state 1
Vx L Vo SW1 is the controlling switch that
MN iA
determines the duty ratio D, while SW2
Vdd D1
C
RL provides a path for the inductor
state 2
current iA to flow when SW1 is off.
Buck
state 2
L Vx
Vo SW1 can be a power NMOS (MN). If
iA D1 power PMOS is used, the phase has to
Vdd MN
C
RL be reversed.
state 1

Boost
To prevent iA from going negative, SW2
Vx D1
MN Vo is usually implemented by a diode
iA (D1), but the forward drop gives a low
Vdd
C
RL efficiency.
state 1 L state 2

Buck-Boost Note that Vo of buck-boost is negative.

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 I-V Relations of C and L

The I-V characteristics of a capacitor and an inductor are described by

ic + iA +
dv c diA
ic = C vc vA = L L vA
dt C dt

Approximations are very useful in many calculations:

Vc iA
ic = C vA = L
t t

For sinusoidal steady state, the phasor relations are:

vc 1 vA
zc = = zA = = j L
ic jC iA

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 Volt-Second Balance

Switching actions cause ripples for both inductor current (iA) and
capacitor voltage (vc). In the steady state, both quantities return
to the same value after one cycle.
VA (S1 ) VA (S2 ) iA
+ vA = m1 = m2
L L
iA

L IA IA

diA VA
vA = L IA = t
dt L 0A
t1 t2
(or DT) (or D ' T)

Inductor current has to obey volt-second balance (VS balance):

VA(S1)t1 + VA(S2)t2 = 0
m1t1 = m2t2 or m1D = m2D
It is used to compute the conversion ratio M = Vo/Vdd.
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 Inductor, Input, Switch, Diode and Tail Currents

iA
Consider the buck converter:
is
idd Vx L it
Vo
MN iA ic Io idd
Vdd D1 id RL
C

Input current idd: current through Vdd is

Switch current is: iA in State 1
Diode current id: iA in State 2; even if diode
is implemented by NMOS switch
id
Tail current it: current through the
combination of C and RL.
Capacitor current ic: ac part of tail current
it
Load current io: averaged tail current Io
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 Continuous Conduction Mode

The converter is operating in continuous conduction mode (CCM)

if the inductor current is always larger than zero.

Buck converter Boost converter Buck-boost converter

(Step-down) (Step-up) (Step-up/down)
Vdd Vo Vdd Vo Vdd Vo
S1 + VA + VA S2 S1 S2
+
S2 S1 VA

m1D = m2D m1D = m2D m1D = m2D

(Vdd-Vo)D = VoD VddD = (Vo-Vdd)D VddD = -VoD
V0 V0 1 V0 D
M= =D M= = M= =
Vdd Vdd 1 D Vdd 1 D

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 Discontinuous Conduction Mode

When the switching converter is operation in CCM, one switching

cycle has two states S1 and S2. When the load current becomes
smaller and smaller, eventually the inductor current would fall to
zero, and the converter then operates in discontinuous conduction
mode (DCM) with a third state S3. During D3T, all switches are open.

VA (S1 ) VA (S2 ) iA
= m1 = m2
L L
VA (S3 )
=0 IA
L

iA = 0
DT D2 T D3 T

VS balance becomes:
m1D = m2D2
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 Ringing Suppression

When both switches are open, L, We may add a small switch to

C and the parasitic capacitor Cx short the inductor when SW1
at Vx form a resonance circuit and SW2 are both off [Jung 99].
that leads to serious ringing. SW3
Vx Vx
Vo Vo
SW1 L SW1 L
Vdd Vdd

SW2 RL SW2 RL
Cx C Cx C

iA iA

Vdd
Vo

Vx Vx
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 Pseudo-Continuous Conduction Mode

By increasing the size of the ringing suppression switch, a switching

converter may work in pseudo-continuous mode (PCCM). It was first
employed in a single-inductor dual-output (SI-DO) converter to
increase the current handling capability [Ma 03b]. When both SW1
and SW2 are open, the freewheel switch SWFW is closed to allow
free-wheeling of iA at Ipccm.
SWFW

L
Vx
Vo iA
SW1 iA

Vdd Ipccm
SW2 RL
C

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 Efficiency of Buck Converter

Rs
Idd Io
Vo
S1 L
RA
S2 Po VI
Vdd = = o o
C
RL Pdd VddIdd
Rd

For an ideal buck converter working in CCM, the conversion ratio M

is Vo/Vdd = D, and Io:Idd = 1:D, giving =1. If conduction loss is
accounted for, then Io/Idd is still 1/D, but M is modified as M=D,
with
P 1
= o =
Pdd R + DR s + D 'R d
1+ A
RL

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 Efficiency of 2nd Order Converters

By accounting for conduction losses due to switch, diode and inductor

series resistance (Rs, Rd and RA, respectively), the efficiencies of buck,
boost and buck-boost converters are computed as [Ki 98]

1
Buck: buck =
R + DR s + D 'R d
1+ A
RL

1
Boost: boost =
1 R + DR s + D 'R d
1+ 2 A
D' RL

1
Buck-boost: buck boost =
1 R + DR s + D 'R d
1+ 2 A
D' RL

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 Performance Evaluation Parameters

For a good voltage regulator, the output voltage should remain

constant even the input voltage, load current or temperature changes.

Steady state parameters:

Line regulation
Load regulation
Temperature coefficient

Small signal parameters:

Power supply rejection
Output impedance

Transient parameters:
Line transient (settling times)
Load transient (settling times)
Reference tracking time

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 Line Regulation

Line regulation is the change of Vo w.r.t. the change in Vdd:

Vo
line reg. = in mV / V
Vdd
Vo / Vo
= in % / V
Vdd

Switching converters are non-linear circuits for large signal changes,

and hand analysis is impossible. It could be obtained by simulation.
In datasheets, line regulation is usually measured.

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 Power Supply Rejection

For a good switching converter (also for bandgap reference and

linear regulator), the output voltage should be a weak function w.r.t.
the supply voltage. Hence, a small signal parameter, the power
supply rejection, gives good indication of line regulation.

Power supply rejection (PSR) is the small signal change of Vo w.r.t.

the small signal change in Vdd.
vo
In transfer function form: PSR =
v dd

v dd
In dB: PSR = 20 log
vo
Usually |vo/vdd| < 1, but we customarily give a positive PSR in dB.

Note: Line reg. PSR Vdd

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 Load Regulation and Output Impedance

Load regulation is the change of Vo w.r.t. the change in Io:

Vo
load reg. = in mV / mA
Io
Vo / Vo
= in % / mA
Io

In datasheets, load regulation is usually measured.

In the small signal limit, load regulation is the output impedance:

dVo
Ro = in
dIo

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 Temperature Coefficient

Temperature coefficient (TC) is the change of a parameter X w.r.t.

the change in T, and is a large signal parameter:

X X(T2 ) X(T1 ) in [X] / o C

TC = =
T T2 T1
X / X in ppm / o C
=
T

TC could be positive or negative.

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 PWM Voltage Mode Control (1)

A regulated switching converter consists of the power stage and

the feedback circuit.

MP Vo
L

Vg MN RL
C ck
R1 ramp va
va EA bVo
CMP A(s) Q
Q R Vref
R2
Q
Q S va
ramp
ck

For a buck converter, if an on-chip charge pump is not available,

then the NMOS power switch is replaced by a PMOS power switch.
Ki 25
 PWM Voltage Mode Control (2)

The output voltage Vo is scaled down by the resistor string R1 and

R2. The scale factor is b = R2/(R1+R2).

The scaled output voltage bVo is compared to the reference

voltage Vref to generate a lowpass filtered voltage Va through the
compensator A(s).

At the start of the clock, the SR latch is set and the switch MP is
turned on, starting the duty cycle. A sawtooth waveform (ramp)
synchronized with the clock ramps up.

When the ramp reaches the level of Va (trip point), the SR latch is
reset, terminating the duty cycle.

When the SR latch is set, iA ramps up. When the SR latch is reset,
iA ramps down. In the steady state, iA returns to the same level at
the start of every clock cycle.
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 PWM Feedback Action

For stability, the control loop has to have negative feedback.

Assume Vo drops suddenly due to change in load or disturbance

error voltage Verr = (VrefbVo) becomes larger
Va = A(f)(VrefVo) also becomes larger
with a higher Va, it takes the ramp longer to reach Va
duty ratio D is temporarily increased
more current is dumped into the load
Vo rises accordingly and eventually settles to the original
value

Note that A(s) is the frequency response of the compensator,

not of the op amp Aop(s).

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 PWM Current Mode Control

A current mode controlled switching converter is realized by replacing

the fixed voltage ramp with the inductor current ramp.
L
MP Vo
iA
Vdd MN RL
C
R1

va EA bVo
CMP A(s)
Q R Vref
R2
Vdd
Q S current
sensor
iA / N
ck va

NR f iAR f

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 Sub-harmonic Oscillation and Slope Compensation

Output of EA Va cannot change in one cycle. If inductor current is

perturbed by an amount of I1, oscillation occurs if
I2 m2
= > 1 D > 0.5
I1 m1
Ia = Va / R f Ia = Va / R f
D < 0.5 m1 m2 D > 0.5
m1 m2
I1
I2 I1
I2

To prevent oscillation, employ slope compensation by adding a negative

slope to Ia (i.e., Va) to suppress the change in I2.
Ia = Va / R f

mc I2 m m2 m
= c < 1 mc > 2
I1 mc + m1 2

m1 m2
I1 29
Ki I2
 Current Mode PWM with Compensation Ramp

In practice, the output of EA (Va) should not be tempered, and a

compensation ramp of +mc is added to m1 instead.
L
MP Vo
iA
Vdd MN RL
C
R1

va EA bVo
CMP A(s)
Q R Vref
R2
Vdd
Q S
iA / N
(m1 + mc )R f (m2 mc )R f V2I
va ck
vb vb
NR f ramp from OSC
DT compensation
Ki ramp 30
 Synchronous Rectification

To eliminate loss due to forward diode drop, the power diode is

replaced by a power NMOS MN, and the scheme is known as
synchronous rectification. To eliminate short-circuit loss of MP and
MN, a break-before-make (BBM) buffer is used.
L
Q, VP
MP
iA
Vdd MN RL
VN
C

VP VN
Q R 1 =
BBM Q
1 VP
Buffer Q S (ck) 1

2 = VN
Additional logic is needed 2 2
for DCM operation.
Ki Non-overlapping 1 and 2 31
 Multiple-Output Converters

Consider two boost converters that operate in deep DCM:

L
Vo1
S1 iA1
iA1
Vdd S0 R L1
C1

T 2T
L
Vo2
S2 iA 2
iA 2
Vdd S0 R L2
C2

T 2T

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 Single-Inductor Multiple-Output Converters

Time-multiplexing allows sharing one inductor and diverting the

inductor current to two or more outputs [Ma 03a]:

Vo1 iA
S1

L R L1
C1
iA
Vdd S0 T 2T
Vo2
S2

R L2
C2

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 SIMO Converter in PCCM

To handle large load currents, raise the inductor current floor to

operate in PCCM. Add a free-wheeling switch (SFW) to short the
inductor when the inductor current reaches Ipccm [Ma 03b].

SFW Vo1
S1 iA

R L1
L C1
iA
Vdd S0 T 2T
Vo2 iA
S2

R L2
C2 Ipccm

T 2T

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 SI-MIMO Converter

Some applications need two converters in series with reduce efficiency.

Vbat
Vload

Vsrc

Energy-harvesting Boost 1 Rechargeable Boost 2 Load

source battery

Reorganize by using a SI-DIDO converter that needs only one inductor

[Lam 04b], [Lam 07b], [Sze 08].

Vbat Vbat

Vload

Vsrc

Energy-harvesting SI-DIDO boost Load Rechargeable

source battery 35
Ki
 Development of SI-MO and SI-MIMO Converters

The recent years sees active R&D activities of SI-MO and SI-MIMO
switching converters for low power applications. It is important to
recognize the contribution of the first developers.
The idea of SI-MO converters was first conceived in [Goder 97], and
only boost sub-converters were considered.
An SI-DO converter with buck-boost sub-converters was discussed in
[Ma 97] to demonstrate the switching flow graph modeling method.
SI-DO converters became commercial products [MAX 98, UCC 99].
The concept of SI-MO was reinvented [Li 00, Ma 00, Ma 01, May
01]. [Ma 01] stressed the importance of DCM operation for reducing
cross-regulation. A systematic classification is discussed in [Ki 01].
DCM operation is extended to PCCM operation in [Ma 02].
The concept of SI-MIMO was conceived [Lam 04, Lam 07].

Ki 36
 References: Switching Converter Fundamentals

Books:
[Brown 01] M. Brown, Power Supply Cookbook, EDN, 2001.
[Erickson 01] R. W. Erickson and D. Maksimovic, Fundamentals of Power
Electronics, 2nd Edition, Springer Science, 2001.
[Kassakian 91] J. G. Kassakian, M. F. Schlecht and G. C. Verghese, Principle
of Power Electronics, Addison Wesley, 1991.
[Krein 98] P. E. Krein, Elements of Power Electronics, Oxford, 1998.

Papers:
[Jung 99] S. H. Jung et. al., "An integrated CMOS DC-DC converter for
battery-operated systems," IEEE Power Elec. Specialists Conf.,
pp. 4347, 1999.
[Ki 98] W. H. Ki, "Signal flow graph in loop gain analysis of DC-DC PWM
CCM switching converters," IEEE TCAS-1, pp.644-655, June
1998.

Ki 37
 References: Early Development of SI-MIMO Converters (1)

[Goder 97] D. Goder and H. Santo, Multiple output regulator with time sequencing, US
Patent 5,617,015, April 1, 1997.
[Ma 97] Y. H. Ma and K. M. Smedley, "Switching flow-graph nonlinear modeling
method for multistate-switching converters," IEEE Trans. on Power Elec.,
pp.854861, Sept., 1997.
[MAX 98] "MAX685: Dual-output (positive and negative) DC-DC converter for CCD and
LCD", Maxim Datasheet, 1998.
[UCC 99] "UCC3941: 1V synchronous boost converter," Datasheet, Unitrode
Semiconductor Products, Jan. 1999.
[Li 00] T. Li, "Single inductor multiple output boost regulator," US Patent 6,075,295,
June 13, 2000.
[Ma 00] D. Ma and W. H. Ki, "Single-inductor dual-output integrated boost converter
for portable applications," 4th Hong Kong IEEE Workshop on SMPS, pp. 42-
51, Nov. 2000.

Ki 38
 References: Early Development of SI-MIMO Converters (2)

[Ma 01a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A single-inductor dual-output
integrated DC/DC boost converter for variable voltage scheduling",
IEEE/ACM Asia South Pacific Design Automation Conf., LSI University Design
Contest, pp.1920, Jan. 2001.
[May 01] M. W. May, M. R. May and J. E. Willis, "A synchronous dual-output switching
dc-dc converter using multibit noise-shaped switch control," IEEE Intl Solid-
State Circ. Conf., pp.358359, Jan 2001.
[Ma 01b] D. Ma, W. H. Ki, P. Mok and C. Y. Tsui, "Single-inductor multiple-output
switching converters with bipolar outputs", IEEE Int'l. Symp. on Circ. and
Syst., pp. III-301 - III-304, Sydney, May 2001.
[Ma 01c] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A 1.8V single-inductor dual-output
switching converter for power reduction techniques," IEEE Symp. on VLSI
Circ., Kyoto, Japan, pp. 137-140, June 2001.
[Ki 01] W. H. Ki and D. Ma, "Single-inductor multiple-output switching converters",
IEEE Power Elec. Specialists Conf., Vancouver, Canada, pp.226231, June
2001.
[Ma 02] D. Ma, W.H. Ki, and C.Y. Tsui, "A pseudo-CCM / DCM SIMO switching
converter with freewheel switching", IEEE Int'l SolidState Circ. Conf., San
Francisco, pp.390391+476. Feb. 2002.

Ki 39
 References: Early Development of SI-MIMO Converters (3)

[Ma 03a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor multiple-output

switching converters with time-multiplexing control in discontinuous
conduction mode," IEEE J. of Solid-State Circ., pp. 89-100, Jan. 2003.
[Ma 03b] D. Ma, W. H. Ki and C. Y. Tsui, "A pseudo-CCM/DCM SIMO switching
converter with freewheel switching," IEEE J. of Solid-State Circ., pp. 1007-
1014, June 2003.
[Lam 03] Y. H. Lam, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor dual-input dual-
output switching converter for integrated battery charging and power
regulation," IEEE Int'l. Symp. on Circ. and Syst., Bangkok, Thailand, pp.
III.447-III.450, May 2003.
[Lam 04] H. Lam, W. H. Ki, C. Y. Tsui and D. Ma, "Integrated 0.9V charge-control
switching converter with self-biased current sensor," IEEE Int'l Midwest
Symp. on Circ. & Sys., pp.II.305II.308, July 2004.
[Koon 05] S. C. Koon, Y. H. Lam and W. H. Ki, "Integrated charge-control single-
inductor dual-output step-up/step-down converter," IEEE Int'l. Symp. on
Circ. and Syst., Kobe, Japan, pp. 3071-3074, May 2005.
[Lam 07] Y. H. Lam, W. H. Ki and C. Y. Tsui, "Single-inductor multiple-input multiple-
output switching converter and method of use," US Patent 7,256,568, Aug
14, 2007.
[Ma 09] D. Ma, W. H. Ki, and C. Y. Tsui, "Single-inductor multiple-output switching
converters in PCCM with freewheel switching," US Patent 7,432,614, Oct. 7,
2008.
Ki 40