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______________________________________________________________________________
ANALOG ELECTRONICS
AND
DIGITAL ELECTRONICS
LAB MANUAL
NAME : _________________________________________________________________
USN : _________________________________________________________________
YEAR : _________________________________________________________________
INSTRUCTIONS
___________________________________________________________________________ 1
7. In the first half an hour of your Lab. session start, take required Components,
Instruments from the counter by submitting the Components Issue Slip
(according to experiment) .
9. After completing the circuit connection, consult with the staff member before
switching it ‘ON’.
10. The CRO once switched ‘ON’ need not switched ‘OFF’ till the completion of the
experiment.
11. Before switching ‘ON’ Power Supply and Function Generator , make sure that the
Voltage/Amplitude control knob of these Instruments are at their minimum
position and
while switching ‘OFF’ the circuit, first switch ‘OFF’ the Function Generator and
then the Power Supply.
12. Be sure about the result expected and set the instruments in the expected range.
13. After the completion of the experiment arrange all patch cords, CRO Probes and
Instruments properly on the table and ensure that all AC Power Supply switches
of the working table are switched ‘OFF’.
___________________________________________________________________________ 2
CONTENTS
9. OP-Amp Applications 45
i) Inverting Amp.
ii) Non-Inverting Amp.
iii) Voltage Follower
___________________________________________________________________________ 3
R C COUPLED AMPLIFIER
TABULAR COLUMN:
Vin = 50 mVp-p
___________________________________________________________________________ 4
EXPERIMENT NO: 01
RC – COUPLED AMPLIFIER
7. DRB -- 01
8. Resistors 270 Ω 01
1 KΩ 02
4.7 KΩ 01
27 KΩ *(all ½ Watt) 01
9. Transistor SL 100 01
10. Patch cords, Connecting Wires,etc.
PROCEDURE:
A] To find Q point:
___________________________________________________________________________ 5
DESIGN:
Let VCC = 12 Vdc IC = 4.5 mA, β = 100(for SL 100)
Choose VE = VCC / 10 = 12/10 = 1.2 V
VE = IERE = 1.2 V
RE = 1.2/Ic = 1.2/4.5mA = 0.267 KΩ (IE ≈ IC)
RE = 270 Ω
R2
1.9 = 12 ×
R1 + R2
R2 1.9
= = 0.158
R1 + R2 12
R2 = 0.158R1 + 0.158R2
0.8416R2 = 0.158R2
R1 = 5.33R2
Let us assume R2 = 4.7KΩ
∴
R1 = 25 KΩ
Choose R1 = 27KΩ
1 R
At f = 100 Hz; = E
2πfce 10
10
∴C E = = 59 µF
2π ×100 × 270
Choose CE = 47 µF (electrolytic)
Cc1 and CC2: Assume CC1= CC2=0.47 µF (ceramic)
To design:
( hie || Rb ) Rc || RL )
Xcc 1 = Xcc 2 =
10 10
1 1
Xcc 1 = Xcc 2 =
2πCc 1 2πCc 2
CC1 =? CC2 =?
PROCEDURE:
___________________________________________________________________________ 6
1) Connect the circuit as shown in Fig. No. (1), set VCC = 12 V D.C.
3) Keep the frequency of the Function Generator in mid band range i.e. around
2 KHz. Increase amplitude of input signal till the output signal is undistorted.
(CRO at output)
The ratio [Vo / Vi] max gives the maximum undistorted gain (Amid) of the amplifier.
4) Now Vary the input sine wave frequency from 10 Hz to 1 MHz in suitable
steps and measure the output Vo of the Amplifier at each step using CRO or AC
Millivoltmeter (The input Vi must remain constant through the Frequency range).
5) Note down the reading in table given and plot the graph of frequency v/s.
Gain in dB, determine Bandwidth and G.B.W product (G.B.W. = Amid x B.W.).
PROCEDURE:
C] To measure Zi:
4) Increase DRB till Vo = Va/2. The corresponding DRB value gives Zi.
D] To measure Zo:
4) Decrease DRB till Vo = Vb/2. The corresponding DRB value gives Zo.
Fig. No (3)
TO MEASURE Zi:
Fig. No (4)
TO MEASURE Zo:
Fig. No
(5)
RESULT:
1] Q Point : ________________________
___________________________________________________________________________ 8
**************************************************************************
BJT Darlington Emitter Follower
___________________________________________________________________________ 9
TABULAR COLUMN:
Vin = 1V (p-p)
SL FREQUENCY Vo(p-p) Av=Vo/Vi POWER GAIN
NO in Hz in Volts in dB= 20log10 Av
EXPERIMENT NO: 02
___________________________________________________________________________ 10
PROCEDURE:
A] To find Q point:
2) Apply a sine wave of 1 V peak to peak amplitude (Vi = 1V p-p) from the
Function Generator.
3) Vary the input sine wave frequency from 10 Hz to 1 MHz in suitable steps and
measure the output Vo of Darlington Emitter Follower circuit at each step
using CRO or AC milivoltmeter (The input Vi must remain constant through
the Frequency range).
4) Note down the reading in table given and plot the graph of frequency v/s.
Gain in dB.
DESIGN:
Let VCC = 12 V D.C. IC2 = 4 mA, β = 100 (for SL 100)
___________________________________________________________________________ 11
RE = 6 / 4mA = 1500 Ω
RE = 1.5KΩ
R2
We know V B1 = VCC ×
R1 + R2
7.4 R2
=
12 R1 + R2
R2
0.616 =
R1 + R2
R2 = 0.616R1 + 0.616R2
0.383R2 = 0.616R1
R2 = 1.61R1
Let R2 = 100 KΩ
∴R1 = 62.11
Choose R1 = 68 KΩ (nearest standard Resistance value)
Since Vo = Vin
Ai = Zin / Zo
PROCEDURE:
___________________________________________________________________________ 12
C] To measure Zi:
4) Increase DRB till Vo = Va/2. The corresponding DRB value gives Zi.
D] To measure Zo:
4) Decrease DRB till Vo = Vb/2. The corresponding DRB value gives Zo.
TO MEASURE Zi:
Fig. No
(4)
TO MEASURE Zo:
Fig. No (5)
RESULT:
___________________________________________________________________________ 14
1] Q Point : ________________________
***************************************************************
VOLTAGE SERIES FEEDBACK AMPLIFIER
___________________________________________________________________________ 15
EXPERIMENT NO.: 03
7. DRB -- 01
8. Resistors 180 Ω 01
330 Ω 01
470Ω 01
1 KΩ 02
4.7 KΩ 02
10 KΩ 01
15 KΩ *(all ½ Watt) 02
9. Transistor SL 100 02
10. Patch cords, Connecting Wires,etc.
PROCEDURE:
Amplifier without Feed back;
1] Connect the circuit as shown in Fig. (1), set VCC = 12 V D.C.
2] Apply a sine wave to the first stage of amplifier with amplitude say 20 mV (p-p)
from the Function Generator.
3] Keep the frequency of the Function Generator in mid band range i.e. around
2 KHz. Increase amplitude of input signal till the output signal is undistorted.
(CRO at output)
The ratio [Vo / Vi] max gives the maximum undistorted gain [A] of the amplifier
without feedback.
4] Now Vary the input sine wave frequency from 10 Hz to 1 MHz in suitable
steps and measure the output Vo of the Amplifier at each step using CRO or AC
Millivoltmeter (The input Vi must remain constant through the Frequency range).
5] Note down the reading in table given and plot the graph of frequency v/s. Gain in dB,
determine Bandwidth.
Note: To measure Zi and Zo repeat the same procedure given in RC Coupled Amplifier.
DESIGN:
Let VCC = 12 V, IC = 4 mA
Choose VCE = VCC / 2 = 12 / 2 = 6V
Assuming VE = VCC / 6 = 12 / 6 = 2 V
___________________________________________________________________________ 17
We know VE = IE x RE = 2 V
12 − 6 − 2 4
Rc = = = 1K
4mA 4mA
RC = 1KΩ
VB = VBE + VE = 0.7 + 2 = 2.7 V
R2
V B = Vcc ×
R1 + R 2
2.7 R2 R2
= = 0.225 =
12 R1 + R 2 R1 = R 2
R2 = 0.225R1 + 0.225R2
0.775R2 = 0.225R1
R2 = 0.29R1
R2 = 3.44R2
Let R2 = 4.7 KΩ
then R1 = 16.18 KΩ
Choose R1 = 15KΩ
Design of second stage is same as that of first stage. Use 470 Ω as Re.
PROCEDURE:
___________________________________________________________________________ 18
2] Apply a sine wave to the first stage of amplifier with amplitude say 25 mV (p-p) from
the Function Generator.
3] Keep the frequency of the Function Generator in mid band range i.e. around
2 KHz. Increase amplitude of input signal till the output signal is undistorted.
(CRO at output)
The ratio [Vo / Vi] max gives the maximum undistorted gain [A mid ] of the amplifier
with feedback.
4] Now Vary the input sine wave frequency from 10 Hz to 1 MHz in suitable
steps and measure the output Vo of the Amplifier at each step using CRO or AC
Millivoltmeter (The input Vi must remain constant through the Frequency range).
5] Note down the reading in table given and plot the graph of frequency v/s. Gain in dB,
determine Bandwidth.
Note: To measure Zi and Zo repeat the same procedure given in RC Coupled Amplifier.
TABULAR COLUMN:
Vin = 20 mV(p-p)
FREQ. Vo(p-p) Vo(p-p) Av Av fb GdB Gfb dB
in Hz in Volts in Volts =Vo/Vi =Vo/Vi = 20 log10 (Vo/Vi ) = 20 log10(Vo/Vi )
without with
feedback feedback
___________________________________________________________________________ 19
RESULT:
1] Q Point : ________________________
***************************************************************
RC PHASE SHIFT OSCILLATOR
___________________________________________________________________________ 21
DESIGN:
Amplifier Design:
Let VCC = 12 V, IC = 4 mA, hfe = 100
Let VE = 2 V, VCE = VCC / 2 = 12 / 2 = 6 V
∴
RE = VE / IE = VE / IC = 2 / 4mA = 0.5 KΩ = 500 Ω (IE ≈ IC)
Choose RE = 470 Ω
To Find RC ;
VCC – ICRC – VCE – VE
VCC − C CE − V E 12 − 6 − 2
RC = = = 1K
Ic 4mA
RC = 1KΩ
To find R1 and R2 ;
From the base circuit in the above figure,
R2
V B = Vcc ×
R1 + R2
We know VB = VBE +VE = 2 + 0.7 = 2.7 V
VB R2
∴ =
Vcc R1 + R2
2. 7 R2
=
12 R1 + R2
R2
0.225 =
R1 + R2
0.225R1 + 0.225R2 = R2
0.225R1 = 0.775R2
R1 = 3.44R2
Choose R2 = 6.8 KΩ
Then R1 = 23.3 KΩ
Choose R1 = 22 KΩ
EXPERIMENT NO.:04
AIM: To design and test a RC Phase Shift Oscillator for a given frequency
5. Potentiometer 10 KΩ 01
___________________________________________________________________________ 22
6. Resistors 470 Ω 01
1 KΩ 01
3.9 KΩ 02
6.8 KΩ 01
22 KΩ *(all ½ Watt) 01
7. Transistor BC107 01
8. Patch cords, Connecting Wires,etc. 01
PROCEDURE:
3] Observe the output Vo on CRO. The 10 K pot is adjusted to get a stable output on the
CRO.
6] With respect to output at point P, observe the waveforms at point Q, R and S on the
CRO.
We can see that phase shift at each point being 60°, 12° and 180° respectively.
7] repeat the design for different value of frequency (in Audio range only). At each case
Compare the generated frequency with theoretical value.
Note: a) The last Resistor in the phase shifting network is chosen to be a 10 K pot.
This is done to get a overall phase shift of 180° at frequency of Oscillations.
b) The minimum hfe required for the transistor to oscillate is
≈ 89
The transistor should be chosen to have a value of hfe greater than 89.
and R = 3.9 KΩ
1
C=
1 × 2 × 3.142 × 3.9 ×10 6 7.202
1
C=
1 × 2 × 3.142 × 3.9 ×10 6 × 2.65
1
C= = 0.01 ×10 −6
64 .90 ×10 6
C = 0.01 µF
RESULT: ______________
___________________________________________________________________________ 24
***************************************************************************
FET HARTLEY OSCILLATOR
___________________________________________________________________________ 25
1
2π Leq .C.
15 = 10 + (1 x 10-3) (RD + RS) where Leq. = L1 + L2
5
= R D + RS
1 × 10 −3
5 x 103 = RD + RS c) In designing Split Inductors, the ratio
L2
VGS = (ID) (RS) =2 or L2 = 2L1
L1
+ 0.3 = (1 mA) RS Let L1 = 1 mH ∴ L2 = 2.2 mH
∴ Leq = 3.2 mH
So 0.3 / (1 x 10-3) = Rs
1
RS = 0.300 KΩ D) C= = 791.57 pF
4π Leq . f
2 2
___________________________________________________________________________ 26
AIM: To design and test a FET Hartley Oscillator for a given frequency
PROCEDURE:
6] Repeat the design for different value of frequency. At each case compare the
generated frequency with theoretical value.
RESULT: ______________
**********************************************************************
*
FET COLPITT’S OSCILLATOR
___________________________________________________________________________ 27
DESIGN: To design the FET Colpitts Oscillator to meet the following specifications;
Oscillation frequency f = 100 KHz
Use FET BFW 11 with the following specifications;
VDS = 10 V, ID = 1 mA, VGS = - 0.3 V
A) Select RG = 1 MΩ
5
= R D + RS
1 × 10 −3
5 x 103 = RD + RS
So 0.3 / (1 x 10-3) = RS
RS = 0.300 KΩ
Select RD = 4.7 KΩ
EXPERIMENT NO.: 06
___________________________________________________________________________ 28
AIM: To design and test a FET Colpitts Oscillator for a given frequency
PROCEDURE:
6] Repeat the design for different values of frequency. At each case compare the
generated frequency with theoretical value.
___________________________________________________________________________ 29
C1C 2
Where C =
C1 + C 2
1
L=
4π ( f 2 )C
2
L = 3.6mH
D) Choose Cs = 47 µF and
RESULT: ______________
___________________________________________________________________________ 30
***************************************************************
1. Diode Shunt Clipping above Vr (reference voltage) or Positive Peak
___________________________________________________________________________ 31
Clipping Circuit.
Fig. (1) Circuit Diagram of Diode Shunt Input output Waveforms Transfer Characteristic
Clipping above Vr
DESIGN:
The output to be clipped above 2 V.
So Vo (max) = +2 V
Vo = Vo (max) – Vr + Vref
So Vref = Vo (max) – Vr
= 2 – 0.6 = 1.4 V
R = 10 KΩ
EXPERIMENT No.: 07
___________________________________________________________________________ 32
AIM: To design the different types of Clipping Circuits and also to obtain the transfer
characteristics Of different types of Clipping Circuits.
PROCEDURE:
2. Observe output signal on the CRO and verify it with the given waveforms.
RESULT: ____________________
___________________________________________________________________________ 33
Clipping Circuit.
Fig. (2) Circuit Diagram of Diode Input output Waveforms Transfer Characteristic
Shunt Clipping below Vr
DESIGN:
Output voltage be clipped at + 2 Volt.
Vo (max) = Vref = 2 V
R = 10KΩ
PROCEDURE:
1. Circuit is wired up as shown in Fig. (2) and a sinusoidal signal of 1 KHz and
amplitude of 6 V(p-p) (Peak amplitude should be greater then clipping level) is
applied at input Vi.
2. Observe output signal on the CRO and verify it with the given waveforms.
RESULT: ____________________
___________________________________________________________________________ 34
Circuit
Fig. (3) Circuit Diagram of Diode Input output Waveforms Transfer Characteristic
Series Clipping above Vr
DESIGN:
Output voltage be clipped at + 2 Volt.
Vo (max) = Vref = 2 V
PROCEDURE:
1. Circuit is wired up as shown in Fig. (3) and a sinusoidal signal of 1 KHz and
amplitude of 6 Vp-p (Peak amplitude should be greater then clipping level) is
applied at input Vi.
2. Observe output signal on the CRO and verify it with the given waveforms.
RESULT: ____________________
___________________________________________________________________________ 35
Clipping Circuit.
Fig. (4) Circuit Diagram of Diode Input output Waveforms Transfer Characteristic
Series Clipping below Vr
DESIGN:
Output voltage be clipped at + 2 Volt.
Vo (max) = Vref = 2 V
R = 10KΩ
PROCEDURE:
1. Circuit is wired up as shown in Fig. (4) and a sinusoidal signal of 1 KHz and
amplitude of 6V(p-p) (Peak amplitude should be greater then clipping level) is
applied at input Vi.
2. Observe output signal on the CRO and verify it with the given waveforms.
RESULT: ____________________
___________________________________________________________________________ 36
DESIGN:
To clipping the signal below 2 Volt and above 4 Volt levels
VR2 = 2.6 V
2. Observe output signal on the CRO and verify it with the given waveforms.
3. Apply Vi and Vo to the X and Y channel of CRO and transfer characteristics is
obtained using X – Y mode in CRO.
RESULT: _______________
___________________________________________________________________________ 37
Fig. (6) Circuit Diagram of Double ended Input output Waveforms Transfer Characteristic
Clipper or squarer
DESIGN:
To generate a symmetrical square wave
Vref =± 4 Volts
Vo max = VR + Vr
VR = Vo max - Vr = 4 – 0.6
So
VR = 3.4 V
2. Observe output signal on the CRO and verify it with the given waveforms.
RESULT: _______________
___________________________________________________________________________ 38
Fig. (7) Circuit Diagram to clip the center portion Input output Waveforms
& transmit the peak of sinusoidal signal
-3 = VR2 – 0.6
-VR2 = 3 – 0.6 = 2.4
VR2 = -2.4 V
PROCEDURE:
1. Circuit is wired up as shown in Fig. (7) and a sinusoidal signal of 1 KHz and
suitable amplitude (Peak amplitude should be greater then clipping level) is
applied at input Vi.
2. Observe output signal on the CRO and verify it with the given waveforms.
3. Apply Vi and Vo to the X and Y channel of CRO and transfer characteristics is
obtained using X – Y mode in CRO.
RESULT: ______________
***************************************************************
1] POSITIVE PEAK CLAMPING:
___________________________________________________________________________ 39
DESIGN:
Clamping circuit to clamp positive peak at +3V.The input waveform has a frequency of
1 KHz sine wave or square wave with suitable amplitude.
Vo max = Vref + Vr
Vref = Vo max – Vr = 3 – 0.6
Vref = 2.4 V
Given frequency 1 KHz
1
So T =
1 ×10 3
= 1mSec
Choose RC » T
RC = 10 T
RC = (10) 1mSec = 10 mSec Rf = 10 Ω, Rr= 10 MΩ
C = 10 mSec / 10 K = 1µF If R = R f .Rr = 10 ×10 ×10 6
R = 10 KΩ
3V Vv
Note: Set Vref = 0 and observe the output for both sine and square wave input.
EXPERIMENT NO.: 08
___________________________________________________________________________ 40
CLAMPING CIRCUITS
PROCEDURE:
C) Connect the output to CRO and compare the output with the given
waveforms.
d) For the same circuit, give a square wave input and observe the output and
compare output with given waveforms
___________________________________________________________________________ 41
DESIGN:
Vo min = Vref - Vr
Vref = Vo min + Vr = -3 + 0.6
Vref = -2.4 V
0 0
Note: Set Vref = 0 and observe the output for both sine and square wave input.
PROCEDURE:
___________________________________________________________________________ 42
C) Connect the output to CRO and compare the output with the given
waveforms.
d) For the same circuit, give a square input and observe the output and
compare output with given waveforms
RESULT: ________________
***************************************************************
OP-AMP AS INVERTING AMPLIFIER:
___________________________________________________________________________ 43
DESIGN:
Av = -Rf/Ri
Select Rf = 47 KΩ, Ri = 10 KΩ
EXPERIMENT NO: 9
___________________________________________________________________________ 44
OP-AMP CIRCUITS
a) Inverting Amplifier
b) Non-Inverting Amplifier
c) Voltage Follower
and
To observe the input & output wave forms and
To determine the Voltage Gain Av.
PROCEDURE:
a) Inverting Amplifier
(3) Apply input voltage Vin of 1 V D.C. and measure the output
i.e. Vo = (-Rf/Ri) Vi in Volts.
[Verify the same with different value of D.C. input Voltages.]
(5) Observe the inverted, amplified output signal on CRO and measure
the Voltage levels of input and output signals i.e. Vin max. and Vo max.
DESIGN:
Avf = Vo / Vi = [1 + Rf / Ri] = 11
so Rf / Ri = 11-1 = 10.
Select Ri = 2.2 KΩ
PROCEDURE:
___________________________________________________________________________ 46
(3) Observe the input and output waveforms on CRO and measure Vin max.,
Vo max. and Voltage Gain Avf
Voltage Gain [Avf] = Vo max. / Vin max. = [1+ (Rf / Ri)] = -----------
___________________________________________________________________________ 47
DESIGN:
Avf = 1 i.e. Vo = Vi
PROCEDURE:
___________________________________________________________________________ 48
(2) apply a D.C. input Voltage of about 2, 3, 4 and 5 Volts at pin No. 3 (of Op-amp)
as input and measure the output voltage Vo at Pin No.6
i.e.
If Vi = +1 V then Vo = +1 V
Vi = +2 V then Vo = +2 V
Vi = +5 V then Vo = +5 V
Vi = -2 V then Vo = -2 V
(4) Apply a sinusoidal input signal of 2 Vp-p and frequency of 1 KHz at pin No.3 and
observe the output signal on CRO.
(5) Measure the Vin max. and Vo max. and calculate Voltage Gain AVf
***************************************************************************
___________________________________________________________________________ 49
DESIGN:
Output Vo = - [(Rf/R1) V1 + (Rf/R2) V2 + (Rf/R3) V3]
so
Vo = - [0.1V1 + V2 + 10V3]
Vo = -7 Volts
EXPERIMENT NO.: 10
___________________________________________________________________________ 50
PROCEDURE:
2] With chosen value of Rf, R1, R2 and R3 provide D.C. voltage V1, V2 and V3 from
D.C. Power supply.
4] For Inverting Summer Amplifier with A.C. signal, connect the circuit as shown in
Fig. (2) and repeat the above procedure providing A.C. sinusoidal signal of frequency
1 KHz as common source. Observe the output waveform. Compare it with the
designed values
RESULT: _______________
___________________________________________________________________________ 51
Rf
DESIGN: Vo = 1 + Vin
Rin
Vin =
( R / 2) V1 +
( R / 2)
V2+
R/2
V3
R R R
R + R + R +
2 2 2
V1 +V 2 +V 3
Vin =
3
Rf
Vo = 1 + Vin
Rin
Select 5Rf+Rin
V 1 + V 2 + V 3
Then V 0 = [1 + 5]
3
Vo = 2[V 1 +V 2 +V 3]
___________________________________________________________________________ 52
PROCEDURE:
b) Op-Amp as Non-Inverting Summer Amplifier
2] With chosen value of Rf, R1, R2 and R3 provide D.C. voltage V1, V2 and V3 from
D.C. Power supply.
4] For Non-Inverting Summer Amplifier with A.C. signal, connect the circuit as shown in
Fig. (5) and repeat the above procedure providing A.C. sinusoidal signal of frequency
1 KHz as common source and observe the output waveform. Compare it with the
designed values.
RESULT: _________________
***************************************************************************
OP-AMP AS INTEGRATOR
___________________________________________________________________________ 53
DESIGN:
1] For RC = 10T
1
Vo = − ∫Vidt
RC
So T = 1 / f = 1 mSec.
RC = T
2] Design for RC = T
EXPERIMENT NO.:11
___________________________________________________________________________ 54
PROCEDURE:
4] The output waveform is observed on the CRO. The output triangular wave is out of
phase w.r.t. input.
say (RC = 10T,RC = T,RC = 0.1T). Observe and plot the waveforms.
[Note: Observe the output waveform with sinusoidal signal of 1 KHz frequency and
suitable amplitude as input.]
RESULT: ______________________
OP-AMP AS DIFFERENTIATOR
___________________________________________________________________________ 55
DESIGN:
dVi
Vo = −RC
dt
T = 1 mSec.
Let C1 = 0.1 µF
So Rf = 0.1mSec / 0.1 µF = 1 KΩ
Rf = 1 KΩ
R1 = 10 KΩ
Rf = 10 KΩ
PROCEDURE:
___________________________________________________________________________ 56
4] The output waveform is observed on the CRO. The output will be a series of spikes.
say (RC = 10T,RC = T,RC = 0.1T). Observe and plot the waveforms.
[Note: Observe the output waveform with sinusoidal signal of 1 KHz frequency and
suitable amplitude as input and also observe the output with triangular wave
input]
RESULT: ______________________
***************************************************************************
ZERO CROSSING DETECTOR (ZCD)
___________________________________________________________________________ 57
Fig. (1) Circuit Diagram of Zero Crossing Detector Input Output Waveforms
EXPERIMENT NO.:12
PROCEDURE:
(b) Give a continuously varying signal, say sinusoidal or triangular wave to the
the inverting terminal of Op-Amp . Let the frequency of signal f = 1 KHz
and amplitude Vi = 4 V(p-p)
(d) As Vi crosses Vref = 0 Volt each time, output changes its state as shown in the
waveform. The output obtained will be a symmetrical square wave with
Amplitude at ±Vsat.
At each zero crossing of input, the output changes its state hence detecting the
zero crossings of Vi and is called Zero Crossing Detector.
(b) Connect the D.C. source at input and measure the UTP and LTP, compare them
with designed value.
(d) Display output rectangular wave on CRO and measure UTP and LTP.
(e) Use X – Y mode and display the Hysterisis curve on CRO, measure UTP and LTP
and compare it with the designed values.
(f) Also observe the input and output waveforms on CRO using Triangular
wave input.
DESIGN:
___________________________________________________________________________ 59
VH = V UTP – V LTP
= 0.5 – 1.5 = 2 V
2R2 = 22R1
R2 = (22 / 2) R1
R2 = 11 R1
If R1 = 10 KΩ then
___________________________________________________________________________ 60
VH = 2 Volt
VH = VUTP - VLTP
= - 1 – (-3)
=2V
R1
VH = [ + Vsat − (−Vsat )]
R1 + R 2
R1
2= [ +10 − (−10 )]
R1 + R 2
R1
2= [ 20 ]
R1 + R 2
2R1 + 2R2 = 20R1
2R2 = 20 R1 – 2R1
2R2 = 18R1
R2 = 9R1
If R1 = 10KΩ then R2 = 90 KΩ
Select R2 = 91 KΩ
**********************************************************************
*
PRECISION FULL WAVE RECTIFIER
___________________________________________________________________________ 61
Vo =(R/Rin)Vin
Vo = (3R/2R)(2R/3Rin)Vi
Vo =(R/Rin)Vin
Select R=100 KΩ
= (100) (103)(100)(10-3)
5
Rin = 2.2KΩ
EXPERIMENT NO: 13
___________________________________________________________________________ 62
PROCEDURE:
2) Connect the Function Generator at the input with sinusoidal signal of frequency
1 KHz and 100 mV amplitude.
TABULAR COLUMN:
WAVEFORMS:
RESULT: ________________
___________________________________________________________________________ 64
***************************************************************************
IC 723 VOLTAGE REGULATOR
___________________________________________________________________________ 65
Fig. (1) IC
LM723 PIN DETAILS
Fig. (2) Circuit Diagram for Low Voltage Regulator using IC 723
for Vo = 5V, IL = 100mA.
EXPERIMENT NO: 14
AIM: To design and test the IC 723 Voltage Regulator for the given specifications;
PROCEDURE:
RESULT: _________________
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5(R1+R2) = 7R2
2.5R1= R2
If R1 = 1KΩ,
R1 =1 K Ω
= 0.729 KΩ ≈ 680 Ω
R3 =680 Ω
TABULAR COLUMN:
Line Regulation Load regulation
Vo Vo
in in
Volts Volts
IL in mA
Vin in Volts
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∆Vo
Calculate Sv (Voltage stability Factor) = at constant IL ---------------
∆Vi
b) High Voltage Regulator using IC 723 for Vo = 15 V, IL = 100mA
PROCEDURE:
2) Vary Vin in steps of 1 Volt from 18 Volts to 30 Volts and note down the
Output Voltage (output Voltage is 15 Volts).
RSE = 40 Ω
Vo = 15 Volts
Vo = Vref(1)+(R1/R2)
15 = 7(1) + (R1/R2)
15 – 7 = 7R1/R2
8R2 = 7R1
1.142R2 = R1
If R2 = 2.2 KΩ
R2 = 2.2KΩ
R1 = 1.142R2
= 1.142(2.2KΩ)
R1 = 2.7KΩ
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i.e
R3 =1.2KΩ
Fig. (5) Circuit Diagram for High Voltage Regulator using IC 723 for Vo = 15V, IL = 100mA.
TABULAR COLUMN:
Line Regulation Load Regulation
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Vo Vo
in in
Volts Volts
Vin in Volts IL in mA
Fig. (6)
Fig. (7)
∆Vo
Calculate Sv (Voltage stability Factor) = at constant IL ---------------
∆Vi
RESULT: _________________
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***************************************************************************
R-2R DAC
DAC specifications:
1. Resolution of DAC:
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100
% R = ----------- or R = 2N
2N – 1
2. Linearity:
This term indicates how linearly the analog output from a DAC increases as the
Digital input (Binary) are changed in a proper binary number sequence from all
‘0’ inputs to all ‘1’ inputs.
DESIGN:
To design 4-Bit R-2R DAC
Op-Amp Voltage follower acts as a Buffer stage.
Do, D1, D2 and D3 are Digital inputs may be low (0) or High (1).
VR (0) = 0
VR (1) = VR = Reference voltage can be selected depending on maximum
Analog output voltage required.
If the Digital Inputs are obtained from a Digital IC Trainer then fix VR = +5 V
The Analog Vo for a 4 bit DAC is given by
VR 2 R
Vo = [2 3 D3 + 2 2 D2 + 21 D1 + 2 0 D0 ] ×
2 4 3R
VR
Vo = [2 3 D3 + 2 2 D2 + 21 D1 + 2 0 D0 ]
24
If VR = +5 Volts
VR 3
Then Vo = [2 D3 + 2 2 D2 + 21 D1 + 2 0 D0 ]
24
EXPERIMENT NO.: 15
R – 2R DAC
AIM:
a) To design and test R -2R DAC using Op-Amp.
b) To measure Resolution of DAC.
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PROCEDURE:
1] Connect the DAC circuit using R – 2R ladder network as shown in Fig. (1)
2] To measure minimum or least output Vomin:
Set all digital inputs to logic 0
i.e. Do = D1 = D2 = D3 = 0
then Vo = 0 theoretically and verify it practically.
Suppose if the inputs from digital trainer has minimum of 0.2 V which is logic 0
then
Vomin = (0.2 / 24) [8 + 4 + 2 + 1]
Vomin = 0.125 V
Instead of Vomin = 0 V, we have Vomin =0.125 V.
3] To measure Resolution of DAC:
Resolution is defined as smallest incremental change or it is 1 LSB.
R = 0.2083 V theoretically
Verify it practically measuring the value at Vo using Digital Voltmeter or
Digital multimeter.
4] To measure full scale output voltage:
Full scale output voltage is obtained by setting all the inputs to logic high.
i.e. D3 = D2 = D1 = + 5 V
∴V = (VR / 24) [8 + 4 + 2 + 1]
omax
= (5/24)15 = 3.125 V
The theoretically calculated value is verified by measuring practically.
5] Vary the digital input D3, D2, D1 and Do from 0000 to 1111 and note down the
output of the Op-Amp. Tabulate the reading in the tabular column.
TABULAR COLUMN:
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RESULT: ____________________
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***************************************************************
FLASH TYPE ADC
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TRUTH TABLE:
1V < Vi < 2V 0 1 1 1 0 0 1
2V < Vi < 3V 0 0 1 1 0 1 0
3V < Vi < 5V 0 0 0 0 0 1 1
EXPERIMENT NO.: 16
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PROCEDURE:
4] For different values of Vi observe the digital outputs as shown in truth table.
RESULT: _____________________
***************************************************************************
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QUESTION BANK
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2] Design a BJT Darlington Emitter follower and determine the gain, input and
output impedances.
3] Design a BJT Voltage series feed back amplifier and determine the gain,
frequency response, input and output impedances with and without
feed back.
5] Design and testing the performance of BJT-RC Phase shift Oscillator for
fo = 1 KHz.
6] Design and test the performance of FET Hartley Oscillators for RF range
fo = 100 KHz.
7] Design and test the performance of FET Colpitt’s Oscillators for RF range
fo = 100 KHz.
12] Construct and test Op-Amp circuit to obtain the following functions;
(i) Inverting amplifier (ii) Non-inverting amplifier (iii) Voltage follower.
13] Construct and test Op-Amp circuit to obtain the summer functions;
14] Construct and test Op-Amp circuit to obtain the following functions;
(i) Integrator and (ii) Differentiator for square wave inputs.
15] Design and test using Operational amplifiers for the performance of;
(i) ZCD and
(ii) Schmitt Trigger for different Hysterisis values.
16] Test the performance of Full wave precision rectifier using Operational
Amplifier.
17] Design and test the Voltage regulator using IC 723 to meet the following
specifications;
a) Vo = 5 Volt, IL = 100mA and
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b) Vo = 15 Volt, IL = 100mA.
19] Design and test of flash type ADC using Operational amplifier.
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